1bdcd8170SKalle Valo /* 2bdcd8170SKalle Valo * Copyright (c) 2010-2011 Atheros Communications Inc. 3bdcd8170SKalle Valo * 4bdcd8170SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 5bdcd8170SKalle Valo * purpose with or without fee is hereby granted, provided that the above 6bdcd8170SKalle Valo * copyright notice and this permission notice appear in all copies. 7bdcd8170SKalle Valo * 8bdcd8170SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9bdcd8170SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10bdcd8170SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11bdcd8170SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12bdcd8170SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13bdcd8170SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14bdcd8170SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15bdcd8170SKalle Valo */ 16bdcd8170SKalle Valo 17bdcd8170SKalle Valo #ifndef CORE_H 18bdcd8170SKalle Valo #define CORE_H 19bdcd8170SKalle Valo 20bdcd8170SKalle Valo #include <linux/etherdevice.h> 21bdcd8170SKalle Valo #include <linux/rtnetlink.h> 22bdcd8170SKalle Valo #include <linux/firmware.h> 23bdcd8170SKalle Valo #include <linux/sched.h> 24bdf5396bSKalle Valo #include <linux/circ_buf.h> 25bdcd8170SKalle Valo #include <net/cfg80211.h> 26bdcd8170SKalle Valo #include "htc.h" 27bdcd8170SKalle Valo #include "wmi.h" 28bdcd8170SKalle Valo #include "bmi.h" 29bc07ddb2SKalle Valo #include "target.h" 30bdcd8170SKalle Valo 31bdcd8170SKalle Valo #define MAX_ATH6KL 1 32bdcd8170SKalle Valo #define ATH6KL_MAX_RX_BUFFERS 16 33bdcd8170SKalle Valo #define ATH6KL_BUFFER_SIZE 1664 34bdcd8170SKalle Valo #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4 35bdcd8170SKalle Valo #define ATH6KL_AMSDU_REFILL_THRESHOLD 3 36bdcd8170SKalle Valo #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128) 37bdcd8170SKalle Valo #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508 38bdcd8170SKalle Valo #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46 39bdcd8170SKalle Valo 40bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_INIT 0 41bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_RUN 1 42bdcd8170SKalle Valo 43bdcd8170SKalle Valo #define ATH6KL_TX_TIMEOUT 10 44bdcd8170SKalle Valo #define ATH6KL_MAX_ENDPOINTS 4 45bdcd8170SKalle Valo #define MAX_NODE_NUM 15 46bdcd8170SKalle Valo 471df94a85SVasanthakumar Thiagarajan /* Extra bytes for htc header alignment */ 481df94a85SVasanthakumar Thiagarajan #define ATH6KL_HTC_ALIGN_BYTES 3 491df94a85SVasanthakumar Thiagarajan 50bdcd8170SKalle Valo /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */ 51bdcd8170SKalle Valo #define MAX_DEF_COOKIE_NUM 180 52bdcd8170SKalle Valo #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */ 53bdcd8170SKalle Valo #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM) 54bdcd8170SKalle Valo 55bdcd8170SKalle Valo #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC) 56bdcd8170SKalle Valo 57bdcd8170SKalle Valo #define DISCON_TIMER_INTVAL 10000 /* in msec */ 58bdcd8170SKalle Valo #define A_DEFAULT_LISTEN_INTERVAL 100 59bdcd8170SKalle Valo #define A_MAX_WOW_LISTEN_INTERVAL 1000 60bdcd8170SKalle Valo 6150d41234SKalle Valo /* includes also the null byte */ 6250d41234SKalle Valo #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL" 6350d41234SKalle Valo 6450d41234SKalle Valo enum ath6kl_fw_ie_type { 6550d41234SKalle Valo ATH6KL_FW_IE_FW_VERSION = 0, 6650d41234SKalle Valo ATH6KL_FW_IE_TIMESTAMP = 1, 6750d41234SKalle Valo ATH6KL_FW_IE_OTP_IMAGE = 2, 6850d41234SKalle Valo ATH6KL_FW_IE_FW_IMAGE = 3, 6950d41234SKalle Valo ATH6KL_FW_IE_PATCH_IMAGE = 4, 708a137480SKalle Valo ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5, 7197e0496dSKalle Valo ATH6KL_FW_IE_CAPABILITIES = 6, 721b4304daSKalle Valo ATH6KL_FW_IE_PATCH_ADDR = 7, 7303ef0250SKalle Valo ATH6KL_FW_IE_BOARD_ADDR = 8, 74368b1b0fSKalle Valo ATH6KL_FW_IE_VIF_MAX = 9, 7550d41234SKalle Valo }; 7650d41234SKalle Valo 7797e0496dSKalle Valo enum ath6kl_fw_capability { 7897e0496dSKalle Valo ATH6KL_FW_CAPABILITY_HOST_P2P = 0, 7910509f90SKalle Valo ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1, 8097e0496dSKalle Valo 8197e0496dSKalle Valo /* this needs to be last */ 8297e0496dSKalle Valo ATH6KL_FW_CAPABILITY_MAX, 8397e0496dSKalle Valo }; 8497e0496dSKalle Valo 8597e0496dSKalle Valo #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32) 8697e0496dSKalle Valo 8750d41234SKalle Valo struct ath6kl_fw_ie { 8850d41234SKalle Valo __le32 id; 8950d41234SKalle Valo __le32 len; 9050d41234SKalle Valo u8 data[0]; 9150d41234SKalle Valo }; 9250d41234SKalle Valo 93bdcd8170SKalle Valo /* AR6003 1.0 definitions */ 940d0192baSKalle Valo #define AR6003_HW_1_0_VERSION 0x300002ba 95bdcd8170SKalle Valo 96bdcd8170SKalle Valo /* AR6003 2.0 definitions */ 970d0192baSKalle Valo #define AR6003_HW_2_0_VERSION 0x30000384 980d0192baSKalle Valo #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910 990d0192baSKalle Valo #define AR6003_HW_2_0_OTP_FILE "ath6k/AR6003/hw2.0/otp.bin.z77" 1000d0192baSKalle Valo #define AR6003_HW_2_0_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athwlan.bin.z77" 1010d0192baSKalle Valo #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athtcmd_ram.bin" 1020d0192baSKalle Valo #define AR6003_HW_2_0_PATCH_FILE "ath6k/AR6003/hw2.0/data.patch.bin" 1030d0192baSKalle Valo #define AR6003_HW_2_0_FIRMWARE_2_FILE "ath6k/AR6003/hw2.0/fw-2.bin" 1040d0192baSKalle Valo #define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin" 1050d0192baSKalle Valo #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \ 1060d0192baSKalle Valo "ath6k/AR6003/hw2.0/bdata.SD31.bin" 107bdcd8170SKalle Valo 108bdcd8170SKalle Valo /* AR6003 3.0 definitions */ 1090d0192baSKalle Valo #define AR6003_HW_2_1_1_VERSION 0x30000582 1100d0192baSKalle Valo #define AR6003_HW_2_1_1_OTP_FILE "ath6k/AR6003/hw2.1.1/otp.bin" 1110d0192baSKalle Valo #define AR6003_HW_2_1_1_FIRMWARE_FILE "ath6k/AR6003/hw2.1.1/athwlan.bin" 1120d0192baSKalle Valo #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE \ 1130d0192baSKalle Valo "ath6k/AR6003/hw2.1.1/athtcmd_ram.bin" 1140d0192baSKalle Valo #define AR6003_HW_2_1_1_PATCH_FILE "ath6k/AR6003/hw2.1.1/data.patch.bin" 1150d0192baSKalle Valo #define AR6003_HW_2_1_1_FIRMWARE_2_FILE "ath6k/AR6003/hw2.1.1/fw-2.bin" 1160d0192baSKalle Valo #define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin" 1170d0192baSKalle Valo #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \ 118bdcd8170SKalle Valo "ath6k/AR6003/hw2.1.1/bdata.SD31.bin" 119bdcd8170SKalle Valo 12031024d99SKevin Fang /* AR6004 1.0 definitions */ 1210d0192baSKalle Valo #define AR6004_HW_1_0_VERSION 0x30000623 1220d0192baSKalle Valo #define AR6004_HW_1_0_FIRMWARE_2_FILE "ath6k/AR6004/hw1.0/fw-2.bin" 1230d0192baSKalle Valo #define AR6004_HW_1_0_FIRMWARE_FILE "ath6k/AR6004/hw1.0/fw.ram.bin" 1240d0192baSKalle Valo #define AR6004_HW_1_0_BOARD_DATA_FILE "ath6k/AR6004/hw1.0/bdata.bin" 1250d0192baSKalle Valo #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \ 126d5720e59SKalle Valo "ath6k/AR6004/hw1.0/bdata.DB132.bin" 127d5720e59SKalle Valo 128d5720e59SKalle Valo /* AR6004 1.1 definitions */ 1290d0192baSKalle Valo #define AR6004_HW_1_1_VERSION 0x30000001 1300d0192baSKalle Valo #define AR6004_HW_1_1_FIRMWARE_2_FILE "ath6k/AR6004/hw1.1/fw-2.bin" 1310d0192baSKalle Valo #define AR6004_HW_1_1_FIRMWARE_FILE "ath6k/AR6004/hw1.1/fw.ram.bin" 1320d0192baSKalle Valo #define AR6004_HW_1_1_BOARD_DATA_FILE "ath6k/AR6004/hw1.1/bdata.bin" 1330d0192baSKalle Valo #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \ 134d5720e59SKalle Valo "ath6k/AR6004/hw1.1/bdata.DB132.bin" 13531024d99SKevin Fang 136bdcd8170SKalle Valo /* Per STA data, used in AP mode */ 137bdcd8170SKalle Valo #define STA_PS_AWAKE BIT(0) 138bdcd8170SKalle Valo #define STA_PS_SLEEP BIT(1) 139bdcd8170SKalle Valo #define STA_PS_POLLED BIT(2) 140bdcd8170SKalle Valo 141bdcd8170SKalle Valo /* HTC TX packet tagging definitions */ 142bdcd8170SKalle Valo #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED 143bdcd8170SKalle Valo #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1) 144bdcd8170SKalle Valo 145bdcd8170SKalle Valo #define AR6003_CUST_DATA_SIZE 16 146bdcd8170SKalle Valo 147bdcd8170SKalle Valo #define AGGR_WIN_IDX(x, y) ((x) % (y)) 148bdcd8170SKalle Valo #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y)) 149bdcd8170SKalle Valo #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y)) 150bdcd8170SKalle Valo #define ATH6KL_MAX_SEQ_NO 0xFFF 151bdcd8170SKalle Valo #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO) 152bdcd8170SKalle Valo 153bdcd8170SKalle Valo #define NUM_OF_TIDS 8 154bdcd8170SKalle Valo #define AGGR_SZ_DEFAULT 8 155bdcd8170SKalle Valo 156bdcd8170SKalle Valo #define AGGR_WIN_SZ_MIN 2 157bdcd8170SKalle Valo #define AGGR_WIN_SZ_MAX 8 158bdcd8170SKalle Valo 159bdcd8170SKalle Valo #define TID_WINDOW_SZ(_x) ((_x) << 1) 160bdcd8170SKalle Valo 161bdcd8170SKalle Valo #define AGGR_NUM_OF_FREE_NETBUFS 16 162bdcd8170SKalle Valo 163bdcd8170SKalle Valo #define AGGR_RX_TIMEOUT 400 /* in ms */ 164bdcd8170SKalle Valo 165bdcd8170SKalle Valo #define WMI_TIMEOUT (2 * HZ) 166bdcd8170SKalle Valo 167bdcd8170SKalle Valo #define MBOX_YIELD_LIMIT 99 168bdcd8170SKalle Valo 169bdcd8170SKalle Valo /* configuration lags */ 170bdcd8170SKalle Valo /* 171bdcd8170SKalle Valo * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in 172bdcd8170SKalle Valo * ERP IE of beacon to determine the short premable support when 173bdcd8170SKalle Valo * sending (Re)Assoc req. 174bdcd8170SKalle Valo * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power 175bdcd8170SKalle Valo * module state transition failure events which happen during 176bdcd8170SKalle Valo * scan, to the host. 177bdcd8170SKalle Valo */ 178bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0) 179bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1) 180bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_11N BIT(2) 181bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3) 1828277de15SKalle Valo #define ATH6KL_CONF_SUSPEND_CUTPOWER BIT(4) 183bdcd8170SKalle Valo 184bdcd8170SKalle Valo enum wlan_low_pwr_state { 185bdcd8170SKalle Valo WLAN_POWER_STATE_ON, 186bdcd8170SKalle Valo WLAN_POWER_STATE_CUT_PWR, 187bdcd8170SKalle Valo WLAN_POWER_STATE_DEEP_SLEEP, 188bdcd8170SKalle Valo WLAN_POWER_STATE_WOW 189bdcd8170SKalle Valo }; 190bdcd8170SKalle Valo 191bdcd8170SKalle Valo enum sme_state { 192bdcd8170SKalle Valo SME_DISCONNECTED, 193bdcd8170SKalle Valo SME_CONNECTING, 194bdcd8170SKalle Valo SME_CONNECTED 195bdcd8170SKalle Valo }; 196bdcd8170SKalle Valo 197bdcd8170SKalle Valo struct skb_hold_q { 198bdcd8170SKalle Valo struct sk_buff *skb; 199bdcd8170SKalle Valo bool is_amsdu; 200bdcd8170SKalle Valo u16 seq_no; 201bdcd8170SKalle Valo }; 202bdcd8170SKalle Valo 203bdcd8170SKalle Valo struct rxtid { 204bdcd8170SKalle Valo bool aggr; 205bdcd8170SKalle Valo bool progress; 206bdcd8170SKalle Valo bool timer_mon; 207bdcd8170SKalle Valo u16 win_sz; 208bdcd8170SKalle Valo u16 seq_next; 209bdcd8170SKalle Valo u32 hold_q_sz; 210bdcd8170SKalle Valo struct skb_hold_q *hold_q; 211bdcd8170SKalle Valo struct sk_buff_head q; 212bdcd8170SKalle Valo spinlock_t lock; 213bdcd8170SKalle Valo }; 214bdcd8170SKalle Valo 215bdcd8170SKalle Valo struct rxtid_stats { 216bdcd8170SKalle Valo u32 num_into_aggr; 217bdcd8170SKalle Valo u32 num_dups; 218bdcd8170SKalle Valo u32 num_oow; 219bdcd8170SKalle Valo u32 num_mpdu; 220bdcd8170SKalle Valo u32 num_amsdu; 221bdcd8170SKalle Valo u32 num_delivered; 222bdcd8170SKalle Valo u32 num_timeouts; 223bdcd8170SKalle Valo u32 num_hole; 224bdcd8170SKalle Valo u32 num_bar; 225bdcd8170SKalle Valo }; 226bdcd8170SKalle Valo 227bdcd8170SKalle Valo struct aggr_info { 228bdcd8170SKalle Valo u8 aggr_sz; 229bdcd8170SKalle Valo u8 timer_scheduled; 230bdcd8170SKalle Valo struct timer_list timer; 231bdcd8170SKalle Valo struct net_device *dev; 232bdcd8170SKalle Valo struct rxtid rx_tid[NUM_OF_TIDS]; 233bdcd8170SKalle Valo struct sk_buff_head free_q; 234bdcd8170SKalle Valo struct rxtid_stats stat[NUM_OF_TIDS]; 235bdcd8170SKalle Valo }; 236bdcd8170SKalle Valo 237bdcd8170SKalle Valo struct ath6kl_wep_key { 238bdcd8170SKalle Valo u8 key_index; 239bdcd8170SKalle Valo u8 key_len; 240bdcd8170SKalle Valo u8 key[64]; 241bdcd8170SKalle Valo }; 242bdcd8170SKalle Valo 243bdcd8170SKalle Valo #define ATH6KL_KEY_SEQ_LEN 8 244bdcd8170SKalle Valo 245bdcd8170SKalle Valo struct ath6kl_key { 246bdcd8170SKalle Valo u8 key[WLAN_MAX_KEY_LEN]; 247bdcd8170SKalle Valo u8 key_len; 248bdcd8170SKalle Valo u8 seq[ATH6KL_KEY_SEQ_LEN]; 249bdcd8170SKalle Valo u8 seq_len; 250bdcd8170SKalle Valo u32 cipher; 251bdcd8170SKalle Valo }; 252bdcd8170SKalle Valo 253bdcd8170SKalle Valo struct ath6kl_node_mapping { 254bdcd8170SKalle Valo u8 mac_addr[ETH_ALEN]; 255bdcd8170SKalle Valo u8 ep_id; 256bdcd8170SKalle Valo u8 tx_pend; 257bdcd8170SKalle Valo }; 258bdcd8170SKalle Valo 259bdcd8170SKalle Valo struct ath6kl_cookie { 260bdcd8170SKalle Valo struct sk_buff *skb; 261bdcd8170SKalle Valo u32 map_no; 262bdcd8170SKalle Valo struct htc_packet htc_pkt; 263bdcd8170SKalle Valo struct ath6kl_cookie *arc_list_next; 264bdcd8170SKalle Valo }; 265bdcd8170SKalle Valo 266bdcd8170SKalle Valo struct ath6kl_sta { 267bdcd8170SKalle Valo u16 sta_flags; 268bdcd8170SKalle Valo u8 mac[ETH_ALEN]; 269bdcd8170SKalle Valo u8 aid; 270bdcd8170SKalle Valo u8 keymgmt; 271bdcd8170SKalle Valo u8 ucipher; 272bdcd8170SKalle Valo u8 auth; 273bdcd8170SKalle Valo u8 wpa_ie[ATH6KL_MAX_IE]; 274bdcd8170SKalle Valo struct sk_buff_head psq; 275bdcd8170SKalle Valo spinlock_t psq_lock; 276bdcd8170SKalle Valo }; 277bdcd8170SKalle Valo 278bdcd8170SKalle Valo struct ath6kl_version { 279bdcd8170SKalle Valo u32 target_ver; 280bdcd8170SKalle Valo u32 wlan_ver; 281bdcd8170SKalle Valo u32 abi_ver; 282bdcd8170SKalle Valo }; 283bdcd8170SKalle Valo 284bdcd8170SKalle Valo struct ath6kl_bmi { 285bdcd8170SKalle Valo u32 cmd_credits; 286bdcd8170SKalle Valo bool done_sent; 287bdcd8170SKalle Valo u8 *cmd_buf; 2881f4c894dSKalle Valo u32 max_data_size; 2891f4c894dSKalle Valo u32 max_cmd_size; 290bdcd8170SKalle Valo }; 291bdcd8170SKalle Valo 292bdcd8170SKalle Valo struct target_stats { 293bdcd8170SKalle Valo u64 tx_pkt; 294bdcd8170SKalle Valo u64 tx_byte; 295bdcd8170SKalle Valo u64 tx_ucast_pkt; 296bdcd8170SKalle Valo u64 tx_ucast_byte; 297bdcd8170SKalle Valo u64 tx_mcast_pkt; 298bdcd8170SKalle Valo u64 tx_mcast_byte; 299bdcd8170SKalle Valo u64 tx_bcast_pkt; 300bdcd8170SKalle Valo u64 tx_bcast_byte; 301bdcd8170SKalle Valo u64 tx_rts_success_cnt; 302bdcd8170SKalle Valo u64 tx_pkt_per_ac[4]; 303bdcd8170SKalle Valo 304bdcd8170SKalle Valo u64 tx_err; 305bdcd8170SKalle Valo u64 tx_fail_cnt; 306bdcd8170SKalle Valo u64 tx_retry_cnt; 307bdcd8170SKalle Valo u64 tx_mult_retry_cnt; 308bdcd8170SKalle Valo u64 tx_rts_fail_cnt; 309bdcd8170SKalle Valo 310bdcd8170SKalle Valo u64 rx_pkt; 311bdcd8170SKalle Valo u64 rx_byte; 312bdcd8170SKalle Valo u64 rx_ucast_pkt; 313bdcd8170SKalle Valo u64 rx_ucast_byte; 314bdcd8170SKalle Valo u64 rx_mcast_pkt; 315bdcd8170SKalle Valo u64 rx_mcast_byte; 316bdcd8170SKalle Valo u64 rx_bcast_pkt; 317bdcd8170SKalle Valo u64 rx_bcast_byte; 318bdcd8170SKalle Valo u64 rx_frgment_pkt; 319bdcd8170SKalle Valo 320bdcd8170SKalle Valo u64 rx_err; 321bdcd8170SKalle Valo u64 rx_crc_err; 322bdcd8170SKalle Valo u64 rx_key_cache_miss; 323bdcd8170SKalle Valo u64 rx_decrypt_err; 324bdcd8170SKalle Valo u64 rx_dupl_frame; 325bdcd8170SKalle Valo 326bdcd8170SKalle Valo u64 tkip_local_mic_fail; 327bdcd8170SKalle Valo u64 tkip_cnter_measures_invoked; 328bdcd8170SKalle Valo u64 tkip_replays; 329bdcd8170SKalle Valo u64 tkip_fmt_err; 330bdcd8170SKalle Valo u64 ccmp_fmt_err; 331bdcd8170SKalle Valo u64 ccmp_replays; 332bdcd8170SKalle Valo 333bdcd8170SKalle Valo u64 pwr_save_fail_cnt; 334bdcd8170SKalle Valo 335bdcd8170SKalle Valo u64 cs_bmiss_cnt; 336bdcd8170SKalle Valo u64 cs_low_rssi_cnt; 337bdcd8170SKalle Valo u64 cs_connect_cnt; 338bdcd8170SKalle Valo u64 cs_discon_cnt; 339bdcd8170SKalle Valo 340bdcd8170SKalle Valo s32 tx_ucast_rate; 341bdcd8170SKalle Valo s32 rx_ucast_rate; 342bdcd8170SKalle Valo 343bdcd8170SKalle Valo u32 lq_val; 344bdcd8170SKalle Valo 345bdcd8170SKalle Valo u32 wow_pkt_dropped; 346bdcd8170SKalle Valo u16 wow_evt_discarded; 347bdcd8170SKalle Valo 348bdcd8170SKalle Valo s16 noise_floor_calib; 349bdcd8170SKalle Valo s16 cs_rssi; 350bdcd8170SKalle Valo s16 cs_ave_beacon_rssi; 351bdcd8170SKalle Valo u8 cs_ave_beacon_snr; 352bdcd8170SKalle Valo u8 cs_last_roam_msec; 353bdcd8170SKalle Valo u8 cs_snr; 354bdcd8170SKalle Valo 355bdcd8170SKalle Valo u8 wow_host_pkt_wakeups; 356bdcd8170SKalle Valo u8 wow_host_evt_wakeups; 357bdcd8170SKalle Valo 358bdcd8170SKalle Valo u32 arp_received; 359bdcd8170SKalle Valo u32 arp_matched; 360bdcd8170SKalle Valo u32 arp_replied; 361bdcd8170SKalle Valo }; 362bdcd8170SKalle Valo 363bdcd8170SKalle Valo struct ath6kl_mbox_info { 364bdcd8170SKalle Valo u32 htc_addr; 365bdcd8170SKalle Valo u32 htc_ext_addr; 366bdcd8170SKalle Valo u32 htc_ext_sz; 367bdcd8170SKalle Valo 368bdcd8170SKalle Valo u32 block_size; 369bdcd8170SKalle Valo 370bdcd8170SKalle Valo u32 gmbox_addr; 371bdcd8170SKalle Valo 372bdcd8170SKalle Valo u32 gmbox_sz; 373bdcd8170SKalle Valo }; 374bdcd8170SKalle Valo 375bdcd8170SKalle Valo /* 376bdcd8170SKalle Valo * 802.11i defines an extended IV for use with non-WEP ciphers. 377bdcd8170SKalle Valo * When the EXTIV bit is set in the key id byte an additional 378bdcd8170SKalle Valo * 4 bytes immediately follow the IV for TKIP. For CCMP the 379bdcd8170SKalle Valo * EXTIV bit is likewise set but the 8 bytes represent the 380bdcd8170SKalle Valo * CCMP header rather than IV+extended-IV. 381bdcd8170SKalle Valo */ 382bdcd8170SKalle Valo 383bdcd8170SKalle Valo #define ATH6KL_KEYBUF_SIZE 16 384bdcd8170SKalle Valo #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */ 385bdcd8170SKalle Valo 386bdcd8170SKalle Valo #define ATH6KL_KEY_XMIT 0x01 387bdcd8170SKalle Valo #define ATH6KL_KEY_RECV 0x02 388bdcd8170SKalle Valo #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */ 389bdcd8170SKalle Valo 3909a5b1318SJouni Malinen /* Initial group key for AP mode */ 391bdcd8170SKalle Valo struct ath6kl_req_key { 3929a5b1318SJouni Malinen bool valid; 3939a5b1318SJouni Malinen u8 key_index; 3949a5b1318SJouni Malinen int key_type; 3959a5b1318SJouni Malinen u8 key[WLAN_MAX_KEY_LEN]; 3969a5b1318SJouni Malinen u8 key_len; 397bdcd8170SKalle Valo }; 398bdcd8170SKalle Valo 39977eab1e9SKalle Valo enum ath6kl_hif_type { 40077eab1e9SKalle Valo ATH6KL_HIF_TYPE_SDIO, 40177eab1e9SKalle Valo ATH6KL_HIF_TYPE_USB, 40277eab1e9SKalle Valo }; 40377eab1e9SKalle Valo 40471f96ee6SKalle Valo /* 40571f96ee6SKalle Valo * Driver's maximum limit, note that some firmwares support only one vif 40671f96ee6SKalle Valo * and the runtime (current) limit must be checked from ar->vif_max. 40771f96ee6SKalle Valo */ 408b64de356SVasanthakumar Thiagarajan #define ATH6KL_VIF_MAX 3 409334234b5SVasanthakumar Thiagarajan 41059c98449SVasanthakumar Thiagarajan /* vif flags info */ 41159c98449SVasanthakumar Thiagarajan enum ath6kl_vif_state { 41259c98449SVasanthakumar Thiagarajan CONNECTED, 41359c98449SVasanthakumar Thiagarajan CONNECT_PEND, 41459c98449SVasanthakumar Thiagarajan WMM_ENABLED, 41559c98449SVasanthakumar Thiagarajan NETQ_STOPPED, 41659c98449SVasanthakumar Thiagarajan DTIM_EXPIRED, 41759c98449SVasanthakumar Thiagarajan NETDEV_REGISTERED, 41859c98449SVasanthakumar Thiagarajan CLEAR_BSSFILTER_ON_BEACON, 41959c98449SVasanthakumar Thiagarajan DTIM_PERIOD_AVAIL, 42059c98449SVasanthakumar Thiagarajan WLAN_ENABLED, 421b95907a7SVasanthakumar Thiagarajan STATS_UPDATE_PEND, 42259c98449SVasanthakumar Thiagarajan }; 42359c98449SVasanthakumar Thiagarajan 424108438bcSVasanthakumar Thiagarajan struct ath6kl_vif { 425990bd915SVasanthakumar Thiagarajan struct list_head list; 426108438bcSVasanthakumar Thiagarajan struct wireless_dev wdev; 427108438bcSVasanthakumar Thiagarajan struct net_device *ndev; 428108438bcSVasanthakumar Thiagarajan struct ath6kl *ar; 429478ac027SVasanthakumar Thiagarajan /* Lock to protect vif specific net_stats and flags */ 430478ac027SVasanthakumar Thiagarajan spinlock_t if_lock; 431334234b5SVasanthakumar Thiagarajan u8 fw_vif_idx; 43259c98449SVasanthakumar Thiagarajan unsigned long flags; 4333450334fSVasanthakumar Thiagarajan int ssid_len; 4343450334fSVasanthakumar Thiagarajan u8 ssid[IEEE80211_MAX_SSID_LEN]; 4353450334fSVasanthakumar Thiagarajan u8 dot11_auth_mode; 4363450334fSVasanthakumar Thiagarajan u8 auth_mode; 4373450334fSVasanthakumar Thiagarajan u8 prwise_crypto; 4383450334fSVasanthakumar Thiagarajan u8 prwise_crypto_len; 4393450334fSVasanthakumar Thiagarajan u8 grp_crypto; 4403450334fSVasanthakumar Thiagarajan u8 grp_crypto_len; 4413450334fSVasanthakumar Thiagarajan u8 def_txkey_index; 442f5938f24SVasanthakumar Thiagarajan u8 next_mode; 443f5938f24SVasanthakumar Thiagarajan u8 nw_type; 4448c8b65e3SVasanthakumar Thiagarajan u8 bssid[ETH_ALEN]; 4458c8b65e3SVasanthakumar Thiagarajan u8 req_bssid[ETH_ALEN]; 446f74bac54SVasanthakumar Thiagarajan u16 ch_hint; 447f74bac54SVasanthakumar Thiagarajan u16 bss_ch; 4486f2a73f9SVasanthakumar Thiagarajan struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1]; 4496f2a73f9SVasanthakumar Thiagarajan struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1]; 4502132c69cSVasanthakumar Thiagarajan struct aggr_info *aggr_cntxt; 45110509f90SKalle Valo 452de3ad713SVasanthakumar Thiagarajan struct timer_list disconnect_timer; 45310509f90SKalle Valo struct timer_list sched_scan_timer; 45410509f90SKalle Valo 45514ee6f6bSVasanthakumar Thiagarajan struct cfg80211_scan_request *scan_req; 45614ee6f6bSVasanthakumar Thiagarajan enum sme_state sme_state; 457cf5333d7SVasanthakumar Thiagarajan int reconnect_flag; 4581052261eSJouni Malinen u32 last_roc_id; 4591052261eSJouni Malinen u32 last_cancel_roc_id; 460cf5333d7SVasanthakumar Thiagarajan u32 send_action_id; 461cf5333d7SVasanthakumar Thiagarajan bool probe_req_report; 462cf5333d7SVasanthakumar Thiagarajan u16 next_chan; 463cf5333d7SVasanthakumar Thiagarajan u16 assoc_bss_beacon_int; 464cf5333d7SVasanthakumar Thiagarajan u8 assoc_bss_dtim_period; 465b95907a7SVasanthakumar Thiagarajan struct net_device_stats net_stats; 466b95907a7SVasanthakumar Thiagarajan struct target_stats target_stats; 467108438bcSVasanthakumar Thiagarajan }; 468108438bcSVasanthakumar Thiagarajan 4696cb3c714SRaja Mani #define WOW_LIST_ID 0 4706cb3c714SRaja Mani #define WOW_HOST_REQ_DELAY 500 /* ms */ 4716cb3c714SRaja Mani 47210509f90SKalle Valo #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */ 47310509f90SKalle Valo 474bdcd8170SKalle Valo /* Flag info */ 47559c98449SVasanthakumar Thiagarajan enum ath6kl_dev_state { 47659c98449SVasanthakumar Thiagarajan WMI_ENABLED, 47759c98449SVasanthakumar Thiagarajan WMI_READY, 47859c98449SVasanthakumar Thiagarajan WMI_CTRL_EP_FULL, 47959c98449SVasanthakumar Thiagarajan TESTMODE, 48059c98449SVasanthakumar Thiagarajan DESTROY_IN_PROGRESS, 48159c98449SVasanthakumar Thiagarajan SKIP_SCAN, 48259c98449SVasanthakumar Thiagarajan ROAM_TBL_PEND, 4835fe4dffbSKalle Valo FIRST_BOOT, 48459c98449SVasanthakumar Thiagarajan }; 485bdcd8170SKalle Valo 48676a9fbe2SKalle Valo enum ath6kl_state { 48776a9fbe2SKalle Valo ATH6KL_STATE_OFF, 48876a9fbe2SKalle Valo ATH6KL_STATE_ON, 48976a9fbe2SKalle Valo ATH6KL_STATE_DEEPSLEEP, 490b4b2a0b1SKalle Valo ATH6KL_STATE_CUTPOWER, 491dd6c0c63SRaja Mani ATH6KL_STATE_WOW, 49210509f90SKalle Valo ATH6KL_STATE_SCHED_SCAN, 49376a9fbe2SKalle Valo }; 49476a9fbe2SKalle Valo 495bdcd8170SKalle Valo struct ath6kl { 496bdcd8170SKalle Valo struct device *dev; 497be98e3a4SVasanthakumar Thiagarajan struct wiphy *wiphy; 49876a9fbe2SKalle Valo 49976a9fbe2SKalle Valo enum ath6kl_state state; 50076a9fbe2SKalle Valo 501bdcd8170SKalle Valo struct ath6kl_bmi bmi; 502bdcd8170SKalle Valo const struct ath6kl_hif_ops *hif_ops; 503bdcd8170SKalle Valo struct wmi *wmi; 504bdcd8170SKalle Valo int tx_pending[ENDPOINT_MAX]; 505bdcd8170SKalle Valo int total_tx_data_pend; 506bdcd8170SKalle Valo struct htc_target *htc_target; 50777eab1e9SKalle Valo enum ath6kl_hif_type hif_type; 508bdcd8170SKalle Valo void *hif_priv; 509990bd915SVasanthakumar Thiagarajan struct list_head vif_list; 510990bd915SVasanthakumar Thiagarajan /* Lock to avoid race in vif_list entries among add/del/traverse */ 511990bd915SVasanthakumar Thiagarajan spinlock_t list_lock; 51255055976SVasanthakumar Thiagarajan u8 num_vif; 513368b1b0fSKalle Valo unsigned int vif_max; 5143226f68aSVasanthakumar Thiagarajan u8 max_norm_iface; 51555055976SVasanthakumar Thiagarajan u8 avail_idx_map; 516bdcd8170SKalle Valo spinlock_t lock; 517bdcd8170SKalle Valo struct semaphore sem; 518bdcd8170SKalle Valo u16 listen_intvl_b; 519bdcd8170SKalle Valo u16 listen_intvl_t; 520e5090444SVivek Natarajan u8 lrssi_roam_threshold; 521bdcd8170SKalle Valo struct ath6kl_version version; 522bdcd8170SKalle Valo u32 target_type; 523bdcd8170SKalle Valo u8 tx_pwr; 524bdcd8170SKalle Valo struct ath6kl_node_mapping node_map[MAX_NODE_NUM]; 525bdcd8170SKalle Valo u8 ibss_ps_enable; 52655055976SVasanthakumar Thiagarajan bool ibss_if_active; 527bdcd8170SKalle Valo u8 node_num; 528bdcd8170SKalle Valo u8 next_ep_id; 529bdcd8170SKalle Valo struct ath6kl_cookie *cookie_list; 530bdcd8170SKalle Valo u32 cookie_count; 531bdcd8170SKalle Valo enum htc_endpoint_id ac2ep_map[WMM_NUM_AC]; 532bdcd8170SKalle Valo bool ac_stream_active[WMM_NUM_AC]; 533bdcd8170SKalle Valo u8 ac_stream_pri_map[WMM_NUM_AC]; 534bdcd8170SKalle Valo u8 hiac_stream_active_pri; 535bdcd8170SKalle Valo u8 ep2ac_map[ENDPOINT_MAX]; 536bdcd8170SKalle Valo enum htc_endpoint_id ctrl_ep; 5373c370398SKalle Valo struct ath6kl_htc_credit_info credit_state_info; 538bdcd8170SKalle Valo u32 connect_ctrl_flags; 539bdcd8170SKalle Valo u32 user_key_ctrl; 540bdcd8170SKalle Valo u8 usr_bss_filter; 541bdcd8170SKalle Valo struct ath6kl_sta sta_list[AP_MAX_NUM_STA]; 542bdcd8170SKalle Valo u8 sta_list_index; 543bdcd8170SKalle Valo struct ath6kl_req_key ap_mode_bkey; 544bdcd8170SKalle Valo struct sk_buff_head mcastpsq; 545bdcd8170SKalle Valo spinlock_t mcastpsq_lock; 546bdcd8170SKalle Valo u8 intra_bss; 547bdcd8170SKalle Valo struct wmi_ap_mode_stat ap_stats; 548bdcd8170SKalle Valo u8 ap_country_code[3]; 549bdcd8170SKalle Valo struct list_head amsdu_rx_buffer_queue; 550bdcd8170SKalle Valo u8 rx_meta_ver; 551bdcd8170SKalle Valo enum wlan_low_pwr_state wlan_pwr_state; 552d66ea4f9SVasanthakumar Thiagarajan u8 mac_addr[ETH_ALEN]; 553bdcd8170SKalle Valo #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4 554003353b0SKalle Valo struct { 555003353b0SKalle Valo void *rx_report; 556003353b0SKalle Valo size_t rx_report_len; 557003353b0SKalle Valo } tm; 558003353b0SKalle Valo 559856f4b31SKalle Valo struct ath6kl_hw { 560856f4b31SKalle Valo u32 id; 561293badf4SKalle Valo const char *name; 562a01ac414SKalle Valo u32 dataset_patch_addr; 563a01ac414SKalle Valo u32 app_load_addr; 564a01ac414SKalle Valo u32 app_start_override_addr; 565991b27eaSKalle Valo u32 board_ext_data_addr; 566991b27eaSKalle Valo u32 reserved_ram_size; 5670d4d72bfSKalle Valo u32 board_addr; 568d1a9421dSKalle Valo 569d1a9421dSKalle Valo const char *fw_otp; 570d1a9421dSKalle Valo const char *fw; 571d1a9421dSKalle Valo const char *fw_tcmd; 572d1a9421dSKalle Valo const char *fw_patch; 573d1a9421dSKalle Valo const char *fw_api2; 574d1a9421dSKalle Valo const char *fw_board; 575d1a9421dSKalle Valo const char *fw_default_board; 576a01ac414SKalle Valo } hw; 577a01ac414SKalle Valo 578bdcd8170SKalle Valo u16 conf_flags; 579bdcd8170SKalle Valo wait_queue_head_t event_wq; 580bdcd8170SKalle Valo struct ath6kl_mbox_info mbox_info; 581bdcd8170SKalle Valo 582bdcd8170SKalle Valo struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM]; 583bdcd8170SKalle Valo unsigned long flag; 584bdcd8170SKalle Valo 585bdcd8170SKalle Valo u8 *fw_board; 586bdcd8170SKalle Valo size_t fw_board_len; 587bdcd8170SKalle Valo 588bdcd8170SKalle Valo u8 *fw_otp; 589bdcd8170SKalle Valo size_t fw_otp_len; 590bdcd8170SKalle Valo 591bdcd8170SKalle Valo u8 *fw; 592bdcd8170SKalle Valo size_t fw_len; 593bdcd8170SKalle Valo 594bdcd8170SKalle Valo u8 *fw_patch; 595bdcd8170SKalle Valo size_t fw_patch_len; 596bdcd8170SKalle Valo 59797e0496dSKalle Valo unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN]; 59897e0496dSKalle Valo 599bdcd8170SKalle Valo struct workqueue_struct *ath6kl_wq; 6007c3075e9SVasanthakumar Thiagarajan 601d999ba3eSVasanthakumar Thiagarajan struct dentry *debugfs_phy; 6026a7c9badSJouni Malinen 6036bbc7c35SJouni Malinen bool p2p; 6046bbc7c35SJouni Malinen 605bdf5396bSKalle Valo #ifdef CONFIG_ATH6KL_DEBUG 606bdf5396bSKalle Valo struct { 607bdf5396bSKalle Valo struct circ_buf fwlog_buf; 608bdf5396bSKalle Valo spinlock_t fwlog_lock; 609bdf5396bSKalle Valo void *fwlog_tmp; 610939f1cceSKalle Valo u32 fwlog_mask; 61191d57de5SVasanthakumar Thiagarajan unsigned int dbgfs_diag_reg; 612252c068bSVasanthakumar Thiagarajan u32 diag_reg_addr_wr; 613252c068bSVasanthakumar Thiagarajan u32 diag_reg_val_wr; 6149a730834SKalle Valo 6159a730834SKalle Valo struct { 6169a730834SKalle Valo unsigned int invalid_rate; 6179a730834SKalle Valo } war_stats; 6184b28a80dSJouni Malinen 6194b28a80dSJouni Malinen u8 *roam_tbl; 6204b28a80dSJouni Malinen unsigned int roam_tbl_len; 621ff0b0075SJouni Malinen 622ff0b0075SJouni Malinen u8 keepalive; 623ff0b0075SJouni Malinen u8 disc_timeout; 624bdf5396bSKalle Valo } debug; 625bdf5396bSKalle Valo #endif /* CONFIG_ATH6KL_DEBUG */ 626bdcd8170SKalle Valo }; 627bdcd8170SKalle Valo 628d6d5c06cSKalle Valo static inline struct ath6kl *ath6kl_priv(struct net_device *dev) 629bdcd8170SKalle Valo { 630108438bcSVasanthakumar Thiagarajan return ((struct ath6kl_vif *) netdev_priv(dev))->ar; 631bdcd8170SKalle Valo } 632bdcd8170SKalle Valo 633bc07ddb2SKalle Valo static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar, 634bc07ddb2SKalle Valo u32 item_offset) 635bc07ddb2SKalle Valo { 636bc07ddb2SKalle Valo u32 addr = 0; 637bc07ddb2SKalle Valo 638bc07ddb2SKalle Valo if (ar->target_type == TARGET_TYPE_AR6003) 639bc07ddb2SKalle Valo addr = ATH6KL_AR6003_HI_START_ADDR + item_offset; 640bc07ddb2SKalle Valo else if (ar->target_type == TARGET_TYPE_AR6004) 641bc07ddb2SKalle Valo addr = ATH6KL_AR6004_HI_START_ADDR + item_offset; 642bc07ddb2SKalle Valo 643bc07ddb2SKalle Valo return addr; 644bc07ddb2SKalle Valo } 645bc07ddb2SKalle Valo 646bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar); 647bdcd8170SKalle Valo void ath6kl_detect_error(unsigned long ptr); 648bdcd8170SKalle Valo void disconnect_timer_handler(unsigned long ptr); 649bdcd8170SKalle Valo void init_netdev(struct net_device *dev); 650bdcd8170SKalle Valo void ath6kl_cookie_init(struct ath6kl *ar); 651bdcd8170SKalle Valo void ath6kl_cookie_cleanup(struct ath6kl *ar); 652bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet); 653bdcd8170SKalle Valo void ath6kl_tx_complete(void *context, struct list_head *packet_queue); 654bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target, 655bdcd8170SKalle Valo struct htc_packet *packet); 656bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar); 657bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar); 658f9ea0753SVasanthakumar Thiagarajan int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value); 659addb44beSKalle Valo int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length); 660addb44beSKalle Valo int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value); 661addb44beSKalle Valo int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length); 662bc07ddb2SKalle Valo int ath6kl_read_fwlogs(struct ath6kl *ar); 663e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif); 664bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar); 665bdcd8170SKalle Valo 666bdcd8170SKalle Valo struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar); 667bdcd8170SKalle Valo void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie); 668bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev); 669bdcd8170SKalle Valo 670bdcd8170SKalle Valo struct aggr_info *aggr_init(struct net_device *dev); 671bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target, 672bdcd8170SKalle Valo enum htc_endpoint_id endpoint); 673bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count); 674bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target, 675bdcd8170SKalle Valo enum htc_endpoint_id endpoint, 676bdcd8170SKalle Valo int len); 677bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info); 678bdcd8170SKalle Valo void aggr_reset_state(struct aggr_info *aggr_info); 679bdcd8170SKalle Valo 6806765d0aaSVasanthakumar Thiagarajan struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 * node_addr); 681bdcd8170SKalle Valo struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid); 682bdcd8170SKalle Valo 683bdcd8170SKalle Valo void ath6kl_ready_event(void *devt, u8 * datap, u32 sw_ver, u32 abi_ver); 684bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb, 685bdcd8170SKalle Valo enum htc_endpoint_id eid); 686240d2799SVasanthakumar Thiagarajan void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel, 687bdcd8170SKalle Valo u8 *bssid, u16 listen_int, 688bdcd8170SKalle Valo u16 beacon_int, enum network_type net_type, 689bdcd8170SKalle Valo u8 beacon_ie_len, u8 assoc_req_len, 690bdcd8170SKalle Valo u8 assoc_resp_len, u8 *assoc_info); 691240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel); 692240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr, 693572e27c0SJouni Malinen u8 keymgmt, u8 ucipher, u8 auth, 694572e27c0SJouni Malinen u8 assoc_req_len, u8 *assoc_info); 695240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason, 696bdcd8170SKalle Valo u8 *bssid, u8 assoc_resp_len, 697bdcd8170SKalle Valo u8 *assoc_info, u16 prot_reason_status); 698240d2799SVasanthakumar Thiagarajan void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast); 699bdcd8170SKalle Valo void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr); 700240d2799SVasanthakumar Thiagarajan void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status); 701240d2799SVasanthakumar Thiagarajan void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len); 702bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active); 703bdcd8170SKalle Valo enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac); 704bdcd8170SKalle Valo 705240d2799SVasanthakumar Thiagarajan void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid); 706bdcd8170SKalle Valo 707240d2799SVasanthakumar Thiagarajan void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif); 708240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect(struct ath6kl_vif *vif); 709240d2799SVasanthakumar Thiagarajan void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid); 710240d2799SVasanthakumar Thiagarajan void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no, 711bdcd8170SKalle Valo u8 win_sz); 712bdcd8170SKalle Valo void ath6kl_wakeup_event(void *dev); 713bdcd8170SKalle Valo 7146db8fa53SVasanthakumar Thiagarajan void ath6kl_reset_device(struct ath6kl *ar, u32 target_type, 7156db8fa53SVasanthakumar Thiagarajan bool wait_fot_compltn, bool cold_reset); 716e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif); 717108438bcSVasanthakumar Thiagarajan void ath6kl_deinit_if_data(struct ath6kl_vif *vif); 7188dafb70eSVasanthakumar Thiagarajan void ath6kl_core_free(struct ath6kl *ar); 719990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar); 72055055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready); 7215fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar); 7225fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar); 723a918fb3cSRaja Mani void ath6kl_check_wow_status(struct ath6kl *ar); 7245fe4dffbSKalle Valo 725bdcd8170SKalle Valo #endif /* CORE_H */ 726