1bdcd8170SKalle Valo /*
2bdcd8170SKalle Valo  * Copyright (c) 2010-2011 Atheros Communications Inc.
3bdcd8170SKalle Valo  *
4bdcd8170SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
5bdcd8170SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
6bdcd8170SKalle Valo  * copyright notice and this permission notice appear in all copies.
7bdcd8170SKalle Valo  *
8bdcd8170SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9bdcd8170SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10bdcd8170SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11bdcd8170SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12bdcd8170SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13bdcd8170SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14bdcd8170SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15bdcd8170SKalle Valo  */
16bdcd8170SKalle Valo 
17bdcd8170SKalle Valo #ifndef CORE_H
18bdcd8170SKalle Valo #define CORE_H
19bdcd8170SKalle Valo 
20bdcd8170SKalle Valo #include <linux/etherdevice.h>
21bdcd8170SKalle Valo #include <linux/rtnetlink.h>
22bdcd8170SKalle Valo #include <linux/firmware.h>
23bdcd8170SKalle Valo #include <linux/sched.h>
24bdf5396bSKalle Valo #include <linux/circ_buf.h>
25bdcd8170SKalle Valo #include <net/cfg80211.h>
26bdcd8170SKalle Valo #include "htc.h"
27bdcd8170SKalle Valo #include "wmi.h"
28bdcd8170SKalle Valo #include "bmi.h"
29bc07ddb2SKalle Valo #include "target.h"
30bdcd8170SKalle Valo 
31bdcd8170SKalle Valo #define MAX_ATH6KL                        1
32bdcd8170SKalle Valo #define ATH6KL_MAX_RX_BUFFERS             16
33bdcd8170SKalle Valo #define ATH6KL_BUFFER_SIZE                1664
34bdcd8170SKalle Valo #define ATH6KL_MAX_AMSDU_RX_BUFFERS       4
35bdcd8170SKalle Valo #define ATH6KL_AMSDU_REFILL_THRESHOLD     3
36bdcd8170SKalle Valo #define ATH6KL_AMSDU_BUFFER_SIZE     (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128)
37bdcd8170SKalle Valo #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN	1508
38bdcd8170SKalle Valo #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN	46
39bdcd8170SKalle Valo 
40bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_INIT     0
41bdcd8170SKalle Valo #define USER_SAVEDKEYS_STAT_RUN      1
42bdcd8170SKalle Valo 
43bdcd8170SKalle Valo #define ATH6KL_TX_TIMEOUT      10
44bdcd8170SKalle Valo #define ATH6KL_MAX_ENDPOINTS   4
45bdcd8170SKalle Valo #define MAX_NODE_NUM           15
46bdcd8170SKalle Valo 
471df94a85SVasanthakumar Thiagarajan /* Extra bytes for htc header alignment */
481df94a85SVasanthakumar Thiagarajan #define ATH6KL_HTC_ALIGN_BYTES 3
491df94a85SVasanthakumar Thiagarajan 
50bdcd8170SKalle Valo /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */
51bdcd8170SKalle Valo #define MAX_DEF_COOKIE_NUM                180
52bdcd8170SKalle Valo #define MAX_HI_COOKIE_NUM                 18	/* 10% of MAX_COOKIE_NUM */
53bdcd8170SKalle Valo #define MAX_COOKIE_NUM                 (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM)
54bdcd8170SKalle Valo 
55bdcd8170SKalle Valo #define MAX_DEFAULT_SEND_QUEUE_DEPTH      (MAX_DEF_COOKIE_NUM / WMM_NUM_AC)
56bdcd8170SKalle Valo 
57bdcd8170SKalle Valo #define DISCON_TIMER_INTVAL               10000  /* in msec */
58bdcd8170SKalle Valo #define A_DEFAULT_LISTEN_INTERVAL         100
59bdcd8170SKalle Valo #define A_MAX_WOW_LISTEN_INTERVAL         1000
60bdcd8170SKalle Valo 
6150d41234SKalle Valo /* includes also the null byte */
6250d41234SKalle Valo #define ATH6KL_FIRMWARE_MAGIC               "QCA-ATH6KL"
6350d41234SKalle Valo 
6450d41234SKalle Valo enum ath6kl_fw_ie_type {
6550d41234SKalle Valo 	ATH6KL_FW_IE_FW_VERSION = 0,
6650d41234SKalle Valo 	ATH6KL_FW_IE_TIMESTAMP = 1,
6750d41234SKalle Valo 	ATH6KL_FW_IE_OTP_IMAGE = 2,
6850d41234SKalle Valo 	ATH6KL_FW_IE_FW_IMAGE = 3,
6950d41234SKalle Valo 	ATH6KL_FW_IE_PATCH_IMAGE = 4,
708a137480SKalle Valo 	ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5,
7197e0496dSKalle Valo 	ATH6KL_FW_IE_CAPABILITIES = 6,
721b4304daSKalle Valo 	ATH6KL_FW_IE_PATCH_ADDR = 7,
7303ef0250SKalle Valo 	ATH6KL_FW_IE_BOARD_ADDR = 8,
7450d41234SKalle Valo };
7550d41234SKalle Valo 
7697e0496dSKalle Valo enum ath6kl_fw_capability {
7797e0496dSKalle Valo 	ATH6KL_FW_CAPABILITY_HOST_P2P = 0,
7897e0496dSKalle Valo 
7997e0496dSKalle Valo 	/* this needs to be last */
8097e0496dSKalle Valo 	ATH6KL_FW_CAPABILITY_MAX,
8197e0496dSKalle Valo };
8297e0496dSKalle Valo 
8397e0496dSKalle Valo #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32)
8497e0496dSKalle Valo 
8550d41234SKalle Valo struct ath6kl_fw_ie {
8650d41234SKalle Valo 	__le32 id;
8750d41234SKalle Valo 	__le32 len;
8850d41234SKalle Valo 	u8 data[0];
8950d41234SKalle Valo };
9050d41234SKalle Valo 
91bdcd8170SKalle Valo /* AR6003 1.0 definitions */
92bdcd8170SKalle Valo #define AR6003_REV1_VERSION                 0x300002ba
93bdcd8170SKalle Valo 
94bdcd8170SKalle Valo /* AR6003 2.0 definitions */
95bdcd8170SKalle Valo #define AR6003_REV2_VERSION                 0x30000384
96bdcd8170SKalle Valo #define AR6003_REV2_PATCH_DOWNLOAD_ADDRESS  0x57e910
97bdcd8170SKalle Valo #define AR6003_REV2_OTP_FILE                "ath6k/AR6003/hw2.0/otp.bin.z77"
98bdcd8170SKalle Valo #define AR6003_REV2_FIRMWARE_FILE           "ath6k/AR6003/hw2.0/athwlan.bin.z77"
99003353b0SKalle Valo #define AR6003_REV2_TCMD_FIRMWARE_FILE      "ath6k/AR6003/hw2.0/athtcmd_ram.bin"
100bdcd8170SKalle Valo #define AR6003_REV2_PATCH_FILE              "ath6k/AR6003/hw2.0/data.patch.bin"
10150d41234SKalle Valo #define AR6003_REV2_FIRMWARE_2_FILE         "ath6k/AR6003/hw2.0/fw-2.bin"
102bdcd8170SKalle Valo #define AR6003_REV2_BOARD_DATA_FILE         "ath6k/AR6003/hw2.0/bdata.bin"
103bdcd8170SKalle Valo #define AR6003_REV2_DEFAULT_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.SD31.bin"
104bdcd8170SKalle Valo 
105bdcd8170SKalle Valo /* AR6003 3.0 definitions */
106bdcd8170SKalle Valo #define AR6003_REV3_VERSION                 0x30000582
107bdcd8170SKalle Valo #define AR6003_REV3_OTP_FILE                "ath6k/AR6003/hw2.1.1/otp.bin"
108bdcd8170SKalle Valo #define AR6003_REV3_FIRMWARE_FILE           "ath6k/AR6003/hw2.1.1/athwlan.bin"
109003353b0SKalle Valo #define AR6003_REV3_TCMD_FIRMWARE_FILE    "ath6k/AR6003/hw2.1.1/athtcmd_ram.bin"
110bdcd8170SKalle Valo #define AR6003_REV3_PATCH_FILE            "ath6k/AR6003/hw2.1.1/data.patch.bin"
11150d41234SKalle Valo #define AR6003_REV3_FIRMWARE_2_FILE           "ath6k/AR6003/hw2.1.1/fw-2.bin"
112bdcd8170SKalle Valo #define AR6003_REV3_BOARD_DATA_FILE       "ath6k/AR6003/hw2.1.1/bdata.bin"
113bdcd8170SKalle Valo #define AR6003_REV3_DEFAULT_BOARD_DATA_FILE	\
114bdcd8170SKalle Valo 	"ath6k/AR6003/hw2.1.1/bdata.SD31.bin"
115bdcd8170SKalle Valo 
11631024d99SKevin Fang /* AR6004 1.0 definitions */
11731024d99SKevin Fang #define AR6004_REV1_VERSION                 0x30000623
118d5720e59SKalle Valo #define AR6004_REV1_FIRMWARE_2_FILE         "ath6k/AR6004/hw1.0/fw-2.bin"
119d5720e59SKalle Valo #define AR6004_REV1_FIRMWARE_FILE           "ath6k/AR6004/hw1.0/fw.ram.bin"
120d5720e59SKalle Valo #define AR6004_REV1_BOARD_DATA_FILE         "ath6k/AR6004/hw1.0/bdata.bin"
121d5720e59SKalle Valo #define AR6004_REV1_DEFAULT_BOARD_DATA_FILE \
122d5720e59SKalle Valo 	"ath6k/AR6004/hw1.0/bdata.DB132.bin"
123d5720e59SKalle Valo 
124d5720e59SKalle Valo /* AR6004 1.1 definitions */
125d5720e59SKalle Valo #define AR6004_REV2_VERSION                 0x30000001
126d5720e59SKalle Valo #define AR6004_REV2_FIRMWARE_2_FILE         "ath6k/AR6004/hw1.1/fw-2.bin"
127d5720e59SKalle Valo #define AR6004_REV2_FIRMWARE_FILE           "ath6k/AR6004/hw1.1/fw.ram.bin"
128d5720e59SKalle Valo #define AR6004_REV2_BOARD_DATA_FILE         "ath6k/AR6004/hw1.1/bdata.bin"
129d5720e59SKalle Valo #define AR6004_REV2_DEFAULT_BOARD_DATA_FILE \
130d5720e59SKalle Valo 	"ath6k/AR6004/hw1.1/bdata.DB132.bin"
13131024d99SKevin Fang 
132bdcd8170SKalle Valo /* Per STA data, used in AP mode */
133bdcd8170SKalle Valo #define STA_PS_AWAKE		BIT(0)
134bdcd8170SKalle Valo #define	STA_PS_SLEEP		BIT(1)
135bdcd8170SKalle Valo #define	STA_PS_POLLED		BIT(2)
136bdcd8170SKalle Valo 
137bdcd8170SKalle Valo /* HTC TX packet tagging definitions */
138bdcd8170SKalle Valo #define ATH6KL_CONTROL_PKT_TAG    HTC_TX_PACKET_TAG_USER_DEFINED
139bdcd8170SKalle Valo #define ATH6KL_DATA_PKT_TAG       (ATH6KL_CONTROL_PKT_TAG + 1)
140bdcd8170SKalle Valo 
141bdcd8170SKalle Valo #define AR6003_CUST_DATA_SIZE 16
142bdcd8170SKalle Valo 
143bdcd8170SKalle Valo #define AGGR_WIN_IDX(x, y)          ((x) % (y))
144bdcd8170SKalle Valo #define AGGR_INCR_IDX(x, y)         AGGR_WIN_IDX(((x) + 1), (y))
145bdcd8170SKalle Valo #define AGGR_DCRM_IDX(x, y)         AGGR_WIN_IDX(((x) - 1), (y))
146bdcd8170SKalle Valo #define ATH6KL_MAX_SEQ_NO		0xFFF
147bdcd8170SKalle Valo #define ATH6KL_NEXT_SEQ_NO(x)		(((x) + 1) & ATH6KL_MAX_SEQ_NO)
148bdcd8170SKalle Valo 
149bdcd8170SKalle Valo #define NUM_OF_TIDS         8
150bdcd8170SKalle Valo #define AGGR_SZ_DEFAULT     8
151bdcd8170SKalle Valo 
152bdcd8170SKalle Valo #define AGGR_WIN_SZ_MIN     2
153bdcd8170SKalle Valo #define AGGR_WIN_SZ_MAX     8
154bdcd8170SKalle Valo 
155bdcd8170SKalle Valo #define TID_WINDOW_SZ(_x)   ((_x) << 1)
156bdcd8170SKalle Valo 
157bdcd8170SKalle Valo #define AGGR_NUM_OF_FREE_NETBUFS    16
158bdcd8170SKalle Valo 
159bdcd8170SKalle Valo #define AGGR_RX_TIMEOUT     400	/* in ms */
160bdcd8170SKalle Valo 
161bdcd8170SKalle Valo #define WMI_TIMEOUT (2 * HZ)
162bdcd8170SKalle Valo 
163bdcd8170SKalle Valo #define MBOX_YIELD_LIMIT 99
164bdcd8170SKalle Valo 
165bdcd8170SKalle Valo /* configuration lags */
166bdcd8170SKalle Valo /*
167bdcd8170SKalle Valo  * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in
168bdcd8170SKalle Valo  * ERP IE of beacon to determine the short premable support when
169bdcd8170SKalle Valo  * sending (Re)Assoc req.
170bdcd8170SKalle Valo  * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power
171bdcd8170SKalle Valo  * module state transition failure events which happen during
172bdcd8170SKalle Valo  * scan, to the host.
173bdcd8170SKalle Valo  */
174bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_ERP_BARKER		BIT(0)
175bdcd8170SKalle Valo #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN  BIT(1)
176bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_11N			BIT(2)
177bdcd8170SKalle Valo #define ATH6KL_CONF_ENABLE_TX_BURST		BIT(3)
1788277de15SKalle Valo #define ATH6KL_CONF_SUSPEND_CUTPOWER		BIT(4)
179bdcd8170SKalle Valo 
180bdcd8170SKalle Valo enum wlan_low_pwr_state {
181bdcd8170SKalle Valo 	WLAN_POWER_STATE_ON,
182bdcd8170SKalle Valo 	WLAN_POWER_STATE_CUT_PWR,
183bdcd8170SKalle Valo 	WLAN_POWER_STATE_DEEP_SLEEP,
184bdcd8170SKalle Valo 	WLAN_POWER_STATE_WOW
185bdcd8170SKalle Valo };
186bdcd8170SKalle Valo 
187bdcd8170SKalle Valo enum sme_state {
188bdcd8170SKalle Valo 	SME_DISCONNECTED,
189bdcd8170SKalle Valo 	SME_CONNECTING,
190bdcd8170SKalle Valo 	SME_CONNECTED
191bdcd8170SKalle Valo };
192bdcd8170SKalle Valo 
193bdcd8170SKalle Valo struct skb_hold_q {
194bdcd8170SKalle Valo 	struct sk_buff *skb;
195bdcd8170SKalle Valo 	bool is_amsdu;
196bdcd8170SKalle Valo 	u16 seq_no;
197bdcd8170SKalle Valo };
198bdcd8170SKalle Valo 
199bdcd8170SKalle Valo struct rxtid {
200bdcd8170SKalle Valo 	bool aggr;
201bdcd8170SKalle Valo 	bool progress;
202bdcd8170SKalle Valo 	bool timer_mon;
203bdcd8170SKalle Valo 	u16 win_sz;
204bdcd8170SKalle Valo 	u16 seq_next;
205bdcd8170SKalle Valo 	u32 hold_q_sz;
206bdcd8170SKalle Valo 	struct skb_hold_q *hold_q;
207bdcd8170SKalle Valo 	struct sk_buff_head q;
208bdcd8170SKalle Valo 	spinlock_t lock;
209bdcd8170SKalle Valo };
210bdcd8170SKalle Valo 
211bdcd8170SKalle Valo struct rxtid_stats {
212bdcd8170SKalle Valo 	u32 num_into_aggr;
213bdcd8170SKalle Valo 	u32 num_dups;
214bdcd8170SKalle Valo 	u32 num_oow;
215bdcd8170SKalle Valo 	u32 num_mpdu;
216bdcd8170SKalle Valo 	u32 num_amsdu;
217bdcd8170SKalle Valo 	u32 num_delivered;
218bdcd8170SKalle Valo 	u32 num_timeouts;
219bdcd8170SKalle Valo 	u32 num_hole;
220bdcd8170SKalle Valo 	u32 num_bar;
221bdcd8170SKalle Valo };
222bdcd8170SKalle Valo 
223bdcd8170SKalle Valo struct aggr_info {
224bdcd8170SKalle Valo 	u8 aggr_sz;
225bdcd8170SKalle Valo 	u8 timer_scheduled;
226bdcd8170SKalle Valo 	struct timer_list timer;
227bdcd8170SKalle Valo 	struct net_device *dev;
228bdcd8170SKalle Valo 	struct rxtid rx_tid[NUM_OF_TIDS];
229bdcd8170SKalle Valo 	struct sk_buff_head free_q;
230bdcd8170SKalle Valo 	struct rxtid_stats stat[NUM_OF_TIDS];
231bdcd8170SKalle Valo };
232bdcd8170SKalle Valo 
233bdcd8170SKalle Valo struct ath6kl_wep_key {
234bdcd8170SKalle Valo 	u8 key_index;
235bdcd8170SKalle Valo 	u8 key_len;
236bdcd8170SKalle Valo 	u8 key[64];
237bdcd8170SKalle Valo };
238bdcd8170SKalle Valo 
239bdcd8170SKalle Valo #define ATH6KL_KEY_SEQ_LEN 8
240bdcd8170SKalle Valo 
241bdcd8170SKalle Valo struct ath6kl_key {
242bdcd8170SKalle Valo 	u8 key[WLAN_MAX_KEY_LEN];
243bdcd8170SKalle Valo 	u8 key_len;
244bdcd8170SKalle Valo 	u8 seq[ATH6KL_KEY_SEQ_LEN];
245bdcd8170SKalle Valo 	u8 seq_len;
246bdcd8170SKalle Valo 	u32 cipher;
247bdcd8170SKalle Valo };
248bdcd8170SKalle Valo 
249bdcd8170SKalle Valo struct ath6kl_node_mapping {
250bdcd8170SKalle Valo 	u8 mac_addr[ETH_ALEN];
251bdcd8170SKalle Valo 	u8 ep_id;
252bdcd8170SKalle Valo 	u8 tx_pend;
253bdcd8170SKalle Valo };
254bdcd8170SKalle Valo 
255bdcd8170SKalle Valo struct ath6kl_cookie {
256bdcd8170SKalle Valo 	struct sk_buff *skb;
257bdcd8170SKalle Valo 	u32 map_no;
258bdcd8170SKalle Valo 	struct htc_packet htc_pkt;
259bdcd8170SKalle Valo 	struct ath6kl_cookie *arc_list_next;
260bdcd8170SKalle Valo };
261bdcd8170SKalle Valo 
262bdcd8170SKalle Valo struct ath6kl_sta {
263bdcd8170SKalle Valo 	u16 sta_flags;
264bdcd8170SKalle Valo 	u8 mac[ETH_ALEN];
265bdcd8170SKalle Valo 	u8 aid;
266bdcd8170SKalle Valo 	u8 keymgmt;
267bdcd8170SKalle Valo 	u8 ucipher;
268bdcd8170SKalle Valo 	u8 auth;
269bdcd8170SKalle Valo 	u8 wpa_ie[ATH6KL_MAX_IE];
270bdcd8170SKalle Valo 	struct sk_buff_head psq;
271bdcd8170SKalle Valo 	spinlock_t psq_lock;
272bdcd8170SKalle Valo };
273bdcd8170SKalle Valo 
274bdcd8170SKalle Valo struct ath6kl_version {
275bdcd8170SKalle Valo 	u32 target_ver;
276bdcd8170SKalle Valo 	u32 wlan_ver;
277bdcd8170SKalle Valo 	u32 abi_ver;
278bdcd8170SKalle Valo };
279bdcd8170SKalle Valo 
280bdcd8170SKalle Valo struct ath6kl_bmi {
281bdcd8170SKalle Valo 	u32 cmd_credits;
282bdcd8170SKalle Valo 	bool done_sent;
283bdcd8170SKalle Valo 	u8 *cmd_buf;
2841f4c894dSKalle Valo 	u32 max_data_size;
2851f4c894dSKalle Valo 	u32 max_cmd_size;
286bdcd8170SKalle Valo };
287bdcd8170SKalle Valo 
288bdcd8170SKalle Valo struct target_stats {
289bdcd8170SKalle Valo 	u64 tx_pkt;
290bdcd8170SKalle Valo 	u64 tx_byte;
291bdcd8170SKalle Valo 	u64 tx_ucast_pkt;
292bdcd8170SKalle Valo 	u64 tx_ucast_byte;
293bdcd8170SKalle Valo 	u64 tx_mcast_pkt;
294bdcd8170SKalle Valo 	u64 tx_mcast_byte;
295bdcd8170SKalle Valo 	u64 tx_bcast_pkt;
296bdcd8170SKalle Valo 	u64 tx_bcast_byte;
297bdcd8170SKalle Valo 	u64 tx_rts_success_cnt;
298bdcd8170SKalle Valo 	u64 tx_pkt_per_ac[4];
299bdcd8170SKalle Valo 
300bdcd8170SKalle Valo 	u64 tx_err;
301bdcd8170SKalle Valo 	u64 tx_fail_cnt;
302bdcd8170SKalle Valo 	u64 tx_retry_cnt;
303bdcd8170SKalle Valo 	u64 tx_mult_retry_cnt;
304bdcd8170SKalle Valo 	u64 tx_rts_fail_cnt;
305bdcd8170SKalle Valo 
306bdcd8170SKalle Valo 	u64 rx_pkt;
307bdcd8170SKalle Valo 	u64 rx_byte;
308bdcd8170SKalle Valo 	u64 rx_ucast_pkt;
309bdcd8170SKalle Valo 	u64 rx_ucast_byte;
310bdcd8170SKalle Valo 	u64 rx_mcast_pkt;
311bdcd8170SKalle Valo 	u64 rx_mcast_byte;
312bdcd8170SKalle Valo 	u64 rx_bcast_pkt;
313bdcd8170SKalle Valo 	u64 rx_bcast_byte;
314bdcd8170SKalle Valo 	u64 rx_frgment_pkt;
315bdcd8170SKalle Valo 
316bdcd8170SKalle Valo 	u64 rx_err;
317bdcd8170SKalle Valo 	u64 rx_crc_err;
318bdcd8170SKalle Valo 	u64 rx_key_cache_miss;
319bdcd8170SKalle Valo 	u64 rx_decrypt_err;
320bdcd8170SKalle Valo 	u64 rx_dupl_frame;
321bdcd8170SKalle Valo 
322bdcd8170SKalle Valo 	u64 tkip_local_mic_fail;
323bdcd8170SKalle Valo 	u64 tkip_cnter_measures_invoked;
324bdcd8170SKalle Valo 	u64 tkip_replays;
325bdcd8170SKalle Valo 	u64 tkip_fmt_err;
326bdcd8170SKalle Valo 	u64 ccmp_fmt_err;
327bdcd8170SKalle Valo 	u64 ccmp_replays;
328bdcd8170SKalle Valo 
329bdcd8170SKalle Valo 	u64 pwr_save_fail_cnt;
330bdcd8170SKalle Valo 
331bdcd8170SKalle Valo 	u64 cs_bmiss_cnt;
332bdcd8170SKalle Valo 	u64 cs_low_rssi_cnt;
333bdcd8170SKalle Valo 	u64 cs_connect_cnt;
334bdcd8170SKalle Valo 	u64 cs_discon_cnt;
335bdcd8170SKalle Valo 
336bdcd8170SKalle Valo 	s32 tx_ucast_rate;
337bdcd8170SKalle Valo 	s32 rx_ucast_rate;
338bdcd8170SKalle Valo 
339bdcd8170SKalle Valo 	u32 lq_val;
340bdcd8170SKalle Valo 
341bdcd8170SKalle Valo 	u32 wow_pkt_dropped;
342bdcd8170SKalle Valo 	u16 wow_evt_discarded;
343bdcd8170SKalle Valo 
344bdcd8170SKalle Valo 	s16 noise_floor_calib;
345bdcd8170SKalle Valo 	s16 cs_rssi;
346bdcd8170SKalle Valo 	s16 cs_ave_beacon_rssi;
347bdcd8170SKalle Valo 	u8 cs_ave_beacon_snr;
348bdcd8170SKalle Valo 	u8 cs_last_roam_msec;
349bdcd8170SKalle Valo 	u8 cs_snr;
350bdcd8170SKalle Valo 
351bdcd8170SKalle Valo 	u8 wow_host_pkt_wakeups;
352bdcd8170SKalle Valo 	u8 wow_host_evt_wakeups;
353bdcd8170SKalle Valo 
354bdcd8170SKalle Valo 	u32 arp_received;
355bdcd8170SKalle Valo 	u32 arp_matched;
356bdcd8170SKalle Valo 	u32 arp_replied;
357bdcd8170SKalle Valo };
358bdcd8170SKalle Valo 
359bdcd8170SKalle Valo struct ath6kl_mbox_info {
360bdcd8170SKalle Valo 	u32 htc_addr;
361bdcd8170SKalle Valo 	u32 htc_ext_addr;
362bdcd8170SKalle Valo 	u32 htc_ext_sz;
363bdcd8170SKalle Valo 
364bdcd8170SKalle Valo 	u32 block_size;
365bdcd8170SKalle Valo 
366bdcd8170SKalle Valo 	u32 gmbox_addr;
367bdcd8170SKalle Valo 
368bdcd8170SKalle Valo 	u32 gmbox_sz;
369bdcd8170SKalle Valo };
370bdcd8170SKalle Valo 
371bdcd8170SKalle Valo /*
372bdcd8170SKalle Valo  * 802.11i defines an extended IV for use with non-WEP ciphers.
373bdcd8170SKalle Valo  * When the EXTIV bit is set in the key id byte an additional
374bdcd8170SKalle Valo  * 4 bytes immediately follow the IV for TKIP.  For CCMP the
375bdcd8170SKalle Valo  * EXTIV bit is likewise set but the 8 bytes represent the
376bdcd8170SKalle Valo  * CCMP header rather than IV+extended-IV.
377bdcd8170SKalle Valo  */
378bdcd8170SKalle Valo 
379bdcd8170SKalle Valo #define ATH6KL_KEYBUF_SIZE 16
380bdcd8170SKalle Valo #define ATH6KL_MICBUF_SIZE (8+8)	/* space for both tx and rx */
381bdcd8170SKalle Valo 
382bdcd8170SKalle Valo #define ATH6KL_KEY_XMIT  0x01
383bdcd8170SKalle Valo #define ATH6KL_KEY_RECV  0x02
384bdcd8170SKalle Valo #define ATH6KL_KEY_DEFAULT   0x80	/* default xmit key */
385bdcd8170SKalle Valo 
3869a5b1318SJouni Malinen /* Initial group key for AP mode */
387bdcd8170SKalle Valo struct ath6kl_req_key {
3889a5b1318SJouni Malinen 	bool valid;
3899a5b1318SJouni Malinen 	u8 key_index;
3909a5b1318SJouni Malinen 	int key_type;
3919a5b1318SJouni Malinen 	u8 key[WLAN_MAX_KEY_LEN];
3929a5b1318SJouni Malinen 	u8 key_len;
393bdcd8170SKalle Valo };
394bdcd8170SKalle Valo 
39577eab1e9SKalle Valo enum ath6kl_hif_type {
39677eab1e9SKalle Valo 	ATH6KL_HIF_TYPE_SDIO,
39777eab1e9SKalle Valo 	ATH6KL_HIF_TYPE_USB,
39877eab1e9SKalle Valo };
39977eab1e9SKalle Valo 
400334234b5SVasanthakumar Thiagarajan #define MAX_NUM_VIF	1
401334234b5SVasanthakumar Thiagarajan 
40259c98449SVasanthakumar Thiagarajan /* vif flags info */
40359c98449SVasanthakumar Thiagarajan enum ath6kl_vif_state {
40459c98449SVasanthakumar Thiagarajan 	CONNECTED,
40559c98449SVasanthakumar Thiagarajan 	CONNECT_PEND,
40659c98449SVasanthakumar Thiagarajan 	WMM_ENABLED,
40759c98449SVasanthakumar Thiagarajan 	NETQ_STOPPED,
40859c98449SVasanthakumar Thiagarajan 	DTIM_EXPIRED,
40959c98449SVasanthakumar Thiagarajan 	NETDEV_REGISTERED,
41059c98449SVasanthakumar Thiagarajan 	CLEAR_BSSFILTER_ON_BEACON,
41159c98449SVasanthakumar Thiagarajan 	DTIM_PERIOD_AVAIL,
41259c98449SVasanthakumar Thiagarajan 	WLAN_ENABLED,
413b95907a7SVasanthakumar Thiagarajan 	STATS_UPDATE_PEND,
41459c98449SVasanthakumar Thiagarajan };
41559c98449SVasanthakumar Thiagarajan 
416108438bcSVasanthakumar Thiagarajan struct ath6kl_vif {
417990bd915SVasanthakumar Thiagarajan 	struct list_head list;
418108438bcSVasanthakumar Thiagarajan 	struct wireless_dev wdev;
419108438bcSVasanthakumar Thiagarajan 	struct net_device *ndev;
420108438bcSVasanthakumar Thiagarajan 	struct ath6kl *ar;
421478ac027SVasanthakumar Thiagarajan 	/* Lock to protect vif specific net_stats and flags */
422478ac027SVasanthakumar Thiagarajan 	spinlock_t if_lock;
423334234b5SVasanthakumar Thiagarajan 	u8 fw_vif_idx;
42459c98449SVasanthakumar Thiagarajan 	unsigned long flags;
4253450334fSVasanthakumar Thiagarajan 	int ssid_len;
4263450334fSVasanthakumar Thiagarajan 	u8 ssid[IEEE80211_MAX_SSID_LEN];
4273450334fSVasanthakumar Thiagarajan 	u8 dot11_auth_mode;
4283450334fSVasanthakumar Thiagarajan 	u8 auth_mode;
4293450334fSVasanthakumar Thiagarajan 	u8 prwise_crypto;
4303450334fSVasanthakumar Thiagarajan 	u8 prwise_crypto_len;
4313450334fSVasanthakumar Thiagarajan 	u8 grp_crypto;
4323450334fSVasanthakumar Thiagarajan 	u8 grp_crypto_len;
4333450334fSVasanthakumar Thiagarajan 	u8 def_txkey_index;
434f5938f24SVasanthakumar Thiagarajan 	u8 next_mode;
435f5938f24SVasanthakumar Thiagarajan 	u8 nw_type;
4368c8b65e3SVasanthakumar Thiagarajan 	u8 bssid[ETH_ALEN];
4378c8b65e3SVasanthakumar Thiagarajan 	u8 req_bssid[ETH_ALEN];
438f74bac54SVasanthakumar Thiagarajan 	u16 ch_hint;
439f74bac54SVasanthakumar Thiagarajan 	u16 bss_ch;
4406f2a73f9SVasanthakumar Thiagarajan 	struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1];
4416f2a73f9SVasanthakumar Thiagarajan 	struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1];
4422132c69cSVasanthakumar Thiagarajan 	struct aggr_info *aggr_cntxt;
443de3ad713SVasanthakumar Thiagarajan 	struct timer_list disconnect_timer;
44414ee6f6bSVasanthakumar Thiagarajan 	struct cfg80211_scan_request *scan_req;
44514ee6f6bSVasanthakumar Thiagarajan 	enum sme_state sme_state;
446cf5333d7SVasanthakumar Thiagarajan 	int reconnect_flag;
4471052261eSJouni Malinen 	u32 last_roc_id;
4481052261eSJouni Malinen 	u32 last_cancel_roc_id;
449cf5333d7SVasanthakumar Thiagarajan 	u32 send_action_id;
450cf5333d7SVasanthakumar Thiagarajan 	bool probe_req_report;
451cf5333d7SVasanthakumar Thiagarajan 	u16 next_chan;
452cf5333d7SVasanthakumar Thiagarajan 	u16 assoc_bss_beacon_int;
453cf5333d7SVasanthakumar Thiagarajan 	u8 assoc_bss_dtim_period;
454b95907a7SVasanthakumar Thiagarajan 	struct net_device_stats net_stats;
455b95907a7SVasanthakumar Thiagarajan 	struct target_stats target_stats;
456108438bcSVasanthakumar Thiagarajan };
457108438bcSVasanthakumar Thiagarajan 
4586cb3c714SRaja Mani #define WOW_LIST_ID		0
4596cb3c714SRaja Mani #define WOW_HOST_REQ_DELAY	500 /* ms */
4606cb3c714SRaja Mani 
461bdcd8170SKalle Valo /* Flag info */
46259c98449SVasanthakumar Thiagarajan enum ath6kl_dev_state {
46359c98449SVasanthakumar Thiagarajan 	WMI_ENABLED,
46459c98449SVasanthakumar Thiagarajan 	WMI_READY,
46559c98449SVasanthakumar Thiagarajan 	WMI_CTRL_EP_FULL,
46659c98449SVasanthakumar Thiagarajan 	TESTMODE,
46759c98449SVasanthakumar Thiagarajan 	DESTROY_IN_PROGRESS,
46859c98449SVasanthakumar Thiagarajan 	SKIP_SCAN,
46959c98449SVasanthakumar Thiagarajan 	ROAM_TBL_PEND,
4705fe4dffbSKalle Valo 	FIRST_BOOT,
47159c98449SVasanthakumar Thiagarajan };
472bdcd8170SKalle Valo 
47376a9fbe2SKalle Valo enum ath6kl_state {
47476a9fbe2SKalle Valo 	ATH6KL_STATE_OFF,
47576a9fbe2SKalle Valo 	ATH6KL_STATE_ON,
47676a9fbe2SKalle Valo 	ATH6KL_STATE_DEEPSLEEP,
477b4b2a0b1SKalle Valo 	ATH6KL_STATE_CUTPOWER,
478dd6c0c63SRaja Mani 	ATH6KL_STATE_WOW,
47976a9fbe2SKalle Valo };
48076a9fbe2SKalle Valo 
481bdcd8170SKalle Valo struct ath6kl {
482bdcd8170SKalle Valo 	struct device *dev;
483be98e3a4SVasanthakumar Thiagarajan 	struct wiphy *wiphy;
48476a9fbe2SKalle Valo 
48576a9fbe2SKalle Valo 	enum ath6kl_state state;
48676a9fbe2SKalle Valo 
487bdcd8170SKalle Valo 	struct ath6kl_bmi bmi;
488bdcd8170SKalle Valo 	const struct ath6kl_hif_ops *hif_ops;
489bdcd8170SKalle Valo 	struct wmi *wmi;
490bdcd8170SKalle Valo 	int tx_pending[ENDPOINT_MAX];
491bdcd8170SKalle Valo 	int total_tx_data_pend;
492bdcd8170SKalle Valo 	struct htc_target *htc_target;
49377eab1e9SKalle Valo 	enum ath6kl_hif_type hif_type;
494bdcd8170SKalle Valo 	void *hif_priv;
495990bd915SVasanthakumar Thiagarajan 	struct list_head vif_list;
496990bd915SVasanthakumar Thiagarajan 	/* Lock to avoid race in vif_list entries among add/del/traverse */
497990bd915SVasanthakumar Thiagarajan 	spinlock_t list_lock;
49855055976SVasanthakumar Thiagarajan 	u8 num_vif;
4993226f68aSVasanthakumar Thiagarajan 	u8 max_norm_iface;
50055055976SVasanthakumar Thiagarajan 	u8 avail_idx_map;
501bdcd8170SKalle Valo 	spinlock_t lock;
502bdcd8170SKalle Valo 	struct semaphore sem;
503bdcd8170SKalle Valo 	u16 listen_intvl_b;
504bdcd8170SKalle Valo 	u16 listen_intvl_t;
505e5090444SVivek Natarajan 	u8 lrssi_roam_threshold;
506bdcd8170SKalle Valo 	struct ath6kl_version version;
507bdcd8170SKalle Valo 	u32 target_type;
508bdcd8170SKalle Valo 	u8 tx_pwr;
509bdcd8170SKalle Valo 	struct ath6kl_node_mapping node_map[MAX_NODE_NUM];
510bdcd8170SKalle Valo 	u8 ibss_ps_enable;
51155055976SVasanthakumar Thiagarajan 	bool ibss_if_active;
512bdcd8170SKalle Valo 	u8 node_num;
513bdcd8170SKalle Valo 	u8 next_ep_id;
514bdcd8170SKalle Valo 	struct ath6kl_cookie *cookie_list;
515bdcd8170SKalle Valo 	u32 cookie_count;
516bdcd8170SKalle Valo 	enum htc_endpoint_id ac2ep_map[WMM_NUM_AC];
517bdcd8170SKalle Valo 	bool ac_stream_active[WMM_NUM_AC];
518bdcd8170SKalle Valo 	u8 ac_stream_pri_map[WMM_NUM_AC];
519bdcd8170SKalle Valo 	u8 hiac_stream_active_pri;
520bdcd8170SKalle Valo 	u8 ep2ac_map[ENDPOINT_MAX];
521bdcd8170SKalle Valo 	enum htc_endpoint_id ctrl_ep;
5223c370398SKalle Valo 	struct ath6kl_htc_credit_info credit_state_info;
523bdcd8170SKalle Valo 	u32 connect_ctrl_flags;
524bdcd8170SKalle Valo 	u32 user_key_ctrl;
525bdcd8170SKalle Valo 	u8 usr_bss_filter;
526bdcd8170SKalle Valo 	struct ath6kl_sta sta_list[AP_MAX_NUM_STA];
527bdcd8170SKalle Valo 	u8 sta_list_index;
528bdcd8170SKalle Valo 	struct ath6kl_req_key ap_mode_bkey;
529bdcd8170SKalle Valo 	struct sk_buff_head mcastpsq;
530bdcd8170SKalle Valo 	spinlock_t mcastpsq_lock;
531bdcd8170SKalle Valo 	u8 intra_bss;
532bdcd8170SKalle Valo 	struct wmi_ap_mode_stat ap_stats;
533bdcd8170SKalle Valo 	u8 ap_country_code[3];
534bdcd8170SKalle Valo 	struct list_head amsdu_rx_buffer_queue;
535bdcd8170SKalle Valo 	u8 rx_meta_ver;
536bdcd8170SKalle Valo 	enum wlan_low_pwr_state wlan_pwr_state;
537bdcd8170SKalle Valo 	struct wmi_scan_params_cmd sc_params;
538d66ea4f9SVasanthakumar Thiagarajan 	u8 mac_addr[ETH_ALEN];
539bdcd8170SKalle Valo #define AR_MCAST_FILTER_MAC_ADDR_SIZE  4
540003353b0SKalle Valo 	struct {
541003353b0SKalle Valo 		void *rx_report;
542003353b0SKalle Valo 		size_t rx_report_len;
543003353b0SKalle Valo 	} tm;
544003353b0SKalle Valo 
545856f4b31SKalle Valo 	struct ath6kl_hw {
546856f4b31SKalle Valo 		u32 id;
547a01ac414SKalle Valo 		u32 dataset_patch_addr;
548a01ac414SKalle Valo 		u32 app_load_addr;
549a01ac414SKalle Valo 		u32 app_start_override_addr;
550991b27eaSKalle Valo 		u32 board_ext_data_addr;
551991b27eaSKalle Valo 		u32 reserved_ram_size;
5520d4d72bfSKalle Valo 		u32 board_addr;
553a01ac414SKalle Valo 	} hw;
554a01ac414SKalle Valo 
555bdcd8170SKalle Valo 	u16 conf_flags;
556bdcd8170SKalle Valo 	wait_queue_head_t event_wq;
557bdcd8170SKalle Valo 	struct ath6kl_mbox_info mbox_info;
558bdcd8170SKalle Valo 
559bdcd8170SKalle Valo 	struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM];
560bdcd8170SKalle Valo 	unsigned long flag;
561bdcd8170SKalle Valo 
562bdcd8170SKalle Valo 	u8 *fw_board;
563bdcd8170SKalle Valo 	size_t fw_board_len;
564bdcd8170SKalle Valo 
565bdcd8170SKalle Valo 	u8 *fw_otp;
566bdcd8170SKalle Valo 	size_t fw_otp_len;
567bdcd8170SKalle Valo 
568bdcd8170SKalle Valo 	u8 *fw;
569bdcd8170SKalle Valo 	size_t fw_len;
570bdcd8170SKalle Valo 
571bdcd8170SKalle Valo 	u8 *fw_patch;
572bdcd8170SKalle Valo 	size_t fw_patch_len;
573bdcd8170SKalle Valo 
57497e0496dSKalle Valo 	unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN];
57597e0496dSKalle Valo 
576bdcd8170SKalle Valo 	struct workqueue_struct *ath6kl_wq;
5777c3075e9SVasanthakumar Thiagarajan 
578d999ba3eSVasanthakumar Thiagarajan 	struct dentry *debugfs_phy;
5796a7c9badSJouni Malinen 
5806bbc7c35SJouni Malinen 	bool p2p;
5816bbc7c35SJouni Malinen 
582bdf5396bSKalle Valo #ifdef CONFIG_ATH6KL_DEBUG
583bdf5396bSKalle Valo 	struct {
584bdf5396bSKalle Valo 		struct circ_buf fwlog_buf;
585bdf5396bSKalle Valo 		spinlock_t fwlog_lock;
586bdf5396bSKalle Valo 		void *fwlog_tmp;
587939f1cceSKalle Valo 		u32 fwlog_mask;
58891d57de5SVasanthakumar Thiagarajan 		unsigned int dbgfs_diag_reg;
589252c068bSVasanthakumar Thiagarajan 		u32 diag_reg_addr_wr;
590252c068bSVasanthakumar Thiagarajan 		u32 diag_reg_val_wr;
5919a730834SKalle Valo 
5929a730834SKalle Valo 		struct {
5939a730834SKalle Valo 			unsigned int invalid_rate;
5949a730834SKalle Valo 		} war_stats;
5954b28a80dSJouni Malinen 
5964b28a80dSJouni Malinen 		u8 *roam_tbl;
5974b28a80dSJouni Malinen 		unsigned int roam_tbl_len;
598ff0b0075SJouni Malinen 
599ff0b0075SJouni Malinen 		u8 keepalive;
600ff0b0075SJouni Malinen 		u8 disc_timeout;
601bdf5396bSKalle Valo 	} debug;
602bdf5396bSKalle Valo #endif /* CONFIG_ATH6KL_DEBUG */
603bdcd8170SKalle Valo };
604bdcd8170SKalle Valo 
605bdcd8170SKalle Valo static inline void *ath6kl_priv(struct net_device *dev)
606bdcd8170SKalle Valo {
607108438bcSVasanthakumar Thiagarajan 	return ((struct ath6kl_vif *) netdev_priv(dev))->ar;
608bdcd8170SKalle Valo }
609bdcd8170SKalle Valo 
610bc07ddb2SKalle Valo static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
611bc07ddb2SKalle Valo 					  u32 item_offset)
612bc07ddb2SKalle Valo {
613bc07ddb2SKalle Valo 	u32 addr = 0;
614bc07ddb2SKalle Valo 
615bc07ddb2SKalle Valo 	if (ar->target_type == TARGET_TYPE_AR6003)
616bc07ddb2SKalle Valo 		addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
617bc07ddb2SKalle Valo 	else if (ar->target_type == TARGET_TYPE_AR6004)
618bc07ddb2SKalle Valo 		addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
619bc07ddb2SKalle Valo 
620bc07ddb2SKalle Valo 	return addr;
621bc07ddb2SKalle Valo }
622bc07ddb2SKalle Valo 
623bdcd8170SKalle Valo int ath6kl_configure_target(struct ath6kl *ar);
624bdcd8170SKalle Valo void ath6kl_detect_error(unsigned long ptr);
625bdcd8170SKalle Valo void disconnect_timer_handler(unsigned long ptr);
626bdcd8170SKalle Valo void init_netdev(struct net_device *dev);
627bdcd8170SKalle Valo void ath6kl_cookie_init(struct ath6kl *ar);
628bdcd8170SKalle Valo void ath6kl_cookie_cleanup(struct ath6kl *ar);
629bdcd8170SKalle Valo void ath6kl_rx(struct htc_target *target, struct htc_packet *packet);
630bdcd8170SKalle Valo void ath6kl_tx_complete(void *context, struct list_head *packet_queue);
631bdcd8170SKalle Valo enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
632bdcd8170SKalle Valo 					       struct htc_packet *packet);
633bdcd8170SKalle Valo void ath6kl_stop_txrx(struct ath6kl *ar);
634bdcd8170SKalle Valo void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar);
635f9ea0753SVasanthakumar Thiagarajan int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value);
636addb44beSKalle Valo int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length);
637addb44beSKalle Valo int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value);
638addb44beSKalle Valo int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length);
639bc07ddb2SKalle Valo int ath6kl_read_fwlogs(struct ath6kl *ar);
640e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_profile_info(struct ath6kl_vif *vif);
641bdcd8170SKalle Valo void ath6kl_tx_data_cleanup(struct ath6kl *ar);
642bdcd8170SKalle Valo 
643bdcd8170SKalle Valo struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar);
644bdcd8170SKalle Valo void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie);
645bdcd8170SKalle Valo int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev);
646bdcd8170SKalle Valo 
647bdcd8170SKalle Valo struct aggr_info *aggr_init(struct net_device *dev);
648bdcd8170SKalle Valo void ath6kl_rx_refill(struct htc_target *target,
649bdcd8170SKalle Valo 		      enum htc_endpoint_id endpoint);
650bdcd8170SKalle Valo void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count);
651bdcd8170SKalle Valo struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
652bdcd8170SKalle Valo 					    enum htc_endpoint_id endpoint,
653bdcd8170SKalle Valo 					    int len);
654bdcd8170SKalle Valo void aggr_module_destroy(struct aggr_info *aggr_info);
655bdcd8170SKalle Valo void aggr_reset_state(struct aggr_info *aggr_info);
656bdcd8170SKalle Valo 
6576765d0aaSVasanthakumar Thiagarajan struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 * node_addr);
658bdcd8170SKalle Valo struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid);
659bdcd8170SKalle Valo 
660bdcd8170SKalle Valo void ath6kl_ready_event(void *devt, u8 * datap, u32 sw_ver, u32 abi_ver);
661bdcd8170SKalle Valo int ath6kl_control_tx(void *devt, struct sk_buff *skb,
662bdcd8170SKalle Valo 		      enum htc_endpoint_id eid);
663240d2799SVasanthakumar Thiagarajan void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel,
664bdcd8170SKalle Valo 			  u8 *bssid, u16 listen_int,
665bdcd8170SKalle Valo 			  u16 beacon_int, enum network_type net_type,
666bdcd8170SKalle Valo 			  u8 beacon_ie_len, u8 assoc_req_len,
667bdcd8170SKalle Valo 			  u8 assoc_resp_len, u8 *assoc_info);
668240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel);
669240d2799SVasanthakumar Thiagarajan void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr,
670572e27c0SJouni Malinen 				u8 keymgmt, u8 ucipher, u8 auth,
671572e27c0SJouni Malinen 				u8 assoc_req_len, u8 *assoc_info);
672240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason,
673bdcd8170SKalle Valo 			     u8 *bssid, u8 assoc_resp_len,
674bdcd8170SKalle Valo 			     u8 *assoc_info, u16 prot_reason_status);
675240d2799SVasanthakumar Thiagarajan void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast);
676bdcd8170SKalle Valo void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr);
677240d2799SVasanthakumar Thiagarajan void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status);
678240d2799SVasanthakumar Thiagarajan void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len);
679bdcd8170SKalle Valo void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active);
680bdcd8170SKalle Valo enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac);
681bdcd8170SKalle Valo 
682240d2799SVasanthakumar Thiagarajan void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid);
683bdcd8170SKalle Valo 
684240d2799SVasanthakumar Thiagarajan void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif);
685240d2799SVasanthakumar Thiagarajan void ath6kl_disconnect(struct ath6kl_vif *vif);
686240d2799SVasanthakumar Thiagarajan void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid);
687240d2799SVasanthakumar Thiagarajan void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no,
688bdcd8170SKalle Valo 			     u8 win_sz);
689bdcd8170SKalle Valo void ath6kl_wakeup_event(void *dev);
690bdcd8170SKalle Valo 
6916db8fa53SVasanthakumar Thiagarajan void ath6kl_reset_device(struct ath6kl *ar, u32 target_type,
6926db8fa53SVasanthakumar Thiagarajan 			 bool wait_fot_compltn, bool cold_reset);
693e29f25f5SVasanthakumar Thiagarajan void ath6kl_init_control_info(struct ath6kl_vif *vif);
694108438bcSVasanthakumar Thiagarajan void ath6kl_deinit_if_data(struct ath6kl_vif *vif);
6958dafb70eSVasanthakumar Thiagarajan void ath6kl_core_free(struct ath6kl *ar);
696990bd915SVasanthakumar Thiagarajan struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar);
69755055976SVasanthakumar Thiagarajan void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready);
6985fe4dffbSKalle Valo int ath6kl_init_hw_start(struct ath6kl *ar);
6995fe4dffbSKalle Valo int ath6kl_init_hw_stop(struct ath6kl *ar);
700a918fb3cSRaja Mani void ath6kl_check_wow_status(struct ath6kl *ar);
7015fe4dffbSKalle Valo 
702bdcd8170SKalle Valo #endif /* CORE_H */
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