145eaa78fSKalle Valo /* 245eaa78fSKalle Valo * Copyright (c) 2004-2011 Atheros Communications Inc. 31b2df407SVasanthakumar Thiagarajan * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. 445eaa78fSKalle Valo * 545eaa78fSKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 645eaa78fSKalle Valo * purpose with or without fee is hereby granted, provided that the above 745eaa78fSKalle Valo * copyright notice and this permission notice appear in all copies. 845eaa78fSKalle Valo * 945eaa78fSKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 1045eaa78fSKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 1145eaa78fSKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 1245eaa78fSKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 1345eaa78fSKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 1445eaa78fSKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 1545eaa78fSKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 1645eaa78fSKalle Valo */ 1745eaa78fSKalle Valo 1845eaa78fSKalle Valo #include "core.h" 1945eaa78fSKalle Valo 20d6a434d6SKalle Valo #include <linux/module.h> 2145eaa78fSKalle Valo #include <linux/moduleparam.h> 22d6a434d6SKalle Valo #include <linux/export.h> 2345eaa78fSKalle Valo 2445eaa78fSKalle Valo #include "debug.h" 2545eaa78fSKalle Valo #include "hif-ops.h" 2645eaa78fSKalle Valo #include "cfg80211.h" 2745eaa78fSKalle Valo 2845eaa78fSKalle Valo unsigned int debug_mask; 29e390af77SRaja Mani static unsigned int suspend_mode; 3045eaa78fSKalle Valo static unsigned int uart_debug; 3145eaa78fSKalle Valo static unsigned int ath6kl_p2p; 325f1127ffSKalle Valo static unsigned int testmode; 3345eaa78fSKalle Valo 3445eaa78fSKalle Valo module_param(debug_mask, uint, 0644); 35e390af77SRaja Mani module_param(suspend_mode, uint, 0644); 3645eaa78fSKalle Valo module_param(uart_debug, uint, 0644); 3745eaa78fSKalle Valo module_param(ath6kl_p2p, uint, 0644); 385f1127ffSKalle Valo module_param(testmode, uint, 0644); 3945eaa78fSKalle Valo 4045eaa78fSKalle Valo int ath6kl_core_init(struct ath6kl *ar) 4145eaa78fSKalle Valo { 4245eaa78fSKalle Valo struct ath6kl_bmi_target_info targ_info; 4345eaa78fSKalle Valo struct net_device *ndev; 4445eaa78fSKalle Valo int ret = 0, i; 4545eaa78fSKalle Valo 4645eaa78fSKalle Valo ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); 4745eaa78fSKalle Valo if (!ar->ath6kl_wq) 4845eaa78fSKalle Valo return -ENOMEM; 4945eaa78fSKalle Valo 5045eaa78fSKalle Valo ret = ath6kl_bmi_init(ar); 5145eaa78fSKalle Valo if (ret) 5245eaa78fSKalle Valo goto err_wq; 5345eaa78fSKalle Valo 5445eaa78fSKalle Valo /* 5545eaa78fSKalle Valo * Turn on power to get hardware (target) version and leave power 5645eaa78fSKalle Valo * on delibrately as we will boot the hardware anyway within few 5745eaa78fSKalle Valo * seconds. 5845eaa78fSKalle Valo */ 5945eaa78fSKalle Valo ret = ath6kl_hif_power_on(ar); 6045eaa78fSKalle Valo if (ret) 6145eaa78fSKalle Valo goto err_bmi_cleanup; 6245eaa78fSKalle Valo 6345eaa78fSKalle Valo ret = ath6kl_bmi_get_target_info(ar, &targ_info); 6445eaa78fSKalle Valo if (ret) 6545eaa78fSKalle Valo goto err_power_off; 6645eaa78fSKalle Valo 6745eaa78fSKalle Valo ar->version.target_ver = le32_to_cpu(targ_info.version); 6845eaa78fSKalle Valo ar->target_type = le32_to_cpu(targ_info.type); 6945eaa78fSKalle Valo ar->wiphy->hw_version = le32_to_cpu(targ_info.version); 7045eaa78fSKalle Valo 7145eaa78fSKalle Valo ret = ath6kl_init_hw_params(ar); 7245eaa78fSKalle Valo if (ret) 7345eaa78fSKalle Valo goto err_power_off; 7445eaa78fSKalle Valo 7545eaa78fSKalle Valo ar->htc_target = ath6kl_htc_create(ar); 7645eaa78fSKalle Valo 7745eaa78fSKalle Valo if (!ar->htc_target) { 7845eaa78fSKalle Valo ret = -ENOMEM; 7945eaa78fSKalle Valo goto err_power_off; 8045eaa78fSKalle Valo } 8145eaa78fSKalle Valo 825f1127ffSKalle Valo ar->testmode = testmode; 835f1127ffSKalle Valo 8445eaa78fSKalle Valo ret = ath6kl_init_fetch_firmwares(ar); 8545eaa78fSKalle Valo if (ret) 8645eaa78fSKalle Valo goto err_htc_cleanup; 8745eaa78fSKalle Valo 8845eaa78fSKalle Valo /* FIXME: we should free all firmwares in the error cases below */ 8945eaa78fSKalle Valo 9045eaa78fSKalle Valo /* Indicate that WMI is enabled (although not ready yet) */ 9145eaa78fSKalle Valo set_bit(WMI_ENABLED, &ar->flag); 9245eaa78fSKalle Valo ar->wmi = ath6kl_wmi_init(ar); 9345eaa78fSKalle Valo if (!ar->wmi) { 9445eaa78fSKalle Valo ath6kl_err("failed to initialize wmi\n"); 9545eaa78fSKalle Valo ret = -EIO; 9645eaa78fSKalle Valo goto err_htc_cleanup; 9745eaa78fSKalle Valo } 9845eaa78fSKalle Valo 9945eaa78fSKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); 10045eaa78fSKalle Valo 10145eaa78fSKalle Valo /* setup access class priority mappings */ 10245eaa78fSKalle Valo ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ 10345eaa78fSKalle Valo ar->ac_stream_pri_map[WMM_AC_BE] = 1; 10445eaa78fSKalle Valo ar->ac_stream_pri_map[WMM_AC_VI] = 2; 10545eaa78fSKalle Valo ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ 10645eaa78fSKalle Valo 10745eaa78fSKalle Valo /* allocate some buffers that handle larger AMSDU frames */ 10845eaa78fSKalle Valo ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); 10945eaa78fSKalle Valo 11045eaa78fSKalle Valo ath6kl_cookie_init(ar); 11145eaa78fSKalle Valo 11245eaa78fSKalle Valo ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | 11345eaa78fSKalle Valo ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; 11445eaa78fSKalle Valo 115e390af77SRaja Mani if (suspend_mode && 116e390af77SRaja Mani suspend_mode >= WLAN_POWER_STATE_CUT_PWR && 117e390af77SRaja Mani suspend_mode <= WLAN_POWER_STATE_WOW) 118e390af77SRaja Mani ar->suspend_mode = suspend_mode; 119e390af77SRaja Mani else 120e390af77SRaja Mani ar->suspend_mode = 0; 12145eaa78fSKalle Valo 12245eaa78fSKalle Valo if (uart_debug) 12345eaa78fSKalle Valo ar->conf_flags |= ATH6KL_CONF_UART_DEBUG; 12445eaa78fSKalle Valo 12545eaa78fSKalle Valo set_bit(FIRST_BOOT, &ar->flag); 12645eaa78fSKalle Valo 12745eaa78fSKalle Valo ret = ath6kl_init_hw_start(ar); 12845eaa78fSKalle Valo if (ret) { 12945eaa78fSKalle Valo ath6kl_err("Failed to start hardware: %d\n", ret); 13045eaa78fSKalle Valo goto err_rxbuf_cleanup; 13145eaa78fSKalle Valo } 13245eaa78fSKalle Valo 133bd5b5ac2SVasanthakumar Thiagarajan /* give our connected endpoints some buffers */ 134bd5b5ac2SVasanthakumar Thiagarajan ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); 135bd5b5ac2SVasanthakumar Thiagarajan ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); 136bd5b5ac2SVasanthakumar Thiagarajan 137b796f093SVasanthakumar Thiagarajan ret = ath6kl_cfg80211_init(ar); 138b796f093SVasanthakumar Thiagarajan if (ret) 139b796f093SVasanthakumar Thiagarajan goto err_rxbuf_cleanup; 140b796f093SVasanthakumar Thiagarajan 141b796f093SVasanthakumar Thiagarajan ret = ath6kl_debug_init(ar); 142b796f093SVasanthakumar Thiagarajan if (ret) { 143b796f093SVasanthakumar Thiagarajan wiphy_unregister(ar->wiphy); 144b796f093SVasanthakumar Thiagarajan goto err_rxbuf_cleanup; 145b796f093SVasanthakumar Thiagarajan } 146b796f093SVasanthakumar Thiagarajan 147b796f093SVasanthakumar Thiagarajan for (i = 0; i < ar->vif_max; i++) 148b796f093SVasanthakumar Thiagarajan ar->avail_idx_map |= BIT(i); 149b796f093SVasanthakumar Thiagarajan 150b796f093SVasanthakumar Thiagarajan rtnl_lock(); 151b796f093SVasanthakumar Thiagarajan 152b796f093SVasanthakumar Thiagarajan /* Add an initial station interface */ 153b796f093SVasanthakumar Thiagarajan ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0, 154b796f093SVasanthakumar Thiagarajan INFRA_NETWORK); 155b796f093SVasanthakumar Thiagarajan 156b796f093SVasanthakumar Thiagarajan rtnl_unlock(); 157b796f093SVasanthakumar Thiagarajan 158b796f093SVasanthakumar Thiagarajan if (!ndev) { 159b796f093SVasanthakumar Thiagarajan ath6kl_err("Failed to instantiate a network device\n"); 160b796f093SVasanthakumar Thiagarajan ret = -ENOMEM; 161b796f093SVasanthakumar Thiagarajan wiphy_unregister(ar->wiphy); 162b796f093SVasanthakumar Thiagarajan goto err_debug_init; 163b796f093SVasanthakumar Thiagarajan } 164b796f093SVasanthakumar Thiagarajan 165b796f093SVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", 166b796f093SVasanthakumar Thiagarajan __func__, ndev->name, ndev, ar); 16745eaa78fSKalle Valo 16845eaa78fSKalle Valo return ret; 16945eaa78fSKalle Valo 170b796f093SVasanthakumar Thiagarajan err_debug_init: 171b796f093SVasanthakumar Thiagarajan ath6kl_debug_cleanup(ar); 17245eaa78fSKalle Valo err_rxbuf_cleanup: 17345eaa78fSKalle Valo ath6kl_htc_flush_rx_buf(ar->htc_target); 17445eaa78fSKalle Valo ath6kl_cleanup_amsdu_rxbufs(ar); 17545eaa78fSKalle Valo ath6kl_wmi_shutdown(ar->wmi); 17645eaa78fSKalle Valo clear_bit(WMI_ENABLED, &ar->flag); 17745eaa78fSKalle Valo ar->wmi = NULL; 17845eaa78fSKalle Valo err_htc_cleanup: 17945eaa78fSKalle Valo ath6kl_htc_cleanup(ar->htc_target); 18045eaa78fSKalle Valo err_power_off: 18145eaa78fSKalle Valo ath6kl_hif_power_off(ar); 18245eaa78fSKalle Valo err_bmi_cleanup: 18345eaa78fSKalle Valo ath6kl_bmi_cleanup(ar); 18445eaa78fSKalle Valo err_wq: 18545eaa78fSKalle Valo destroy_workqueue(ar->ath6kl_wq); 18645eaa78fSKalle Valo 18745eaa78fSKalle Valo return ret; 18845eaa78fSKalle Valo } 189d6a434d6SKalle Valo EXPORT_SYMBOL(ath6kl_core_init); 19045eaa78fSKalle Valo 19145eaa78fSKalle Valo struct ath6kl *ath6kl_core_create(struct device *dev) 19245eaa78fSKalle Valo { 19345eaa78fSKalle Valo struct ath6kl *ar; 19445eaa78fSKalle Valo u8 ctr; 19545eaa78fSKalle Valo 19645eaa78fSKalle Valo ar = ath6kl_cfg80211_create(); 19745eaa78fSKalle Valo if (!ar) 19845eaa78fSKalle Valo return NULL; 19945eaa78fSKalle Valo 20045eaa78fSKalle Valo ar->p2p = !!ath6kl_p2p; 20145eaa78fSKalle Valo ar->dev = dev; 20245eaa78fSKalle Valo 20345eaa78fSKalle Valo ar->vif_max = 1; 20445eaa78fSKalle Valo 20545eaa78fSKalle Valo ar->max_norm_iface = 1; 20645eaa78fSKalle Valo 20745eaa78fSKalle Valo spin_lock_init(&ar->lock); 20845eaa78fSKalle Valo spin_lock_init(&ar->mcastpsq_lock); 20945eaa78fSKalle Valo spin_lock_init(&ar->list_lock); 21045eaa78fSKalle Valo 21145eaa78fSKalle Valo init_waitqueue_head(&ar->event_wq); 21245eaa78fSKalle Valo sema_init(&ar->sem, 1); 21345eaa78fSKalle Valo 21445eaa78fSKalle Valo INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue); 21545eaa78fSKalle Valo INIT_LIST_HEAD(&ar->vif_list); 21645eaa78fSKalle Valo 21745eaa78fSKalle Valo clear_bit(WMI_ENABLED, &ar->flag); 21845eaa78fSKalle Valo clear_bit(SKIP_SCAN, &ar->flag); 21945eaa78fSKalle Valo clear_bit(DESTROY_IN_PROGRESS, &ar->flag); 22045eaa78fSKalle Valo 22145eaa78fSKalle Valo ar->listen_intvl_b = A_DEFAULT_LISTEN_INTERVAL; 22245eaa78fSKalle Valo ar->tx_pwr = 0; 22345eaa78fSKalle Valo 22445eaa78fSKalle Valo ar->intra_bss = 1; 22545eaa78fSKalle Valo ar->lrssi_roam_threshold = DEF_LRSSI_ROAM_THRESHOLD; 22645eaa78fSKalle Valo 22745eaa78fSKalle Valo ar->state = ATH6KL_STATE_OFF; 22845eaa78fSKalle Valo 22945eaa78fSKalle Valo memset((u8 *)ar->sta_list, 0, 23045eaa78fSKalle Valo AP_MAX_NUM_STA * sizeof(struct ath6kl_sta)); 23145eaa78fSKalle Valo 23245eaa78fSKalle Valo /* Init the PS queues */ 23345eaa78fSKalle Valo for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) { 23445eaa78fSKalle Valo spin_lock_init(&ar->sta_list[ctr].psq_lock); 23545eaa78fSKalle Valo skb_queue_head_init(&ar->sta_list[ctr].psq); 23645eaa78fSKalle Valo skb_queue_head_init(&ar->sta_list[ctr].apsdq); 237d0ff7383SNaveen Gangadharan ar->sta_list[ctr].mgmt_psq_len = 0; 238d0ff7383SNaveen Gangadharan INIT_LIST_HEAD(&ar->sta_list[ctr].mgmt_psq); 2391d2a4456SVasanthakumar Thiagarajan ar->sta_list[ctr].aggr_conn = 2401d2a4456SVasanthakumar Thiagarajan kzalloc(sizeof(struct aggr_info_conn), GFP_KERNEL); 2411d2a4456SVasanthakumar Thiagarajan if (!ar->sta_list[ctr].aggr_conn) { 2421d2a4456SVasanthakumar Thiagarajan ath6kl_err("Failed to allocate memory for sta aggregation information\n"); 2431d2a4456SVasanthakumar Thiagarajan ath6kl_core_destroy(ar); 2441d2a4456SVasanthakumar Thiagarajan return NULL; 2451d2a4456SVasanthakumar Thiagarajan } 24645eaa78fSKalle Valo } 24745eaa78fSKalle Valo 24845eaa78fSKalle Valo skb_queue_head_init(&ar->mcastpsq); 24945eaa78fSKalle Valo 25045eaa78fSKalle Valo memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3); 25145eaa78fSKalle Valo 25245eaa78fSKalle Valo return ar; 25345eaa78fSKalle Valo } 254d6a434d6SKalle Valo EXPORT_SYMBOL(ath6kl_core_create); 25545eaa78fSKalle Valo 25645eaa78fSKalle Valo void ath6kl_core_cleanup(struct ath6kl *ar) 25745eaa78fSKalle Valo { 25845eaa78fSKalle Valo ath6kl_hif_power_off(ar); 25945eaa78fSKalle Valo 26045eaa78fSKalle Valo destroy_workqueue(ar->ath6kl_wq); 26145eaa78fSKalle Valo 26245eaa78fSKalle Valo if (ar->htc_target) 26345eaa78fSKalle Valo ath6kl_htc_cleanup(ar->htc_target); 26445eaa78fSKalle Valo 26545eaa78fSKalle Valo ath6kl_cookie_cleanup(ar); 26645eaa78fSKalle Valo 26745eaa78fSKalle Valo ath6kl_cleanup_amsdu_rxbufs(ar); 26845eaa78fSKalle Valo 26945eaa78fSKalle Valo ath6kl_bmi_cleanup(ar); 27045eaa78fSKalle Valo 27145eaa78fSKalle Valo ath6kl_debug_cleanup(ar); 27245eaa78fSKalle Valo 27345eaa78fSKalle Valo kfree(ar->fw_board); 27445eaa78fSKalle Valo kfree(ar->fw_otp); 27545eaa78fSKalle Valo kfree(ar->fw); 27645eaa78fSKalle Valo kfree(ar->fw_patch); 27745eaa78fSKalle Valo kfree(ar->fw_testscript); 27845eaa78fSKalle Valo 27945eaa78fSKalle Valo ath6kl_cfg80211_cleanup(ar); 28045eaa78fSKalle Valo } 281d6a434d6SKalle Valo EXPORT_SYMBOL(ath6kl_core_cleanup); 28245eaa78fSKalle Valo 28345eaa78fSKalle Valo void ath6kl_core_destroy(struct ath6kl *ar) 28445eaa78fSKalle Valo { 28545eaa78fSKalle Valo ath6kl_cfg80211_destroy(ar); 28645eaa78fSKalle Valo } 287d6a434d6SKalle Valo EXPORT_SYMBOL(ath6kl_core_destroy); 28845eaa78fSKalle Valo 289d6a434d6SKalle Valo MODULE_AUTHOR("Qualcomm Atheros"); 290d6a434d6SKalle Valo MODULE_DESCRIPTION("Core module for AR600x SDIO and USB devices."); 291d6a434d6SKalle Valo MODULE_LICENSE("Dual BSD/GPL"); 292