145eaa78fSKalle Valo /* 245eaa78fSKalle Valo * Copyright (c) 2004-2011 Atheros Communications Inc. 31b2df407SVasanthakumar Thiagarajan * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. 445eaa78fSKalle Valo * 545eaa78fSKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 645eaa78fSKalle Valo * purpose with or without fee is hereby granted, provided that the above 745eaa78fSKalle Valo * copyright notice and this permission notice appear in all copies. 845eaa78fSKalle Valo * 945eaa78fSKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 1045eaa78fSKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 1145eaa78fSKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 1245eaa78fSKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 1345eaa78fSKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 1445eaa78fSKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 1545eaa78fSKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 1645eaa78fSKalle Valo */ 1745eaa78fSKalle Valo 1845eaa78fSKalle Valo #include "core.h" 1945eaa78fSKalle Valo 20d6a434d6SKalle Valo #include <linux/module.h> 2145eaa78fSKalle Valo #include <linux/moduleparam.h> 22d6a434d6SKalle Valo #include <linux/export.h> 238437754cSVivek Natarajan #include <linux/vmalloc.h> 2445eaa78fSKalle Valo 2545eaa78fSKalle Valo #include "debug.h" 2645eaa78fSKalle Valo #include "hif-ops.h" 27e76ac2bfSKalle Valo #include "htc-ops.h" 2845eaa78fSKalle Valo #include "cfg80211.h" 2945eaa78fSKalle Valo 3045eaa78fSKalle Valo unsigned int debug_mask; 31e390af77SRaja Mani static unsigned int suspend_mode; 321e9a905dSRaja Mani static unsigned int wow_mode; 3345eaa78fSKalle Valo static unsigned int uart_debug; 3445eaa78fSKalle Valo static unsigned int ath6kl_p2p; 355f1127ffSKalle Valo static unsigned int testmode; 3645eaa78fSKalle Valo 3745eaa78fSKalle Valo module_param(debug_mask, uint, 0644); 38e390af77SRaja Mani module_param(suspend_mode, uint, 0644); 391e9a905dSRaja Mani module_param(wow_mode, uint, 0644); 4045eaa78fSKalle Valo module_param(uart_debug, uint, 0644); 4145eaa78fSKalle Valo module_param(ath6kl_p2p, uint, 0644); 425f1127ffSKalle Valo module_param(testmode, uint, 0644); 4345eaa78fSKalle Valo 44636f8288SKalle Valo void ath6kl_core_tx_complete(struct ath6kl *ar, struct sk_buff *skb) 45636f8288SKalle Valo { 46636f8288SKalle Valo ath6kl_htc_tx_complete(ar, skb); 47636f8288SKalle Valo } 48636f8288SKalle Valo EXPORT_SYMBOL(ath6kl_core_tx_complete); 49636f8288SKalle Valo 50636f8288SKalle Valo void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe) 51636f8288SKalle Valo { 52636f8288SKalle Valo ath6kl_htc_rx_complete(ar, skb, pipe); 53636f8288SKalle Valo } 54636f8288SKalle Valo EXPORT_SYMBOL(ath6kl_core_rx_complete); 55636f8288SKalle Valo 56e76ac2bfSKalle Valo int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type) 5745eaa78fSKalle Valo { 5845eaa78fSKalle Valo struct ath6kl_bmi_target_info targ_info; 5984efbb84SJohannes Berg struct wireless_dev *wdev; 6045eaa78fSKalle Valo int ret = 0, i; 6145eaa78fSKalle Valo 62e76ac2bfSKalle Valo switch (htc_type) { 63e76ac2bfSKalle Valo case ATH6KL_HTC_TYPE_MBOX: 64e76ac2bfSKalle Valo ath6kl_htc_mbox_attach(ar); 65e76ac2bfSKalle Valo break; 66636f8288SKalle Valo case ATH6KL_HTC_TYPE_PIPE: 67636f8288SKalle Valo ath6kl_htc_pipe_attach(ar); 68636f8288SKalle Valo break; 69e76ac2bfSKalle Valo default: 70e76ac2bfSKalle Valo WARN_ON(1); 71e76ac2bfSKalle Valo return -ENOMEM; 72e76ac2bfSKalle Valo } 73e76ac2bfSKalle Valo 7445eaa78fSKalle Valo ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); 7545eaa78fSKalle Valo if (!ar->ath6kl_wq) 7645eaa78fSKalle Valo return -ENOMEM; 7745eaa78fSKalle Valo 7845eaa78fSKalle Valo ret = ath6kl_bmi_init(ar); 7945eaa78fSKalle Valo if (ret) 8045eaa78fSKalle Valo goto err_wq; 8145eaa78fSKalle Valo 8245eaa78fSKalle Valo /* 8345eaa78fSKalle Valo * Turn on power to get hardware (target) version and leave power 8445eaa78fSKalle Valo * on delibrately as we will boot the hardware anyway within few 8545eaa78fSKalle Valo * seconds. 8645eaa78fSKalle Valo */ 8745eaa78fSKalle Valo ret = ath6kl_hif_power_on(ar); 8845eaa78fSKalle Valo if (ret) 8945eaa78fSKalle Valo goto err_bmi_cleanup; 9045eaa78fSKalle Valo 9145eaa78fSKalle Valo ret = ath6kl_bmi_get_target_info(ar, &targ_info); 9245eaa78fSKalle Valo if (ret) 9345eaa78fSKalle Valo goto err_power_off; 9445eaa78fSKalle Valo 9545eaa78fSKalle Valo ar->version.target_ver = le32_to_cpu(targ_info.version); 9645eaa78fSKalle Valo ar->target_type = le32_to_cpu(targ_info.type); 9745eaa78fSKalle Valo ar->wiphy->hw_version = le32_to_cpu(targ_info.version); 9845eaa78fSKalle Valo 9945eaa78fSKalle Valo ret = ath6kl_init_hw_params(ar); 10045eaa78fSKalle Valo if (ret) 10145eaa78fSKalle Valo goto err_power_off; 10245eaa78fSKalle Valo 10345eaa78fSKalle Valo ar->htc_target = ath6kl_htc_create(ar); 10445eaa78fSKalle Valo 10545eaa78fSKalle Valo if (!ar->htc_target) { 10645eaa78fSKalle Valo ret = -ENOMEM; 10745eaa78fSKalle Valo goto err_power_off; 10845eaa78fSKalle Valo } 10945eaa78fSKalle Valo 1105f1127ffSKalle Valo ar->testmode = testmode; 1115f1127ffSKalle Valo 11245eaa78fSKalle Valo ret = ath6kl_init_fetch_firmwares(ar); 11345eaa78fSKalle Valo if (ret) 11445eaa78fSKalle Valo goto err_htc_cleanup; 11545eaa78fSKalle Valo 11645eaa78fSKalle Valo /* FIXME: we should free all firmwares in the error cases below */ 11745eaa78fSKalle Valo 11845eaa78fSKalle Valo /* Indicate that WMI is enabled (although not ready yet) */ 11945eaa78fSKalle Valo set_bit(WMI_ENABLED, &ar->flag); 12045eaa78fSKalle Valo ar->wmi = ath6kl_wmi_init(ar); 12145eaa78fSKalle Valo if (!ar->wmi) { 12245eaa78fSKalle Valo ath6kl_err("failed to initialize wmi\n"); 12345eaa78fSKalle Valo ret = -EIO; 12445eaa78fSKalle Valo goto err_htc_cleanup; 12545eaa78fSKalle Valo } 12645eaa78fSKalle Valo 12745eaa78fSKalle Valo ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); 12845eaa78fSKalle Valo 12945eaa78fSKalle Valo /* setup access class priority mappings */ 13045eaa78fSKalle Valo ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ 13145eaa78fSKalle Valo ar->ac_stream_pri_map[WMM_AC_BE] = 1; 13245eaa78fSKalle Valo ar->ac_stream_pri_map[WMM_AC_VI] = 2; 13345eaa78fSKalle Valo ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ 13445eaa78fSKalle Valo 13545eaa78fSKalle Valo /* allocate some buffers that handle larger AMSDU frames */ 13645eaa78fSKalle Valo ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); 13745eaa78fSKalle Valo 13845eaa78fSKalle Valo ath6kl_cookie_init(ar); 13945eaa78fSKalle Valo 14045eaa78fSKalle Valo ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | 14145eaa78fSKalle Valo ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; 14245eaa78fSKalle Valo 143e390af77SRaja Mani if (suspend_mode && 144e390af77SRaja Mani suspend_mode >= WLAN_POWER_STATE_CUT_PWR && 145e390af77SRaja Mani suspend_mode <= WLAN_POWER_STATE_WOW) 146e390af77SRaja Mani ar->suspend_mode = suspend_mode; 147e390af77SRaja Mani else 148e390af77SRaja Mani ar->suspend_mode = 0; 14945eaa78fSKalle Valo 1501e9a905dSRaja Mani if (suspend_mode == WLAN_POWER_STATE_WOW && 1511e9a905dSRaja Mani (wow_mode == WLAN_POWER_STATE_CUT_PWR || 1521e9a905dSRaja Mani wow_mode == WLAN_POWER_STATE_DEEP_SLEEP)) 1531e9a905dSRaja Mani ar->wow_suspend_mode = wow_mode; 1541e9a905dSRaja Mani else 1551e9a905dSRaja Mani ar->wow_suspend_mode = 0; 1561e9a905dSRaja Mani 15745eaa78fSKalle Valo if (uart_debug) 15845eaa78fSKalle Valo ar->conf_flags |= ATH6KL_CONF_UART_DEBUG; 15945eaa78fSKalle Valo 16045eaa78fSKalle Valo set_bit(FIRST_BOOT, &ar->flag); 16145eaa78fSKalle Valo 162068a4633SVasanthakumar Thiagarajan ath6kl_debug_init(ar); 163068a4633SVasanthakumar Thiagarajan 16445eaa78fSKalle Valo ret = ath6kl_init_hw_start(ar); 16545eaa78fSKalle Valo if (ret) { 16645eaa78fSKalle Valo ath6kl_err("Failed to start hardware: %d\n", ret); 16745eaa78fSKalle Valo goto err_rxbuf_cleanup; 16845eaa78fSKalle Valo } 16945eaa78fSKalle Valo 170bd5b5ac2SVasanthakumar Thiagarajan /* give our connected endpoints some buffers */ 171bd5b5ac2SVasanthakumar Thiagarajan ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); 172bd5b5ac2SVasanthakumar Thiagarajan ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); 173bd5b5ac2SVasanthakumar Thiagarajan 174b796f093SVasanthakumar Thiagarajan ret = ath6kl_cfg80211_init(ar); 175b796f093SVasanthakumar Thiagarajan if (ret) 176b796f093SVasanthakumar Thiagarajan goto err_rxbuf_cleanup; 177b796f093SVasanthakumar Thiagarajan 178068a4633SVasanthakumar Thiagarajan ret = ath6kl_debug_init_fs(ar); 179b796f093SVasanthakumar Thiagarajan if (ret) { 180b796f093SVasanthakumar Thiagarajan wiphy_unregister(ar->wiphy); 181b796f093SVasanthakumar Thiagarajan goto err_rxbuf_cleanup; 182b796f093SVasanthakumar Thiagarajan } 183b796f093SVasanthakumar Thiagarajan 184b796f093SVasanthakumar Thiagarajan for (i = 0; i < ar->vif_max; i++) 185b796f093SVasanthakumar Thiagarajan ar->avail_idx_map |= BIT(i); 186b796f093SVasanthakumar Thiagarajan 187b796f093SVasanthakumar Thiagarajan rtnl_lock(); 188b796f093SVasanthakumar Thiagarajan 189b796f093SVasanthakumar Thiagarajan /* Add an initial station interface */ 19084efbb84SJohannes Berg wdev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0, 191b796f093SVasanthakumar Thiagarajan INFRA_NETWORK); 192b796f093SVasanthakumar Thiagarajan 193b796f093SVasanthakumar Thiagarajan rtnl_unlock(); 194b796f093SVasanthakumar Thiagarajan 19584efbb84SJohannes Berg if (!wdev) { 196b796f093SVasanthakumar Thiagarajan ath6kl_err("Failed to instantiate a network device\n"); 197b796f093SVasanthakumar Thiagarajan ret = -ENOMEM; 198b796f093SVasanthakumar Thiagarajan wiphy_unregister(ar->wiphy); 199068a4633SVasanthakumar Thiagarajan goto err_rxbuf_cleanup; 200b796f093SVasanthakumar Thiagarajan } 201b796f093SVasanthakumar Thiagarajan 202b796f093SVasanthakumar Thiagarajan ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", 20384efbb84SJohannes Berg __func__, wdev->netdev->name, wdev->netdev, ar); 20445eaa78fSKalle Valo 20584caf800SVasanthakumar Thiagarajan ath6kl_recovery_init(ar); 20684caf800SVasanthakumar Thiagarajan 20745eaa78fSKalle Valo return ret; 20845eaa78fSKalle Valo 20945eaa78fSKalle Valo err_rxbuf_cleanup: 210068a4633SVasanthakumar Thiagarajan ath6kl_debug_cleanup(ar); 21145eaa78fSKalle Valo ath6kl_htc_flush_rx_buf(ar->htc_target); 21245eaa78fSKalle Valo ath6kl_cleanup_amsdu_rxbufs(ar); 21345eaa78fSKalle Valo ath6kl_wmi_shutdown(ar->wmi); 21445eaa78fSKalle Valo clear_bit(WMI_ENABLED, &ar->flag); 21545eaa78fSKalle Valo ar->wmi = NULL; 21645eaa78fSKalle Valo err_htc_cleanup: 21745eaa78fSKalle Valo ath6kl_htc_cleanup(ar->htc_target); 21845eaa78fSKalle Valo err_power_off: 21945eaa78fSKalle Valo ath6kl_hif_power_off(ar); 22045eaa78fSKalle Valo err_bmi_cleanup: 22145eaa78fSKalle Valo ath6kl_bmi_cleanup(ar); 22245eaa78fSKalle Valo err_wq: 22345eaa78fSKalle Valo destroy_workqueue(ar->ath6kl_wq); 22445eaa78fSKalle Valo 22545eaa78fSKalle Valo return ret; 22645eaa78fSKalle Valo } 227d6a434d6SKalle Valo EXPORT_SYMBOL(ath6kl_core_init); 22845eaa78fSKalle Valo 22945eaa78fSKalle Valo struct ath6kl *ath6kl_core_create(struct device *dev) 23045eaa78fSKalle Valo { 23145eaa78fSKalle Valo struct ath6kl *ar; 23245eaa78fSKalle Valo u8 ctr; 23345eaa78fSKalle Valo 23445eaa78fSKalle Valo ar = ath6kl_cfg80211_create(); 23545eaa78fSKalle Valo if (!ar) 23645eaa78fSKalle Valo return NULL; 23745eaa78fSKalle Valo 23845eaa78fSKalle Valo ar->p2p = !!ath6kl_p2p; 23945eaa78fSKalle Valo ar->dev = dev; 24045eaa78fSKalle Valo 24145eaa78fSKalle Valo ar->vif_max = 1; 24245eaa78fSKalle Valo 24345eaa78fSKalle Valo ar->max_norm_iface = 1; 24445eaa78fSKalle Valo 24545eaa78fSKalle Valo spin_lock_init(&ar->lock); 24645eaa78fSKalle Valo spin_lock_init(&ar->mcastpsq_lock); 24745eaa78fSKalle Valo spin_lock_init(&ar->list_lock); 24845eaa78fSKalle Valo 24945eaa78fSKalle Valo init_waitqueue_head(&ar->event_wq); 25045eaa78fSKalle Valo sema_init(&ar->sem, 1); 25145eaa78fSKalle Valo 25245eaa78fSKalle Valo INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue); 25345eaa78fSKalle Valo INIT_LIST_HEAD(&ar->vif_list); 25445eaa78fSKalle Valo 25545eaa78fSKalle Valo clear_bit(WMI_ENABLED, &ar->flag); 25645eaa78fSKalle Valo clear_bit(SKIP_SCAN, &ar->flag); 25745eaa78fSKalle Valo clear_bit(DESTROY_IN_PROGRESS, &ar->flag); 25845eaa78fSKalle Valo 25945eaa78fSKalle Valo ar->tx_pwr = 0; 26045eaa78fSKalle Valo ar->intra_bss = 1; 26145eaa78fSKalle Valo ar->lrssi_roam_threshold = DEF_LRSSI_ROAM_THRESHOLD; 26245eaa78fSKalle Valo 26345eaa78fSKalle Valo ar->state = ATH6KL_STATE_OFF; 26445eaa78fSKalle Valo 26545eaa78fSKalle Valo memset((u8 *)ar->sta_list, 0, 26645eaa78fSKalle Valo AP_MAX_NUM_STA * sizeof(struct ath6kl_sta)); 26745eaa78fSKalle Valo 26845eaa78fSKalle Valo /* Init the PS queues */ 26945eaa78fSKalle Valo for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) { 27045eaa78fSKalle Valo spin_lock_init(&ar->sta_list[ctr].psq_lock); 27145eaa78fSKalle Valo skb_queue_head_init(&ar->sta_list[ctr].psq); 27245eaa78fSKalle Valo skb_queue_head_init(&ar->sta_list[ctr].apsdq); 273d0ff7383SNaveen Gangadharan ar->sta_list[ctr].mgmt_psq_len = 0; 274d0ff7383SNaveen Gangadharan INIT_LIST_HEAD(&ar->sta_list[ctr].mgmt_psq); 2751d2a4456SVasanthakumar Thiagarajan ar->sta_list[ctr].aggr_conn = 2761d2a4456SVasanthakumar Thiagarajan kzalloc(sizeof(struct aggr_info_conn), GFP_KERNEL); 2771d2a4456SVasanthakumar Thiagarajan if (!ar->sta_list[ctr].aggr_conn) { 2781d2a4456SVasanthakumar Thiagarajan ath6kl_err("Failed to allocate memory for sta aggregation information\n"); 2791d2a4456SVasanthakumar Thiagarajan ath6kl_core_destroy(ar); 2801d2a4456SVasanthakumar Thiagarajan return NULL; 2811d2a4456SVasanthakumar Thiagarajan } 28245eaa78fSKalle Valo } 28345eaa78fSKalle Valo 28445eaa78fSKalle Valo skb_queue_head_init(&ar->mcastpsq); 28545eaa78fSKalle Valo 28645eaa78fSKalle Valo memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3); 28745eaa78fSKalle Valo 28845eaa78fSKalle Valo return ar; 28945eaa78fSKalle Valo } 290d6a434d6SKalle Valo EXPORT_SYMBOL(ath6kl_core_create); 29145eaa78fSKalle Valo 29245eaa78fSKalle Valo void ath6kl_core_cleanup(struct ath6kl *ar) 29345eaa78fSKalle Valo { 29445eaa78fSKalle Valo ath6kl_hif_power_off(ar); 29545eaa78fSKalle Valo 29684caf800SVasanthakumar Thiagarajan ath6kl_recovery_cleanup(ar); 29784caf800SVasanthakumar Thiagarajan 29845eaa78fSKalle Valo destroy_workqueue(ar->ath6kl_wq); 29945eaa78fSKalle Valo 30045eaa78fSKalle Valo if (ar->htc_target) 30145eaa78fSKalle Valo ath6kl_htc_cleanup(ar->htc_target); 30245eaa78fSKalle Valo 30345eaa78fSKalle Valo ath6kl_cookie_cleanup(ar); 30445eaa78fSKalle Valo 30545eaa78fSKalle Valo ath6kl_cleanup_amsdu_rxbufs(ar); 30645eaa78fSKalle Valo 30745eaa78fSKalle Valo ath6kl_bmi_cleanup(ar); 30845eaa78fSKalle Valo 30945eaa78fSKalle Valo ath6kl_debug_cleanup(ar); 31045eaa78fSKalle Valo 31145eaa78fSKalle Valo kfree(ar->fw_board); 31245eaa78fSKalle Valo kfree(ar->fw_otp); 3138437754cSVivek Natarajan vfree(ar->fw); 31445eaa78fSKalle Valo kfree(ar->fw_patch); 31545eaa78fSKalle Valo kfree(ar->fw_testscript); 31645eaa78fSKalle Valo 31745eaa78fSKalle Valo ath6kl_cfg80211_cleanup(ar); 31845eaa78fSKalle Valo } 319d6a434d6SKalle Valo EXPORT_SYMBOL(ath6kl_core_cleanup); 32045eaa78fSKalle Valo 32145eaa78fSKalle Valo void ath6kl_core_destroy(struct ath6kl *ar) 32245eaa78fSKalle Valo { 32345eaa78fSKalle Valo ath6kl_cfg80211_destroy(ar); 32445eaa78fSKalle Valo } 325d6a434d6SKalle Valo EXPORT_SYMBOL(ath6kl_core_destroy); 32645eaa78fSKalle Valo 327d6a434d6SKalle Valo MODULE_AUTHOR("Qualcomm Atheros"); 328d6a434d6SKalle Valo MODULE_DESCRIPTION("Core module for AR600x SDIO and USB devices."); 329d6a434d6SKalle Valo MODULE_LICENSE("Dual BSD/GPL"); 330