xref: /openbmc/linux/drivers/net/wireless/ath/ath5k/gpio.c (revision 7dd65feb)
1 /*
2  * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3  * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
4  *
5  * Permission to use, copy, modify, and distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  *
17  */
18 
19 /****************\
20   GPIO Functions
21 \****************/
22 
23 #include "ath5k.h"
24 #include "reg.h"
25 #include "debug.h"
26 #include "base.h"
27 
28 /*
29  * Set led state
30  */
31 void ath5k_hw_set_ledstate(struct ath5k_hw *ah, unsigned int state)
32 {
33 	u32 led;
34 	/*5210 has different led mode handling*/
35 	u32 led_5210;
36 
37 	ATH5K_TRACE(ah->ah_sc);
38 
39 	/*Reset led status*/
40 	if (ah->ah_version != AR5K_AR5210)
41 		AR5K_REG_DISABLE_BITS(ah, AR5K_PCICFG,
42 			AR5K_PCICFG_LEDMODE |  AR5K_PCICFG_LED);
43 	else
44 		AR5K_REG_DISABLE_BITS(ah, AR5K_PCICFG, AR5K_PCICFG_LED);
45 
46 	/*
47 	 * Some blinking values, define at your wish
48 	 */
49 	switch (state) {
50 	case AR5K_LED_SCAN:
51 	case AR5K_LED_AUTH:
52 		led = AR5K_PCICFG_LEDMODE_PROP | AR5K_PCICFG_LED_PEND;
53 		led_5210 = AR5K_PCICFG_LED_PEND | AR5K_PCICFG_LED_BCTL;
54 		break;
55 
56 	case AR5K_LED_INIT:
57 		led = AR5K_PCICFG_LEDMODE_PROP | AR5K_PCICFG_LED_NONE;
58 		led_5210 = AR5K_PCICFG_LED_PEND;
59 		break;
60 
61 	case AR5K_LED_ASSOC:
62 	case AR5K_LED_RUN:
63 		led = AR5K_PCICFG_LEDMODE_PROP | AR5K_PCICFG_LED_ASSOC;
64 		led_5210 = AR5K_PCICFG_LED_ASSOC;
65 		break;
66 
67 	default:
68 		led = AR5K_PCICFG_LEDMODE_PROM | AR5K_PCICFG_LED_NONE;
69 		led_5210 = AR5K_PCICFG_LED_PEND;
70 		break;
71 	}
72 
73 	/*Write new status to the register*/
74 	if (ah->ah_version != AR5K_AR5210)
75 		AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, led);
76 	else
77 		AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, led_5210);
78 }
79 
80 /*
81  * Set GPIO inputs
82  */
83 int ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u32 gpio)
84 {
85 	ATH5K_TRACE(ah->ah_sc);
86 	if (gpio >= AR5K_NUM_GPIO)
87 		return -EINVAL;
88 
89 	ath5k_hw_reg_write(ah,
90 		(ath5k_hw_reg_read(ah, AR5K_GPIOCR) & ~AR5K_GPIOCR_OUT(gpio))
91 		| AR5K_GPIOCR_IN(gpio), AR5K_GPIOCR);
92 
93 	return 0;
94 }
95 
96 /*
97  * Set GPIO outputs
98  */
99 int ath5k_hw_set_gpio_output(struct ath5k_hw *ah, u32 gpio)
100 {
101 	ATH5K_TRACE(ah->ah_sc);
102 	if (gpio >= AR5K_NUM_GPIO)
103 		return -EINVAL;
104 
105 	ath5k_hw_reg_write(ah,
106 		(ath5k_hw_reg_read(ah, AR5K_GPIOCR) & ~AR5K_GPIOCR_OUT(gpio))
107 		| AR5K_GPIOCR_OUT(gpio), AR5K_GPIOCR);
108 
109 	return 0;
110 }
111 
112 /*
113  * Get GPIO state
114  */
115 u32 ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio)
116 {
117 	ATH5K_TRACE(ah->ah_sc);
118 	if (gpio >= AR5K_NUM_GPIO)
119 		return 0xffffffff;
120 
121 	/* GPIO input magic */
122 	return ((ath5k_hw_reg_read(ah, AR5K_GPIODI) & AR5K_GPIODI_M) >> gpio) &
123 		0x1;
124 }
125 
126 /*
127  * Set GPIO state
128  */
129 int ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val)
130 {
131 	u32 data;
132 	ATH5K_TRACE(ah->ah_sc);
133 
134 	if (gpio >= AR5K_NUM_GPIO)
135 		return -EINVAL;
136 
137 	/* GPIO output magic */
138 	data = ath5k_hw_reg_read(ah, AR5K_GPIODO);
139 
140 	data &= ~(1 << gpio);
141 	data |= (val & 1) << gpio;
142 
143 	ath5k_hw_reg_write(ah, data, AR5K_GPIODO);
144 
145 	return 0;
146 }
147 
148 /*
149  * Initialize the GPIO interrupt (RFKill switch)
150  */
151 void ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio,
152 		u32 interrupt_level)
153 {
154 	u32 data;
155 
156 	ATH5K_TRACE(ah->ah_sc);
157 	if (gpio >= AR5K_NUM_GPIO)
158 		return;
159 
160 	/*
161 	 * Set the GPIO interrupt
162 	 */
163 	data = (ath5k_hw_reg_read(ah, AR5K_GPIOCR) &
164 		~(AR5K_GPIOCR_INT_SEL(gpio) | AR5K_GPIOCR_INT_SELH |
165 		AR5K_GPIOCR_INT_ENA | AR5K_GPIOCR_OUT(gpio))) |
166 		(AR5K_GPIOCR_INT_SEL(gpio) | AR5K_GPIOCR_INT_ENA);
167 
168 	ath5k_hw_reg_write(ah, interrupt_level ? data :
169 		(data | AR5K_GPIOCR_INT_SELH), AR5K_GPIOCR);
170 
171 	ah->ah_imr |= AR5K_IMR_GPIO;
172 
173 	/* Enable GPIO interrupts */
174 	AR5K_REG_ENABLE_BITS(ah, AR5K_PIMR, AR5K_IMR_GPIO);
175 }
176 
177