1 /*- 2 * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 3. Neither the names of the above-listed copyright holders nor the names 16 * of any contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * Alternatively, this software may be distributed under the terms of the 20 * GNU General Public License ("GPL") version 2 as published by the Free 21 * Software Foundation. 22 * 23 * NO WARRANTY 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 * 36 */ 37 38 /* 39 * Definitions for the Atheros Wireless LAN controller driver. 40 */ 41 #ifndef _DEV_ATH_ATHVAR_H 42 #define _DEV_ATH_ATHVAR_H 43 44 #include <linux/interrupt.h> 45 #include <linux/list.h> 46 #include <linux/wireless.h> 47 #include <linux/if_ether.h> 48 #include <linux/leds.h> 49 #include <linux/rfkill.h> 50 #include <linux/workqueue.h> 51 52 #include "ath5k.h" 53 #include "debug.h" 54 #include "ani.h" 55 56 #include "../regd.h" 57 #include "../ath.h" 58 59 #define ATH_RXBUF 40 /* number of RX buffers */ 60 #define ATH_TXBUF 200 /* number of TX buffers */ 61 #define ATH_BCBUF 4 /* number of beacon buffers */ 62 #define ATH5K_TXQ_LEN_MAX (ATH_TXBUF / 4) /* bufs per queue */ 63 #define ATH5K_TXQ_LEN_LOW (ATH5K_TXQ_LEN_MAX / 2) /* low mark */ 64 65 struct ath5k_buf { 66 struct list_head list; 67 struct ath5k_desc *desc; /* virtual addr of desc */ 68 dma_addr_t daddr; /* physical addr of desc */ 69 struct sk_buff *skb; /* skbuff for buf */ 70 dma_addr_t skbaddr;/* physical addr of skb data */ 71 }; 72 73 /* 74 * Data transmit queue state. One of these exists for each 75 * hardware transmit queue. Packets sent to us from above 76 * are assigned to queues based on their priority. Not all 77 * devices support a complete set of hardware transmit queues. 78 * For those devices the array sc_ac2q will map multiple 79 * priorities to fewer hardware queues (typically all to one 80 * hardware queue). 81 */ 82 struct ath5k_txq { 83 unsigned int qnum; /* hardware q number */ 84 u32 *link; /* link ptr in last TX desc */ 85 struct list_head q; /* transmit queue */ 86 spinlock_t lock; /* lock on q and link */ 87 bool setup; 88 int txq_len; /* number of queued buffers */ 89 bool txq_poll_mark; 90 unsigned int txq_stuck; /* informational counter */ 91 }; 92 93 #define ATH5K_LED_MAX_NAME_LEN 31 94 95 /* 96 * State for LED triggers 97 */ 98 struct ath5k_led 99 { 100 char name[ATH5K_LED_MAX_NAME_LEN + 1]; /* name of the LED in sysfs */ 101 struct ath5k_softc *sc; /* driver state */ 102 struct led_classdev led_dev; /* led classdev */ 103 }; 104 105 /* Rfkill */ 106 struct ath5k_rfkill { 107 /* GPIO PIN for rfkill */ 108 u16 gpio; 109 /* polarity of rfkill GPIO PIN */ 110 bool polarity; 111 /* RFKILL toggle tasklet */ 112 struct tasklet_struct toggleq; 113 }; 114 115 /* statistics */ 116 struct ath5k_statistics { 117 /* antenna use */ 118 unsigned int antenna_rx[5]; /* frames count per antenna RX */ 119 unsigned int antenna_tx[5]; /* frames count per antenna TX */ 120 121 /* frame errors */ 122 unsigned int rx_all_count; /* all RX frames, including errors */ 123 unsigned int tx_all_count; /* all TX frames, including errors */ 124 unsigned int rx_bytes_count; /* all RX bytes, including errored pks 125 * and the MAC headers for each packet 126 */ 127 unsigned int tx_bytes_count; /* all TX bytes, including errored pkts 128 * and the MAC headers and padding for 129 * each packet. 130 */ 131 unsigned int rxerr_crc; 132 unsigned int rxerr_phy; 133 unsigned int rxerr_phy_code[32]; 134 unsigned int rxerr_fifo; 135 unsigned int rxerr_decrypt; 136 unsigned int rxerr_mic; 137 unsigned int rxerr_proc; 138 unsigned int rxerr_jumbo; 139 unsigned int txerr_retry; 140 unsigned int txerr_fifo; 141 unsigned int txerr_filt; 142 143 /* MIB counters */ 144 unsigned int ack_fail; 145 unsigned int rts_fail; 146 unsigned int rts_ok; 147 unsigned int fcs_error; 148 unsigned int beacons; 149 150 unsigned int mib_intr; 151 unsigned int rxorn_intr; 152 unsigned int rxeol_intr; 153 }; 154 155 #if CHAN_DEBUG 156 #define ATH_CHAN_MAX (26+26+26+200+200) 157 #else 158 #define ATH_CHAN_MAX (14+14+14+252+20) 159 #endif 160 161 struct ath5k_vif { 162 bool assoc; /* are we associated or not */ 163 enum nl80211_iftype opmode; 164 int bslot; 165 struct ath5k_buf *bbuf; /* beacon buffer */ 166 u8 lladdr[ETH_ALEN]; 167 }; 168 169 /* Software Carrier, keeps track of the driver state 170 * associated with an instance of a device */ 171 struct ath5k_softc { 172 struct pci_dev *pdev; 173 struct device *dev; /* for dma mapping */ 174 int irq; 175 u16 devid; 176 void __iomem *iobase; /* address of the device */ 177 struct mutex lock; /* dev-level lock */ 178 struct ieee80211_hw *hw; /* IEEE 802.11 common */ 179 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 180 struct ieee80211_channel channels[ATH_CHAN_MAX]; 181 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][AR5K_MAX_RATES]; 182 s8 rate_idx[IEEE80211_NUM_BANDS][AR5K_MAX_RATES]; 183 enum nl80211_iftype opmode; 184 struct ath5k_hw *ah; /* Atheros HW */ 185 186 struct ieee80211_supported_band *curband; 187 188 #ifdef CONFIG_ATH5K_DEBUG 189 struct ath5k_dbg_info debug; /* debug info */ 190 #endif /* CONFIG_ATH5K_DEBUG */ 191 192 struct ath5k_buf *bufptr; /* allocated buffer ptr */ 193 struct ath5k_desc *desc; /* TX/RX descriptors */ 194 dma_addr_t desc_daddr; /* DMA (physical) address */ 195 size_t desc_len; /* size of TX/RX descriptors */ 196 197 DECLARE_BITMAP(status, 5); 198 #define ATH_STAT_INVALID 0 /* disable hardware accesses */ 199 #define ATH_STAT_MRRETRY 1 /* multi-rate retry support */ 200 #define ATH_STAT_PROMISC 2 201 #define ATH_STAT_LEDSOFT 3 /* enable LED gpio status */ 202 #define ATH_STAT_STARTED 4 /* opened & irqs enabled */ 203 204 unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */ 205 unsigned int curmode; /* current phy mode */ 206 struct ieee80211_channel *curchan; /* current h/w channel */ 207 208 u16 nvifs; 209 210 enum ath5k_int imask; /* interrupt mask copy */ 211 212 u8 lladdr[ETH_ALEN]; 213 u8 bssidmask[ETH_ALEN]; 214 215 unsigned int led_pin, /* GPIO pin for driving LED */ 216 led_on; /* pin setting for LED on */ 217 218 struct work_struct reset_work; /* deferred chip reset */ 219 220 unsigned int rxbufsize; /* rx size based on mtu */ 221 struct list_head rxbuf; /* receive buffer */ 222 spinlock_t rxbuflock; 223 u32 *rxlink; /* link ptr in last RX desc */ 224 struct tasklet_struct rxtq; /* rx intr tasklet */ 225 struct ath5k_led rx_led; /* rx led */ 226 227 struct list_head txbuf; /* transmit buffer */ 228 spinlock_t txbuflock; 229 unsigned int txbuf_len; /* buf count in txbuf list */ 230 struct ath5k_txq txqs[AR5K_NUM_TX_QUEUES]; /* tx queues */ 231 struct tasklet_struct txtq; /* tx intr tasklet */ 232 struct ath5k_led tx_led; /* tx led */ 233 234 struct ath5k_rfkill rf_kill; 235 236 struct tasklet_struct calib; /* calibration tasklet */ 237 238 spinlock_t block; /* protects beacon */ 239 struct tasklet_struct beacontq; /* beacon intr tasklet */ 240 struct list_head bcbuf; /* beacon buffer */ 241 struct ieee80211_vif *bslot[ATH_BCBUF]; 242 u16 num_ap_vifs; 243 u16 num_adhoc_vifs; 244 unsigned int bhalq, /* SW q for outgoing beacons */ 245 bmisscount, /* missed beacon transmits */ 246 bintval, /* beacon interval in TU */ 247 bsent; 248 unsigned int nexttbtt; /* next beacon time in TU */ 249 struct ath5k_txq *cabq; /* content after beacon */ 250 251 int power_level; /* Requested tx power in dbm */ 252 bool assoc; /* associate state */ 253 bool enable_beacon; /* true if beacons are on */ 254 255 struct ath5k_statistics stats; 256 257 struct ath5k_ani_state ani_state; 258 struct tasklet_struct ani_tasklet; /* ANI calibration */ 259 260 struct delayed_work tx_complete_work; 261 262 struct survey_info survey; /* collected survey info */ 263 }; 264 265 #define ath5k_hw_hasbssidmask(_ah) \ 266 (ath5k_hw_get_capability(_ah, AR5K_CAP_BSSIDMASK, 0, NULL) == 0) 267 #define ath5k_hw_hasveol(_ah) \ 268 (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0) 269 270 #endif 271