1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 #include <linux/skbuff.h> 7 #include <linux/ctype.h> 8 #include <net/mac80211.h> 9 #include <net/cfg80211.h> 10 #include <linux/completion.h> 11 #include <linux/if_ether.h> 12 #include <linux/types.h> 13 #include <linux/pci.h> 14 #include <linux/uuid.h> 15 #include <linux/time.h> 16 #include <linux/of.h> 17 #include "core.h" 18 #include "debug.h" 19 #include "mac.h" 20 #include "hw.h" 21 #include "peer.h" 22 23 struct ath12k_wmi_svc_ready_parse { 24 bool wmi_svc_bitmap_done; 25 }; 26 27 struct ath12k_wmi_dma_ring_caps_parse { 28 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps; 29 u32 n_dma_ring_caps; 30 }; 31 32 struct ath12k_wmi_service_ext_arg { 33 u32 default_conc_scan_config_bits; 34 u32 default_fw_config_bits; 35 struct ath12k_wmi_ppe_threshold_arg ppet; 36 u32 he_cap_info; 37 u32 mpdu_density; 38 u32 max_bssid_rx_filters; 39 u32 num_hw_modes; 40 u32 num_phy; 41 }; 42 43 struct ath12k_wmi_svc_rdy_ext_parse { 44 struct ath12k_wmi_service_ext_arg arg; 45 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps; 46 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 47 u32 n_hw_mode_caps; 48 u32 tot_phy_id; 49 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps; 50 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps; 51 u32 n_mac_phy_caps; 52 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps; 53 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps; 54 u32 n_ext_hal_reg_caps; 55 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 56 bool hw_mode_done; 57 bool mac_phy_done; 58 bool ext_hal_reg_done; 59 bool mac_phy_chainmask_combo_done; 60 bool mac_phy_chainmask_cap_done; 61 bool oem_dma_ring_cap_done; 62 bool dma_ring_cap_done; 63 }; 64 65 struct ath12k_wmi_svc_rdy_ext2_arg { 66 u32 reg_db_version; 67 u32 hw_min_max_tx_power_2ghz; 68 u32 hw_min_max_tx_power_5ghz; 69 u32 chwidth_num_peer_caps; 70 u32 preamble_puncture_bw; 71 u32 max_user_per_ppdu_ofdma; 72 u32 max_user_per_ppdu_mumimo; 73 u32 target_cap_flags; 74 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 75 u32 max_num_linkview_peers; 76 u32 max_num_msduq_supported_per_tid; 77 u32 default_num_msduq_supported_per_tid; 78 }; 79 80 struct ath12k_wmi_svc_rdy_ext2_parse { 81 struct ath12k_wmi_svc_rdy_ext2_arg arg; 82 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 83 bool dma_ring_cap_done; 84 bool spectral_bin_scaling_done; 85 bool mac_phy_caps_ext_done; 86 }; 87 88 struct ath12k_wmi_rdy_parse { 89 u32 num_extra_mac_addr; 90 }; 91 92 struct ath12k_wmi_dma_buf_release_arg { 93 struct ath12k_wmi_dma_buf_release_fixed_params fixed; 94 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry; 95 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data; 96 u32 num_buf_entry; 97 u32 num_meta; 98 bool buf_entry_done; 99 bool meta_data_done; 100 }; 101 102 struct ath12k_wmi_tlv_policy { 103 size_t min_len; 104 }; 105 106 struct wmi_tlv_mgmt_rx_parse { 107 const struct ath12k_wmi_mgmt_rx_params *fixed; 108 const u8 *frame_buf; 109 bool frame_buf_done; 110 }; 111 112 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = { 113 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 }, 114 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 }, 115 [WMI_TAG_SERVICE_READY_EVENT] = { 116 .min_len = sizeof(struct wmi_service_ready_event) }, 117 [WMI_TAG_SERVICE_READY_EXT_EVENT] = { 118 .min_len = sizeof(struct wmi_service_ready_ext_event) }, 119 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = { 120 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) }, 121 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = { 122 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) }, 123 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = { 124 .min_len = sizeof(struct wmi_vdev_start_resp_event) }, 125 [WMI_TAG_PEER_DELETE_RESP_EVENT] = { 126 .min_len = sizeof(struct wmi_peer_delete_resp_event) }, 127 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = { 128 .min_len = sizeof(struct wmi_bcn_tx_status_event) }, 129 [WMI_TAG_VDEV_STOPPED_EVENT] = { 130 .min_len = sizeof(struct wmi_vdev_stopped_event) }, 131 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = { 132 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) }, 133 [WMI_TAG_MGMT_RX_HDR] = { 134 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) }, 135 [WMI_TAG_MGMT_TX_COMPL_EVENT] = { 136 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) }, 137 [WMI_TAG_SCAN_EVENT] = { 138 .min_len = sizeof(struct wmi_scan_event) }, 139 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = { 140 .min_len = sizeof(struct wmi_peer_sta_kickout_event) }, 141 [WMI_TAG_ROAM_EVENT] = { 142 .min_len = sizeof(struct wmi_roam_event) }, 143 [WMI_TAG_CHAN_INFO_EVENT] = { 144 .min_len = sizeof(struct wmi_chan_info_event) }, 145 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = { 146 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) }, 147 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = { 148 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) }, 149 [WMI_TAG_READY_EVENT] = { 150 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) }, 151 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = { 152 .min_len = sizeof(struct wmi_service_available_event) }, 153 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = { 154 .min_len = sizeof(struct wmi_peer_assoc_conf_event) }, 155 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = { 156 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) }, 157 [WMI_TAG_HOST_SWFDA_EVENT] = { 158 .min_len = sizeof(struct wmi_fils_discovery_event) }, 159 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = { 160 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) }, 161 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = { 162 .min_len = sizeof(struct wmi_vdev_delete_resp_event) }, 163 }; 164 165 static __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len) 166 { 167 return le32_encode_bits(cmd, WMI_TLV_TAG) | 168 le32_encode_bits(len, WMI_TLV_LEN); 169 } 170 171 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len) 172 { 173 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE); 174 } 175 176 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab, 177 struct ath12k_wmi_resource_config_arg *config) 178 { 179 config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS; 180 181 if (ab->num_radios == 2) { 182 config->num_peers = TARGET_NUM_PEERS(DBS); 183 config->num_tids = TARGET_NUM_TIDS(DBS); 184 } else if (ab->num_radios == 3) { 185 config->num_peers = TARGET_NUM_PEERS(DBS_SBS); 186 config->num_tids = TARGET_NUM_TIDS(DBS_SBS); 187 } else { 188 /* Control should not reach here */ 189 config->num_peers = TARGET_NUM_PEERS(SINGLE); 190 config->num_tids = TARGET_NUM_TIDS(SINGLE); 191 } 192 config->num_offload_peers = TARGET_NUM_OFFLD_PEERS; 193 config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS; 194 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 195 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 196 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 197 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 198 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 199 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 200 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 201 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 202 203 if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags)) 204 config->rx_decap_mode = TARGET_DECAP_MODE_RAW; 205 else 206 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 207 208 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 209 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 210 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 211 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 212 config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS; 213 config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS; 214 config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE; 215 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 216 config->num_wds_entries = TARGET_NUM_WDS_ENTRIES; 217 config->dma_burst_size = TARGET_DMA_BURST_SIZE; 218 config->rx_skip_defrag_timeout_dup_detection_check = 219 TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 220 config->vow_config = TARGET_VOW_CONFIG; 221 config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV; 222 config->num_msdu_desc = TARGET_NUM_MSDU_DESC; 223 config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD; 224 config->rx_batchmode = TARGET_RX_BATCHMODE; 225 /* Indicates host supports peer map v3 and unmap v2 support */ 226 config->peer_map_unmap_version = 0x32; 227 config->twt_ap_pdev_count = ab->num_radios; 228 config->twt_ap_sta_count = 1000; 229 } 230 231 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab, 232 struct ath12k_wmi_resource_config_arg *config) 233 { 234 config->num_vdevs = 4; 235 config->num_peers = 16; 236 config->num_tids = 32; 237 238 config->num_offload_peers = 3; 239 config->num_offload_reorder_buffs = 3; 240 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 241 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 242 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 243 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 244 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 245 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 246 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 247 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 248 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 249 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 250 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 251 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 252 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 253 config->num_mcast_groups = 0; 254 config->num_mcast_table_elems = 0; 255 config->mcast2ucast_mode = 0; 256 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 257 config->num_wds_entries = 0; 258 config->dma_burst_size = 0; 259 config->rx_skip_defrag_timeout_dup_detection_check = 0; 260 config->vow_config = TARGET_VOW_CONFIG; 261 config->gtk_offload_max_vdev = 2; 262 config->num_msdu_desc = 0x400; 263 config->beacon_tx_offload_max_vdev = 2; 264 config->rx_batchmode = TARGET_RX_BATCHMODE; 265 266 config->peer_map_unmap_version = 0x1; 267 config->use_pdev_id = 1; 268 config->max_frag_entries = 0xa; 269 config->num_tdls_vdevs = 0x1; 270 config->num_tdls_conn_table_entries = 8; 271 config->beacon_tx_offload_max_vdev = 0x2; 272 config->num_multicast_filter_entries = 0x20; 273 config->num_wow_filters = 0x16; 274 config->num_keep_alive_pattern = 0; 275 } 276 277 #define PRIMAP(_hw_mode_) \ 278 [_hw_mode_] = _hw_mode_##_PRI 279 280 static const int ath12k_hw_mode_pri_map[] = { 281 PRIMAP(WMI_HOST_HW_MODE_SINGLE), 282 PRIMAP(WMI_HOST_HW_MODE_DBS), 283 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE), 284 PRIMAP(WMI_HOST_HW_MODE_SBS), 285 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS), 286 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS), 287 /* keep last */ 288 PRIMAP(WMI_HOST_HW_MODE_MAX), 289 }; 290 291 static int 292 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len, 293 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len, 294 const void *ptr, void *data), 295 void *data) 296 { 297 const void *begin = ptr; 298 const struct wmi_tlv *tlv; 299 u16 tlv_tag, tlv_len; 300 int ret; 301 302 while (len > 0) { 303 if (len < sizeof(*tlv)) { 304 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n", 305 ptr - begin, len, sizeof(*tlv)); 306 return -EINVAL; 307 } 308 309 tlv = ptr; 310 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 311 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN); 312 ptr += sizeof(*tlv); 313 len -= sizeof(*tlv); 314 315 if (tlv_len > len) { 316 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n", 317 tlv_tag, ptr - begin, len, tlv_len); 318 return -EINVAL; 319 } 320 321 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) && 322 ath12k_wmi_tlv_policies[tlv_tag].min_len && 323 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) { 324 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n", 325 tlv_tag, ptr - begin, tlv_len, 326 ath12k_wmi_tlv_policies[tlv_tag].min_len); 327 return -EINVAL; 328 } 329 330 ret = iter(ab, tlv_tag, tlv_len, ptr, data); 331 if (ret) 332 return ret; 333 334 ptr += tlv_len; 335 len -= tlv_len; 336 } 337 338 return 0; 339 } 340 341 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len, 342 const void *ptr, void *data) 343 { 344 const void **tb = data; 345 346 if (tag < WMI_TAG_MAX) 347 tb[tag] = ptr; 348 349 return 0; 350 } 351 352 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb, 353 const void *ptr, size_t len) 354 { 355 return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse, 356 (void *)tb); 357 } 358 359 static const void ** 360 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab, const void *ptr, 361 size_t len, gfp_t gfp) 362 { 363 const void **tb; 364 int ret; 365 366 tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp); 367 if (!tb) 368 return ERR_PTR(-ENOMEM); 369 370 ret = ath12k_wmi_tlv_parse(ab, tb, ptr, len); 371 if (ret) { 372 kfree(tb); 373 return ERR_PTR(ret); 374 } 375 376 return tb; 377 } 378 379 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 380 u32 cmd_id) 381 { 382 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb); 383 struct ath12k_base *ab = wmi->wmi_ab->ab; 384 struct wmi_cmd_hdr *cmd_hdr; 385 int ret; 386 387 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr))) 388 return -ENOMEM; 389 390 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 391 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID); 392 393 memset(skb_cb, 0, sizeof(*skb_cb)); 394 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb); 395 396 if (ret) 397 goto err_pull; 398 399 return 0; 400 401 err_pull: 402 skb_pull(skb, sizeof(struct wmi_cmd_hdr)); 403 return ret; 404 } 405 406 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 407 u32 cmd_id) 408 { 409 struct ath12k_wmi_base *wmi_sc = wmi->wmi_ab; 410 int ret = -EOPNOTSUPP; 411 412 might_sleep(); 413 414 wait_event_timeout(wmi_sc->tx_credits_wq, ({ 415 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id); 416 417 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_sc->ab->dev_flags)) 418 ret = -ESHUTDOWN; 419 420 (ret != -EAGAIN); 421 }), WMI_SEND_TIMEOUT_HZ); 422 423 if (ret == -EAGAIN) 424 ath12k_warn(wmi_sc->ab, "wmi command %d timeout\n", cmd_id); 425 426 return ret; 427 } 428 429 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 430 const void *ptr, 431 struct ath12k_wmi_service_ext_arg *arg) 432 { 433 const struct wmi_service_ready_ext_event *ev = ptr; 434 int i; 435 436 if (!ev) 437 return -EINVAL; 438 439 /* Move this to host based bitmap */ 440 arg->default_conc_scan_config_bits = 441 le32_to_cpu(ev->default_conc_scan_config_bits); 442 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits); 443 arg->he_cap_info = le32_to_cpu(ev->he_cap_info); 444 arg->mpdu_density = le32_to_cpu(ev->mpdu_density); 445 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters); 446 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1); 447 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info); 448 449 for (i = 0; i < WMI_MAX_NUM_SS; i++) 450 arg->ppet.ppet16_ppet8_ru3_ru0[i] = 451 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]); 452 453 return 0; 454 } 455 456 static int 457 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 458 struct ath12k_wmi_svc_rdy_ext_parse *svc, 459 u8 hw_mode_id, u8 phy_id, 460 struct ath12k_pdev *pdev) 461 { 462 const struct ath12k_wmi_mac_phy_caps_params *mac_caps; 463 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps; 464 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps; 465 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps; 466 struct ath12k_base *ab = wmi_handle->wmi_ab->ab; 467 struct ath12k_band_cap *cap_band; 468 struct ath12k_pdev_cap *pdev_cap = &pdev->cap; 469 struct ath12k_fw_pdev *fw_pdev; 470 u32 phy_map; 471 u32 hw_idx, phy_idx = 0; 472 int i; 473 474 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps) 475 return -EINVAL; 476 477 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) { 478 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id)) 479 break; 480 481 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map); 482 phy_idx = fls(phy_map); 483 } 484 485 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes)) 486 return -EINVAL; 487 488 phy_idx += phy_id; 489 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy)) 490 return -EINVAL; 491 492 mac_caps = wmi_mac_phy_caps + phy_idx; 493 494 pdev->pdev_id = le32_to_cpu(mac_caps->pdev_id); 495 pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands); 496 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density); 497 498 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count]; 499 fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands); 500 fw_pdev->pdev_id = le32_to_cpu(mac_caps->pdev_id); 501 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id); 502 ab->fw_pdev_count++; 503 504 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from 505 * band to band for a single radio, need to see how this should be 506 * handled. 507 */ 508 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 509 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g); 510 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g); 511 } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 512 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g); 513 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g); 514 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 515 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g); 516 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g); 517 } else { 518 return -EINVAL; 519 } 520 521 /* tx/rx chainmask reported from fw depends on the actual hw chains used, 522 * For example, for 4x4 capable macphys, first 4 chains can be used for first 523 * mac and the remaining 4 chains can be used for the second mac or vice-versa. 524 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0 525 * will be advertised for second mac or vice-versa. Compute the shift value 526 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to 527 * mac80211. 528 */ 529 pdev_cap->tx_chain_mask_shift = 530 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32); 531 pdev_cap->rx_chain_mask_shift = 532 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32); 533 534 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2G_CAP) { 535 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ]; 536 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 537 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g); 538 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g); 539 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g); 540 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext); 541 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g); 542 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 543 cap_band->he_cap_phy_info[i] = 544 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]); 545 546 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1); 547 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info); 548 549 for (i = 0; i < WMI_MAX_NUM_SS; i++) 550 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 551 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]); 552 } 553 554 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5G_CAP) { 555 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ]; 556 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 557 cap_band->max_bw_supported = 558 le32_to_cpu(mac_caps->max_bw_supported_5g); 559 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 560 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 561 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 562 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 563 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 564 cap_band->he_cap_phy_info[i] = 565 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 566 567 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 568 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 569 570 for (i = 0; i < WMI_MAX_NUM_SS; i++) 571 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 572 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 573 574 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ]; 575 cap_band->max_bw_supported = 576 le32_to_cpu(mac_caps->max_bw_supported_5g); 577 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 578 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 579 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 580 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 581 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 582 cap_band->he_cap_phy_info[i] = 583 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 584 585 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 586 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 587 588 for (i = 0; i < WMI_MAX_NUM_SS; i++) 589 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 590 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 591 } 592 593 return 0; 594 } 595 596 static int 597 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle, 598 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps, 599 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps, 600 u8 phy_idx, 601 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param) 602 { 603 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap; 604 605 if (!reg_caps || !ext_caps) 606 return -EINVAL; 607 608 if (phy_idx >= le32_to_cpu(reg_caps->num_phy)) 609 return -EINVAL; 610 611 ext_reg_cap = &ext_caps[phy_idx]; 612 613 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id); 614 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain); 615 param->eeprom_reg_domain_ext = 616 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext); 617 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1); 618 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2); 619 /* check if param->wireless_mode is needed */ 620 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan); 621 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan); 622 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan); 623 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan); 624 625 return 0; 626 } 627 628 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab, 629 const void *evt_buf, 630 struct ath12k_wmi_target_cap_arg *cap) 631 { 632 const struct wmi_service_ready_event *ev = evt_buf; 633 634 if (!ev) { 635 ath12k_err(ab, "%s: failed by NULL param\n", 636 __func__); 637 return -EINVAL; 638 } 639 640 cap->phy_capability = le32_to_cpu(ev->phy_capability); 641 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry); 642 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains); 643 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info); 644 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info); 645 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs); 646 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power); 647 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power); 648 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info); 649 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable); 650 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size); 651 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels); 652 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs); 653 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps); 654 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask); 655 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index); 656 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc); 657 658 return 0; 659 } 660 661 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in 662 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each 663 * 4-byte word. 664 */ 665 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi, 666 const u32 *wmi_svc_bm) 667 { 668 int i, j; 669 670 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) { 671 do { 672 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32)) 673 set_bit(j, wmi->wmi_ab->svc_map); 674 } while (++j % WMI_SERVICE_BITS_IN_SIZE32); 675 } 676 } 677 678 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 679 const void *ptr, void *data) 680 { 681 struct ath12k_wmi_svc_ready_parse *svc_ready = data; 682 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 683 u16 expect_len; 684 685 switch (tag) { 686 case WMI_TAG_SERVICE_READY_EVENT: 687 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps)) 688 return -EINVAL; 689 break; 690 691 case WMI_TAG_ARRAY_UINT32: 692 if (!svc_ready->wmi_svc_bitmap_done) { 693 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32); 694 if (len < expect_len) { 695 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n", 696 len, tag); 697 return -EINVAL; 698 } 699 700 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr); 701 702 svc_ready->wmi_svc_bitmap_done = true; 703 } 704 break; 705 default: 706 break; 707 } 708 709 return 0; 710 } 711 712 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 713 { 714 struct ath12k_wmi_svc_ready_parse svc_ready = { }; 715 int ret; 716 717 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 718 ath12k_wmi_svc_rdy_parse, 719 &svc_ready); 720 if (ret) { 721 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 722 return ret; 723 } 724 725 return 0; 726 } 727 728 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len) 729 { 730 struct sk_buff *skb; 731 struct ath12k_base *ab = wmi_sc->ab; 732 u32 round_len = roundup(len, 4); 733 734 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len); 735 if (!skb) 736 return NULL; 737 738 skb_reserve(skb, WMI_SKB_HEADROOM); 739 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 740 ath12k_warn(ab, "unaligned WMI skb data\n"); 741 742 skb_put(skb, round_len); 743 memset(skb->data, 0, round_len); 744 745 return skb; 746 } 747 748 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id, 749 struct sk_buff *frame) 750 { 751 struct ath12k_wmi_pdev *wmi = ar->wmi; 752 struct wmi_mgmt_send_cmd *cmd; 753 struct wmi_tlv *frame_tlv; 754 struct sk_buff *skb; 755 u32 buf_len; 756 int ret, len; 757 758 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN); 759 760 len = sizeof(*cmd) + sizeof(*frame_tlv) + roundup(buf_len, 4); 761 762 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 763 if (!skb) 764 return -ENOMEM; 765 766 cmd = (struct wmi_mgmt_send_cmd *)skb->data; 767 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD, 768 sizeof(*cmd)); 769 cmd->vdev_id = cpu_to_le32(vdev_id); 770 cmd->desc_id = cpu_to_le32(buf_id); 771 cmd->chanfreq = 0; 772 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr)); 773 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr)); 774 cmd->frame_len = cpu_to_le32(frame->len); 775 cmd->buf_len = cpu_to_le32(buf_len); 776 cmd->tx_params_valid = 0; 777 778 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 779 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len); 780 781 memcpy(frame_tlv->value, frame->data, buf_len); 782 783 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID); 784 if (ret) { 785 ath12k_warn(ar->ab, 786 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n"); 787 dev_kfree_skb(skb); 788 } 789 790 return ret; 791 } 792 793 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 794 struct ath12k_wmi_vdev_create_arg *args) 795 { 796 struct ath12k_wmi_pdev *wmi = ar->wmi; 797 struct wmi_vdev_create_cmd *cmd; 798 struct sk_buff *skb; 799 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams; 800 struct wmi_tlv *tlv; 801 int ret, len; 802 void *ptr; 803 804 /* It can be optimized my sending tx/rx chain configuration 805 * only for supported bands instead of always sending it for 806 * both the bands. 807 */ 808 len = sizeof(*cmd) + TLV_HDR_SIZE + 809 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)); 810 811 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 812 if (!skb) 813 return -ENOMEM; 814 815 cmd = (struct wmi_vdev_create_cmd *)skb->data; 816 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD, 817 sizeof(*cmd)); 818 819 cmd->vdev_id = cpu_to_le32(args->if_id); 820 cmd->vdev_type = cpu_to_le32(args->type); 821 cmd->vdev_subtype = cpu_to_le32(args->subtype); 822 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX); 823 cmd->pdev_id = cpu_to_le32(args->pdev_id); 824 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id); 825 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); 826 827 ptr = skb->data + sizeof(*cmd); 828 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams); 829 830 tlv = ptr; 831 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 832 833 ptr += TLV_HDR_SIZE; 834 txrx_streams = ptr; 835 len = sizeof(*txrx_streams); 836 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 837 len); 838 txrx_streams->band = WMI_TPC_CHAINMASK_CONFIG_BAND_2G; 839 txrx_streams->supported_tx_streams = 840 args->chains[NL80211_BAND_2GHZ].tx; 841 txrx_streams->supported_rx_streams = 842 args->chains[NL80211_BAND_2GHZ].rx; 843 844 txrx_streams++; 845 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 846 len); 847 txrx_streams->band = WMI_TPC_CHAINMASK_CONFIG_BAND_5G; 848 txrx_streams->supported_tx_streams = 849 args->chains[NL80211_BAND_5GHZ].tx; 850 txrx_streams->supported_rx_streams = 851 args->chains[NL80211_BAND_5GHZ].rx; 852 853 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 854 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n", 855 args->if_id, args->type, args->subtype, 856 macaddr, args->pdev_id); 857 858 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID); 859 if (ret) { 860 ath12k_warn(ar->ab, 861 "failed to submit WMI_VDEV_CREATE_CMDID\n"); 862 dev_kfree_skb(skb); 863 } 864 865 return ret; 866 } 867 868 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id) 869 { 870 struct ath12k_wmi_pdev *wmi = ar->wmi; 871 struct wmi_vdev_delete_cmd *cmd; 872 struct sk_buff *skb; 873 int ret; 874 875 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 876 if (!skb) 877 return -ENOMEM; 878 879 cmd = (struct wmi_vdev_delete_cmd *)skb->data; 880 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD, 881 sizeof(*cmd)); 882 cmd->vdev_id = cpu_to_le32(vdev_id); 883 884 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id); 885 886 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID); 887 if (ret) { 888 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n"); 889 dev_kfree_skb(skb); 890 } 891 892 return ret; 893 } 894 895 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id) 896 { 897 struct ath12k_wmi_pdev *wmi = ar->wmi; 898 struct wmi_vdev_stop_cmd *cmd; 899 struct sk_buff *skb; 900 int ret; 901 902 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 903 if (!skb) 904 return -ENOMEM; 905 906 cmd = (struct wmi_vdev_stop_cmd *)skb->data; 907 908 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD, 909 sizeof(*cmd)); 910 cmd->vdev_id = cpu_to_le32(vdev_id); 911 912 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id); 913 914 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID); 915 if (ret) { 916 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n"); 917 dev_kfree_skb(skb); 918 } 919 920 return ret; 921 } 922 923 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id) 924 { 925 struct ath12k_wmi_pdev *wmi = ar->wmi; 926 struct wmi_vdev_down_cmd *cmd; 927 struct sk_buff *skb; 928 int ret; 929 930 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 931 if (!skb) 932 return -ENOMEM; 933 934 cmd = (struct wmi_vdev_down_cmd *)skb->data; 935 936 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD, 937 sizeof(*cmd)); 938 cmd->vdev_id = cpu_to_le32(vdev_id); 939 940 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id); 941 942 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID); 943 if (ret) { 944 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n"); 945 dev_kfree_skb(skb); 946 } 947 948 return ret; 949 } 950 951 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan, 952 struct wmi_vdev_start_req_arg *arg) 953 { 954 memset(chan, 0, sizeof(*chan)); 955 956 chan->mhz = cpu_to_le32(arg->freq); 957 chan->band_center_freq1 = cpu_to_le32(arg->band_center_freq1); 958 if (arg->mode == MODE_11AC_VHT80_80) 959 chan->band_center_freq2 = cpu_to_le32(arg->band_center_freq2); 960 else 961 chan->band_center_freq2 = 0; 962 963 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE); 964 if (arg->passive) 965 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 966 if (arg->allow_ibss) 967 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED); 968 if (arg->allow_ht) 969 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 970 if (arg->allow_vht) 971 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 972 if (arg->allow_he) 973 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 974 if (arg->ht40plus) 975 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS); 976 if (arg->chan_radar) 977 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 978 if (arg->freq2_radar) 979 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2); 980 981 chan->reg_info_1 = le32_encode_bits(arg->max_power, 982 WMI_CHAN_REG_INFO1_MAX_PWR) | 983 le32_encode_bits(arg->max_reg_power, 984 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 985 986 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain, 987 WMI_CHAN_REG_INFO2_ANT_MAX) | 988 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR); 989 } 990 991 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 992 bool restart) 993 { 994 struct ath12k_wmi_pdev *wmi = ar->wmi; 995 struct wmi_vdev_start_request_cmd *cmd; 996 struct sk_buff *skb; 997 struct ath12k_wmi_channel_params *chan; 998 struct wmi_tlv *tlv; 999 void *ptr; 1000 int ret, len; 1001 1002 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) 1003 return -EINVAL; 1004 1005 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE; 1006 1007 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1008 if (!skb) 1009 return -ENOMEM; 1010 1011 cmd = (struct wmi_vdev_start_request_cmd *)skb->data; 1012 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD, 1013 sizeof(*cmd)); 1014 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1015 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval); 1016 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate); 1017 cmd->dtim_period = cpu_to_le32(arg->dtim_period); 1018 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors); 1019 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams); 1020 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams); 1021 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms); 1022 cmd->regdomain = cpu_to_le32(arg->regdomain); 1023 cmd->he_ops = cpu_to_le32(arg->he_ops); 1024 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 1025 1026 if (!restart) { 1027 if (arg->ssid) { 1028 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len); 1029 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); 1030 } 1031 if (arg->hidden_ssid) 1032 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID); 1033 if (arg->pmf_enabled) 1034 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED); 1035 } 1036 1037 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED); 1038 1039 ptr = skb->data + sizeof(*cmd); 1040 chan = ptr; 1041 1042 ath12k_wmi_put_wmi_channel(chan, arg); 1043 1044 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 1045 sizeof(*chan)); 1046 ptr += sizeof(*chan); 1047 1048 tlv = ptr; 1049 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 1050 1051 /* Note: This is a nested TLV containing: 1052 * [wmi_tlv][wmi_p2p_noa_descriptor][wmi_tlv].. 1053 */ 1054 1055 ptr += sizeof(*tlv); 1056 1057 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n", 1058 restart ? "restart" : "start", arg->vdev_id, 1059 arg->freq, arg->mode); 1060 1061 if (restart) 1062 ret = ath12k_wmi_cmd_send(wmi, skb, 1063 WMI_VDEV_RESTART_REQUEST_CMDID); 1064 else 1065 ret = ath12k_wmi_cmd_send(wmi, skb, 1066 WMI_VDEV_START_REQUEST_CMDID); 1067 if (ret) { 1068 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n", 1069 restart ? "restart" : "start"); 1070 dev_kfree_skb(skb); 1071 } 1072 1073 return ret; 1074 } 1075 1076 int ath12k_wmi_vdev_up(struct ath12k *ar, u32 vdev_id, u32 aid, const u8 *bssid) 1077 { 1078 struct ath12k_wmi_pdev *wmi = ar->wmi; 1079 struct wmi_vdev_up_cmd *cmd; 1080 struct sk_buff *skb; 1081 int ret; 1082 1083 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1084 if (!skb) 1085 return -ENOMEM; 1086 1087 cmd = (struct wmi_vdev_up_cmd *)skb->data; 1088 1089 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD, 1090 sizeof(*cmd)); 1091 cmd->vdev_id = cpu_to_le32(vdev_id); 1092 cmd->vdev_assoc_id = cpu_to_le32(aid); 1093 1094 ether_addr_copy(cmd->vdev_bssid.addr, bssid); 1095 1096 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1097 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n", 1098 vdev_id, aid, bssid); 1099 1100 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID); 1101 if (ret) { 1102 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n"); 1103 dev_kfree_skb(skb); 1104 } 1105 1106 return ret; 1107 } 1108 1109 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 1110 struct ath12k_wmi_peer_create_arg *arg) 1111 { 1112 struct ath12k_wmi_pdev *wmi = ar->wmi; 1113 struct wmi_peer_create_cmd *cmd; 1114 struct sk_buff *skb; 1115 int ret; 1116 1117 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1118 if (!skb) 1119 return -ENOMEM; 1120 1121 cmd = (struct wmi_peer_create_cmd *)skb->data; 1122 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD, 1123 sizeof(*cmd)); 1124 1125 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr); 1126 cmd->peer_type = cpu_to_le32(arg->peer_type); 1127 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1128 1129 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1130 "WMI peer create vdev_id %d peer_addr %pM\n", 1131 arg->vdev_id, arg->peer_addr); 1132 1133 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID); 1134 if (ret) { 1135 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n"); 1136 dev_kfree_skb(skb); 1137 } 1138 1139 return ret; 1140 } 1141 1142 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 1143 const u8 *peer_addr, u8 vdev_id) 1144 { 1145 struct ath12k_wmi_pdev *wmi = ar->wmi; 1146 struct wmi_peer_delete_cmd *cmd; 1147 struct sk_buff *skb; 1148 int ret; 1149 1150 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1151 if (!skb) 1152 return -ENOMEM; 1153 1154 cmd = (struct wmi_peer_delete_cmd *)skb->data; 1155 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD, 1156 sizeof(*cmd)); 1157 1158 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1159 cmd->vdev_id = cpu_to_le32(vdev_id); 1160 1161 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1162 "WMI peer delete vdev_id %d peer_addr %pM\n", 1163 vdev_id, peer_addr); 1164 1165 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID); 1166 if (ret) { 1167 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n"); 1168 dev_kfree_skb(skb); 1169 } 1170 1171 return ret; 1172 } 1173 1174 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 1175 struct ath12k_wmi_pdev_set_regdomain_arg *arg) 1176 { 1177 struct ath12k_wmi_pdev *wmi = ar->wmi; 1178 struct wmi_pdev_set_regdomain_cmd *cmd; 1179 struct sk_buff *skb; 1180 int ret; 1181 1182 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1183 if (!skb) 1184 return -ENOMEM; 1185 1186 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; 1187 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1188 sizeof(*cmd)); 1189 1190 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use); 1191 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g); 1192 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g); 1193 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g); 1194 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g); 1195 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain); 1196 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 1197 1198 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1199 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n", 1200 arg->current_rd_in_use, arg->current_rd_2g, 1201 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id); 1202 1203 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID); 1204 if (ret) { 1205 ath12k_warn(ar->ab, 1206 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n"); 1207 dev_kfree_skb(skb); 1208 } 1209 1210 return ret; 1211 } 1212 1213 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 1214 u32 vdev_id, u32 param_id, u32 param_val) 1215 { 1216 struct ath12k_wmi_pdev *wmi = ar->wmi; 1217 struct wmi_peer_set_param_cmd *cmd; 1218 struct sk_buff *skb; 1219 int ret; 1220 1221 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1222 if (!skb) 1223 return -ENOMEM; 1224 1225 cmd = (struct wmi_peer_set_param_cmd *)skb->data; 1226 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD, 1227 sizeof(*cmd)); 1228 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1229 cmd->vdev_id = cpu_to_le32(vdev_id); 1230 cmd->param_id = cpu_to_le32(param_id); 1231 cmd->param_value = cpu_to_le32(param_val); 1232 1233 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1234 "WMI vdev %d peer 0x%pM set param %d value %d\n", 1235 vdev_id, peer_addr, param_id, param_val); 1236 1237 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID); 1238 if (ret) { 1239 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n"); 1240 dev_kfree_skb(skb); 1241 } 1242 1243 return ret; 1244 } 1245 1246 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 1247 u8 peer_addr[ETH_ALEN], 1248 u32 peer_tid_bitmap, 1249 u8 vdev_id) 1250 { 1251 struct ath12k_wmi_pdev *wmi = ar->wmi; 1252 struct wmi_peer_flush_tids_cmd *cmd; 1253 struct sk_buff *skb; 1254 int ret; 1255 1256 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1257 if (!skb) 1258 return -ENOMEM; 1259 1260 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; 1261 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD, 1262 sizeof(*cmd)); 1263 1264 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1265 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap); 1266 cmd->vdev_id = cpu_to_le32(vdev_id); 1267 1268 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1269 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n", 1270 vdev_id, peer_addr, peer_tid_bitmap); 1271 1272 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID); 1273 if (ret) { 1274 ath12k_warn(ar->ab, 1275 "failed to send WMI_PEER_FLUSH_TIDS cmd\n"); 1276 dev_kfree_skb(skb); 1277 } 1278 1279 return ret; 1280 } 1281 1282 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 1283 int vdev_id, const u8 *addr, 1284 dma_addr_t paddr, u8 tid, 1285 u8 ba_window_size_valid, 1286 u32 ba_window_size) 1287 { 1288 struct wmi_peer_reorder_queue_setup_cmd *cmd; 1289 struct sk_buff *skb; 1290 int ret; 1291 1292 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 1293 if (!skb) 1294 return -ENOMEM; 1295 1296 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data; 1297 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1298 sizeof(*cmd)); 1299 1300 ether_addr_copy(cmd->peer_macaddr.addr, addr); 1301 cmd->vdev_id = cpu_to_le32(vdev_id); 1302 cmd->tid = cpu_to_le32(tid); 1303 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr)); 1304 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr)); 1305 cmd->queue_no = cpu_to_le32(tid); 1306 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid); 1307 cmd->ba_window_size = cpu_to_le32(ba_window_size); 1308 1309 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1310 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n", 1311 addr, vdev_id, tid); 1312 1313 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 1314 WMI_PEER_REORDER_QUEUE_SETUP_CMDID); 1315 if (ret) { 1316 ath12k_warn(ar->ab, 1317 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n"); 1318 dev_kfree_skb(skb); 1319 } 1320 1321 return ret; 1322 } 1323 1324 int 1325 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 1326 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg) 1327 { 1328 struct ath12k_wmi_pdev *wmi = ar->wmi; 1329 struct wmi_peer_reorder_queue_remove_cmd *cmd; 1330 struct sk_buff *skb; 1331 int ret; 1332 1333 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1334 if (!skb) 1335 return -ENOMEM; 1336 1337 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data; 1338 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1339 sizeof(*cmd)); 1340 1341 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr); 1342 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1343 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap); 1344 1345 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1346 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__, 1347 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap); 1348 1349 ret = ath12k_wmi_cmd_send(wmi, skb, 1350 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID); 1351 if (ret) { 1352 ath12k_warn(ar->ab, 1353 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID"); 1354 dev_kfree_skb(skb); 1355 } 1356 1357 return ret; 1358 } 1359 1360 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 1361 u32 param_value, u8 pdev_id) 1362 { 1363 struct ath12k_wmi_pdev *wmi = ar->wmi; 1364 struct wmi_pdev_set_param_cmd *cmd; 1365 struct sk_buff *skb; 1366 int ret; 1367 1368 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1369 if (!skb) 1370 return -ENOMEM; 1371 1372 cmd = (struct wmi_pdev_set_param_cmd *)skb->data; 1373 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD, 1374 sizeof(*cmd)); 1375 cmd->pdev_id = cpu_to_le32(pdev_id); 1376 cmd->param_id = cpu_to_le32(param_id); 1377 cmd->param_value = cpu_to_le32(param_value); 1378 1379 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1380 "WMI pdev set param %d pdev id %d value %d\n", 1381 param_id, pdev_id, param_value); 1382 1383 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID); 1384 if (ret) { 1385 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1386 dev_kfree_skb(skb); 1387 } 1388 1389 return ret; 1390 } 1391 1392 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable) 1393 { 1394 struct ath12k_wmi_pdev *wmi = ar->wmi; 1395 struct wmi_pdev_set_ps_mode_cmd *cmd; 1396 struct sk_buff *skb; 1397 int ret; 1398 1399 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1400 if (!skb) 1401 return -ENOMEM; 1402 1403 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data; 1404 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD, 1405 sizeof(*cmd)); 1406 cmd->vdev_id = cpu_to_le32(vdev_id); 1407 cmd->sta_ps_mode = cpu_to_le32(enable); 1408 1409 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1410 "WMI vdev set psmode %d vdev id %d\n", 1411 enable, vdev_id); 1412 1413 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID); 1414 if (ret) { 1415 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1416 dev_kfree_skb(skb); 1417 } 1418 1419 return ret; 1420 } 1421 1422 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 1423 u32 pdev_id) 1424 { 1425 struct ath12k_wmi_pdev *wmi = ar->wmi; 1426 struct wmi_pdev_suspend_cmd *cmd; 1427 struct sk_buff *skb; 1428 int ret; 1429 1430 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1431 if (!skb) 1432 return -ENOMEM; 1433 1434 cmd = (struct wmi_pdev_suspend_cmd *)skb->data; 1435 1436 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD, 1437 sizeof(*cmd)); 1438 1439 cmd->suspend_opt = cpu_to_le32(suspend_opt); 1440 cmd->pdev_id = cpu_to_le32(pdev_id); 1441 1442 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1443 "WMI pdev suspend pdev_id %d\n", pdev_id); 1444 1445 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID); 1446 if (ret) { 1447 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n"); 1448 dev_kfree_skb(skb); 1449 } 1450 1451 return ret; 1452 } 1453 1454 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id) 1455 { 1456 struct ath12k_wmi_pdev *wmi = ar->wmi; 1457 struct wmi_pdev_resume_cmd *cmd; 1458 struct sk_buff *skb; 1459 int ret; 1460 1461 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1462 if (!skb) 1463 return -ENOMEM; 1464 1465 cmd = (struct wmi_pdev_resume_cmd *)skb->data; 1466 1467 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD, 1468 sizeof(*cmd)); 1469 cmd->pdev_id = cpu_to_le32(pdev_id); 1470 1471 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1472 "WMI pdev resume pdev id %d\n", pdev_id); 1473 1474 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID); 1475 if (ret) { 1476 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n"); 1477 dev_kfree_skb(skb); 1478 } 1479 1480 return ret; 1481 } 1482 1483 /* TODO FW Support for the cmd is not available yet. 1484 * Can be tested once the command and corresponding 1485 * event is implemented in FW 1486 */ 1487 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 1488 enum wmi_bss_chan_info_req_type type) 1489 { 1490 struct ath12k_wmi_pdev *wmi = ar->wmi; 1491 struct wmi_pdev_bss_chan_info_req_cmd *cmd; 1492 struct sk_buff *skb; 1493 int ret; 1494 1495 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1496 if (!skb) 1497 return -ENOMEM; 1498 1499 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data; 1500 1501 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1502 sizeof(*cmd)); 1503 cmd->req_type = cpu_to_le32(type); 1504 1505 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1506 "WMI bss chan info req type %d\n", type); 1507 1508 ret = ath12k_wmi_cmd_send(wmi, skb, 1509 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID); 1510 if (ret) { 1511 ath12k_warn(ar->ab, 1512 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n"); 1513 dev_kfree_skb(skb); 1514 } 1515 1516 return ret; 1517 } 1518 1519 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 1520 struct ath12k_wmi_ap_ps_arg *arg) 1521 { 1522 struct ath12k_wmi_pdev *wmi = ar->wmi; 1523 struct wmi_ap_ps_peer_cmd *cmd; 1524 struct sk_buff *skb; 1525 int ret; 1526 1527 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1528 if (!skb) 1529 return -ENOMEM; 1530 1531 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; 1532 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD, 1533 sizeof(*cmd)); 1534 1535 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1536 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1537 cmd->param = cpu_to_le32(arg->param); 1538 cmd->value = cpu_to_le32(arg->value); 1539 1540 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1541 "WMI set ap ps vdev id %d peer %pM param %d value %d\n", 1542 arg->vdev_id, peer_addr, arg->param, arg->value); 1543 1544 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID); 1545 if (ret) { 1546 ath12k_warn(ar->ab, 1547 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n"); 1548 dev_kfree_skb(skb); 1549 } 1550 1551 return ret; 1552 } 1553 1554 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 1555 u32 param, u32 param_value) 1556 { 1557 struct ath12k_wmi_pdev *wmi = ar->wmi; 1558 struct wmi_sta_powersave_param_cmd *cmd; 1559 struct sk_buff *skb; 1560 int ret; 1561 1562 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1563 if (!skb) 1564 return -ENOMEM; 1565 1566 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; 1567 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1568 sizeof(*cmd)); 1569 1570 cmd->vdev_id = cpu_to_le32(vdev_id); 1571 cmd->param = cpu_to_le32(param); 1572 cmd->value = cpu_to_le32(param_value); 1573 1574 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1575 "WMI set sta ps vdev_id %d param %d value %d\n", 1576 vdev_id, param, param_value); 1577 1578 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID); 1579 if (ret) { 1580 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID"); 1581 dev_kfree_skb(skb); 1582 } 1583 1584 return ret; 1585 } 1586 1587 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms) 1588 { 1589 struct ath12k_wmi_pdev *wmi = ar->wmi; 1590 struct wmi_force_fw_hang_cmd *cmd; 1591 struct sk_buff *skb; 1592 int ret, len; 1593 1594 len = sizeof(*cmd); 1595 1596 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1597 if (!skb) 1598 return -ENOMEM; 1599 1600 cmd = (struct wmi_force_fw_hang_cmd *)skb->data; 1601 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD, 1602 len); 1603 1604 cmd->type = cpu_to_le32(type); 1605 cmd->delay_time_ms = cpu_to_le32(delay_time_ms); 1606 1607 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID); 1608 1609 if (ret) { 1610 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID"); 1611 dev_kfree_skb(skb); 1612 } 1613 return ret; 1614 } 1615 1616 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 1617 u32 param_id, u32 param_value) 1618 { 1619 struct ath12k_wmi_pdev *wmi = ar->wmi; 1620 struct wmi_vdev_set_param_cmd *cmd; 1621 struct sk_buff *skb; 1622 int ret; 1623 1624 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1625 if (!skb) 1626 return -ENOMEM; 1627 1628 cmd = (struct wmi_vdev_set_param_cmd *)skb->data; 1629 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD, 1630 sizeof(*cmd)); 1631 1632 cmd->vdev_id = cpu_to_le32(vdev_id); 1633 cmd->param_id = cpu_to_le32(param_id); 1634 cmd->param_value = cpu_to_le32(param_value); 1635 1636 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1637 "WMI vdev id 0x%x set param %d value %d\n", 1638 vdev_id, param_id, param_value); 1639 1640 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID); 1641 if (ret) { 1642 ath12k_warn(ar->ab, 1643 "failed to send WMI_VDEV_SET_PARAM_CMDID\n"); 1644 dev_kfree_skb(skb); 1645 } 1646 1647 return ret; 1648 } 1649 1650 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar) 1651 { 1652 struct ath12k_wmi_pdev *wmi = ar->wmi; 1653 struct wmi_get_pdev_temperature_cmd *cmd; 1654 struct sk_buff *skb; 1655 int ret; 1656 1657 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1658 if (!skb) 1659 return -ENOMEM; 1660 1661 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data; 1662 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1663 sizeof(*cmd)); 1664 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 1665 1666 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1667 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id); 1668 1669 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID); 1670 if (ret) { 1671 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n"); 1672 dev_kfree_skb(skb); 1673 } 1674 1675 return ret; 1676 } 1677 1678 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 1679 u32 vdev_id, u32 bcn_ctrl_op) 1680 { 1681 struct ath12k_wmi_pdev *wmi = ar->wmi; 1682 struct wmi_bcn_offload_ctrl_cmd *cmd; 1683 struct sk_buff *skb; 1684 int ret; 1685 1686 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1687 if (!skb) 1688 return -ENOMEM; 1689 1690 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data; 1691 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1692 sizeof(*cmd)); 1693 1694 cmd->vdev_id = cpu_to_le32(vdev_id); 1695 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op); 1696 1697 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1698 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n", 1699 vdev_id, bcn_ctrl_op); 1700 1701 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID); 1702 if (ret) { 1703 ath12k_warn(ar->ab, 1704 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n"); 1705 dev_kfree_skb(skb); 1706 } 1707 1708 return ret; 1709 } 1710 1711 int ath12k_wmi_bcn_tmpl(struct ath12k *ar, u32 vdev_id, 1712 struct ieee80211_mutable_offsets *offs, 1713 struct sk_buff *bcn) 1714 { 1715 struct ath12k_wmi_pdev *wmi = ar->wmi; 1716 struct wmi_bcn_tmpl_cmd *cmd; 1717 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info; 1718 struct wmi_tlv *tlv; 1719 struct sk_buff *skb; 1720 void *ptr; 1721 int ret, len; 1722 size_t aligned_len = roundup(bcn->len, 4); 1723 1724 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len; 1725 1726 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1727 if (!skb) 1728 return -ENOMEM; 1729 1730 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data; 1731 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD, 1732 sizeof(*cmd)); 1733 cmd->vdev_id = cpu_to_le32(vdev_id); 1734 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset); 1735 cmd->csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[0]); 1736 cmd->ext_csa_switch_count_offset = cpu_to_le32(offs->cntdwn_counter_offs[1]); 1737 cmd->buf_len = cpu_to_le32(bcn->len); 1738 1739 ptr = skb->data + sizeof(*cmd); 1740 1741 bcn_prb_info = ptr; 1742 len = sizeof(*bcn_prb_info); 1743 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 1744 len); 1745 bcn_prb_info->caps = 0; 1746 bcn_prb_info->erp = 0; 1747 1748 ptr += sizeof(*bcn_prb_info); 1749 1750 tlv = ptr; 1751 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 1752 memcpy(tlv->value, bcn->data, bcn->len); 1753 1754 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID); 1755 if (ret) { 1756 ath12k_warn(ar->ab, "failed to send WMI_BCN_TMPL_CMDID\n"); 1757 dev_kfree_skb(skb); 1758 } 1759 1760 return ret; 1761 } 1762 1763 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 1764 struct wmi_vdev_install_key_arg *arg) 1765 { 1766 struct ath12k_wmi_pdev *wmi = ar->wmi; 1767 struct wmi_vdev_install_key_cmd *cmd; 1768 struct wmi_tlv *tlv; 1769 struct sk_buff *skb; 1770 int ret, len, key_len_aligned; 1771 1772 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key 1773 * length is specified in cmd->key_len. 1774 */ 1775 key_len_aligned = roundup(arg->key_len, 4); 1776 1777 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned; 1778 1779 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1780 if (!skb) 1781 return -ENOMEM; 1782 1783 cmd = (struct wmi_vdev_install_key_cmd *)skb->data; 1784 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD, 1785 sizeof(*cmd)); 1786 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1787 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); 1788 cmd->key_idx = cpu_to_le32(arg->key_idx); 1789 cmd->key_flags = cpu_to_le32(arg->key_flags); 1790 cmd->key_cipher = cpu_to_le32(arg->key_cipher); 1791 cmd->key_len = cpu_to_le32(arg->key_len); 1792 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len); 1793 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len); 1794 1795 if (arg->key_rsc_counter) 1796 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter); 1797 1798 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 1799 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned); 1800 memcpy(tlv->value, arg->key_data, arg->key_len); 1801 1802 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1803 "WMI vdev install key idx %d cipher %d len %d\n", 1804 arg->key_idx, arg->key_cipher, arg->key_len); 1805 1806 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID); 1807 if (ret) { 1808 ath12k_warn(ar->ab, 1809 "failed to send WMI_VDEV_INSTALL_KEY cmd\n"); 1810 dev_kfree_skb(skb); 1811 } 1812 1813 return ret; 1814 } 1815 1816 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd, 1817 struct ath12k_wmi_peer_assoc_arg *arg, 1818 bool hw_crypto_disabled) 1819 { 1820 cmd->peer_flags = 0; 1821 cmd->peer_flags_ext = 0; 1822 1823 if (arg->is_wme_set) { 1824 if (arg->qos_flag) 1825 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS); 1826 if (arg->apsd_flag) 1827 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD); 1828 if (arg->ht_flag) 1829 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT); 1830 if (arg->bw_40) 1831 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ); 1832 if (arg->bw_80) 1833 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ); 1834 if (arg->bw_160) 1835 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ); 1836 if (arg->bw_320) 1837 cmd->peer_flags |= cpu_to_le32(WMI_PEER_EXT_320MHZ); 1838 1839 /* Typically if STBC is enabled for VHT it should be enabled 1840 * for HT as well 1841 **/ 1842 if (arg->stbc_flag) 1843 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC); 1844 1845 /* Typically if LDPC is enabled for VHT it should be enabled 1846 * for HT as well 1847 **/ 1848 if (arg->ldpc_flag) 1849 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC); 1850 1851 if (arg->static_mimops_flag) 1852 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS); 1853 if (arg->dynamic_mimops_flag) 1854 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS); 1855 if (arg->spatial_mux_flag) 1856 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX); 1857 if (arg->vht_flag) 1858 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT); 1859 if (arg->he_flag) 1860 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE); 1861 if (arg->twt_requester) 1862 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ); 1863 if (arg->twt_responder) 1864 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP); 1865 if (arg->eht_flag) 1866 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT); 1867 } 1868 1869 /* Suppress authorization for all AUTH modes that need 4-way handshake 1870 * (during re-association). 1871 * Authorization will be done for these modes on key installation. 1872 */ 1873 if (arg->auth_flag) 1874 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH); 1875 if (arg->need_ptk_4_way) { 1876 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY); 1877 if (!hw_crypto_disabled) 1878 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH); 1879 } 1880 if (arg->need_gtk_2_way) 1881 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY); 1882 /* safe mode bypass the 4-way handshake */ 1883 if (arg->safe_mode_enabled) 1884 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY | 1885 WMI_PEER_NEED_GTK_2_WAY)); 1886 1887 if (arg->is_pmf_enabled) 1888 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF); 1889 1890 /* Disable AMSDU for station transmit, if user configures it */ 1891 /* Disable AMSDU for AP transmit to 11n Stations, if user configures 1892 * it 1893 * if (arg->amsdu_disable) Add after FW support 1894 **/ 1895 1896 /* Target asserts if node is marked HT and all MCS is set to 0. 1897 * Mark the node as non-HT if all the mcs rates are disabled through 1898 * iwpriv 1899 **/ 1900 if (arg->peer_ht_rates.num_rates == 0) 1901 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT); 1902 } 1903 1904 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 1905 struct ath12k_wmi_peer_assoc_arg *arg) 1906 { 1907 struct ath12k_wmi_pdev *wmi = ar->wmi; 1908 struct wmi_peer_assoc_complete_cmd *cmd; 1909 struct ath12k_wmi_vht_rate_set_params *mcs; 1910 struct ath12k_wmi_he_rate_set_params *he_mcs; 1911 struct ath12k_wmi_eht_rate_set_params *eht_mcs; 1912 struct sk_buff *skb; 1913 struct wmi_tlv *tlv; 1914 void *ptr; 1915 u32 peer_legacy_rates_align; 1916 u32 peer_ht_rates_align; 1917 int i, ret, len; 1918 1919 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates, 1920 sizeof(u32)); 1921 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates, 1922 sizeof(u32)); 1923 1924 len = sizeof(*cmd) + 1925 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) + 1926 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) + 1927 sizeof(*mcs) + TLV_HDR_SIZE + 1928 (sizeof(*he_mcs) * arg->peer_he_mcs_count) + 1929 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count) + 1930 TLV_HDR_SIZE + TLV_HDR_SIZE; 1931 1932 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1933 if (!skb) 1934 return -ENOMEM; 1935 1936 ptr = skb->data; 1937 1938 cmd = ptr; 1939 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1940 sizeof(*cmd)); 1941 1942 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1943 1944 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc); 1945 cmd->peer_associd = cpu_to_le32(arg->peer_associd); 1946 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 1947 1948 ath12k_wmi_copy_peer_flags(cmd, arg, 1949 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, 1950 &ar->ab->dev_flags)); 1951 1952 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac); 1953 1954 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps); 1955 cmd->peer_caps = cpu_to_le32(arg->peer_caps); 1956 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval); 1957 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps); 1958 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu); 1959 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density); 1960 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps); 1961 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode); 1962 1963 /* Update 11ax capabilities */ 1964 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]); 1965 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]); 1966 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal); 1967 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz); 1968 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops); 1969 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 1970 cmd->peer_he_cap_phy[i] = 1971 cpu_to_le32(arg->peer_he_cap_phyinfo[i]); 1972 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1); 1973 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask); 1974 for (i = 0; i < WMI_MAX_NUM_SS; i++) 1975 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] = 1976 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]); 1977 1978 /* Update 11be capabilities */ 1979 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac), 1980 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac), 1981 0); 1982 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy), 1983 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy), 1984 0); 1985 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet), 1986 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0); 1987 1988 /* Update peer legacy rate information */ 1989 ptr += sizeof(*cmd); 1990 1991 tlv = ptr; 1992 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align); 1993 1994 ptr += TLV_HDR_SIZE; 1995 1996 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates); 1997 memcpy(ptr, arg->peer_legacy_rates.rates, 1998 arg->peer_legacy_rates.num_rates); 1999 2000 /* Update peer HT rate information */ 2001 ptr += peer_legacy_rates_align; 2002 2003 tlv = ptr; 2004 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align); 2005 ptr += TLV_HDR_SIZE; 2006 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates); 2007 memcpy(ptr, arg->peer_ht_rates.rates, 2008 arg->peer_ht_rates.num_rates); 2009 2010 /* VHT Rates */ 2011 ptr += peer_ht_rates_align; 2012 2013 mcs = ptr; 2014 2015 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET, 2016 sizeof(*mcs)); 2017 2018 cmd->peer_nss = cpu_to_le32(arg->peer_nss); 2019 2020 /* Update bandwidth-NSS mapping */ 2021 cmd->peer_bw_rxnss_override = 0; 2022 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override); 2023 2024 if (arg->vht_capable) { 2025 mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate); 2026 mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set); 2027 mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate); 2028 mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set); 2029 } 2030 2031 /* HE Rates */ 2032 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count); 2033 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate); 2034 2035 ptr += sizeof(*mcs); 2036 2037 len = arg->peer_he_mcs_count * sizeof(*he_mcs); 2038 2039 tlv = ptr; 2040 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2041 ptr += TLV_HDR_SIZE; 2042 2043 /* Loop through the HE rate set */ 2044 for (i = 0; i < arg->peer_he_mcs_count; i++) { 2045 he_mcs = ptr; 2046 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2047 sizeof(*he_mcs)); 2048 2049 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]); 2050 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]); 2051 ptr += sizeof(*he_mcs); 2052 } 2053 2054 /* MLO header tag with 0 length */ 2055 len = 0; 2056 tlv = ptr; 2057 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2058 ptr += TLV_HDR_SIZE; 2059 2060 /* Loop through the EHT rate set */ 2061 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs); 2062 tlv = ptr; 2063 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2064 ptr += TLV_HDR_SIZE; 2065 2066 for (i = 0; i < arg->peer_eht_mcs_count; i++) { 2067 eht_mcs = ptr; 2068 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2069 sizeof(*eht_mcs)); 2070 2071 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]); 2072 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]); 2073 ptr += sizeof(*eht_mcs); 2074 } 2075 2076 /* ML partner links tag with 0 length */ 2077 len = 0; 2078 tlv = ptr; 2079 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2080 ptr += TLV_HDR_SIZE; 2081 2082 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2083 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x\n", 2084 cmd->vdev_id, cmd->peer_associd, arg->peer_mac, 2085 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps, 2086 cmd->peer_listen_intval, cmd->peer_ht_caps, 2087 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode, 2088 cmd->peer_mpdu_density, 2089 cmd->peer_vht_caps, cmd->peer_he_cap_info, 2090 cmd->peer_he_ops, cmd->peer_he_cap_info_ext, 2091 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1], 2092 cmd->peer_he_cap_phy[2], 2093 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext, 2094 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1], 2095 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1], 2096 cmd->peer_eht_cap_phy[2]); 2097 2098 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID); 2099 if (ret) { 2100 ath12k_warn(ar->ab, 2101 "failed to send WMI_PEER_ASSOC_CMDID\n"); 2102 dev_kfree_skb(skb); 2103 } 2104 2105 return ret; 2106 } 2107 2108 void ath12k_wmi_start_scan_init(struct ath12k *ar, 2109 struct ath12k_wmi_scan_req_arg *arg) 2110 { 2111 /* setup commonly used values */ 2112 arg->scan_req_id = 1; 2113 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 2114 arg->dwell_time_active = 50; 2115 arg->dwell_time_active_2g = 0; 2116 arg->dwell_time_passive = 150; 2117 arg->dwell_time_active_6g = 40; 2118 arg->dwell_time_passive_6g = 30; 2119 arg->min_rest_time = 50; 2120 arg->max_rest_time = 500; 2121 arg->repeat_probe_time = 0; 2122 arg->probe_spacing_time = 0; 2123 arg->idle_time = 0; 2124 arg->max_scan_time = 20000; 2125 arg->probe_delay = 5; 2126 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | 2127 WMI_SCAN_EVENT_COMPLETED | 2128 WMI_SCAN_EVENT_BSS_CHANNEL | 2129 WMI_SCAN_EVENT_FOREIGN_CHAN | 2130 WMI_SCAN_EVENT_DEQUEUED; 2131 arg->scan_flags |= WMI_SCAN_CHAN_STAT_EVENT; 2132 arg->num_bssid = 1; 2133 2134 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be 2135 * ZEROs in probe request 2136 */ 2137 eth_broadcast_addr(arg->bssid_list[0].addr); 2138 } 2139 2140 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd, 2141 struct ath12k_wmi_scan_req_arg *arg) 2142 { 2143 /* Scan events subscription */ 2144 if (arg->scan_ev_started) 2145 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED); 2146 if (arg->scan_ev_completed) 2147 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED); 2148 if (arg->scan_ev_bss_chan) 2149 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL); 2150 if (arg->scan_ev_foreign_chan) 2151 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN); 2152 if (arg->scan_ev_dequeued) 2153 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED); 2154 if (arg->scan_ev_preempted) 2155 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED); 2156 if (arg->scan_ev_start_failed) 2157 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED); 2158 if (arg->scan_ev_restarted) 2159 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED); 2160 if (arg->scan_ev_foreign_chn_exit) 2161 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT); 2162 if (arg->scan_ev_suspended) 2163 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED); 2164 if (arg->scan_ev_resumed) 2165 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED); 2166 2167 /** Set scan control flags */ 2168 cmd->scan_ctrl_flags = 0; 2169 if (arg->scan_f_passive) 2170 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE); 2171 if (arg->scan_f_strict_passive_pch) 2172 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN); 2173 if (arg->scan_f_promisc_mode) 2174 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS); 2175 if (arg->scan_f_capture_phy_err) 2176 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR); 2177 if (arg->scan_f_half_rate) 2178 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT); 2179 if (arg->scan_f_quarter_rate) 2180 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT); 2181 if (arg->scan_f_cck_rates) 2182 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES); 2183 if (arg->scan_f_ofdm_rates) 2184 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES); 2185 if (arg->scan_f_chan_stat_evnt) 2186 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT); 2187 if (arg->scan_f_filter_prb_req) 2188 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ); 2189 if (arg->scan_f_bcast_probe) 2190 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ); 2191 if (arg->scan_f_offchan_mgmt_tx) 2192 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX); 2193 if (arg->scan_f_offchan_data_tx) 2194 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX); 2195 if (arg->scan_f_force_active_dfs_chn) 2196 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS); 2197 if (arg->scan_f_add_tpc_ie_in_probe) 2198 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ); 2199 if (arg->scan_f_add_ds_ie_in_probe) 2200 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ); 2201 if (arg->scan_f_add_spoofed_mac_in_probe) 2202 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ); 2203 if (arg->scan_f_add_rand_seq_in_probe) 2204 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ); 2205 if (arg->scan_f_en_ie_whitelist_in_probe) 2206 cmd->scan_ctrl_flags |= 2207 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ); 2208 2209 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode, 2210 WMI_SCAN_DWELL_MODE_MASK); 2211 } 2212 2213 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 2214 struct ath12k_wmi_scan_req_arg *arg) 2215 { 2216 struct ath12k_wmi_pdev *wmi = ar->wmi; 2217 struct wmi_start_scan_cmd *cmd; 2218 struct ath12k_wmi_ssid_params *ssid = NULL; 2219 struct ath12k_wmi_mac_addr_params *bssid; 2220 struct sk_buff *skb; 2221 struct wmi_tlv *tlv; 2222 void *ptr; 2223 int i, ret, len; 2224 u32 *tmp_ptr; 2225 u8 extraie_len_with_pad = 0; 2226 struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL; 2227 struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL; 2228 2229 len = sizeof(*cmd); 2230 2231 len += TLV_HDR_SIZE; 2232 if (arg->num_chan) 2233 len += arg->num_chan * sizeof(u32); 2234 2235 len += TLV_HDR_SIZE; 2236 if (arg->num_ssids) 2237 len += arg->num_ssids * sizeof(*ssid); 2238 2239 len += TLV_HDR_SIZE; 2240 if (arg->num_bssid) 2241 len += sizeof(*bssid) * arg->num_bssid; 2242 2243 len += TLV_HDR_SIZE; 2244 if (arg->extraie.len) 2245 extraie_len_with_pad = 2246 roundup(arg->extraie.len, sizeof(u32)); 2247 len += extraie_len_with_pad; 2248 2249 if (arg->num_hint_bssid) 2250 len += TLV_HDR_SIZE + 2251 arg->num_hint_bssid * sizeof(*hint_bssid); 2252 2253 if (arg->num_hint_s_ssid) 2254 len += TLV_HDR_SIZE + 2255 arg->num_hint_s_ssid * sizeof(*s_ssid); 2256 2257 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2258 if (!skb) 2259 return -ENOMEM; 2260 2261 ptr = skb->data; 2262 2263 cmd = ptr; 2264 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD, 2265 sizeof(*cmd)); 2266 2267 cmd->scan_id = cpu_to_le32(arg->scan_id); 2268 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id); 2269 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2270 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 2271 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events); 2272 2273 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg); 2274 2275 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active); 2276 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g); 2277 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive); 2278 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g); 2279 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g); 2280 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time); 2281 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time); 2282 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time); 2283 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time); 2284 cmd->idle_time = cpu_to_le32(arg->idle_time); 2285 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time); 2286 cmd->probe_delay = cpu_to_le32(arg->probe_delay); 2287 cmd->burst_duration = cpu_to_le32(arg->burst_duration); 2288 cmd->num_chan = cpu_to_le32(arg->num_chan); 2289 cmd->num_bssid = cpu_to_le32(arg->num_bssid); 2290 cmd->num_ssids = cpu_to_le32(arg->num_ssids); 2291 cmd->ie_len = cpu_to_le32(arg->extraie.len); 2292 cmd->n_probes = cpu_to_le32(arg->n_probes); 2293 2294 ptr += sizeof(*cmd); 2295 2296 len = arg->num_chan * sizeof(u32); 2297 2298 tlv = ptr; 2299 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len); 2300 ptr += TLV_HDR_SIZE; 2301 tmp_ptr = (u32 *)ptr; 2302 2303 memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4); 2304 2305 ptr += len; 2306 2307 len = arg->num_ssids * sizeof(*ssid); 2308 tlv = ptr; 2309 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2310 2311 ptr += TLV_HDR_SIZE; 2312 2313 if (arg->num_ssids) { 2314 ssid = ptr; 2315 for (i = 0; i < arg->num_ssids; ++i) { 2316 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len); 2317 memcpy(ssid->ssid, arg->ssid[i].ssid, 2318 arg->ssid[i].ssid_len); 2319 ssid++; 2320 } 2321 } 2322 2323 ptr += (arg->num_ssids * sizeof(*ssid)); 2324 len = arg->num_bssid * sizeof(*bssid); 2325 tlv = ptr; 2326 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2327 2328 ptr += TLV_HDR_SIZE; 2329 bssid = ptr; 2330 2331 if (arg->num_bssid) { 2332 for (i = 0; i < arg->num_bssid; ++i) { 2333 ether_addr_copy(bssid->addr, 2334 arg->bssid_list[i].addr); 2335 bssid++; 2336 } 2337 } 2338 2339 ptr += arg->num_bssid * sizeof(*bssid); 2340 2341 len = extraie_len_with_pad; 2342 tlv = ptr; 2343 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len); 2344 ptr += TLV_HDR_SIZE; 2345 2346 if (arg->extraie.len) 2347 memcpy(ptr, arg->extraie.ptr, 2348 arg->extraie.len); 2349 2350 ptr += extraie_len_with_pad; 2351 2352 if (arg->num_hint_s_ssid) { 2353 len = arg->num_hint_s_ssid * sizeof(*s_ssid); 2354 tlv = ptr; 2355 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2356 ptr += TLV_HDR_SIZE; 2357 s_ssid = ptr; 2358 for (i = 0; i < arg->num_hint_s_ssid; ++i) { 2359 s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags; 2360 s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid; 2361 s_ssid++; 2362 } 2363 ptr += len; 2364 } 2365 2366 if (arg->num_hint_bssid) { 2367 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg); 2368 tlv = ptr; 2369 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2370 ptr += TLV_HDR_SIZE; 2371 hint_bssid = ptr; 2372 for (i = 0; i < arg->num_hint_bssid; ++i) { 2373 hint_bssid->freq_flags = 2374 arg->hint_bssid[i].freq_flags; 2375 ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0], 2376 &hint_bssid->bssid.addr[0]); 2377 hint_bssid++; 2378 } 2379 } 2380 2381 ret = ath12k_wmi_cmd_send(wmi, skb, 2382 WMI_START_SCAN_CMDID); 2383 if (ret) { 2384 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n"); 2385 dev_kfree_skb(skb); 2386 } 2387 2388 return ret; 2389 } 2390 2391 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 2392 struct ath12k_wmi_scan_cancel_arg *arg) 2393 { 2394 struct ath12k_wmi_pdev *wmi = ar->wmi; 2395 struct wmi_stop_scan_cmd *cmd; 2396 struct sk_buff *skb; 2397 int ret; 2398 2399 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2400 if (!skb) 2401 return -ENOMEM; 2402 2403 cmd = (struct wmi_stop_scan_cmd *)skb->data; 2404 2405 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD, 2406 sizeof(*cmd)); 2407 2408 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2409 cmd->requestor = cpu_to_le32(arg->requester); 2410 cmd->scan_id = cpu_to_le32(arg->scan_id); 2411 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2412 /* stop the scan with the corresponding scan_id */ 2413 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) { 2414 /* Cancelling all scans */ 2415 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL); 2416 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) { 2417 /* Cancelling VAP scans */ 2418 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL); 2419 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) { 2420 /* Cancelling specific scan */ 2421 cmd->req_type = WMI_SCAN_STOP_ONE; 2422 } else { 2423 ath12k_warn(ar->ab, "invalid scan cancel req_type %d", 2424 arg->req_type); 2425 dev_kfree_skb(skb); 2426 return -EINVAL; 2427 } 2428 2429 ret = ath12k_wmi_cmd_send(wmi, skb, 2430 WMI_STOP_SCAN_CMDID); 2431 if (ret) { 2432 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n"); 2433 dev_kfree_skb(skb); 2434 } 2435 2436 return ret; 2437 } 2438 2439 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 2440 struct ath12k_wmi_scan_chan_list_arg *arg) 2441 { 2442 struct ath12k_wmi_pdev *wmi = ar->wmi; 2443 struct wmi_scan_chan_list_cmd *cmd; 2444 struct sk_buff *skb; 2445 struct ath12k_wmi_channel_params *chan_info; 2446 struct ath12k_wmi_channel_arg *channel_arg; 2447 struct wmi_tlv *tlv; 2448 void *ptr; 2449 int i, ret, len; 2450 u16 num_send_chans, num_sends = 0, max_chan_limit = 0; 2451 __le32 *reg1, *reg2; 2452 2453 channel_arg = &arg->channel[0]; 2454 while (arg->nallchans) { 2455 len = sizeof(*cmd) + TLV_HDR_SIZE; 2456 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) / 2457 sizeof(*chan_info); 2458 2459 num_send_chans = min(arg->nallchans, max_chan_limit); 2460 2461 arg->nallchans -= num_send_chans; 2462 len += sizeof(*chan_info) * num_send_chans; 2463 2464 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2465 if (!skb) 2466 return -ENOMEM; 2467 2468 cmd = (struct wmi_scan_chan_list_cmd *)skb->data; 2469 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD, 2470 sizeof(*cmd)); 2471 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2472 cmd->num_scan_chans = cpu_to_le32(num_send_chans); 2473 if (num_sends) 2474 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG); 2475 2476 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2477 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n", 2478 num_send_chans, len, cmd->pdev_id, num_sends); 2479 2480 ptr = skb->data + sizeof(*cmd); 2481 2482 len = sizeof(*chan_info) * num_send_chans; 2483 tlv = ptr; 2484 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT, 2485 len); 2486 ptr += TLV_HDR_SIZE; 2487 2488 for (i = 0; i < num_send_chans; ++i) { 2489 chan_info = ptr; 2490 memset(chan_info, 0, sizeof(*chan_info)); 2491 len = sizeof(*chan_info); 2492 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 2493 len); 2494 2495 reg1 = &chan_info->reg_info_1; 2496 reg2 = &chan_info->reg_info_2; 2497 chan_info->mhz = cpu_to_le32(channel_arg->mhz); 2498 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1); 2499 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2); 2500 2501 if (channel_arg->is_chan_passive) 2502 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 2503 if (channel_arg->allow_he) 2504 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 2505 else if (channel_arg->allow_vht) 2506 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 2507 else if (channel_arg->allow_ht) 2508 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 2509 if (channel_arg->half_rate) 2510 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE); 2511 if (channel_arg->quarter_rate) 2512 chan_info->info |= 2513 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE); 2514 2515 if (channel_arg->psc_channel) 2516 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC); 2517 2518 if (channel_arg->dfs_set) 2519 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 2520 2521 chan_info->info |= le32_encode_bits(channel_arg->phy_mode, 2522 WMI_CHAN_INFO_MODE); 2523 *reg1 |= le32_encode_bits(channel_arg->minpower, 2524 WMI_CHAN_REG_INFO1_MIN_PWR); 2525 *reg1 |= le32_encode_bits(channel_arg->maxpower, 2526 WMI_CHAN_REG_INFO1_MAX_PWR); 2527 *reg1 |= le32_encode_bits(channel_arg->maxregpower, 2528 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 2529 *reg1 |= le32_encode_bits(channel_arg->reg_class_id, 2530 WMI_CHAN_REG_INFO1_REG_CLS); 2531 *reg2 |= le32_encode_bits(channel_arg->antennamax, 2532 WMI_CHAN_REG_INFO2_ANT_MAX); 2533 2534 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2535 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n", 2536 i, chan_info->mhz, chan_info->info); 2537 2538 ptr += sizeof(*chan_info); 2539 2540 channel_arg++; 2541 } 2542 2543 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID); 2544 if (ret) { 2545 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n"); 2546 dev_kfree_skb(skb); 2547 return ret; 2548 } 2549 2550 num_sends++; 2551 } 2552 2553 return 0; 2554 } 2555 2556 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 2557 struct wmi_wmm_params_all_arg *param) 2558 { 2559 struct ath12k_wmi_pdev *wmi = ar->wmi; 2560 struct wmi_vdev_set_wmm_params_cmd *cmd; 2561 struct wmi_wmm_params *wmm_param; 2562 struct wmi_wmm_params_arg *wmi_wmm_arg; 2563 struct sk_buff *skb; 2564 int ret, ac; 2565 2566 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2567 if (!skb) 2568 return -ENOMEM; 2569 2570 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data; 2571 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2572 sizeof(*cmd)); 2573 2574 cmd->vdev_id = cpu_to_le32(vdev_id); 2575 cmd->wmm_param_type = 0; 2576 2577 for (ac = 0; ac < WME_NUM_AC; ac++) { 2578 switch (ac) { 2579 case WME_AC_BE: 2580 wmi_wmm_arg = ¶m->ac_be; 2581 break; 2582 case WME_AC_BK: 2583 wmi_wmm_arg = ¶m->ac_bk; 2584 break; 2585 case WME_AC_VI: 2586 wmi_wmm_arg = ¶m->ac_vi; 2587 break; 2588 case WME_AC_VO: 2589 wmi_wmm_arg = ¶m->ac_vo; 2590 break; 2591 } 2592 2593 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac]; 2594 wmm_param->tlv_header = 2595 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2596 sizeof(*wmm_param)); 2597 2598 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs); 2599 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin); 2600 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax); 2601 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop); 2602 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm); 2603 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack); 2604 2605 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2606 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n", 2607 ac, wmm_param->aifs, wmm_param->cwmin, 2608 wmm_param->cwmax, wmm_param->txoplimit, 2609 wmm_param->acm, wmm_param->no_ack); 2610 } 2611 ret = ath12k_wmi_cmd_send(wmi, skb, 2612 WMI_VDEV_SET_WMM_PARAMS_CMDID); 2613 if (ret) { 2614 ath12k_warn(ar->ab, 2615 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID"); 2616 dev_kfree_skb(skb); 2617 } 2618 2619 return ret; 2620 } 2621 2622 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 2623 u32 pdev_id) 2624 { 2625 struct ath12k_wmi_pdev *wmi = ar->wmi; 2626 struct wmi_dfs_phyerr_offload_cmd *cmd; 2627 struct sk_buff *skb; 2628 int ret; 2629 2630 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2631 if (!skb) 2632 return -ENOMEM; 2633 2634 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data; 2635 cmd->tlv_header = 2636 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 2637 sizeof(*cmd)); 2638 2639 cmd->pdev_id = cpu_to_le32(pdev_id); 2640 2641 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2642 "WMI dfs phy err offload enable pdev id %d\n", pdev_id); 2643 2644 ret = ath12k_wmi_cmd_send(wmi, skb, 2645 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID); 2646 if (ret) { 2647 ath12k_warn(ar->ab, 2648 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n"); 2649 dev_kfree_skb(skb); 2650 } 2651 2652 return ret; 2653 } 2654 2655 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2656 u32 tid, u32 initiator, u32 reason) 2657 { 2658 struct ath12k_wmi_pdev *wmi = ar->wmi; 2659 struct wmi_delba_send_cmd *cmd; 2660 struct sk_buff *skb; 2661 int ret; 2662 2663 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2664 if (!skb) 2665 return -ENOMEM; 2666 2667 cmd = (struct wmi_delba_send_cmd *)skb->data; 2668 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD, 2669 sizeof(*cmd)); 2670 cmd->vdev_id = cpu_to_le32(vdev_id); 2671 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2672 cmd->tid = cpu_to_le32(tid); 2673 cmd->initiator = cpu_to_le32(initiator); 2674 cmd->reasoncode = cpu_to_le32(reason); 2675 2676 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2677 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", 2678 vdev_id, mac, tid, initiator, reason); 2679 2680 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID); 2681 2682 if (ret) { 2683 ath12k_warn(ar->ab, 2684 "failed to send WMI_DELBA_SEND_CMDID cmd\n"); 2685 dev_kfree_skb(skb); 2686 } 2687 2688 return ret; 2689 } 2690 2691 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2692 u32 tid, u32 status) 2693 { 2694 struct ath12k_wmi_pdev *wmi = ar->wmi; 2695 struct wmi_addba_setresponse_cmd *cmd; 2696 struct sk_buff *skb; 2697 int ret; 2698 2699 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2700 if (!skb) 2701 return -ENOMEM; 2702 2703 cmd = (struct wmi_addba_setresponse_cmd *)skb->data; 2704 cmd->tlv_header = 2705 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD, 2706 sizeof(*cmd)); 2707 cmd->vdev_id = cpu_to_le32(vdev_id); 2708 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2709 cmd->tid = cpu_to_le32(tid); 2710 cmd->statuscode = cpu_to_le32(status); 2711 2712 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2713 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", 2714 vdev_id, mac, tid, status); 2715 2716 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID); 2717 2718 if (ret) { 2719 ath12k_warn(ar->ab, 2720 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n"); 2721 dev_kfree_skb(skb); 2722 } 2723 2724 return ret; 2725 } 2726 2727 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 2728 u32 tid, u32 buf_size) 2729 { 2730 struct ath12k_wmi_pdev *wmi = ar->wmi; 2731 struct wmi_addba_send_cmd *cmd; 2732 struct sk_buff *skb; 2733 int ret; 2734 2735 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2736 if (!skb) 2737 return -ENOMEM; 2738 2739 cmd = (struct wmi_addba_send_cmd *)skb->data; 2740 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD, 2741 sizeof(*cmd)); 2742 cmd->vdev_id = cpu_to_le32(vdev_id); 2743 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2744 cmd->tid = cpu_to_le32(tid); 2745 cmd->buffersize = cpu_to_le32(buf_size); 2746 2747 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2748 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", 2749 vdev_id, mac, tid, buf_size); 2750 2751 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID); 2752 2753 if (ret) { 2754 ath12k_warn(ar->ab, 2755 "failed to send WMI_ADDBA_SEND_CMDID cmd\n"); 2756 dev_kfree_skb(skb); 2757 } 2758 2759 return ret; 2760 } 2761 2762 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac) 2763 { 2764 struct ath12k_wmi_pdev *wmi = ar->wmi; 2765 struct wmi_addba_clear_resp_cmd *cmd; 2766 struct sk_buff *skb; 2767 int ret; 2768 2769 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2770 if (!skb) 2771 return -ENOMEM; 2772 2773 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; 2774 cmd->tlv_header = 2775 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD, 2776 sizeof(*cmd)); 2777 cmd->vdev_id = cpu_to_le32(vdev_id); 2778 ether_addr_copy(cmd->peer_macaddr.addr, mac); 2779 2780 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2781 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", 2782 vdev_id, mac); 2783 2784 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID); 2785 2786 if (ret) { 2787 ath12k_warn(ar->ab, 2788 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n"); 2789 dev_kfree_skb(skb); 2790 } 2791 2792 return ret; 2793 } 2794 2795 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 2796 struct ath12k_wmi_init_country_arg *arg) 2797 { 2798 struct ath12k_wmi_pdev *wmi = ar->wmi; 2799 struct wmi_init_country_cmd *cmd; 2800 struct sk_buff *skb; 2801 int ret; 2802 2803 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2804 if (!skb) 2805 return -ENOMEM; 2806 2807 cmd = (struct wmi_init_country_cmd *)skb->data; 2808 cmd->tlv_header = 2809 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD, 2810 sizeof(*cmd)); 2811 2812 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 2813 2814 switch (arg->flags) { 2815 case ALPHA_IS_SET: 2816 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA; 2817 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3); 2818 break; 2819 case CC_IS_SET: 2820 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE); 2821 cmd->cc_info.country_code = 2822 cpu_to_le32(arg->cc_info.country_code); 2823 break; 2824 case REGDMN_IS_SET: 2825 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN); 2826 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id); 2827 break; 2828 default: 2829 ret = -EINVAL; 2830 goto out; 2831 } 2832 2833 ret = ath12k_wmi_cmd_send(wmi, skb, 2834 WMI_SET_INIT_COUNTRY_CMDID); 2835 2836 out: 2837 if (ret) { 2838 ath12k_warn(ar->ab, 2839 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n", 2840 ret); 2841 dev_kfree_skb(skb); 2842 } 2843 2844 return ret; 2845 } 2846 2847 int 2848 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id) 2849 { 2850 struct ath12k_wmi_pdev *wmi = ar->wmi; 2851 struct ath12k_base *ab = wmi->wmi_ab->ab; 2852 struct wmi_twt_enable_params_cmd *cmd; 2853 struct sk_buff *skb; 2854 int ret, len; 2855 2856 len = sizeof(*cmd); 2857 2858 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2859 if (!skb) 2860 return -ENOMEM; 2861 2862 cmd = (struct wmi_twt_enable_params_cmd *)skb->data; 2863 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD, 2864 len); 2865 cmd->pdev_id = cpu_to_le32(pdev_id); 2866 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS); 2867 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE); 2868 cmd->congestion_thresh_setup = 2869 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP); 2870 cmd->congestion_thresh_teardown = 2871 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN); 2872 cmd->congestion_thresh_critical = 2873 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL); 2874 cmd->interference_thresh_teardown = 2875 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN); 2876 cmd->interference_thresh_setup = 2877 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP); 2878 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP); 2879 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN); 2880 cmd->no_of_bcast_mcast_slots = 2881 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS); 2882 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS); 2883 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT); 2884 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL); 2885 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL); 2886 cmd->remove_sta_slot_interval = 2887 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL); 2888 /* TODO add MBSSID support */ 2889 cmd->mbss_support = 0; 2890 2891 ret = ath12k_wmi_cmd_send(wmi, skb, 2892 WMI_TWT_ENABLE_CMDID); 2893 if (ret) { 2894 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID"); 2895 dev_kfree_skb(skb); 2896 } 2897 return ret; 2898 } 2899 2900 int 2901 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id) 2902 { 2903 struct ath12k_wmi_pdev *wmi = ar->wmi; 2904 struct ath12k_base *ab = wmi->wmi_ab->ab; 2905 struct wmi_twt_disable_params_cmd *cmd; 2906 struct sk_buff *skb; 2907 int ret, len; 2908 2909 len = sizeof(*cmd); 2910 2911 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2912 if (!skb) 2913 return -ENOMEM; 2914 2915 cmd = (struct wmi_twt_disable_params_cmd *)skb->data; 2916 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD, 2917 len); 2918 cmd->pdev_id = cpu_to_le32(pdev_id); 2919 2920 ret = ath12k_wmi_cmd_send(wmi, skb, 2921 WMI_TWT_DISABLE_CMDID); 2922 if (ret) { 2923 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID"); 2924 dev_kfree_skb(skb); 2925 } 2926 return ret; 2927 } 2928 2929 int 2930 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 2931 struct ieee80211_he_obss_pd *he_obss_pd) 2932 { 2933 struct ath12k_wmi_pdev *wmi = ar->wmi; 2934 struct ath12k_base *ab = wmi->wmi_ab->ab; 2935 struct wmi_obss_spatial_reuse_params_cmd *cmd; 2936 struct sk_buff *skb; 2937 int ret, len; 2938 2939 len = sizeof(*cmd); 2940 2941 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2942 if (!skb) 2943 return -ENOMEM; 2944 2945 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data; 2946 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 2947 len); 2948 cmd->vdev_id = cpu_to_le32(vdev_id); 2949 cmd->enable = cpu_to_le32(he_obss_pd->enable); 2950 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset); 2951 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset); 2952 2953 ret = ath12k_wmi_cmd_send(wmi, skb, 2954 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID); 2955 if (ret) { 2956 ath12k_warn(ab, 2957 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID"); 2958 dev_kfree_skb(skb); 2959 } 2960 return ret; 2961 } 2962 2963 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 2964 u8 bss_color, u32 period, 2965 bool enable) 2966 { 2967 struct ath12k_wmi_pdev *wmi = ar->wmi; 2968 struct ath12k_base *ab = wmi->wmi_ab->ab; 2969 struct wmi_obss_color_collision_cfg_params_cmd *cmd; 2970 struct sk_buff *skb; 2971 int ret, len; 2972 2973 len = sizeof(*cmd); 2974 2975 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2976 if (!skb) 2977 return -ENOMEM; 2978 2979 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data; 2980 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 2981 len); 2982 cmd->vdev_id = cpu_to_le32(vdev_id); 2983 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) : 2984 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE); 2985 cmd->current_bss_color = cpu_to_le32(bss_color); 2986 cmd->detection_period_ms = cpu_to_le32(period); 2987 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS); 2988 cmd->free_slot_expiry_time_ms = 0; 2989 cmd->flags = 0; 2990 2991 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2992 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n", 2993 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color, 2994 cmd->detection_period_ms, cmd->scan_period_ms); 2995 2996 ret = ath12k_wmi_cmd_send(wmi, skb, 2997 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID); 2998 if (ret) { 2999 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID"); 3000 dev_kfree_skb(skb); 3001 } 3002 return ret; 3003 } 3004 3005 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 3006 bool enable) 3007 { 3008 struct ath12k_wmi_pdev *wmi = ar->wmi; 3009 struct ath12k_base *ab = wmi->wmi_ab->ab; 3010 struct wmi_bss_color_change_enable_params_cmd *cmd; 3011 struct sk_buff *skb; 3012 int ret, len; 3013 3014 len = sizeof(*cmd); 3015 3016 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3017 if (!skb) 3018 return -ENOMEM; 3019 3020 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data; 3021 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 3022 len); 3023 cmd->vdev_id = cpu_to_le32(vdev_id); 3024 cmd->enable = enable ? cpu_to_le32(1) : 0; 3025 3026 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3027 "wmi_send_bss_color_change_enable id %d enable %d\n", 3028 cmd->vdev_id, cmd->enable); 3029 3030 ret = ath12k_wmi_cmd_send(wmi, skb, 3031 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID); 3032 if (ret) { 3033 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID"); 3034 dev_kfree_skb(skb); 3035 } 3036 return ret; 3037 } 3038 3039 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 3040 struct sk_buff *tmpl) 3041 { 3042 struct wmi_tlv *tlv; 3043 struct sk_buff *skb; 3044 void *ptr; 3045 int ret, len; 3046 size_t aligned_len; 3047 struct wmi_fils_discovery_tmpl_cmd *cmd; 3048 3049 aligned_len = roundup(tmpl->len, 4); 3050 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 3051 3052 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3053 "WMI vdev %i set FILS discovery template\n", vdev_id); 3054 3055 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3056 if (!skb) 3057 return -ENOMEM; 3058 3059 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data; 3060 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD, 3061 sizeof(*cmd)); 3062 cmd->vdev_id = cpu_to_le32(vdev_id); 3063 cmd->buf_len = cpu_to_le32(tmpl->len); 3064 ptr = skb->data + sizeof(*cmd); 3065 3066 tlv = ptr; 3067 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3068 memcpy(tlv->value, tmpl->data, tmpl->len); 3069 3070 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID); 3071 if (ret) { 3072 ath12k_warn(ar->ab, 3073 "WMI vdev %i failed to send FILS discovery template command\n", 3074 vdev_id); 3075 dev_kfree_skb(skb); 3076 } 3077 return ret; 3078 } 3079 3080 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 3081 struct sk_buff *tmpl) 3082 { 3083 struct wmi_probe_tmpl_cmd *cmd; 3084 struct ath12k_wmi_bcn_prb_info_params *probe_info; 3085 struct wmi_tlv *tlv; 3086 struct sk_buff *skb; 3087 void *ptr; 3088 int ret, len; 3089 size_t aligned_len = roundup(tmpl->len, 4); 3090 3091 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3092 "WMI vdev %i set probe response template\n", vdev_id); 3093 3094 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len; 3095 3096 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3097 if (!skb) 3098 return -ENOMEM; 3099 3100 cmd = (struct wmi_probe_tmpl_cmd *)skb->data; 3101 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD, 3102 sizeof(*cmd)); 3103 cmd->vdev_id = cpu_to_le32(vdev_id); 3104 cmd->buf_len = cpu_to_le32(tmpl->len); 3105 3106 ptr = skb->data + sizeof(*cmd); 3107 3108 probe_info = ptr; 3109 len = sizeof(*probe_info); 3110 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 3111 len); 3112 probe_info->caps = 0; 3113 probe_info->erp = 0; 3114 3115 ptr += sizeof(*probe_info); 3116 3117 tlv = ptr; 3118 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3119 memcpy(tlv->value, tmpl->data, tmpl->len); 3120 3121 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID); 3122 if (ret) { 3123 ath12k_warn(ar->ab, 3124 "WMI vdev %i failed to send probe response template command\n", 3125 vdev_id); 3126 dev_kfree_skb(skb); 3127 } 3128 return ret; 3129 } 3130 3131 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 3132 bool unsol_bcast_probe_resp_enabled) 3133 { 3134 struct sk_buff *skb; 3135 int ret, len; 3136 struct wmi_fils_discovery_cmd *cmd; 3137 3138 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3139 "WMI vdev %i set %s interval to %u TU\n", 3140 vdev_id, unsol_bcast_probe_resp_enabled ? 3141 "unsolicited broadcast probe response" : "FILS discovery", 3142 interval); 3143 3144 len = sizeof(*cmd); 3145 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3146 if (!skb) 3147 return -ENOMEM; 3148 3149 cmd = (struct wmi_fils_discovery_cmd *)skb->data; 3150 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD, 3151 len); 3152 cmd->vdev_id = cpu_to_le32(vdev_id); 3153 cmd->interval = cpu_to_le32(interval); 3154 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled); 3155 3156 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID); 3157 if (ret) { 3158 ath12k_warn(ar->ab, 3159 "WMI vdev %i failed to send FILS discovery enable/disable command\n", 3160 vdev_id); 3161 dev_kfree_skb(skb); 3162 } 3163 return ret; 3164 } 3165 3166 static void 3167 ath12k_fill_band_to_mac_param(struct ath12k_base *soc, 3168 struct ath12k_wmi_pdev_band_arg *arg) 3169 { 3170 u8 i; 3171 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap; 3172 struct ath12k_pdev *pdev; 3173 3174 for (i = 0; i < soc->num_radios; i++) { 3175 pdev = &soc->pdevs[i]; 3176 hal_reg_cap = &soc->hal_reg_cap[i]; 3177 arg[i].pdev_id = pdev->pdev_id; 3178 3179 switch (pdev->cap.supported_bands) { 3180 case WMI_HOST_WLAN_2G_5G_CAP: 3181 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3182 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3183 break; 3184 case WMI_HOST_WLAN_2G_CAP: 3185 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3186 arg[i].end_freq = hal_reg_cap->high_2ghz_chan; 3187 break; 3188 case WMI_HOST_WLAN_5G_CAP: 3189 arg[i].start_freq = hal_reg_cap->low_5ghz_chan; 3190 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3191 break; 3192 default: 3193 break; 3194 } 3195 } 3196 } 3197 3198 static void 3199 ath12k_wmi_copy_resource_config(struct ath12k_wmi_resource_config_params *wmi_cfg, 3200 struct ath12k_wmi_resource_config_arg *tg_cfg) 3201 { 3202 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs); 3203 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers); 3204 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers); 3205 wmi_cfg->num_offload_reorder_buffs = 3206 cpu_to_le32(tg_cfg->num_offload_reorder_buffs); 3207 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys); 3208 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids); 3209 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit); 3210 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask); 3211 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask); 3212 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]); 3213 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]); 3214 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]); 3215 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]); 3216 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode); 3217 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req); 3218 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev); 3219 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev); 3220 wmi_cfg->roam_offload_max_ap_profiles = 3221 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles); 3222 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups); 3223 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems); 3224 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode); 3225 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size); 3226 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries); 3227 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size); 3228 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim); 3229 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check = 3230 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check); 3231 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config); 3232 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev); 3233 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc); 3234 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries); 3235 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs); 3236 wmi_cfg->num_tdls_conn_table_entries = 3237 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries); 3238 wmi_cfg->beacon_tx_offload_max_vdev = 3239 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev); 3240 wmi_cfg->num_multicast_filter_entries = 3241 cpu_to_le32(tg_cfg->num_multicast_filter_entries); 3242 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters); 3243 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern); 3244 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size); 3245 wmi_cfg->max_tdls_concurrent_sleep_sta = 3246 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta); 3247 wmi_cfg->max_tdls_concurrent_buffer_sta = 3248 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta); 3249 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate); 3250 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs); 3251 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels); 3252 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules); 3253 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size); 3254 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters); 3255 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id); 3256 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config); 3257 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version); 3258 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params); 3259 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count); 3260 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count); 3261 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported << 3262 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT); 3263 } 3264 3265 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi, 3266 struct ath12k_wmi_init_cmd_arg *arg) 3267 { 3268 struct ath12k_base *ab = wmi->wmi_ab->ab; 3269 struct sk_buff *skb; 3270 struct wmi_init_cmd *cmd; 3271 struct ath12k_wmi_resource_config_params *cfg; 3272 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode; 3273 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac; 3274 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks; 3275 struct wmi_tlv *tlv; 3276 size_t ret, len; 3277 void *ptr; 3278 u32 hw_mode_len = 0; 3279 u16 idx; 3280 3281 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) 3282 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE + 3283 (arg->num_band_to_mac * sizeof(*band_to_mac)); 3284 3285 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len + 3286 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0); 3287 3288 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3289 if (!skb) 3290 return -ENOMEM; 3291 3292 cmd = (struct wmi_init_cmd *)skb->data; 3293 3294 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD, 3295 sizeof(*cmd)); 3296 3297 ptr = skb->data + sizeof(*cmd); 3298 cfg = ptr; 3299 3300 ath12k_wmi_copy_resource_config(cfg, &arg->res_cfg); 3301 3302 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG, 3303 sizeof(*cfg)); 3304 3305 ptr += sizeof(*cfg); 3306 host_mem_chunks = ptr + TLV_HDR_SIZE; 3307 len = sizeof(struct ath12k_wmi_host_mem_chunk_params); 3308 3309 for (idx = 0; idx < arg->num_mem_chunks; ++idx) { 3310 host_mem_chunks[idx].tlv_header = 3311 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 3312 len); 3313 3314 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr); 3315 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len); 3316 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id); 3317 3318 ath12k_dbg(ab, ATH12K_DBG_WMI, 3319 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n", 3320 arg->mem_chunks[idx].req_id, 3321 (u64)arg->mem_chunks[idx].paddr, 3322 arg->mem_chunks[idx].len); 3323 } 3324 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks); 3325 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks; 3326 3327 /* num_mem_chunks is zero */ 3328 tlv = ptr; 3329 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3330 ptr += TLV_HDR_SIZE + len; 3331 3332 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) { 3333 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr; 3334 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 3335 sizeof(*hw_mode)); 3336 3337 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id); 3338 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac); 3339 3340 ptr += sizeof(*hw_mode); 3341 3342 len = arg->num_band_to_mac * sizeof(*band_to_mac); 3343 tlv = ptr; 3344 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3345 3346 ptr += TLV_HDR_SIZE; 3347 len = sizeof(*band_to_mac); 3348 3349 for (idx = 0; idx < arg->num_band_to_mac; idx++) { 3350 band_to_mac = (void *)ptr; 3351 3352 band_to_mac->tlv_header = 3353 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC, 3354 len); 3355 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id); 3356 band_to_mac->start_freq = 3357 cpu_to_le32(arg->band_to_mac[idx].start_freq); 3358 band_to_mac->end_freq = 3359 cpu_to_le32(arg->band_to_mac[idx].end_freq); 3360 ptr += sizeof(*band_to_mac); 3361 } 3362 } 3363 3364 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID); 3365 if (ret) { 3366 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n"); 3367 dev_kfree_skb(skb); 3368 } 3369 3370 return ret; 3371 } 3372 3373 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, 3374 int pdev_id) 3375 { 3376 struct ath12k_wmi_pdev_lro_config_cmd *cmd; 3377 struct sk_buff *skb; 3378 int ret; 3379 3380 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3381 if (!skb) 3382 return -ENOMEM; 3383 3384 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data; 3385 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD, 3386 sizeof(*cmd)); 3387 3388 get_random_bytes(cmd->th_4, sizeof(cmd->th_4)); 3389 get_random_bytes(cmd->th_6, sizeof(cmd->th_6)); 3390 3391 cmd->pdev_id = cpu_to_le32(pdev_id); 3392 3393 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3394 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id); 3395 3396 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID); 3397 if (ret) { 3398 ath12k_warn(ar->ab, 3399 "failed to send lro cfg req wmi cmd\n"); 3400 goto err; 3401 } 3402 3403 return 0; 3404 err: 3405 dev_kfree_skb(skb); 3406 return ret; 3407 } 3408 3409 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab) 3410 { 3411 unsigned long time_left; 3412 3413 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready, 3414 WMI_SERVICE_READY_TIMEOUT_HZ); 3415 if (!time_left) 3416 return -ETIMEDOUT; 3417 3418 return 0; 3419 } 3420 3421 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab) 3422 { 3423 unsigned long time_left; 3424 3425 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready, 3426 WMI_SERVICE_READY_TIMEOUT_HZ); 3427 if (!time_left) 3428 return -ETIMEDOUT; 3429 3430 return 0; 3431 } 3432 3433 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 3434 enum wmi_host_hw_mode_config_type mode) 3435 { 3436 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd; 3437 struct sk_buff *skb; 3438 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3439 int len; 3440 int ret; 3441 3442 len = sizeof(*cmd); 3443 3444 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3445 if (!skb) 3446 return -ENOMEM; 3447 3448 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data; 3449 3450 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 3451 sizeof(*cmd)); 3452 3453 cmd->pdev_id = WMI_PDEV_ID_SOC; 3454 cmd->hw_mode_index = cpu_to_le32(mode); 3455 3456 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID); 3457 if (ret) { 3458 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n"); 3459 dev_kfree_skb(skb); 3460 } 3461 3462 return ret; 3463 } 3464 3465 int ath12k_wmi_cmd_init(struct ath12k_base *ab) 3466 { 3467 struct ath12k_wmi_base *wmi_sc = &ab->wmi_ab; 3468 struct ath12k_wmi_init_cmd_arg arg = {}; 3469 3470 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT, 3471 ab->wmi_ab.svc_map)) 3472 arg.res_cfg.is_reg_cc_ext_event_supported = true; 3473 3474 ab->hw_params->wmi_init(ab, &arg.res_cfg); 3475 3476 arg.num_mem_chunks = wmi_sc->num_mem_chunks; 3477 arg.hw_mode_id = wmi_sc->preferred_hw_mode; 3478 arg.mem_chunks = wmi_sc->mem_chunks; 3479 3480 if (ab->hw_params->single_pdev_only) 3481 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX; 3482 3483 arg.num_band_to_mac = ab->num_radios; 3484 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac); 3485 3486 return ath12k_init_cmd_send(&wmi_sc->wmi[0], &arg); 3487 } 3488 3489 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 3490 struct ath12k_wmi_vdev_spectral_conf_arg *arg) 3491 { 3492 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd; 3493 struct sk_buff *skb; 3494 int ret; 3495 3496 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3497 if (!skb) 3498 return -ENOMEM; 3499 3500 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data; 3501 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 3502 sizeof(*cmd)); 3503 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 3504 cmd->scan_count = cpu_to_le32(arg->scan_count); 3505 cmd->scan_period = cpu_to_le32(arg->scan_period); 3506 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 3507 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size); 3508 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena); 3509 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena); 3510 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref); 3511 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay); 3512 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr); 3513 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr); 3514 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode); 3515 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode); 3516 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr); 3517 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format); 3518 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode); 3519 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale); 3520 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj); 3521 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask); 3522 3523 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3524 "WMI spectral scan config cmd vdev_id 0x%x\n", 3525 arg->vdev_id); 3526 3527 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3528 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID); 3529 if (ret) { 3530 ath12k_warn(ar->ab, 3531 "failed to send spectral scan config wmi cmd\n"); 3532 goto err; 3533 } 3534 3535 return 0; 3536 err: 3537 dev_kfree_skb(skb); 3538 return ret; 3539 } 3540 3541 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 3542 u32 trigger, u32 enable) 3543 { 3544 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd; 3545 struct sk_buff *skb; 3546 int ret; 3547 3548 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3549 if (!skb) 3550 return -ENOMEM; 3551 3552 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data; 3553 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 3554 sizeof(*cmd)); 3555 3556 cmd->vdev_id = cpu_to_le32(vdev_id); 3557 cmd->trigger_cmd = cpu_to_le32(trigger); 3558 cmd->enable_cmd = cpu_to_le32(enable); 3559 3560 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3561 "WMI spectral enable cmd vdev id 0x%x\n", 3562 vdev_id); 3563 3564 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3565 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID); 3566 if (ret) { 3567 ath12k_warn(ar->ab, 3568 "failed to send spectral enable wmi cmd\n"); 3569 goto err; 3570 } 3571 3572 return 0; 3573 err: 3574 dev_kfree_skb(skb); 3575 return ret; 3576 } 3577 3578 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 3579 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg) 3580 { 3581 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd; 3582 struct sk_buff *skb; 3583 int ret; 3584 3585 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 3586 if (!skb) 3587 return -ENOMEM; 3588 3589 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data; 3590 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ, 3591 sizeof(*cmd)); 3592 3593 cmd->pdev_id = cpu_to_le32(DP_SW2HW_MACID(arg->pdev_id)); 3594 cmd->module_id = cpu_to_le32(arg->module_id); 3595 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo); 3596 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi); 3597 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo); 3598 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi); 3599 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo); 3600 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi); 3601 cmd->num_elems = cpu_to_le32(arg->num_elems); 3602 cmd->buf_size = cpu_to_le32(arg->buf_size); 3603 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event); 3604 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms); 3605 3606 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3607 "WMI DMA ring cfg req cmd pdev_id 0x%x\n", 3608 arg->pdev_id); 3609 3610 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 3611 WMI_PDEV_DMA_RING_CFG_REQ_CMDID); 3612 if (ret) { 3613 ath12k_warn(ar->ab, 3614 "failed to send dma ring cfg req wmi cmd\n"); 3615 goto err; 3616 } 3617 3618 return 0; 3619 err: 3620 dev_kfree_skb(skb); 3621 return ret; 3622 } 3623 3624 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc, 3625 u16 tag, u16 len, 3626 const void *ptr, void *data) 3627 { 3628 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3629 3630 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY) 3631 return -EPROTO; 3632 3633 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry)) 3634 return -ENOBUFS; 3635 3636 arg->num_buf_entry++; 3637 return 0; 3638 } 3639 3640 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc, 3641 u16 tag, u16 len, 3642 const void *ptr, void *data) 3643 { 3644 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3645 3646 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA) 3647 return -EPROTO; 3648 3649 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry)) 3650 return -ENOBUFS; 3651 3652 arg->num_meta++; 3653 3654 return 0; 3655 } 3656 3657 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab, 3658 u16 tag, u16 len, 3659 const void *ptr, void *data) 3660 { 3661 struct ath12k_wmi_dma_buf_release_arg *arg = data; 3662 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed; 3663 u32 pdev_id; 3664 int ret; 3665 3666 switch (tag) { 3667 case WMI_TAG_DMA_BUF_RELEASE: 3668 fixed = ptr; 3669 arg->fixed = *fixed; 3670 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id)); 3671 arg->fixed.pdev_id = cpu_to_le32(pdev_id); 3672 break; 3673 case WMI_TAG_ARRAY_STRUCT: 3674 if (!arg->buf_entry_done) { 3675 arg->num_buf_entry = 0; 3676 arg->buf_entry = ptr; 3677 3678 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3679 ath12k_wmi_dma_buf_entry_parse, 3680 arg); 3681 if (ret) { 3682 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n", 3683 ret); 3684 return ret; 3685 } 3686 3687 arg->buf_entry_done = true; 3688 } else if (!arg->meta_data_done) { 3689 arg->num_meta = 0; 3690 arg->meta_data = ptr; 3691 3692 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3693 ath12k_wmi_dma_buf_meta_parse, 3694 arg); 3695 if (ret) { 3696 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n", 3697 ret); 3698 return ret; 3699 } 3700 3701 arg->meta_data_done = true; 3702 } 3703 break; 3704 default: 3705 break; 3706 } 3707 return 0; 3708 } 3709 3710 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab, 3711 struct sk_buff *skb) 3712 { 3713 struct ath12k_wmi_dma_buf_release_arg arg = {}; 3714 struct ath12k_dbring_buf_release_event param; 3715 int ret; 3716 3717 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 3718 ath12k_wmi_dma_buf_parse, 3719 &arg); 3720 if (ret) { 3721 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret); 3722 return; 3723 } 3724 3725 param.fixed = arg.fixed; 3726 param.buf_entry = arg.buf_entry; 3727 param.num_buf_entry = arg.num_buf_entry; 3728 param.meta_data = arg.meta_data; 3729 param.num_meta = arg.num_meta; 3730 3731 ret = ath12k_dbring_buffer_release_event(ab, ¶m); 3732 if (ret) { 3733 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret); 3734 return; 3735 } 3736 } 3737 3738 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc, 3739 u16 tag, u16 len, 3740 const void *ptr, void *data) 3741 { 3742 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3743 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap; 3744 u32 phy_map = 0; 3745 3746 if (tag != WMI_TAG_HW_MODE_CAPABILITIES) 3747 return -EPROTO; 3748 3749 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes) 3750 return -ENOBUFS; 3751 3752 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params, 3753 hw_mode_id); 3754 svc_rdy_ext->n_hw_mode_caps++; 3755 3756 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map); 3757 svc_rdy_ext->tot_phy_id += fls(phy_map); 3758 3759 return 0; 3760 } 3761 3762 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc, 3763 u16 len, const void *ptr, void *data) 3764 { 3765 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3766 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 3767 enum wmi_host_hw_mode_config_type mode, pref; 3768 u32 i; 3769 int ret; 3770 3771 svc_rdy_ext->n_hw_mode_caps = 0; 3772 svc_rdy_ext->hw_mode_caps = ptr; 3773 3774 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 3775 ath12k_wmi_hw_mode_caps_parse, 3776 svc_rdy_ext); 3777 if (ret) { 3778 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 3779 return ret; 3780 } 3781 3782 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) { 3783 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i]; 3784 mode = le32_to_cpu(hw_mode_caps->hw_mode_id); 3785 3786 if (mode >= WMI_HOST_HW_MODE_MAX) 3787 continue; 3788 3789 pref = soc->wmi_ab.preferred_hw_mode; 3790 3791 if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) { 3792 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps; 3793 soc->wmi_ab.preferred_hw_mode = mode; 3794 } 3795 } 3796 3797 ath12k_dbg(soc, ATH12K_DBG_WMI, "preferred_hw_mode:%d\n", 3798 soc->wmi_ab.preferred_hw_mode); 3799 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX) 3800 return -EINVAL; 3801 3802 return 0; 3803 } 3804 3805 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc, 3806 u16 tag, u16 len, 3807 const void *ptr, void *data) 3808 { 3809 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3810 3811 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES) 3812 return -EPROTO; 3813 3814 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id) 3815 return -ENOBUFS; 3816 3817 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params)); 3818 if (!svc_rdy_ext->n_mac_phy_caps) { 3819 svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len, 3820 GFP_ATOMIC); 3821 if (!svc_rdy_ext->mac_phy_caps) 3822 return -ENOMEM; 3823 } 3824 3825 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len); 3826 svc_rdy_ext->n_mac_phy_caps++; 3827 return 0; 3828 } 3829 3830 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc, 3831 u16 tag, u16 len, 3832 const void *ptr, void *data) 3833 { 3834 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3835 3836 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT) 3837 return -EPROTO; 3838 3839 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy) 3840 return -ENOBUFS; 3841 3842 svc_rdy_ext->n_ext_hal_reg_caps++; 3843 return 0; 3844 } 3845 3846 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc, 3847 u16 len, const void *ptr, void *data) 3848 { 3849 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 3850 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3851 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap; 3852 int ret; 3853 u32 i; 3854 3855 svc_rdy_ext->n_ext_hal_reg_caps = 0; 3856 svc_rdy_ext->ext_hal_reg_caps = ptr; 3857 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 3858 ath12k_wmi_ext_hal_reg_caps_parse, 3859 svc_rdy_ext); 3860 if (ret) { 3861 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 3862 return ret; 3863 } 3864 3865 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) { 3866 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle, 3867 svc_rdy_ext->soc_hal_reg_caps, 3868 svc_rdy_ext->ext_hal_reg_caps, i, 3869 ®_cap); 3870 if (ret) { 3871 ath12k_warn(soc, "failed to extract reg cap %d\n", i); 3872 return ret; 3873 } 3874 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap; 3875 } 3876 return 0; 3877 } 3878 3879 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc, 3880 u16 len, const void *ptr, 3881 void *data) 3882 { 3883 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 3884 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 3885 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id); 3886 u32 phy_id_map; 3887 int pdev_index = 0; 3888 int ret; 3889 3890 svc_rdy_ext->soc_hal_reg_caps = ptr; 3891 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy); 3892 3893 soc->num_radios = 0; 3894 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map); 3895 soc->fw_pdev_count = 0; 3896 3897 while (phy_id_map && soc->num_radios < MAX_RADIOS) { 3898 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle, 3899 svc_rdy_ext, 3900 hw_mode_id, soc->num_radios, 3901 &soc->pdevs[pdev_index]); 3902 if (ret) { 3903 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n", 3904 soc->num_radios); 3905 return ret; 3906 } 3907 3908 soc->num_radios++; 3909 3910 /* For single_pdev_only targets, 3911 * save mac_phy capability in the same pdev 3912 */ 3913 if (soc->hw_params->single_pdev_only) 3914 pdev_index = 0; 3915 else 3916 pdev_index = soc->num_radios; 3917 3918 /* TODO: mac_phy_cap prints */ 3919 phy_id_map >>= 1; 3920 } 3921 3922 if (soc->hw_params->single_pdev_only) { 3923 soc->num_radios = 1; 3924 soc->pdevs[0].pdev_id = 0; 3925 } 3926 3927 return 0; 3928 } 3929 3930 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc, 3931 u16 tag, u16 len, 3932 const void *ptr, void *data) 3933 { 3934 struct ath12k_wmi_dma_ring_caps_parse *parse = data; 3935 3936 if (tag != WMI_TAG_DMA_RING_CAPABILITIES) 3937 return -EPROTO; 3938 3939 parse->n_dma_ring_caps++; 3940 return 0; 3941 } 3942 3943 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab, 3944 u32 num_cap) 3945 { 3946 size_t sz; 3947 void *ptr; 3948 3949 sz = num_cap * sizeof(struct ath12k_dbring_cap); 3950 ptr = kzalloc(sz, GFP_ATOMIC); 3951 if (!ptr) 3952 return -ENOMEM; 3953 3954 ab->db_caps = ptr; 3955 ab->num_db_cap = num_cap; 3956 3957 return 0; 3958 } 3959 3960 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab) 3961 { 3962 kfree(ab->db_caps); 3963 ab->db_caps = NULL; 3964 } 3965 3966 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab, 3967 u16 len, const void *ptr, void *data) 3968 { 3969 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data; 3970 struct ath12k_wmi_dma_ring_caps_params *dma_caps; 3971 struct ath12k_dbring_cap *dir_buff_caps; 3972 int ret; 3973 u32 i; 3974 3975 dma_caps_parse->n_dma_ring_caps = 0; 3976 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr; 3977 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 3978 ath12k_wmi_dma_ring_caps_parse, 3979 dma_caps_parse); 3980 if (ret) { 3981 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret); 3982 return ret; 3983 } 3984 3985 if (!dma_caps_parse->n_dma_ring_caps) 3986 return 0; 3987 3988 if (ab->num_db_cap) { 3989 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n"); 3990 return 0; 3991 } 3992 3993 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps); 3994 if (ret) 3995 return ret; 3996 3997 dir_buff_caps = ab->db_caps; 3998 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) { 3999 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) { 4000 ath12k_warn(ab, "Invalid module id %d\n", 4001 le32_to_cpu(dma_caps[i].module_id)); 4002 ret = -EINVAL; 4003 goto free_dir_buff; 4004 } 4005 4006 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id); 4007 dir_buff_caps[i].pdev_id = 4008 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id)); 4009 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem); 4010 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz); 4011 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align); 4012 } 4013 4014 return 0; 4015 4016 free_dir_buff: 4017 ath12k_wmi_free_dbring_caps(ab); 4018 return ret; 4019 } 4020 4021 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab, 4022 u16 tag, u16 len, 4023 const void *ptr, void *data) 4024 { 4025 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 4026 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4027 int ret; 4028 4029 switch (tag) { 4030 case WMI_TAG_SERVICE_READY_EXT_EVENT: 4031 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr, 4032 &svc_rdy_ext->arg); 4033 if (ret) { 4034 ath12k_warn(ab, "unable to extract ext params\n"); 4035 return ret; 4036 } 4037 break; 4038 4039 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS: 4040 svc_rdy_ext->hw_caps = ptr; 4041 svc_rdy_ext->arg.num_hw_modes = 4042 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes); 4043 break; 4044 4045 case WMI_TAG_SOC_HAL_REG_CAPABILITIES: 4046 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr, 4047 svc_rdy_ext); 4048 if (ret) 4049 return ret; 4050 break; 4051 4052 case WMI_TAG_ARRAY_STRUCT: 4053 if (!svc_rdy_ext->hw_mode_done) { 4054 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext); 4055 if (ret) 4056 return ret; 4057 4058 svc_rdy_ext->hw_mode_done = true; 4059 } else if (!svc_rdy_ext->mac_phy_done) { 4060 svc_rdy_ext->n_mac_phy_caps = 0; 4061 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4062 ath12k_wmi_mac_phy_caps_parse, 4063 svc_rdy_ext); 4064 if (ret) { 4065 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4066 return ret; 4067 } 4068 4069 svc_rdy_ext->mac_phy_done = true; 4070 } else if (!svc_rdy_ext->ext_hal_reg_done) { 4071 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext); 4072 if (ret) 4073 return ret; 4074 4075 svc_rdy_ext->ext_hal_reg_done = true; 4076 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) { 4077 svc_rdy_ext->mac_phy_chainmask_combo_done = true; 4078 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) { 4079 svc_rdy_ext->mac_phy_chainmask_cap_done = true; 4080 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) { 4081 svc_rdy_ext->oem_dma_ring_cap_done = true; 4082 } else if (!svc_rdy_ext->dma_ring_cap_done) { 4083 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 4084 &svc_rdy_ext->dma_caps_parse); 4085 if (ret) 4086 return ret; 4087 4088 svc_rdy_ext->dma_ring_cap_done = true; 4089 } 4090 break; 4091 4092 default: 4093 break; 4094 } 4095 return 0; 4096 } 4097 4098 static int ath12k_service_ready_ext_event(struct ath12k_base *ab, 4099 struct sk_buff *skb) 4100 { 4101 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { }; 4102 int ret; 4103 4104 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4105 ath12k_wmi_svc_rdy_ext_parse, 4106 &svc_rdy_ext); 4107 if (ret) { 4108 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4109 goto err; 4110 } 4111 4112 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map)) 4113 complete(&ab->wmi_ab.service_ready); 4114 4115 kfree(svc_rdy_ext.mac_phy_caps); 4116 return 0; 4117 4118 err: 4119 ath12k_wmi_free_dbring_caps(ab); 4120 return ret; 4121 } 4122 4123 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle, 4124 const void *ptr, 4125 struct ath12k_wmi_svc_rdy_ext2_arg *arg) 4126 { 4127 const struct wmi_service_ready_ext2_event *ev = ptr; 4128 4129 if (!ev) 4130 return -EINVAL; 4131 4132 arg->reg_db_version = le32_to_cpu(ev->reg_db_version); 4133 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz); 4134 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz); 4135 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps); 4136 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw); 4137 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma); 4138 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo); 4139 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags); 4140 return 0; 4141 } 4142 4143 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band, 4144 const __le32 cap_mac_info[], 4145 const __le32 cap_phy_info[], 4146 const __le32 supp_mcs[], 4147 const struct ath12k_wmi_ppe_threshold_params *ppet, 4148 __le32 cap_info_internal) 4149 { 4150 struct ath12k_band_cap *cap_band = &pdev->cap.band[band]; 4151 u8 i; 4152 4153 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++) 4154 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]); 4155 4156 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++) 4157 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]); 4158 4159 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]); 4160 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]); 4161 if (band != NL80211_BAND_2GHZ) { 4162 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]); 4163 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]); 4164 } 4165 4166 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1); 4167 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info); 4168 for (i = 0; i < WMI_MAX_NUM_SS; i++) 4169 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] = 4170 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]); 4171 4172 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal); 4173 } 4174 4175 static int 4176 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab, 4177 const struct ath12k_wmi_caps_ext_params *caps, 4178 struct ath12k_pdev *pdev) 4179 { 4180 u32 bands; 4181 int i; 4182 4183 if (ab->hw_params->single_pdev_only) { 4184 for (i = 0; i < ab->fw_pdev_count; i++) { 4185 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i]; 4186 4187 if (fw_pdev->pdev_id == le32_to_cpu(caps->pdev_id) && 4188 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) { 4189 bands = fw_pdev->supported_bands; 4190 break; 4191 } 4192 } 4193 4194 if (i == ab->fw_pdev_count) 4195 return -EINVAL; 4196 } else { 4197 bands = pdev->cap.supported_bands; 4198 } 4199 4200 if (bands & WMI_HOST_WLAN_2G_CAP) { 4201 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ, 4202 caps->eht_cap_mac_info_2ghz, 4203 caps->eht_cap_phy_info_2ghz, 4204 caps->eht_supp_mcs_ext_2ghz, 4205 &caps->eht_ppet_2ghz, 4206 caps->eht_cap_info_internal); 4207 } 4208 4209 if (bands & WMI_HOST_WLAN_5G_CAP) { 4210 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ, 4211 caps->eht_cap_mac_info_5ghz, 4212 caps->eht_cap_phy_info_5ghz, 4213 caps->eht_supp_mcs_ext_5ghz, 4214 &caps->eht_ppet_5ghz, 4215 caps->eht_cap_info_internal); 4216 4217 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ, 4218 caps->eht_cap_mac_info_5ghz, 4219 caps->eht_cap_phy_info_5ghz, 4220 caps->eht_supp_mcs_ext_5ghz, 4221 &caps->eht_ppet_5ghz, 4222 caps->eht_cap_info_internal); 4223 } 4224 4225 return 0; 4226 } 4227 4228 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag, 4229 u16 len, const void *ptr, 4230 void *data) 4231 { 4232 const struct ath12k_wmi_caps_ext_params *caps = ptr; 4233 int i = 0, ret; 4234 4235 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT) 4236 return -EPROTO; 4237 4238 if (ab->hw_params->single_pdev_only) { 4239 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id)) 4240 return 0; 4241 } else { 4242 for (i = 0; i < ab->num_radios; i++) { 4243 if (ab->pdevs[i].pdev_id == le32_to_cpu(caps->pdev_id)) 4244 break; 4245 } 4246 4247 if (i == ab->num_radios) 4248 return -EINVAL; 4249 } 4250 4251 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]); 4252 if (ret) { 4253 ath12k_warn(ab, 4254 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n", 4255 ret, ab->pdevs[i].pdev_id); 4256 return ret; 4257 } 4258 4259 return 0; 4260 } 4261 4262 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab, 4263 u16 tag, u16 len, 4264 const void *ptr, void *data) 4265 { 4266 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 4267 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data; 4268 int ret; 4269 4270 switch (tag) { 4271 case WMI_TAG_SERVICE_READY_EXT2_EVENT: 4272 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr, 4273 &parse->arg); 4274 if (ret) { 4275 ath12k_warn(ab, 4276 "failed to extract wmi service ready ext2 parameters: %d\n", 4277 ret); 4278 return ret; 4279 } 4280 break; 4281 4282 case WMI_TAG_ARRAY_STRUCT: 4283 if (!parse->dma_ring_cap_done) { 4284 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 4285 &parse->dma_caps_parse); 4286 if (ret) 4287 return ret; 4288 4289 parse->dma_ring_cap_done = true; 4290 } else if (!parse->spectral_bin_scaling_done) { 4291 /* TODO: This is a place-holder as WMI tag for 4292 * spectral scaling is before 4293 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT 4294 */ 4295 parse->spectral_bin_scaling_done = true; 4296 } else if (!parse->mac_phy_caps_ext_done) { 4297 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4298 ath12k_wmi_tlv_mac_phy_caps_ext, 4299 parse); 4300 if (ret) { 4301 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n", 4302 ret); 4303 return ret; 4304 } 4305 4306 parse->mac_phy_caps_ext_done = true; 4307 } 4308 break; 4309 default: 4310 break; 4311 } 4312 4313 return 0; 4314 } 4315 4316 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab, 4317 struct sk_buff *skb) 4318 { 4319 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { }; 4320 int ret; 4321 4322 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4323 ath12k_wmi_svc_rdy_ext2_parse, 4324 &svc_rdy_ext2); 4325 if (ret) { 4326 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret); 4327 goto err; 4328 } 4329 4330 complete(&ab->wmi_ab.service_ready); 4331 4332 return 0; 4333 4334 err: 4335 ath12k_wmi_free_dbring_caps(ab); 4336 return ret; 4337 } 4338 4339 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb, 4340 struct wmi_vdev_start_resp_event *vdev_rsp) 4341 { 4342 const void **tb; 4343 const struct wmi_vdev_start_resp_event *ev; 4344 int ret; 4345 4346 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4347 if (IS_ERR(tb)) { 4348 ret = PTR_ERR(tb); 4349 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4350 return ret; 4351 } 4352 4353 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT]; 4354 if (!ev) { 4355 ath12k_warn(ab, "failed to fetch vdev start resp ev"); 4356 kfree(tb); 4357 return -EPROTO; 4358 } 4359 4360 *vdev_rsp = *ev; 4361 4362 kfree(tb); 4363 return 0; 4364 } 4365 4366 static struct ath12k_reg_rule 4367 *create_ext_reg_rules_from_wmi(u32 num_reg_rules, 4368 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule) 4369 { 4370 struct ath12k_reg_rule *reg_rule_ptr; 4371 u32 count; 4372 4373 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)), 4374 GFP_ATOMIC); 4375 4376 if (!reg_rule_ptr) 4377 return NULL; 4378 4379 for (count = 0; count < num_reg_rules; count++) { 4380 reg_rule_ptr[count].start_freq = 4381 le32_get_bits(wmi_reg_rule[count].freq_info, 4382 REG_RULE_START_FREQ); 4383 reg_rule_ptr[count].end_freq = 4384 le32_get_bits(wmi_reg_rule[count].freq_info, 4385 REG_RULE_END_FREQ); 4386 reg_rule_ptr[count].max_bw = 4387 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4388 REG_RULE_MAX_BW); 4389 reg_rule_ptr[count].reg_power = 4390 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4391 REG_RULE_REG_PWR); 4392 reg_rule_ptr[count].ant_gain = 4393 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 4394 REG_RULE_ANT_GAIN); 4395 reg_rule_ptr[count].flags = 4396 le32_get_bits(wmi_reg_rule[count].flag_info, 4397 REG_RULE_FLAGS); 4398 reg_rule_ptr[count].psd_flag = 4399 le32_get_bits(wmi_reg_rule[count].psd_power_info, 4400 REG_RULE_PSD_INFO); 4401 reg_rule_ptr[count].psd_eirp = 4402 le32_get_bits(wmi_reg_rule[count].psd_power_info, 4403 REG_RULE_PSD_EIRP); 4404 } 4405 4406 return reg_rule_ptr; 4407 } 4408 4409 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab, 4410 struct sk_buff *skb, 4411 struct ath12k_reg_info *reg_info) 4412 { 4413 const void **tb; 4414 const struct wmi_reg_chan_list_cc_ext_event *ev; 4415 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule; 4416 u32 num_2g_reg_rules, num_5g_reg_rules; 4417 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4418 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4419 u32 total_reg_rules = 0; 4420 int ret, i, j; 4421 4422 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n"); 4423 4424 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4425 if (IS_ERR(tb)) { 4426 ret = PTR_ERR(tb); 4427 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4428 return ret; 4429 } 4430 4431 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT]; 4432 if (!ev) { 4433 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n"); 4434 kfree(tb); 4435 return -EPROTO; 4436 } 4437 4438 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules); 4439 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules); 4440 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] = 4441 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi); 4442 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] = 4443 le32_to_cpu(ev->num_6g_reg_rules_ap_sp); 4444 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] = 4445 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp); 4446 4447 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4448 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 4449 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]); 4450 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 4451 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]); 4452 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 4453 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]); 4454 } 4455 4456 num_2g_reg_rules = reg_info->num_2g_reg_rules; 4457 total_reg_rules += num_2g_reg_rules; 4458 num_5g_reg_rules = reg_info->num_5g_reg_rules; 4459 total_reg_rules += num_5g_reg_rules; 4460 4461 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) { 4462 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n", 4463 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES); 4464 kfree(tb); 4465 return -EINVAL; 4466 } 4467 4468 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 4469 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i]; 4470 4471 if (num_6g_reg_rules_ap[i] > MAX_6G_REG_RULES) { 4472 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n", 4473 i, num_6g_reg_rules_ap[i], MAX_6G_REG_RULES); 4474 kfree(tb); 4475 return -EINVAL; 4476 } 4477 4478 total_reg_rules += num_6g_reg_rules_ap[i]; 4479 } 4480 4481 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4482 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 4483 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 4484 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 4485 4486 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 4487 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 4488 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 4489 4490 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 4491 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 4492 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 4493 4494 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6G_REG_RULES || 4495 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6G_REG_RULES || 4496 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6G_REG_RULES) { 4497 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n", 4498 i); 4499 kfree(tb); 4500 return -EINVAL; 4501 } 4502 } 4503 4504 if (!total_reg_rules) { 4505 ath12k_warn(ab, "No reg rules available\n"); 4506 kfree(tb); 4507 return -EINVAL; 4508 } 4509 4510 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN); 4511 4512 /* FIXME: Currently FW includes 6G reg rule also in 5G rule 4513 * list for country US. 4514 * Having same 6G reg rule in 5G and 6G rules list causes 4515 * intersect check to be true, and same rules will be shown 4516 * multiple times in iw cmd. So added hack below to avoid 4517 * parsing 6G rule from 5G reg rule list, and this can be 4518 * removed later, after FW updates to remove 6G reg rule 4519 * from 5G rules list. 4520 */ 4521 if (memcmp(reg_info->alpha2, "US", 2) == 0) { 4522 reg_info->num_5g_reg_rules = REG_US_5G_NUM_REG_RULES; 4523 num_5g_reg_rules = reg_info->num_5g_reg_rules; 4524 } 4525 4526 reg_info->dfs_region = le32_to_cpu(ev->dfs_region); 4527 reg_info->phybitmap = le32_to_cpu(ev->phybitmap); 4528 reg_info->num_phy = le32_to_cpu(ev->num_phy); 4529 reg_info->phy_id = le32_to_cpu(ev->phy_id); 4530 reg_info->ctry_code = le32_to_cpu(ev->country_id); 4531 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code); 4532 4533 switch (le32_to_cpu(ev->status_code)) { 4534 case WMI_REG_SET_CC_STATUS_PASS: 4535 reg_info->status_code = REG_SET_CC_STATUS_PASS; 4536 break; 4537 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND: 4538 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND; 4539 break; 4540 case WMI_REG_INIT_ALPHA2_NOT_FOUND: 4541 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND; 4542 break; 4543 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED: 4544 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED; 4545 break; 4546 case WMI_REG_SET_CC_STATUS_NO_MEMORY: 4547 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY; 4548 break; 4549 case WMI_REG_SET_CC_STATUS_FAIL: 4550 reg_info->status_code = REG_SET_CC_STATUS_FAIL; 4551 break; 4552 } 4553 4554 reg_info->is_ext_reg_event = true; 4555 4556 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g); 4557 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g); 4558 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g); 4559 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g); 4560 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi); 4561 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi); 4562 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp); 4563 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp); 4564 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp); 4565 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp); 4566 4567 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4568 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] = 4569 le32_to_cpu(ev->min_bw_6g_client_lpi[i]); 4570 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] = 4571 le32_to_cpu(ev->max_bw_6g_client_lpi[i]); 4572 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 4573 le32_to_cpu(ev->min_bw_6g_client_sp[i]); 4574 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 4575 le32_to_cpu(ev->max_bw_6g_client_sp[i]); 4576 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] = 4577 le32_to_cpu(ev->min_bw_6g_client_vlp[i]); 4578 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] = 4579 le32_to_cpu(ev->max_bw_6g_client_vlp[i]); 4580 } 4581 4582 ath12k_dbg(ab, ATH12K_DBG_WMI, 4583 "%s:cc_ext %s dsf %d BW: min_2g %d max_2g %d min_5g %d max_5g %d", 4584 __func__, reg_info->alpha2, reg_info->dfs_region, 4585 reg_info->min_bw_2g, reg_info->max_bw_2g, 4586 reg_info->min_bw_5g, reg_info->max_bw_5g); 4587 4588 ath12k_dbg(ab, ATH12K_DBG_WMI, 4589 "num_2g_reg_rules %d num_5g_reg_rules %d", 4590 num_2g_reg_rules, num_5g_reg_rules); 4591 4592 ath12k_dbg(ab, ATH12K_DBG_WMI, 4593 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d", 4594 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP], 4595 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP], 4596 num_6g_reg_rules_ap[WMI_REG_VLP_AP]); 4597 4598 ath12k_dbg(ab, ATH12K_DBG_WMI, 4599 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 4600 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT], 4601 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT], 4602 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]); 4603 4604 ath12k_dbg(ab, ATH12K_DBG_WMI, 4605 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 4606 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT], 4607 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT], 4608 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]); 4609 4610 ext_wmi_reg_rule = 4611 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev 4612 + sizeof(*ev) 4613 + sizeof(struct wmi_tlv)); 4614 4615 if (num_2g_reg_rules) { 4616 reg_info->reg_rules_2g_ptr = 4617 create_ext_reg_rules_from_wmi(num_2g_reg_rules, 4618 ext_wmi_reg_rule); 4619 4620 if (!reg_info->reg_rules_2g_ptr) { 4621 kfree(tb); 4622 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n"); 4623 return -ENOMEM; 4624 } 4625 } 4626 4627 if (num_5g_reg_rules) { 4628 ext_wmi_reg_rule += num_2g_reg_rules; 4629 reg_info->reg_rules_5g_ptr = 4630 create_ext_reg_rules_from_wmi(num_5g_reg_rules, 4631 ext_wmi_reg_rule); 4632 4633 if (!reg_info->reg_rules_5g_ptr) { 4634 kfree(tb); 4635 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n"); 4636 return -ENOMEM; 4637 } 4638 } 4639 4640 ext_wmi_reg_rule += num_5g_reg_rules; 4641 4642 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 4643 reg_info->reg_rules_6g_ap_ptr[i] = 4644 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i], 4645 ext_wmi_reg_rule); 4646 4647 if (!reg_info->reg_rules_6g_ap_ptr[i]) { 4648 kfree(tb); 4649 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n"); 4650 return -ENOMEM; 4651 } 4652 4653 ext_wmi_reg_rule += num_6g_reg_rules_ap[i]; 4654 } 4655 4656 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) { 4657 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4658 reg_info->reg_rules_6g_client_ptr[j][i] = 4659 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i], 4660 ext_wmi_reg_rule); 4661 4662 if (!reg_info->reg_rules_6g_client_ptr[j][i]) { 4663 kfree(tb); 4664 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n"); 4665 return -ENOMEM; 4666 } 4667 4668 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i]; 4669 } 4670 } 4671 4672 reg_info->client_type = le32_to_cpu(ev->client_type); 4673 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable; 4674 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable; 4675 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] = 4676 le32_to_cpu(ev->domain_code_6g_ap_lpi); 4677 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] = 4678 le32_to_cpu(ev->domain_code_6g_ap_sp); 4679 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] = 4680 le32_to_cpu(ev->domain_code_6g_ap_vlp); 4681 4682 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 4683 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] = 4684 le32_to_cpu(ev->domain_code_6g_client_lpi[i]); 4685 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] = 4686 le32_to_cpu(ev->domain_code_6g_client_sp[i]); 4687 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] = 4688 le32_to_cpu(ev->domain_code_6g_client_vlp[i]); 4689 } 4690 4691 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id); 4692 4693 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d", 4694 reg_info->client_type, reg_info->domain_code_6g_super_id); 4695 4696 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n"); 4697 4698 kfree(tb); 4699 return 0; 4700 } 4701 4702 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb, 4703 struct wmi_peer_delete_resp_event *peer_del_resp) 4704 { 4705 const void **tb; 4706 const struct wmi_peer_delete_resp_event *ev; 4707 int ret; 4708 4709 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4710 if (IS_ERR(tb)) { 4711 ret = PTR_ERR(tb); 4712 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4713 return ret; 4714 } 4715 4716 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT]; 4717 if (!ev) { 4718 ath12k_warn(ab, "failed to fetch peer delete resp ev"); 4719 kfree(tb); 4720 return -EPROTO; 4721 } 4722 4723 memset(peer_del_resp, 0, sizeof(*peer_del_resp)); 4724 4725 peer_del_resp->vdev_id = ev->vdev_id; 4726 ether_addr_copy(peer_del_resp->peer_macaddr.addr, 4727 ev->peer_macaddr.addr); 4728 4729 kfree(tb); 4730 return 0; 4731 } 4732 4733 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab, 4734 struct sk_buff *skb, 4735 u32 *vdev_id) 4736 { 4737 const void **tb; 4738 const struct wmi_vdev_delete_resp_event *ev; 4739 int ret; 4740 4741 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4742 if (IS_ERR(tb)) { 4743 ret = PTR_ERR(tb); 4744 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4745 return ret; 4746 } 4747 4748 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT]; 4749 if (!ev) { 4750 ath12k_warn(ab, "failed to fetch vdev delete resp ev"); 4751 kfree(tb); 4752 return -EPROTO; 4753 } 4754 4755 *vdev_id = le32_to_cpu(ev->vdev_id); 4756 4757 kfree(tb); 4758 return 0; 4759 } 4760 4761 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab, void *evt_buf, 4762 u32 len, u32 *vdev_id, 4763 u32 *tx_status) 4764 { 4765 const void **tb; 4766 const struct wmi_bcn_tx_status_event *ev; 4767 int ret; 4768 4769 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC); 4770 if (IS_ERR(tb)) { 4771 ret = PTR_ERR(tb); 4772 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4773 return ret; 4774 } 4775 4776 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT]; 4777 if (!ev) { 4778 ath12k_warn(ab, "failed to fetch bcn tx status ev"); 4779 kfree(tb); 4780 return -EPROTO; 4781 } 4782 4783 *vdev_id = le32_to_cpu(ev->vdev_id); 4784 *tx_status = le32_to_cpu(ev->tx_status); 4785 4786 kfree(tb); 4787 return 0; 4788 } 4789 4790 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb, 4791 u32 *vdev_id) 4792 { 4793 const void **tb; 4794 const struct wmi_vdev_stopped_event *ev; 4795 int ret; 4796 4797 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4798 if (IS_ERR(tb)) { 4799 ret = PTR_ERR(tb); 4800 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4801 return ret; 4802 } 4803 4804 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT]; 4805 if (!ev) { 4806 ath12k_warn(ab, "failed to fetch vdev stop ev"); 4807 kfree(tb); 4808 return -EPROTO; 4809 } 4810 4811 *vdev_id = le32_to_cpu(ev->vdev_id); 4812 4813 kfree(tb); 4814 return 0; 4815 } 4816 4817 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab, 4818 u16 tag, u16 len, 4819 const void *ptr, void *data) 4820 { 4821 struct wmi_tlv_mgmt_rx_parse *parse = data; 4822 4823 switch (tag) { 4824 case WMI_TAG_MGMT_RX_HDR: 4825 parse->fixed = ptr; 4826 break; 4827 case WMI_TAG_ARRAY_BYTE: 4828 if (!parse->frame_buf_done) { 4829 parse->frame_buf = ptr; 4830 parse->frame_buf_done = true; 4831 } 4832 break; 4833 } 4834 return 0; 4835 } 4836 4837 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab, 4838 struct sk_buff *skb, 4839 struct ath12k_wmi_mgmt_rx_arg *hdr) 4840 { 4841 struct wmi_tlv_mgmt_rx_parse parse = { }; 4842 const struct ath12k_wmi_mgmt_rx_params *ev; 4843 const u8 *frame; 4844 int i, ret; 4845 4846 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4847 ath12k_wmi_tlv_mgmt_rx_parse, 4848 &parse); 4849 if (ret) { 4850 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret); 4851 return ret; 4852 } 4853 4854 ev = parse.fixed; 4855 frame = parse.frame_buf; 4856 4857 if (!ev || !frame) { 4858 ath12k_warn(ab, "failed to fetch mgmt rx hdr"); 4859 return -EPROTO; 4860 } 4861 4862 hdr->pdev_id = le32_to_cpu(ev->pdev_id); 4863 hdr->chan_freq = le32_to_cpu(ev->chan_freq); 4864 hdr->channel = le32_to_cpu(ev->channel); 4865 hdr->snr = le32_to_cpu(ev->snr); 4866 hdr->rate = le32_to_cpu(ev->rate); 4867 hdr->phy_mode = le32_to_cpu(ev->phy_mode); 4868 hdr->buf_len = le32_to_cpu(ev->buf_len); 4869 hdr->status = le32_to_cpu(ev->status); 4870 hdr->flags = le32_to_cpu(ev->flags); 4871 hdr->rssi = a_sle32_to_cpu(ev->rssi); 4872 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta); 4873 4874 for (i = 0; i < ATH_MAX_ANTENNA; i++) 4875 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]); 4876 4877 if (skb->len < (frame - skb->data) + hdr->buf_len) { 4878 ath12k_warn(ab, "invalid length in mgmt rx hdr ev"); 4879 return -EPROTO; 4880 } 4881 4882 /* shift the sk_buff to point to `frame` */ 4883 skb_trim(skb, 0); 4884 skb_put(skb, frame - skb->data); 4885 skb_pull(skb, frame - skb->data); 4886 skb_put(skb, hdr->buf_len); 4887 4888 return 0; 4889 } 4890 4891 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id, 4892 u32 status) 4893 { 4894 struct sk_buff *msdu; 4895 struct ieee80211_tx_info *info; 4896 struct ath12k_skb_cb *skb_cb; 4897 int num_mgmt; 4898 4899 spin_lock_bh(&ar->txmgmt_idr_lock); 4900 msdu = idr_find(&ar->txmgmt_idr, desc_id); 4901 4902 if (!msdu) { 4903 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n", 4904 desc_id); 4905 spin_unlock_bh(&ar->txmgmt_idr_lock); 4906 return -ENOENT; 4907 } 4908 4909 idr_remove(&ar->txmgmt_idr, desc_id); 4910 spin_unlock_bh(&ar->txmgmt_idr_lock); 4911 4912 skb_cb = ATH12K_SKB_CB(msdu); 4913 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 4914 4915 info = IEEE80211_SKB_CB(msdu); 4916 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) 4917 info->flags |= IEEE80211_TX_STAT_ACK; 4918 4919 ieee80211_tx_status_irqsafe(ar->hw, msdu); 4920 4921 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx); 4922 4923 /* WARN when we received this event without doing any mgmt tx */ 4924 if (num_mgmt < 0) 4925 WARN_ON_ONCE(1); 4926 4927 if (!num_mgmt) 4928 wake_up(&ar->txmgmt_empty_waitq); 4929 4930 return 0; 4931 } 4932 4933 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab, 4934 struct sk_buff *skb, 4935 struct wmi_mgmt_tx_compl_event *param) 4936 { 4937 const void **tb; 4938 const struct wmi_mgmt_tx_compl_event *ev; 4939 int ret; 4940 4941 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 4942 if (IS_ERR(tb)) { 4943 ret = PTR_ERR(tb); 4944 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 4945 return ret; 4946 } 4947 4948 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT]; 4949 if (!ev) { 4950 ath12k_warn(ab, "failed to fetch mgmt tx compl ev"); 4951 kfree(tb); 4952 return -EPROTO; 4953 } 4954 4955 param->pdev_id = ev->pdev_id; 4956 param->desc_id = ev->desc_id; 4957 param->status = ev->status; 4958 4959 kfree(tb); 4960 return 0; 4961 } 4962 4963 static void ath12k_wmi_event_scan_started(struct ath12k *ar) 4964 { 4965 lockdep_assert_held(&ar->data_lock); 4966 4967 switch (ar->scan.state) { 4968 case ATH12K_SCAN_IDLE: 4969 case ATH12K_SCAN_RUNNING: 4970 case ATH12K_SCAN_ABORTING: 4971 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n", 4972 ath12k_scan_state_str(ar->scan.state), 4973 ar->scan.state); 4974 break; 4975 case ATH12K_SCAN_STARTING: 4976 ar->scan.state = ATH12K_SCAN_RUNNING; 4977 complete(&ar->scan.started); 4978 break; 4979 } 4980 } 4981 4982 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar) 4983 { 4984 lockdep_assert_held(&ar->data_lock); 4985 4986 switch (ar->scan.state) { 4987 case ATH12K_SCAN_IDLE: 4988 case ATH12K_SCAN_RUNNING: 4989 case ATH12K_SCAN_ABORTING: 4990 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n", 4991 ath12k_scan_state_str(ar->scan.state), 4992 ar->scan.state); 4993 break; 4994 case ATH12K_SCAN_STARTING: 4995 complete(&ar->scan.started); 4996 __ath12k_mac_scan_finish(ar); 4997 break; 4998 } 4999 } 5000 5001 static void ath12k_wmi_event_scan_completed(struct ath12k *ar) 5002 { 5003 lockdep_assert_held(&ar->data_lock); 5004 5005 switch (ar->scan.state) { 5006 case ATH12K_SCAN_IDLE: 5007 case ATH12K_SCAN_STARTING: 5008 /* One suspected reason scan can be completed while starting is 5009 * if firmware fails to deliver all scan events to the host, 5010 * e.g. when transport pipe is full. This has been observed 5011 * with spectral scan phyerr events starving wmi transport 5012 * pipe. In such case the "scan completed" event should be (and 5013 * is) ignored by the host as it may be just firmware's scan 5014 * state machine recovering. 5015 */ 5016 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n", 5017 ath12k_scan_state_str(ar->scan.state), 5018 ar->scan.state); 5019 break; 5020 case ATH12K_SCAN_RUNNING: 5021 case ATH12K_SCAN_ABORTING: 5022 __ath12k_mac_scan_finish(ar); 5023 break; 5024 } 5025 } 5026 5027 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar) 5028 { 5029 lockdep_assert_held(&ar->data_lock); 5030 5031 switch (ar->scan.state) { 5032 case ATH12K_SCAN_IDLE: 5033 case ATH12K_SCAN_STARTING: 5034 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n", 5035 ath12k_scan_state_str(ar->scan.state), 5036 ar->scan.state); 5037 break; 5038 case ATH12K_SCAN_RUNNING: 5039 case ATH12K_SCAN_ABORTING: 5040 ar->scan_channel = NULL; 5041 break; 5042 } 5043 } 5044 5045 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq) 5046 { 5047 lockdep_assert_held(&ar->data_lock); 5048 5049 switch (ar->scan.state) { 5050 case ATH12K_SCAN_IDLE: 5051 case ATH12K_SCAN_STARTING: 5052 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n", 5053 ath12k_scan_state_str(ar->scan.state), 5054 ar->scan.state); 5055 break; 5056 case ATH12K_SCAN_RUNNING: 5057 case ATH12K_SCAN_ABORTING: 5058 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq); 5059 break; 5060 } 5061 } 5062 5063 static const char * 5064 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type, 5065 enum wmi_scan_completion_reason reason) 5066 { 5067 switch (type) { 5068 case WMI_SCAN_EVENT_STARTED: 5069 return "started"; 5070 case WMI_SCAN_EVENT_COMPLETED: 5071 switch (reason) { 5072 case WMI_SCAN_REASON_COMPLETED: 5073 return "completed"; 5074 case WMI_SCAN_REASON_CANCELLED: 5075 return "completed [cancelled]"; 5076 case WMI_SCAN_REASON_PREEMPTED: 5077 return "completed [preempted]"; 5078 case WMI_SCAN_REASON_TIMEDOUT: 5079 return "completed [timedout]"; 5080 case WMI_SCAN_REASON_INTERNAL_FAILURE: 5081 return "completed [internal err]"; 5082 case WMI_SCAN_REASON_MAX: 5083 break; 5084 } 5085 return "completed [unknown]"; 5086 case WMI_SCAN_EVENT_BSS_CHANNEL: 5087 return "bss channel"; 5088 case WMI_SCAN_EVENT_FOREIGN_CHAN: 5089 return "foreign channel"; 5090 case WMI_SCAN_EVENT_DEQUEUED: 5091 return "dequeued"; 5092 case WMI_SCAN_EVENT_PREEMPTED: 5093 return "preempted"; 5094 case WMI_SCAN_EVENT_START_FAILED: 5095 return "start failed"; 5096 case WMI_SCAN_EVENT_RESTARTED: 5097 return "restarted"; 5098 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 5099 return "foreign channel exit"; 5100 default: 5101 return "unknown"; 5102 } 5103 } 5104 5105 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb, 5106 struct wmi_scan_event *scan_evt_param) 5107 { 5108 const void **tb; 5109 const struct wmi_scan_event *ev; 5110 int ret; 5111 5112 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5113 if (IS_ERR(tb)) { 5114 ret = PTR_ERR(tb); 5115 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5116 return ret; 5117 } 5118 5119 ev = tb[WMI_TAG_SCAN_EVENT]; 5120 if (!ev) { 5121 ath12k_warn(ab, "failed to fetch scan ev"); 5122 kfree(tb); 5123 return -EPROTO; 5124 } 5125 5126 scan_evt_param->event_type = ev->event_type; 5127 scan_evt_param->reason = ev->reason; 5128 scan_evt_param->channel_freq = ev->channel_freq; 5129 scan_evt_param->scan_req_id = ev->scan_req_id; 5130 scan_evt_param->scan_id = ev->scan_id; 5131 scan_evt_param->vdev_id = ev->vdev_id; 5132 scan_evt_param->tsf_timestamp = ev->tsf_timestamp; 5133 5134 kfree(tb); 5135 return 0; 5136 } 5137 5138 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb, 5139 struct wmi_peer_sta_kickout_arg *arg) 5140 { 5141 const void **tb; 5142 const struct wmi_peer_sta_kickout_event *ev; 5143 int ret; 5144 5145 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5146 if (IS_ERR(tb)) { 5147 ret = PTR_ERR(tb); 5148 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5149 return ret; 5150 } 5151 5152 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT]; 5153 if (!ev) { 5154 ath12k_warn(ab, "failed to fetch peer sta kickout ev"); 5155 kfree(tb); 5156 return -EPROTO; 5157 } 5158 5159 arg->mac_addr = ev->peer_macaddr.addr; 5160 5161 kfree(tb); 5162 return 0; 5163 } 5164 5165 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb, 5166 struct wmi_roam_event *roam_ev) 5167 { 5168 const void **tb; 5169 const struct wmi_roam_event *ev; 5170 int ret; 5171 5172 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5173 if (IS_ERR(tb)) { 5174 ret = PTR_ERR(tb); 5175 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5176 return ret; 5177 } 5178 5179 ev = tb[WMI_TAG_ROAM_EVENT]; 5180 if (!ev) { 5181 ath12k_warn(ab, "failed to fetch roam ev"); 5182 kfree(tb); 5183 return -EPROTO; 5184 } 5185 5186 roam_ev->vdev_id = ev->vdev_id; 5187 roam_ev->reason = ev->reason; 5188 roam_ev->rssi = ev->rssi; 5189 5190 kfree(tb); 5191 return 0; 5192 } 5193 5194 static int freq_to_idx(struct ath12k *ar, int freq) 5195 { 5196 struct ieee80211_supported_band *sband; 5197 int band, ch, idx = 0; 5198 5199 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { 5200 if (!ar->mac.sbands[band].channels) 5201 continue; 5202 5203 sband = ar->hw->wiphy->bands[band]; 5204 if (!sband) 5205 continue; 5206 5207 for (ch = 0; ch < sband->n_channels; ch++, idx++) 5208 if (sband->channels[ch].center_freq == freq) 5209 goto exit; 5210 } 5211 5212 exit: 5213 return idx; 5214 } 5215 5216 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, u8 *evt_buf, 5217 u32 len, struct wmi_chan_info_event *ch_info_ev) 5218 { 5219 const void **tb; 5220 const struct wmi_chan_info_event *ev; 5221 int ret; 5222 5223 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC); 5224 if (IS_ERR(tb)) { 5225 ret = PTR_ERR(tb); 5226 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5227 return ret; 5228 } 5229 5230 ev = tb[WMI_TAG_CHAN_INFO_EVENT]; 5231 if (!ev) { 5232 ath12k_warn(ab, "failed to fetch chan info ev"); 5233 kfree(tb); 5234 return -EPROTO; 5235 } 5236 5237 ch_info_ev->err_code = ev->err_code; 5238 ch_info_ev->freq = ev->freq; 5239 ch_info_ev->cmd_flags = ev->cmd_flags; 5240 ch_info_ev->noise_floor = ev->noise_floor; 5241 ch_info_ev->rx_clear_count = ev->rx_clear_count; 5242 ch_info_ev->cycle_count = ev->cycle_count; 5243 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range; 5244 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; 5245 ch_info_ev->rx_frame_count = ev->rx_frame_count; 5246 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt; 5247 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz; 5248 ch_info_ev->vdev_id = ev->vdev_id; 5249 5250 kfree(tb); 5251 return 0; 5252 } 5253 5254 static int 5255 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 5256 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev) 5257 { 5258 const void **tb; 5259 const struct wmi_pdev_bss_chan_info_event *ev; 5260 int ret; 5261 5262 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5263 if (IS_ERR(tb)) { 5264 ret = PTR_ERR(tb); 5265 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5266 return ret; 5267 } 5268 5269 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT]; 5270 if (!ev) { 5271 ath12k_warn(ab, "failed to fetch pdev bss chan info ev"); 5272 kfree(tb); 5273 return -EPROTO; 5274 } 5275 5276 bss_ch_info_ev->pdev_id = ev->pdev_id; 5277 bss_ch_info_ev->freq = ev->freq; 5278 bss_ch_info_ev->noise_floor = ev->noise_floor; 5279 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low; 5280 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high; 5281 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low; 5282 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high; 5283 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low; 5284 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high; 5285 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low; 5286 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high; 5287 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low; 5288 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high; 5289 5290 kfree(tb); 5291 return 0; 5292 } 5293 5294 static int 5295 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb, 5296 struct wmi_vdev_install_key_complete_arg *arg) 5297 { 5298 const void **tb; 5299 const struct wmi_vdev_install_key_compl_event *ev; 5300 int ret; 5301 5302 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5303 if (IS_ERR(tb)) { 5304 ret = PTR_ERR(tb); 5305 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5306 return ret; 5307 } 5308 5309 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT]; 5310 if (!ev) { 5311 ath12k_warn(ab, "failed to fetch vdev install key compl ev"); 5312 kfree(tb); 5313 return -EPROTO; 5314 } 5315 5316 arg->vdev_id = le32_to_cpu(ev->vdev_id); 5317 arg->macaddr = ev->peer_macaddr.addr; 5318 arg->key_idx = le32_to_cpu(ev->key_idx); 5319 arg->key_flags = le32_to_cpu(ev->key_flags); 5320 arg->status = le32_to_cpu(ev->status); 5321 5322 kfree(tb); 5323 return 0; 5324 } 5325 5326 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb, 5327 struct wmi_peer_assoc_conf_arg *peer_assoc_conf) 5328 { 5329 const void **tb; 5330 const struct wmi_peer_assoc_conf_event *ev; 5331 int ret; 5332 5333 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 5334 if (IS_ERR(tb)) { 5335 ret = PTR_ERR(tb); 5336 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5337 return ret; 5338 } 5339 5340 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT]; 5341 if (!ev) { 5342 ath12k_warn(ab, "failed to fetch peer assoc conf ev"); 5343 kfree(tb); 5344 return -EPROTO; 5345 } 5346 5347 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id); 5348 peer_assoc_conf->macaddr = ev->peer_macaddr.addr; 5349 5350 kfree(tb); 5351 return 0; 5352 } 5353 5354 static int 5355 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, u8 *evt_buf, 5356 u32 len, const struct wmi_pdev_temperature_event *ev) 5357 { 5358 const void **tb; 5359 int ret; 5360 5361 tb = ath12k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC); 5362 if (IS_ERR(tb)) { 5363 ret = PTR_ERR(tb); 5364 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5365 return ret; 5366 } 5367 5368 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT]; 5369 if (!ev) { 5370 ath12k_warn(ab, "failed to fetch pdev temp ev"); 5371 kfree(tb); 5372 return -EPROTO; 5373 } 5374 5375 kfree(tb); 5376 return 0; 5377 } 5378 5379 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab) 5380 { 5381 /* try to send pending beacons first. they take priority */ 5382 wake_up(&ab->wmi_ab.tx_credits_wq); 5383 } 5384 5385 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab, 5386 struct sk_buff *skb) 5387 { 5388 dev_kfree_skb(skb); 5389 } 5390 5391 static bool ath12k_reg_is_world_alpha(char *alpha) 5392 { 5393 return alpha[0] == '0' && alpha[1] == '0'; 5394 } 5395 5396 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb) 5397 { 5398 struct ath12k_reg_info *reg_info = NULL; 5399 struct ieee80211_regdomain *regd = NULL; 5400 bool intersect = false; 5401 int ret = 0, pdev_idx, i, j; 5402 struct ath12k *ar; 5403 5404 reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC); 5405 if (!reg_info) { 5406 ret = -ENOMEM; 5407 goto fallback; 5408 } 5409 5410 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info); 5411 5412 if (ret) { 5413 ath12k_warn(ab, "failed to extract regulatory info from received event\n"); 5414 goto fallback; 5415 } 5416 5417 if (reg_info->status_code != REG_SET_CC_STATUS_PASS) { 5418 /* In case of failure to set the requested ctry, 5419 * fw retains the current regd. We print a failure info 5420 * and return from here. 5421 */ 5422 ath12k_warn(ab, "Failed to set the requested Country regulatory setting\n"); 5423 goto mem_free; 5424 } 5425 5426 pdev_idx = reg_info->phy_id; 5427 5428 if (pdev_idx >= ab->num_radios) { 5429 /* Process the event for phy0 only if single_pdev_only 5430 * is true. If pdev_idx is valid but not 0, discard the 5431 * event. Otherwise, it goes to fallback. 5432 */ 5433 if (ab->hw_params->single_pdev_only && 5434 pdev_idx < ab->hw_params->num_rxmda_per_pdev) 5435 goto mem_free; 5436 else 5437 goto fallback; 5438 } 5439 5440 /* Avoid multiple overwrites to default regd, during core 5441 * stop-start after mac registration. 5442 */ 5443 if (ab->default_regd[pdev_idx] && !ab->new_regd[pdev_idx] && 5444 !memcmp(ab->default_regd[pdev_idx]->alpha2, 5445 reg_info->alpha2, 2)) 5446 goto mem_free; 5447 5448 /* Intersect new rules with default regd if a new country setting was 5449 * requested, i.e a default regd was already set during initialization 5450 * and the regd coming from this event has a valid country info. 5451 */ 5452 if (ab->default_regd[pdev_idx] && 5453 !ath12k_reg_is_world_alpha((char *) 5454 ab->default_regd[pdev_idx]->alpha2) && 5455 !ath12k_reg_is_world_alpha((char *)reg_info->alpha2)) 5456 intersect = true; 5457 5458 regd = ath12k_reg_build_regd(ab, reg_info, intersect); 5459 if (!regd) { 5460 ath12k_warn(ab, "failed to build regd from reg_info\n"); 5461 goto fallback; 5462 } 5463 5464 spin_lock(&ab->base_lock); 5465 if (test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)) { 5466 /* Once mac is registered, ar is valid and all CC events from 5467 * fw is considered to be received due to user requests 5468 * currently. 5469 * Free previously built regd before assigning the newly 5470 * generated regd to ar. NULL pointer handling will be 5471 * taken care by kfree itself. 5472 */ 5473 ar = ab->pdevs[pdev_idx].ar; 5474 kfree(ab->new_regd[pdev_idx]); 5475 ab->new_regd[pdev_idx] = regd; 5476 queue_work(ab->workqueue, &ar->regd_update_work); 5477 } else { 5478 /* Multiple events for the same *ar is not expected. But we 5479 * can still clear any previously stored default_regd if we 5480 * are receiving this event for the same radio by mistake. 5481 * NULL pointer handling will be taken care by kfree itself. 5482 */ 5483 kfree(ab->default_regd[pdev_idx]); 5484 /* This regd would be applied during mac registration */ 5485 ab->default_regd[pdev_idx] = regd; 5486 } 5487 ab->dfs_region = reg_info->dfs_region; 5488 spin_unlock(&ab->base_lock); 5489 5490 goto mem_free; 5491 5492 fallback: 5493 /* Fallback to older reg (by sending previous country setting 5494 * again if fw has succeeded and we failed to process here. 5495 * The Regdomain should be uniform across driver and fw. Since the 5496 * FW has processed the command and sent a success status, we expect 5497 * this function to succeed as well. If it doesn't, CTRY needs to be 5498 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent. 5499 */ 5500 /* TODO: This is rare, but still should also be handled */ 5501 WARN_ON(1); 5502 mem_free: 5503 if (reg_info) { 5504 kfree(reg_info->reg_rules_2g_ptr); 5505 kfree(reg_info->reg_rules_5g_ptr); 5506 if (reg_info->is_ext_reg_event) { 5507 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) 5508 kfree(reg_info->reg_rules_6g_ap_ptr[i]); 5509 5510 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) 5511 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) 5512 kfree(reg_info->reg_rules_6g_client_ptr[j][i]); 5513 } 5514 kfree(reg_info); 5515 } 5516 return ret; 5517 } 5518 5519 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 5520 const void *ptr, void *data) 5521 { 5522 struct ath12k_wmi_rdy_parse *rdy_parse = data; 5523 struct wmi_ready_event fixed_param; 5524 struct ath12k_wmi_mac_addr_params *addr_list; 5525 struct ath12k_pdev *pdev; 5526 u32 num_mac_addr; 5527 int i; 5528 5529 switch (tag) { 5530 case WMI_TAG_READY_EVENT: 5531 memset(&fixed_param, 0, sizeof(fixed_param)); 5532 memcpy(&fixed_param, (struct wmi_ready_event *)ptr, 5533 min_t(u16, sizeof(fixed_param), len)); 5534 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status); 5535 rdy_parse->num_extra_mac_addr = 5536 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr); 5537 5538 ether_addr_copy(ab->mac_addr, 5539 fixed_param.ready_event_min.mac_addr.addr); 5540 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum); 5541 ab->wmi_ready = true; 5542 break; 5543 case WMI_TAG_ARRAY_FIXED_STRUCT: 5544 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr; 5545 num_mac_addr = rdy_parse->num_extra_mac_addr; 5546 5547 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios)) 5548 break; 5549 5550 for (i = 0; i < ab->num_radios; i++) { 5551 pdev = &ab->pdevs[i]; 5552 ether_addr_copy(pdev->mac_addr, addr_list[i].addr); 5553 } 5554 ab->pdevs_macaddr_valid = true; 5555 break; 5556 default: 5557 break; 5558 } 5559 5560 return 0; 5561 } 5562 5563 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 5564 { 5565 struct ath12k_wmi_rdy_parse rdy_parse = { }; 5566 int ret; 5567 5568 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 5569 ath12k_wmi_rdy_parse, &rdy_parse); 5570 if (ret) { 5571 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 5572 return ret; 5573 } 5574 5575 complete(&ab->wmi_ab.unified_ready); 5576 return 0; 5577 } 5578 5579 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 5580 { 5581 struct wmi_peer_delete_resp_event peer_del_resp; 5582 struct ath12k *ar; 5583 5584 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) { 5585 ath12k_warn(ab, "failed to extract peer delete resp"); 5586 return; 5587 } 5588 5589 rcu_read_lock(); 5590 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id)); 5591 if (!ar) { 5592 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d", 5593 peer_del_resp.vdev_id); 5594 rcu_read_unlock(); 5595 return; 5596 } 5597 5598 complete(&ar->peer_delete_done); 5599 rcu_read_unlock(); 5600 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n", 5601 peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr); 5602 } 5603 5604 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab, 5605 struct sk_buff *skb) 5606 { 5607 struct ath12k *ar; 5608 u32 vdev_id = 0; 5609 5610 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) { 5611 ath12k_warn(ab, "failed to extract vdev delete resp"); 5612 return; 5613 } 5614 5615 rcu_read_lock(); 5616 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 5617 if (!ar) { 5618 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d", 5619 vdev_id); 5620 rcu_read_unlock(); 5621 return; 5622 } 5623 5624 complete(&ar->vdev_delete_done); 5625 5626 rcu_read_unlock(); 5627 5628 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n", 5629 vdev_id); 5630 } 5631 5632 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status) 5633 { 5634 switch (vdev_resp_status) { 5635 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID: 5636 return "invalid vdev id"; 5637 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED: 5638 return "not supported"; 5639 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION: 5640 return "dfs violation"; 5641 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN: 5642 return "invalid regdomain"; 5643 default: 5644 return "unknown"; 5645 } 5646 } 5647 5648 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 5649 { 5650 struct wmi_vdev_start_resp_event vdev_start_resp; 5651 struct ath12k *ar; 5652 u32 status; 5653 5654 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) { 5655 ath12k_warn(ab, "failed to extract vdev start resp"); 5656 return; 5657 } 5658 5659 rcu_read_lock(); 5660 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id)); 5661 if (!ar) { 5662 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d", 5663 vdev_start_resp.vdev_id); 5664 rcu_read_unlock(); 5665 return; 5666 } 5667 5668 ar->last_wmi_vdev_start_status = 0; 5669 5670 status = le32_to_cpu(vdev_start_resp.status); 5671 5672 if (WARN_ON_ONCE(status)) { 5673 ath12k_warn(ab, "vdev start resp error status %d (%s)\n", 5674 status, ath12k_wmi_vdev_resp_print(status)); 5675 ar->last_wmi_vdev_start_status = status; 5676 } 5677 5678 complete(&ar->vdev_setup_done); 5679 5680 rcu_read_unlock(); 5681 5682 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d", 5683 vdev_start_resp.vdev_id); 5684 } 5685 5686 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb) 5687 { 5688 u32 vdev_id, tx_status; 5689 5690 if (ath12k_pull_bcn_tx_status_ev(ab, skb->data, skb->len, 5691 &vdev_id, &tx_status) != 0) { 5692 ath12k_warn(ab, "failed to extract bcn tx status"); 5693 return; 5694 } 5695 } 5696 5697 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb) 5698 { 5699 struct ath12k *ar; 5700 u32 vdev_id = 0; 5701 5702 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) { 5703 ath12k_warn(ab, "failed to extract vdev stopped event"); 5704 return; 5705 } 5706 5707 rcu_read_lock(); 5708 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 5709 if (!ar) { 5710 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d", 5711 vdev_id); 5712 rcu_read_unlock(); 5713 return; 5714 } 5715 5716 complete(&ar->vdev_setup_done); 5717 5718 rcu_read_unlock(); 5719 5720 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id); 5721 } 5722 5723 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb) 5724 { 5725 struct ath12k_wmi_mgmt_rx_arg rx_ev = {0}; 5726 struct ath12k *ar; 5727 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); 5728 struct ieee80211_hdr *hdr; 5729 u16 fc; 5730 struct ieee80211_supported_band *sband; 5731 5732 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) { 5733 ath12k_warn(ab, "failed to extract mgmt rx event"); 5734 dev_kfree_skb(skb); 5735 return; 5736 } 5737 5738 memset(status, 0, sizeof(*status)); 5739 5740 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n", 5741 rx_ev.status); 5742 5743 rcu_read_lock(); 5744 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id); 5745 5746 if (!ar) { 5747 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n", 5748 rx_ev.pdev_id); 5749 dev_kfree_skb(skb); 5750 goto exit; 5751 } 5752 5753 if ((test_bit(ATH12K_CAC_RUNNING, &ar->dev_flags)) || 5754 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT | 5755 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | 5756 WMI_RX_STATUS_ERR_CRC))) { 5757 dev_kfree_skb(skb); 5758 goto exit; 5759 } 5760 5761 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC) 5762 status->flag |= RX_FLAG_MMIC_ERROR; 5763 5764 if (rx_ev.chan_freq >= ATH12K_MIN_6G_FREQ) { 5765 status->band = NL80211_BAND_6GHZ; 5766 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) { 5767 status->band = NL80211_BAND_2GHZ; 5768 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5G_CHAN) { 5769 status->band = NL80211_BAND_5GHZ; 5770 } else { 5771 /* Shouldn't happen unless list of advertised channels to 5772 * mac80211 has been changed. 5773 */ 5774 WARN_ON_ONCE(1); 5775 dev_kfree_skb(skb); 5776 goto exit; 5777 } 5778 5779 if (rx_ev.phy_mode == MODE_11B && 5780 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ)) 5781 ath12k_dbg(ab, ATH12K_DBG_WMI, 5782 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band); 5783 5784 sband = &ar->mac.sbands[status->band]; 5785 5786 status->freq = ieee80211_channel_to_frequency(rx_ev.channel, 5787 status->band); 5788 status->signal = rx_ev.snr + ATH12K_DEFAULT_NOISE_FLOOR; 5789 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100); 5790 5791 hdr = (struct ieee80211_hdr *)skb->data; 5792 fc = le16_to_cpu(hdr->frame_control); 5793 5794 /* Firmware is guaranteed to report all essential management frames via 5795 * WMI while it can deliver some extra via HTT. Since there can be 5796 * duplicates split the reporting wrt monitor/sniffing. 5797 */ 5798 status->flag |= RX_FLAG_SKIP_MONITOR; 5799 5800 /* In case of PMF, FW delivers decrypted frames with Protected Bit set 5801 * including group privacy action frames. 5802 */ 5803 if (ieee80211_has_protected(hdr->frame_control)) { 5804 status->flag |= RX_FLAG_DECRYPTED; 5805 5806 if (!ieee80211_is_robust_mgmt_frame(skb)) { 5807 status->flag |= RX_FLAG_IV_STRIPPED | 5808 RX_FLAG_MMIC_STRIPPED; 5809 hdr->frame_control = __cpu_to_le16(fc & 5810 ~IEEE80211_FCTL_PROTECTED); 5811 } 5812 } 5813 5814 /* TODO: Pending handle beacon implementation 5815 *if (ieee80211_is_beacon(hdr->frame_control)) 5816 * ath12k_mac_handle_beacon(ar, skb); 5817 */ 5818 5819 ath12k_dbg(ab, ATH12K_DBG_MGMT, 5820 "event mgmt rx skb %pK len %d ftype %02x stype %02x\n", 5821 skb, skb->len, 5822 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); 5823 5824 ath12k_dbg(ab, ATH12K_DBG_MGMT, 5825 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", 5826 status->freq, status->band, status->signal, 5827 status->rate_idx); 5828 5829 ieee80211_rx_ni(ar->hw, skb); 5830 5831 exit: 5832 rcu_read_unlock(); 5833 } 5834 5835 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb) 5836 { 5837 struct wmi_mgmt_tx_compl_event tx_compl_param = {0}; 5838 struct ath12k *ar; 5839 5840 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) { 5841 ath12k_warn(ab, "failed to extract mgmt tx compl event"); 5842 return; 5843 } 5844 5845 rcu_read_lock(); 5846 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id)); 5847 if (!ar) { 5848 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n", 5849 tx_compl_param.pdev_id); 5850 goto exit; 5851 } 5852 5853 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id), 5854 le32_to_cpu(tx_compl_param.status)); 5855 5856 ath12k_dbg(ab, ATH12K_DBG_MGMT, 5857 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d", 5858 tx_compl_param.pdev_id, tx_compl_param.desc_id, 5859 tx_compl_param.status); 5860 5861 exit: 5862 rcu_read_unlock(); 5863 } 5864 5865 static struct ath12k *ath12k_get_ar_on_scan_abort(struct ath12k_base *ab, 5866 u32 vdev_id) 5867 { 5868 int i; 5869 struct ath12k_pdev *pdev; 5870 struct ath12k *ar; 5871 5872 for (i = 0; i < ab->num_radios; i++) { 5873 pdev = rcu_dereference(ab->pdevs_active[i]); 5874 if (pdev && pdev->ar) { 5875 ar = pdev->ar; 5876 5877 spin_lock_bh(&ar->data_lock); 5878 if (ar->scan.state == ATH12K_SCAN_ABORTING && 5879 ar->scan.vdev_id == vdev_id) { 5880 spin_unlock_bh(&ar->data_lock); 5881 return ar; 5882 } 5883 spin_unlock_bh(&ar->data_lock); 5884 } 5885 } 5886 return NULL; 5887 } 5888 5889 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb) 5890 { 5891 struct ath12k *ar; 5892 struct wmi_scan_event scan_ev = {0}; 5893 5894 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) { 5895 ath12k_warn(ab, "failed to extract scan event"); 5896 return; 5897 } 5898 5899 rcu_read_lock(); 5900 5901 /* In case the scan was cancelled, ex. during interface teardown, 5902 * the interface will not be found in active interfaces. 5903 * Rather, in such scenarios, iterate over the active pdev's to 5904 * search 'ar' if the corresponding 'ar' scan is ABORTING and the 5905 * aborting scan's vdev id matches this event info. 5906 */ 5907 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED && 5908 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) 5909 ar = ath12k_get_ar_on_scan_abort(ab, le32_to_cpu(scan_ev.vdev_id)); 5910 else 5911 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id)); 5912 5913 if (!ar) { 5914 ath12k_warn(ab, "Received scan event for unknown vdev"); 5915 rcu_read_unlock(); 5916 return; 5917 } 5918 5919 spin_lock_bh(&ar->data_lock); 5920 5921 ath12k_dbg(ab, ATH12K_DBG_WMI, 5922 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", 5923 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type), 5924 le32_to_cpu(scan_ev.reason)), 5925 le32_to_cpu(scan_ev.event_type), 5926 le32_to_cpu(scan_ev.reason), 5927 le32_to_cpu(scan_ev.channel_freq), 5928 le32_to_cpu(scan_ev.scan_req_id), 5929 le32_to_cpu(scan_ev.scan_id), 5930 le32_to_cpu(scan_ev.vdev_id), 5931 ath12k_scan_state_str(ar->scan.state), ar->scan.state); 5932 5933 switch (le32_to_cpu(scan_ev.event_type)) { 5934 case WMI_SCAN_EVENT_STARTED: 5935 ath12k_wmi_event_scan_started(ar); 5936 break; 5937 case WMI_SCAN_EVENT_COMPLETED: 5938 ath12k_wmi_event_scan_completed(ar); 5939 break; 5940 case WMI_SCAN_EVENT_BSS_CHANNEL: 5941 ath12k_wmi_event_scan_bss_chan(ar); 5942 break; 5943 case WMI_SCAN_EVENT_FOREIGN_CHAN: 5944 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq)); 5945 break; 5946 case WMI_SCAN_EVENT_START_FAILED: 5947 ath12k_warn(ab, "received scan start failure event\n"); 5948 ath12k_wmi_event_scan_start_failed(ar); 5949 break; 5950 case WMI_SCAN_EVENT_DEQUEUED: 5951 __ath12k_mac_scan_finish(ar); 5952 break; 5953 case WMI_SCAN_EVENT_PREEMPTED: 5954 case WMI_SCAN_EVENT_RESTARTED: 5955 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 5956 default: 5957 break; 5958 } 5959 5960 spin_unlock_bh(&ar->data_lock); 5961 5962 rcu_read_unlock(); 5963 } 5964 5965 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb) 5966 { 5967 struct wmi_peer_sta_kickout_arg arg = {}; 5968 struct ieee80211_sta *sta; 5969 struct ath12k_peer *peer; 5970 struct ath12k *ar; 5971 5972 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) { 5973 ath12k_warn(ab, "failed to extract peer sta kickout event"); 5974 return; 5975 } 5976 5977 rcu_read_lock(); 5978 5979 spin_lock_bh(&ab->base_lock); 5980 5981 peer = ath12k_peer_find_by_addr(ab, arg.mac_addr); 5982 5983 if (!peer) { 5984 ath12k_warn(ab, "peer not found %pM\n", 5985 arg.mac_addr); 5986 goto exit; 5987 } 5988 5989 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id); 5990 if (!ar) { 5991 ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d", 5992 peer->vdev_id); 5993 goto exit; 5994 } 5995 5996 sta = ieee80211_find_sta_by_ifaddr(ar->hw, 5997 arg.mac_addr, NULL); 5998 if (!sta) { 5999 ath12k_warn(ab, "Spurious quick kickout for STA %pM\n", 6000 arg.mac_addr); 6001 goto exit; 6002 } 6003 6004 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM", 6005 arg.mac_addr); 6006 6007 ieee80211_report_low_ack(sta, 10); 6008 6009 exit: 6010 spin_unlock_bh(&ab->base_lock); 6011 rcu_read_unlock(); 6012 } 6013 6014 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb) 6015 { 6016 struct wmi_roam_event roam_ev = {}; 6017 struct ath12k *ar; 6018 6019 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) { 6020 ath12k_warn(ab, "failed to extract roam event"); 6021 return; 6022 } 6023 6024 ath12k_dbg(ab, ATH12K_DBG_WMI, 6025 "wmi roam event vdev %u reason 0x%08x rssi %d\n", 6026 roam_ev.vdev_id, roam_ev.reason, roam_ev.rssi); 6027 6028 rcu_read_lock(); 6029 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(roam_ev.vdev_id)); 6030 if (!ar) { 6031 ath12k_warn(ab, "invalid vdev id in roam ev %d", 6032 roam_ev.vdev_id); 6033 rcu_read_unlock(); 6034 return; 6035 } 6036 6037 if (le32_to_cpu(roam_ev.reason) >= WMI_ROAM_REASON_MAX) 6038 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n", 6039 roam_ev.reason, roam_ev.vdev_id); 6040 6041 switch (le32_to_cpu(roam_ev.reason)) { 6042 case WMI_ROAM_REASON_BEACON_MISS: 6043 /* TODO: Pending beacon miss and connection_loss_work 6044 * implementation 6045 * ath12k_mac_handle_beacon_miss(ar, vdev_id); 6046 */ 6047 break; 6048 case WMI_ROAM_REASON_BETTER_AP: 6049 case WMI_ROAM_REASON_LOW_RSSI: 6050 case WMI_ROAM_REASON_SUITABLE_AP_FOUND: 6051 case WMI_ROAM_REASON_HO_FAILED: 6052 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n", 6053 roam_ev.reason, roam_ev.vdev_id); 6054 break; 6055 } 6056 6057 rcu_read_unlock(); 6058 } 6059 6060 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 6061 { 6062 struct wmi_chan_info_event ch_info_ev = {0}; 6063 struct ath12k *ar; 6064 struct survey_info *survey; 6065 int idx; 6066 /* HW channel counters frequency value in hertz */ 6067 u32 cc_freq_hz = ab->cc_freq_hz; 6068 6069 if (ath12k_pull_chan_info_ev(ab, skb->data, skb->len, &ch_info_ev) != 0) { 6070 ath12k_warn(ab, "failed to extract chan info event"); 6071 return; 6072 } 6073 6074 ath12k_dbg(ab, ATH12K_DBG_WMI, 6075 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n", 6076 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq, 6077 ch_info_ev.cmd_flags, ch_info_ev.noise_floor, 6078 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count, 6079 ch_info_ev.mac_clk_mhz); 6080 6081 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) { 6082 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n"); 6083 return; 6084 } 6085 6086 rcu_read_lock(); 6087 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id)); 6088 if (!ar) { 6089 ath12k_warn(ab, "invalid vdev id in chan info ev %d", 6090 ch_info_ev.vdev_id); 6091 rcu_read_unlock(); 6092 return; 6093 } 6094 spin_lock_bh(&ar->data_lock); 6095 6096 switch (ar->scan.state) { 6097 case ATH12K_SCAN_IDLE: 6098 case ATH12K_SCAN_STARTING: 6099 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n"); 6100 goto exit; 6101 case ATH12K_SCAN_RUNNING: 6102 case ATH12K_SCAN_ABORTING: 6103 break; 6104 } 6105 6106 idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq)); 6107 if (idx >= ARRAY_SIZE(ar->survey)) { 6108 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n", 6109 ch_info_ev.freq, idx); 6110 goto exit; 6111 } 6112 6113 /* If FW provides MAC clock frequency in Mhz, overriding the initialized 6114 * HW channel counters frequency value 6115 */ 6116 if (ch_info_ev.mac_clk_mhz) 6117 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000); 6118 6119 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) { 6120 survey = &ar->survey[idx]; 6121 memset(survey, 0, sizeof(*survey)); 6122 survey->noise = le32_to_cpu(ch_info_ev.noise_floor); 6123 survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME | 6124 SURVEY_INFO_TIME_BUSY; 6125 survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz); 6126 survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count), 6127 cc_freq_hz); 6128 } 6129 exit: 6130 spin_unlock_bh(&ar->data_lock); 6131 rcu_read_unlock(); 6132 } 6133 6134 static void 6135 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 6136 { 6137 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {}; 6138 struct survey_info *survey; 6139 struct ath12k *ar; 6140 u32 cc_freq_hz = ab->cc_freq_hz; 6141 u64 busy, total, tx, rx, rx_bss; 6142 int idx; 6143 6144 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) { 6145 ath12k_warn(ab, "failed to extract pdev bss chan info event"); 6146 return; 6147 } 6148 6149 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 | 6150 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low); 6151 6152 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 | 6153 le32_to_cpu(bss_ch_info_ev.cycle_count_low); 6154 6155 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 | 6156 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low); 6157 6158 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 | 6159 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low); 6160 6161 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 | 6162 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low); 6163 6164 ath12k_dbg(ab, ATH12K_DBG_WMI, 6165 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n", 6166 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq, 6167 bss_ch_info_ev.noise_floor, busy, total, 6168 tx, rx, rx_bss); 6169 6170 rcu_read_lock(); 6171 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id)); 6172 6173 if (!ar) { 6174 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n", 6175 bss_ch_info_ev.pdev_id); 6176 rcu_read_unlock(); 6177 return; 6178 } 6179 6180 spin_lock_bh(&ar->data_lock); 6181 idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq)); 6182 if (idx >= ARRAY_SIZE(ar->survey)) { 6183 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n", 6184 bss_ch_info_ev.freq, idx); 6185 goto exit; 6186 } 6187 6188 survey = &ar->survey[idx]; 6189 6190 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor); 6191 survey->time = div_u64(total, cc_freq_hz); 6192 survey->time_busy = div_u64(busy, cc_freq_hz); 6193 survey->time_rx = div_u64(rx_bss, cc_freq_hz); 6194 survey->time_tx = div_u64(tx, cc_freq_hz); 6195 survey->filled |= (SURVEY_INFO_NOISE_DBM | 6196 SURVEY_INFO_TIME | 6197 SURVEY_INFO_TIME_BUSY | 6198 SURVEY_INFO_TIME_RX | 6199 SURVEY_INFO_TIME_TX); 6200 exit: 6201 spin_unlock_bh(&ar->data_lock); 6202 complete(&ar->bss_survey_done); 6203 6204 rcu_read_unlock(); 6205 } 6206 6207 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab, 6208 struct sk_buff *skb) 6209 { 6210 struct wmi_vdev_install_key_complete_arg install_key_compl = {0}; 6211 struct ath12k *ar; 6212 6213 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) { 6214 ath12k_warn(ab, "failed to extract install key compl event"); 6215 return; 6216 } 6217 6218 ath12k_dbg(ab, ATH12K_DBG_WMI, 6219 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n", 6220 install_key_compl.key_idx, install_key_compl.key_flags, 6221 install_key_compl.macaddr, install_key_compl.status); 6222 6223 rcu_read_lock(); 6224 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id); 6225 if (!ar) { 6226 ath12k_warn(ab, "invalid vdev id in install key compl ev %d", 6227 install_key_compl.vdev_id); 6228 rcu_read_unlock(); 6229 return; 6230 } 6231 6232 ar->install_key_status = 0; 6233 6234 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) { 6235 ath12k_warn(ab, "install key failed for %pM status %d\n", 6236 install_key_compl.macaddr, install_key_compl.status); 6237 ar->install_key_status = install_key_compl.status; 6238 } 6239 6240 complete(&ar->install_key_done); 6241 rcu_read_unlock(); 6242 } 6243 6244 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab, 6245 u16 tag, u16 len, 6246 const void *ptr, 6247 void *data) 6248 { 6249 const struct wmi_service_available_event *ev; 6250 u32 *wmi_ext2_service_bitmap; 6251 int i, j; 6252 u16 expected_len; 6253 6254 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32); 6255 if (len < expected_len) { 6256 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n", 6257 len, tag); 6258 return -EINVAL; 6259 } 6260 6261 switch (tag) { 6262 case WMI_TAG_SERVICE_AVAILABLE_EVENT: 6263 ev = (struct wmi_service_available_event *)ptr; 6264 for (i = 0, j = WMI_MAX_SERVICE; 6265 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE; 6266 i++) { 6267 do { 6268 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) & 6269 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 6270 set_bit(j, ab->wmi_ab.svc_map); 6271 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 6272 } 6273 6274 ath12k_dbg(ab, ATH12K_DBG_WMI, 6275 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x", 6276 ev->wmi_service_segment_bitmap[0], 6277 ev->wmi_service_segment_bitmap[1], 6278 ev->wmi_service_segment_bitmap[2], 6279 ev->wmi_service_segment_bitmap[3]); 6280 break; 6281 case WMI_TAG_ARRAY_UINT32: 6282 wmi_ext2_service_bitmap = (u32 *)ptr; 6283 for (i = 0, j = WMI_MAX_EXT_SERVICE; 6284 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT2_SERVICE; 6285 i++) { 6286 do { 6287 if (wmi_ext2_service_bitmap[i] & 6288 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 6289 set_bit(j, ab->wmi_ab.svc_map); 6290 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 6291 } 6292 6293 ath12k_dbg(ab, ATH12K_DBG_WMI, 6294 "wmi_ext2_service_bitmap 0x%04x 0x%04x 0x%04x 0x%04x", 6295 wmi_ext2_service_bitmap[0], wmi_ext2_service_bitmap[1], 6296 wmi_ext2_service_bitmap[2], wmi_ext2_service_bitmap[3]); 6297 break; 6298 } 6299 return 0; 6300 } 6301 6302 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb) 6303 { 6304 int ret; 6305 6306 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 6307 ath12k_wmi_tlv_services_parser, 6308 NULL); 6309 return ret; 6310 } 6311 6312 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb) 6313 { 6314 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0}; 6315 struct ath12k *ar; 6316 6317 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) { 6318 ath12k_warn(ab, "failed to extract peer assoc conf event"); 6319 return; 6320 } 6321 6322 ath12k_dbg(ab, ATH12K_DBG_WMI, 6323 "peer assoc conf ev vdev id %d macaddr %pM\n", 6324 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr); 6325 6326 rcu_read_lock(); 6327 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id); 6328 6329 if (!ar) { 6330 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d", 6331 peer_assoc_conf.vdev_id); 6332 rcu_read_unlock(); 6333 return; 6334 } 6335 6336 complete(&ar->peer_assoc_done); 6337 rcu_read_unlock(); 6338 } 6339 6340 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb) 6341 { 6342 } 6343 6344 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned 6345 * is not part of BDF CTL(Conformance test limits) table entries. 6346 */ 6347 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab, 6348 struct sk_buff *skb) 6349 { 6350 const void **tb; 6351 const struct wmi_pdev_ctl_failsafe_chk_event *ev; 6352 int ret; 6353 6354 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6355 if (IS_ERR(tb)) { 6356 ret = PTR_ERR(tb); 6357 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6358 return; 6359 } 6360 6361 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT]; 6362 if (!ev) { 6363 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev"); 6364 kfree(tb); 6365 return; 6366 } 6367 6368 ath12k_dbg(ab, ATH12K_DBG_WMI, 6369 "pdev ctl failsafe check ev status %d\n", 6370 ev->ctl_failsafe_status); 6371 6372 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power 6373 * to 10 dBm else the CTL power entry in the BDF would be picked up. 6374 */ 6375 if (ev->ctl_failsafe_status != 0) 6376 ath12k_warn(ab, "pdev ctl failsafe failure status %d", 6377 ev->ctl_failsafe_status); 6378 6379 kfree(tb); 6380 } 6381 6382 static void 6383 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab, 6384 const struct ath12k_wmi_pdev_csa_event *ev, 6385 const u32 *vdev_ids) 6386 { 6387 int i; 6388 struct ath12k_vif *arvif; 6389 6390 /* Finish CSA once the switch count becomes NULL */ 6391 if (ev->current_switch_count) 6392 return; 6393 6394 rcu_read_lock(); 6395 for (i = 0; i < le32_to_cpu(ev->num_vdevs); i++) { 6396 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]); 6397 6398 if (!arvif) { 6399 ath12k_warn(ab, "Recvd csa status for unknown vdev %d", 6400 vdev_ids[i]); 6401 continue; 6402 } 6403 6404 if (arvif->is_up && arvif->vif->bss_conf.csa_active) 6405 ieee80211_csa_finish(arvif->vif); 6406 } 6407 rcu_read_unlock(); 6408 } 6409 6410 static void 6411 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab, 6412 struct sk_buff *skb) 6413 { 6414 const void **tb; 6415 const struct ath12k_wmi_pdev_csa_event *ev; 6416 const u32 *vdev_ids; 6417 int ret; 6418 6419 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6420 if (IS_ERR(tb)) { 6421 ret = PTR_ERR(tb); 6422 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6423 return; 6424 } 6425 6426 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT]; 6427 vdev_ids = tb[WMI_TAG_ARRAY_UINT32]; 6428 6429 if (!ev || !vdev_ids) { 6430 ath12k_warn(ab, "failed to fetch pdev csa switch count ev"); 6431 kfree(tb); 6432 return; 6433 } 6434 6435 ath12k_dbg(ab, ATH12K_DBG_WMI, 6436 "pdev csa switch count %d for pdev %d, num_vdevs %d", 6437 ev->current_switch_count, ev->pdev_id, 6438 ev->num_vdevs); 6439 6440 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids); 6441 6442 kfree(tb); 6443 } 6444 6445 static void 6446 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb) 6447 { 6448 const void **tb; 6449 const struct ath12k_wmi_pdev_radar_event *ev; 6450 struct ath12k *ar; 6451 int ret; 6452 6453 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6454 if (IS_ERR(tb)) { 6455 ret = PTR_ERR(tb); 6456 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6457 return; 6458 } 6459 6460 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT]; 6461 6462 if (!ev) { 6463 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev"); 6464 kfree(tb); 6465 return; 6466 } 6467 6468 ath12k_dbg(ab, ATH12K_DBG_WMI, 6469 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d", 6470 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width, 6471 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp, 6472 ev->freq_offset, ev->sidx); 6473 6474 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id)); 6475 6476 if (!ar) { 6477 ath12k_warn(ab, "radar detected in invalid pdev %d\n", 6478 ev->pdev_id); 6479 goto exit; 6480 } 6481 6482 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n", 6483 ev->pdev_id); 6484 6485 if (ar->dfs_block_radar_events) 6486 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n"); 6487 else 6488 ieee80211_radar_detected(ar->hw); 6489 6490 exit: 6491 kfree(tb); 6492 } 6493 6494 static void 6495 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab, 6496 struct sk_buff *skb) 6497 { 6498 struct ath12k *ar; 6499 struct wmi_pdev_temperature_event ev = {0}; 6500 6501 if (ath12k_pull_pdev_temp_ev(ab, skb->data, skb->len, &ev) != 0) { 6502 ath12k_warn(ab, "failed to extract pdev temperature event"); 6503 return; 6504 } 6505 6506 ath12k_dbg(ab, ATH12K_DBG_WMI, 6507 "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id); 6508 6509 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id)); 6510 if (!ar) { 6511 ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id); 6512 return; 6513 } 6514 } 6515 6516 static void ath12k_fils_discovery_event(struct ath12k_base *ab, 6517 struct sk_buff *skb) 6518 { 6519 const void **tb; 6520 const struct wmi_fils_discovery_event *ev; 6521 int ret; 6522 6523 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6524 if (IS_ERR(tb)) { 6525 ret = PTR_ERR(tb); 6526 ath12k_warn(ab, 6527 "failed to parse FILS discovery event tlv %d\n", 6528 ret); 6529 return; 6530 } 6531 6532 ev = tb[WMI_TAG_HOST_SWFDA_EVENT]; 6533 if (!ev) { 6534 ath12k_warn(ab, "failed to fetch FILS discovery event\n"); 6535 kfree(tb); 6536 return; 6537 } 6538 6539 ath12k_warn(ab, 6540 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n", 6541 ev->vdev_id, ev->fils_tt, ev->tbtt); 6542 6543 kfree(tb); 6544 } 6545 6546 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab, 6547 struct sk_buff *skb) 6548 { 6549 const void **tb; 6550 const struct wmi_probe_resp_tx_status_event *ev; 6551 int ret; 6552 6553 tb = ath12k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); 6554 if (IS_ERR(tb)) { 6555 ret = PTR_ERR(tb); 6556 ath12k_warn(ab, 6557 "failed to parse probe response transmission status event tlv: %d\n", 6558 ret); 6559 return; 6560 } 6561 6562 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT]; 6563 if (!ev) { 6564 ath12k_warn(ab, 6565 "failed to fetch probe response transmission status event"); 6566 kfree(tb); 6567 return; 6568 } 6569 6570 if (ev->tx_status) 6571 ath12k_warn(ab, 6572 "Probe response transmission failed for vdev_id %u, status %u\n", 6573 ev->vdev_id, ev->tx_status); 6574 6575 kfree(tb); 6576 } 6577 6578 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb) 6579 { 6580 struct wmi_cmd_hdr *cmd_hdr; 6581 enum wmi_tlv_event_id id; 6582 6583 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 6584 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID); 6585 6586 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr))) 6587 goto out; 6588 6589 switch (id) { 6590 /* Process all the WMI events here */ 6591 case WMI_SERVICE_READY_EVENTID: 6592 ath12k_service_ready_event(ab, skb); 6593 break; 6594 case WMI_SERVICE_READY_EXT_EVENTID: 6595 ath12k_service_ready_ext_event(ab, skb); 6596 break; 6597 case WMI_SERVICE_READY_EXT2_EVENTID: 6598 ath12k_service_ready_ext2_event(ab, skb); 6599 break; 6600 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID: 6601 ath12k_reg_chan_list_event(ab, skb); 6602 break; 6603 case WMI_READY_EVENTID: 6604 ath12k_ready_event(ab, skb); 6605 break; 6606 case WMI_PEER_DELETE_RESP_EVENTID: 6607 ath12k_peer_delete_resp_event(ab, skb); 6608 break; 6609 case WMI_VDEV_START_RESP_EVENTID: 6610 ath12k_vdev_start_resp_event(ab, skb); 6611 break; 6612 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID: 6613 ath12k_bcn_tx_status_event(ab, skb); 6614 break; 6615 case WMI_VDEV_STOPPED_EVENTID: 6616 ath12k_vdev_stopped_event(ab, skb); 6617 break; 6618 case WMI_MGMT_RX_EVENTID: 6619 ath12k_mgmt_rx_event(ab, skb); 6620 /* mgmt_rx_event() owns the skb now! */ 6621 return; 6622 case WMI_MGMT_TX_COMPLETION_EVENTID: 6623 ath12k_mgmt_tx_compl_event(ab, skb); 6624 break; 6625 case WMI_SCAN_EVENTID: 6626 ath12k_scan_event(ab, skb); 6627 break; 6628 case WMI_PEER_STA_KICKOUT_EVENTID: 6629 ath12k_peer_sta_kickout_event(ab, skb); 6630 break; 6631 case WMI_ROAM_EVENTID: 6632 ath12k_roam_event(ab, skb); 6633 break; 6634 case WMI_CHAN_INFO_EVENTID: 6635 ath12k_chan_info_event(ab, skb); 6636 break; 6637 case WMI_PDEV_BSS_CHAN_INFO_EVENTID: 6638 ath12k_pdev_bss_chan_info_event(ab, skb); 6639 break; 6640 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: 6641 ath12k_vdev_install_key_compl_event(ab, skb); 6642 break; 6643 case WMI_SERVICE_AVAILABLE_EVENTID: 6644 ath12k_service_available_event(ab, skb); 6645 break; 6646 case WMI_PEER_ASSOC_CONF_EVENTID: 6647 ath12k_peer_assoc_conf_event(ab, skb); 6648 break; 6649 case WMI_UPDATE_STATS_EVENTID: 6650 ath12k_update_stats_event(ab, skb); 6651 break; 6652 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID: 6653 ath12k_pdev_ctl_failsafe_check_event(ab, skb); 6654 break; 6655 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID: 6656 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb); 6657 break; 6658 case WMI_PDEV_TEMPERATURE_EVENTID: 6659 ath12k_wmi_pdev_temperature_event(ab, skb); 6660 break; 6661 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID: 6662 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb); 6663 break; 6664 case WMI_HOST_FILS_DISCOVERY_EVENTID: 6665 ath12k_fils_discovery_event(ab, skb); 6666 break; 6667 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID: 6668 ath12k_probe_resp_tx_status_event(ab, skb); 6669 break; 6670 /* add Unsupported events here */ 6671 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID: 6672 case WMI_PEER_OPER_MODE_CHANGE_EVENTID: 6673 case WMI_TWT_ENABLE_EVENTID: 6674 case WMI_TWT_DISABLE_EVENTID: 6675 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID: 6676 ath12k_dbg(ab, ATH12K_DBG_WMI, 6677 "ignoring unsupported event 0x%x\n", id); 6678 break; 6679 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID: 6680 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb); 6681 break; 6682 case WMI_VDEV_DELETE_RESP_EVENTID: 6683 ath12k_vdev_delete_resp_event(ab, skb); 6684 break; 6685 /* TODO: Add remaining events */ 6686 default: 6687 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id); 6688 break; 6689 } 6690 6691 out: 6692 dev_kfree_skb(skb); 6693 } 6694 6695 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab, 6696 u32 pdev_idx) 6697 { 6698 int status; 6699 u32 svc_id[] = { ATH12K_HTC_SVC_ID_WMI_CONTROL, 6700 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1, 6701 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2 }; 6702 struct ath12k_htc_svc_conn_req conn_req = {}; 6703 struct ath12k_htc_svc_conn_resp conn_resp = {}; 6704 6705 /* these fields are the same for all service endpoints */ 6706 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete; 6707 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx; 6708 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits; 6709 6710 /* connect to control service */ 6711 conn_req.service_id = svc_id[pdev_idx]; 6712 6713 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp); 6714 if (status) { 6715 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n", 6716 status); 6717 return status; 6718 } 6719 6720 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid; 6721 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid; 6722 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len; 6723 6724 return 0; 6725 } 6726 6727 static int 6728 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar, 6729 struct wmi_unit_test_cmd ut_cmd, 6730 u32 *test_args) 6731 { 6732 struct ath12k_wmi_pdev *wmi = ar->wmi; 6733 struct wmi_unit_test_cmd *cmd; 6734 struct sk_buff *skb; 6735 struct wmi_tlv *tlv; 6736 void *ptr; 6737 u32 *ut_cmd_args; 6738 int buf_len, arg_len; 6739 int ret; 6740 int i; 6741 6742 arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args); 6743 buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE; 6744 6745 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 6746 if (!skb) 6747 return -ENOMEM; 6748 6749 cmd = (struct wmi_unit_test_cmd *)skb->data; 6750 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD, 6751 sizeof(ut_cmd)); 6752 6753 cmd->vdev_id = ut_cmd.vdev_id; 6754 cmd->module_id = ut_cmd.module_id; 6755 cmd->num_args = ut_cmd.num_args; 6756 cmd->diag_token = ut_cmd.diag_token; 6757 6758 ptr = skb->data + sizeof(ut_cmd); 6759 6760 tlv = ptr; 6761 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len); 6762 6763 ptr += TLV_HDR_SIZE; 6764 6765 ut_cmd_args = ptr; 6766 for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++) 6767 ut_cmd_args[i] = test_args[i]; 6768 6769 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 6770 "WMI unit test : module %d vdev %d n_args %d token %d\n", 6771 cmd->module_id, cmd->vdev_id, cmd->num_args, 6772 cmd->diag_token); 6773 6774 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID); 6775 6776 if (ret) { 6777 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n", 6778 ret); 6779 dev_kfree_skb(skb); 6780 } 6781 6782 return ret; 6783 } 6784 6785 int ath12k_wmi_simulate_radar(struct ath12k *ar) 6786 { 6787 struct ath12k_vif *arvif; 6788 u32 dfs_args[DFS_MAX_TEST_ARGS]; 6789 struct wmi_unit_test_cmd wmi_ut; 6790 bool arvif_found = false; 6791 6792 list_for_each_entry(arvif, &ar->arvifs, list) { 6793 if (arvif->is_started && arvif->vdev_type == WMI_VDEV_TYPE_AP) { 6794 arvif_found = true; 6795 break; 6796 } 6797 } 6798 6799 if (!arvif_found) 6800 return -EINVAL; 6801 6802 dfs_args[DFS_TEST_CMDID] = 0; 6803 dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id; 6804 /* Currently we could pass segment_id(b0 - b1), chirp(b2) 6805 * freq offset (b3 - b10) to unit test. For simulation 6806 * purpose this can be set to 0 which is valid. 6807 */ 6808 dfs_args[DFS_TEST_RADAR_PARAM] = 0; 6809 6810 wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id); 6811 wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE); 6812 wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS); 6813 wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN); 6814 6815 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n"); 6816 6817 return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args); 6818 } 6819 6820 int ath12k_wmi_connect(struct ath12k_base *ab) 6821 { 6822 u32 i; 6823 u8 wmi_ep_count; 6824 6825 wmi_ep_count = ab->htc.wmi_ep_count; 6826 if (wmi_ep_count > ab->hw_params->max_radios) 6827 return -1; 6828 6829 for (i = 0; i < wmi_ep_count; i++) 6830 ath12k_connect_pdev_htc_service(ab, i); 6831 6832 return 0; 6833 } 6834 6835 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id) 6836 { 6837 if (WARN_ON(pdev_id >= MAX_RADIOS)) 6838 return; 6839 6840 /* TODO: Deinit any pdev specific wmi resource */ 6841 } 6842 6843 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 6844 u8 pdev_id) 6845 { 6846 struct ath12k_wmi_pdev *wmi_handle; 6847 6848 if (pdev_id >= ab->hw_params->max_radios) 6849 return -EINVAL; 6850 6851 wmi_handle = &ab->wmi_ab.wmi[pdev_id]; 6852 6853 wmi_handle->wmi_ab = &ab->wmi_ab; 6854 6855 ab->wmi_ab.ab = ab; 6856 /* TODO: Init remaining resource specific to pdev */ 6857 6858 return 0; 6859 } 6860 6861 int ath12k_wmi_attach(struct ath12k_base *ab) 6862 { 6863 int ret; 6864 6865 ret = ath12k_wmi_pdev_attach(ab, 0); 6866 if (ret) 6867 return ret; 6868 6869 ab->wmi_ab.ab = ab; 6870 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX; 6871 6872 /* It's overwritten when service_ext_ready is handled */ 6873 if (ab->hw_params->single_pdev_only) 6874 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE; 6875 6876 /* TODO: Init remaining wmi soc resources required */ 6877 init_completion(&ab->wmi_ab.service_ready); 6878 init_completion(&ab->wmi_ab.unified_ready); 6879 6880 return 0; 6881 } 6882 6883 void ath12k_wmi_detach(struct ath12k_base *ab) 6884 { 6885 int i; 6886 6887 /* TODO: Deinit wmi resource specific to SOC as required */ 6888 6889 for (i = 0; i < ab->htc.wmi_ep_count; i++) 6890 ath12k_wmi_pdev_detach(ab, i); 6891 6892 ath12k_wmi_free_dbring_caps(ab); 6893 } 6894