1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef ATH11K_WMI_H 7 #define ATH11K_WMI_H 8 9 #include <net/mac80211.h> 10 #include "htc.h" 11 12 struct ath11k_base; 13 struct ath11k; 14 struct ath11k_fw_stats; 15 struct ath11k_fw_dbglog; 16 struct ath11k_vif; 17 18 #define PSOC_HOST_MAX_NUM_SS (8) 19 20 /* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */ 21 #define MAX_HE_NSS 8 22 #define MAX_HE_MODULATION 8 23 #define MAX_HE_RU 4 24 #define HE_MODULATION_NONE 7 25 #define HE_PET_0_USEC 0 26 #define HE_PET_8_USEC 1 27 #define HE_PET_16_USEC 2 28 29 #define WMI_MAX_CHAINS 8 30 31 #define WMI_MAX_NUM_SS MAX_HE_NSS 32 #define WMI_MAX_NUM_RU MAX_HE_RU 33 34 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1) 35 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1) 36 #define WMI_TLV_CMD_UNSUPPORTED 0 37 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0 38 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0 39 40 struct wmi_cmd_hdr { 41 u32 cmd_id; 42 } __packed; 43 44 struct wmi_tlv { 45 u32 header; 46 u8 value[]; 47 } __packed; 48 49 #define WMI_TLV_LEN GENMASK(15, 0) 50 #define WMI_TLV_TAG GENMASK(31, 16) 51 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header) 52 53 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0) 54 #define WMI_MAX_MEM_REQS 32 55 #define ATH11K_MAX_HW_LISTEN_INTERVAL 5 56 57 #define WLAN_SCAN_MAX_HINT_S_SSID 10 58 #define WLAN_SCAN_MAX_HINT_BSSID 10 59 #define MAX_RNR_BSS 5 60 61 #define WLAN_SCAN_MAX_HINT_S_SSID 10 62 #define WLAN_SCAN_MAX_HINT_BSSID 10 63 #define MAX_RNR_BSS 5 64 65 #define WLAN_SCAN_PARAMS_MAX_SSID 16 66 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 67 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 68 69 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1 70 71 #define WMI_BA_MODE_BUFFER_SIZE_256 3 72 /* 73 * HW mode config type replicated from FW header 74 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active. 75 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands, 76 * one in 2G and another in 5G. 77 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in 78 * same band; no tx allowed. 79 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band. 80 * Support for both PHYs within one band is planned 81 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES), 82 * but could be extended to other bands in the future. 83 * The separation of the band between the two PHYs needs 84 * to be communicated separately. 85 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS 86 * as in WMI_HW_MODE_SBS, and 3rd on the other band 87 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and 88 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). 89 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. 90 */ 91 enum wmi_host_hw_mode_config_type { 92 WMI_HOST_HW_MODE_SINGLE = 0, 93 WMI_HOST_HW_MODE_DBS = 1, 94 WMI_HOST_HW_MODE_SBS_PASSIVE = 2, 95 WMI_HOST_HW_MODE_SBS = 3, 96 WMI_HOST_HW_MODE_DBS_SBS = 4, 97 WMI_HOST_HW_MODE_DBS_OR_SBS = 5, 98 99 /* keep last */ 100 WMI_HOST_HW_MODE_MAX 101 }; 102 103 /* HW mode priority values used to detect the preferred HW mode 104 * on the available modes. 105 */ 106 enum wmi_host_hw_mode_priority { 107 WMI_HOST_HW_MODE_DBS_SBS_PRI, 108 WMI_HOST_HW_MODE_DBS_PRI, 109 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI, 110 WMI_HOST_HW_MODE_SBS_PRI, 111 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI, 112 WMI_HOST_HW_MODE_SINGLE_PRI, 113 114 /* keep last the lowest priority */ 115 WMI_HOST_HW_MODE_MAX_PRI 116 }; 117 118 enum WMI_HOST_WLAN_BAND { 119 WMI_HOST_WLAN_2G_CAP = 0x1, 120 WMI_HOST_WLAN_5G_CAP = 0x2, 121 WMI_HOST_WLAN_2G_5G_CAP = WMI_HOST_WLAN_2G_CAP | WMI_HOST_WLAN_5G_CAP, 122 }; 123 124 /* Parameters used for WMI_VDEV_PARAM_AUTORATE_MISC_CFG command. 125 * Used only for HE auto rate mode. 126 */ 127 enum { 128 /* HE LTF related configuration */ 129 WMI_HE_AUTORATE_LTF_1X = BIT(0), 130 WMI_HE_AUTORATE_LTF_2X = BIT(1), 131 WMI_HE_AUTORATE_LTF_4X = BIT(2), 132 133 /* HE GI related configuration */ 134 WMI_AUTORATE_400NS_GI = BIT(8), 135 WMI_AUTORATE_800NS_GI = BIT(9), 136 WMI_AUTORATE_1600NS_GI = BIT(10), 137 WMI_AUTORATE_3200NS_GI = BIT(11), 138 }; 139 140 /* 141 * wmi command groups. 142 */ 143 enum wmi_cmd_group { 144 /* 0 to 2 are reserved */ 145 WMI_GRP_START = 0x3, 146 WMI_GRP_SCAN = WMI_GRP_START, 147 WMI_GRP_PDEV = 0x4, 148 WMI_GRP_VDEV = 0x5, 149 WMI_GRP_PEER = 0x6, 150 WMI_GRP_MGMT = 0x7, 151 WMI_GRP_BA_NEG = 0x8, 152 WMI_GRP_STA_PS = 0x9, 153 WMI_GRP_DFS = 0xa, 154 WMI_GRP_ROAM = 0xb, 155 WMI_GRP_OFL_SCAN = 0xc, 156 WMI_GRP_P2P = 0xd, 157 WMI_GRP_AP_PS = 0xe, 158 WMI_GRP_RATE_CTRL = 0xf, 159 WMI_GRP_PROFILE = 0x10, 160 WMI_GRP_SUSPEND = 0x11, 161 WMI_GRP_BCN_FILTER = 0x12, 162 WMI_GRP_WOW = 0x13, 163 WMI_GRP_RTT = 0x14, 164 WMI_GRP_SPECTRAL = 0x15, 165 WMI_GRP_STATS = 0x16, 166 WMI_GRP_ARP_NS_OFL = 0x17, 167 WMI_GRP_NLO_OFL = 0x18, 168 WMI_GRP_GTK_OFL = 0x19, 169 WMI_GRP_CSA_OFL = 0x1a, 170 WMI_GRP_CHATTER = 0x1b, 171 WMI_GRP_TID_ADDBA = 0x1c, 172 WMI_GRP_MISC = 0x1d, 173 WMI_GRP_GPIO = 0x1e, 174 WMI_GRP_FWTEST = 0x1f, 175 WMI_GRP_TDLS = 0x20, 176 WMI_GRP_RESMGR = 0x21, 177 WMI_GRP_STA_SMPS = 0x22, 178 WMI_GRP_WLAN_HB = 0x23, 179 WMI_GRP_RMC = 0x24, 180 WMI_GRP_MHF_OFL = 0x25, 181 WMI_GRP_LOCATION_SCAN = 0x26, 182 WMI_GRP_OEM = 0x27, 183 WMI_GRP_NAN = 0x28, 184 WMI_GRP_COEX = 0x29, 185 WMI_GRP_OBSS_OFL = 0x2a, 186 WMI_GRP_LPI = 0x2b, 187 WMI_GRP_EXTSCAN = 0x2c, 188 WMI_GRP_DHCP_OFL = 0x2d, 189 WMI_GRP_IPA = 0x2e, 190 WMI_GRP_MDNS_OFL = 0x2f, 191 WMI_GRP_SAP_OFL = 0x30, 192 WMI_GRP_OCB = 0x31, 193 WMI_GRP_SOC = 0x32, 194 WMI_GRP_PKT_FILTER = 0x33, 195 WMI_GRP_MAWC = 0x34, 196 WMI_GRP_PMF_OFFLOAD = 0x35, 197 WMI_GRP_BPF_OFFLOAD = 0x36, 198 WMI_GRP_NAN_DATA = 0x37, 199 WMI_GRP_PROTOTYPE = 0x38, 200 WMI_GRP_MONITOR = 0x39, 201 WMI_GRP_REGULATORY = 0x3a, 202 WMI_GRP_HW_DATA_FILTER = 0x3b, 203 WMI_GRP_WLM = 0x3c, 204 WMI_GRP_11K_OFFLOAD = 0x3d, 205 WMI_GRP_TWT = 0x3e, 206 WMI_GRP_MOTION_DET = 0x3f, 207 WMI_GRP_SPATIAL_REUSE = 0x40, 208 }; 209 210 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 211 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 212 213 #define WMI_CMD_UNSUPPORTED 0 214 215 enum wmi_tlv_cmd_id { 216 WMI_INIT_CMDID = 0x1, 217 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN), 218 WMI_STOP_SCAN_CMDID, 219 WMI_SCAN_CHAN_LIST_CMDID, 220 WMI_SCAN_SCH_PRIO_TBL_CMDID, 221 WMI_SCAN_UPDATE_REQUEST_CMDID, 222 WMI_SCAN_PROB_REQ_OUI_CMDID, 223 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID, 224 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV), 225 WMI_PDEV_SET_CHANNEL_CMDID, 226 WMI_PDEV_SET_PARAM_CMDID, 227 WMI_PDEV_PKTLOG_ENABLE_CMDID, 228 WMI_PDEV_PKTLOG_DISABLE_CMDID, 229 WMI_PDEV_SET_WMM_PARAMS_CMDID, 230 WMI_PDEV_SET_HT_CAP_IE_CMDID, 231 WMI_PDEV_SET_VHT_CAP_IE_CMDID, 232 WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 233 WMI_PDEV_SET_QUIET_MODE_CMDID, 234 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 235 WMI_PDEV_GET_TPC_CONFIG_CMDID, 236 WMI_PDEV_SET_BASE_MACADDR_CMDID, 237 WMI_PDEV_DUMP_CMDID, 238 WMI_PDEV_SET_LED_CONFIG_CMDID, 239 WMI_PDEV_GET_TEMPERATURE_CMDID, 240 WMI_PDEV_SET_LED_FLASHING_CMDID, 241 WMI_PDEV_SMART_ANT_ENABLE_CMDID, 242 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 243 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 244 WMI_PDEV_SET_CTL_TABLE_CMDID, 245 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID, 246 WMI_PDEV_FIPS_CMDID, 247 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID, 248 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 249 WMI_PDEV_GET_NFCAL_POWER_CMDID, 250 WMI_PDEV_GET_TPC_CMDID, 251 WMI_MIB_STATS_ENABLE_CMDID, 252 WMI_PDEV_SET_PCL_CMDID, 253 WMI_PDEV_SET_HW_MODE_CMDID, 254 WMI_PDEV_SET_MAC_CONFIG_CMDID, 255 WMI_PDEV_SET_ANTENNA_MODE_CMDID, 256 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID, 257 WMI_PDEV_WAL_POWER_DEBUG_CMDID, 258 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID, 259 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID, 260 WMI_PDEV_GET_ANTDIV_STATUS_CMDID, 261 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID, 262 WMI_PDEV_SET_STATS_THRESHOLD_CMDID, 263 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID, 264 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID, 265 WMI_PDEV_CHECK_CAL_VERSION_CMDID, 266 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID, 267 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID, 268 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 269 WMI_PDEV_UPDATE_PMK_CACHE_CMDID, 270 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID, 271 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID, 272 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID, 273 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID, 274 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID, 275 WMI_PDEV_DMA_RING_CFG_REQ_CMDID, 276 WMI_PDEV_HE_TB_ACTION_FRM_CMDID, 277 WMI_PDEV_PKTLOG_FILTER_CMDID, 278 WMI_PDEV_SET_RAP_CONFIG_CMDID, 279 WMI_PDEV_DSM_FILTER_CMDID, 280 WMI_PDEV_FRAME_INJECT_CMDID, 281 WMI_PDEV_TBTT_OFFSET_SYNC_CMDID, 282 WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID, 283 WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID, 284 WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 285 WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 286 WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 287 WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 288 WMI_PDEV_GET_TPC_STATS_CMDID, 289 WMI_PDEV_ENABLE_DURATION_BASED_TX_MODE_SELECTION_CMDID, 290 WMI_PDEV_GET_DPD_STATUS_CMDID, 291 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID, 292 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID, 293 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV), 294 WMI_VDEV_DELETE_CMDID, 295 WMI_VDEV_START_REQUEST_CMDID, 296 WMI_VDEV_RESTART_REQUEST_CMDID, 297 WMI_VDEV_UP_CMDID, 298 WMI_VDEV_STOP_CMDID, 299 WMI_VDEV_DOWN_CMDID, 300 WMI_VDEV_SET_PARAM_CMDID, 301 WMI_VDEV_INSTALL_KEY_CMDID, 302 WMI_VDEV_WNM_SLEEPMODE_CMDID, 303 WMI_VDEV_WMM_ADDTS_CMDID, 304 WMI_VDEV_WMM_DELTS_CMDID, 305 WMI_VDEV_SET_WMM_PARAMS_CMDID, 306 WMI_VDEV_SET_GTX_PARAMS_CMDID, 307 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID, 308 WMI_VDEV_PLMREQ_START_CMDID, 309 WMI_VDEV_PLMREQ_STOP_CMDID, 310 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID, 311 WMI_VDEV_SET_IE_CMDID, 312 WMI_VDEV_RATEMASK_CMDID, 313 WMI_VDEV_ATF_REQUEST_CMDID, 314 WMI_VDEV_SET_DSCP_TID_MAP_CMDID, 315 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 316 WMI_VDEV_SET_QUIET_MODE_CMDID, 317 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID, 318 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID, 319 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID, 320 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER), 321 WMI_PEER_DELETE_CMDID, 322 WMI_PEER_FLUSH_TIDS_CMDID, 323 WMI_PEER_SET_PARAM_CMDID, 324 WMI_PEER_ASSOC_CMDID, 325 WMI_PEER_ADD_WDS_ENTRY_CMDID, 326 WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 327 WMI_PEER_MCAST_GROUP_CMDID, 328 WMI_PEER_INFO_REQ_CMDID, 329 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID, 330 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID, 331 WMI_PEER_UPDATE_WDS_ENTRY_CMDID, 332 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID, 333 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 334 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 335 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 336 WMI_PEER_ATF_REQUEST_CMDID, 337 WMI_PEER_BWF_REQUEST_CMDID, 338 WMI_PEER_REORDER_QUEUE_SETUP_CMDID, 339 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID, 340 WMI_PEER_SET_RX_BLOCKSIZE_CMDID, 341 WMI_PEER_ANTDIV_INFO_REQ_CMDID, 342 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT), 343 WMI_PDEV_SEND_BCN_CMDID, 344 WMI_BCN_TMPL_CMDID, 345 WMI_BCN_FILTER_RX_CMDID, 346 WMI_PRB_REQ_FILTER_RX_CMDID, 347 WMI_MGMT_TX_CMDID, 348 WMI_PRB_TMPL_CMDID, 349 WMI_MGMT_TX_SEND_CMDID, 350 WMI_OFFCHAN_DATA_TX_SEND_CMDID, 351 WMI_PDEV_SEND_FD_CMDID, 352 WMI_BCN_OFFLOAD_CTRL_CMDID, 353 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID, 354 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID, 355 WMI_FILS_DISCOVERY_TMPL_CMDID, 356 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 357 WMI_ADDBA_SEND_CMDID, 358 WMI_ADDBA_STATUS_CMDID, 359 WMI_DELBA_SEND_CMDID, 360 WMI_ADDBA_SET_RESP_CMDID, 361 WMI_SEND_SINGLEAMSDU_CMDID, 362 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS), 363 WMI_STA_POWERSAVE_PARAM_CMDID, 364 WMI_STA_MIMO_PS_MODE_CMDID, 365 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS), 366 WMI_PDEV_DFS_DISABLE_CMDID, 367 WMI_DFS_PHYERR_FILTER_ENA_CMDID, 368 WMI_DFS_PHYERR_FILTER_DIS_CMDID, 369 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID, 370 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID, 371 WMI_VDEV_ADFS_CH_CFG_CMDID, 372 WMI_VDEV_ADFS_OCAC_ABORT_CMDID, 373 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM), 374 WMI_ROAM_SCAN_RSSI_THRESHOLD, 375 WMI_ROAM_SCAN_PERIOD, 376 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 377 WMI_ROAM_AP_PROFILE, 378 WMI_ROAM_CHAN_LIST, 379 WMI_ROAM_SCAN_CMD, 380 WMI_ROAM_SYNCH_COMPLETE, 381 WMI_ROAM_SET_RIC_REQUEST_CMDID, 382 WMI_ROAM_INVOKE_CMDID, 383 WMI_ROAM_FILTER_CMDID, 384 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID, 385 WMI_ROAM_CONFIGURE_MAWC_CMDID, 386 WMI_ROAM_SET_MBO_PARAM_CMDID, 387 WMI_ROAM_PER_CONFIG_CMDID, 388 WMI_ROAM_BTM_CONFIG_CMDID, 389 WMI_ENABLE_FILS_CMDID, 390 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN), 391 WMI_OFL_SCAN_REMOVE_AP_PROFILE, 392 WMI_OFL_SCAN_PERIOD, 393 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P), 394 WMI_P2P_DEV_SET_DISCOVERABILITY, 395 WMI_P2P_GO_SET_BEACON_IE, 396 WMI_P2P_GO_SET_PROBE_RESP_IE, 397 WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 398 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID, 399 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID, 400 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID, 401 WMI_P2P_SET_OPPPS_PARAM_CMDID, 402 WMI_P2P_LISTEN_OFFLOAD_START_CMDID, 403 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID, 404 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS), 405 WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 406 WMI_AP_PS_EGAP_PARAM_CMDID, 407 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL), 408 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE), 409 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 410 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 411 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 412 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 413 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 414 WMI_PDEV_RESUME_CMDID, 415 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER), 416 WMI_RMV_BCN_FILTER_CMDID, 417 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW), 418 WMI_WOW_DEL_WAKE_PATTERN_CMDID, 419 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 420 WMI_WOW_ENABLE_CMDID, 421 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 422 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID, 423 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID, 424 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID, 425 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID, 426 WMI_D0_WOW_ENABLE_DISABLE_CMDID, 427 WMI_EXTWOW_ENABLE_CMDID, 428 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID, 429 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID, 430 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID, 431 WMI_WOW_UDP_SVC_OFLD_CMDID, 432 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID, 433 WMI_WOW_SET_ACTION_WAKE_UP_CMDID, 434 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT), 435 WMI_RTT_TSF_CMDID, 436 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL), 437 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 438 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS), 439 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID, 440 WMI_REQUEST_STATS_EXT_CMDID, 441 WMI_REQUEST_LINK_STATS_CMDID, 442 WMI_START_LINK_STATS_CMDID, 443 WMI_CLEAR_LINK_STATS_CMDID, 444 WMI_GET_FW_MEM_DUMP_CMDID, 445 WMI_DEBUG_MESG_FLUSH_CMDID, 446 WMI_DIAG_EVENT_LOG_CONFIG_CMDID, 447 WMI_REQUEST_WLAN_STATS_CMDID, 448 WMI_REQUEST_RCPI_CMDID, 449 WMI_REQUEST_PEER_STATS_INFO_CMDID, 450 WMI_REQUEST_RADIO_CHAN_STATS_CMDID, 451 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL), 452 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID, 453 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID, 454 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 455 WMI_APFIND_CMDID, 456 WMI_PASSPOINT_LIST_CONFIG_CMDID, 457 WMI_NLO_CONFIGURE_MAWC_CMDID, 458 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 459 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 460 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 461 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER), 462 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID, 463 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID, 464 WMI_CHATTER_COALESCING_QUERY_CMDID, 465 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA), 466 WMI_PEER_TID_DELBA_CMDID, 467 WMI_STA_DTIM_PS_METHOD_CMDID, 468 WMI_STA_UAPSD_AUTO_TRIG_CMDID, 469 WMI_STA_KEEPALIVE_CMDID, 470 WMI_BA_REQ_SSN_CMDID, 471 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC), 472 WMI_PDEV_UTF_CMDID, 473 WMI_DBGLOG_CFG_CMDID, 474 WMI_PDEV_QVIT_CMDID, 475 WMI_PDEV_FTM_INTG_CMDID, 476 WMI_VDEV_SET_KEEPALIVE_CMDID, 477 WMI_VDEV_GET_KEEPALIVE_CMDID, 478 WMI_FORCE_FW_HANG_CMDID, 479 WMI_SET_MCASTBCAST_FILTER_CMDID, 480 WMI_THERMAL_MGMT_CMDID, 481 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID, 482 WMI_TPC_CHAINMASK_CONFIG_CMDID, 483 WMI_SET_ANTENNA_DIVERSITY_CMDID, 484 WMI_OCB_SET_SCHED_CMDID, 485 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID, 486 WMI_LRO_CONFIG_CMDID, 487 WMI_TRANSFER_DATA_TO_FLASH_CMDID, 488 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID, 489 WMI_VDEV_WISA_CMDID, 490 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 491 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 492 WMI_READ_DATA_FROM_FLASH_CMDID, 493 WMI_THERM_THROT_SET_CONF_CMDID, 494 WMI_RUNTIME_DPD_RECAL_CMDID, 495 WMI_GET_TPC_POWER_CMDID, 496 WMI_IDLE_TRIGGER_MONITOR_CMDID, 497 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 498 WMI_GPIO_OUTPUT_CMDID, 499 WMI_TXBF_CMDID, 500 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST), 501 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID, 502 WMI_UNIT_TEST_CMDID, 503 WMI_FWTEST_CMDID, 504 WMI_QBOOST_CFG_CMDID, 505 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS), 506 WMI_TDLS_PEER_UPDATE_CMDID, 507 WMI_TDLS_SET_OFFCHAN_MODE_CMDID, 508 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR), 509 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID, 510 WMI_RESMGR_SET_CHAN_LATENCY_CMDID, 511 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 512 WMI_STA_SMPS_PARAM_CMDID, 513 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB), 514 WMI_HB_SET_TCP_PARAMS_CMDID, 515 WMI_HB_SET_TCP_PKT_FILTER_CMDID, 516 WMI_HB_SET_UDP_PARAMS_CMDID, 517 WMI_HB_SET_UDP_PKT_FILTER_CMDID, 518 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC), 519 WMI_RMC_SET_ACTION_PERIOD_CMDID, 520 WMI_RMC_CONFIG_CMDID, 521 WMI_RMC_SET_MANUAL_LEADER_CMDID, 522 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL), 523 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID, 524 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 525 WMI_BATCH_SCAN_DISABLE_CMDID, 526 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID, 527 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM), 528 WMI_OEM_REQUEST_CMDID, 529 WMI_LPI_OEM_REQ_CMDID, 530 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN), 531 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX), 532 WMI_CHAN_AVOID_UPDATE_CMDID, 533 WMI_COEX_CONFIG_CMDID, 534 WMI_CHAN_AVOID_RPT_ALLOW_CMDID, 535 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID, 536 WMI_SAR_LIMITS_CMDID, 537 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL), 538 WMI_OBSS_SCAN_DISABLE_CMDID, 539 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID, 540 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI), 541 WMI_LPI_START_SCAN_CMDID, 542 WMI_LPI_STOP_SCAN_CMDID, 543 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 544 WMI_EXTSCAN_STOP_CMDID, 545 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID, 546 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID, 547 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID, 548 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID, 549 WMI_EXTSCAN_SET_CAPABILITIES_CMDID, 550 WMI_EXTSCAN_GET_CAPABILITIES_CMDID, 551 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID, 552 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID, 553 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL), 554 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA), 555 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 556 WMI_MDNS_SET_FQDN_CMDID, 557 WMI_MDNS_SET_RESPONSE_CMDID, 558 WMI_MDNS_GET_STATS_CMDID, 559 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 560 WMI_SAP_SET_BLACKLIST_PARAM_CMDID, 561 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB), 562 WMI_OCB_SET_UTC_TIME_CMDID, 563 WMI_OCB_START_TIMING_ADVERT_CMDID, 564 WMI_OCB_STOP_TIMING_ADVERT_CMDID, 565 WMI_OCB_GET_TSF_TIMER_CMDID, 566 WMI_DCC_GET_STATS_CMDID, 567 WMI_DCC_CLEAR_STATS_CMDID, 568 WMI_DCC_UPDATE_NDL_CMDID, 569 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC), 570 WMI_SOC_SET_HW_MODE_CMDID, 571 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID, 572 WMI_SOC_SET_ANTENNA_MODE_CMDID, 573 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER), 574 WMI_PACKET_FILTER_ENABLE_CMDID, 575 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC), 576 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD), 577 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 578 WMI_BPF_GET_VDEV_STATS_CMDID, 579 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID, 580 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID, 581 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID, 582 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR), 583 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 584 WMI_11D_SCAN_START_CMDID, 585 WMI_11D_SCAN_STOP_CMDID, 586 WMI_SET_INIT_COUNTRY_CMDID, 587 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 588 WMI_NDP_INITIATOR_REQ_CMDID, 589 WMI_NDP_RESPONDER_REQ_CMDID, 590 WMI_NDP_END_REQ_CMDID, 591 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER), 592 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT), 593 WMI_TWT_DISABLE_CMDID, 594 WMI_TWT_ADD_DIALOG_CMDID, 595 WMI_TWT_DEL_DIALOG_CMDID, 596 WMI_TWT_PAUSE_DIALOG_CMDID, 597 WMI_TWT_RESUME_DIALOG_CMDID, 598 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID = 599 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE), 600 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID, 601 }; 602 603 enum wmi_tlv_event_id { 604 WMI_SERVICE_READY_EVENTID = 0x1, 605 WMI_READY_EVENTID, 606 WMI_SERVICE_AVAILABLE_EVENTID, 607 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 608 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV), 609 WMI_CHAN_INFO_EVENTID, 610 WMI_PHYERR_EVENTID, 611 WMI_PDEV_DUMP_EVENTID, 612 WMI_TX_PAUSE_EVENTID, 613 WMI_DFS_RADAR_EVENTID, 614 WMI_PDEV_L1SS_TRACK_EVENTID, 615 WMI_PDEV_TEMPERATURE_EVENTID, 616 WMI_SERVICE_READY_EXT_EVENTID, 617 WMI_PDEV_FIPS_EVENTID, 618 WMI_PDEV_CHANNEL_HOPPING_EVENTID, 619 WMI_PDEV_ANI_CCK_LEVEL_EVENTID, 620 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID, 621 WMI_PDEV_TPC_EVENTID, 622 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 623 WMI_PDEV_SET_HW_MODE_RESP_EVENTID, 624 WMI_PDEV_HW_MODE_TRANSITION_EVENTID, 625 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID, 626 WMI_PDEV_ANTDIV_STATUS_EVENTID, 627 WMI_PDEV_CHIP_POWER_STATS_EVENTID, 628 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID, 629 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID, 630 WMI_PDEV_CHECK_CAL_VERSION_EVENTID, 631 WMI_PDEV_DIV_RSSI_ANTID_EVENTID, 632 WMI_PDEV_BSS_CHAN_INFO_EVENTID, 633 WMI_PDEV_UPDATE_CTLTABLE_EVENTID, 634 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, 635 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, 636 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, 637 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID, 638 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID, 639 WMI_PDEV_RAP_INFO_EVENTID, 640 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID, 641 WMI_SERVICE_READY_EXT2_EVENTID, 642 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), 643 WMI_VDEV_STOPPED_EVENTID, 644 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 645 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID, 646 WMI_VDEV_TSF_REPORT_EVENTID, 647 WMI_VDEV_DELETE_RESP_EVENTID, 648 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID, 649 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID, 650 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER), 651 WMI_PEER_INFO_EVENTID, 652 WMI_PEER_TX_FAIL_CNT_THR_EVENTID, 653 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID, 654 WMI_PEER_STATE_EVENTID, 655 WMI_PEER_ASSOC_CONF_EVENTID, 656 WMI_PEER_DELETE_RESP_EVENTID, 657 WMI_PEER_RATECODE_LIST_EVENTID, 658 WMI_WDS_PEER_EVENTID, 659 WMI_PEER_STA_PS_STATECHG_EVENTID, 660 WMI_PEER_ANTDIV_INFO_EVENTID, 661 WMI_PEER_RESERVED0_EVENTID, 662 WMI_PEER_RESERVED1_EVENTID, 663 WMI_PEER_RESERVED2_EVENTID, 664 WMI_PEER_RESERVED3_EVENTID, 665 WMI_PEER_RESERVED4_EVENTID, 666 WMI_PEER_RESERVED5_EVENTID, 667 WMI_PEER_RESERVED6_EVENTID, 668 WMI_PEER_RESERVED7_EVENTID, 669 WMI_PEER_RESERVED8_EVENTID, 670 WMI_PEER_RESERVED9_EVENTID, 671 WMI_PEER_RESERVED10_EVENTID, 672 WMI_PEER_OPER_MODE_CHANGE_EVENTID, 673 WMI_PEER_TX_PN_RESPONSE_EVENTID, 674 WMI_PEER_CFR_CAPTURE_EVENTID, 675 WMI_PEER_CREATE_CONF_EVENTID, 676 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), 677 WMI_HOST_SWBA_EVENTID, 678 WMI_TBTTOFFSET_UPDATE_EVENTID, 679 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID, 680 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID, 681 WMI_MGMT_TX_COMPLETION_EVENTID, 682 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID, 683 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID, 684 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID, 685 WMI_HOST_FILS_DISCOVERY_EVENTID, 686 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 687 WMI_TX_ADDBA_COMPLETE_EVENTID, 688 WMI_BA_RSP_SSN_EVENTID, 689 WMI_AGGR_STATE_TRIG_EVENTID, 690 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM), 691 WMI_PROFILE_MATCH, 692 WMI_ROAM_SYNCH_EVENTID, 693 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P), 694 WMI_P2P_NOA_EVENTID, 695 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID, 696 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS), 697 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 698 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW), 699 WMI_D0_WOW_DISABLE_ACK_EVENTID, 700 WMI_WOW_INITIAL_WAKEUP_EVENTID, 701 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT), 702 WMI_TSF_MEASUREMENT_REPORT_EVENTID, 703 WMI_RTT_ERROR_REPORT_EVENTID, 704 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS), 705 WMI_IFACE_LINK_STATS_EVENTID, 706 WMI_PEER_LINK_STATS_EVENTID, 707 WMI_RADIO_LINK_STATS_EVENTID, 708 WMI_UPDATE_FW_MEM_DUMP_EVENTID, 709 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID, 710 WMI_INST_RSSI_STATS_EVENTID, 711 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID, 712 WMI_REPORT_STATS_EVENTID, 713 WMI_UPDATE_RCPI_EVENTID, 714 WMI_PEER_STATS_INFO_EVENTID, 715 WMI_RADIO_CHAN_STATS_EVENTID, 716 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 717 WMI_NLO_SCAN_COMPLETE_EVENTID, 718 WMI_APFIND_EVENTID, 719 WMI_PASSPOINT_MATCH_EVENTID, 720 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 721 WMI_GTK_REKEY_FAIL_EVENTID, 722 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 723 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER), 724 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS), 725 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID, 726 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID, 727 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC), 728 WMI_PDEV_UTF_EVENTID, 729 WMI_DEBUG_MESG_EVENTID, 730 WMI_UPDATE_STATS_EVENTID, 731 WMI_DEBUG_PRINT_EVENTID, 732 WMI_DCS_INTERFERENCE_EVENTID, 733 WMI_PDEV_QVIT_EVENTID, 734 WMI_WLAN_PROFILE_DATA_EVENTID, 735 WMI_PDEV_FTM_INTG_EVENTID, 736 WMI_WLAN_FREQ_AVOID_EVENTID, 737 WMI_VDEV_GET_KEEPALIVE_EVENTID, 738 WMI_THERMAL_MGMT_EVENTID, 739 WMI_DIAG_DATA_CONTAINER_EVENTID, 740 WMI_HOST_AUTO_SHUTDOWN_EVENTID, 741 WMI_UPDATE_WHAL_MIB_STATS_EVENTID, 742 WMI_UPDATE_VDEV_RATE_STATS_EVENTID, 743 WMI_DIAG_EVENTID, 744 WMI_OCB_SET_SCHED_EVENTID, 745 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID, 746 WMI_RSSI_BREACH_EVENTID, 747 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID, 748 WMI_PDEV_UTF_SCPC_EVENTID, 749 WMI_READ_DATA_FROM_FLASH_EVENTID, 750 WMI_REPORT_RX_AGGR_FAILURE_EVENTID, 751 WMI_PKGID_EVENTID, 752 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO), 753 WMI_UPLOADH_EVENTID, 754 WMI_CAPTUREH_EVENTID, 755 WMI_RFKILL_STATE_CHANGE_EVENTID, 756 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS), 757 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 758 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 759 WMI_BATCH_SCAN_RESULT_EVENTID, 760 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM), 761 WMI_OEM_MEASUREMENT_REPORT_EVENTID, 762 WMI_OEM_ERROR_REPORT_EVENTID, 763 WMI_OEM_RESPONSE_EVENTID, 764 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN), 765 WMI_NAN_DISC_IFACE_CREATED_EVENTID, 766 WMI_NAN_DISC_IFACE_DELETED_EVENTID, 767 WMI_NAN_STARTED_CLUSTER_EVENTID, 768 WMI_NAN_JOINED_CLUSTER_EVENTID, 769 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX), 770 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI), 771 WMI_LPI_STATUS_EVENTID, 772 WMI_LPI_HANDOFF_EVENTID, 773 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 774 WMI_EXTSCAN_OPERATION_EVENTID, 775 WMI_EXTSCAN_TABLE_USAGE_EVENTID, 776 WMI_EXTSCAN_CACHED_RESULTS_EVENTID, 777 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID, 778 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID, 779 WMI_EXTSCAN_CAPABILITIES_EVENTID, 780 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID, 781 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 782 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 783 WMI_SAP_OFL_DEL_STA_EVENTID, 784 WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID = 785 WMI_EVT_GRP_START_ID(WMI_GRP_OBSS_OFL), 786 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB), 787 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID, 788 WMI_DCC_GET_STATS_RESP_EVENTID, 789 WMI_DCC_UPDATE_NDL_RESP_EVENTID, 790 WMI_DCC_STATS_EVENTID, 791 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC), 792 WMI_SOC_HW_MODE_TRANSITION_EVENTID, 793 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID, 794 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC), 795 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 796 WMI_BPF_VDEV_STATS_INFO_EVENTID, 797 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC), 798 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 799 WMI_11D_NEW_COUNTRY_EVENTID, 800 WMI_REG_CHAN_LIST_CC_EXT_EVENTID, 801 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 802 WMI_NDP_INITIATOR_RSP_EVENTID, 803 WMI_NDP_RESPONDER_RSP_EVENTID, 804 WMI_NDP_END_RSP_EVENTID, 805 WMI_NDP_INDICATION_EVENTID, 806 WMI_NDP_CONFIRM_EVENTID, 807 WMI_NDP_END_INDICATION_EVENTID, 808 809 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT), 810 WMI_TWT_DISABLE_EVENTID, 811 WMI_TWT_ADD_DIALOG_EVENTID, 812 WMI_TWT_DEL_DIALOG_EVENTID, 813 WMI_TWT_PAUSE_DIALOG_EVENTID, 814 WMI_TWT_RESUME_DIALOG_EVENTID, 815 }; 816 817 enum wmi_tlv_pdev_param { 818 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 819 WMI_PDEV_PARAM_RX_CHAIN_MASK, 820 WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 821 WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 822 WMI_PDEV_PARAM_TXPOWER_SCALE, 823 WMI_PDEV_PARAM_BEACON_GEN_MODE, 824 WMI_PDEV_PARAM_BEACON_TX_MODE, 825 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 826 WMI_PDEV_PARAM_PROTECTION_MODE, 827 WMI_PDEV_PARAM_DYNAMIC_BW, 828 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 829 WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 830 WMI_PDEV_PARAM_STA_KICKOUT_TH, 831 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 832 WMI_PDEV_PARAM_LTR_ENABLE, 833 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 834 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 835 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 836 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 837 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 838 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 839 WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 840 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 841 WMI_PDEV_PARAM_L1SS_ENABLE, 842 WMI_PDEV_PARAM_DSLEEP_ENABLE, 843 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 844 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 845 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 846 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 847 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 848 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 849 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 850 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 851 WMI_PDEV_PARAM_PMF_QOS, 852 WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 853 WMI_PDEV_PARAM_DCS, 854 WMI_PDEV_PARAM_ANI_ENABLE, 855 WMI_PDEV_PARAM_ANI_POLL_PERIOD, 856 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 857 WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 858 WMI_PDEV_PARAM_ANI_CCK_LEVEL, 859 WMI_PDEV_PARAM_DYNTXCHAIN, 860 WMI_PDEV_PARAM_PROXY_STA, 861 WMI_PDEV_PARAM_IDLE_PS_CONFIG, 862 WMI_PDEV_PARAM_POWER_GATING_SLEEP, 863 WMI_PDEV_PARAM_RFKILL_ENABLE, 864 WMI_PDEV_PARAM_BURST_DUR, 865 WMI_PDEV_PARAM_BURST_ENABLE, 866 WMI_PDEV_PARAM_HW_RFKILL_CONFIG, 867 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE, 868 WMI_PDEV_PARAM_L1SS_TRACK, 869 WMI_PDEV_PARAM_HYST_EN, 870 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE, 871 WMI_PDEV_PARAM_LED_SYS_STATE, 872 WMI_PDEV_PARAM_LED_ENABLE, 873 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY, 874 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE, 875 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE, 876 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD, 877 WMI_PDEV_PARAM_CTS_CBW, 878 WMI_PDEV_PARAM_WNTS_CONFIG, 879 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE, 880 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP, 881 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP, 882 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP, 883 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE, 884 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT, 885 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP, 886 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT, 887 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE, 888 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE, 889 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G, 890 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G, 891 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G, 892 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G, 893 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK, 894 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS, 895 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG, 896 WMI_PDEV_PARAM_TXPOWER_DECR_DB, 897 WMI_PDEV_PARAM_AGGR_BURST, 898 WMI_PDEV_PARAM_RX_DECAP_MODE, 899 WMI_PDEV_PARAM_FAST_CHANNEL_RESET, 900 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 901 WMI_PDEV_PARAM_ANTENNA_GAIN, 902 WMI_PDEV_PARAM_RX_FILTER, 903 WMI_PDEV_SET_MCAST_TO_UCAST_TID, 904 WMI_PDEV_PARAM_PROXY_STA_MODE, 905 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE, 906 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 907 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 908 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE, 909 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 910 WMI_PDEV_PARAM_BLOCK_INTERBSS, 911 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 912 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID, 913 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 914 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 915 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 916 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID, 917 WMI_PDEV_PARAM_EN_STATS, 918 WMI_PDEV_PARAM_MU_GROUP_POLICY, 919 WMI_PDEV_PARAM_NOISE_DETECTION, 920 WMI_PDEV_PARAM_NOISE_THRESHOLD, 921 WMI_PDEV_PARAM_DPD_ENABLE, 922 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 923 WMI_PDEV_PARAM_ATF_STRICT_SCH, 924 WMI_PDEV_PARAM_ATF_SCHED_DURATION, 925 WMI_PDEV_PARAM_ANT_PLZN, 926 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT, 927 WMI_PDEV_PARAM_SENSITIVITY_LEVEL, 928 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G, 929 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G, 930 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 931 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 932 WMI_PDEV_PARAM_CCA_THRESHOLD, 933 WMI_PDEV_PARAM_RTS_FIXED_RATE, 934 WMI_PDEV_PARAM_PDEV_RESET, 935 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET, 936 WMI_PDEV_PARAM_ARP_DBG_SRCADDR, 937 WMI_PDEV_PARAM_ARP_DBG_DSTADDR, 938 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 939 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 940 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE, 941 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 942 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT, 943 WMI_PDEV_PARAM_PROPAGATION_DELAY, 944 WMI_PDEV_PARAM_ENA_ANT_DIV, 945 WMI_PDEV_PARAM_FORCE_CHAIN_ANT, 946 WMI_PDEV_PARAM_ANT_DIV_SELFTEST, 947 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL, 948 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD, 949 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS, 950 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN, 951 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN, 952 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN, 953 WMI_PDEV_PARAM_TX_SCH_DELAY, 954 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING, 955 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU, 956 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE, 957 WMI_PDEV_PARAM_FAST_PWR_TRANSITION, 958 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE, 959 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE, 960 WMI_PDEV_PARAM_MESH_MCAST_ENABLE, 961 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_THRESHOLD = 0xbc, 962 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_PER_AC = 0xbe, 963 WMI_PDEV_PARAM_ENABLE_SR_PROHIBIT = 0xc6, 964 }; 965 966 enum wmi_tlv_vdev_param { 967 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 968 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 969 WMI_VDEV_PARAM_BEACON_INTERVAL, 970 WMI_VDEV_PARAM_LISTEN_INTERVAL, 971 WMI_VDEV_PARAM_MULTICAST_RATE, 972 WMI_VDEV_PARAM_MGMT_TX_RATE, 973 WMI_VDEV_PARAM_SLOT_TIME, 974 WMI_VDEV_PARAM_PREAMBLE, 975 WMI_VDEV_PARAM_SWBA_TIME, 976 WMI_VDEV_STATS_UPDATE_PERIOD, 977 WMI_VDEV_PWRSAVE_AGEOUT_TIME, 978 WMI_VDEV_HOST_SWBA_INTERVAL, 979 WMI_VDEV_PARAM_DTIM_PERIOD, 980 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 981 WMI_VDEV_PARAM_WDS, 982 WMI_VDEV_PARAM_ATIM_WINDOW, 983 WMI_VDEV_PARAM_BMISS_COUNT_MAX, 984 WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 985 WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 986 WMI_VDEV_PARAM_FEATURE_WMM, 987 WMI_VDEV_PARAM_CHWIDTH, 988 WMI_VDEV_PARAM_CHEXTOFFSET, 989 WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 990 WMI_VDEV_PARAM_STA_QUICKKICKOUT, 991 WMI_VDEV_PARAM_MGMT_RATE, 992 WMI_VDEV_PARAM_PROTECTION_MODE, 993 WMI_VDEV_PARAM_FIXED_RATE, 994 WMI_VDEV_PARAM_SGI, 995 WMI_VDEV_PARAM_LDPC, 996 WMI_VDEV_PARAM_TX_STBC, 997 WMI_VDEV_PARAM_RX_STBC, 998 WMI_VDEV_PARAM_INTRA_BSS_FWD, 999 WMI_VDEV_PARAM_DEF_KEYID, 1000 WMI_VDEV_PARAM_NSS, 1001 WMI_VDEV_PARAM_BCAST_DATA_RATE, 1002 WMI_VDEV_PARAM_MCAST_DATA_RATE, 1003 WMI_VDEV_PARAM_MCAST_INDICATE, 1004 WMI_VDEV_PARAM_DHCP_INDICATE, 1005 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 1006 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 1007 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 1008 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 1009 WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 1010 WMI_VDEV_PARAM_ENABLE_RTSCTS, 1011 WMI_VDEV_PARAM_TXBF, 1012 WMI_VDEV_PARAM_PACKET_POWERSAVE, 1013 WMI_VDEV_PARAM_DROP_UNENCRY, 1014 WMI_VDEV_PARAM_TX_ENCAP_TYPE, 1015 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 1016 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 1017 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 1018 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 1019 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP, 1020 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP, 1021 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 1022 WMI_VDEV_PARAM_TX_PWRLIMIT, 1023 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL, 1024 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD, 1025 WMI_VDEV_PARAM_ENABLE_RMC, 1026 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS, 1027 WMI_VDEV_PARAM_MAX_RATE, 1028 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE, 1029 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR, 1030 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT, 1031 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE, 1032 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED, 1033 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED, 1034 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED, 1035 WMI_VDEV_PARAM_INACTIVITY_CNT, 1036 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS, 1037 WMI_VDEV_PARAM_DTIM_POLICY, 1038 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS, 1039 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE, 1040 WMI_VDEV_PARAM_RX_LEAK_WINDOW, 1041 WMI_VDEV_PARAM_STATS_AVG_FACTOR, 1042 WMI_VDEV_PARAM_DISCONNECT_TH, 1043 WMI_VDEV_PARAM_RTSCTS_RATE, 1044 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE, 1045 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE, 1046 WMI_VDEV_PARAM_TXPOWER_SCALE, 1047 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB, 1048 WMI_VDEV_PARAM_MCAST2UCAST_SET, 1049 WMI_VDEV_PARAM_RC_NUM_RETRIES, 1050 WMI_VDEV_PARAM_CABQ_MAXDUR, 1051 WMI_VDEV_PARAM_MFPTEST_SET, 1052 WMI_VDEV_PARAM_RTS_FIXED_RATE, 1053 WMI_VDEV_PARAM_VHT_SGIMASK, 1054 WMI_VDEV_PARAM_VHT80_RATEMASK, 1055 WMI_VDEV_PARAM_PROXY_STA, 1056 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE, 1057 WMI_VDEV_PARAM_RX_DECAP_TYPE, 1058 WMI_VDEV_PARAM_BW_NSS_RATEMASK, 1059 WMI_VDEV_PARAM_SENSOR_AP, 1060 WMI_VDEV_PARAM_BEACON_RATE, 1061 WMI_VDEV_PARAM_DTIM_ENABLE_CTS, 1062 WMI_VDEV_PARAM_STA_KICKOUT, 1063 WMI_VDEV_PARAM_CAPABILITIES, 1064 WMI_VDEV_PARAM_TSF_INCREMENT, 1065 WMI_VDEV_PARAM_AMPDU_PER_AC, 1066 WMI_VDEV_PARAM_RX_FILTER, 1067 WMI_VDEV_PARAM_MGMT_TX_POWER, 1068 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH, 1069 WMI_VDEV_PARAM_AGG_SW_RETRY_TH, 1070 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS, 1071 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 1072 WMI_VDEV_PARAM_HE_DCM, 1073 WMI_VDEV_PARAM_HE_RANGE_EXT, 1074 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, 1075 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, 1076 WMI_VDEV_PARAM_HE_LTF = 0x74, 1077 WMI_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE = 0x7d, 1078 WMI_VDEV_PARAM_BA_MODE = 0x7e, 1079 WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80, 1080 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, 1081 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99, 1082 WMI_VDEV_PARAM_PROTOTYPE = 0x8000, 1083 WMI_VDEV_PARAM_BSS_COLOR, 1084 WMI_VDEV_PARAM_SET_HEMU_MODE, 1085 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003, 1086 }; 1087 1088 enum wmi_tlv_peer_flags { 1089 WMI_TLV_PEER_AUTH = 0x00000001, 1090 WMI_TLV_PEER_QOS = 0x00000002, 1091 WMI_TLV_PEER_NEED_PTK_4_WAY = 0x00000004, 1092 WMI_TLV_PEER_NEED_GTK_2_WAY = 0x00000010, 1093 WMI_TLV_PEER_APSD = 0x00000800, 1094 WMI_TLV_PEER_HT = 0x00001000, 1095 WMI_TLV_PEER_40MHZ = 0x00002000, 1096 WMI_TLV_PEER_STBC = 0x00008000, 1097 WMI_TLV_PEER_LDPC = 0x00010000, 1098 WMI_TLV_PEER_DYN_MIMOPS = 0x00020000, 1099 WMI_TLV_PEER_STATIC_MIMOPS = 0x00040000, 1100 WMI_TLV_PEER_SPATIAL_MUX = 0x00200000, 1101 WMI_TLV_PEER_VHT = 0x02000000, 1102 WMI_TLV_PEER_80MHZ = 0x04000000, 1103 WMI_TLV_PEER_PMF = 0x08000000, 1104 WMI_PEER_IS_P2P_CAPABLE = 0x20000000, 1105 WMI_PEER_160MHZ = 0x40000000, 1106 WMI_PEER_SAFEMODE_EN = 0x80000000, 1107 1108 }; 1109 1110 /** Enum list of TLV Tags for each parameter structure type. */ 1111 enum wmi_tlv_tag { 1112 WMI_TAG_LAST_RESERVED = 15, 1113 WMI_TAG_FIRST_ARRAY_ENUM, 1114 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM, 1115 WMI_TAG_ARRAY_BYTE, 1116 WMI_TAG_ARRAY_STRUCT, 1117 WMI_TAG_ARRAY_FIXED_STRUCT, 1118 WMI_TAG_LAST_ARRAY_ENUM = 31, 1119 WMI_TAG_SERVICE_READY_EVENT, 1120 WMI_TAG_HAL_REG_CAPABILITIES, 1121 WMI_TAG_WLAN_HOST_MEM_REQ, 1122 WMI_TAG_READY_EVENT, 1123 WMI_TAG_SCAN_EVENT, 1124 WMI_TAG_PDEV_TPC_CONFIG_EVENT, 1125 WMI_TAG_CHAN_INFO_EVENT, 1126 WMI_TAG_COMB_PHYERR_RX_HDR, 1127 WMI_TAG_VDEV_START_RESPONSE_EVENT, 1128 WMI_TAG_VDEV_STOPPED_EVENT, 1129 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT, 1130 WMI_TAG_PEER_STA_KICKOUT_EVENT, 1131 WMI_TAG_MGMT_RX_HDR, 1132 WMI_TAG_TBTT_OFFSET_EVENT, 1133 WMI_TAG_TX_DELBA_COMPLETE_EVENT, 1134 WMI_TAG_TX_ADDBA_COMPLETE_EVENT, 1135 WMI_TAG_ROAM_EVENT, 1136 WMI_TAG_WOW_EVENT_INFO, 1137 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP, 1138 WMI_TAG_RTT_EVENT_HEADER, 1139 WMI_TAG_RTT_ERROR_REPORT_EVENT, 1140 WMI_TAG_RTT_MEAS_EVENT, 1141 WMI_TAG_ECHO_EVENT, 1142 WMI_TAG_FTM_INTG_EVENT, 1143 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT, 1144 WMI_TAG_GPIO_INPUT_EVENT, 1145 WMI_TAG_CSA_EVENT, 1146 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT, 1147 WMI_TAG_IGTK_INFO, 1148 WMI_TAG_DCS_INTERFERENCE_EVENT, 1149 WMI_TAG_ATH_DCS_CW_INT, 1150 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */ 1151 WMI_TAG_ATH_DCS_CW_INT, 1152 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1153 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */ 1154 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1155 WMI_TAG_WLAN_PROFILE_CTX_T, 1156 WMI_TAG_WLAN_PROFILE_T, 1157 WMI_TAG_PDEV_QVIT_EVENT, 1158 WMI_TAG_HOST_SWBA_EVENT, 1159 WMI_TAG_TIM_INFO, 1160 WMI_TAG_P2P_NOA_INFO, 1161 WMI_TAG_STATS_EVENT, 1162 WMI_TAG_AVOID_FREQ_RANGES_EVENT, 1163 WMI_TAG_AVOID_FREQ_RANGE_DESC, 1164 WMI_TAG_GTK_REKEY_FAIL_EVENT, 1165 WMI_TAG_INIT_CMD, 1166 WMI_TAG_RESOURCE_CONFIG, 1167 WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 1168 WMI_TAG_START_SCAN_CMD, 1169 WMI_TAG_STOP_SCAN_CMD, 1170 WMI_TAG_SCAN_CHAN_LIST_CMD, 1171 WMI_TAG_CHANNEL, 1172 WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1173 WMI_TAG_PDEV_SET_PARAM_CMD, 1174 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD, 1175 WMI_TAG_WMM_PARAMS, 1176 WMI_TAG_PDEV_SET_QUIET_CMD, 1177 WMI_TAG_VDEV_CREATE_CMD, 1178 WMI_TAG_VDEV_DELETE_CMD, 1179 WMI_TAG_VDEV_START_REQUEST_CMD, 1180 WMI_TAG_P2P_NOA_DESCRIPTOR, 1181 WMI_TAG_P2P_GO_SET_BEACON_IE, 1182 WMI_TAG_GTK_OFFLOAD_CMD, 1183 WMI_TAG_VDEV_UP_CMD, 1184 WMI_TAG_VDEV_STOP_CMD, 1185 WMI_TAG_VDEV_DOWN_CMD, 1186 WMI_TAG_VDEV_SET_PARAM_CMD, 1187 WMI_TAG_VDEV_INSTALL_KEY_CMD, 1188 WMI_TAG_PEER_CREATE_CMD, 1189 WMI_TAG_PEER_DELETE_CMD, 1190 WMI_TAG_PEER_FLUSH_TIDS_CMD, 1191 WMI_TAG_PEER_SET_PARAM_CMD, 1192 WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1193 WMI_TAG_VHT_RATE_SET, 1194 WMI_TAG_BCN_TMPL_CMD, 1195 WMI_TAG_PRB_TMPL_CMD, 1196 WMI_TAG_BCN_PRB_INFO, 1197 WMI_TAG_PEER_TID_ADDBA_CMD, 1198 WMI_TAG_PEER_TID_DELBA_CMD, 1199 WMI_TAG_STA_POWERSAVE_MODE_CMD, 1200 WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1201 WMI_TAG_STA_DTIM_PS_METHOD_CMD, 1202 WMI_TAG_ROAM_SCAN_MODE, 1203 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD, 1204 WMI_TAG_ROAM_SCAN_PERIOD, 1205 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1206 WMI_TAG_PDEV_SUSPEND_CMD, 1207 WMI_TAG_PDEV_RESUME_CMD, 1208 WMI_TAG_ADD_BCN_FILTER_CMD, 1209 WMI_TAG_RMV_BCN_FILTER_CMD, 1210 WMI_TAG_WOW_ENABLE_CMD, 1211 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 1212 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD, 1213 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM, 1214 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 1215 WMI_TAG_ARP_OFFLOAD_TUPLE, 1216 WMI_TAG_NS_OFFLOAD_TUPLE, 1217 WMI_TAG_FTM_INTG_CMD, 1218 WMI_TAG_STA_KEEPALIVE_CMD, 1219 WMI_TAG_STA_KEEPALIVE_ARP_RESPONSE, 1220 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD, 1221 WMI_TAG_AP_PS_PEER_CMD, 1222 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD, 1223 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD, 1224 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD, 1225 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD, 1226 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD, 1227 WMI_TAG_WOW_DEL_PATTERN_CMD, 1228 WMI_TAG_WOW_ADD_DEL_EVT_CMD, 1229 WMI_TAG_RTT_MEASREQ_HEAD, 1230 WMI_TAG_RTT_MEASREQ_BODY, 1231 WMI_TAG_RTT_TSF_CMD, 1232 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 1233 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 1234 WMI_TAG_REQUEST_STATS_CMD, 1235 WMI_TAG_NLO_CONFIG_CMD, 1236 WMI_TAG_NLO_CONFIGURED_PARAMETERS, 1237 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD, 1238 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD, 1239 WMI_TAG_CHATTER_SET_MODE_CMD, 1240 WMI_TAG_ECHO_CMD, 1241 WMI_TAG_VDEV_SET_KEEPALIVE_CMD, 1242 WMI_TAG_VDEV_GET_KEEPALIVE_CMD, 1243 WMI_TAG_FORCE_FW_HANG_CMD, 1244 WMI_TAG_GPIO_CONFIG_CMD, 1245 WMI_TAG_GPIO_OUTPUT_CMD, 1246 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD, 1247 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD, 1248 WMI_TAG_BCN_TX_HDR, 1249 WMI_TAG_BCN_SEND_FROM_HOST_CMD, 1250 WMI_TAG_MGMT_TX_HDR, 1251 WMI_TAG_ADDBA_CLEAR_RESP_CMD, 1252 WMI_TAG_ADDBA_SEND_CMD, 1253 WMI_TAG_DELBA_SEND_CMD, 1254 WMI_TAG_ADDBA_SETRESPONSE_CMD, 1255 WMI_TAG_SEND_SINGLEAMSDU_CMD, 1256 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD, 1257 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD, 1258 WMI_TAG_PDEV_SET_HT_IE_CMD, 1259 WMI_TAG_PDEV_SET_VHT_IE_CMD, 1260 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD, 1261 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD, 1262 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD, 1263 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD, 1264 WMI_TAG_PEER_MCAST_GROUP_CMD, 1265 WMI_TAG_ROAM_AP_PROFILE, 1266 WMI_TAG_AP_PROFILE, 1267 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD, 1268 WMI_TAG_PDEV_DFS_ENABLE_CMD, 1269 WMI_TAG_PDEV_DFS_DISABLE_CMD, 1270 WMI_TAG_WOW_ADD_PATTERN_CMD, 1271 WMI_TAG_WOW_BITMAP_PATTERN_T, 1272 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T, 1273 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T, 1274 WMI_TAG_WOW_MAGIC_PATTERN_CMD, 1275 WMI_TAG_SCAN_UPDATE_REQUEST_CMD, 1276 WMI_TAG_CHATTER_PKT_COALESCING_FILTER, 1277 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD, 1278 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD, 1279 WMI_TAG_CHATTER_COALESCING_QUERY_CMD, 1280 WMI_TAG_TXBF_CMD, 1281 WMI_TAG_DEBUG_LOG_CONFIG_CMD, 1282 WMI_TAG_NLO_EVENT, 1283 WMI_TAG_CHATTER_QUERY_REPLY_EVENT, 1284 WMI_TAG_UPLOAD_H_HDR, 1285 WMI_TAG_CAPTURE_H_EVENT_HDR, 1286 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD, 1287 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD, 1288 WMI_TAG_VDEV_WMM_ADDTS_CMD, 1289 WMI_TAG_VDEV_WMM_DELTS_CMD, 1290 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 1291 WMI_TAG_TDLS_SET_STATE_CMD, 1292 WMI_TAG_TDLS_PEER_UPDATE_CMD, 1293 WMI_TAG_TDLS_PEER_EVENT, 1294 WMI_TAG_TDLS_PEER_CAPABILITIES, 1295 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD, 1296 WMI_TAG_ROAM_CHAN_LIST, 1297 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT, 1298 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD, 1299 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD, 1300 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD, 1301 WMI_TAG_BA_REQ_SSN_CMD, 1302 WMI_TAG_BA_RSP_SSN_EVENT, 1303 WMI_TAG_STA_SMPS_FORCE_MODE_CMD, 1304 WMI_TAG_SET_MCASTBCAST_FILTER_CMD, 1305 WMI_TAG_P2P_SET_OPPPS_CMD, 1306 WMI_TAG_P2P_SET_NOA_CMD, 1307 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM, 1308 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM, 1309 WMI_TAG_STA_SMPS_PARAM_CMD, 1310 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD, 1311 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD, 1312 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS, 1313 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT, 1314 WMI_TAG_P2P_NOA_EVENT, 1315 WMI_TAG_HB_SET_ENABLE_CMD, 1316 WMI_TAG_HB_SET_TCP_PARAMS_CMD, 1317 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD, 1318 WMI_TAG_HB_SET_UDP_PARAMS_CMD, 1319 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD, 1320 WMI_TAG_HB_IND_EVENT, 1321 WMI_TAG_TX_PAUSE_EVENT, 1322 WMI_TAG_RFKILL_EVENT, 1323 WMI_TAG_DFS_RADAR_EVENT, 1324 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD, 1325 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD, 1326 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST, 1327 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO, 1328 WMI_TAG_BATCH_SCAN_ENABLE_CMD, 1329 WMI_TAG_BATCH_SCAN_DISABLE_CMD, 1330 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD, 1331 WMI_TAG_BATCH_SCAN_ENABLED_EVENT, 1332 WMI_TAG_BATCH_SCAN_RESULT_EVENT, 1333 WMI_TAG_VDEV_PLMREQ_START_CMD, 1334 WMI_TAG_VDEV_PLMREQ_STOP_CMD, 1335 WMI_TAG_THERMAL_MGMT_CMD, 1336 WMI_TAG_THERMAL_MGMT_EVENT, 1337 WMI_TAG_PEER_INFO_REQ_CMD, 1338 WMI_TAG_PEER_INFO_EVENT, 1339 WMI_TAG_PEER_INFO, 1340 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT, 1341 WMI_TAG_RMC_SET_MODE_CMD, 1342 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD, 1343 WMI_TAG_RMC_CONFIG_CMD, 1344 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD, 1345 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD, 1346 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD, 1347 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD, 1348 WMI_TAG_NAN_CMD_PARAM, 1349 WMI_TAG_NAN_EVENT_HDR, 1350 WMI_TAG_PDEV_L1SS_TRACK_EVENT, 1351 WMI_TAG_DIAG_DATA_CONTAINER_EVENT, 1352 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM, 1353 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD, 1354 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT, 1355 WMI_TAG_AGGR_STATE_TRIG_EVENT, 1356 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY, 1357 WMI_TAG_ROAM_SCAN_CMD, 1358 WMI_TAG_REQ_STATS_EXT_CMD, 1359 WMI_TAG_STATS_EXT_EVENT, 1360 WMI_TAG_OBSS_SCAN_ENABLE_CMD, 1361 WMI_TAG_OBSS_SCAN_DISABLE_CMD, 1362 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT, 1363 WMI_TAG_PDEV_SET_LED_CONFIG_CMD, 1364 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD, 1365 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT, 1366 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT, 1367 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM, 1368 WMI_TAG_WOW_IOAC_PKT_PATTERN_T, 1369 WMI_TAG_WOW_IOAC_TMR_PATTERN_T, 1370 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD, 1371 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD, 1372 WMI_TAG_WOW_IOAC_KEEPALIVE_T, 1373 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD, 1374 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD, 1375 WMI_TAG_START_LINK_STATS_CMD, 1376 WMI_TAG_CLEAR_LINK_STATS_CMD, 1377 WMI_TAG_REQUEST_LINK_STATS_CMD, 1378 WMI_TAG_IFACE_LINK_STATS_EVENT, 1379 WMI_TAG_RADIO_LINK_STATS_EVENT, 1380 WMI_TAG_PEER_STATS_EVENT, 1381 WMI_TAG_CHANNEL_STATS, 1382 WMI_TAG_RADIO_LINK_STATS, 1383 WMI_TAG_RATE_STATS, 1384 WMI_TAG_PEER_LINK_STATS, 1385 WMI_TAG_WMM_AC_STATS, 1386 WMI_TAG_IFACE_LINK_STATS, 1387 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD, 1388 WMI_TAG_LPI_START_SCAN_CMD, 1389 WMI_TAG_LPI_STOP_SCAN_CMD, 1390 WMI_TAG_LPI_RESULT_EVENT, 1391 WMI_TAG_PEER_STATE_EVENT, 1392 WMI_TAG_EXTSCAN_BUCKET_CMD, 1393 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT, 1394 WMI_TAG_EXTSCAN_START_CMD, 1395 WMI_TAG_EXTSCAN_STOP_CMD, 1396 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD, 1397 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD, 1398 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD, 1399 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD, 1400 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD, 1401 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD, 1402 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD, 1403 WMI_TAG_EXTSCAN_OPERATION_EVENT, 1404 WMI_TAG_EXTSCAN_START_STOP_EVENT, 1405 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT, 1406 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT, 1407 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT, 1408 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT, 1409 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT, 1410 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT, 1411 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT, 1412 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT, 1413 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT, 1414 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT, 1415 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT, 1416 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD, 1417 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT, 1418 WMI_TAG_UNIT_TEST_CMD, 1419 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM, 1420 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM, 1421 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM, 1422 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM, 1423 WMI_TAG_ROAM_SYNCH_EVENT, 1424 WMI_TAG_ROAM_SYNCH_COMPLETE, 1425 WMI_TAG_EXTWOW_ENABLE_CMD, 1426 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD, 1427 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD, 1428 WMI_TAG_LPI_STATUS_EVENT, 1429 WMI_TAG_LPI_HANDOFF_EVENT, 1430 WMI_TAG_VDEV_RATE_STATS_EVENT, 1431 WMI_TAG_VDEV_RATE_HT_INFO, 1432 WMI_TAG_RIC_REQUEST, 1433 WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1434 WMI_TAG_PDEV_TEMPERATURE_EVENT, 1435 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD, 1436 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD, 1437 WMI_TAG_RIC_TSPEC, 1438 WMI_TAG_TPC_CHAINMASK_CONFIG, 1439 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD, 1440 WMI_TAG_SCAN_PROB_REQ_OUI_CMD, 1441 WMI_TAG_KEY_MATERIAL, 1442 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD, 1443 WMI_TAG_SET_LED_FLASHING_CMD, 1444 WMI_TAG_MDNS_OFFLOAD_CMD, 1445 WMI_TAG_MDNS_SET_FQDN_CMD, 1446 WMI_TAG_MDNS_SET_RESP_CMD, 1447 WMI_TAG_MDNS_GET_STATS_CMD, 1448 WMI_TAG_MDNS_STATS_EVENT, 1449 WMI_TAG_ROAM_INVOKE_CMD, 1450 WMI_TAG_PDEV_RESUME_EVENT, 1451 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD, 1452 WMI_TAG_SAP_OFL_ENABLE_CMD, 1453 WMI_TAG_SAP_OFL_ADD_STA_EVENT, 1454 WMI_TAG_SAP_OFL_DEL_STA_EVENT, 1455 WMI_TAG_APFIND_CMD_PARAM, 1456 WMI_TAG_APFIND_EVENT_HDR, 1457 WMI_TAG_OCB_SET_SCHED_CMD, 1458 WMI_TAG_OCB_SET_SCHED_EVENT, 1459 WMI_TAG_OCB_SET_CONFIG_CMD, 1460 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT, 1461 WMI_TAG_OCB_SET_UTC_TIME_CMD, 1462 WMI_TAG_OCB_START_TIMING_ADVERT_CMD, 1463 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD, 1464 WMI_TAG_OCB_GET_TSF_TIMER_CMD, 1465 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT, 1466 WMI_TAG_DCC_GET_STATS_CMD, 1467 WMI_TAG_DCC_CHANNEL_STATS_REQUEST, 1468 WMI_TAG_DCC_GET_STATS_RESP_EVENT, 1469 WMI_TAG_DCC_CLEAR_STATS_CMD, 1470 WMI_TAG_DCC_UPDATE_NDL_CMD, 1471 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT, 1472 WMI_TAG_DCC_STATS_EVENT, 1473 WMI_TAG_OCB_CHANNEL, 1474 WMI_TAG_OCB_SCHEDULE_ELEMENT, 1475 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL, 1476 WMI_TAG_DCC_NDL_CHAN, 1477 WMI_TAG_QOS_PARAMETER, 1478 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG, 1479 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM, 1480 WMI_TAG_ROAM_FILTER, 1481 WMI_TAG_PASSPOINT_CONFIG_CMD, 1482 WMI_TAG_PASSPOINT_EVENT_HDR, 1483 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD, 1484 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT, 1485 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD, 1486 WMI_TAG_VDEV_TSF_REPORT_EVENT, 1487 WMI_TAG_GET_FW_MEM_DUMP, 1488 WMI_TAG_UPDATE_FW_MEM_DUMP, 1489 WMI_TAG_FW_MEM_DUMP_PARAMS, 1490 WMI_TAG_DEBUG_MESG_FLUSH, 1491 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE, 1492 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION, 1493 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG, 1494 WMI_TAG_VDEV_SET_IE_CMD, 1495 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG, 1496 WMI_TAG_RSSI_BREACH_EVENT, 1497 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP, 1498 WMI_TAG_SOC_SET_PCL_CMD, 1499 WMI_TAG_SOC_SET_HW_MODE_CMD, 1500 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT, 1501 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT, 1502 WMI_TAG_VDEV_TXRX_STREAMS, 1503 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1504 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD, 1505 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT, 1506 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T, 1507 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD, 1508 WMI_TAG_DIAG_EVENT_LOG_CONFIG, 1509 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS, 1510 WMI_TAG_PACKET_FILTER_CONFIG, 1511 WMI_TAG_PACKET_FILTER_ENABLE, 1512 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD, 1513 WMI_TAG_MGMT_TX_SEND_CMD, 1514 WMI_TAG_MGMT_TX_COMPL_EVENT, 1515 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD, 1516 WMI_TAG_WOW_UDP_SVC_OFLD_CMD, 1517 WMI_TAG_LRO_INFO_CMD, 1518 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM, 1519 WMI_TAG_SERVICE_READY_EXT_EVENT, 1520 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD, 1521 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT, 1522 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD, 1523 WMI_TAG_NLO_CONFIGURE_MAWC_CMD, 1524 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD, 1525 WMI_TAG_PEER_ASSOC_CONF_EVENT, 1526 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD, 1527 WMI_TAG_AP_PS_EGAP_PARAM_CMD, 1528 WMI_TAG_AP_PS_EGAP_INFO_EVENT, 1529 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD, 1530 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD, 1531 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT, 1532 WMI_TAG_SCPC_EVENT, 1533 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST, 1534 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT, 1535 WMI_TAG_BPF_GET_CAPABILITY_CMD, 1536 WMI_TAG_BPF_CAPABILITY_INFO_EVT, 1537 WMI_TAG_BPF_GET_VDEV_STATS_CMD, 1538 WMI_TAG_BPF_VDEV_STATS_INFO_EVT, 1539 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD, 1540 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD, 1541 WMI_TAG_VDEV_DELETE_RESP_EVENT, 1542 WMI_TAG_PEER_DELETE_RESP_EVENT, 1543 WMI_TAG_ROAM_DENSE_THRES_PARAM, 1544 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM, 1545 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD, 1546 WMI_TAG_VDEV_CONFIG_RATEMASK, 1547 WMI_TAG_PDEV_FIPS_CMD, 1548 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD, 1549 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD, 1550 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD, 1551 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD, 1552 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD, 1553 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD, 1554 WMI_TAG_PDEV_SET_CTL_TABLE_CMD, 1555 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD, 1556 WMI_TAG_FWTEST_SET_PARAM_CMD, 1557 WMI_TAG_PEER_ATF_REQUEST, 1558 WMI_TAG_VDEV_ATF_REQUEST, 1559 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD, 1560 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD, 1561 WMI_TAG_INST_RSSI_STATS_RESP, 1562 WMI_TAG_MED_UTIL_REPORT_EVENT, 1563 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT, 1564 WMI_TAG_WDS_ADDR_EVENT, 1565 WMI_TAG_PEER_RATECODE_LIST_EVENT, 1566 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT, 1567 WMI_TAG_PDEV_TPC_EVENT, 1568 WMI_TAG_ANI_OFDM_EVENT, 1569 WMI_TAG_ANI_CCK_EVENT, 1570 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT, 1571 WMI_TAG_PDEV_FIPS_EVENT, 1572 WMI_TAG_ATF_PEER_INFO, 1573 WMI_TAG_PDEV_GET_TPC_CMD, 1574 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD, 1575 WMI_TAG_QBOOST_CFG_CMD, 1576 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE, 1577 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES, 1578 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM, 1579 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN, 1580 WMI_TAG_PEER_CCK_OFDM_RATE_INFO, 1581 WMI_TAG_PEER_MCS_RATE_INFO, 1582 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR, 1583 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM, 1584 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM, 1585 WMI_TAG_MU_REPORT_TOTAL_MU, 1586 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD, 1587 WMI_TAG_ROAM_SET_MBO, 1588 WMI_TAG_MIB_STATS_ENABLE_CMD, 1589 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT, 1590 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT, 1591 WMI_TAG_NAN_STARTED_CLUSTER_EVENT, 1592 WMI_TAG_NAN_JOINED_CLUSTER_EVENT, 1593 WMI_TAG_NDI_GET_CAP_REQ, 1594 WMI_TAG_NDP_INITIATOR_REQ, 1595 WMI_TAG_NDP_RESPONDER_REQ, 1596 WMI_TAG_NDP_END_REQ, 1597 WMI_TAG_NDI_CAP_RSP_EVENT, 1598 WMI_TAG_NDP_INITIATOR_RSP_EVENT, 1599 WMI_TAG_NDP_RESPONDER_RSP_EVENT, 1600 WMI_TAG_NDP_END_RSP_EVENT, 1601 WMI_TAG_NDP_INDICATION_EVENT, 1602 WMI_TAG_NDP_CONFIRM_EVENT, 1603 WMI_TAG_NDP_END_INDICATION_EVENT, 1604 WMI_TAG_VDEV_SET_QUIET_CMD, 1605 WMI_TAG_PDEV_SET_PCL_CMD, 1606 WMI_TAG_PDEV_SET_HW_MODE_CMD, 1607 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD, 1608 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD, 1609 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT, 1610 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT, 1611 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1612 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT, 1613 WMI_TAG_COEX_CONFIG_CMD, 1614 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER, 1615 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD, 1616 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1617 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD, 1618 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD, 1619 WMI_TAG_MAC_PHY_CAPABILITIES, 1620 WMI_TAG_HW_MODE_CAPABILITIES, 1621 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS, 1622 WMI_TAG_HAL_REG_CAPABILITIES_EXT, 1623 WMI_TAG_SOC_HAL_REG_CAPABILITIES, 1624 WMI_TAG_VDEV_WISA_CMD, 1625 WMI_TAG_TX_POWER_LEVEL_STATS_EVT, 1626 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV, 1627 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG, 1628 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD, 1629 WMI_TAG_NDP_END_RSP_PER_NDI, 1630 WMI_TAG_PEER_BWF_REQUEST, 1631 WMI_TAG_BWF_PEER_INFO, 1632 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD, 1633 WMI_TAG_RMC_SET_LEADER_CMD, 1634 WMI_TAG_RMC_MANUAL_LEADER_EVENT, 1635 WMI_TAG_PER_CHAIN_RSSI_STATS, 1636 WMI_TAG_RSSI_STATS, 1637 WMI_TAG_P2P_LO_START_CMD, 1638 WMI_TAG_P2P_LO_STOP_CMD, 1639 WMI_TAG_P2P_LO_STOPPED_EVENT, 1640 WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1641 WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1642 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD, 1643 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT, 1644 WMI_TAG_READ_DATA_FROM_FLASH_CMD, 1645 WMI_TAG_READ_DATA_FROM_FLASH_EVENT, 1646 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD, 1647 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD, 1648 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID, 1649 WMI_TAG_TLV_BUF_LEN_PARAM, 1650 WMI_TAG_SERVICE_AVAILABLE_EVENT, 1651 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD, 1652 WMI_TAG_PEER_ANTDIV_INFO_EVENT, 1653 WMI_TAG_PEER_ANTDIV_INFO, 1654 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD, 1655 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT, 1656 WMI_TAG_MNT_FILTER_CMD, 1657 WMI_TAG_GET_CHIP_POWER_STATS_CMD, 1658 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT, 1659 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD, 1660 WMI_TAG_COEX_REPORT_ISOLATION_EVENT, 1661 WMI_TAG_CHAN_CCA_STATS, 1662 WMI_TAG_PEER_SIGNAL_STATS, 1663 WMI_TAG_TX_STATS, 1664 WMI_TAG_PEER_AC_TX_STATS, 1665 WMI_TAG_RX_STATS, 1666 WMI_TAG_PEER_AC_RX_STATS, 1667 WMI_TAG_REPORT_STATS_EVENT, 1668 WMI_TAG_CHAN_CCA_STATS_THRESH, 1669 WMI_TAG_PEER_SIGNAL_STATS_THRESH, 1670 WMI_TAG_TX_STATS_THRESH, 1671 WMI_TAG_RX_STATS_THRESH, 1672 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD, 1673 WMI_TAG_REQUEST_WLAN_STATS_CMD, 1674 WMI_TAG_RX_AGGR_FAILURE_EVENT, 1675 WMI_TAG_RX_AGGR_FAILURE_INFO, 1676 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD, 1677 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT, 1678 WMI_TAG_PDEV_BAND_TO_MAC, 1679 WMI_TAG_TBTT_OFFSET_INFO, 1680 WMI_TAG_TBTT_OFFSET_EXT_EVENT, 1681 WMI_TAG_SAR_LIMITS_CMD, 1682 WMI_TAG_SAR_LIMIT_CMD_ROW, 1683 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 1684 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD, 1685 WMI_TAG_VDEV_ADFS_CH_CFG_CMD, 1686 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD, 1687 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT, 1688 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT, 1689 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT, 1690 WMI_TAG_VENDOR_OUI, 1691 WMI_TAG_REQUEST_RCPI_CMD, 1692 WMI_TAG_UPDATE_RCPI_EVENT, 1693 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD, 1694 WMI_TAG_PEER_STATS_INFO, 1695 WMI_TAG_PEER_STATS_INFO_EVENT, 1696 WMI_TAG_PKGID_EVENT, 1697 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS, 1698 WMI_TAG_SET_CURRENT_COUNTRY_CMD, 1699 WMI_TAG_REGULATORY_RULE_STRUCT, 1700 WMI_TAG_REG_CHAN_LIST_CC_EVENT, 1701 WMI_TAG_11D_SCAN_START_CMD, 1702 WMI_TAG_11D_SCAN_STOP_CMD, 1703 WMI_TAG_11D_NEW_COUNTRY_EVENT, 1704 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD, 1705 WMI_TAG_RADIO_CHAN_STATS, 1706 WMI_TAG_RADIO_CHAN_STATS_EVENT, 1707 WMI_TAG_ROAM_PER_CONFIG, 1708 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD, 1709 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT, 1710 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD, 1711 WMI_TAG_HW_DATA_FILTER_CMD, 1712 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF, 1713 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT, 1714 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED, 1715 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD, 1716 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT, 1717 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD, 1718 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD, 1719 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT, 1720 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD, 1721 WMI_TAG_MAC_PHY_CHAINMASK_COMBO, 1722 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY, 1723 WMI_TAG_VDEV_SET_ARP_STATS_CMD, 1724 WMI_TAG_VDEV_GET_ARP_STATS_CMD, 1725 WMI_TAG_VDEV_GET_ARP_STATS_EVENT, 1726 WMI_TAG_IFACE_OFFLOAD_STATS, 1727 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM, 1728 WMI_TAG_RSSI_CTL_EXT, 1729 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR, 1730 WMI_TAG_COEX_BT_ACTIVITY_EVENT, 1731 WMI_TAG_VDEV_GET_TX_POWER_CMD, 1732 WMI_TAG_VDEV_TX_POWER_EVENT, 1733 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT, 1734 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD, 1735 WMI_TAG_TX_SEND_PARAMS, 1736 WMI_TAG_HE_RATE_SET, 1737 WMI_TAG_CONGESTION_STATS, 1738 WMI_TAG_SET_INIT_COUNTRY_CMD, 1739 WMI_TAG_SCAN_DBS_DUTY_CYCLE, 1740 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV, 1741 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID, 1742 WMI_TAG_THERM_THROT_CONFIG_REQUEST, 1743 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 1744 WMI_TAG_THERM_THROT_STATS_EVENT, 1745 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO, 1746 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT, 1747 WMI_TAG_OEM_DMA_RING_CAPABILITIES, 1748 WMI_TAG_OEM_DMA_RING_CFG_REQ, 1749 WMI_TAG_OEM_DMA_RING_CFG_RSP, 1750 WMI_TAG_OEM_INDIRECT_DATA, 1751 WMI_TAG_OEM_DMA_BUF_RELEASE, 1752 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY, 1753 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1754 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT, 1755 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG, 1756 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD, 1757 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG, 1758 WMI_TAG_UNIT_TEST_EVENT, 1759 WMI_TAG_ROAM_FILS_OFFLOAD, 1760 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD, 1761 WMI_TAG_PMK_CACHE, 1762 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD, 1763 WMI_TAG_ROAM_FILS_SYNCH, 1764 WMI_TAG_GTK_OFFLOAD_EXTENDED, 1765 WMI_TAG_ROAM_BG_SCAN_ROAMING, 1766 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD, 1767 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD, 1768 WMI_TAG_OIC_PING_HANDOFF_EVENT, 1769 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD, 1770 WMI_TAG_DHCP_LEASE_RENEW_EVENT, 1771 WMI_TAG_BTM_CONFIG, 1772 WMI_TAG_DEBUG_MESG_FW_DATA_STALL, 1773 WMI_TAG_WLM_CONFIG_CMD, 1774 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST, 1775 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT, 1776 WMI_TAG_ROAM_CND_SCORING_PARAM, 1777 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION, 1778 WMI_TAG_VENDOR_OUI_EXT, 1779 WMI_TAG_ROAM_SYNCH_FRAME_EVENT, 1780 WMI_TAG_FD_SEND_FROM_HOST_CMD, 1781 WMI_TAG_ENABLE_FILS_CMD, 1782 WMI_TAG_HOST_SWFDA_EVENT, 1783 WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1784 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD, 1785 WMI_TAG_STATS_PERIOD, 1786 WMI_TAG_NDL_SCHEDULE_UPDATE, 1787 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD, 1788 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE, 1789 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD, 1790 WMI_TAG_SAR2_RESULT_EVENT, 1791 WMI_TAG_SAR_CAPABILITIES, 1792 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD, 1793 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT, 1794 WMI_TAG_DMA_RING_CAPABILITIES, 1795 WMI_TAG_DMA_RING_CFG_REQ, 1796 WMI_TAG_DMA_RING_CFG_RSP, 1797 WMI_TAG_DMA_BUF_RELEASE, 1798 WMI_TAG_DMA_BUF_RELEASE_ENTRY, 1799 WMI_TAG_SAR_GET_LIMITS_CMD, 1800 WMI_TAG_SAR_GET_LIMITS_EVENT, 1801 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW, 1802 WMI_TAG_OFFLOAD_11K_REPORT, 1803 WMI_TAG_INVOKE_NEIGHBOR_REPORT, 1804 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD, 1805 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS, 1806 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS, 1807 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD, 1808 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD, 1809 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD, 1810 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT, 1811 WMI_TAG_PDEV_GET_NFCAL_POWER, 1812 WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 1813 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 1814 WMI_TAG_OBSS_COLOR_COLLISION_EVT, 1815 WMI_TAG_RUNTIME_DPD_RECAL_CMD, 1816 WMI_TAG_TWT_ENABLE_CMD, 1817 WMI_TAG_TWT_DISABLE_CMD, 1818 WMI_TAG_TWT_ADD_DIALOG_CMD, 1819 WMI_TAG_TWT_DEL_DIALOG_CMD, 1820 WMI_TAG_TWT_PAUSE_DIALOG_CMD, 1821 WMI_TAG_TWT_RESUME_DIALOG_CMD, 1822 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT, 1823 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT, 1824 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT, 1825 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT, 1826 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT, 1827 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT, 1828 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD, 1829 WMI_TAG_ROAM_SCAN_STATS_EVENT, 1830 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD, 1831 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD, 1832 WMI_TAG_GET_TPC_POWER_CMD, 1833 WMI_TAG_GET_TPC_POWER_EVENT, 1834 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA, 1835 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD, 1836 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD, 1837 WMI_TAG_MOTION_DET_START_STOP_CMD, 1838 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD, 1839 WMI_TAG_MOTION_DET_EVENT, 1840 WMI_TAG_MOTION_DET_BASE_LINE_EVENT, 1841 WMI_TAG_NDP_TRANSPORT_IP, 1842 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 1843 WMI_TAG_ESP_ESTIMATE_EVENT, 1844 WMI_TAG_NAN_HOST_CONFIG, 1845 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS, 1846 WMI_TAG_PEER_CFR_CAPTURE_CMD, 1847 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD, 1848 WMI_TAG_CHAN_WIDTH_PEER_LIST, 1849 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD, 1850 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD, 1851 WMI_TAG_PEER_EXTD2_STATS, 1852 WMI_TAG_HPCS_PULSE_START_CMD, 1853 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT, 1854 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD, 1855 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD, 1856 WMI_TAG_NAN_EVENT_INFO, 1857 WMI_TAG_NDP_CHANNEL_INFO, 1858 WMI_TAG_NDP_CMD, 1859 WMI_TAG_NDP_EVENT, 1860 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301, 1861 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO, 1862 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344, 1863 WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD = 0x37b, 1864 WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD, 1865 WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD = 0x381, 1866 WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 1867 WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD, 1868 WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 1869 WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9, 1870 WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT, 1871 WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8, 1872 WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD, 1873 WMI_TAG_MAX 1874 }; 1875 1876 enum wmi_tlv_service { 1877 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0, 1878 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1, 1879 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2, 1880 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3, 1881 WMI_TLV_SERVICE_STA_PWRSAVE = 4, 1882 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5, 1883 WMI_TLV_SERVICE_AP_UAPSD = 6, 1884 WMI_TLV_SERVICE_AP_DFS = 7, 1885 WMI_TLV_SERVICE_11AC = 8, 1886 WMI_TLV_SERVICE_BLOCKACK = 9, 1887 WMI_TLV_SERVICE_PHYERR = 10, 1888 WMI_TLV_SERVICE_BCN_FILTER = 11, 1889 WMI_TLV_SERVICE_RTT = 12, 1890 WMI_TLV_SERVICE_WOW = 13, 1891 WMI_TLV_SERVICE_RATECTRL_CACHE = 14, 1892 WMI_TLV_SERVICE_IRAM_TIDS = 15, 1893 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16, 1894 WMI_TLV_SERVICE_NLO = 17, 1895 WMI_TLV_SERVICE_GTK_OFFLOAD = 18, 1896 WMI_TLV_SERVICE_SCAN_SCH = 19, 1897 WMI_TLV_SERVICE_CSA_OFFLOAD = 20, 1898 WMI_TLV_SERVICE_CHATTER = 21, 1899 WMI_TLV_SERVICE_COEX_FREQAVOID = 22, 1900 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23, 1901 WMI_TLV_SERVICE_FORCE_FW_HANG = 24, 1902 WMI_TLV_SERVICE_GPIO = 25, 1903 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26, 1904 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27, 1905 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28, 1906 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29, 1907 WMI_TLV_SERVICE_TX_ENCAP = 30, 1908 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31, 1909 WMI_TLV_SERVICE_EARLY_RX = 32, 1910 WMI_TLV_SERVICE_STA_SMPS = 33, 1911 WMI_TLV_SERVICE_FWTEST = 34, 1912 WMI_TLV_SERVICE_STA_WMMAC = 35, 1913 WMI_TLV_SERVICE_TDLS = 36, 1914 WMI_TLV_SERVICE_BURST = 37, 1915 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38, 1916 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39, 1917 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40, 1918 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41, 1919 WMI_TLV_SERVICE_WLAN_HB = 42, 1920 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43, 1921 WMI_TLV_SERVICE_BATCH_SCAN = 44, 1922 WMI_TLV_SERVICE_QPOWER = 45, 1923 WMI_TLV_SERVICE_PLMREQ = 46, 1924 WMI_TLV_SERVICE_THERMAL_MGMT = 47, 1925 WMI_TLV_SERVICE_RMC = 48, 1926 WMI_TLV_SERVICE_MHF_OFFLOAD = 49, 1927 WMI_TLV_SERVICE_COEX_SAR = 50, 1928 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51, 1929 WMI_TLV_SERVICE_NAN = 52, 1930 WMI_TLV_SERVICE_L1SS_STAT = 53, 1931 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54, 1932 WMI_TLV_SERVICE_OBSS_SCAN = 55, 1933 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56, 1934 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57, 1935 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58, 1936 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59, 1937 WMI_TLV_SERVICE_LPASS = 60, 1938 WMI_TLV_SERVICE_EXTSCAN = 61, 1939 WMI_TLV_SERVICE_D0WOW = 62, 1940 WMI_TLV_SERVICE_HSOFFLOAD = 63, 1941 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64, 1942 WMI_TLV_SERVICE_RX_FULL_REORDER = 65, 1943 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66, 1944 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67, 1945 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68, 1946 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69, 1947 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70, 1948 WMI_TLV_SERVICE_OCB = 71, 1949 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72, 1950 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73, 1951 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74, 1952 WMI_TLV_SERVICE_MGMT_TX_HTT = 75, 1953 WMI_TLV_SERVICE_MGMT_TX_WMI = 76, 1954 WMI_TLV_SERVICE_EXT_MSG = 77, 1955 WMI_TLV_SERVICE_MAWC = 78, 1956 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79, 1957 WMI_TLV_SERVICE_EGAP = 80, 1958 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81, 1959 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82, 1960 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83, 1961 WMI_TLV_SERVICE_ATF = 84, 1962 WMI_TLV_SERVICE_COEX_GPIO = 85, 1963 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86, 1964 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87, 1965 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88, 1966 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89, 1967 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90, 1968 WMI_TLV_SERVICE_BPF_OFFLOAD = 91, 1969 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92, 1970 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93, 1971 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94, 1972 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95, 1973 WMI_TLV_SERVICE_NAN_DATA = 96, 1974 WMI_TLV_SERVICE_NAN_RTT = 97, 1975 WMI_TLV_SERVICE_11AX = 98, 1976 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99, 1977 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100, 1978 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101, 1979 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102, 1980 WMI_TLV_SERVICE_MESH_11S = 103, 1981 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104, 1982 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105, 1983 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106, 1984 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107, 1985 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108, 1986 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109, 1987 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110, 1988 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111, 1989 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112, 1990 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113, 1991 WMI_TLV_SERVICE_RCPI_SUPPORT = 114, 1992 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115, 1993 WMI_TLV_SERVICE_PEER_STATS_INFO = 116, 1994 WMI_TLV_SERVICE_REGULATORY_DB = 117, 1995 WMI_TLV_SERVICE_11D_OFFLOAD = 118, 1996 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119, 1997 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120, 1998 WMI_TLV_SERVICE_PKT_ROUTING = 121, 1999 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122, 2000 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123, 2001 WMI_TLV_SERVICE_8SS_TX_BFEE = 124, 2002 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125, 2003 WMI_TLV_SERVICE_ACK_TIMEOUT = 126, 2004 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127, 2005 2006 /* The first 128 bits */ 2007 WMI_MAX_SERVICE = 128, 2008 2009 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128, 2010 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129, 2011 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130, 2012 WMI_TLV_SERVICE_FILS_SUPPORT = 131, 2013 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132, 2014 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133, 2015 WMI_TLV_SERVICE_MAWC_SUPPORT = 134, 2016 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135, 2017 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136, 2018 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137, 2019 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138, 2020 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139, 2021 WMI_TLV_SERVICE_THERM_THROT = 140, 2022 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141, 2023 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142, 2024 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143, 2025 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144, 2026 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145, 2027 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146, 2028 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147, 2029 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148, 2030 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149, 2031 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150, 2032 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151, 2033 WMI_TLV_SERVICE_STA_TWT = 152, 2034 WMI_TLV_SERVICE_AP_TWT = 153, 2035 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154, 2036 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155, 2037 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156, 2038 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157, 2039 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158, 2040 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159, 2041 WMI_TLV_SERVICE_MOTION_DET = 160, 2042 WMI_TLV_SERVICE_INFRA_MBSSID = 161, 2043 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162, 2044 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163, 2045 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164, 2046 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165, 2047 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166, 2048 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167, 2049 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168, 2050 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169, 2051 WMI_TLV_SERVICE_ESP_SUPPORT = 170, 2052 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171, 2053 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172, 2054 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173, 2055 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174, 2056 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175, 2057 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176, 2058 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177, 2059 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178, 2060 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179, 2061 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180, 2062 WMI_TLV_SERVICE_FETCH_TX_PN = 181, 2063 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182, 2064 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183, 2065 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184, 2066 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185, 2067 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186, 2068 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187, 2069 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188, 2070 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189, 2071 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190, 2072 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191, 2073 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192, 2074 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193, 2075 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194, 2076 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195, 2077 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196, 2078 WMI_TLV_SERVICE_VOW_ENABLE = 197, 2079 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198, 2080 WMI_TLV_SERVICE_BROADCAST_TWT = 199, 2081 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200, 2082 WMI_TLV_SERVICE_PS_TDCC = 201, 2083 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202, 2084 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203, 2085 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204, 2086 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205, 2087 WMI_TLV_SERVICE_WPA3_FT_FILS = 206, 2088 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207, 2089 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208, 2090 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209, 2091 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210, 2092 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211, 2093 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212, 2094 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213, 2095 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219, 2096 WMI_TLV_SERVICE_EXT2_MSG = 220, 2097 WMI_TLV_SERVICE_PEER_POWER_SAVE_DURATION_SUPPORT = 246, 2098 WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249, 2099 WMI_TLV_SERVICE_PASSIVE_SCAN_START_TIME_ENHANCE = 263, 2100 2101 /* The second 128 bits */ 2102 WMI_MAX_EXT_SERVICE = 256, 2103 WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL = 265, 2104 WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281, 2105 WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326, 2106 WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN = 357, 2107 2108 /* The third 128 bits */ 2109 WMI_MAX_EXT2_SERVICE = 384 2110 }; 2111 2112 enum { 2113 WMI_SMPS_FORCED_MODE_NONE = 0, 2114 WMI_SMPS_FORCED_MODE_DISABLED, 2115 WMI_SMPS_FORCED_MODE_STATIC, 2116 WMI_SMPS_FORCED_MODE_DYNAMIC 2117 }; 2118 2119 #define WMI_TPC_CHAINMASK_CONFIG_BAND_2G 0 2120 #define WMI_TPC_CHAINMASK_CONFIG_BAND_5G 1 2121 #define WMI_NUM_SUPPORTED_BAND_MAX 2 2122 2123 #define WMI_PEER_MIMO_PS_STATE 0x1 2124 #define WMI_PEER_AMPDU 0x2 2125 #define WMI_PEER_AUTHORIZE 0x3 2126 #define WMI_PEER_CHWIDTH 0x4 2127 #define WMI_PEER_NSS 0x5 2128 #define WMI_PEER_USE_4ADDR 0x6 2129 #define WMI_PEER_MEMBERSHIP 0x7 2130 #define WMI_PEER_USERPOS 0x8 2131 #define WMI_PEER_CRIT_PROTO_HINT_ENABLED 0x9 2132 #define WMI_PEER_TX_FAIL_CNT_THR 0xA 2133 #define WMI_PEER_SET_HW_RETRY_CTS2S 0xB 2134 #define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH 0xC 2135 #define WMI_PEER_PHYMODE 0xD 2136 #define WMI_PEER_USE_FIXED_PWR 0xE 2137 #define WMI_PEER_PARAM_FIXED_RATE 0xF 2138 #define WMI_PEER_SET_MU_WHITELIST 0x10 2139 #define WMI_PEER_SET_MAX_TX_RATE 0x11 2140 #define WMI_PEER_SET_MIN_TX_RATE 0x12 2141 #define WMI_PEER_SET_DEFAULT_ROUTING 0x13 2142 2143 /* slot time long */ 2144 #define WMI_VDEV_SLOT_TIME_LONG 0x1 2145 /* slot time short */ 2146 #define WMI_VDEV_SLOT_TIME_SHORT 0x2 2147 /* preablbe long */ 2148 #define WMI_VDEV_PREAMBLE_LONG 0x1 2149 /* preablbe short */ 2150 #define WMI_VDEV_PREAMBLE_SHORT 0x2 2151 2152 enum wmi_peer_smps_state { 2153 WMI_PEER_SMPS_PS_NONE = 0x0, 2154 WMI_PEER_SMPS_STATIC = 0x1, 2155 WMI_PEER_SMPS_DYNAMIC = 0x2 2156 }; 2157 2158 enum wmi_peer_chwidth { 2159 WMI_PEER_CHWIDTH_20MHZ = 0, 2160 WMI_PEER_CHWIDTH_40MHZ = 1, 2161 WMI_PEER_CHWIDTH_80MHZ = 2, 2162 WMI_PEER_CHWIDTH_160MHZ = 3, 2163 }; 2164 2165 enum wmi_beacon_gen_mode { 2166 WMI_BEACON_STAGGERED_MODE = 0, 2167 WMI_BEACON_BURST_MODE = 1 2168 }; 2169 2170 enum wmi_direct_buffer_module { 2171 WMI_DIRECT_BUF_SPECTRAL = 0, 2172 WMI_DIRECT_BUF_CFR = 1, 2173 2174 /* keep it last */ 2175 WMI_DIRECT_BUF_MAX 2176 }; 2177 2178 /* enum wmi_nss_ratio - NSS ratio received from FW during service ready ext 2179 * event 2180 * WMI_NSS_RATIO_1BY2_NSS -Max nss of 160MHz is equals to half of the max nss 2181 * of 80MHz 2182 * WMI_NSS_RATIO_3BY4_NSS - Max nss of 160MHz is equals to 3/4 of the max nss 2183 * of 80MHz 2184 * WMI_NSS_RATIO_1_NSS - Max nss of 160MHz is equals to the max nss of 80MHz 2185 * WMI_NSS_RATIO_2_NSS - Max nss of 160MHz is equals to two times the max 2186 * nss of 80MHz 2187 */ 2188 2189 enum wmi_nss_ratio { 2190 WMI_NSS_RATIO_1BY2_NSS = 0x0, 2191 WMI_NSS_RATIO_3BY4_NSS = 0x1, 2192 WMI_NSS_RATIO_1_NSS = 0x2, 2193 WMI_NSS_RATIO_2_NSS = 0x3, 2194 }; 2195 2196 enum wmi_dtim_policy { 2197 WMI_DTIM_POLICY_IGNORE = 1, 2198 WMI_DTIM_POLICY_NORMAL = 2, 2199 WMI_DTIM_POLICY_STICK = 3, 2200 WMI_DTIM_POLICY_AUTO = 4, 2201 }; 2202 2203 struct wmi_host_pdev_band_to_mac { 2204 u32 pdev_id; 2205 u32 start_freq; 2206 u32 end_freq; 2207 }; 2208 2209 struct ath11k_ppe_threshold { 2210 u32 numss_m1; 2211 u32 ru_bit_mask; 2212 u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS]; 2213 }; 2214 2215 struct ath11k_service_ext_param { 2216 u32 default_conc_scan_config_bits; 2217 u32 default_fw_config_bits; 2218 struct ath11k_ppe_threshold ppet; 2219 u32 he_cap_info; 2220 u32 mpdu_density; 2221 u32 max_bssid_rx_filters; 2222 u32 num_hw_modes; 2223 u32 num_phy; 2224 }; 2225 2226 struct ath11k_hw_mode_caps { 2227 u32 hw_mode_id; 2228 u32 phy_id_map; 2229 u32 hw_mode_config_type; 2230 }; 2231 2232 #define PSOC_HOST_MAX_PHY_SIZE (3) 2233 #define ATH11K_11B_SUPPORT BIT(0) 2234 #define ATH11K_11G_SUPPORT BIT(1) 2235 #define ATH11K_11A_SUPPORT BIT(2) 2236 #define ATH11K_11N_SUPPORT BIT(3) 2237 #define ATH11K_11AC_SUPPORT BIT(4) 2238 #define ATH11K_11AX_SUPPORT BIT(5) 2239 2240 struct ath11k_hal_reg_capabilities_ext { 2241 u32 phy_id; 2242 u32 eeprom_reg_domain; 2243 u32 eeprom_reg_domain_ext; 2244 u32 regcap1; 2245 u32 regcap2; 2246 u32 wireless_modes; 2247 u32 low_2ghz_chan; 2248 u32 high_2ghz_chan; 2249 u32 low_5ghz_chan; 2250 u32 high_5ghz_chan; 2251 }; 2252 2253 #define WMI_HOST_MAX_PDEV 3 2254 2255 struct wlan_host_mem_chunk { 2256 u32 tlv_header; 2257 u32 req_id; 2258 u32 ptr; 2259 u32 size; 2260 } __packed; 2261 2262 struct wmi_host_mem_chunk { 2263 void *vaddr; 2264 dma_addr_t paddr; 2265 u32 len; 2266 u32 req_id; 2267 }; 2268 2269 struct wmi_init_cmd_param { 2270 u32 tlv_header; 2271 struct target_resource_config *res_cfg; 2272 u8 num_mem_chunks; 2273 struct wmi_host_mem_chunk *mem_chunks; 2274 u32 hw_mode_id; 2275 u32 num_band_to_mac; 2276 struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV]; 2277 }; 2278 2279 struct wmi_pdev_band_to_mac { 2280 u32 tlv_header; 2281 u32 pdev_id; 2282 u32 start_freq; 2283 u32 end_freq; 2284 } __packed; 2285 2286 struct wmi_pdev_set_hw_mode_cmd_param { 2287 u32 tlv_header; 2288 u32 pdev_id; 2289 u32 hw_mode_index; 2290 u32 num_band_to_mac; 2291 } __packed; 2292 2293 struct wmi_ppe_threshold { 2294 u32 numss_m1; /** NSS - 1*/ 2295 union { 2296 u32 ru_count; 2297 u32 ru_mask; 2298 } __packed; 2299 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2300 } __packed; 2301 2302 #define HW_BD_INFO_SIZE 5 2303 2304 struct wmi_abi_version { 2305 u32 abi_version_0; 2306 u32 abi_version_1; 2307 u32 abi_version_ns_0; 2308 u32 abi_version_ns_1; 2309 u32 abi_version_ns_2; 2310 u32 abi_version_ns_3; 2311 } __packed; 2312 2313 struct wmi_init_cmd { 2314 u32 tlv_header; 2315 struct wmi_abi_version host_abi_vers; 2316 u32 num_host_mem_chunks; 2317 } __packed; 2318 2319 #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5) 2320 #define WMI_RSRC_CFG_FLAG1_ACK_RSSI BIT(18) 2321 2322 #define WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT 4 2323 2324 struct wmi_resource_config { 2325 u32 tlv_header; 2326 u32 num_vdevs; 2327 u32 num_peers; 2328 u32 num_offload_peers; 2329 u32 num_offload_reorder_buffs; 2330 u32 num_peer_keys; 2331 u32 num_tids; 2332 u32 ast_skid_limit; 2333 u32 tx_chain_mask; 2334 u32 rx_chain_mask; 2335 u32 rx_timeout_pri[4]; 2336 u32 rx_decap_mode; 2337 u32 scan_max_pending_req; 2338 u32 bmiss_offload_max_vdev; 2339 u32 roam_offload_max_vdev; 2340 u32 roam_offload_max_ap_profiles; 2341 u32 num_mcast_groups; 2342 u32 num_mcast_table_elems; 2343 u32 mcast2ucast_mode; 2344 u32 tx_dbg_log_size; 2345 u32 num_wds_entries; 2346 u32 dma_burst_size; 2347 u32 mac_aggr_delim; 2348 u32 rx_skip_defrag_timeout_dup_detection_check; 2349 u32 vow_config; 2350 u32 gtk_offload_max_vdev; 2351 u32 num_msdu_desc; 2352 u32 max_frag_entries; 2353 u32 num_tdls_vdevs; 2354 u32 num_tdls_conn_table_entries; 2355 u32 beacon_tx_offload_max_vdev; 2356 u32 num_multicast_filter_entries; 2357 u32 num_wow_filters; 2358 u32 num_keep_alive_pattern; 2359 u32 keep_alive_pattern_size; 2360 u32 max_tdls_concurrent_sleep_sta; 2361 u32 max_tdls_concurrent_buffer_sta; 2362 u32 wmi_send_separate; 2363 u32 num_ocb_vdevs; 2364 u32 num_ocb_channels; 2365 u32 num_ocb_schedules; 2366 u32 flag1; 2367 u32 smart_ant_cap; 2368 u32 bk_minfree; 2369 u32 be_minfree; 2370 u32 vi_minfree; 2371 u32 vo_minfree; 2372 u32 alloc_frag_desc_for_data_pkt; 2373 u32 num_ns_ext_tuples_cfg; 2374 u32 bpf_instruction_size; 2375 u32 max_bssid_rx_filters; 2376 u32 use_pdev_id; 2377 u32 max_num_dbs_scan_duty_cycle; 2378 u32 max_num_group_keys; 2379 u32 peer_map_unmap_v2_support; 2380 u32 sched_params; 2381 u32 twt_ap_pdev_count; 2382 u32 twt_ap_sta_count; 2383 u32 max_nlo_ssids; 2384 u32 num_pkt_filters; 2385 u32 num_max_sta_vdevs; 2386 u32 max_bssid_indicator; 2387 u32 ul_resp_config; 2388 u32 msdu_flow_override_config0; 2389 u32 msdu_flow_override_config1; 2390 u32 flags2; 2391 u32 host_service_flags; 2392 } __packed; 2393 2394 struct wmi_service_ready_event { 2395 u32 fw_build_vers; 2396 struct wmi_abi_version fw_abi_vers; 2397 u32 phy_capability; 2398 u32 max_frag_entry; 2399 u32 num_rf_chains; 2400 u32 ht_cap_info; 2401 u32 vht_cap_info; 2402 u32 vht_supp_mcs; 2403 u32 hw_min_tx_power; 2404 u32 hw_max_tx_power; 2405 u32 sys_cap_info; 2406 u32 min_pkt_size_enable; 2407 u32 max_bcn_ie_size; 2408 u32 num_mem_reqs; 2409 u32 max_num_scan_channels; 2410 u32 hw_bd_id; 2411 u32 hw_bd_info[HW_BD_INFO_SIZE]; 2412 u32 max_supported_macs; 2413 u32 wmi_fw_sub_feat_caps; 2414 u32 num_dbs_hw_modes; 2415 /* txrx_chainmask 2416 * [7:0] - 2G band tx chain mask 2417 * [15:8] - 2G band rx chain mask 2418 * [23:16] - 5G band tx chain mask 2419 * [31:24] - 5G band rx chain mask 2420 */ 2421 u32 txrx_chainmask; 2422 u32 default_dbs_hw_mode_index; 2423 u32 num_msdu_desc; 2424 } __packed; 2425 2426 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32)) 2427 2428 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */ 2429 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32)) 2430 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32 2431 #define WMI_SERVICE_BITS_IN_SIZE32 4 2432 2433 struct wmi_service_ready_ext_event { 2434 u32 default_conc_scan_config_bits; 2435 u32 default_fw_config_bits; 2436 struct wmi_ppe_threshold ppet; 2437 u32 he_cap_info; 2438 u32 mpdu_density; 2439 u32 max_bssid_rx_filters; 2440 u32 fw_build_vers_ext; 2441 u32 max_nlo_ssids; 2442 u32 max_bssid_indicator; 2443 u32 he_cap_info_ext; 2444 } __packed; 2445 2446 struct wmi_soc_mac_phy_hw_mode_caps { 2447 u32 num_hw_modes; 2448 u32 num_chainmask_tables; 2449 } __packed; 2450 2451 struct wmi_hw_mode_capabilities { 2452 u32 tlv_header; 2453 u32 hw_mode_id; 2454 u32 phy_id_map; 2455 u32 hw_mode_config_type; 2456 } __packed; 2457 2458 #define WMI_MAX_HECAP_PHY_SIZE (3) 2459 #define WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS BIT(0) 2460 #define WMI_NSS_RATIO_ENABLE_DISABLE_GET(_val) \ 2461 FIELD_GET(WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS, _val) 2462 #define WMI_NSS_RATIO_INFO_BITPOS GENMASK(4, 1) 2463 #define WMI_NSS_RATIO_INFO_GET(_val) \ 2464 FIELD_GET(WMI_NSS_RATIO_INFO_BITPOS, _val) 2465 2466 struct wmi_mac_phy_capabilities { 2467 u32 hw_mode_id; 2468 u32 pdev_id; 2469 u32 phy_id; 2470 u32 supported_flags; 2471 u32 supported_bands; 2472 u32 ampdu_density; 2473 u32 max_bw_supported_2g; 2474 u32 ht_cap_info_2g; 2475 u32 vht_cap_info_2g; 2476 u32 vht_supp_mcs_2g; 2477 u32 he_cap_info_2g; 2478 u32 he_supp_mcs_2g; 2479 u32 tx_chain_mask_2g; 2480 u32 rx_chain_mask_2g; 2481 u32 max_bw_supported_5g; 2482 u32 ht_cap_info_5g; 2483 u32 vht_cap_info_5g; 2484 u32 vht_supp_mcs_5g; 2485 u32 he_cap_info_5g; 2486 u32 he_supp_mcs_5g; 2487 u32 tx_chain_mask_5g; 2488 u32 rx_chain_mask_5g; 2489 u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE]; 2490 u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE]; 2491 struct wmi_ppe_threshold he_ppet2g; 2492 struct wmi_ppe_threshold he_ppet5g; 2493 u32 chainmask_table_id; 2494 u32 lmac_id; 2495 u32 he_cap_info_2g_ext; 2496 u32 he_cap_info_5g_ext; 2497 u32 he_cap_info_internal; 2498 u32 wireless_modes; 2499 u32 low_2ghz_chan_freq; 2500 u32 high_2ghz_chan_freq; 2501 u32 low_5ghz_chan_freq; 2502 u32 high_5ghz_chan_freq; 2503 u32 nss_ratio; 2504 } __packed; 2505 2506 struct wmi_hal_reg_capabilities_ext { 2507 u32 tlv_header; 2508 u32 phy_id; 2509 u32 eeprom_reg_domain; 2510 u32 eeprom_reg_domain_ext; 2511 u32 regcap1; 2512 u32 regcap2; 2513 u32 wireless_modes; 2514 u32 low_2ghz_chan; 2515 u32 high_2ghz_chan; 2516 u32 low_5ghz_chan; 2517 u32 high_5ghz_chan; 2518 } __packed; 2519 2520 struct wmi_soc_hal_reg_capabilities { 2521 u32 num_phy; 2522 } __packed; 2523 2524 /* 2 word representation of MAC addr */ 2525 struct wmi_mac_addr { 2526 union { 2527 u8 addr[6]; 2528 struct { 2529 u32 word0; 2530 u32 word1; 2531 } __packed; 2532 } __packed; 2533 } __packed; 2534 2535 struct wmi_dma_ring_capabilities { 2536 u32 tlv_header; 2537 u32 pdev_id; 2538 u32 module_id; 2539 u32 min_elem; 2540 u32 min_buf_sz; 2541 u32 min_buf_align; 2542 } __packed; 2543 2544 struct wmi_ready_event_min { 2545 struct wmi_abi_version fw_abi_vers; 2546 struct wmi_mac_addr mac_addr; 2547 u32 status; 2548 u32 num_dscp_table; 2549 u32 num_extra_mac_addr; 2550 u32 num_total_peers; 2551 u32 num_extra_peers; 2552 } __packed; 2553 2554 struct wmi_ready_event { 2555 struct wmi_ready_event_min ready_event_min; 2556 u32 max_ast_index; 2557 u32 pktlog_defs_checksum; 2558 } __packed; 2559 2560 struct wmi_service_available_event { 2561 u32 wmi_service_segment_offset; 2562 u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32]; 2563 } __packed; 2564 2565 struct ath11k_pdev_wmi { 2566 struct ath11k_wmi_base *wmi_ab; 2567 enum ath11k_htc_ep_id eid; 2568 const struct wmi_peer_flags_map *peer_flags; 2569 u32 rx_decap_mode; 2570 wait_queue_head_t tx_ce_desc_wq; 2571 }; 2572 2573 struct vdev_create_params { 2574 u8 if_id; 2575 u32 type; 2576 u32 subtype; 2577 struct { 2578 u8 tx; 2579 u8 rx; 2580 } chains[NUM_NL80211_BANDS]; 2581 u32 pdev_id; 2582 }; 2583 2584 struct wmi_vdev_create_cmd { 2585 u32 tlv_header; 2586 u32 vdev_id; 2587 u32 vdev_type; 2588 u32 vdev_subtype; 2589 struct wmi_mac_addr vdev_macaddr; 2590 u32 num_cfg_txrx_streams; 2591 u32 pdev_id; 2592 } __packed; 2593 2594 struct wmi_vdev_txrx_streams { 2595 u32 tlv_header; 2596 u32 band; 2597 u32 supported_tx_streams; 2598 u32 supported_rx_streams; 2599 } __packed; 2600 2601 struct wmi_vdev_delete_cmd { 2602 u32 tlv_header; 2603 u32 vdev_id; 2604 } __packed; 2605 2606 struct wmi_vdev_up_cmd { 2607 u32 tlv_header; 2608 u32 vdev_id; 2609 u32 vdev_assoc_id; 2610 struct wmi_mac_addr vdev_bssid; 2611 struct wmi_mac_addr trans_bssid; 2612 u32 profile_idx; 2613 u32 profile_num; 2614 } __packed; 2615 2616 struct wmi_vdev_stop_cmd { 2617 u32 tlv_header; 2618 u32 vdev_id; 2619 } __packed; 2620 2621 struct wmi_vdev_down_cmd { 2622 u32 tlv_header; 2623 u32 vdev_id; 2624 } __packed; 2625 2626 #define WMI_VDEV_START_HIDDEN_SSID BIT(0) 2627 #define WMI_VDEV_START_PMF_ENABLED BIT(1) 2628 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) 2629 #define WMI_VDEV_START_HW_ENCRYPTION_DISABLED BIT(4) 2630 2631 struct wmi_ssid { 2632 u32 ssid_len; 2633 u32 ssid[8]; 2634 } __packed; 2635 2636 #define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ) 2637 2638 struct wmi_vdev_start_request_cmd { 2639 u32 tlv_header; 2640 u32 vdev_id; 2641 u32 requestor_id; 2642 u32 beacon_interval; 2643 u32 dtim_period; 2644 u32 flags; 2645 struct wmi_ssid ssid; 2646 u32 bcn_tx_rate; 2647 u32 bcn_txpower; 2648 u32 num_noa_descriptors; 2649 u32 disable_hw_ack; 2650 u32 preferred_tx_streams; 2651 u32 preferred_rx_streams; 2652 u32 he_ops; 2653 u32 cac_duration_ms; 2654 u32 regdomain; 2655 } __packed; 2656 2657 #define MGMT_TX_DL_FRM_LEN 64 2658 #define WMI_MAC_MAX_SSID_LENGTH 32 2659 struct mac_ssid { 2660 u8 length; 2661 u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH]; 2662 } __packed; 2663 2664 struct wmi_p2p_noa_descriptor { 2665 u32 type_count; 2666 u32 duration; 2667 u32 interval; 2668 u32 start_time; 2669 }; 2670 2671 struct channel_param { 2672 u8 chan_id; 2673 u8 pwr; 2674 u32 mhz; 2675 u32 half_rate:1, 2676 quarter_rate:1, 2677 dfs_set:1, 2678 dfs_set_cfreq2:1, 2679 is_chan_passive:1, 2680 allow_ht:1, 2681 allow_vht:1, 2682 allow_he:1, 2683 set_agile:1, 2684 psc_channel:1; 2685 u32 phy_mode; 2686 u32 cfreq1; 2687 u32 cfreq2; 2688 char maxpower; 2689 char minpower; 2690 char maxregpower; 2691 u8 antennamax; 2692 u8 reg_class_id; 2693 } __packed; 2694 2695 enum wmi_phy_mode { 2696 MODE_11A = 0, 2697 MODE_11G = 1, /* 11b/g Mode */ 2698 MODE_11B = 2, /* 11b Mode */ 2699 MODE_11GONLY = 3, /* 11g only Mode */ 2700 MODE_11NA_HT20 = 4, 2701 MODE_11NG_HT20 = 5, 2702 MODE_11NA_HT40 = 6, 2703 MODE_11NG_HT40 = 7, 2704 MODE_11AC_VHT20 = 8, 2705 MODE_11AC_VHT40 = 9, 2706 MODE_11AC_VHT80 = 10, 2707 MODE_11AC_VHT20_2G = 11, 2708 MODE_11AC_VHT40_2G = 12, 2709 MODE_11AC_VHT80_2G = 13, 2710 MODE_11AC_VHT80_80 = 14, 2711 MODE_11AC_VHT160 = 15, 2712 MODE_11AX_HE20 = 16, 2713 MODE_11AX_HE40 = 17, 2714 MODE_11AX_HE80 = 18, 2715 MODE_11AX_HE80_80 = 19, 2716 MODE_11AX_HE160 = 20, 2717 MODE_11AX_HE20_2G = 21, 2718 MODE_11AX_HE40_2G = 22, 2719 MODE_11AX_HE80_2G = 23, 2720 MODE_UNKNOWN = 24, 2721 MODE_MAX = 24 2722 }; 2723 2724 static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode) 2725 { 2726 switch (mode) { 2727 case MODE_11A: 2728 return "11a"; 2729 case MODE_11G: 2730 return "11g"; 2731 case MODE_11B: 2732 return "11b"; 2733 case MODE_11GONLY: 2734 return "11gonly"; 2735 case MODE_11NA_HT20: 2736 return "11na-ht20"; 2737 case MODE_11NG_HT20: 2738 return "11ng-ht20"; 2739 case MODE_11NA_HT40: 2740 return "11na-ht40"; 2741 case MODE_11NG_HT40: 2742 return "11ng-ht40"; 2743 case MODE_11AC_VHT20: 2744 return "11ac-vht20"; 2745 case MODE_11AC_VHT40: 2746 return "11ac-vht40"; 2747 case MODE_11AC_VHT80: 2748 return "11ac-vht80"; 2749 case MODE_11AC_VHT160: 2750 return "11ac-vht160"; 2751 case MODE_11AC_VHT80_80: 2752 return "11ac-vht80+80"; 2753 case MODE_11AC_VHT20_2G: 2754 return "11ac-vht20-2g"; 2755 case MODE_11AC_VHT40_2G: 2756 return "11ac-vht40-2g"; 2757 case MODE_11AC_VHT80_2G: 2758 return "11ac-vht80-2g"; 2759 case MODE_11AX_HE20: 2760 return "11ax-he20"; 2761 case MODE_11AX_HE40: 2762 return "11ax-he40"; 2763 case MODE_11AX_HE80: 2764 return "11ax-he80"; 2765 case MODE_11AX_HE80_80: 2766 return "11ax-he80+80"; 2767 case MODE_11AX_HE160: 2768 return "11ax-he160"; 2769 case MODE_11AX_HE20_2G: 2770 return "11ax-he20-2g"; 2771 case MODE_11AX_HE40_2G: 2772 return "11ax-he40-2g"; 2773 case MODE_11AX_HE80_2G: 2774 return "11ax-he80-2g"; 2775 case MODE_UNKNOWN: 2776 /* skip */ 2777 break; 2778 2779 /* no default handler to allow compiler to check that the 2780 * enum is fully handled 2781 */ 2782 } 2783 2784 return "<unknown>"; 2785 } 2786 2787 struct wmi_channel_arg { 2788 u32 freq; 2789 u32 band_center_freq1; 2790 u32 band_center_freq2; 2791 bool passive; 2792 bool allow_ibss; 2793 bool allow_ht; 2794 bool allow_vht; 2795 bool ht40plus; 2796 bool chan_radar; 2797 bool freq2_radar; 2798 bool allow_he; 2799 u32 min_power; 2800 u32 max_power; 2801 u32 max_reg_power; 2802 u32 max_antenna_gain; 2803 enum wmi_phy_mode mode; 2804 }; 2805 2806 struct wmi_vdev_start_req_arg { 2807 u32 vdev_id; 2808 struct wmi_channel_arg channel; 2809 u32 bcn_intval; 2810 u32 dtim_period; 2811 u8 *ssid; 2812 u32 ssid_len; 2813 u32 bcn_tx_rate; 2814 u32 bcn_tx_power; 2815 bool disable_hw_ack; 2816 bool hidden_ssid; 2817 bool pmf_enabled; 2818 u32 he_ops; 2819 u32 cac_duration_ms; 2820 u32 regdomain; 2821 u32 pref_rx_streams; 2822 u32 pref_tx_streams; 2823 u32 num_noa_descriptors; 2824 }; 2825 2826 struct peer_create_params { 2827 const u8 *peer_addr; 2828 u32 peer_type; 2829 u32 vdev_id; 2830 }; 2831 2832 struct peer_delete_params { 2833 u8 vdev_id; 2834 }; 2835 2836 struct peer_flush_params { 2837 u32 peer_tid_bitmap; 2838 u8 vdev_id; 2839 }; 2840 2841 struct pdev_set_regdomain_params { 2842 u16 current_rd_in_use; 2843 u16 current_rd_2g; 2844 u16 current_rd_5g; 2845 u32 ctl_2g; 2846 u32 ctl_5g; 2847 u8 dfs_domain; 2848 u32 pdev_id; 2849 }; 2850 2851 struct rx_reorder_queue_remove_params { 2852 u8 *peer_macaddr; 2853 u16 vdev_id; 2854 u32 peer_tid_bitmap; 2855 }; 2856 2857 #define WMI_HOST_PDEV_ID_SOC 0xFF 2858 #define WMI_HOST_PDEV_ID_0 0 2859 #define WMI_HOST_PDEV_ID_1 1 2860 #define WMI_HOST_PDEV_ID_2 2 2861 2862 #define WMI_PDEV_ID_SOC 0 2863 #define WMI_PDEV_ID_1ST 1 2864 #define WMI_PDEV_ID_2ND 2 2865 #define WMI_PDEV_ID_3RD 3 2866 2867 /* Freq units in MHz */ 2868 #define REG_RULE_START_FREQ 0x0000ffff 2869 #define REG_RULE_END_FREQ 0xffff0000 2870 #define REG_RULE_FLAGS 0x0000ffff 2871 #define REG_RULE_MAX_BW 0x0000ffff 2872 #define REG_RULE_REG_PWR 0x00ff0000 2873 #define REG_RULE_ANT_GAIN 0xff000000 2874 #define REG_RULE_PSD_INFO BIT(0) 2875 #define REG_RULE_PSD_EIRP 0xff0000 2876 2877 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 2878 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 2879 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 2880 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 2881 2882 #define HE_PHYCAP_BYTE_0 0 2883 #define HE_PHYCAP_BYTE_1 1 2884 #define HE_PHYCAP_BYTE_2 2 2885 #define HE_PHYCAP_BYTE_3 3 2886 #define HE_PHYCAP_BYTE_4 4 2887 2888 #define HECAP_PHY_SU_BFER BIT(7) 2889 #define HECAP_PHY_SU_BFEE BIT(0) 2890 #define HECAP_PHY_MU_BFER BIT(1) 2891 #define HECAP_PHY_UL_MUMIMO BIT(6) 2892 #define HECAP_PHY_UL_MUOFDMA BIT(7) 2893 2894 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \ 2895 FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HE_PHYCAP_BYTE_3]) 2896 2897 #define HECAP_PHY_SUBFME_GET(hecap_phy) \ 2898 FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HE_PHYCAP_BYTE_4]) 2899 2900 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \ 2901 FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HE_PHYCAP_BYTE_4]) 2902 2903 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \ 2904 FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HE_PHYCAP_BYTE_2]) 2905 2906 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \ 2907 FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HE_PHYCAP_BYTE_2]) 2908 2909 #define HE_MODE_SU_TX_BFEE BIT(0) 2910 #define HE_MODE_SU_TX_BFER BIT(1) 2911 #define HE_MODE_MU_TX_BFEE BIT(2) 2912 #define HE_MODE_MU_TX_BFER BIT(3) 2913 #define HE_MODE_DL_OFDMA BIT(4) 2914 #define HE_MODE_UL_OFDMA BIT(5) 2915 #define HE_MODE_UL_MUMIMO BIT(6) 2916 2917 #define HE_DL_MUOFDMA_ENABLE 1 2918 #define HE_UL_MUOFDMA_ENABLE 1 2919 #define HE_DL_MUMIMO_ENABLE 1 2920 #define HE_UL_MUMIMO_ENABLE 1 2921 #define HE_MU_BFEE_ENABLE 1 2922 #define HE_SU_BFEE_ENABLE 1 2923 #define HE_MU_BFER_ENABLE 1 2924 #define HE_SU_BFER_ENABLE 1 2925 2926 #define HE_VHT_SOUNDING_MODE_ENABLE 1 2927 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1 2928 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1 2929 2930 /* HE or VHT Sounding */ 2931 #define HE_VHT_SOUNDING_MODE BIT(0) 2932 /* SU or MU Sounding */ 2933 #define HE_SU_MU_SOUNDING_MODE BIT(2) 2934 /* Trig or Non-Trig Sounding */ 2935 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3) 2936 2937 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 2938 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 2939 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 2940 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700 2941 2942 struct pdev_params { 2943 u32 param_id; 2944 u32 param_value; 2945 }; 2946 2947 enum wmi_peer_type { 2948 WMI_PEER_TYPE_DEFAULT = 0, 2949 WMI_PEER_TYPE_BSS = 1, 2950 WMI_PEER_TYPE_TDLS = 2, 2951 }; 2952 2953 struct wmi_peer_create_cmd { 2954 u32 tlv_header; 2955 u32 vdev_id; 2956 struct wmi_mac_addr peer_macaddr; 2957 u32 peer_type; 2958 } __packed; 2959 2960 struct wmi_peer_delete_cmd { 2961 u32 tlv_header; 2962 u32 vdev_id; 2963 struct wmi_mac_addr peer_macaddr; 2964 } __packed; 2965 2966 struct wmi_peer_reorder_queue_setup_cmd { 2967 u32 tlv_header; 2968 u32 vdev_id; 2969 struct wmi_mac_addr peer_macaddr; 2970 u32 tid; 2971 u32 queue_ptr_lo; 2972 u32 queue_ptr_hi; 2973 u32 queue_no; 2974 u32 ba_window_size_valid; 2975 u32 ba_window_size; 2976 } __packed; 2977 2978 struct wmi_peer_reorder_queue_remove_cmd { 2979 u32 tlv_header; 2980 u32 vdev_id; 2981 struct wmi_mac_addr peer_macaddr; 2982 u32 tid_mask; 2983 } __packed; 2984 2985 struct gpio_config_params { 2986 u32 gpio_num; 2987 u32 input; 2988 u32 pull_type; 2989 u32 intr_mode; 2990 }; 2991 2992 enum wmi_gpio_type { 2993 WMI_GPIO_PULL_NONE, 2994 WMI_GPIO_PULL_UP, 2995 WMI_GPIO_PULL_DOWN 2996 }; 2997 2998 enum wmi_gpio_intr_type { 2999 WMI_GPIO_INTTYPE_DISABLE, 3000 WMI_GPIO_INTTYPE_RISING_EDGE, 3001 WMI_GPIO_INTTYPE_FALLING_EDGE, 3002 WMI_GPIO_INTTYPE_BOTH_EDGE, 3003 WMI_GPIO_INTTYPE_LEVEL_LOW, 3004 WMI_GPIO_INTTYPE_LEVEL_HIGH 3005 }; 3006 3007 enum wmi_bss_chan_info_req_type { 3008 WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 3009 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 3010 }; 3011 3012 struct wmi_gpio_config_cmd_param { 3013 u32 tlv_header; 3014 u32 gpio_num; 3015 u32 input; 3016 u32 pull_type; 3017 u32 intr_mode; 3018 }; 3019 3020 struct gpio_output_params { 3021 u32 gpio_num; 3022 u32 set; 3023 }; 3024 3025 struct wmi_gpio_output_cmd_param { 3026 u32 tlv_header; 3027 u32 gpio_num; 3028 u32 set; 3029 }; 3030 3031 struct set_fwtest_params { 3032 u32 arg; 3033 u32 value; 3034 }; 3035 3036 struct wmi_fwtest_set_param_cmd_param { 3037 u32 tlv_header; 3038 u32 param_id; 3039 u32 param_value; 3040 }; 3041 3042 struct wmi_pdev_set_param_cmd { 3043 u32 tlv_header; 3044 u32 pdev_id; 3045 u32 param_id; 3046 u32 param_value; 3047 } __packed; 3048 3049 struct wmi_pdev_set_ps_mode_cmd { 3050 u32 tlv_header; 3051 u32 vdev_id; 3052 u32 sta_ps_mode; 3053 } __packed; 3054 3055 struct wmi_pdev_suspend_cmd { 3056 u32 tlv_header; 3057 u32 pdev_id; 3058 u32 suspend_opt; 3059 } __packed; 3060 3061 struct wmi_pdev_resume_cmd { 3062 u32 tlv_header; 3063 u32 pdev_id; 3064 } __packed; 3065 3066 struct wmi_pdev_bss_chan_info_req_cmd { 3067 u32 tlv_header; 3068 /* ref wmi_bss_chan_info_req_type */ 3069 u32 req_type; 3070 u32 pdev_id; 3071 } __packed; 3072 3073 struct wmi_ap_ps_peer_cmd { 3074 u32 tlv_header; 3075 u32 vdev_id; 3076 struct wmi_mac_addr peer_macaddr; 3077 u32 param; 3078 u32 value; 3079 } __packed; 3080 3081 struct wmi_sta_powersave_param_cmd { 3082 u32 tlv_header; 3083 u32 vdev_id; 3084 u32 param; 3085 u32 value; 3086 } __packed; 3087 3088 struct wmi_pdev_set_regdomain_cmd { 3089 u32 tlv_header; 3090 u32 pdev_id; 3091 u32 reg_domain; 3092 u32 reg_domain_2g; 3093 u32 reg_domain_5g; 3094 u32 conformance_test_limit_2g; 3095 u32 conformance_test_limit_5g; 3096 u32 dfs_domain; 3097 } __packed; 3098 3099 struct wmi_peer_set_param_cmd { 3100 u32 tlv_header; 3101 u32 vdev_id; 3102 struct wmi_mac_addr peer_macaddr; 3103 u32 param_id; 3104 u32 param_value; 3105 } __packed; 3106 3107 struct wmi_peer_flush_tids_cmd { 3108 u32 tlv_header; 3109 u32 vdev_id; 3110 struct wmi_mac_addr peer_macaddr; 3111 u32 peer_tid_bitmap; 3112 } __packed; 3113 3114 struct wmi_dfs_phyerr_offload_cmd { 3115 u32 tlv_header; 3116 u32 pdev_id; 3117 } __packed; 3118 3119 struct wmi_bcn_offload_ctrl_cmd { 3120 u32 tlv_header; 3121 u32 vdev_id; 3122 u32 bcn_ctrl_op; 3123 } __packed; 3124 3125 enum scan_dwelltime_adaptive_mode { 3126 SCAN_DWELL_MODE_DEFAULT = 0, 3127 SCAN_DWELL_MODE_CONSERVATIVE = 1, 3128 SCAN_DWELL_MODE_MODERATE = 2, 3129 SCAN_DWELL_MODE_AGGRESSIVE = 3, 3130 SCAN_DWELL_MODE_STATIC = 4 3131 }; 3132 3133 #define WLAN_SSID_MAX_LEN 32 3134 3135 struct element_info { 3136 u32 len; 3137 u8 *ptr; 3138 }; 3139 3140 struct wlan_ssid { 3141 u8 length; 3142 u8 ssid[WLAN_SSID_MAX_LEN]; 3143 }; 3144 3145 #define WMI_IE_BITMAP_SIZE 8 3146 3147 /* prefix used by scan requestor ids on the host */ 3148 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 3149 3150 /* prefix used by scan request ids generated on the host */ 3151 /* host cycles through the lower 12 bits to generate ids */ 3152 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 3153 3154 /* Values lower than this may be refused by some firmware revisions with a scan 3155 * completion with a timedout reason. 3156 */ 3157 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 3158 3159 /* Scan priority numbers must be sequential, starting with 0 */ 3160 enum wmi_scan_priority { 3161 WMI_SCAN_PRIORITY_VERY_LOW = 0, 3162 WMI_SCAN_PRIORITY_LOW, 3163 WMI_SCAN_PRIORITY_MEDIUM, 3164 WMI_SCAN_PRIORITY_HIGH, 3165 WMI_SCAN_PRIORITY_VERY_HIGH, 3166 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 3167 }; 3168 3169 enum wmi_scan_event_type { 3170 WMI_SCAN_EVENT_STARTED = BIT(0), 3171 WMI_SCAN_EVENT_COMPLETED = BIT(1), 3172 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 3173 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3), 3174 WMI_SCAN_EVENT_DEQUEUED = BIT(4), 3175 /* possibly by high-prio scan */ 3176 WMI_SCAN_EVENT_PREEMPTED = BIT(5), 3177 WMI_SCAN_EVENT_START_FAILED = BIT(6), 3178 WMI_SCAN_EVENT_RESTARTED = BIT(7), 3179 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8), 3180 WMI_SCAN_EVENT_SUSPENDED = BIT(9), 3181 WMI_SCAN_EVENT_RESUMED = BIT(10), 3182 WMI_SCAN_EVENT_MAX = BIT(15), 3183 }; 3184 3185 enum wmi_scan_completion_reason { 3186 WMI_SCAN_REASON_COMPLETED, 3187 WMI_SCAN_REASON_CANCELLED, 3188 WMI_SCAN_REASON_PREEMPTED, 3189 WMI_SCAN_REASON_TIMEDOUT, 3190 WMI_SCAN_REASON_INTERNAL_FAILURE, 3191 WMI_SCAN_REASON_MAX, 3192 }; 3193 3194 struct wmi_start_scan_cmd { 3195 u32 tlv_header; 3196 u32 scan_id; 3197 u32 scan_req_id; 3198 u32 vdev_id; 3199 u32 scan_priority; 3200 u32 notify_scan_events; 3201 u32 dwell_time_active; 3202 u32 dwell_time_passive; 3203 u32 min_rest_time; 3204 u32 max_rest_time; 3205 u32 repeat_probe_time; 3206 u32 probe_spacing_time; 3207 u32 idle_time; 3208 u32 max_scan_time; 3209 u32 probe_delay; 3210 u32 scan_ctrl_flags; 3211 u32 burst_duration; 3212 u32 num_chan; 3213 u32 num_bssid; 3214 u32 num_ssids; 3215 u32 ie_len; 3216 u32 n_probes; 3217 struct wmi_mac_addr mac_addr; 3218 struct wmi_mac_addr mac_mask; 3219 u32 ie_bitmap[WMI_IE_BITMAP_SIZE]; 3220 u32 num_vendor_oui; 3221 u32 scan_ctrl_flags_ext; 3222 u32 dwell_time_active_2g; 3223 u32 dwell_time_active_6g; 3224 u32 dwell_time_passive_6g; 3225 u32 scan_start_offset; 3226 } __packed; 3227 3228 #define WMI_SCAN_FLAG_PASSIVE 0x1 3229 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 3230 #define WMI_SCAN_ADD_CCK_RATES 0x4 3231 #define WMI_SCAN_ADD_OFDM_RATES 0x8 3232 #define WMI_SCAN_CHAN_STAT_EVENT 0x10 3233 #define WMI_SCAN_FILTER_PROBE_REQ 0x20 3234 #define WMI_SCAN_BYPASS_DFS_CHN 0x40 3235 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 3236 #define WMI_SCAN_FILTER_PROMISCUOS 0x100 3237 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200 3238 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400 3239 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800 3240 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000 3241 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000 3242 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000 3243 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000 3244 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000 3245 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000 3246 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 3247 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 3248 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 3249 3250 #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000 3251 #define WMI_SCAN_DWELL_MODE_SHIFT 21 3252 #define WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE 0x00000800 3253 3254 #define WMI_SCAN_CONFIG_PER_CHANNEL_MASK GENMASK(19, 0) 3255 #define WMI_SCAN_CH_FLAG_SCAN_ONLY_IF_RNR_FOUND BIT(20) 3256 3257 enum { 3258 WMI_SCAN_DWELL_MODE_DEFAULT = 0, 3259 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1, 3260 WMI_SCAN_DWELL_MODE_MODERATE = 2, 3261 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3, 3262 WMI_SCAN_DWELL_MODE_STATIC = 4, 3263 }; 3264 3265 #define WMI_SCAN_SET_DWELL_MODE(flag, mode) \ 3266 ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \ 3267 WMI_SCAN_DWELL_MODE_MASK)) 3268 3269 struct hint_short_ssid { 3270 u32 freq_flags; 3271 u32 short_ssid; 3272 }; 3273 3274 struct hint_bssid { 3275 u32 freq_flags; 3276 struct wmi_mac_addr bssid; 3277 }; 3278 3279 struct scan_req_params { 3280 u32 scan_id; 3281 u32 scan_req_id; 3282 u32 vdev_id; 3283 u32 pdev_id; 3284 enum wmi_scan_priority scan_priority; 3285 union { 3286 struct { 3287 u32 scan_ev_started:1, 3288 scan_ev_completed:1, 3289 scan_ev_bss_chan:1, 3290 scan_ev_foreign_chan:1, 3291 scan_ev_dequeued:1, 3292 scan_ev_preempted:1, 3293 scan_ev_start_failed:1, 3294 scan_ev_restarted:1, 3295 scan_ev_foreign_chn_exit:1, 3296 scan_ev_invalid:1, 3297 scan_ev_gpio_timeout:1, 3298 scan_ev_suspended:1, 3299 scan_ev_resumed:1; 3300 }; 3301 u32 scan_events; 3302 }; 3303 u32 scan_ctrl_flags_ext; 3304 u32 dwell_time_active; 3305 u32 dwell_time_active_2g; 3306 u32 dwell_time_passive; 3307 u32 dwell_time_active_6g; 3308 u32 dwell_time_passive_6g; 3309 u32 min_rest_time; 3310 u32 max_rest_time; 3311 u32 repeat_probe_time; 3312 u32 probe_spacing_time; 3313 u32 idle_time; 3314 u32 max_scan_time; 3315 u32 probe_delay; 3316 union { 3317 struct { 3318 u32 scan_f_passive:1, 3319 scan_f_bcast_probe:1, 3320 scan_f_cck_rates:1, 3321 scan_f_ofdm_rates:1, 3322 scan_f_chan_stat_evnt:1, 3323 scan_f_filter_prb_req:1, 3324 scan_f_bypass_dfs_chn:1, 3325 scan_f_continue_on_err:1, 3326 scan_f_offchan_mgmt_tx:1, 3327 scan_f_offchan_data_tx:1, 3328 scan_f_promisc_mode:1, 3329 scan_f_capture_phy_err:1, 3330 scan_f_strict_passive_pch:1, 3331 scan_f_half_rate:1, 3332 scan_f_quarter_rate:1, 3333 scan_f_force_active_dfs_chn:1, 3334 scan_f_add_tpc_ie_in_probe:1, 3335 scan_f_add_ds_ie_in_probe:1, 3336 scan_f_add_spoofed_mac_in_probe:1, 3337 scan_f_add_rand_seq_in_probe:1, 3338 scan_f_en_ie_whitelist_in_probe:1, 3339 scan_f_forced:1, 3340 scan_f_2ghz:1, 3341 scan_f_5ghz:1, 3342 scan_f_80mhz:1; 3343 }; 3344 u32 scan_flags; 3345 }; 3346 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode; 3347 u32 burst_duration; 3348 u32 num_chan; 3349 u32 num_bssid; 3350 u32 num_ssids; 3351 u32 n_probes; 3352 u32 *chan_list; 3353 u32 notify_scan_events; 3354 struct wlan_ssid ssid[WLAN_SCAN_PARAMS_MAX_SSID]; 3355 struct wmi_mac_addr bssid_list[WLAN_SCAN_PARAMS_MAX_BSSID]; 3356 struct element_info extraie; 3357 struct element_info htcap; 3358 struct element_info vhtcap; 3359 u32 num_hint_s_ssid; 3360 u32 num_hint_bssid; 3361 struct hint_short_ssid hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID]; 3362 struct hint_bssid hint_bssid[WLAN_SCAN_MAX_HINT_BSSID]; 3363 struct wmi_mac_addr mac_addr; 3364 struct wmi_mac_addr mac_mask; 3365 }; 3366 3367 struct wmi_ssid_arg { 3368 int len; 3369 const u8 *ssid; 3370 }; 3371 3372 struct wmi_bssid_arg { 3373 const u8 *bssid; 3374 }; 3375 3376 struct wmi_start_scan_arg { 3377 u32 scan_id; 3378 u32 scan_req_id; 3379 u32 vdev_id; 3380 u32 scan_priority; 3381 u32 notify_scan_events; 3382 u32 dwell_time_active; 3383 u32 dwell_time_passive; 3384 u32 min_rest_time; 3385 u32 max_rest_time; 3386 u32 repeat_probe_time; 3387 u32 probe_spacing_time; 3388 u32 idle_time; 3389 u32 max_scan_time; 3390 u32 probe_delay; 3391 u32 scan_ctrl_flags; 3392 3393 u32 ie_len; 3394 u32 n_channels; 3395 u32 n_ssids; 3396 u32 n_bssids; 3397 3398 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN]; 3399 u32 channels[64]; 3400 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID]; 3401 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID]; 3402 }; 3403 3404 #define WMI_SCAN_STOP_ONE 0x00000000 3405 #define WMI_SCN_STOP_VAP_ALL 0x01000000 3406 #define WMI_SCAN_STOP_ALL 0x04000000 3407 3408 /* Prefix 0xA000 indicates that the scan request 3409 * is trigger by HOST 3410 */ 3411 #define ATH11K_SCAN_ID 0xA000 3412 3413 enum scan_cancel_req_type { 3414 WLAN_SCAN_CANCEL_SINGLE = 1, 3415 WLAN_SCAN_CANCEL_VDEV_ALL, 3416 WLAN_SCAN_CANCEL_PDEV_ALL, 3417 }; 3418 3419 struct scan_cancel_param { 3420 u32 requester; 3421 u32 scan_id; 3422 enum scan_cancel_req_type req_type; 3423 u32 vdev_id; 3424 u32 pdev_id; 3425 }; 3426 3427 struct wmi_bcn_send_from_host_cmd { 3428 u32 tlv_header; 3429 u32 vdev_id; 3430 u32 data_len; 3431 union { 3432 u32 frag_ptr; 3433 u32 frag_ptr_lo; 3434 }; 3435 u32 frame_ctrl; 3436 u32 dtim_flag; 3437 u32 bcn_antenna; 3438 u32 frag_ptr_hi; 3439 }; 3440 3441 #define WMI_CHAN_INFO_MODE GENMASK(5, 0) 3442 #define WMI_CHAN_INFO_HT40_PLUS BIT(6) 3443 #define WMI_CHAN_INFO_PASSIVE BIT(7) 3444 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8) 3445 #define WMI_CHAN_INFO_AP_DISABLED BIT(9) 3446 #define WMI_CHAN_INFO_DFS BIT(10) 3447 #define WMI_CHAN_INFO_ALLOW_HT BIT(11) 3448 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12) 3449 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13) 3450 #define WMI_CHAN_INFO_HALF_RATE BIT(14) 3451 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15) 3452 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) 3453 #define WMI_CHAN_INFO_ALLOW_HE BIT(17) 3454 #define WMI_CHAN_INFO_PSC BIT(18) 3455 3456 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) 3457 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) 3458 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16) 3459 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24) 3460 3461 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0) 3462 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8) 3463 3464 struct wmi_channel { 3465 u32 tlv_header; 3466 u32 mhz; 3467 u32 band_center_freq1; 3468 u32 band_center_freq2; 3469 u32 info; 3470 u32 reg_info_1; 3471 u32 reg_info_2; 3472 } __packed; 3473 3474 struct wmi_mgmt_params { 3475 void *tx_frame; 3476 u16 frm_len; 3477 u8 vdev_id; 3478 u16 chanfreq; 3479 void *pdata; 3480 u16 desc_id; 3481 u8 *macaddr; 3482 }; 3483 3484 enum wmi_sta_ps_mode { 3485 WMI_STA_PS_MODE_DISABLED = 0, 3486 WMI_STA_PS_MODE_ENABLED = 1, 3487 }; 3488 3489 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF 3490 #define WMI_SMPS_MASK_UPPER_3BITS 0x7 3491 #define WMI_SMPS_PARAM_VALUE_SHIFT 29 3492 3493 #define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1 3494 #define ATH11K_WMI_FW_HANG_DELAY 0 3495 3496 /* type, 0:unused 1: ASSERT 2: not respond detect command 3497 * delay_time_ms, the simulate will delay time 3498 */ 3499 3500 struct wmi_force_fw_hang_cmd { 3501 u32 tlv_header; 3502 u32 type; 3503 u32 delay_time_ms; 3504 }; 3505 3506 struct wmi_vdev_set_param_cmd { 3507 u32 tlv_header; 3508 u32 vdev_id; 3509 u32 param_id; 3510 u32 param_value; 3511 } __packed; 3512 3513 enum wmi_stats_id { 3514 WMI_REQUEST_PEER_STAT = BIT(0), 3515 WMI_REQUEST_AP_STAT = BIT(1), 3516 WMI_REQUEST_PDEV_STAT = BIT(2), 3517 WMI_REQUEST_VDEV_STAT = BIT(3), 3518 WMI_REQUEST_BCNFLT_STAT = BIT(4), 3519 WMI_REQUEST_VDEV_RATE_STAT = BIT(5), 3520 WMI_REQUEST_INST_STAT = BIT(6), 3521 WMI_REQUEST_MIB_STAT = BIT(7), 3522 WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8), 3523 WMI_REQUEST_CONGESTION_STAT = BIT(9), 3524 WMI_REQUEST_PEER_EXTD_STAT = BIT(10), 3525 WMI_REQUEST_BCN_STAT = BIT(11), 3526 WMI_REQUEST_BCN_STAT_RESET = BIT(12), 3527 WMI_REQUEST_PEER_EXTD2_STAT = BIT(13), 3528 }; 3529 3530 struct wmi_request_stats_cmd { 3531 u32 tlv_header; 3532 enum wmi_stats_id stats_id; 3533 u32 vdev_id; 3534 struct wmi_mac_addr peer_macaddr; 3535 u32 pdev_id; 3536 } __packed; 3537 3538 struct wmi_get_pdev_temperature_cmd { 3539 u32 tlv_header; 3540 u32 param; 3541 u32 pdev_id; 3542 } __packed; 3543 3544 #define WMI_BEACON_TX_BUFFER_SIZE 512 3545 3546 struct wmi_bcn_tmpl_cmd { 3547 u32 tlv_header; 3548 u32 vdev_id; 3549 u32 tim_ie_offset; 3550 u32 buf_len; 3551 u32 csa_switch_count_offset; 3552 u32 ext_csa_switch_count_offset; 3553 u32 csa_event_bitmap; 3554 u32 mbssid_ie_offset; 3555 u32 esp_ie_offset; 3556 } __packed; 3557 3558 struct wmi_key_seq_counter { 3559 u32 key_seq_counter_l; 3560 u32 key_seq_counter_h; 3561 } __packed; 3562 3563 struct wmi_vdev_install_key_cmd { 3564 u32 tlv_header; 3565 u32 vdev_id; 3566 struct wmi_mac_addr peer_macaddr; 3567 u32 key_idx; 3568 u32 key_flags; 3569 u32 key_cipher; 3570 struct wmi_key_seq_counter key_rsc_counter; 3571 struct wmi_key_seq_counter key_global_rsc_counter; 3572 struct wmi_key_seq_counter key_tsc_counter; 3573 u8 wpi_key_rsc_counter[16]; 3574 u8 wpi_key_tsc_counter[16]; 3575 u32 key_len; 3576 u32 key_txmic_len; 3577 u32 key_rxmic_len; 3578 u32 is_group_key_id_valid; 3579 u32 group_key_id; 3580 3581 /* Followed by key_data containing key followed by 3582 * tx mic and then rx mic 3583 */ 3584 } __packed; 3585 3586 struct wmi_vdev_install_key_arg { 3587 u32 vdev_id; 3588 const u8 *macaddr; 3589 u32 key_idx; 3590 u32 key_flags; 3591 u32 key_cipher; 3592 u32 key_len; 3593 u32 key_txmic_len; 3594 u32 key_rxmic_len; 3595 u64 key_rsc_counter; 3596 const void *key_data; 3597 }; 3598 3599 #define WMI_MAX_SUPPORTED_RATES 128 3600 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3 3601 #define WMI_HOST_MAX_HE_RATE_SET 3 3602 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0 3603 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1 3604 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2 3605 3606 struct wmi_rate_set_arg { 3607 u32 num_rates; 3608 u8 rates[WMI_MAX_SUPPORTED_RATES]; 3609 }; 3610 3611 struct peer_assoc_params { 3612 struct wmi_mac_addr peer_macaddr; 3613 u32 vdev_id; 3614 u32 peer_new_assoc; 3615 u32 peer_associd; 3616 u32 peer_flags; 3617 u32 peer_caps; 3618 u32 peer_listen_intval; 3619 u32 peer_ht_caps; 3620 u32 peer_max_mpdu; 3621 u32 peer_mpdu_density; 3622 u32 peer_rate_caps; 3623 u32 peer_nss; 3624 u32 peer_vht_caps; 3625 u32 peer_phymode; 3626 u32 peer_ht_info[2]; 3627 struct wmi_rate_set_arg peer_legacy_rates; 3628 struct wmi_rate_set_arg peer_ht_rates; 3629 u32 rx_max_rate; 3630 u32 rx_mcs_set; 3631 u32 tx_max_rate; 3632 u32 tx_mcs_set; 3633 u8 vht_capable; 3634 u8 min_data_rate; 3635 u32 tx_max_mcs_nss; 3636 u32 peer_bw_rxnss_override; 3637 bool is_pmf_enabled; 3638 bool is_wme_set; 3639 bool qos_flag; 3640 bool apsd_flag; 3641 bool ht_flag; 3642 bool bw_40; 3643 bool bw_80; 3644 bool bw_160; 3645 bool stbc_flag; 3646 bool ldpc_flag; 3647 bool static_mimops_flag; 3648 bool dynamic_mimops_flag; 3649 bool spatial_mux_flag; 3650 bool vht_flag; 3651 bool vht_ng_flag; 3652 bool need_ptk_4_way; 3653 bool need_gtk_2_way; 3654 bool auth_flag; 3655 bool safe_mode_enabled; 3656 bool amsdu_disable; 3657 /* Use common structure */ 3658 u8 peer_mac[ETH_ALEN]; 3659 3660 bool he_flag; 3661 u32 peer_he_cap_macinfo[2]; 3662 u32 peer_he_cap_macinfo_internal; 3663 u32 peer_he_caps_6ghz; 3664 u32 peer_he_ops; 3665 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; 3666 u32 peer_he_mcs_count; 3667 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3668 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3669 bool twt_responder; 3670 bool twt_requester; 3671 bool is_assoc; 3672 struct ath11k_ppe_threshold peer_ppet; 3673 }; 3674 3675 struct wmi_peer_assoc_complete_cmd { 3676 u32 tlv_header; 3677 struct wmi_mac_addr peer_macaddr; 3678 u32 vdev_id; 3679 u32 peer_new_assoc; 3680 u32 peer_associd; 3681 u32 peer_flags; 3682 u32 peer_caps; 3683 u32 peer_listen_intval; 3684 u32 peer_ht_caps; 3685 u32 peer_max_mpdu; 3686 u32 peer_mpdu_density; 3687 u32 peer_rate_caps; 3688 u32 peer_nss; 3689 u32 peer_vht_caps; 3690 u32 peer_phymode; 3691 u32 peer_ht_info[2]; 3692 u32 num_peer_legacy_rates; 3693 u32 num_peer_ht_rates; 3694 u32 peer_bw_rxnss_override; 3695 struct wmi_ppe_threshold peer_ppet; 3696 u32 peer_he_cap_info; 3697 u32 peer_he_ops; 3698 u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE]; 3699 u32 peer_he_mcs; 3700 u32 peer_he_cap_info_ext; 3701 u32 peer_he_cap_info_internal; 3702 u32 min_data_rate; 3703 u32 peer_he_caps_6ghz; 3704 } __packed; 3705 3706 struct wmi_stop_scan_cmd { 3707 u32 tlv_header; 3708 u32 requestor; 3709 u32 scan_id; 3710 u32 req_type; 3711 u32 vdev_id; 3712 u32 pdev_id; 3713 }; 3714 3715 struct scan_chan_list_params { 3716 u32 pdev_id; 3717 u16 nallchans; 3718 struct channel_param ch_param[]; 3719 }; 3720 3721 struct wmi_scan_chan_list_cmd { 3722 u32 tlv_header; 3723 u32 num_scan_chans; 3724 u32 flags; 3725 u32 pdev_id; 3726 } __packed; 3727 3728 struct wmi_scan_prob_req_oui_cmd { 3729 u32 tlv_header; 3730 u32 prob_req_oui; 3731 } __packed; 3732 3733 #define WMI_MGMT_SEND_DOWNLD_LEN 64 3734 3735 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0) 3736 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8) 3737 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20) 3738 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28) 3739 3740 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0) 3741 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8) 3742 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15) 3743 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20) 3744 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21) 3745 3746 struct wmi_mgmt_send_params { 3747 u32 tlv_header; 3748 u32 tx_params_dword0; 3749 u32 tx_params_dword1; 3750 }; 3751 3752 struct wmi_mgmt_send_cmd { 3753 u32 tlv_header; 3754 u32 vdev_id; 3755 u32 desc_id; 3756 u32 chanfreq; 3757 u32 paddr_lo; 3758 u32 paddr_hi; 3759 u32 frame_len; 3760 u32 buf_len; 3761 u32 tx_params_valid; 3762 3763 /* This TLV is followed by struct wmi_mgmt_frame */ 3764 3765 /* Followed by struct wmi_mgmt_send_params */ 3766 } __packed; 3767 3768 struct wmi_sta_powersave_mode_cmd { 3769 u32 tlv_header; 3770 u32 vdev_id; 3771 u32 sta_ps_mode; 3772 }; 3773 3774 struct wmi_sta_smps_force_mode_cmd { 3775 u32 tlv_header; 3776 u32 vdev_id; 3777 u32 forced_mode; 3778 }; 3779 3780 struct wmi_sta_smps_param_cmd { 3781 u32 tlv_header; 3782 u32 vdev_id; 3783 u32 param; 3784 u32 value; 3785 }; 3786 3787 struct wmi_bcn_prb_info { 3788 u32 tlv_header; 3789 u32 caps; 3790 u32 erp; 3791 } __packed; 3792 3793 enum { 3794 WMI_PDEV_SUSPEND, 3795 WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 3796 }; 3797 3798 struct green_ap_ps_params { 3799 u32 value; 3800 }; 3801 3802 struct wmi_pdev_green_ap_ps_enable_cmd_param { 3803 u32 tlv_header; 3804 u32 pdev_id; 3805 u32 enable; 3806 }; 3807 3808 struct ap_ps_params { 3809 u32 vdev_id; 3810 u32 param; 3811 u32 value; 3812 }; 3813 3814 struct vdev_set_params { 3815 u32 if_id; 3816 u32 param_id; 3817 u32 param_value; 3818 }; 3819 3820 struct stats_request_params { 3821 u32 stats_id; 3822 u32 vdev_id; 3823 u32 pdev_id; 3824 }; 3825 3826 struct wmi_set_current_country_params { 3827 u8 alpha2[3]; 3828 }; 3829 3830 struct wmi_set_current_country_cmd { 3831 u32 tlv_header; 3832 u32 pdev_id; 3833 u32 new_alpha2; 3834 } __packed; 3835 3836 enum set_init_cc_type { 3837 WMI_COUNTRY_INFO_TYPE_ALPHA, 3838 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE, 3839 WMI_COUNTRY_INFO_TYPE_REGDOMAIN, 3840 }; 3841 3842 enum set_init_cc_flags { 3843 INVALID_CC, 3844 CC_IS_SET, 3845 REGDMN_IS_SET, 3846 ALPHA_IS_SET, 3847 }; 3848 3849 struct wmi_init_country_params { 3850 union { 3851 u16 country_code; 3852 u16 regdom_id; 3853 u8 alpha2[3]; 3854 } cc_info; 3855 enum set_init_cc_flags flags; 3856 }; 3857 3858 struct wmi_init_country_cmd { 3859 u32 tlv_header; 3860 u32 pdev_id; 3861 u32 init_cc_type; 3862 union { 3863 u32 country_code; 3864 u32 regdom_id; 3865 u32 alpha2; 3866 } cc_info; 3867 } __packed; 3868 3869 struct wmi_11d_scan_start_params { 3870 u32 vdev_id; 3871 u32 scan_period_msec; 3872 u32 start_interval_msec; 3873 }; 3874 3875 struct wmi_11d_scan_start_cmd { 3876 u32 tlv_header; 3877 u32 vdev_id; 3878 u32 scan_period_msec; 3879 u32 start_interval_msec; 3880 } __packed; 3881 3882 struct wmi_11d_scan_stop_cmd { 3883 u32 tlv_header; 3884 u32 vdev_id; 3885 } __packed; 3886 3887 struct wmi_11d_new_cc_ev { 3888 u32 new_alpha2; 3889 } __packed; 3890 3891 #define THERMAL_LEVELS 1 3892 struct tt_level_config { 3893 u32 tmplwm; 3894 u32 tmphwm; 3895 u32 dcoffpercent; 3896 u32 priority; 3897 }; 3898 3899 struct thermal_mitigation_params { 3900 u32 pdev_id; 3901 u32 enable; 3902 u32 dc; 3903 u32 dc_per_event; 3904 struct tt_level_config levelconf[THERMAL_LEVELS]; 3905 }; 3906 3907 struct wmi_therm_throt_config_request_cmd { 3908 u32 tlv_header; 3909 u32 pdev_id; 3910 u32 enable; 3911 u32 dc; 3912 u32 dc_per_event; 3913 u32 therm_throt_levels; 3914 } __packed; 3915 3916 struct wmi_therm_throt_level_config_info { 3917 u32 tlv_header; 3918 u32 temp_lwm; 3919 u32 temp_hwm; 3920 u32 dc_off_percent; 3921 u32 prio; 3922 } __packed; 3923 3924 struct wmi_delba_send_cmd { 3925 u32 tlv_header; 3926 u32 vdev_id; 3927 struct wmi_mac_addr peer_macaddr; 3928 u32 tid; 3929 u32 initiator; 3930 u32 reasoncode; 3931 } __packed; 3932 3933 struct wmi_addba_setresponse_cmd { 3934 u32 tlv_header; 3935 u32 vdev_id; 3936 struct wmi_mac_addr peer_macaddr; 3937 u32 tid; 3938 u32 statuscode; 3939 } __packed; 3940 3941 struct wmi_addba_send_cmd { 3942 u32 tlv_header; 3943 u32 vdev_id; 3944 struct wmi_mac_addr peer_macaddr; 3945 u32 tid; 3946 u32 buffersize; 3947 } __packed; 3948 3949 struct wmi_addba_clear_resp_cmd { 3950 u32 tlv_header; 3951 u32 vdev_id; 3952 struct wmi_mac_addr peer_macaddr; 3953 } __packed; 3954 3955 struct wmi_pdev_pktlog_filter_info { 3956 u32 tlv_header; 3957 struct wmi_mac_addr peer_macaddr; 3958 } __packed; 3959 3960 struct wmi_pdev_pktlog_filter_cmd { 3961 u32 tlv_header; 3962 u32 pdev_id; 3963 u32 enable; 3964 u32 filter_type; 3965 u32 num_mac; 3966 } __packed; 3967 3968 enum ath11k_wmi_pktlog_enable { 3969 ATH11K_WMI_PKTLOG_ENABLE_AUTO = 0, 3970 ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1, 3971 }; 3972 3973 struct wmi_pktlog_enable_cmd { 3974 u32 tlv_header; 3975 u32 pdev_id; 3976 u32 evlist; /* WMI_PKTLOG_EVENT */ 3977 u32 enable; 3978 } __packed; 3979 3980 struct wmi_pktlog_disable_cmd { 3981 u32 tlv_header; 3982 u32 pdev_id; 3983 } __packed; 3984 3985 #define DFS_PHYERR_UNIT_TEST_CMD 0 3986 #define DFS_UNIT_TEST_MODULE 0x2b 3987 #define DFS_UNIT_TEST_TOKEN 0xAA 3988 3989 enum dfs_test_args_idx { 3990 DFS_TEST_CMDID = 0, 3991 DFS_TEST_PDEV_ID, 3992 DFS_TEST_RADAR_PARAM, 3993 DFS_MAX_TEST_ARGS, 3994 }; 3995 3996 struct wmi_dfs_unit_test_arg { 3997 u32 cmd_id; 3998 u32 pdev_id; 3999 u32 radar_param; 4000 }; 4001 4002 struct wmi_unit_test_cmd { 4003 u32 tlv_header; 4004 u32 vdev_id; 4005 u32 module_id; 4006 u32 num_args; 4007 u32 diag_token; 4008 /* Followed by test args*/ 4009 } __packed; 4010 4011 #define MAX_SUPPORTED_RATES 128 4012 4013 #define WMI_PEER_AUTH 0x00000001 4014 #define WMI_PEER_QOS 0x00000002 4015 #define WMI_PEER_NEED_PTK_4_WAY 0x00000004 4016 #define WMI_PEER_NEED_GTK_2_WAY 0x00000010 4017 #define WMI_PEER_HE 0x00000400 4018 #define WMI_PEER_APSD 0x00000800 4019 #define WMI_PEER_HT 0x00001000 4020 #define WMI_PEER_40MHZ 0x00002000 4021 #define WMI_PEER_STBC 0x00008000 4022 #define WMI_PEER_LDPC 0x00010000 4023 #define WMI_PEER_DYN_MIMOPS 0x00020000 4024 #define WMI_PEER_STATIC_MIMOPS 0x00040000 4025 #define WMI_PEER_SPATIAL_MUX 0x00200000 4026 #define WMI_PEER_TWT_REQ 0x00400000 4027 #define WMI_PEER_TWT_RESP 0x00800000 4028 #define WMI_PEER_VHT 0x02000000 4029 #define WMI_PEER_80MHZ 0x04000000 4030 #define WMI_PEER_PMF 0x08000000 4031 /* TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000. 4032 * Need to be cleaned up 4033 */ 4034 #define WMI_PEER_IS_P2P_CAPABLE 0x20000000 4035 #define WMI_PEER_160MHZ 0x40000000 4036 #define WMI_PEER_SAFEMODE_EN 0x80000000 4037 4038 struct beacon_tmpl_params { 4039 u8 vdev_id; 4040 u32 tim_ie_offset; 4041 u32 tmpl_len; 4042 u32 tmpl_len_aligned; 4043 u32 csa_switch_count_offset; 4044 u32 ext_csa_switch_count_offset; 4045 u8 *frm; 4046 }; 4047 4048 struct wmi_rate_set { 4049 u32 num_rates; 4050 u32 rates[(MAX_SUPPORTED_RATES / 4) + 1]; 4051 }; 4052 4053 struct wmi_vht_rate_set { 4054 u32 tlv_header; 4055 u32 rx_max_rate; 4056 u32 rx_mcs_set; 4057 u32 tx_max_rate; 4058 u32 tx_mcs_set; 4059 u32 tx_max_mcs_nss; 4060 } __packed; 4061 4062 struct wmi_he_rate_set { 4063 u32 tlv_header; 4064 4065 /* MCS at which the peer can receive */ 4066 u32 rx_mcs_set; 4067 4068 /* MCS at which the peer can transmit */ 4069 u32 tx_mcs_set; 4070 } __packed; 4071 4072 #define MAX_REG_RULES 10 4073 #define REG_ALPHA2_LEN 2 4074 #define MAX_6GHZ_REG_RULES 5 4075 4076 enum wmi_start_event_param { 4077 WMI_VDEV_START_RESP_EVENT = 0, 4078 WMI_VDEV_RESTART_RESP_EVENT, 4079 }; 4080 4081 struct wmi_vdev_start_resp_event { 4082 u32 vdev_id; 4083 u32 requestor_id; 4084 enum wmi_start_event_param resp_type; 4085 u32 status; 4086 u32 chain_mask; 4087 u32 smps_mode; 4088 union { 4089 u32 mac_id; 4090 u32 pdev_id; 4091 }; 4092 u32 cfgd_tx_streams; 4093 u32 cfgd_rx_streams; 4094 } __packed; 4095 4096 /* VDEV start response status codes */ 4097 enum wmi_vdev_start_resp_status_code { 4098 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0, 4099 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1, 4100 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2, 4101 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3, 4102 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, 4103 }; 4104 4105 /* Regaulatory Rule Flags Passed by FW */ 4106 #define REGULATORY_CHAN_DISABLED BIT(0) 4107 #define REGULATORY_CHAN_NO_IR BIT(1) 4108 #define REGULATORY_CHAN_RADAR BIT(3) 4109 #define REGULATORY_CHAN_NO_OFDM BIT(6) 4110 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 4111 4112 #define REGULATORY_CHAN_NO_HT40 BIT(4) 4113 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 4114 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 4115 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 4116 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 4117 4118 enum wmi_reg_chan_list_cmd_type { 4119 WMI_REG_CHAN_LIST_CC_ID = 0, 4120 WMI_REG_CHAN_LIST_CC_EXT_ID = 1, 4121 }; 4122 4123 enum wmi_reg_cc_setting_code { 4124 WMI_REG_SET_CC_STATUS_PASS = 0, 4125 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1, 4126 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2, 4127 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 4128 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4, 4129 WMI_REG_SET_CC_STATUS_FAIL = 5, 4130 4131 /* add new setting code above, update in 4132 * @enum cc_setting_code as well. 4133 * Also handle it in ath11k_wmi_cc_setting_code_to_reg() 4134 */ 4135 }; 4136 4137 enum cc_setting_code { 4138 REG_SET_CC_STATUS_PASS = 0, 4139 REG_CURRENT_ALPHA2_NOT_FOUND = 1, 4140 REG_INIT_ALPHA2_NOT_FOUND = 2, 4141 REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 4142 REG_SET_CC_STATUS_NO_MEMORY = 4, 4143 REG_SET_CC_STATUS_FAIL = 5, 4144 4145 /* add new setting code above, update in 4146 * @enum wmi_reg_cc_setting_code as well. 4147 * Also handle it in ath11k_cc_status_to_str() 4148 */ 4149 }; 4150 4151 static inline enum cc_setting_code 4152 ath11k_wmi_cc_setting_code_to_reg(enum wmi_reg_cc_setting_code status_code) 4153 { 4154 switch (status_code) { 4155 case WMI_REG_SET_CC_STATUS_PASS: 4156 return REG_SET_CC_STATUS_PASS; 4157 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND: 4158 return REG_CURRENT_ALPHA2_NOT_FOUND; 4159 case WMI_REG_INIT_ALPHA2_NOT_FOUND: 4160 return REG_INIT_ALPHA2_NOT_FOUND; 4161 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED: 4162 return REG_SET_CC_CHANGE_NOT_ALLOWED; 4163 case WMI_REG_SET_CC_STATUS_NO_MEMORY: 4164 return REG_SET_CC_STATUS_NO_MEMORY; 4165 case WMI_REG_SET_CC_STATUS_FAIL: 4166 return REG_SET_CC_STATUS_FAIL; 4167 } 4168 4169 return REG_SET_CC_STATUS_FAIL; 4170 } 4171 4172 static inline const char *ath11k_cc_status_to_str(enum cc_setting_code code) 4173 { 4174 switch (code) { 4175 case REG_SET_CC_STATUS_PASS: 4176 return "REG_SET_CC_STATUS_PASS"; 4177 case REG_CURRENT_ALPHA2_NOT_FOUND: 4178 return "REG_CURRENT_ALPHA2_NOT_FOUND"; 4179 case REG_INIT_ALPHA2_NOT_FOUND: 4180 return "REG_INIT_ALPHA2_NOT_FOUND"; 4181 case REG_SET_CC_CHANGE_NOT_ALLOWED: 4182 return "REG_SET_CC_CHANGE_NOT_ALLOWED"; 4183 case REG_SET_CC_STATUS_NO_MEMORY: 4184 return "REG_SET_CC_STATUS_NO_MEMORY"; 4185 case REG_SET_CC_STATUS_FAIL: 4186 return "REG_SET_CC_STATUS_FAIL"; 4187 } 4188 4189 return "Unknown CC status"; 4190 } 4191 4192 enum wmi_reg_6ghz_ap_type { 4193 WMI_REG_INDOOR_AP = 0, 4194 WMI_REG_STANDARD_POWER_AP = 1, 4195 WMI_REG_VERY_LOW_POWER_AP = 2, 4196 4197 /* add AP type above, handle in ath11k_6ghz_ap_type_to_str() 4198 */ 4199 WMI_REG_CURRENT_MAX_AP_TYPE, 4200 WMI_REG_MAX_AP_TYPE = 7, 4201 }; 4202 4203 static inline const char * 4204 ath11k_6ghz_ap_type_to_str(enum wmi_reg_6ghz_ap_type type) 4205 { 4206 switch (type) { 4207 case WMI_REG_INDOOR_AP: 4208 return "INDOOR AP"; 4209 case WMI_REG_STANDARD_POWER_AP: 4210 return "STANDARD POWER AP"; 4211 case WMI_REG_VERY_LOW_POWER_AP: 4212 return "VERY LOW POWER AP"; 4213 case WMI_REG_CURRENT_MAX_AP_TYPE: 4214 return "CURRENT_MAX_AP_TYPE"; 4215 case WMI_REG_MAX_AP_TYPE: 4216 return "MAX_AP_TYPE"; 4217 } 4218 4219 return "unknown 6 GHz AP type"; 4220 } 4221 4222 enum wmi_reg_6ghz_client_type { 4223 WMI_REG_DEFAULT_CLIENT = 0, 4224 WMI_REG_SUBORDINATE_CLIENT = 1, 4225 WMI_REG_MAX_CLIENT_TYPE = 2, 4226 4227 /* add client type above, handle it in 4228 * ath11k_6ghz_client_type_to_str() 4229 */ 4230 }; 4231 4232 static inline const char * 4233 ath11k_6ghz_client_type_to_str(enum wmi_reg_6ghz_client_type type) 4234 { 4235 switch (type) { 4236 case WMI_REG_DEFAULT_CLIENT: 4237 return "DEFAULT CLIENT"; 4238 case WMI_REG_SUBORDINATE_CLIENT: 4239 return "SUBORDINATE CLIENT"; 4240 case WMI_REG_MAX_CLIENT_TYPE: 4241 return "MAX_CLIENT_TYPE"; 4242 } 4243 4244 return "unknown 6 GHz client type"; 4245 } 4246 4247 enum reg_subdomains_6ghz { 4248 EMPTY_6GHZ = 0x0, 4249 FCC1_CLIENT_LPI_REGULAR_6GHZ = 0x01, 4250 FCC1_CLIENT_SP_6GHZ = 0x02, 4251 FCC1_AP_LPI_6GHZ = 0x03, 4252 FCC1_CLIENT_LPI_SUBORDINATE = FCC1_AP_LPI_6GHZ, 4253 FCC1_AP_SP_6GHZ = 0x04, 4254 ETSI1_LPI_6GHZ = 0x10, 4255 ETSI1_VLP_6GHZ = 0x11, 4256 ETSI2_LPI_6GHZ = 0x12, 4257 ETSI2_VLP_6GHZ = 0x13, 4258 APL1_LPI_6GHZ = 0x20, 4259 APL1_VLP_6GHZ = 0x21, 4260 4261 /* add sub-domain above, handle it in 4262 * ath11k_sub_reg_6ghz_to_str() 4263 */ 4264 }; 4265 4266 static inline const char * 4267 ath11k_sub_reg_6ghz_to_str(enum reg_subdomains_6ghz sub_id) 4268 { 4269 switch (sub_id) { 4270 case EMPTY_6GHZ: 4271 return "N/A"; 4272 case FCC1_CLIENT_LPI_REGULAR_6GHZ: 4273 return "FCC1_CLIENT_LPI_REGULAR_6GHZ"; 4274 case FCC1_CLIENT_SP_6GHZ: 4275 return "FCC1_CLIENT_SP_6GHZ"; 4276 case FCC1_AP_LPI_6GHZ: 4277 return "FCC1_AP_LPI_6GHZ/FCC1_CLIENT_LPI_SUBORDINATE"; 4278 case FCC1_AP_SP_6GHZ: 4279 return "FCC1_AP_SP_6GHZ"; 4280 case ETSI1_LPI_6GHZ: 4281 return "ETSI1_LPI_6GHZ"; 4282 case ETSI1_VLP_6GHZ: 4283 return "ETSI1_VLP_6GHZ"; 4284 case ETSI2_LPI_6GHZ: 4285 return "ETSI2_LPI_6GHZ"; 4286 case ETSI2_VLP_6GHZ: 4287 return "ETSI2_VLP_6GHZ"; 4288 case APL1_LPI_6GHZ: 4289 return "APL1_LPI_6GHZ"; 4290 case APL1_VLP_6GHZ: 4291 return "APL1_VLP_6GHZ"; 4292 } 4293 4294 return "unknown sub reg id"; 4295 } 4296 4297 enum reg_super_domain_6ghz { 4298 FCC1_6GHZ = 0x01, 4299 ETSI1_6GHZ = 0x02, 4300 ETSI2_6GHZ = 0x03, 4301 APL1_6GHZ = 0x04, 4302 FCC1_6GHZ_CL = 0x05, 4303 4304 /* add super domain above, handle it in 4305 * ath11k_super_reg_6ghz_to_str() 4306 */ 4307 }; 4308 4309 static inline const char * 4310 ath11k_super_reg_6ghz_to_str(enum reg_super_domain_6ghz domain_id) 4311 { 4312 switch (domain_id) { 4313 case FCC1_6GHZ: 4314 return "FCC1_6GHZ"; 4315 case ETSI1_6GHZ: 4316 return "ETSI1_6GHZ"; 4317 case ETSI2_6GHZ: 4318 return "ETSI2_6GHZ"; 4319 case APL1_6GHZ: 4320 return "APL1_6GHZ"; 4321 case FCC1_6GHZ_CL: 4322 return "FCC1_6GHZ_CL"; 4323 } 4324 4325 return "unknown domain id"; 4326 } 4327 4328 struct cur_reg_rule { 4329 u16 start_freq; 4330 u16 end_freq; 4331 u16 max_bw; 4332 u8 reg_power; 4333 u8 ant_gain; 4334 u16 flags; 4335 bool psd_flag; 4336 s8 psd_eirp; 4337 }; 4338 4339 struct cur_regulatory_info { 4340 enum cc_setting_code status_code; 4341 u8 num_phy; 4342 u8 phy_id; 4343 u16 reg_dmn_pair; 4344 u16 ctry_code; 4345 u8 alpha2[REG_ALPHA2_LEN + 1]; 4346 u32 dfs_region; 4347 u32 phybitmap; 4348 u32 min_bw_2ghz; 4349 u32 max_bw_2ghz; 4350 u32 min_bw_5ghz; 4351 u32 max_bw_5ghz; 4352 u32 num_2ghz_reg_rules; 4353 u32 num_5ghz_reg_rules; 4354 struct cur_reg_rule *reg_rules_2ghz_ptr; 4355 struct cur_reg_rule *reg_rules_5ghz_ptr; 4356 bool is_ext_reg_event; 4357 enum wmi_reg_6ghz_client_type client_type; 4358 bool rnr_tpe_usable; 4359 bool unspecified_ap_usable; 4360 u8 domain_code_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4361 u8 domain_code_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4362 u32 domain_code_6ghz_super_id; 4363 u32 min_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4364 u32 max_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4365 u32 min_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4366 u32 max_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4367 u32 num_6ghz_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 4368 u32 num_6ghz_rules_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4369 struct cur_reg_rule *reg_rules_6ghz_ap_ptr[WMI_REG_CURRENT_MAX_AP_TYPE]; 4370 struct cur_reg_rule *reg_rules_6ghz_client_ptr 4371 [WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 4372 }; 4373 4374 struct wmi_reg_chan_list_cc_event { 4375 u32 status_code; 4376 u32 phy_id; 4377 u32 alpha2; 4378 u32 num_phy; 4379 u32 country_id; 4380 u32 domain_code; 4381 u32 dfs_region; 4382 u32 phybitmap; 4383 u32 min_bw_2ghz; 4384 u32 max_bw_2ghz; 4385 u32 min_bw_5ghz; 4386 u32 max_bw_5ghz; 4387 u32 num_2ghz_reg_rules; 4388 u32 num_5ghz_reg_rules; 4389 } __packed; 4390 4391 struct wmi_regulatory_rule_struct { 4392 u32 tlv_header; 4393 u32 freq_info; 4394 u32 bw_pwr_info; 4395 u32 flag_info; 4396 }; 4397 4398 #define WMI_REG_CLIENT_MAX 4 4399 4400 struct wmi_reg_chan_list_cc_ext_event { 4401 u32 status_code; 4402 u32 phy_id; 4403 u32 alpha2; 4404 u32 num_phy; 4405 u32 country_id; 4406 u32 domain_code; 4407 u32 dfs_region; 4408 u32 phybitmap; 4409 u32 min_bw_2ghz; 4410 u32 max_bw_2ghz; 4411 u32 min_bw_5ghz; 4412 u32 max_bw_5ghz; 4413 u32 num_2ghz_reg_rules; 4414 u32 num_5ghz_reg_rules; 4415 u32 client_type; 4416 u32 rnr_tpe_usable; 4417 u32 unspecified_ap_usable; 4418 u32 domain_code_6ghz_ap_lpi; 4419 u32 domain_code_6ghz_ap_sp; 4420 u32 domain_code_6ghz_ap_vlp; 4421 u32 domain_code_6ghz_client_lpi[WMI_REG_CLIENT_MAX]; 4422 u32 domain_code_6ghz_client_sp[WMI_REG_CLIENT_MAX]; 4423 u32 domain_code_6ghz_client_vlp[WMI_REG_CLIENT_MAX]; 4424 u32 domain_code_6ghz_super_id; 4425 u32 min_bw_6ghz_ap_sp; 4426 u32 max_bw_6ghz_ap_sp; 4427 u32 min_bw_6ghz_ap_lpi; 4428 u32 max_bw_6ghz_ap_lpi; 4429 u32 min_bw_6ghz_ap_vlp; 4430 u32 max_bw_6ghz_ap_vlp; 4431 u32 min_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX]; 4432 u32 max_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX]; 4433 u32 min_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX]; 4434 u32 max_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX]; 4435 u32 min_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX]; 4436 u32 max_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX]; 4437 u32 num_6ghz_reg_rules_ap_sp; 4438 u32 num_6ghz_reg_rules_ap_lpi; 4439 u32 num_6ghz_reg_rules_ap_vlp; 4440 u32 num_6ghz_reg_rules_client_sp[WMI_REG_CLIENT_MAX]; 4441 u32 num_6ghz_reg_rules_client_lpi[WMI_REG_CLIENT_MAX]; 4442 u32 num_6ghz_reg_rules_client_vlp[WMI_REG_CLIENT_MAX]; 4443 } __packed; 4444 4445 struct wmi_regulatory_ext_rule { 4446 u32 tlv_header; 4447 u32 freq_info; 4448 u32 bw_pwr_info; 4449 u32 flag_info; 4450 u32 psd_power_info; 4451 } __packed; 4452 4453 struct wmi_vdev_delete_resp_event { 4454 u32 vdev_id; 4455 } __packed; 4456 4457 struct wmi_peer_delete_resp_event { 4458 u32 vdev_id; 4459 struct wmi_mac_addr peer_macaddr; 4460 } __packed; 4461 4462 struct wmi_bcn_tx_status_event { 4463 u32 vdev_id; 4464 u32 tx_status; 4465 } __packed; 4466 4467 struct wmi_vdev_stopped_event { 4468 u32 vdev_id; 4469 } __packed; 4470 4471 struct wmi_pdev_bss_chan_info_event { 4472 u32 freq; /* Units in MHz */ 4473 u32 noise_floor; /* units are dBm */ 4474 /* rx clear - how often the channel was unused */ 4475 u32 rx_clear_count_low; 4476 u32 rx_clear_count_high; 4477 /* cycle count - elapsed time during measured period, in clock ticks */ 4478 u32 cycle_count_low; 4479 u32 cycle_count_high; 4480 /* tx cycle count - elapsed time spent in tx, in clock ticks */ 4481 u32 tx_cycle_count_low; 4482 u32 tx_cycle_count_high; 4483 /* rx cycle count - elapsed time spent in rx, in clock ticks */ 4484 u32 rx_cycle_count_low; 4485 u32 rx_cycle_count_high; 4486 /*rx_cycle cnt for my bss in 64bits format */ 4487 u32 rx_bss_cycle_count_low; 4488 u32 rx_bss_cycle_count_high; 4489 u32 pdev_id; 4490 } __packed; 4491 4492 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 4493 4494 struct wmi_vdev_install_key_compl_event { 4495 u32 vdev_id; 4496 struct wmi_mac_addr peer_macaddr; 4497 u32 key_idx; 4498 u32 key_flags; 4499 u32 status; 4500 } __packed; 4501 4502 struct wmi_vdev_install_key_complete_arg { 4503 u32 vdev_id; 4504 const u8 *macaddr; 4505 u32 key_idx; 4506 u32 key_flags; 4507 u32 status; 4508 }; 4509 4510 struct wmi_peer_assoc_conf_event { 4511 u32 vdev_id; 4512 struct wmi_mac_addr peer_macaddr; 4513 } __packed; 4514 4515 struct wmi_peer_assoc_conf_arg { 4516 u32 vdev_id; 4517 const u8 *macaddr; 4518 }; 4519 4520 struct wmi_fils_discovery_event { 4521 u32 vdev_id; 4522 u32 fils_tt; 4523 u32 tbtt; 4524 } __packed; 4525 4526 struct wmi_probe_resp_tx_status_event { 4527 u32 vdev_id; 4528 u32 tx_status; 4529 } __packed; 4530 4531 /* 4532 * PDEV statistics 4533 */ 4534 struct wmi_pdev_stats_base { 4535 s32 chan_nf; 4536 u32 tx_frame_count; /* Cycles spent transmitting frames */ 4537 u32 rx_frame_count; /* Cycles spent receiving frames */ 4538 u32 rx_clear_count; /* Total channel busy time, evidently */ 4539 u32 cycle_count; /* Total on-channel time */ 4540 u32 phy_err_count; 4541 u32 chan_tx_pwr; 4542 } __packed; 4543 4544 struct wmi_pdev_stats_extra { 4545 u32 ack_rx_bad; 4546 u32 rts_bad; 4547 u32 rts_good; 4548 u32 fcs_bad; 4549 u32 no_beacons; 4550 u32 mib_int_count; 4551 } __packed; 4552 4553 struct wmi_pdev_stats_tx { 4554 /* Num HTT cookies queued to dispatch list */ 4555 s32 comp_queued; 4556 4557 /* Num HTT cookies dispatched */ 4558 s32 comp_delivered; 4559 4560 /* Num MSDU queued to WAL */ 4561 s32 msdu_enqued; 4562 4563 /* Num MPDU queue to WAL */ 4564 s32 mpdu_enqued; 4565 4566 /* Num MSDUs dropped by WMM limit */ 4567 s32 wmm_drop; 4568 4569 /* Num Local frames queued */ 4570 s32 local_enqued; 4571 4572 /* Num Local frames done */ 4573 s32 local_freed; 4574 4575 /* Num queued to HW */ 4576 s32 hw_queued; 4577 4578 /* Num PPDU reaped from HW */ 4579 s32 hw_reaped; 4580 4581 /* Num underruns */ 4582 s32 underrun; 4583 4584 /* Num hw paused */ 4585 u32 hw_paused; 4586 4587 /* Num PPDUs cleaned up in TX abort */ 4588 s32 tx_abort; 4589 4590 /* Num MPDUs requeued by SW */ 4591 s32 mpdus_requeued; 4592 4593 /* excessive retries */ 4594 u32 tx_ko; 4595 4596 u32 tx_xretry; 4597 4598 /* data hw rate code */ 4599 u32 data_rc; 4600 4601 /* Scheduler self triggers */ 4602 u32 self_triggers; 4603 4604 /* frames dropped due to excessive sw retries */ 4605 u32 sw_retry_failure; 4606 4607 /* illegal rate phy errors */ 4608 u32 illgl_rate_phy_err; 4609 4610 /* wal pdev continuous xretry */ 4611 u32 pdev_cont_xretry; 4612 4613 /* wal pdev tx timeouts */ 4614 u32 pdev_tx_timeout; 4615 4616 /* wal pdev resets */ 4617 u32 pdev_resets; 4618 4619 /* frames dropped due to non-availability of stateless TIDs */ 4620 u32 stateless_tid_alloc_failure; 4621 4622 /* PhY/BB underrun */ 4623 u32 phy_underrun; 4624 4625 /* MPDU is more than txop limit */ 4626 u32 txop_ovf; 4627 4628 /* Num sequences posted */ 4629 u32 seq_posted; 4630 4631 /* Num sequences failed in queueing */ 4632 u32 seq_failed_queueing; 4633 4634 /* Num sequences completed */ 4635 u32 seq_completed; 4636 4637 /* Num sequences restarted */ 4638 u32 seq_restarted; 4639 4640 /* Num of MU sequences posted */ 4641 u32 mu_seq_posted; 4642 4643 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT 4644 * (Reset,channel change) 4645 */ 4646 s32 mpdus_sw_flush; 4647 4648 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 4649 s32 mpdus_hw_filter; 4650 4651 /* Num MPDUs truncated by PDG (TXOP, TBTT, 4652 * PPDU_duration based on rate, dyn_bw) 4653 */ 4654 s32 mpdus_truncated; 4655 4656 /* Num MPDUs that was tried but didn't receive ACK or BA */ 4657 s32 mpdus_ack_failed; 4658 4659 /* Num MPDUs that was dropped du to expiry. */ 4660 s32 mpdus_expired; 4661 } __packed; 4662 4663 struct wmi_pdev_stats_rx { 4664 /* Cnts any change in ring routing mid-ppdu */ 4665 s32 mid_ppdu_route_change; 4666 4667 /* Total number of statuses processed */ 4668 s32 status_rcvd; 4669 4670 /* Extra frags on rings 0-3 */ 4671 s32 r0_frags; 4672 s32 r1_frags; 4673 s32 r2_frags; 4674 s32 r3_frags; 4675 4676 /* MSDUs / MPDUs delivered to HTT */ 4677 s32 htt_msdus; 4678 s32 htt_mpdus; 4679 4680 /* MSDUs / MPDUs delivered to local stack */ 4681 s32 loc_msdus; 4682 s32 loc_mpdus; 4683 4684 /* AMSDUs that have more MSDUs than the status ring size */ 4685 s32 oversize_amsdu; 4686 4687 /* Number of PHY errors */ 4688 s32 phy_errs; 4689 4690 /* Number of PHY errors drops */ 4691 s32 phy_err_drop; 4692 4693 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 4694 s32 mpdu_errs; 4695 4696 /* Num overflow errors */ 4697 s32 rx_ovfl_errs; 4698 } __packed; 4699 4700 struct wmi_pdev_stats { 4701 struct wmi_pdev_stats_base base; 4702 struct wmi_pdev_stats_tx tx; 4703 struct wmi_pdev_stats_rx rx; 4704 } __packed; 4705 4706 #define WLAN_MAX_AC 4 4707 #define MAX_TX_RATE_VALUES 10 4708 #define MAX_TX_RATE_VALUES 10 4709 4710 struct wmi_vdev_stats { 4711 u32 vdev_id; 4712 u32 beacon_snr; 4713 u32 data_snr; 4714 u32 num_tx_frames[WLAN_MAX_AC]; 4715 u32 num_rx_frames; 4716 u32 num_tx_frames_retries[WLAN_MAX_AC]; 4717 u32 num_tx_frames_failures[WLAN_MAX_AC]; 4718 u32 num_rts_fail; 4719 u32 num_rts_success; 4720 u32 num_rx_err; 4721 u32 num_rx_discard; 4722 u32 num_tx_not_acked; 4723 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 4724 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 4725 } __packed; 4726 4727 struct wmi_bcn_stats { 4728 u32 vdev_id; 4729 u32 tx_bcn_succ_cnt; 4730 u32 tx_bcn_outage_cnt; 4731 } __packed; 4732 4733 struct wmi_stats_event { 4734 u32 stats_id; 4735 u32 num_pdev_stats; 4736 u32 num_vdev_stats; 4737 u32 num_peer_stats; 4738 u32 num_bcnflt_stats; 4739 u32 num_chan_stats; 4740 u32 num_mib_stats; 4741 u32 pdev_id; 4742 u32 num_bcn_stats; 4743 u32 num_peer_extd_stats; 4744 u32 num_peer_extd2_stats; 4745 } __packed; 4746 4747 struct wmi_rssi_stats { 4748 u32 vdev_id; 4749 u32 rssi_avg_beacon[WMI_MAX_CHAINS]; 4750 u32 rssi_avg_data[WMI_MAX_CHAINS]; 4751 struct wmi_mac_addr peer_macaddr; 4752 } __packed; 4753 4754 struct wmi_per_chain_rssi_stats { 4755 u32 num_per_chain_rssi_stats; 4756 } __packed; 4757 4758 struct wmi_pdev_ctl_failsafe_chk_event { 4759 u32 pdev_id; 4760 u32 ctl_failsafe_status; 4761 } __packed; 4762 4763 struct wmi_pdev_csa_switch_ev { 4764 u32 pdev_id; 4765 u32 current_switch_count; 4766 u32 num_vdevs; 4767 } __packed; 4768 4769 struct wmi_pdev_radar_ev { 4770 u32 pdev_id; 4771 u32 detection_mode; 4772 u32 chan_freq; 4773 u32 chan_width; 4774 u32 detector_id; 4775 u32 segment_id; 4776 u32 timestamp; 4777 u32 is_chirp; 4778 s32 freq_offset; 4779 s32 sidx; 4780 } __packed; 4781 4782 struct wmi_pdev_temperature_event { 4783 /* temperature value in Celsius degree */ 4784 s32 temp; 4785 u32 pdev_id; 4786 } __packed; 4787 4788 #define WMI_RX_STATUS_OK 0x00 4789 #define WMI_RX_STATUS_ERR_CRC 0x01 4790 #define WMI_RX_STATUS_ERR_DECRYPT 0x08 4791 #define WMI_RX_STATUS_ERR_MIC 0x10 4792 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 4793 4794 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 4795 4796 struct mgmt_rx_event_params { 4797 u32 chan_freq; 4798 u32 channel; 4799 u32 snr; 4800 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; 4801 u32 rate; 4802 enum wmi_phy_mode phy_mode; 4803 u32 buf_len; 4804 int status; 4805 u32 flags; 4806 int rssi; 4807 u32 tsf_delta; 4808 u8 pdev_id; 4809 }; 4810 4811 #define ATH_MAX_ANTENNA 4 4812 4813 struct wmi_mgmt_rx_hdr { 4814 u32 channel; 4815 u32 snr; 4816 u32 rate; 4817 u32 phy_mode; 4818 u32 buf_len; 4819 u32 status; 4820 u32 rssi_ctl[ATH_MAX_ANTENNA]; 4821 u32 flags; 4822 int rssi; 4823 u32 tsf_delta; 4824 u32 rx_tsf_l32; 4825 u32 rx_tsf_u32; 4826 u32 pdev_id; 4827 u32 chan_freq; 4828 } __packed; 4829 4830 #define MAX_ANTENNA_EIGHT 8 4831 4832 struct wmi_rssi_ctl_ext { 4833 u32 tlv_header; 4834 u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA]; 4835 }; 4836 4837 struct wmi_mgmt_tx_compl_event { 4838 u32 desc_id; 4839 u32 status; 4840 u32 pdev_id; 4841 u32 ppdu_id; 4842 u32 ack_rssi; 4843 } __packed; 4844 4845 struct wmi_scan_event { 4846 u32 event_type; /* %WMI_SCAN_EVENT_ */ 4847 u32 reason; /* %WMI_SCAN_REASON_ */ 4848 u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 4849 u32 scan_req_id; 4850 u32 scan_id; 4851 u32 vdev_id; 4852 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed 4853 * In case of AP it is TSF of the AP vdev 4854 * In case of STA connected state, this is the TSF of the AP 4855 * In case of STA not connected, it will be the free running HW timer 4856 */ 4857 u32 tsf_timestamp; 4858 } __packed; 4859 4860 struct wmi_peer_sta_kickout_arg { 4861 const u8 *mac_addr; 4862 }; 4863 4864 struct wmi_peer_sta_kickout_event { 4865 struct wmi_mac_addr peer_macaddr; 4866 } __packed; 4867 4868 enum wmi_roam_reason { 4869 WMI_ROAM_REASON_BETTER_AP = 1, 4870 WMI_ROAM_REASON_BEACON_MISS = 2, 4871 WMI_ROAM_REASON_LOW_RSSI = 3, 4872 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 4873 WMI_ROAM_REASON_HO_FAILED = 5, 4874 4875 /* keep last */ 4876 WMI_ROAM_REASON_MAX, 4877 }; 4878 4879 struct wmi_roam_event { 4880 u32 vdev_id; 4881 u32 reason; 4882 u32 rssi; 4883 } __packed; 4884 4885 #define WMI_CHAN_INFO_START_RESP 0 4886 #define WMI_CHAN_INFO_END_RESP 1 4887 4888 struct wmi_chan_info_event { 4889 u32 err_code; 4890 u32 freq; 4891 u32 cmd_flags; 4892 u32 noise_floor; 4893 u32 rx_clear_count; 4894 u32 cycle_count; 4895 u32 chan_tx_pwr_range; 4896 u32 chan_tx_pwr_tp; 4897 u32 rx_frame_count; 4898 u32 my_bss_rx_cycle_count; 4899 u32 rx_11b_mode_data_duration; 4900 u32 tx_frame_cnt; 4901 u32 mac_clk_mhz; 4902 u32 vdev_id; 4903 } __packed; 4904 4905 struct ath11k_targ_cap { 4906 u32 phy_capability; 4907 u32 max_frag_entry; 4908 u32 num_rf_chains; 4909 u32 ht_cap_info; 4910 u32 vht_cap_info; 4911 u32 vht_supp_mcs; 4912 u32 hw_min_tx_power; 4913 u32 hw_max_tx_power; 4914 u32 sys_cap_info; 4915 u32 min_pkt_size_enable; 4916 u32 max_bcn_ie_size; 4917 u32 max_num_scan_channels; 4918 u32 max_supported_macs; 4919 u32 wmi_fw_sub_feat_caps; 4920 u32 txrx_chainmask; 4921 u32 default_dbs_hw_mode_index; 4922 u32 num_msdu_desc; 4923 }; 4924 4925 enum wmi_vdev_type { 4926 WMI_VDEV_TYPE_AP = 1, 4927 WMI_VDEV_TYPE_STA = 2, 4928 WMI_VDEV_TYPE_IBSS = 3, 4929 WMI_VDEV_TYPE_MONITOR = 4, 4930 }; 4931 4932 enum wmi_vdev_subtype { 4933 WMI_VDEV_SUBTYPE_NONE, 4934 WMI_VDEV_SUBTYPE_P2P_DEVICE, 4935 WMI_VDEV_SUBTYPE_P2P_CLIENT, 4936 WMI_VDEV_SUBTYPE_P2P_GO, 4937 WMI_VDEV_SUBTYPE_PROXY_STA, 4938 WMI_VDEV_SUBTYPE_MESH_NON_11S, 4939 WMI_VDEV_SUBTYPE_MESH_11S, 4940 }; 4941 4942 enum wmi_sta_powersave_param { 4943 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 4944 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 4945 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 4946 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 4947 WMI_STA_PS_PARAM_UAPSD = 4, 4948 }; 4949 4950 #define WMI_UAPSD_AC_TYPE_DELI 0 4951 #define WMI_UAPSD_AC_TYPE_TRIG 1 4952 4953 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \ 4954 ((type == WMI_UAPSD_AC_TYPE_DELI) ? \ 4955 (1 << (ac << 1)) : (1 << ((ac << 1) + 1))) 4956 4957 enum wmi_sta_ps_param_uapsd { 4958 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4959 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4960 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4961 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4962 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4963 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4964 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4965 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4966 }; 4967 4968 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX 4969 4970 struct wmi_sta_uapsd_auto_trig_param { 4971 u32 wmm_ac; 4972 u32 user_priority; 4973 u32 service_interval; 4974 u32 suspend_interval; 4975 u32 delay_interval; 4976 }; 4977 4978 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param { 4979 u32 vdev_id; 4980 struct wmi_mac_addr peer_macaddr; 4981 u32 num_ac; 4982 }; 4983 4984 struct wmi_sta_uapsd_auto_trig_arg { 4985 u32 wmm_ac; 4986 u32 user_priority; 4987 u32 service_interval; 4988 u32 suspend_interval; 4989 u32 delay_interval; 4990 }; 4991 4992 enum wmi_sta_ps_param_tx_wake_threshold { 4993 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 4994 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 4995 4996 /* Values greater than one indicate that many TX attempts per beacon 4997 * interval before the STA will wake up 4998 */ 4999 }; 5000 5001 /* The maximum number of PS-Poll frames the FW will send in response to 5002 * traffic advertised in TIM before waking up (by sending a null frame with PS 5003 * = 0). Value 0 has a special meaning: there is no maximum count and the FW 5004 * will send as many PS-Poll as are necessary to retrieve buffered BU. This 5005 * parameter is used when the RX wake policy is 5006 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 5007 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 5008 */ 5009 enum wmi_sta_ps_param_pspoll_count { 5010 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 5011 /* Values greater than 0 indicate the maximum number of PS-Poll frames 5012 * FW will send before waking up. 5013 */ 5014 }; 5015 5016 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 5017 enum wmi_ap_ps_param_uapsd { 5018 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 5019 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 5020 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 5021 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 5022 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 5023 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 5024 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 5025 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 5026 }; 5027 5028 /* U-APSD maximum service period of peer station */ 5029 enum wmi_ap_ps_peer_param_max_sp { 5030 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 5031 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 5032 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 5033 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 5034 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 5035 }; 5036 5037 enum wmi_ap_ps_peer_param { 5038 /** Set uapsd configuration for a given peer. 5039 * 5040 * This include the delivery and trigger enabled state for each AC. 5041 * The host MLME needs to set this based on AP capability and stations 5042 * request Set in the association request received from the station. 5043 * 5044 * Lower 8 bits of the value specify the UAPSD configuration. 5045 * 5046 * (see enum wmi_ap_ps_param_uapsd) 5047 * The default value is 0. 5048 */ 5049 WMI_AP_PS_PEER_PARAM_UAPSD = 0, 5050 5051 /** 5052 * Set the service period for a UAPSD capable station 5053 * 5054 * The service period from wme ie in the (re)assoc request frame. 5055 * 5056 * (see enum wmi_ap_ps_peer_param_max_sp) 5057 */ 5058 WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 5059 5060 /** Time in seconds for aging out buffered frames 5061 * for STA in power save 5062 */ 5063 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 5064 5065 /** Specify frame types that are considered SIFS 5066 * RESP trigger frame 5067 */ 5068 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3, 5069 5070 /** Specifies the trigger state of TID. 5071 * Valid only for UAPSD frame type 5072 */ 5073 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4, 5074 5075 /* Specifies the WNM sleep state of a STA */ 5076 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5, 5077 }; 5078 5079 #define DISABLE_SIFS_RESPONSE_TRIGGER 0 5080 5081 #define WMI_MAX_KEY_INDEX 3 5082 #define WMI_MAX_KEY_LEN 32 5083 5084 #define WMI_KEY_PAIRWISE 0x00 5085 #define WMI_KEY_GROUP 0x01 5086 5087 #define WMI_CIPHER_NONE 0x0 /* clear key */ 5088 #define WMI_CIPHER_WEP 0x1 5089 #define WMI_CIPHER_TKIP 0x2 5090 #define WMI_CIPHER_AES_OCB 0x3 5091 #define WMI_CIPHER_AES_CCM 0x4 5092 #define WMI_CIPHER_WAPI 0x5 5093 #define WMI_CIPHER_CKIP 0x6 5094 #define WMI_CIPHER_AES_CMAC 0x7 5095 #define WMI_CIPHER_ANY 0x8 5096 #define WMI_CIPHER_AES_GCM 0x9 5097 #define WMI_CIPHER_AES_GMAC 0xa 5098 5099 /* Value to disable fixed rate setting */ 5100 #define WMI_FIXED_RATE_NONE (0xffff) 5101 5102 #define ATH11K_RC_VERSION_OFFSET 28 5103 #define ATH11K_RC_PREAMBLE_OFFSET 8 5104 #define ATH11K_RC_NSS_OFFSET 5 5105 5106 #define ATH11K_HW_RATE_CODE(rate, nss, preamble) \ 5107 ((1 << ATH11K_RC_VERSION_OFFSET) | \ 5108 ((nss) << ATH11K_RC_NSS_OFFSET) | \ 5109 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) | \ 5110 (rate)) 5111 5112 /* Preamble types to be used with VDEV fixed rate configuration */ 5113 enum wmi_rate_preamble { 5114 WMI_RATE_PREAMBLE_OFDM, 5115 WMI_RATE_PREAMBLE_CCK, 5116 WMI_RATE_PREAMBLE_HT, 5117 WMI_RATE_PREAMBLE_VHT, 5118 WMI_RATE_PREAMBLE_HE, 5119 }; 5120 5121 /** 5122 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection. 5123 * @WMI_RTS_CTS_DISABLED: RTS/CTS protection is disabled. 5124 * @WMI_USE_RTS_CTS: RTS/CTS Enabled. 5125 * @WMI_USE_CTS2SELF: CTS to self protection Enabled. 5126 */ 5127 enum wmi_rtscts_prot_mode { 5128 WMI_RTS_CTS_DISABLED = 0, 5129 WMI_USE_RTS_CTS = 1, 5130 WMI_USE_CTS2SELF = 2, 5131 }; 5132 5133 /** 5134 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling 5135 * protection mode. 5136 * @WMI_RTSCTS_FOR_NO_RATESERIES: Neither of rate-series should use RTS-CTS 5137 * @WMI_RTSCTS_FOR_SECOND_RATESERIES: Only second rate-series will use RTS-CTS 5138 * @WMI_RTSCTS_ACROSS_SW_RETRIES: Only the second rate-series will use RTS-CTS, 5139 * but if there's a sw retry, both the rate 5140 * series will use RTS-CTS. 5141 * @WMI_RTSCTS_ERP: RTS/CTS used for ERP protection for every PPDU. 5142 * @WMI_RTSCTS_FOR_ALL_RATESERIES: Enable RTS-CTS for all rate series. 5143 */ 5144 enum wmi_rtscts_profile { 5145 WMI_RTSCTS_FOR_NO_RATESERIES = 0, 5146 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1, 5147 WMI_RTSCTS_ACROSS_SW_RETRIES = 2, 5148 WMI_RTSCTS_ERP = 3, 5149 WMI_RTSCTS_FOR_ALL_RATESERIES = 4, 5150 }; 5151 5152 struct ath11k_hal_reg_cap { 5153 u32 eeprom_rd; 5154 u32 eeprom_rd_ext; 5155 u32 regcap1; 5156 u32 regcap2; 5157 u32 wireless_modes; 5158 u32 low_2ghz_chan; 5159 u32 high_2ghz_chan; 5160 u32 low_5ghz_chan; 5161 u32 high_5ghz_chan; 5162 }; 5163 5164 struct ath11k_mem_chunk { 5165 void *vaddr; 5166 dma_addr_t paddr; 5167 u32 len; 5168 u32 req_id; 5169 }; 5170 5171 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 5172 5173 enum wmi_sta_ps_param_rx_wake_policy { 5174 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 5175 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 5176 }; 5177 5178 /* Do not change existing values! Used by ath11k_frame_mode parameter 5179 * module parameter. 5180 */ 5181 enum ath11k_hw_txrx_mode { 5182 ATH11K_HW_TXRX_RAW = 0, 5183 ATH11K_HW_TXRX_NATIVE_WIFI = 1, 5184 ATH11K_HW_TXRX_ETHERNET = 2, 5185 }; 5186 5187 struct wmi_wmm_params { 5188 u32 tlv_header; 5189 u32 cwmin; 5190 u32 cwmax; 5191 u32 aifs; 5192 u32 txoplimit; 5193 u32 acm; 5194 u32 no_ack; 5195 } __packed; 5196 5197 struct wmi_wmm_params_arg { 5198 u8 acm; 5199 u8 aifs; 5200 u16 cwmin; 5201 u16 cwmax; 5202 u16 txop; 5203 u8 no_ack; 5204 }; 5205 5206 struct wmi_vdev_set_wmm_params_cmd { 5207 u32 tlv_header; 5208 u32 vdev_id; 5209 struct wmi_wmm_params wmm_params[4]; 5210 u32 wmm_param_type; 5211 } __packed; 5212 5213 struct wmi_wmm_params_all_arg { 5214 struct wmi_wmm_params_arg ac_be; 5215 struct wmi_wmm_params_arg ac_bk; 5216 struct wmi_wmm_params_arg ac_vi; 5217 struct wmi_wmm_params_arg ac_vo; 5218 }; 5219 5220 #define ATH11K_TWT_DEF_STA_CONG_TIMER_MS 5000 5221 #define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE 10 5222 #define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP 50 5223 #define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20 5224 #define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100 5225 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80 5226 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50 5227 #define ATH11K_TWT_DEF_MIN_NO_STA_SETUP 10 5228 #define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN 2 5229 #define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2 5230 #define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS 2 5231 #define ATH11K_TWT_DEF_MAX_NO_STA_TWT 500 5232 #define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL 10000 5233 #define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000 5234 #define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000 5235 5236 struct wmi_twt_enable_params { 5237 u32 sta_cong_timer_ms; 5238 u32 mbss_support; 5239 u32 default_slot_size; 5240 u32 congestion_thresh_setup; 5241 u32 congestion_thresh_teardown; 5242 u32 congestion_thresh_critical; 5243 u32 interference_thresh_teardown; 5244 u32 interference_thresh_setup; 5245 u32 min_no_sta_setup; 5246 u32 min_no_sta_teardown; 5247 u32 no_of_bcast_mcast_slots; 5248 u32 min_no_twt_slots; 5249 u32 max_no_sta_twt; 5250 u32 mode_check_interval; 5251 u32 add_sta_slot_interval; 5252 u32 remove_sta_slot_interval; 5253 }; 5254 5255 struct wmi_twt_enable_params_cmd { 5256 u32 tlv_header; 5257 u32 pdev_id; 5258 u32 sta_cong_timer_ms; 5259 u32 mbss_support; 5260 u32 default_slot_size; 5261 u32 congestion_thresh_setup; 5262 u32 congestion_thresh_teardown; 5263 u32 congestion_thresh_critical; 5264 u32 interference_thresh_teardown; 5265 u32 interference_thresh_setup; 5266 u32 min_no_sta_setup; 5267 u32 min_no_sta_teardown; 5268 u32 no_of_bcast_mcast_slots; 5269 u32 min_no_twt_slots; 5270 u32 max_no_sta_twt; 5271 u32 mode_check_interval; 5272 u32 add_sta_slot_interval; 5273 u32 remove_sta_slot_interval; 5274 } __packed; 5275 5276 struct wmi_twt_disable_params_cmd { 5277 u32 tlv_header; 5278 u32 pdev_id; 5279 } __packed; 5280 5281 enum WMI_HOST_TWT_COMMAND { 5282 WMI_HOST_TWT_COMMAND_REQUEST_TWT = 0, 5283 WMI_HOST_TWT_COMMAND_SUGGEST_TWT, 5284 WMI_HOST_TWT_COMMAND_DEMAND_TWT, 5285 WMI_HOST_TWT_COMMAND_TWT_GROUPING, 5286 WMI_HOST_TWT_COMMAND_ACCEPT_TWT, 5287 WMI_HOST_TWT_COMMAND_ALTERNATE_TWT, 5288 WMI_HOST_TWT_COMMAND_DICTATE_TWT, 5289 WMI_HOST_TWT_COMMAND_REJECT_TWT, 5290 }; 5291 5292 #define WMI_TWT_ADD_DIALOG_FLAG_BCAST BIT(8) 5293 #define WMI_TWT_ADD_DIALOG_FLAG_TRIGGER BIT(9) 5294 #define WMI_TWT_ADD_DIALOG_FLAG_FLOW_TYPE BIT(10) 5295 #define WMI_TWT_ADD_DIALOG_FLAG_PROTECTION BIT(11) 5296 5297 struct wmi_twt_add_dialog_params_cmd { 5298 u32 tlv_header; 5299 u32 vdev_id; 5300 struct wmi_mac_addr peer_macaddr; 5301 u32 dialog_id; 5302 u32 wake_intvl_us; 5303 u32 wake_intvl_mantis; 5304 u32 wake_dura_us; 5305 u32 sp_offset_us; 5306 u32 flags; 5307 } __packed; 5308 5309 struct wmi_twt_add_dialog_params { 5310 u32 vdev_id; 5311 u8 peer_macaddr[ETH_ALEN]; 5312 u32 dialog_id; 5313 u32 wake_intvl_us; 5314 u32 wake_intvl_mantis; 5315 u32 wake_dura_us; 5316 u32 sp_offset_us; 5317 u8 twt_cmd; 5318 u8 flag_bcast; 5319 u8 flag_trigger; 5320 u8 flag_flow_type; 5321 u8 flag_protection; 5322 } __packed; 5323 5324 enum wmi_twt_add_dialog_status { 5325 WMI_ADD_TWT_STATUS_OK, 5326 WMI_ADD_TWT_STATUS_TWT_NOT_ENABLED, 5327 WMI_ADD_TWT_STATUS_USED_DIALOG_ID, 5328 WMI_ADD_TWT_STATUS_INVALID_PARAM, 5329 WMI_ADD_TWT_STATUS_NOT_READY, 5330 WMI_ADD_TWT_STATUS_NO_RESOURCE, 5331 WMI_ADD_TWT_STATUS_NO_ACK, 5332 WMI_ADD_TWT_STATUS_NO_RESPONSE, 5333 WMI_ADD_TWT_STATUS_DENIED, 5334 WMI_ADD_TWT_STATUS_UNKNOWN_ERROR, 5335 }; 5336 5337 struct wmi_twt_add_dialog_event { 5338 u32 vdev_id; 5339 struct wmi_mac_addr peer_macaddr; 5340 u32 dialog_id; 5341 u32 status; 5342 } __packed; 5343 5344 struct wmi_twt_del_dialog_params { 5345 u32 vdev_id; 5346 u8 peer_macaddr[ETH_ALEN]; 5347 u32 dialog_id; 5348 } __packed; 5349 5350 struct wmi_twt_del_dialog_params_cmd { 5351 u32 tlv_header; 5352 u32 vdev_id; 5353 struct wmi_mac_addr peer_macaddr; 5354 u32 dialog_id; 5355 } __packed; 5356 5357 struct wmi_twt_pause_dialog_params { 5358 u32 vdev_id; 5359 u8 peer_macaddr[ETH_ALEN]; 5360 u32 dialog_id; 5361 } __packed; 5362 5363 struct wmi_twt_pause_dialog_params_cmd { 5364 u32 tlv_header; 5365 u32 vdev_id; 5366 struct wmi_mac_addr peer_macaddr; 5367 u32 dialog_id; 5368 } __packed; 5369 5370 struct wmi_twt_resume_dialog_params { 5371 u32 vdev_id; 5372 u8 peer_macaddr[ETH_ALEN]; 5373 u32 dialog_id; 5374 u32 sp_offset_us; 5375 u32 next_twt_size; 5376 } __packed; 5377 5378 struct wmi_twt_resume_dialog_params_cmd { 5379 u32 tlv_header; 5380 u32 vdev_id; 5381 struct wmi_mac_addr peer_macaddr; 5382 u32 dialog_id; 5383 u32 sp_offset_us; 5384 u32 next_twt_size; 5385 } __packed; 5386 5387 struct wmi_obss_spatial_reuse_params_cmd { 5388 u32 tlv_header; 5389 u32 pdev_id; 5390 u32 enable; 5391 s32 obss_min; 5392 s32 obss_max; 5393 u32 vdev_id; 5394 } __packed; 5395 5396 struct wmi_pdev_obss_pd_bitmap_cmd { 5397 u32 tlv_header; 5398 u32 pdev_id; 5399 u32 bitmap[2]; 5400 } __packed; 5401 5402 #define ATH11K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200 5403 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0 5404 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION 1 5405 5406 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS 10000 5407 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS 5000 5408 5409 enum wmi_bss_color_collision { 5410 WMI_BSS_COLOR_COLLISION_DISABLE = 0, 5411 WMI_BSS_COLOR_COLLISION_DETECTION, 5412 WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY, 5413 WMI_BSS_COLOR_FREE_SLOT_AVAILABLE, 5414 }; 5415 5416 struct wmi_obss_color_collision_cfg_params_cmd { 5417 u32 tlv_header; 5418 u32 vdev_id; 5419 u32 flags; 5420 u32 evt_type; 5421 u32 current_bss_color; 5422 u32 detection_period_ms; 5423 u32 scan_period_ms; 5424 u32 free_slot_expiry_time_ms; 5425 } __packed; 5426 5427 struct wmi_bss_color_change_enable_params_cmd { 5428 u32 tlv_header; 5429 u32 vdev_id; 5430 u32 enable; 5431 } __packed; 5432 5433 struct wmi_obss_color_collision_event { 5434 u32 vdev_id; 5435 u32 evt_type; 5436 u64 obss_color_bitmap; 5437 } __packed; 5438 5439 #define ATH11K_IPV4_TH_SEED_SIZE 5 5440 #define ATH11K_IPV6_TH_SEED_SIZE 11 5441 5442 struct ath11k_wmi_pdev_lro_config_cmd { 5443 u32 tlv_header; 5444 u32 lro_enable; 5445 u32 res; 5446 u32 th_4[ATH11K_IPV4_TH_SEED_SIZE]; 5447 u32 th_6[ATH11K_IPV6_TH_SEED_SIZE]; 5448 u32 pdev_id; 5449 } __packed; 5450 5451 #define ATH11K_WMI_SPECTRAL_COUNT_DEFAULT 0 5452 #define ATH11K_WMI_SPECTRAL_PERIOD_DEFAULT 224 5453 #define ATH11K_WMI_SPECTRAL_PRIORITY_DEFAULT 1 5454 #define ATH11K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 5455 #define ATH11K_WMI_SPECTRAL_GC_ENA_DEFAULT 1 5456 #define ATH11K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 5457 #define ATH11K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 5458 #define ATH11K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 5459 #define ATH11K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 5460 #define ATH11K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 5461 #define ATH11K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 5462 #define ATH11K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 5463 #define ATH11K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 5464 #define ATH11K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 5465 #define ATH11K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2 5466 #define ATH11K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 5467 #define ATH11K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 5468 #define ATH11K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1 5469 5470 struct ath11k_wmi_vdev_spectral_conf_param { 5471 u32 vdev_id; 5472 u32 scan_count; 5473 u32 scan_period; 5474 u32 scan_priority; 5475 u32 scan_fft_size; 5476 u32 scan_gc_ena; 5477 u32 scan_restart_ena; 5478 u32 scan_noise_floor_ref; 5479 u32 scan_init_delay; 5480 u32 scan_nb_tone_thr; 5481 u32 scan_str_bin_thr; 5482 u32 scan_wb_rpt_mode; 5483 u32 scan_rssi_rpt_mode; 5484 u32 scan_rssi_thr; 5485 u32 scan_pwr_format; 5486 u32 scan_rpt_mode; 5487 u32 scan_bin_scale; 5488 u32 scan_dbm_adj; 5489 u32 scan_chn_mask; 5490 } __packed; 5491 5492 struct ath11k_wmi_vdev_spectral_conf_cmd { 5493 u32 tlv_header; 5494 struct ath11k_wmi_vdev_spectral_conf_param param; 5495 } __packed; 5496 5497 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 5498 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 5499 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 5500 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 5501 5502 struct ath11k_wmi_vdev_spectral_enable_cmd { 5503 u32 tlv_header; 5504 u32 vdev_id; 5505 u32 trigger_cmd; 5506 u32 enable_cmd; 5507 } __packed; 5508 5509 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd { 5510 u32 tlv_header; 5511 u32 pdev_id; 5512 u32 module_id; /* see enum wmi_direct_buffer_module */ 5513 u32 base_paddr_lo; 5514 u32 base_paddr_hi; 5515 u32 head_idx_paddr_lo; 5516 u32 head_idx_paddr_hi; 5517 u32 tail_idx_paddr_lo; 5518 u32 tail_idx_paddr_hi; 5519 u32 num_elems; /* Number of elems in the ring */ 5520 u32 buf_size; /* size of allocated buffer in bytes */ 5521 5522 /* Number of wmi_dma_buf_release_entry packed together */ 5523 u32 num_resp_per_event; 5524 5525 /* Target should timeout and send whatever resp 5526 * it has if this time expires, units in milliseconds 5527 */ 5528 u32 event_timeout_ms; 5529 } __packed; 5530 5531 struct ath11k_wmi_dma_buf_release_fixed_param { 5532 u32 pdev_id; 5533 u32 module_id; 5534 u32 num_buf_release_entry; 5535 u32 num_meta_data_entry; 5536 } __packed; 5537 5538 struct wmi_dma_buf_release_entry { 5539 u32 tlv_header; 5540 u32 paddr_lo; 5541 5542 /* Bits 11:0: address of data 5543 * Bits 31:12: host context data 5544 */ 5545 u32 paddr_hi; 5546 } __packed; 5547 5548 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0) 5549 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16) 5550 5551 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0) 5552 5553 struct wmi_dma_buf_release_meta_data { 5554 u32 tlv_header; 5555 s32 noise_floor[WMI_MAX_CHAINS]; 5556 u32 reset_delay; 5557 u32 freq1; 5558 u32 freq2; 5559 u32 ch_width; 5560 } __packed; 5561 5562 enum wmi_fils_discovery_cmd_type { 5563 WMI_FILS_DISCOVERY_CMD, 5564 WMI_UNSOL_BCAST_PROBE_RESP, 5565 }; 5566 5567 struct wmi_fils_discovery_cmd { 5568 u32 tlv_header; 5569 u32 vdev_id; 5570 u32 interval; 5571 u32 config; /* enum wmi_fils_discovery_cmd_type */ 5572 } __packed; 5573 5574 struct wmi_fils_discovery_tmpl_cmd { 5575 u32 tlv_header; 5576 u32 vdev_id; 5577 u32 buf_len; 5578 } __packed; 5579 5580 struct wmi_probe_tmpl_cmd { 5581 u32 tlv_header; 5582 u32 vdev_id; 5583 u32 buf_len; 5584 } __packed; 5585 5586 struct target_resource_config { 5587 u32 num_vdevs; 5588 u32 num_peers; 5589 u32 num_active_peers; 5590 u32 num_offload_peers; 5591 u32 num_offload_reorder_buffs; 5592 u32 num_peer_keys; 5593 u32 num_tids; 5594 u32 ast_skid_limit; 5595 u32 tx_chain_mask; 5596 u32 rx_chain_mask; 5597 u32 rx_timeout_pri[4]; 5598 u32 rx_decap_mode; 5599 u32 scan_max_pending_req; 5600 u32 bmiss_offload_max_vdev; 5601 u32 roam_offload_max_vdev; 5602 u32 roam_offload_max_ap_profiles; 5603 u32 num_mcast_groups; 5604 u32 num_mcast_table_elems; 5605 u32 mcast2ucast_mode; 5606 u32 tx_dbg_log_size; 5607 u32 num_wds_entries; 5608 u32 dma_burst_size; 5609 u32 mac_aggr_delim; 5610 u32 rx_skip_defrag_timeout_dup_detection_check; 5611 u32 vow_config; 5612 u32 gtk_offload_max_vdev; 5613 u32 num_msdu_desc; 5614 u32 max_frag_entries; 5615 u32 max_peer_ext_stats; 5616 u32 smart_ant_cap; 5617 u32 bk_minfree; 5618 u32 be_minfree; 5619 u32 vi_minfree; 5620 u32 vo_minfree; 5621 u32 rx_batchmode; 5622 u32 tt_support; 5623 u32 flag1; 5624 u32 iphdr_pad_config; 5625 u32 qwrap_config:16, 5626 alloc_frag_desc_for_data_pkt:16; 5627 u32 num_tdls_vdevs; 5628 u32 num_tdls_conn_table_entries; 5629 u32 beacon_tx_offload_max_vdev; 5630 u32 num_multicast_filter_entries; 5631 u32 num_wow_filters; 5632 u32 num_keep_alive_pattern; 5633 u32 keep_alive_pattern_size; 5634 u32 max_tdls_concurrent_sleep_sta; 5635 u32 max_tdls_concurrent_buffer_sta; 5636 u32 wmi_send_separate; 5637 u32 num_ocb_vdevs; 5638 u32 num_ocb_channels; 5639 u32 num_ocb_schedules; 5640 u32 num_ns_ext_tuples_cfg; 5641 u32 bpf_instruction_size; 5642 u32 max_bssid_rx_filters; 5643 u32 use_pdev_id; 5644 u32 peer_map_unmap_v2_support; 5645 u32 sched_params; 5646 u32 twt_ap_pdev_count; 5647 u32 twt_ap_sta_count; 5648 u8 is_reg_cc_ext_event_supported; 5649 }; 5650 5651 enum wmi_debug_log_param { 5652 WMI_DEBUG_LOG_PARAM_LOG_LEVEL = 0x1, 5653 WMI_DEBUG_LOG_PARAM_VDEV_ENABLE, 5654 WMI_DEBUG_LOG_PARAM_VDEV_DISABLE, 5655 WMI_DEBUG_LOG_PARAM_VDEV_ENABLE_BITMAP, 5656 WMI_DEBUG_LOG_PARAM_MOD_ENABLE_BITMAP, 5657 WMI_DEBUG_LOG_PARAM_WOW_MOD_ENABLE_BITMAP, 5658 }; 5659 5660 struct wmi_debug_log_config_cmd_fixed_param { 5661 u32 tlv_header; 5662 u32 dbg_log_param; 5663 u32 value; 5664 } __packed; 5665 5666 #define WMI_MAX_MEM_REQS 32 5667 5668 #define MAX_RADIOS 3 5669 5670 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 5671 #define WMI_SEND_TIMEOUT_HZ (3 * HZ) 5672 5673 enum ath11k_wmi_peer_ps_state { 5674 WMI_PEER_PS_STATE_OFF, 5675 WMI_PEER_PS_STATE_ON, 5676 WMI_PEER_PS_STATE_DISABLED, 5677 }; 5678 5679 enum wmi_peer_ps_supported_bitmap { 5680 /* Used to indicate that power save state change is valid */ 5681 WMI_PEER_PS_VALID = 0x1, 5682 WMI_PEER_PS_STATE_TIMESTAMP = 0x2, 5683 }; 5684 5685 struct wmi_peer_sta_ps_state_chg_event { 5686 struct wmi_mac_addr peer_macaddr; 5687 u32 peer_ps_state; 5688 u32 ps_supported_bitmap; 5689 u32 peer_ps_valid; 5690 u32 peer_ps_timestamp; 5691 } __packed; 5692 5693 struct ath11k_wmi_base { 5694 struct ath11k_base *ab; 5695 struct ath11k_pdev_wmi wmi[MAX_RADIOS]; 5696 enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS]; 5697 u32 max_msg_len[MAX_RADIOS]; 5698 5699 struct completion service_ready; 5700 struct completion unified_ready; 5701 DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE); 5702 wait_queue_head_t tx_credits_wq; 5703 const struct wmi_peer_flags_map *peer_flags; 5704 u32 num_mem_chunks; 5705 u32 rx_decap_mode; 5706 struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 5707 5708 enum wmi_host_hw_mode_config_type preferred_hw_mode; 5709 struct target_resource_config wlan_resource_config; 5710 5711 struct ath11k_targ_cap *targ_cap; 5712 }; 5713 5714 /* Definition of HW data filtering */ 5715 enum hw_data_filter_type { 5716 WMI_HW_DATA_FILTER_DROP_NON_ARP_BC = BIT(0), 5717 WMI_HW_DATA_FILTER_DROP_NON_ICMPV6_MC = BIT(1), 5718 }; 5719 5720 struct wmi_hw_data_filter_cmd { 5721 u32 tlv_header; 5722 u32 vdev_id; 5723 u32 enable; 5724 u32 hw_filter_bitmap; 5725 } __packed; 5726 5727 /* WOW structures */ 5728 enum wmi_wow_wakeup_event { 5729 WOW_BMISS_EVENT = 0, 5730 WOW_BETTER_AP_EVENT, 5731 WOW_DEAUTH_RECVD_EVENT, 5732 WOW_MAGIC_PKT_RECVD_EVENT, 5733 WOW_GTK_ERR_EVENT, 5734 WOW_FOURWAY_HSHAKE_EVENT, 5735 WOW_EAPOL_RECVD_EVENT, 5736 WOW_NLO_DETECTED_EVENT, 5737 WOW_DISASSOC_RECVD_EVENT, 5738 WOW_PATTERN_MATCH_EVENT, 5739 WOW_CSA_IE_EVENT, 5740 WOW_PROBE_REQ_WPS_IE_EVENT, 5741 WOW_AUTH_REQ_EVENT, 5742 WOW_ASSOC_REQ_EVENT, 5743 WOW_HTT_EVENT, 5744 WOW_RA_MATCH_EVENT, 5745 WOW_HOST_AUTO_SHUTDOWN_EVENT, 5746 WOW_IOAC_MAGIC_EVENT, 5747 WOW_IOAC_SHORT_EVENT, 5748 WOW_IOAC_EXTEND_EVENT, 5749 WOW_IOAC_TIMER_EVENT, 5750 WOW_DFS_PHYERR_RADAR_EVENT, 5751 WOW_BEACON_EVENT, 5752 WOW_CLIENT_KICKOUT_EVENT, 5753 WOW_EVENT_MAX, 5754 }; 5755 5756 enum wmi_wow_interface_cfg { 5757 WOW_IFACE_PAUSE_ENABLED, 5758 WOW_IFACE_PAUSE_DISABLED 5759 }; 5760 5761 #define C2S(x) case x: return #x 5762 5763 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev) 5764 { 5765 switch (ev) { 5766 C2S(WOW_BMISS_EVENT); 5767 C2S(WOW_BETTER_AP_EVENT); 5768 C2S(WOW_DEAUTH_RECVD_EVENT); 5769 C2S(WOW_MAGIC_PKT_RECVD_EVENT); 5770 C2S(WOW_GTK_ERR_EVENT); 5771 C2S(WOW_FOURWAY_HSHAKE_EVENT); 5772 C2S(WOW_EAPOL_RECVD_EVENT); 5773 C2S(WOW_NLO_DETECTED_EVENT); 5774 C2S(WOW_DISASSOC_RECVD_EVENT); 5775 C2S(WOW_PATTERN_MATCH_EVENT); 5776 C2S(WOW_CSA_IE_EVENT); 5777 C2S(WOW_PROBE_REQ_WPS_IE_EVENT); 5778 C2S(WOW_AUTH_REQ_EVENT); 5779 C2S(WOW_ASSOC_REQ_EVENT); 5780 C2S(WOW_HTT_EVENT); 5781 C2S(WOW_RA_MATCH_EVENT); 5782 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT); 5783 C2S(WOW_IOAC_MAGIC_EVENT); 5784 C2S(WOW_IOAC_SHORT_EVENT); 5785 C2S(WOW_IOAC_EXTEND_EVENT); 5786 C2S(WOW_IOAC_TIMER_EVENT); 5787 C2S(WOW_DFS_PHYERR_RADAR_EVENT); 5788 C2S(WOW_BEACON_EVENT); 5789 C2S(WOW_CLIENT_KICKOUT_EVENT); 5790 C2S(WOW_EVENT_MAX); 5791 default: 5792 return NULL; 5793 } 5794 } 5795 5796 enum wmi_wow_wake_reason { 5797 WOW_REASON_UNSPECIFIED = -1, 5798 WOW_REASON_NLOD = 0, 5799 WOW_REASON_AP_ASSOC_LOST, 5800 WOW_REASON_LOW_RSSI, 5801 WOW_REASON_DEAUTH_RECVD, 5802 WOW_REASON_DISASSOC_RECVD, 5803 WOW_REASON_GTK_HS_ERR, 5804 WOW_REASON_EAP_REQ, 5805 WOW_REASON_FOURWAY_HS_RECV, 5806 WOW_REASON_TIMER_INTR_RECV, 5807 WOW_REASON_PATTERN_MATCH_FOUND, 5808 WOW_REASON_RECV_MAGIC_PATTERN, 5809 WOW_REASON_P2P_DISC, 5810 WOW_REASON_WLAN_HB, 5811 WOW_REASON_CSA_EVENT, 5812 WOW_REASON_PROBE_REQ_WPS_IE_RECV, 5813 WOW_REASON_AUTH_REQ_RECV, 5814 WOW_REASON_ASSOC_REQ_RECV, 5815 WOW_REASON_HTT_EVENT, 5816 WOW_REASON_RA_MATCH, 5817 WOW_REASON_HOST_AUTO_SHUTDOWN, 5818 WOW_REASON_IOAC_MAGIC_EVENT, 5819 WOW_REASON_IOAC_SHORT_EVENT, 5820 WOW_REASON_IOAC_EXTEND_EVENT, 5821 WOW_REASON_IOAC_TIMER_EVENT, 5822 WOW_REASON_ROAM_HO, 5823 WOW_REASON_DFS_PHYERR_RADADR_EVENT, 5824 WOW_REASON_BEACON_RECV, 5825 WOW_REASON_CLIENT_KICKOUT_EVENT, 5826 WOW_REASON_PAGE_FAULT = 0x3a, 5827 WOW_REASON_DEBUG_TEST = 0xFF, 5828 }; 5829 5830 static inline const char *wow_reason(enum wmi_wow_wake_reason reason) 5831 { 5832 switch (reason) { 5833 C2S(WOW_REASON_UNSPECIFIED); 5834 C2S(WOW_REASON_NLOD); 5835 C2S(WOW_REASON_AP_ASSOC_LOST); 5836 C2S(WOW_REASON_LOW_RSSI); 5837 C2S(WOW_REASON_DEAUTH_RECVD); 5838 C2S(WOW_REASON_DISASSOC_RECVD); 5839 C2S(WOW_REASON_GTK_HS_ERR); 5840 C2S(WOW_REASON_EAP_REQ); 5841 C2S(WOW_REASON_FOURWAY_HS_RECV); 5842 C2S(WOW_REASON_TIMER_INTR_RECV); 5843 C2S(WOW_REASON_PATTERN_MATCH_FOUND); 5844 C2S(WOW_REASON_RECV_MAGIC_PATTERN); 5845 C2S(WOW_REASON_P2P_DISC); 5846 C2S(WOW_REASON_WLAN_HB); 5847 C2S(WOW_REASON_CSA_EVENT); 5848 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV); 5849 C2S(WOW_REASON_AUTH_REQ_RECV); 5850 C2S(WOW_REASON_ASSOC_REQ_RECV); 5851 C2S(WOW_REASON_HTT_EVENT); 5852 C2S(WOW_REASON_RA_MATCH); 5853 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN); 5854 C2S(WOW_REASON_IOAC_MAGIC_EVENT); 5855 C2S(WOW_REASON_IOAC_SHORT_EVENT); 5856 C2S(WOW_REASON_IOAC_EXTEND_EVENT); 5857 C2S(WOW_REASON_IOAC_TIMER_EVENT); 5858 C2S(WOW_REASON_ROAM_HO); 5859 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT); 5860 C2S(WOW_REASON_BEACON_RECV); 5861 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT); 5862 C2S(WOW_REASON_PAGE_FAULT); 5863 C2S(WOW_REASON_DEBUG_TEST); 5864 default: 5865 return NULL; 5866 } 5867 } 5868 5869 #undef C2S 5870 5871 struct wmi_wow_ev_arg { 5872 u32 vdev_id; 5873 u32 flag; 5874 enum wmi_wow_wake_reason wake_reason; 5875 u32 data_len; 5876 }; 5877 5878 enum wmi_tlv_pattern_type { 5879 WOW_PATTERN_MIN = 0, 5880 WOW_BITMAP_PATTERN = WOW_PATTERN_MIN, 5881 WOW_IPV4_SYNC_PATTERN, 5882 WOW_IPV6_SYNC_PATTERN, 5883 WOW_WILD_CARD_PATTERN, 5884 WOW_TIMER_PATTERN, 5885 WOW_MAGIC_PATTERN, 5886 WOW_IPV6_RA_PATTERN, 5887 WOW_IOAC_PKT_PATTERN, 5888 WOW_IOAC_TMR_PATTERN, 5889 WOW_PATTERN_MAX 5890 }; 5891 5892 #define WOW_DEFAULT_BITMAP_PATTERN_SIZE 148 5893 #define WOW_DEFAULT_BITMASK_SIZE 148 5894 5895 #define WOW_MIN_PATTERN_SIZE 1 5896 #define WOW_MAX_PATTERN_SIZE 148 5897 #define WOW_MAX_PKT_OFFSET 128 5898 #define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \ 5899 sizeof(struct rfc1042_hdr)) 5900 #define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \ 5901 offsetof(struct ieee80211_hdr_3addr, addr1)) 5902 5903 struct wmi_wow_add_del_event_cmd { 5904 u32 tlv_header; 5905 u32 vdev_id; 5906 u32 is_add; 5907 u32 event_bitmap; 5908 } __packed; 5909 5910 struct wmi_wow_enable_cmd { 5911 u32 tlv_header; 5912 u32 enable; 5913 u32 pause_iface_config; 5914 u32 flags; 5915 } __packed; 5916 5917 struct wmi_wow_host_wakeup_ind { 5918 u32 tlv_header; 5919 u32 reserved; 5920 } __packed; 5921 5922 struct wmi_tlv_wow_event_info { 5923 u32 vdev_id; 5924 u32 flag; 5925 u32 wake_reason; 5926 u32 data_len; 5927 } __packed; 5928 5929 struct wmi_wow_bitmap_pattern { 5930 u32 tlv_header; 5931 u8 patternbuf[WOW_DEFAULT_BITMAP_PATTERN_SIZE]; 5932 u8 bitmaskbuf[WOW_DEFAULT_BITMASK_SIZE]; 5933 u32 pattern_offset; 5934 u32 pattern_len; 5935 u32 bitmask_len; 5936 u32 pattern_id; 5937 } __packed; 5938 5939 struct wmi_wow_add_pattern_cmd { 5940 u32 tlv_header; 5941 u32 vdev_id; 5942 u32 pattern_id; 5943 u32 pattern_type; 5944 } __packed; 5945 5946 struct wmi_wow_del_pattern_cmd { 5947 u32 tlv_header; 5948 u32 vdev_id; 5949 u32 pattern_id; 5950 u32 pattern_type; 5951 } __packed; 5952 5953 #define WMI_PNO_MAX_SCHED_SCAN_PLANS 2 5954 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT 7200 5955 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100 5956 #define WMI_PNO_MAX_NETW_CHANNELS 26 5957 #define WMI_PNO_MAX_NETW_CHANNELS_EX 60 5958 #define WMI_PNO_MAX_SUPP_NETWORKS WLAN_SCAN_PARAMS_MAX_SSID 5959 #define WMI_PNO_MAX_IE_LENGTH WLAN_SCAN_PARAMS_MAX_IE_LEN 5960 5961 /* size based of dot11 declaration without extra IEs as we will not carry those for PNO */ 5962 #define WMI_PNO_MAX_PB_REQ_SIZE 450 5963 5964 #define WMI_PNO_24G_DEFAULT_CH 1 5965 #define WMI_PNO_5G_DEFAULT_CH 36 5966 5967 #define WMI_ACTIVE_MAX_CHANNEL_TIME 40 5968 #define WMI_PASSIVE_MAX_CHANNEL_TIME 110 5969 5970 /* SSID broadcast type */ 5971 enum wmi_ssid_bcast_type { 5972 BCAST_UNKNOWN = 0, 5973 BCAST_NORMAL = 1, 5974 BCAST_HIDDEN = 2, 5975 }; 5976 5977 #define WMI_NLO_MAX_SSIDS 16 5978 #define WMI_NLO_MAX_CHAN 48 5979 5980 #define WMI_NLO_CONFIG_STOP BIT(0) 5981 #define WMI_NLO_CONFIG_START BIT(1) 5982 #define WMI_NLO_CONFIG_RESET BIT(2) 5983 #define WMI_NLO_CONFIG_SLOW_SCAN BIT(4) 5984 #define WMI_NLO_CONFIG_FAST_SCAN BIT(5) 5985 #define WMI_NLO_CONFIG_SSID_HIDE_EN BIT(6) 5986 5987 /* This bit is used to indicate if EPNO or supplicant PNO is enabled. 5988 * Only one of them can be enabled at a given time 5989 */ 5990 #define WMI_NLO_CONFIG_ENLO BIT(7) 5991 #define WMI_NLO_CONFIG_SCAN_PASSIVE BIT(8) 5992 #define WMI_NLO_CONFIG_ENLO_RESET BIT(9) 5993 #define WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ BIT(10) 5994 #define WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ BIT(11) 5995 #define WMI_NLO_CONFIG_ENABLE_IE_WHITELIST_IN_PROBE_REQ BIT(12) 5996 #define WMI_NLO_CONFIG_ENABLE_CNLO_RSSI_CONFIG BIT(13) 5997 5998 struct wmi_nlo_ssid_param { 5999 u32 valid; 6000 struct wmi_ssid ssid; 6001 } __packed; 6002 6003 struct wmi_nlo_enc_param { 6004 u32 valid; 6005 u32 enc_type; 6006 } __packed; 6007 6008 struct wmi_nlo_auth_param { 6009 u32 valid; 6010 u32 auth_type; 6011 } __packed; 6012 6013 struct wmi_nlo_bcast_nw_param { 6014 u32 valid; 6015 u32 bcast_nw_type; 6016 } __packed; 6017 6018 struct wmi_nlo_rssi_param { 6019 u32 valid; 6020 s32 rssi; 6021 } __packed; 6022 6023 struct nlo_configured_parameters { 6024 /* TLV tag and len;*/ 6025 u32 tlv_header; 6026 struct wmi_nlo_ssid_param ssid; 6027 struct wmi_nlo_enc_param enc_type; 6028 struct wmi_nlo_auth_param auth_type; 6029 struct wmi_nlo_rssi_param rssi_cond; 6030 6031 /* indicates if the SSID is hidden or not */ 6032 struct wmi_nlo_bcast_nw_param bcast_nw_type; 6033 } __packed; 6034 6035 struct wmi_network_type { 6036 struct wmi_ssid ssid; 6037 u32 authentication; 6038 u32 encryption; 6039 u32 bcast_nw_type; 6040 u8 channel_count; 6041 u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX]; 6042 s32 rssi_threshold; 6043 }; 6044 6045 struct wmi_pno_scan_req { 6046 u8 enable; 6047 u8 vdev_id; 6048 u8 uc_networks_count; 6049 struct wmi_network_type a_networks[WMI_PNO_MAX_SUPP_NETWORKS]; 6050 u32 fast_scan_period; 6051 u32 slow_scan_period; 6052 u8 fast_scan_max_cycles; 6053 6054 bool do_passive_scan; 6055 6056 u32 delay_start_time; 6057 u32 active_min_time; 6058 u32 active_max_time; 6059 u32 passive_min_time; 6060 u32 passive_max_time; 6061 6062 /* mac address randomization attributes */ 6063 u32 enable_pno_scan_randomization; 6064 u8 mac_addr[ETH_ALEN]; 6065 u8 mac_addr_mask[ETH_ALEN]; 6066 }; 6067 6068 struct wmi_wow_nlo_config_cmd { 6069 u32 tlv_header; 6070 u32 flags; 6071 u32 vdev_id; 6072 u32 fast_scan_max_cycles; 6073 u32 active_dwell_time; 6074 u32 passive_dwell_time; 6075 u32 probe_bundle_size; 6076 6077 /* ART = IRT */ 6078 u32 rest_time; 6079 6080 /* Max value that can be reached after SBM */ 6081 u32 max_rest_time; 6082 6083 /* SBM */ 6084 u32 scan_backoff_multiplier; 6085 6086 /* SCBM */ 6087 u32 fast_scan_period; 6088 6089 /* specific to windows */ 6090 u32 slow_scan_period; 6091 6092 u32 no_of_ssids; 6093 6094 u32 num_of_channels; 6095 6096 /* NLO scan start delay time in milliseconds */ 6097 u32 delay_start_time; 6098 6099 /* MAC Address to use in Probe Req as SA */ 6100 struct wmi_mac_addr mac_addr; 6101 6102 /* Mask on which MAC has to be randomized */ 6103 struct wmi_mac_addr mac_mask; 6104 6105 /* IE bitmap to use in Probe Req */ 6106 u32 ie_bitmap[8]; 6107 6108 /* Number of vendor OUIs. In the TLV vendor_oui[] */ 6109 u32 num_vendor_oui; 6110 6111 /* Number of connected NLO band preferences */ 6112 u32 num_cnlo_band_pref; 6113 6114 /* The TLVs will follow. 6115 * nlo_configured_parameters nlo_list[]; 6116 * u32 channel_list[num_of_channels]; 6117 */ 6118 } __packed; 6119 6120 #define WMI_MAX_NS_OFFLOADS 2 6121 #define WMI_MAX_ARP_OFFLOADS 2 6122 6123 #define WMI_ARPOL_FLAGS_VALID BIT(0) 6124 #define WMI_ARPOL_FLAGS_MAC_VALID BIT(1) 6125 #define WMI_ARPOL_FLAGS_REMOTE_IP_VALID BIT(2) 6126 6127 struct wmi_arp_offload_tuple { 6128 u32 tlv_header; 6129 u32 flags; 6130 u8 target_ipaddr[4]; 6131 u8 remote_ipaddr[4]; 6132 struct wmi_mac_addr target_mac; 6133 } __packed; 6134 6135 #define WMI_NSOL_FLAGS_VALID BIT(0) 6136 #define WMI_NSOL_FLAGS_MAC_VALID BIT(1) 6137 #define WMI_NSOL_FLAGS_REMOTE_IP_VALID BIT(2) 6138 #define WMI_NSOL_FLAGS_IS_IPV6_ANYCAST BIT(3) 6139 6140 #define WMI_NSOL_MAX_TARGET_IPS 2 6141 6142 struct wmi_ns_offload_tuple { 6143 u32 tlv_header; 6144 u32 flags; 6145 u8 target_ipaddr[WMI_NSOL_MAX_TARGET_IPS][16]; 6146 u8 solicitation_ipaddr[16]; 6147 u8 remote_ipaddr[16]; 6148 struct wmi_mac_addr target_mac; 6149 } __packed; 6150 6151 struct wmi_set_arp_ns_offload_cmd { 6152 u32 tlv_header; 6153 u32 flags; 6154 u32 vdev_id; 6155 u32 num_ns_ext_tuples; 6156 /* The TLVs follow: 6157 * wmi_ns_offload_tuple ns_tuples[WMI_MAX_NS_OFFLOADS]; 6158 * wmi_arp_offload_tuple arp_tuples[WMI_MAX_ARP_OFFLOADS]; 6159 * wmi_ns_offload_tuple ns_ext_tuples[num_ns_ext_tuples]; 6160 */ 6161 } __packed; 6162 6163 #define GTK_OFFLOAD_OPCODE_MASK 0xFF000000 6164 #define GTK_OFFLOAD_ENABLE_OPCODE 0x01000000 6165 #define GTK_OFFLOAD_DISABLE_OPCODE 0x02000000 6166 #define GTK_OFFLOAD_REQUEST_STATUS_OPCODE 0x04000000 6167 6168 #define GTK_OFFLOAD_KEK_BYTES 16 6169 #define GTK_OFFLOAD_KCK_BYTES 16 6170 #define GTK_REPLAY_COUNTER_BYTES 8 6171 #define WMI_MAX_KEY_LEN 32 6172 #define IGTK_PN_SIZE 6 6173 6174 struct wmi_replayc_cnt { 6175 union { 6176 u8 counter[GTK_REPLAY_COUNTER_BYTES]; 6177 struct { 6178 u32 word0; 6179 u32 word1; 6180 } __packed; 6181 } __packed; 6182 } __packed; 6183 6184 struct wmi_gtk_offload_status_event { 6185 u32 vdev_id; 6186 u32 flags; 6187 u32 refresh_cnt; 6188 struct wmi_replayc_cnt replay_ctr; 6189 u8 igtk_key_index; 6190 u8 igtk_key_length; 6191 u8 igtk_key_rsc[IGTK_PN_SIZE]; 6192 u8 igtk_key[WMI_MAX_KEY_LEN]; 6193 u8 gtk_key_index; 6194 u8 gtk_key_length; 6195 u8 gtk_key_rsc[GTK_REPLAY_COUNTER_BYTES]; 6196 u8 gtk_key[WMI_MAX_KEY_LEN]; 6197 } __packed; 6198 6199 struct wmi_gtk_rekey_offload_cmd { 6200 u32 tlv_header; 6201 u32 vdev_id; 6202 u32 flags; 6203 u8 kek[GTK_OFFLOAD_KEK_BYTES]; 6204 u8 kck[GTK_OFFLOAD_KCK_BYTES]; 6205 u8 replay_ctr[GTK_REPLAY_COUNTER_BYTES]; 6206 } __packed; 6207 6208 #define BIOS_SAR_TABLE_LEN (22) 6209 #define BIOS_SAR_RSVD1_LEN (6) 6210 #define BIOS_SAR_RSVD2_LEN (18) 6211 6212 struct wmi_pdev_set_sar_table_cmd { 6213 u32 tlv_header; 6214 u32 pdev_id; 6215 u32 sar_len; 6216 u32 rsvd_len; 6217 } __packed; 6218 6219 struct wmi_pdev_set_geo_table_cmd { 6220 u32 tlv_header; 6221 u32 pdev_id; 6222 u32 rsvd_len; 6223 } __packed; 6224 6225 struct wmi_sta_keepalive_cmd { 6226 u32 tlv_header; 6227 u32 vdev_id; 6228 u32 enabled; 6229 6230 /* WMI_STA_KEEPALIVE_METHOD_ */ 6231 u32 method; 6232 6233 /* in seconds */ 6234 u32 interval; 6235 6236 /* following this structure is the TLV for struct 6237 * wmi_sta_keepalive_arp_resp 6238 */ 6239 } __packed; 6240 6241 struct wmi_sta_keepalive_arp_resp { 6242 u32 tlv_header; 6243 u32 src_ip4_addr; 6244 u32 dest_ip4_addr; 6245 struct wmi_mac_addr dest_mac_addr; 6246 } __packed; 6247 6248 struct wmi_sta_keepalive_arg { 6249 u32 vdev_id; 6250 u32 enabled; 6251 u32 method; 6252 u32 interval; 6253 u32 src_ip4_addr; 6254 u32 dest_ip4_addr; 6255 const u8 dest_mac_addr[ETH_ALEN]; 6256 }; 6257 6258 enum wmi_sta_keepalive_method { 6259 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1, 6260 WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE = 2, 6261 WMI_STA_KEEPALIVE_METHOD_ETHERNET_LOOPBACK = 3, 6262 WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST = 4, 6263 WMI_STA_KEEPALIVE_METHOD_MGMT_VENDOR_ACTION = 5, 6264 }; 6265 6266 #define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT 30 6267 #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0 6268 6269 int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb, 6270 u32 cmd_id); 6271 struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len); 6272 int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id, 6273 struct sk_buff *frame); 6274 int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id, 6275 struct ieee80211_mutable_offsets *offs, 6276 struct sk_buff *bcn); 6277 int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id); 6278 int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid, 6279 const u8 *bssid); 6280 int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id); 6281 int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg, 6282 bool restart); 6283 int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr, 6284 u32 vdev_id, u32 param_id, u32 param_val); 6285 int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id, 6286 u32 param_value, u8 pdev_id); 6287 int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, 6288 enum wmi_sta_ps_mode psmode); 6289 int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab); 6290 int ath11k_wmi_cmd_init(struct ath11k_base *ab); 6291 int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab); 6292 int ath11k_wmi_connect(struct ath11k_base *ab); 6293 int ath11k_wmi_pdev_attach(struct ath11k_base *ab, 6294 u8 pdev_id); 6295 int ath11k_wmi_attach(struct ath11k_base *ab); 6296 void ath11k_wmi_detach(struct ath11k_base *ab); 6297 int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr, 6298 struct vdev_create_params *param); 6299 int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id, 6300 const u8 *addr, dma_addr_t paddr, 6301 u8 tid, u8 ba_window_size_valid, 6302 u32 ba_window_size); 6303 int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar, 6304 struct peer_create_params *param); 6305 int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id, 6306 u32 param_id, u32 param_value); 6307 6308 int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id, 6309 u32 param, u32 param_value); 6310 int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms); 6311 int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar, 6312 const u8 *peer_addr, u8 vdev_id); 6313 int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id); 6314 void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg); 6315 int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar, 6316 struct scan_req_params *params); 6317 int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar, 6318 struct scan_cancel_param *param); 6319 int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id, 6320 struct wmi_wmm_params_all_arg *param); 6321 int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt, 6322 u32 pdev_id); 6323 int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id); 6324 6325 int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar, 6326 struct peer_assoc_params *param); 6327 int ath11k_wmi_vdev_install_key(struct ath11k *ar, 6328 struct wmi_vdev_install_key_arg *arg); 6329 int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar, 6330 enum wmi_bss_chan_info_req_type type); 6331 int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar, 6332 struct stats_request_params *param); 6333 int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar); 6334 int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar, 6335 u8 peer_addr[ETH_ALEN], 6336 struct peer_flush_params *param); 6337 int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr, 6338 struct ap_ps_params *param); 6339 int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar, 6340 struct scan_chan_list_params *chan_list); 6341 int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar, 6342 u32 pdev_id); 6343 int ath11k_wmi_addba_clear_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac); 6344 int ath11k_wmi_addba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac, 6345 u32 tid, u32 buf_size); 6346 int ath11k_wmi_addba_set_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac, 6347 u32 tid, u32 status); 6348 int ath11k_wmi_delba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac, 6349 u32 tid, u32 initiator, u32 reason); 6350 int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar, 6351 u32 vdev_id, u32 bcn_ctrl_op); 6352 int ath11k_wmi_send_set_current_country_cmd(struct ath11k *ar, 6353 struct wmi_set_current_country_params *param); 6354 int 6355 ath11k_wmi_send_init_country_cmd(struct ath11k *ar, 6356 struct wmi_init_country_params init_cc_param); 6357 6358 int ath11k_wmi_send_11d_scan_start_cmd(struct ath11k *ar, 6359 struct wmi_11d_scan_start_params *param); 6360 int ath11k_wmi_send_11d_scan_stop_cmd(struct ath11k *ar, u32 vdev_id); 6361 6362 int 6363 ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar, 6364 struct thermal_mitigation_params *param); 6365 int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter); 6366 int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar); 6367 int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable); 6368 int 6369 ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar, 6370 struct rx_reorder_queue_remove_params *param); 6371 int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar, 6372 struct pdev_set_regdomain_params *param); 6373 int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb, 6374 struct ath11k_fw_stats *stats); 6375 size_t ath11k_wmi_fw_stats_num_peers(struct list_head *head); 6376 size_t ath11k_wmi_fw_stats_num_peers_extd(struct list_head *head); 6377 size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head); 6378 void ath11k_wmi_fw_stats_fill(struct ath11k *ar, 6379 struct ath11k_fw_stats *fw_stats, u32 stats_id, 6380 char *buf); 6381 int ath11k_wmi_simulate_radar(struct ath11k *ar); 6382 void ath11k_wmi_fill_default_twt_params(struct wmi_twt_enable_params *twt_params); 6383 int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id, 6384 struct wmi_twt_enable_params *params); 6385 int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id); 6386 int ath11k_wmi_send_twt_add_dialog_cmd(struct ath11k *ar, 6387 struct wmi_twt_add_dialog_params *params); 6388 int ath11k_wmi_send_twt_del_dialog_cmd(struct ath11k *ar, 6389 struct wmi_twt_del_dialog_params *params); 6390 int ath11k_wmi_send_twt_pause_dialog_cmd(struct ath11k *ar, 6391 struct wmi_twt_pause_dialog_params *params); 6392 int ath11k_wmi_send_twt_resume_dialog_cmd(struct ath11k *ar, 6393 struct wmi_twt_resume_dialog_params *params); 6394 int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id, 6395 struct ieee80211_he_obss_pd *he_obss_pd); 6396 int ath11k_wmi_pdev_set_srg_bss_color_bitmap(struct ath11k *ar, u32 *bitmap); 6397 int ath11k_wmi_pdev_set_srg_patial_bssid_bitmap(struct ath11k *ar, u32 *bitmap); 6398 int ath11k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath11k *ar, 6399 u32 *bitmap); 6400 int ath11k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath11k *ar, 6401 u32 *bitmap); 6402 int ath11k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath11k *ar, 6403 u32 *bitmap); 6404 int ath11k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath11k *ar, 6405 u32 *bitmap); 6406 int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id, 6407 u8 bss_color, u32 period, 6408 bool enable); 6409 int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id, 6410 bool enable); 6411 int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id); 6412 int ath11k_wmi_pdev_dma_ring_cfg(struct ath11k *ar, 6413 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd *param); 6414 int ath11k_wmi_vdev_spectral_enable(struct ath11k *ar, u32 vdev_id, 6415 u32 trigger, u32 enable); 6416 int ath11k_wmi_vdev_spectral_conf(struct ath11k *ar, 6417 struct ath11k_wmi_vdev_spectral_conf_param *param); 6418 int ath11k_wmi_fils_discovery_tmpl(struct ath11k *ar, u32 vdev_id, 6419 struct sk_buff *tmpl); 6420 int ath11k_wmi_fils_discovery(struct ath11k *ar, u32 vdev_id, u32 interval, 6421 bool unsol_bcast_probe_resp_enabled); 6422 int ath11k_wmi_probe_resp_tmpl(struct ath11k *ar, u32 vdev_id, 6423 struct sk_buff *tmpl); 6424 int ath11k_wmi_set_hw_mode(struct ath11k_base *ab, 6425 enum wmi_host_hw_mode_config_type mode); 6426 int ath11k_wmi_wow_host_wakeup_ind(struct ath11k *ar); 6427 int ath11k_wmi_wow_enable(struct ath11k *ar); 6428 int ath11k_wmi_scan_prob_req_oui(struct ath11k *ar, 6429 const u8 mac_addr[ETH_ALEN]); 6430 int ath11k_wmi_fw_dbglog_cfg(struct ath11k *ar, u32 *module_id_bitmap, 6431 struct ath11k_fw_dbglog *dbglog); 6432 int ath11k_wmi_wow_config_pno(struct ath11k *ar, u32 vdev_id, 6433 struct wmi_pno_scan_req *pno_scan); 6434 int ath11k_wmi_wow_del_pattern(struct ath11k *ar, u32 vdev_id, u32 pattern_id); 6435 int ath11k_wmi_wow_add_pattern(struct ath11k *ar, u32 vdev_id, u32 pattern_id, 6436 const u8 *pattern, const u8 *mask, 6437 int pattern_len, int pattern_offset); 6438 int ath11k_wmi_wow_add_wakeup_event(struct ath11k *ar, u32 vdev_id, 6439 enum wmi_wow_wakeup_event event, 6440 u32 enable); 6441 int ath11k_wmi_hw_data_filter_cmd(struct ath11k *ar, u32 vdev_id, 6442 u32 filter_bitmap, bool enable); 6443 int ath11k_wmi_arp_ns_offload(struct ath11k *ar, 6444 struct ath11k_vif *arvif, bool enable); 6445 int ath11k_wmi_gtk_rekey_offload(struct ath11k *ar, 6446 struct ath11k_vif *arvif, bool enable); 6447 int ath11k_wmi_gtk_rekey_getinfo(struct ath11k *ar, 6448 struct ath11k_vif *arvif); 6449 int ath11k_wmi_pdev_set_bios_sar_table_param(struct ath11k *ar, const u8 *sar_val); 6450 int ath11k_wmi_pdev_set_bios_geo_table_param(struct ath11k *ar); 6451 int ath11k_wmi_sta_keepalive(struct ath11k *ar, 6452 const struct wmi_sta_keepalive_arg *arg); 6453 6454 #endif 6455