1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef ATH11K_WMI_H 7 #define ATH11K_WMI_H 8 9 #include <net/mac80211.h> 10 #include "htc.h" 11 12 struct ath11k_base; 13 struct ath11k; 14 struct ath11k_fw_stats; 15 struct ath11k_fw_dbglog; 16 17 #define PSOC_HOST_MAX_NUM_SS (8) 18 19 /* defines to set Packet extension values whic can be 0 us, 8 usec or 16 usec */ 20 #define MAX_HE_NSS 8 21 #define MAX_HE_MODULATION 8 22 #define MAX_HE_RU 4 23 #define HE_MODULATION_NONE 7 24 #define HE_PET_0_USEC 0 25 #define HE_PET_8_USEC 1 26 #define HE_PET_16_USEC 2 27 28 #define WMI_MAX_CHAINS 8 29 30 #define WMI_MAX_NUM_SS MAX_HE_NSS 31 #define WMI_MAX_NUM_RU MAX_HE_RU 32 33 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1) 34 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1) 35 #define WMI_TLV_CMD_UNSUPPORTED 0 36 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0 37 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0 38 39 struct wmi_cmd_hdr { 40 u32 cmd_id; 41 } __packed; 42 43 struct wmi_tlv { 44 u32 header; 45 u8 value[]; 46 } __packed; 47 48 #define WMI_TLV_LEN GENMASK(15, 0) 49 #define WMI_TLV_TAG GENMASK(31, 16) 50 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header) 51 52 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0) 53 #define WMI_MAX_MEM_REQS 32 54 #define ATH11K_MAX_HW_LISTEN_INTERVAL 5 55 56 #define WLAN_SCAN_MAX_HINT_S_SSID 10 57 #define WLAN_SCAN_MAX_HINT_BSSID 10 58 #define MAX_RNR_BSS 5 59 60 #define WLAN_SCAN_MAX_HINT_S_SSID 10 61 #define WLAN_SCAN_MAX_HINT_BSSID 10 62 #define MAX_RNR_BSS 5 63 64 #define WLAN_SCAN_PARAMS_MAX_SSID 16 65 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 66 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 67 68 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1 69 70 #define WMI_BA_MODE_BUFFER_SIZE_256 3 71 /* 72 * HW mode config type replicated from FW header 73 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active. 74 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands, 75 * one in 2G and another in 5G. 76 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in 77 * same band; no tx allowed. 78 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band. 79 * Support for both PHYs within one band is planned 80 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES), 81 * but could be extended to other bands in the future. 82 * The separation of the band between the two PHYs needs 83 * to be communicated separately. 84 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS 85 * as in WMI_HW_MODE_SBS, and 3rd on the other band 86 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and 87 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). 88 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. 89 */ 90 enum wmi_host_hw_mode_config_type { 91 WMI_HOST_HW_MODE_SINGLE = 0, 92 WMI_HOST_HW_MODE_DBS = 1, 93 WMI_HOST_HW_MODE_SBS_PASSIVE = 2, 94 WMI_HOST_HW_MODE_SBS = 3, 95 WMI_HOST_HW_MODE_DBS_SBS = 4, 96 WMI_HOST_HW_MODE_DBS_OR_SBS = 5, 97 98 /* keep last */ 99 WMI_HOST_HW_MODE_MAX 100 }; 101 102 /* HW mode priority values used to detect the preferred HW mode 103 * on the available modes. 104 */ 105 enum wmi_host_hw_mode_priority { 106 WMI_HOST_HW_MODE_DBS_SBS_PRI, 107 WMI_HOST_HW_MODE_DBS_PRI, 108 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI, 109 WMI_HOST_HW_MODE_SBS_PRI, 110 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI, 111 WMI_HOST_HW_MODE_SINGLE_PRI, 112 113 /* keep last the lowest priority */ 114 WMI_HOST_HW_MODE_MAX_PRI 115 }; 116 117 enum WMI_HOST_WLAN_BAND { 118 WMI_HOST_WLAN_2G_CAP = 0x1, 119 WMI_HOST_WLAN_5G_CAP = 0x2, 120 WMI_HOST_WLAN_2G_5G_CAP = WMI_HOST_WLAN_2G_CAP | WMI_HOST_WLAN_5G_CAP, 121 }; 122 123 /* Parameters used for WMI_VDEV_PARAM_AUTORATE_MISC_CFG command. 124 * Used only for HE auto rate mode. 125 */ 126 enum { 127 /* HE LTF related configuration */ 128 WMI_HE_AUTORATE_LTF_1X = BIT(0), 129 WMI_HE_AUTORATE_LTF_2X = BIT(1), 130 WMI_HE_AUTORATE_LTF_4X = BIT(2), 131 132 /* HE GI related configuration */ 133 WMI_AUTORATE_400NS_GI = BIT(8), 134 WMI_AUTORATE_800NS_GI = BIT(9), 135 WMI_AUTORATE_1600NS_GI = BIT(10), 136 WMI_AUTORATE_3200NS_GI = BIT(11), 137 }; 138 139 /* 140 * wmi command groups. 141 */ 142 enum wmi_cmd_group { 143 /* 0 to 2 are reserved */ 144 WMI_GRP_START = 0x3, 145 WMI_GRP_SCAN = WMI_GRP_START, 146 WMI_GRP_PDEV = 0x4, 147 WMI_GRP_VDEV = 0x5, 148 WMI_GRP_PEER = 0x6, 149 WMI_GRP_MGMT = 0x7, 150 WMI_GRP_BA_NEG = 0x8, 151 WMI_GRP_STA_PS = 0x9, 152 WMI_GRP_DFS = 0xa, 153 WMI_GRP_ROAM = 0xb, 154 WMI_GRP_OFL_SCAN = 0xc, 155 WMI_GRP_P2P = 0xd, 156 WMI_GRP_AP_PS = 0xe, 157 WMI_GRP_RATE_CTRL = 0xf, 158 WMI_GRP_PROFILE = 0x10, 159 WMI_GRP_SUSPEND = 0x11, 160 WMI_GRP_BCN_FILTER = 0x12, 161 WMI_GRP_WOW = 0x13, 162 WMI_GRP_RTT = 0x14, 163 WMI_GRP_SPECTRAL = 0x15, 164 WMI_GRP_STATS = 0x16, 165 WMI_GRP_ARP_NS_OFL = 0x17, 166 WMI_GRP_NLO_OFL = 0x18, 167 WMI_GRP_GTK_OFL = 0x19, 168 WMI_GRP_CSA_OFL = 0x1a, 169 WMI_GRP_CHATTER = 0x1b, 170 WMI_GRP_TID_ADDBA = 0x1c, 171 WMI_GRP_MISC = 0x1d, 172 WMI_GRP_GPIO = 0x1e, 173 WMI_GRP_FWTEST = 0x1f, 174 WMI_GRP_TDLS = 0x20, 175 WMI_GRP_RESMGR = 0x21, 176 WMI_GRP_STA_SMPS = 0x22, 177 WMI_GRP_WLAN_HB = 0x23, 178 WMI_GRP_RMC = 0x24, 179 WMI_GRP_MHF_OFL = 0x25, 180 WMI_GRP_LOCATION_SCAN = 0x26, 181 WMI_GRP_OEM = 0x27, 182 WMI_GRP_NAN = 0x28, 183 WMI_GRP_COEX = 0x29, 184 WMI_GRP_OBSS_OFL = 0x2a, 185 WMI_GRP_LPI = 0x2b, 186 WMI_GRP_EXTSCAN = 0x2c, 187 WMI_GRP_DHCP_OFL = 0x2d, 188 WMI_GRP_IPA = 0x2e, 189 WMI_GRP_MDNS_OFL = 0x2f, 190 WMI_GRP_SAP_OFL = 0x30, 191 WMI_GRP_OCB = 0x31, 192 WMI_GRP_SOC = 0x32, 193 WMI_GRP_PKT_FILTER = 0x33, 194 WMI_GRP_MAWC = 0x34, 195 WMI_GRP_PMF_OFFLOAD = 0x35, 196 WMI_GRP_BPF_OFFLOAD = 0x36, 197 WMI_GRP_NAN_DATA = 0x37, 198 WMI_GRP_PROTOTYPE = 0x38, 199 WMI_GRP_MONITOR = 0x39, 200 WMI_GRP_REGULATORY = 0x3a, 201 WMI_GRP_HW_DATA_FILTER = 0x3b, 202 WMI_GRP_WLM = 0x3c, 203 WMI_GRP_11K_OFFLOAD = 0x3d, 204 WMI_GRP_TWT = 0x3e, 205 WMI_GRP_MOTION_DET = 0x3f, 206 WMI_GRP_SPATIAL_REUSE = 0x40, 207 }; 208 209 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 210 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 211 212 #define WMI_CMD_UNSUPPORTED 0 213 214 enum wmi_tlv_cmd_id { 215 WMI_INIT_CMDID = 0x1, 216 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN), 217 WMI_STOP_SCAN_CMDID, 218 WMI_SCAN_CHAN_LIST_CMDID, 219 WMI_SCAN_SCH_PRIO_TBL_CMDID, 220 WMI_SCAN_UPDATE_REQUEST_CMDID, 221 WMI_SCAN_PROB_REQ_OUI_CMDID, 222 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID, 223 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV), 224 WMI_PDEV_SET_CHANNEL_CMDID, 225 WMI_PDEV_SET_PARAM_CMDID, 226 WMI_PDEV_PKTLOG_ENABLE_CMDID, 227 WMI_PDEV_PKTLOG_DISABLE_CMDID, 228 WMI_PDEV_SET_WMM_PARAMS_CMDID, 229 WMI_PDEV_SET_HT_CAP_IE_CMDID, 230 WMI_PDEV_SET_VHT_CAP_IE_CMDID, 231 WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 232 WMI_PDEV_SET_QUIET_MODE_CMDID, 233 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 234 WMI_PDEV_GET_TPC_CONFIG_CMDID, 235 WMI_PDEV_SET_BASE_MACADDR_CMDID, 236 WMI_PDEV_DUMP_CMDID, 237 WMI_PDEV_SET_LED_CONFIG_CMDID, 238 WMI_PDEV_GET_TEMPERATURE_CMDID, 239 WMI_PDEV_SET_LED_FLASHING_CMDID, 240 WMI_PDEV_SMART_ANT_ENABLE_CMDID, 241 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 242 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 243 WMI_PDEV_SET_CTL_TABLE_CMDID, 244 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID, 245 WMI_PDEV_FIPS_CMDID, 246 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID, 247 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 248 WMI_PDEV_GET_NFCAL_POWER_CMDID, 249 WMI_PDEV_GET_TPC_CMDID, 250 WMI_MIB_STATS_ENABLE_CMDID, 251 WMI_PDEV_SET_PCL_CMDID, 252 WMI_PDEV_SET_HW_MODE_CMDID, 253 WMI_PDEV_SET_MAC_CONFIG_CMDID, 254 WMI_PDEV_SET_ANTENNA_MODE_CMDID, 255 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID, 256 WMI_PDEV_WAL_POWER_DEBUG_CMDID, 257 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID, 258 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID, 259 WMI_PDEV_GET_ANTDIV_STATUS_CMDID, 260 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID, 261 WMI_PDEV_SET_STATS_THRESHOLD_CMDID, 262 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID, 263 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID, 264 WMI_PDEV_CHECK_CAL_VERSION_CMDID, 265 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID, 266 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID, 267 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 268 WMI_PDEV_UPDATE_PMK_CACHE_CMDID, 269 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID, 270 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID, 271 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID, 272 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID, 273 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID, 274 WMI_PDEV_DMA_RING_CFG_REQ_CMDID, 275 WMI_PDEV_HE_TB_ACTION_FRM_CMDID, 276 WMI_PDEV_PKTLOG_FILTER_CMDID, 277 WMI_PDEV_SET_RAP_CONFIG_CMDID, 278 WMI_PDEV_DSM_FILTER_CMDID, 279 WMI_PDEV_FRAME_INJECT_CMDID, 280 WMI_PDEV_TBTT_OFFSET_SYNC_CMDID, 281 WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID, 282 WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID, 283 WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 284 WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 285 WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 286 WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 287 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV), 288 WMI_VDEV_DELETE_CMDID, 289 WMI_VDEV_START_REQUEST_CMDID, 290 WMI_VDEV_RESTART_REQUEST_CMDID, 291 WMI_VDEV_UP_CMDID, 292 WMI_VDEV_STOP_CMDID, 293 WMI_VDEV_DOWN_CMDID, 294 WMI_VDEV_SET_PARAM_CMDID, 295 WMI_VDEV_INSTALL_KEY_CMDID, 296 WMI_VDEV_WNM_SLEEPMODE_CMDID, 297 WMI_VDEV_WMM_ADDTS_CMDID, 298 WMI_VDEV_WMM_DELTS_CMDID, 299 WMI_VDEV_SET_WMM_PARAMS_CMDID, 300 WMI_VDEV_SET_GTX_PARAMS_CMDID, 301 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID, 302 WMI_VDEV_PLMREQ_START_CMDID, 303 WMI_VDEV_PLMREQ_STOP_CMDID, 304 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID, 305 WMI_VDEV_SET_IE_CMDID, 306 WMI_VDEV_RATEMASK_CMDID, 307 WMI_VDEV_ATF_REQUEST_CMDID, 308 WMI_VDEV_SET_DSCP_TID_MAP_CMDID, 309 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 310 WMI_VDEV_SET_QUIET_MODE_CMDID, 311 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID, 312 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID, 313 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID, 314 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER), 315 WMI_PEER_DELETE_CMDID, 316 WMI_PEER_FLUSH_TIDS_CMDID, 317 WMI_PEER_SET_PARAM_CMDID, 318 WMI_PEER_ASSOC_CMDID, 319 WMI_PEER_ADD_WDS_ENTRY_CMDID, 320 WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 321 WMI_PEER_MCAST_GROUP_CMDID, 322 WMI_PEER_INFO_REQ_CMDID, 323 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID, 324 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID, 325 WMI_PEER_UPDATE_WDS_ENTRY_CMDID, 326 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID, 327 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 328 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 329 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 330 WMI_PEER_ATF_REQUEST_CMDID, 331 WMI_PEER_BWF_REQUEST_CMDID, 332 WMI_PEER_REORDER_QUEUE_SETUP_CMDID, 333 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID, 334 WMI_PEER_SET_RX_BLOCKSIZE_CMDID, 335 WMI_PEER_ANTDIV_INFO_REQ_CMDID, 336 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT), 337 WMI_PDEV_SEND_BCN_CMDID, 338 WMI_BCN_TMPL_CMDID, 339 WMI_BCN_FILTER_RX_CMDID, 340 WMI_PRB_REQ_FILTER_RX_CMDID, 341 WMI_MGMT_TX_CMDID, 342 WMI_PRB_TMPL_CMDID, 343 WMI_MGMT_TX_SEND_CMDID, 344 WMI_OFFCHAN_DATA_TX_SEND_CMDID, 345 WMI_PDEV_SEND_FD_CMDID, 346 WMI_BCN_OFFLOAD_CTRL_CMDID, 347 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID, 348 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID, 349 WMI_FILS_DISCOVERY_TMPL_CMDID, 350 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 351 WMI_ADDBA_SEND_CMDID, 352 WMI_ADDBA_STATUS_CMDID, 353 WMI_DELBA_SEND_CMDID, 354 WMI_ADDBA_SET_RESP_CMDID, 355 WMI_SEND_SINGLEAMSDU_CMDID, 356 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS), 357 WMI_STA_POWERSAVE_PARAM_CMDID, 358 WMI_STA_MIMO_PS_MODE_CMDID, 359 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS), 360 WMI_PDEV_DFS_DISABLE_CMDID, 361 WMI_DFS_PHYERR_FILTER_ENA_CMDID, 362 WMI_DFS_PHYERR_FILTER_DIS_CMDID, 363 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID, 364 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID, 365 WMI_VDEV_ADFS_CH_CFG_CMDID, 366 WMI_VDEV_ADFS_OCAC_ABORT_CMDID, 367 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM), 368 WMI_ROAM_SCAN_RSSI_THRESHOLD, 369 WMI_ROAM_SCAN_PERIOD, 370 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 371 WMI_ROAM_AP_PROFILE, 372 WMI_ROAM_CHAN_LIST, 373 WMI_ROAM_SCAN_CMD, 374 WMI_ROAM_SYNCH_COMPLETE, 375 WMI_ROAM_SET_RIC_REQUEST_CMDID, 376 WMI_ROAM_INVOKE_CMDID, 377 WMI_ROAM_FILTER_CMDID, 378 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID, 379 WMI_ROAM_CONFIGURE_MAWC_CMDID, 380 WMI_ROAM_SET_MBO_PARAM_CMDID, 381 WMI_ROAM_PER_CONFIG_CMDID, 382 WMI_ROAM_BTM_CONFIG_CMDID, 383 WMI_ENABLE_FILS_CMDID, 384 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN), 385 WMI_OFL_SCAN_REMOVE_AP_PROFILE, 386 WMI_OFL_SCAN_PERIOD, 387 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P), 388 WMI_P2P_DEV_SET_DISCOVERABILITY, 389 WMI_P2P_GO_SET_BEACON_IE, 390 WMI_P2P_GO_SET_PROBE_RESP_IE, 391 WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 392 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID, 393 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID, 394 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID, 395 WMI_P2P_SET_OPPPS_PARAM_CMDID, 396 WMI_P2P_LISTEN_OFFLOAD_START_CMDID, 397 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID, 398 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS), 399 WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 400 WMI_AP_PS_EGAP_PARAM_CMDID, 401 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL), 402 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE), 403 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 404 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 405 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 406 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 407 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 408 WMI_PDEV_RESUME_CMDID, 409 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER), 410 WMI_RMV_BCN_FILTER_CMDID, 411 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW), 412 WMI_WOW_DEL_WAKE_PATTERN_CMDID, 413 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 414 WMI_WOW_ENABLE_CMDID, 415 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 416 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID, 417 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID, 418 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID, 419 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID, 420 WMI_D0_WOW_ENABLE_DISABLE_CMDID, 421 WMI_EXTWOW_ENABLE_CMDID, 422 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID, 423 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID, 424 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID, 425 WMI_WOW_UDP_SVC_OFLD_CMDID, 426 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID, 427 WMI_WOW_SET_ACTION_WAKE_UP_CMDID, 428 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT), 429 WMI_RTT_TSF_CMDID, 430 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL), 431 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 432 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS), 433 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID, 434 WMI_REQUEST_STATS_EXT_CMDID, 435 WMI_REQUEST_LINK_STATS_CMDID, 436 WMI_START_LINK_STATS_CMDID, 437 WMI_CLEAR_LINK_STATS_CMDID, 438 WMI_GET_FW_MEM_DUMP_CMDID, 439 WMI_DEBUG_MESG_FLUSH_CMDID, 440 WMI_DIAG_EVENT_LOG_CONFIG_CMDID, 441 WMI_REQUEST_WLAN_STATS_CMDID, 442 WMI_REQUEST_RCPI_CMDID, 443 WMI_REQUEST_PEER_STATS_INFO_CMDID, 444 WMI_REQUEST_RADIO_CHAN_STATS_CMDID, 445 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL), 446 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID, 447 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID, 448 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 449 WMI_APFIND_CMDID, 450 WMI_PASSPOINT_LIST_CONFIG_CMDID, 451 WMI_NLO_CONFIGURE_MAWC_CMDID, 452 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 453 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 454 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 455 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER), 456 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID, 457 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID, 458 WMI_CHATTER_COALESCING_QUERY_CMDID, 459 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA), 460 WMI_PEER_TID_DELBA_CMDID, 461 WMI_STA_DTIM_PS_METHOD_CMDID, 462 WMI_STA_UAPSD_AUTO_TRIG_CMDID, 463 WMI_STA_KEEPALIVE_CMDID, 464 WMI_BA_REQ_SSN_CMDID, 465 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC), 466 WMI_PDEV_UTF_CMDID, 467 WMI_DBGLOG_CFG_CMDID, 468 WMI_PDEV_QVIT_CMDID, 469 WMI_PDEV_FTM_INTG_CMDID, 470 WMI_VDEV_SET_KEEPALIVE_CMDID, 471 WMI_VDEV_GET_KEEPALIVE_CMDID, 472 WMI_FORCE_FW_HANG_CMDID, 473 WMI_SET_MCASTBCAST_FILTER_CMDID, 474 WMI_THERMAL_MGMT_CMDID, 475 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID, 476 WMI_TPC_CHAINMASK_CONFIG_CMDID, 477 WMI_SET_ANTENNA_DIVERSITY_CMDID, 478 WMI_OCB_SET_SCHED_CMDID, 479 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID, 480 WMI_LRO_CONFIG_CMDID, 481 WMI_TRANSFER_DATA_TO_FLASH_CMDID, 482 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID, 483 WMI_VDEV_WISA_CMDID, 484 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 485 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 486 WMI_READ_DATA_FROM_FLASH_CMDID, 487 WMI_THERM_THROT_SET_CONF_CMDID, 488 WMI_RUNTIME_DPD_RECAL_CMDID, 489 WMI_GET_TPC_POWER_CMDID, 490 WMI_IDLE_TRIGGER_MONITOR_CMDID, 491 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 492 WMI_GPIO_OUTPUT_CMDID, 493 WMI_TXBF_CMDID, 494 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST), 495 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID, 496 WMI_UNIT_TEST_CMDID, 497 WMI_FWTEST_CMDID, 498 WMI_QBOOST_CFG_CMDID, 499 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS), 500 WMI_TDLS_PEER_UPDATE_CMDID, 501 WMI_TDLS_SET_OFFCHAN_MODE_CMDID, 502 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR), 503 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID, 504 WMI_RESMGR_SET_CHAN_LATENCY_CMDID, 505 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 506 WMI_STA_SMPS_PARAM_CMDID, 507 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB), 508 WMI_HB_SET_TCP_PARAMS_CMDID, 509 WMI_HB_SET_TCP_PKT_FILTER_CMDID, 510 WMI_HB_SET_UDP_PARAMS_CMDID, 511 WMI_HB_SET_UDP_PKT_FILTER_CMDID, 512 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC), 513 WMI_RMC_SET_ACTION_PERIOD_CMDID, 514 WMI_RMC_CONFIG_CMDID, 515 WMI_RMC_SET_MANUAL_LEADER_CMDID, 516 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL), 517 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID, 518 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 519 WMI_BATCH_SCAN_DISABLE_CMDID, 520 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID, 521 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM), 522 WMI_OEM_REQUEST_CMDID, 523 WMI_LPI_OEM_REQ_CMDID, 524 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN), 525 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX), 526 WMI_CHAN_AVOID_UPDATE_CMDID, 527 WMI_COEX_CONFIG_CMDID, 528 WMI_CHAN_AVOID_RPT_ALLOW_CMDID, 529 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID, 530 WMI_SAR_LIMITS_CMDID, 531 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL), 532 WMI_OBSS_SCAN_DISABLE_CMDID, 533 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID, 534 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI), 535 WMI_LPI_START_SCAN_CMDID, 536 WMI_LPI_STOP_SCAN_CMDID, 537 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 538 WMI_EXTSCAN_STOP_CMDID, 539 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID, 540 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID, 541 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID, 542 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID, 543 WMI_EXTSCAN_SET_CAPABILITIES_CMDID, 544 WMI_EXTSCAN_GET_CAPABILITIES_CMDID, 545 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID, 546 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID, 547 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL), 548 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA), 549 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 550 WMI_MDNS_SET_FQDN_CMDID, 551 WMI_MDNS_SET_RESPONSE_CMDID, 552 WMI_MDNS_GET_STATS_CMDID, 553 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 554 WMI_SAP_SET_BLACKLIST_PARAM_CMDID, 555 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB), 556 WMI_OCB_SET_UTC_TIME_CMDID, 557 WMI_OCB_START_TIMING_ADVERT_CMDID, 558 WMI_OCB_STOP_TIMING_ADVERT_CMDID, 559 WMI_OCB_GET_TSF_TIMER_CMDID, 560 WMI_DCC_GET_STATS_CMDID, 561 WMI_DCC_CLEAR_STATS_CMDID, 562 WMI_DCC_UPDATE_NDL_CMDID, 563 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC), 564 WMI_SOC_SET_HW_MODE_CMDID, 565 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID, 566 WMI_SOC_SET_ANTENNA_MODE_CMDID, 567 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER), 568 WMI_PACKET_FILTER_ENABLE_CMDID, 569 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC), 570 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD), 571 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 572 WMI_BPF_GET_VDEV_STATS_CMDID, 573 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID, 574 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID, 575 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID, 576 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR), 577 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 578 WMI_11D_SCAN_START_CMDID, 579 WMI_11D_SCAN_STOP_CMDID, 580 WMI_SET_INIT_COUNTRY_CMDID, 581 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 582 WMI_NDP_INITIATOR_REQ_CMDID, 583 WMI_NDP_RESPONDER_REQ_CMDID, 584 WMI_NDP_END_REQ_CMDID, 585 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER), 586 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT), 587 WMI_TWT_DISABLE_CMDID, 588 WMI_TWT_ADD_DIALOG_CMDID, 589 WMI_TWT_DEL_DIALOG_CMDID, 590 WMI_TWT_PAUSE_DIALOG_CMDID, 591 WMI_TWT_RESUME_DIALOG_CMDID, 592 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID = 593 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE), 594 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID, 595 }; 596 597 enum wmi_tlv_event_id { 598 WMI_SERVICE_READY_EVENTID = 0x1, 599 WMI_READY_EVENTID, 600 WMI_SERVICE_AVAILABLE_EVENTID, 601 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 602 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV), 603 WMI_CHAN_INFO_EVENTID, 604 WMI_PHYERR_EVENTID, 605 WMI_PDEV_DUMP_EVENTID, 606 WMI_TX_PAUSE_EVENTID, 607 WMI_DFS_RADAR_EVENTID, 608 WMI_PDEV_L1SS_TRACK_EVENTID, 609 WMI_PDEV_TEMPERATURE_EVENTID, 610 WMI_SERVICE_READY_EXT_EVENTID, 611 WMI_PDEV_FIPS_EVENTID, 612 WMI_PDEV_CHANNEL_HOPPING_EVENTID, 613 WMI_PDEV_ANI_CCK_LEVEL_EVENTID, 614 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID, 615 WMI_PDEV_TPC_EVENTID, 616 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 617 WMI_PDEV_SET_HW_MODE_RESP_EVENTID, 618 WMI_PDEV_HW_MODE_TRANSITION_EVENTID, 619 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID, 620 WMI_PDEV_ANTDIV_STATUS_EVENTID, 621 WMI_PDEV_CHIP_POWER_STATS_EVENTID, 622 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID, 623 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID, 624 WMI_PDEV_CHECK_CAL_VERSION_EVENTID, 625 WMI_PDEV_DIV_RSSI_ANTID_EVENTID, 626 WMI_PDEV_BSS_CHAN_INFO_EVENTID, 627 WMI_PDEV_UPDATE_CTLTABLE_EVENTID, 628 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, 629 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, 630 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, 631 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID, 632 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID, 633 WMI_PDEV_RAP_INFO_EVENTID, 634 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID, 635 WMI_SERVICE_READY_EXT2_EVENTID, 636 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), 637 WMI_VDEV_STOPPED_EVENTID, 638 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 639 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID, 640 WMI_VDEV_TSF_REPORT_EVENTID, 641 WMI_VDEV_DELETE_RESP_EVENTID, 642 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID, 643 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID, 644 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER), 645 WMI_PEER_INFO_EVENTID, 646 WMI_PEER_TX_FAIL_CNT_THR_EVENTID, 647 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID, 648 WMI_PEER_STATE_EVENTID, 649 WMI_PEER_ASSOC_CONF_EVENTID, 650 WMI_PEER_DELETE_RESP_EVENTID, 651 WMI_PEER_RATECODE_LIST_EVENTID, 652 WMI_WDS_PEER_EVENTID, 653 WMI_PEER_STA_PS_STATECHG_EVENTID, 654 WMI_PEER_ANTDIV_INFO_EVENTID, 655 WMI_PEER_RESERVED0_EVENTID, 656 WMI_PEER_RESERVED1_EVENTID, 657 WMI_PEER_RESERVED2_EVENTID, 658 WMI_PEER_RESERVED3_EVENTID, 659 WMI_PEER_RESERVED4_EVENTID, 660 WMI_PEER_RESERVED5_EVENTID, 661 WMI_PEER_RESERVED6_EVENTID, 662 WMI_PEER_RESERVED7_EVENTID, 663 WMI_PEER_RESERVED8_EVENTID, 664 WMI_PEER_RESERVED9_EVENTID, 665 WMI_PEER_RESERVED10_EVENTID, 666 WMI_PEER_OPER_MODE_CHANGE_EVENTID, 667 WMI_PEER_TX_PN_RESPONSE_EVENTID, 668 WMI_PEER_CFR_CAPTURE_EVENTID, 669 WMI_PEER_CREATE_CONF_EVENTID, 670 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), 671 WMI_HOST_SWBA_EVENTID, 672 WMI_TBTTOFFSET_UPDATE_EVENTID, 673 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID, 674 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID, 675 WMI_MGMT_TX_COMPLETION_EVENTID, 676 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID, 677 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID, 678 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID, 679 WMI_HOST_FILS_DISCOVERY_EVENTID, 680 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 681 WMI_TX_ADDBA_COMPLETE_EVENTID, 682 WMI_BA_RSP_SSN_EVENTID, 683 WMI_AGGR_STATE_TRIG_EVENTID, 684 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM), 685 WMI_PROFILE_MATCH, 686 WMI_ROAM_SYNCH_EVENTID, 687 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P), 688 WMI_P2P_NOA_EVENTID, 689 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID, 690 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS), 691 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 692 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW), 693 WMI_D0_WOW_DISABLE_ACK_EVENTID, 694 WMI_WOW_INITIAL_WAKEUP_EVENTID, 695 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT), 696 WMI_TSF_MEASUREMENT_REPORT_EVENTID, 697 WMI_RTT_ERROR_REPORT_EVENTID, 698 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS), 699 WMI_IFACE_LINK_STATS_EVENTID, 700 WMI_PEER_LINK_STATS_EVENTID, 701 WMI_RADIO_LINK_STATS_EVENTID, 702 WMI_UPDATE_FW_MEM_DUMP_EVENTID, 703 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID, 704 WMI_INST_RSSI_STATS_EVENTID, 705 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID, 706 WMI_REPORT_STATS_EVENTID, 707 WMI_UPDATE_RCPI_EVENTID, 708 WMI_PEER_STATS_INFO_EVENTID, 709 WMI_RADIO_CHAN_STATS_EVENTID, 710 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 711 WMI_NLO_SCAN_COMPLETE_EVENTID, 712 WMI_APFIND_EVENTID, 713 WMI_PASSPOINT_MATCH_EVENTID, 714 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 715 WMI_GTK_REKEY_FAIL_EVENTID, 716 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 717 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER), 718 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS), 719 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID, 720 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID, 721 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC), 722 WMI_PDEV_UTF_EVENTID, 723 WMI_DEBUG_MESG_EVENTID, 724 WMI_UPDATE_STATS_EVENTID, 725 WMI_DEBUG_PRINT_EVENTID, 726 WMI_DCS_INTERFERENCE_EVENTID, 727 WMI_PDEV_QVIT_EVENTID, 728 WMI_WLAN_PROFILE_DATA_EVENTID, 729 WMI_PDEV_FTM_INTG_EVENTID, 730 WMI_WLAN_FREQ_AVOID_EVENTID, 731 WMI_VDEV_GET_KEEPALIVE_EVENTID, 732 WMI_THERMAL_MGMT_EVENTID, 733 WMI_DIAG_DATA_CONTAINER_EVENTID, 734 WMI_HOST_AUTO_SHUTDOWN_EVENTID, 735 WMI_UPDATE_WHAL_MIB_STATS_EVENTID, 736 WMI_UPDATE_VDEV_RATE_STATS_EVENTID, 737 WMI_DIAG_EVENTID, 738 WMI_OCB_SET_SCHED_EVENTID, 739 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID, 740 WMI_RSSI_BREACH_EVENTID, 741 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID, 742 WMI_PDEV_UTF_SCPC_EVENTID, 743 WMI_READ_DATA_FROM_FLASH_EVENTID, 744 WMI_REPORT_RX_AGGR_FAILURE_EVENTID, 745 WMI_PKGID_EVENTID, 746 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO), 747 WMI_UPLOADH_EVENTID, 748 WMI_CAPTUREH_EVENTID, 749 WMI_RFKILL_STATE_CHANGE_EVENTID, 750 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS), 751 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 752 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 753 WMI_BATCH_SCAN_RESULT_EVENTID, 754 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM), 755 WMI_OEM_MEASUREMENT_REPORT_EVENTID, 756 WMI_OEM_ERROR_REPORT_EVENTID, 757 WMI_OEM_RESPONSE_EVENTID, 758 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN), 759 WMI_NAN_DISC_IFACE_CREATED_EVENTID, 760 WMI_NAN_DISC_IFACE_DELETED_EVENTID, 761 WMI_NAN_STARTED_CLUSTER_EVENTID, 762 WMI_NAN_JOINED_CLUSTER_EVENTID, 763 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX), 764 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI), 765 WMI_LPI_STATUS_EVENTID, 766 WMI_LPI_HANDOFF_EVENTID, 767 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 768 WMI_EXTSCAN_OPERATION_EVENTID, 769 WMI_EXTSCAN_TABLE_USAGE_EVENTID, 770 WMI_EXTSCAN_CACHED_RESULTS_EVENTID, 771 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID, 772 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID, 773 WMI_EXTSCAN_CAPABILITIES_EVENTID, 774 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID, 775 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 776 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 777 WMI_SAP_OFL_DEL_STA_EVENTID, 778 WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID = 779 WMI_EVT_GRP_START_ID(WMI_GRP_OBSS_OFL), 780 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB), 781 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID, 782 WMI_DCC_GET_STATS_RESP_EVENTID, 783 WMI_DCC_UPDATE_NDL_RESP_EVENTID, 784 WMI_DCC_STATS_EVENTID, 785 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC), 786 WMI_SOC_HW_MODE_TRANSITION_EVENTID, 787 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID, 788 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC), 789 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 790 WMI_BPF_VDEV_STATS_INFO_EVENTID, 791 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC), 792 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 793 WMI_11D_NEW_COUNTRY_EVENTID, 794 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 795 WMI_NDP_INITIATOR_RSP_EVENTID, 796 WMI_NDP_RESPONDER_RSP_EVENTID, 797 WMI_NDP_END_RSP_EVENTID, 798 WMI_NDP_INDICATION_EVENTID, 799 WMI_NDP_CONFIRM_EVENTID, 800 WMI_NDP_END_INDICATION_EVENTID, 801 802 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT), 803 WMI_TWT_DISABLE_EVENTID, 804 WMI_TWT_ADD_DIALOG_EVENTID, 805 WMI_TWT_DEL_DIALOG_EVENTID, 806 WMI_TWT_PAUSE_DIALOG_EVENTID, 807 WMI_TWT_RESUME_DIALOG_EVENTID, 808 }; 809 810 enum wmi_tlv_pdev_param { 811 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 812 WMI_PDEV_PARAM_RX_CHAIN_MASK, 813 WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 814 WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 815 WMI_PDEV_PARAM_TXPOWER_SCALE, 816 WMI_PDEV_PARAM_BEACON_GEN_MODE, 817 WMI_PDEV_PARAM_BEACON_TX_MODE, 818 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 819 WMI_PDEV_PARAM_PROTECTION_MODE, 820 WMI_PDEV_PARAM_DYNAMIC_BW, 821 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 822 WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 823 WMI_PDEV_PARAM_STA_KICKOUT_TH, 824 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 825 WMI_PDEV_PARAM_LTR_ENABLE, 826 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 827 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 828 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 829 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 830 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 831 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 832 WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 833 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 834 WMI_PDEV_PARAM_L1SS_ENABLE, 835 WMI_PDEV_PARAM_DSLEEP_ENABLE, 836 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 837 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 838 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 839 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 840 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 841 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 842 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 843 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 844 WMI_PDEV_PARAM_PMF_QOS, 845 WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 846 WMI_PDEV_PARAM_DCS, 847 WMI_PDEV_PARAM_ANI_ENABLE, 848 WMI_PDEV_PARAM_ANI_POLL_PERIOD, 849 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 850 WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 851 WMI_PDEV_PARAM_ANI_CCK_LEVEL, 852 WMI_PDEV_PARAM_DYNTXCHAIN, 853 WMI_PDEV_PARAM_PROXY_STA, 854 WMI_PDEV_PARAM_IDLE_PS_CONFIG, 855 WMI_PDEV_PARAM_POWER_GATING_SLEEP, 856 WMI_PDEV_PARAM_RFKILL_ENABLE, 857 WMI_PDEV_PARAM_BURST_DUR, 858 WMI_PDEV_PARAM_BURST_ENABLE, 859 WMI_PDEV_PARAM_HW_RFKILL_CONFIG, 860 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE, 861 WMI_PDEV_PARAM_L1SS_TRACK, 862 WMI_PDEV_PARAM_HYST_EN, 863 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE, 864 WMI_PDEV_PARAM_LED_SYS_STATE, 865 WMI_PDEV_PARAM_LED_ENABLE, 866 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY, 867 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE, 868 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE, 869 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD, 870 WMI_PDEV_PARAM_CTS_CBW, 871 WMI_PDEV_PARAM_WNTS_CONFIG, 872 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE, 873 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP, 874 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP, 875 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP, 876 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE, 877 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT, 878 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP, 879 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT, 880 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE, 881 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE, 882 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G, 883 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G, 884 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G, 885 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G, 886 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK, 887 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS, 888 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG, 889 WMI_PDEV_PARAM_TXPOWER_DECR_DB, 890 WMI_PDEV_PARAM_AGGR_BURST, 891 WMI_PDEV_PARAM_RX_DECAP_MODE, 892 WMI_PDEV_PARAM_FAST_CHANNEL_RESET, 893 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 894 WMI_PDEV_PARAM_ANTENNA_GAIN, 895 WMI_PDEV_PARAM_RX_FILTER, 896 WMI_PDEV_SET_MCAST_TO_UCAST_TID, 897 WMI_PDEV_PARAM_PROXY_STA_MODE, 898 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE, 899 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 900 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 901 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE, 902 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 903 WMI_PDEV_PARAM_BLOCK_INTERBSS, 904 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 905 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID, 906 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 907 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 908 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 909 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID, 910 WMI_PDEV_PARAM_EN_STATS, 911 WMI_PDEV_PARAM_MU_GROUP_POLICY, 912 WMI_PDEV_PARAM_NOISE_DETECTION, 913 WMI_PDEV_PARAM_NOISE_THRESHOLD, 914 WMI_PDEV_PARAM_DPD_ENABLE, 915 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 916 WMI_PDEV_PARAM_ATF_STRICT_SCH, 917 WMI_PDEV_PARAM_ATF_SCHED_DURATION, 918 WMI_PDEV_PARAM_ANT_PLZN, 919 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT, 920 WMI_PDEV_PARAM_SENSITIVITY_LEVEL, 921 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G, 922 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G, 923 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 924 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 925 WMI_PDEV_PARAM_CCA_THRESHOLD, 926 WMI_PDEV_PARAM_RTS_FIXED_RATE, 927 WMI_PDEV_PARAM_PDEV_RESET, 928 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET, 929 WMI_PDEV_PARAM_ARP_DBG_SRCADDR, 930 WMI_PDEV_PARAM_ARP_DBG_DSTADDR, 931 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 932 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 933 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE, 934 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 935 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT, 936 WMI_PDEV_PARAM_PROPAGATION_DELAY, 937 WMI_PDEV_PARAM_ENA_ANT_DIV, 938 WMI_PDEV_PARAM_FORCE_CHAIN_ANT, 939 WMI_PDEV_PARAM_ANT_DIV_SELFTEST, 940 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL, 941 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD, 942 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS, 943 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN, 944 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN, 945 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN, 946 WMI_PDEV_PARAM_TX_SCH_DELAY, 947 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING, 948 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU, 949 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE, 950 WMI_PDEV_PARAM_FAST_PWR_TRANSITION, 951 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE, 952 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE, 953 WMI_PDEV_PARAM_MESH_MCAST_ENABLE, 954 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_THRESHOLD = 0xbc, 955 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_PER_AC = 0xbe, 956 WMI_PDEV_PARAM_ENABLE_SR_PROHIBIT = 0xc6, 957 }; 958 959 enum wmi_tlv_vdev_param { 960 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 961 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 962 WMI_VDEV_PARAM_BEACON_INTERVAL, 963 WMI_VDEV_PARAM_LISTEN_INTERVAL, 964 WMI_VDEV_PARAM_MULTICAST_RATE, 965 WMI_VDEV_PARAM_MGMT_TX_RATE, 966 WMI_VDEV_PARAM_SLOT_TIME, 967 WMI_VDEV_PARAM_PREAMBLE, 968 WMI_VDEV_PARAM_SWBA_TIME, 969 WMI_VDEV_STATS_UPDATE_PERIOD, 970 WMI_VDEV_PWRSAVE_AGEOUT_TIME, 971 WMI_VDEV_HOST_SWBA_INTERVAL, 972 WMI_VDEV_PARAM_DTIM_PERIOD, 973 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 974 WMI_VDEV_PARAM_WDS, 975 WMI_VDEV_PARAM_ATIM_WINDOW, 976 WMI_VDEV_PARAM_BMISS_COUNT_MAX, 977 WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 978 WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 979 WMI_VDEV_PARAM_FEATURE_WMM, 980 WMI_VDEV_PARAM_CHWIDTH, 981 WMI_VDEV_PARAM_CHEXTOFFSET, 982 WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 983 WMI_VDEV_PARAM_STA_QUICKKICKOUT, 984 WMI_VDEV_PARAM_MGMT_RATE, 985 WMI_VDEV_PARAM_PROTECTION_MODE, 986 WMI_VDEV_PARAM_FIXED_RATE, 987 WMI_VDEV_PARAM_SGI, 988 WMI_VDEV_PARAM_LDPC, 989 WMI_VDEV_PARAM_TX_STBC, 990 WMI_VDEV_PARAM_RX_STBC, 991 WMI_VDEV_PARAM_INTRA_BSS_FWD, 992 WMI_VDEV_PARAM_DEF_KEYID, 993 WMI_VDEV_PARAM_NSS, 994 WMI_VDEV_PARAM_BCAST_DATA_RATE, 995 WMI_VDEV_PARAM_MCAST_DATA_RATE, 996 WMI_VDEV_PARAM_MCAST_INDICATE, 997 WMI_VDEV_PARAM_DHCP_INDICATE, 998 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 999 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 1000 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 1001 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 1002 WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 1003 WMI_VDEV_PARAM_ENABLE_RTSCTS, 1004 WMI_VDEV_PARAM_TXBF, 1005 WMI_VDEV_PARAM_PACKET_POWERSAVE, 1006 WMI_VDEV_PARAM_DROP_UNENCRY, 1007 WMI_VDEV_PARAM_TX_ENCAP_TYPE, 1008 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 1009 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 1010 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 1011 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 1012 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP, 1013 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP, 1014 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 1015 WMI_VDEV_PARAM_TX_PWRLIMIT, 1016 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL, 1017 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD, 1018 WMI_VDEV_PARAM_ENABLE_RMC, 1019 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS, 1020 WMI_VDEV_PARAM_MAX_RATE, 1021 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE, 1022 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR, 1023 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT, 1024 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE, 1025 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED, 1026 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED, 1027 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED, 1028 WMI_VDEV_PARAM_INACTIVITY_CNT, 1029 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS, 1030 WMI_VDEV_PARAM_DTIM_POLICY, 1031 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS, 1032 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE, 1033 WMI_VDEV_PARAM_RX_LEAK_WINDOW, 1034 WMI_VDEV_PARAM_STATS_AVG_FACTOR, 1035 WMI_VDEV_PARAM_DISCONNECT_TH, 1036 WMI_VDEV_PARAM_RTSCTS_RATE, 1037 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE, 1038 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE, 1039 WMI_VDEV_PARAM_TXPOWER_SCALE, 1040 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB, 1041 WMI_VDEV_PARAM_MCAST2UCAST_SET, 1042 WMI_VDEV_PARAM_RC_NUM_RETRIES, 1043 WMI_VDEV_PARAM_CABQ_MAXDUR, 1044 WMI_VDEV_PARAM_MFPTEST_SET, 1045 WMI_VDEV_PARAM_RTS_FIXED_RATE, 1046 WMI_VDEV_PARAM_VHT_SGIMASK, 1047 WMI_VDEV_PARAM_VHT80_RATEMASK, 1048 WMI_VDEV_PARAM_PROXY_STA, 1049 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE, 1050 WMI_VDEV_PARAM_RX_DECAP_TYPE, 1051 WMI_VDEV_PARAM_BW_NSS_RATEMASK, 1052 WMI_VDEV_PARAM_SENSOR_AP, 1053 WMI_VDEV_PARAM_BEACON_RATE, 1054 WMI_VDEV_PARAM_DTIM_ENABLE_CTS, 1055 WMI_VDEV_PARAM_STA_KICKOUT, 1056 WMI_VDEV_PARAM_CAPABILITIES, 1057 WMI_VDEV_PARAM_TSF_INCREMENT, 1058 WMI_VDEV_PARAM_AMPDU_PER_AC, 1059 WMI_VDEV_PARAM_RX_FILTER, 1060 WMI_VDEV_PARAM_MGMT_TX_POWER, 1061 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH, 1062 WMI_VDEV_PARAM_AGG_SW_RETRY_TH, 1063 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS, 1064 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 1065 WMI_VDEV_PARAM_HE_DCM, 1066 WMI_VDEV_PARAM_HE_RANGE_EXT, 1067 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, 1068 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, 1069 WMI_VDEV_PARAM_HE_LTF = 0x74, 1070 WMI_VDEV_PARAM_BA_MODE = 0x7e, 1071 WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80, 1072 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, 1073 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99, 1074 WMI_VDEV_PARAM_PROTOTYPE = 0x8000, 1075 WMI_VDEV_PARAM_BSS_COLOR, 1076 WMI_VDEV_PARAM_SET_HEMU_MODE, 1077 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003, 1078 }; 1079 1080 enum wmi_tlv_peer_flags { 1081 WMI_TLV_PEER_AUTH = 0x00000001, 1082 WMI_TLV_PEER_QOS = 0x00000002, 1083 WMI_TLV_PEER_NEED_PTK_4_WAY = 0x00000004, 1084 WMI_TLV_PEER_NEED_GTK_2_WAY = 0x00000010, 1085 WMI_TLV_PEER_APSD = 0x00000800, 1086 WMI_TLV_PEER_HT = 0x00001000, 1087 WMI_TLV_PEER_40MHZ = 0x00002000, 1088 WMI_TLV_PEER_STBC = 0x00008000, 1089 WMI_TLV_PEER_LDPC = 0x00010000, 1090 WMI_TLV_PEER_DYN_MIMOPS = 0x00020000, 1091 WMI_TLV_PEER_STATIC_MIMOPS = 0x00040000, 1092 WMI_TLV_PEER_SPATIAL_MUX = 0x00200000, 1093 WMI_TLV_PEER_VHT = 0x02000000, 1094 WMI_TLV_PEER_80MHZ = 0x04000000, 1095 WMI_TLV_PEER_PMF = 0x08000000, 1096 WMI_PEER_IS_P2P_CAPABLE = 0x20000000, 1097 WMI_PEER_160MHZ = 0x40000000, 1098 WMI_PEER_SAFEMODE_EN = 0x80000000, 1099 1100 }; 1101 1102 /** Enum list of TLV Tags for each parameter structure type. */ 1103 enum wmi_tlv_tag { 1104 WMI_TAG_LAST_RESERVED = 15, 1105 WMI_TAG_FIRST_ARRAY_ENUM, 1106 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM, 1107 WMI_TAG_ARRAY_BYTE, 1108 WMI_TAG_ARRAY_STRUCT, 1109 WMI_TAG_ARRAY_FIXED_STRUCT, 1110 WMI_TAG_LAST_ARRAY_ENUM = 31, 1111 WMI_TAG_SERVICE_READY_EVENT, 1112 WMI_TAG_HAL_REG_CAPABILITIES, 1113 WMI_TAG_WLAN_HOST_MEM_REQ, 1114 WMI_TAG_READY_EVENT, 1115 WMI_TAG_SCAN_EVENT, 1116 WMI_TAG_PDEV_TPC_CONFIG_EVENT, 1117 WMI_TAG_CHAN_INFO_EVENT, 1118 WMI_TAG_COMB_PHYERR_RX_HDR, 1119 WMI_TAG_VDEV_START_RESPONSE_EVENT, 1120 WMI_TAG_VDEV_STOPPED_EVENT, 1121 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT, 1122 WMI_TAG_PEER_STA_KICKOUT_EVENT, 1123 WMI_TAG_MGMT_RX_HDR, 1124 WMI_TAG_TBTT_OFFSET_EVENT, 1125 WMI_TAG_TX_DELBA_COMPLETE_EVENT, 1126 WMI_TAG_TX_ADDBA_COMPLETE_EVENT, 1127 WMI_TAG_ROAM_EVENT, 1128 WMI_TAG_WOW_EVENT_INFO, 1129 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP, 1130 WMI_TAG_RTT_EVENT_HEADER, 1131 WMI_TAG_RTT_ERROR_REPORT_EVENT, 1132 WMI_TAG_RTT_MEAS_EVENT, 1133 WMI_TAG_ECHO_EVENT, 1134 WMI_TAG_FTM_INTG_EVENT, 1135 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT, 1136 WMI_TAG_GPIO_INPUT_EVENT, 1137 WMI_TAG_CSA_EVENT, 1138 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT, 1139 WMI_TAG_IGTK_INFO, 1140 WMI_TAG_DCS_INTERFERENCE_EVENT, 1141 WMI_TAG_ATH_DCS_CW_INT, 1142 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */ 1143 WMI_TAG_ATH_DCS_CW_INT, 1144 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1145 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */ 1146 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1147 WMI_TAG_WLAN_PROFILE_CTX_T, 1148 WMI_TAG_WLAN_PROFILE_T, 1149 WMI_TAG_PDEV_QVIT_EVENT, 1150 WMI_TAG_HOST_SWBA_EVENT, 1151 WMI_TAG_TIM_INFO, 1152 WMI_TAG_P2P_NOA_INFO, 1153 WMI_TAG_STATS_EVENT, 1154 WMI_TAG_AVOID_FREQ_RANGES_EVENT, 1155 WMI_TAG_AVOID_FREQ_RANGE_DESC, 1156 WMI_TAG_GTK_REKEY_FAIL_EVENT, 1157 WMI_TAG_INIT_CMD, 1158 WMI_TAG_RESOURCE_CONFIG, 1159 WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 1160 WMI_TAG_START_SCAN_CMD, 1161 WMI_TAG_STOP_SCAN_CMD, 1162 WMI_TAG_SCAN_CHAN_LIST_CMD, 1163 WMI_TAG_CHANNEL, 1164 WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1165 WMI_TAG_PDEV_SET_PARAM_CMD, 1166 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD, 1167 WMI_TAG_WMM_PARAMS, 1168 WMI_TAG_PDEV_SET_QUIET_CMD, 1169 WMI_TAG_VDEV_CREATE_CMD, 1170 WMI_TAG_VDEV_DELETE_CMD, 1171 WMI_TAG_VDEV_START_REQUEST_CMD, 1172 WMI_TAG_P2P_NOA_DESCRIPTOR, 1173 WMI_TAG_P2P_GO_SET_BEACON_IE, 1174 WMI_TAG_GTK_OFFLOAD_CMD, 1175 WMI_TAG_VDEV_UP_CMD, 1176 WMI_TAG_VDEV_STOP_CMD, 1177 WMI_TAG_VDEV_DOWN_CMD, 1178 WMI_TAG_VDEV_SET_PARAM_CMD, 1179 WMI_TAG_VDEV_INSTALL_KEY_CMD, 1180 WMI_TAG_PEER_CREATE_CMD, 1181 WMI_TAG_PEER_DELETE_CMD, 1182 WMI_TAG_PEER_FLUSH_TIDS_CMD, 1183 WMI_TAG_PEER_SET_PARAM_CMD, 1184 WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1185 WMI_TAG_VHT_RATE_SET, 1186 WMI_TAG_BCN_TMPL_CMD, 1187 WMI_TAG_PRB_TMPL_CMD, 1188 WMI_TAG_BCN_PRB_INFO, 1189 WMI_TAG_PEER_TID_ADDBA_CMD, 1190 WMI_TAG_PEER_TID_DELBA_CMD, 1191 WMI_TAG_STA_POWERSAVE_MODE_CMD, 1192 WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1193 WMI_TAG_STA_DTIM_PS_METHOD_CMD, 1194 WMI_TAG_ROAM_SCAN_MODE, 1195 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD, 1196 WMI_TAG_ROAM_SCAN_PERIOD, 1197 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1198 WMI_TAG_PDEV_SUSPEND_CMD, 1199 WMI_TAG_PDEV_RESUME_CMD, 1200 WMI_TAG_ADD_BCN_FILTER_CMD, 1201 WMI_TAG_RMV_BCN_FILTER_CMD, 1202 WMI_TAG_WOW_ENABLE_CMD, 1203 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 1204 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD, 1205 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM, 1206 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 1207 WMI_TAG_ARP_OFFLOAD_TUPLE, 1208 WMI_TAG_NS_OFFLOAD_TUPLE, 1209 WMI_TAG_FTM_INTG_CMD, 1210 WMI_TAG_STA_KEEPALIVE_CMD, 1211 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 1212 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD, 1213 WMI_TAG_AP_PS_PEER_CMD, 1214 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD, 1215 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD, 1216 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD, 1217 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD, 1218 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD, 1219 WMI_TAG_WOW_DEL_PATTERN_CMD, 1220 WMI_TAG_WOW_ADD_DEL_EVT_CMD, 1221 WMI_TAG_RTT_MEASREQ_HEAD, 1222 WMI_TAG_RTT_MEASREQ_BODY, 1223 WMI_TAG_RTT_TSF_CMD, 1224 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 1225 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 1226 WMI_TAG_REQUEST_STATS_CMD, 1227 WMI_TAG_NLO_CONFIG_CMD, 1228 WMI_TAG_NLO_CONFIGURED_PARAMETERS, 1229 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD, 1230 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD, 1231 WMI_TAG_CHATTER_SET_MODE_CMD, 1232 WMI_TAG_ECHO_CMD, 1233 WMI_TAG_VDEV_SET_KEEPALIVE_CMD, 1234 WMI_TAG_VDEV_GET_KEEPALIVE_CMD, 1235 WMI_TAG_FORCE_FW_HANG_CMD, 1236 WMI_TAG_GPIO_CONFIG_CMD, 1237 WMI_TAG_GPIO_OUTPUT_CMD, 1238 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD, 1239 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD, 1240 WMI_TAG_BCN_TX_HDR, 1241 WMI_TAG_BCN_SEND_FROM_HOST_CMD, 1242 WMI_TAG_MGMT_TX_HDR, 1243 WMI_TAG_ADDBA_CLEAR_RESP_CMD, 1244 WMI_TAG_ADDBA_SEND_CMD, 1245 WMI_TAG_DELBA_SEND_CMD, 1246 WMI_TAG_ADDBA_SETRESPONSE_CMD, 1247 WMI_TAG_SEND_SINGLEAMSDU_CMD, 1248 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD, 1249 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD, 1250 WMI_TAG_PDEV_SET_HT_IE_CMD, 1251 WMI_TAG_PDEV_SET_VHT_IE_CMD, 1252 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD, 1253 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD, 1254 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD, 1255 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD, 1256 WMI_TAG_PEER_MCAST_GROUP_CMD, 1257 WMI_TAG_ROAM_AP_PROFILE, 1258 WMI_TAG_AP_PROFILE, 1259 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD, 1260 WMI_TAG_PDEV_DFS_ENABLE_CMD, 1261 WMI_TAG_PDEV_DFS_DISABLE_CMD, 1262 WMI_TAG_WOW_ADD_PATTERN_CMD, 1263 WMI_TAG_WOW_BITMAP_PATTERN_T, 1264 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T, 1265 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T, 1266 WMI_TAG_WOW_MAGIC_PATTERN_CMD, 1267 WMI_TAG_SCAN_UPDATE_REQUEST_CMD, 1268 WMI_TAG_CHATTER_PKT_COALESCING_FILTER, 1269 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD, 1270 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD, 1271 WMI_TAG_CHATTER_COALESCING_QUERY_CMD, 1272 WMI_TAG_TXBF_CMD, 1273 WMI_TAG_DEBUG_LOG_CONFIG_CMD, 1274 WMI_TAG_NLO_EVENT, 1275 WMI_TAG_CHATTER_QUERY_REPLY_EVENT, 1276 WMI_TAG_UPLOAD_H_HDR, 1277 WMI_TAG_CAPTURE_H_EVENT_HDR, 1278 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD, 1279 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD, 1280 WMI_TAG_VDEV_WMM_ADDTS_CMD, 1281 WMI_TAG_VDEV_WMM_DELTS_CMD, 1282 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 1283 WMI_TAG_TDLS_SET_STATE_CMD, 1284 WMI_TAG_TDLS_PEER_UPDATE_CMD, 1285 WMI_TAG_TDLS_PEER_EVENT, 1286 WMI_TAG_TDLS_PEER_CAPABILITIES, 1287 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD, 1288 WMI_TAG_ROAM_CHAN_LIST, 1289 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT, 1290 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD, 1291 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD, 1292 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD, 1293 WMI_TAG_BA_REQ_SSN_CMD, 1294 WMI_TAG_BA_RSP_SSN_EVENT, 1295 WMI_TAG_STA_SMPS_FORCE_MODE_CMD, 1296 WMI_TAG_SET_MCASTBCAST_FILTER_CMD, 1297 WMI_TAG_P2P_SET_OPPPS_CMD, 1298 WMI_TAG_P2P_SET_NOA_CMD, 1299 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM, 1300 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM, 1301 WMI_TAG_STA_SMPS_PARAM_CMD, 1302 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD, 1303 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD, 1304 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS, 1305 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT, 1306 WMI_TAG_P2P_NOA_EVENT, 1307 WMI_TAG_HB_SET_ENABLE_CMD, 1308 WMI_TAG_HB_SET_TCP_PARAMS_CMD, 1309 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD, 1310 WMI_TAG_HB_SET_UDP_PARAMS_CMD, 1311 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD, 1312 WMI_TAG_HB_IND_EVENT, 1313 WMI_TAG_TX_PAUSE_EVENT, 1314 WMI_TAG_RFKILL_EVENT, 1315 WMI_TAG_DFS_RADAR_EVENT, 1316 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD, 1317 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD, 1318 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST, 1319 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO, 1320 WMI_TAG_BATCH_SCAN_ENABLE_CMD, 1321 WMI_TAG_BATCH_SCAN_DISABLE_CMD, 1322 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD, 1323 WMI_TAG_BATCH_SCAN_ENABLED_EVENT, 1324 WMI_TAG_BATCH_SCAN_RESULT_EVENT, 1325 WMI_TAG_VDEV_PLMREQ_START_CMD, 1326 WMI_TAG_VDEV_PLMREQ_STOP_CMD, 1327 WMI_TAG_THERMAL_MGMT_CMD, 1328 WMI_TAG_THERMAL_MGMT_EVENT, 1329 WMI_TAG_PEER_INFO_REQ_CMD, 1330 WMI_TAG_PEER_INFO_EVENT, 1331 WMI_TAG_PEER_INFO, 1332 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT, 1333 WMI_TAG_RMC_SET_MODE_CMD, 1334 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD, 1335 WMI_TAG_RMC_CONFIG_CMD, 1336 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD, 1337 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD, 1338 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD, 1339 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD, 1340 WMI_TAG_NAN_CMD_PARAM, 1341 WMI_TAG_NAN_EVENT_HDR, 1342 WMI_TAG_PDEV_L1SS_TRACK_EVENT, 1343 WMI_TAG_DIAG_DATA_CONTAINER_EVENT, 1344 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM, 1345 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD, 1346 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT, 1347 WMI_TAG_AGGR_STATE_TRIG_EVENT, 1348 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY, 1349 WMI_TAG_ROAM_SCAN_CMD, 1350 WMI_TAG_REQ_STATS_EXT_CMD, 1351 WMI_TAG_STATS_EXT_EVENT, 1352 WMI_TAG_OBSS_SCAN_ENABLE_CMD, 1353 WMI_TAG_OBSS_SCAN_DISABLE_CMD, 1354 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT, 1355 WMI_TAG_PDEV_SET_LED_CONFIG_CMD, 1356 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD, 1357 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT, 1358 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT, 1359 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM, 1360 WMI_TAG_WOW_IOAC_PKT_PATTERN_T, 1361 WMI_TAG_WOW_IOAC_TMR_PATTERN_T, 1362 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD, 1363 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD, 1364 WMI_TAG_WOW_IOAC_KEEPALIVE_T, 1365 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD, 1366 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD, 1367 WMI_TAG_START_LINK_STATS_CMD, 1368 WMI_TAG_CLEAR_LINK_STATS_CMD, 1369 WMI_TAG_REQUEST_LINK_STATS_CMD, 1370 WMI_TAG_IFACE_LINK_STATS_EVENT, 1371 WMI_TAG_RADIO_LINK_STATS_EVENT, 1372 WMI_TAG_PEER_STATS_EVENT, 1373 WMI_TAG_CHANNEL_STATS, 1374 WMI_TAG_RADIO_LINK_STATS, 1375 WMI_TAG_RATE_STATS, 1376 WMI_TAG_PEER_LINK_STATS, 1377 WMI_TAG_WMM_AC_STATS, 1378 WMI_TAG_IFACE_LINK_STATS, 1379 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD, 1380 WMI_TAG_LPI_START_SCAN_CMD, 1381 WMI_TAG_LPI_STOP_SCAN_CMD, 1382 WMI_TAG_LPI_RESULT_EVENT, 1383 WMI_TAG_PEER_STATE_EVENT, 1384 WMI_TAG_EXTSCAN_BUCKET_CMD, 1385 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT, 1386 WMI_TAG_EXTSCAN_START_CMD, 1387 WMI_TAG_EXTSCAN_STOP_CMD, 1388 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD, 1389 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD, 1390 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD, 1391 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD, 1392 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD, 1393 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD, 1394 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD, 1395 WMI_TAG_EXTSCAN_OPERATION_EVENT, 1396 WMI_TAG_EXTSCAN_START_STOP_EVENT, 1397 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT, 1398 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT, 1399 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT, 1400 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT, 1401 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT, 1402 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT, 1403 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT, 1404 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT, 1405 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT, 1406 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT, 1407 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT, 1408 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD, 1409 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT, 1410 WMI_TAG_UNIT_TEST_CMD, 1411 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM, 1412 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM, 1413 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM, 1414 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM, 1415 WMI_TAG_ROAM_SYNCH_EVENT, 1416 WMI_TAG_ROAM_SYNCH_COMPLETE, 1417 WMI_TAG_EXTWOW_ENABLE_CMD, 1418 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD, 1419 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD, 1420 WMI_TAG_LPI_STATUS_EVENT, 1421 WMI_TAG_LPI_HANDOFF_EVENT, 1422 WMI_TAG_VDEV_RATE_STATS_EVENT, 1423 WMI_TAG_VDEV_RATE_HT_INFO, 1424 WMI_TAG_RIC_REQUEST, 1425 WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1426 WMI_TAG_PDEV_TEMPERATURE_EVENT, 1427 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD, 1428 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD, 1429 WMI_TAG_RIC_TSPEC, 1430 WMI_TAG_TPC_CHAINMASK_CONFIG, 1431 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD, 1432 WMI_TAG_SCAN_PROB_REQ_OUI_CMD, 1433 WMI_TAG_KEY_MATERIAL, 1434 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD, 1435 WMI_TAG_SET_LED_FLASHING_CMD, 1436 WMI_TAG_MDNS_OFFLOAD_CMD, 1437 WMI_TAG_MDNS_SET_FQDN_CMD, 1438 WMI_TAG_MDNS_SET_RESP_CMD, 1439 WMI_TAG_MDNS_GET_STATS_CMD, 1440 WMI_TAG_MDNS_STATS_EVENT, 1441 WMI_TAG_ROAM_INVOKE_CMD, 1442 WMI_TAG_PDEV_RESUME_EVENT, 1443 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD, 1444 WMI_TAG_SAP_OFL_ENABLE_CMD, 1445 WMI_TAG_SAP_OFL_ADD_STA_EVENT, 1446 WMI_TAG_SAP_OFL_DEL_STA_EVENT, 1447 WMI_TAG_APFIND_CMD_PARAM, 1448 WMI_TAG_APFIND_EVENT_HDR, 1449 WMI_TAG_OCB_SET_SCHED_CMD, 1450 WMI_TAG_OCB_SET_SCHED_EVENT, 1451 WMI_TAG_OCB_SET_CONFIG_CMD, 1452 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT, 1453 WMI_TAG_OCB_SET_UTC_TIME_CMD, 1454 WMI_TAG_OCB_START_TIMING_ADVERT_CMD, 1455 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD, 1456 WMI_TAG_OCB_GET_TSF_TIMER_CMD, 1457 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT, 1458 WMI_TAG_DCC_GET_STATS_CMD, 1459 WMI_TAG_DCC_CHANNEL_STATS_REQUEST, 1460 WMI_TAG_DCC_GET_STATS_RESP_EVENT, 1461 WMI_TAG_DCC_CLEAR_STATS_CMD, 1462 WMI_TAG_DCC_UPDATE_NDL_CMD, 1463 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT, 1464 WMI_TAG_DCC_STATS_EVENT, 1465 WMI_TAG_OCB_CHANNEL, 1466 WMI_TAG_OCB_SCHEDULE_ELEMENT, 1467 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL, 1468 WMI_TAG_DCC_NDL_CHAN, 1469 WMI_TAG_QOS_PARAMETER, 1470 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG, 1471 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM, 1472 WMI_TAG_ROAM_FILTER, 1473 WMI_TAG_PASSPOINT_CONFIG_CMD, 1474 WMI_TAG_PASSPOINT_EVENT_HDR, 1475 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD, 1476 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT, 1477 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD, 1478 WMI_TAG_VDEV_TSF_REPORT_EVENT, 1479 WMI_TAG_GET_FW_MEM_DUMP, 1480 WMI_TAG_UPDATE_FW_MEM_DUMP, 1481 WMI_TAG_FW_MEM_DUMP_PARAMS, 1482 WMI_TAG_DEBUG_MESG_FLUSH, 1483 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE, 1484 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION, 1485 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG, 1486 WMI_TAG_VDEV_SET_IE_CMD, 1487 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG, 1488 WMI_TAG_RSSI_BREACH_EVENT, 1489 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP, 1490 WMI_TAG_SOC_SET_PCL_CMD, 1491 WMI_TAG_SOC_SET_HW_MODE_CMD, 1492 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT, 1493 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT, 1494 WMI_TAG_VDEV_TXRX_STREAMS, 1495 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1496 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD, 1497 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT, 1498 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T, 1499 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD, 1500 WMI_TAG_DIAG_EVENT_LOG_CONFIG, 1501 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS, 1502 WMI_TAG_PACKET_FILTER_CONFIG, 1503 WMI_TAG_PACKET_FILTER_ENABLE, 1504 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD, 1505 WMI_TAG_MGMT_TX_SEND_CMD, 1506 WMI_TAG_MGMT_TX_COMPL_EVENT, 1507 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD, 1508 WMI_TAG_WOW_UDP_SVC_OFLD_CMD, 1509 WMI_TAG_LRO_INFO_CMD, 1510 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM, 1511 WMI_TAG_SERVICE_READY_EXT_EVENT, 1512 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD, 1513 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT, 1514 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD, 1515 WMI_TAG_NLO_CONFIGURE_MAWC_CMD, 1516 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD, 1517 WMI_TAG_PEER_ASSOC_CONF_EVENT, 1518 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD, 1519 WMI_TAG_AP_PS_EGAP_PARAM_CMD, 1520 WMI_TAG_AP_PS_EGAP_INFO_EVENT, 1521 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD, 1522 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD, 1523 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT, 1524 WMI_TAG_SCPC_EVENT, 1525 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST, 1526 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT, 1527 WMI_TAG_BPF_GET_CAPABILITY_CMD, 1528 WMI_TAG_BPF_CAPABILITY_INFO_EVT, 1529 WMI_TAG_BPF_GET_VDEV_STATS_CMD, 1530 WMI_TAG_BPF_VDEV_STATS_INFO_EVT, 1531 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD, 1532 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD, 1533 WMI_TAG_VDEV_DELETE_RESP_EVENT, 1534 WMI_TAG_PEER_DELETE_RESP_EVENT, 1535 WMI_TAG_ROAM_DENSE_THRES_PARAM, 1536 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM, 1537 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD, 1538 WMI_TAG_VDEV_CONFIG_RATEMASK, 1539 WMI_TAG_PDEV_FIPS_CMD, 1540 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD, 1541 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD, 1542 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD, 1543 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD, 1544 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD, 1545 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD, 1546 WMI_TAG_PDEV_SET_CTL_TABLE_CMD, 1547 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD, 1548 WMI_TAG_FWTEST_SET_PARAM_CMD, 1549 WMI_TAG_PEER_ATF_REQUEST, 1550 WMI_TAG_VDEV_ATF_REQUEST, 1551 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD, 1552 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD, 1553 WMI_TAG_INST_RSSI_STATS_RESP, 1554 WMI_TAG_MED_UTIL_REPORT_EVENT, 1555 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT, 1556 WMI_TAG_WDS_ADDR_EVENT, 1557 WMI_TAG_PEER_RATECODE_LIST_EVENT, 1558 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT, 1559 WMI_TAG_PDEV_TPC_EVENT, 1560 WMI_TAG_ANI_OFDM_EVENT, 1561 WMI_TAG_ANI_CCK_EVENT, 1562 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT, 1563 WMI_TAG_PDEV_FIPS_EVENT, 1564 WMI_TAG_ATF_PEER_INFO, 1565 WMI_TAG_PDEV_GET_TPC_CMD, 1566 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD, 1567 WMI_TAG_QBOOST_CFG_CMD, 1568 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE, 1569 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES, 1570 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM, 1571 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN, 1572 WMI_TAG_PEER_CCK_OFDM_RATE_INFO, 1573 WMI_TAG_PEER_MCS_RATE_INFO, 1574 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR, 1575 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM, 1576 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM, 1577 WMI_TAG_MU_REPORT_TOTAL_MU, 1578 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD, 1579 WMI_TAG_ROAM_SET_MBO, 1580 WMI_TAG_MIB_STATS_ENABLE_CMD, 1581 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT, 1582 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT, 1583 WMI_TAG_NAN_STARTED_CLUSTER_EVENT, 1584 WMI_TAG_NAN_JOINED_CLUSTER_EVENT, 1585 WMI_TAG_NDI_GET_CAP_REQ, 1586 WMI_TAG_NDP_INITIATOR_REQ, 1587 WMI_TAG_NDP_RESPONDER_REQ, 1588 WMI_TAG_NDP_END_REQ, 1589 WMI_TAG_NDI_CAP_RSP_EVENT, 1590 WMI_TAG_NDP_INITIATOR_RSP_EVENT, 1591 WMI_TAG_NDP_RESPONDER_RSP_EVENT, 1592 WMI_TAG_NDP_END_RSP_EVENT, 1593 WMI_TAG_NDP_INDICATION_EVENT, 1594 WMI_TAG_NDP_CONFIRM_EVENT, 1595 WMI_TAG_NDP_END_INDICATION_EVENT, 1596 WMI_TAG_VDEV_SET_QUIET_CMD, 1597 WMI_TAG_PDEV_SET_PCL_CMD, 1598 WMI_TAG_PDEV_SET_HW_MODE_CMD, 1599 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD, 1600 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD, 1601 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT, 1602 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT, 1603 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1604 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT, 1605 WMI_TAG_COEX_CONFIG_CMD, 1606 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER, 1607 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD, 1608 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1609 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD, 1610 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD, 1611 WMI_TAG_MAC_PHY_CAPABILITIES, 1612 WMI_TAG_HW_MODE_CAPABILITIES, 1613 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS, 1614 WMI_TAG_HAL_REG_CAPABILITIES_EXT, 1615 WMI_TAG_SOC_HAL_REG_CAPABILITIES, 1616 WMI_TAG_VDEV_WISA_CMD, 1617 WMI_TAG_TX_POWER_LEVEL_STATS_EVT, 1618 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV, 1619 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG, 1620 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD, 1621 WMI_TAG_NDP_END_RSP_PER_NDI, 1622 WMI_TAG_PEER_BWF_REQUEST, 1623 WMI_TAG_BWF_PEER_INFO, 1624 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD, 1625 WMI_TAG_RMC_SET_LEADER_CMD, 1626 WMI_TAG_RMC_MANUAL_LEADER_EVENT, 1627 WMI_TAG_PER_CHAIN_RSSI_STATS, 1628 WMI_TAG_RSSI_STATS, 1629 WMI_TAG_P2P_LO_START_CMD, 1630 WMI_TAG_P2P_LO_STOP_CMD, 1631 WMI_TAG_P2P_LO_STOPPED_EVENT, 1632 WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1633 WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1634 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD, 1635 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT, 1636 WMI_TAG_READ_DATA_FROM_FLASH_CMD, 1637 WMI_TAG_READ_DATA_FROM_FLASH_EVENT, 1638 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD, 1639 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD, 1640 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID, 1641 WMI_TAG_TLV_BUF_LEN_PARAM, 1642 WMI_TAG_SERVICE_AVAILABLE_EVENT, 1643 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD, 1644 WMI_TAG_PEER_ANTDIV_INFO_EVENT, 1645 WMI_TAG_PEER_ANTDIV_INFO, 1646 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD, 1647 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT, 1648 WMI_TAG_MNT_FILTER_CMD, 1649 WMI_TAG_GET_CHIP_POWER_STATS_CMD, 1650 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT, 1651 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD, 1652 WMI_TAG_COEX_REPORT_ISOLATION_EVENT, 1653 WMI_TAG_CHAN_CCA_STATS, 1654 WMI_TAG_PEER_SIGNAL_STATS, 1655 WMI_TAG_TX_STATS, 1656 WMI_TAG_PEER_AC_TX_STATS, 1657 WMI_TAG_RX_STATS, 1658 WMI_TAG_PEER_AC_RX_STATS, 1659 WMI_TAG_REPORT_STATS_EVENT, 1660 WMI_TAG_CHAN_CCA_STATS_THRESH, 1661 WMI_TAG_PEER_SIGNAL_STATS_THRESH, 1662 WMI_TAG_TX_STATS_THRESH, 1663 WMI_TAG_RX_STATS_THRESH, 1664 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD, 1665 WMI_TAG_REQUEST_WLAN_STATS_CMD, 1666 WMI_TAG_RX_AGGR_FAILURE_EVENT, 1667 WMI_TAG_RX_AGGR_FAILURE_INFO, 1668 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD, 1669 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT, 1670 WMI_TAG_PDEV_BAND_TO_MAC, 1671 WMI_TAG_TBTT_OFFSET_INFO, 1672 WMI_TAG_TBTT_OFFSET_EXT_EVENT, 1673 WMI_TAG_SAR_LIMITS_CMD, 1674 WMI_TAG_SAR_LIMIT_CMD_ROW, 1675 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 1676 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD, 1677 WMI_TAG_VDEV_ADFS_CH_CFG_CMD, 1678 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD, 1679 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT, 1680 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT, 1681 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT, 1682 WMI_TAG_VENDOR_OUI, 1683 WMI_TAG_REQUEST_RCPI_CMD, 1684 WMI_TAG_UPDATE_RCPI_EVENT, 1685 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD, 1686 WMI_TAG_PEER_STATS_INFO, 1687 WMI_TAG_PEER_STATS_INFO_EVENT, 1688 WMI_TAG_PKGID_EVENT, 1689 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS, 1690 WMI_TAG_SET_CURRENT_COUNTRY_CMD, 1691 WMI_TAG_REGULATORY_RULE_STRUCT, 1692 WMI_TAG_REG_CHAN_LIST_CC_EVENT, 1693 WMI_TAG_11D_SCAN_START_CMD, 1694 WMI_TAG_11D_SCAN_STOP_CMD, 1695 WMI_TAG_11D_NEW_COUNTRY_EVENT, 1696 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD, 1697 WMI_TAG_RADIO_CHAN_STATS, 1698 WMI_TAG_RADIO_CHAN_STATS_EVENT, 1699 WMI_TAG_ROAM_PER_CONFIG, 1700 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD, 1701 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT, 1702 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD, 1703 WMI_TAG_HW_DATA_FILTER_CMD, 1704 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF, 1705 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT, 1706 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED, 1707 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD, 1708 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT, 1709 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD, 1710 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD, 1711 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT, 1712 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD, 1713 WMI_TAG_MAC_PHY_CHAINMASK_COMBO, 1714 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY, 1715 WMI_TAG_VDEV_SET_ARP_STATS_CMD, 1716 WMI_TAG_VDEV_GET_ARP_STATS_CMD, 1717 WMI_TAG_VDEV_GET_ARP_STATS_EVENT, 1718 WMI_TAG_IFACE_OFFLOAD_STATS, 1719 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM, 1720 WMI_TAG_RSSI_CTL_EXT, 1721 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR, 1722 WMI_TAG_COEX_BT_ACTIVITY_EVENT, 1723 WMI_TAG_VDEV_GET_TX_POWER_CMD, 1724 WMI_TAG_VDEV_TX_POWER_EVENT, 1725 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT, 1726 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD, 1727 WMI_TAG_TX_SEND_PARAMS, 1728 WMI_TAG_HE_RATE_SET, 1729 WMI_TAG_CONGESTION_STATS, 1730 WMI_TAG_SET_INIT_COUNTRY_CMD, 1731 WMI_TAG_SCAN_DBS_DUTY_CYCLE, 1732 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV, 1733 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID, 1734 WMI_TAG_THERM_THROT_CONFIG_REQUEST, 1735 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 1736 WMI_TAG_THERM_THROT_STATS_EVENT, 1737 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO, 1738 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT, 1739 WMI_TAG_OEM_DMA_RING_CAPABILITIES, 1740 WMI_TAG_OEM_DMA_RING_CFG_REQ, 1741 WMI_TAG_OEM_DMA_RING_CFG_RSP, 1742 WMI_TAG_OEM_INDIRECT_DATA, 1743 WMI_TAG_OEM_DMA_BUF_RELEASE, 1744 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY, 1745 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1746 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT, 1747 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG, 1748 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD, 1749 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG, 1750 WMI_TAG_UNIT_TEST_EVENT, 1751 WMI_TAG_ROAM_FILS_OFFLOAD, 1752 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD, 1753 WMI_TAG_PMK_CACHE, 1754 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD, 1755 WMI_TAG_ROAM_FILS_SYNCH, 1756 WMI_TAG_GTK_OFFLOAD_EXTENDED, 1757 WMI_TAG_ROAM_BG_SCAN_ROAMING, 1758 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD, 1759 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD, 1760 WMI_TAG_OIC_PING_HANDOFF_EVENT, 1761 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD, 1762 WMI_TAG_DHCP_LEASE_RENEW_EVENT, 1763 WMI_TAG_BTM_CONFIG, 1764 WMI_TAG_DEBUG_MESG_FW_DATA_STALL, 1765 WMI_TAG_WLM_CONFIG_CMD, 1766 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST, 1767 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT, 1768 WMI_TAG_ROAM_CND_SCORING_PARAM, 1769 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION, 1770 WMI_TAG_VENDOR_OUI_EXT, 1771 WMI_TAG_ROAM_SYNCH_FRAME_EVENT, 1772 WMI_TAG_FD_SEND_FROM_HOST_CMD, 1773 WMI_TAG_ENABLE_FILS_CMD, 1774 WMI_TAG_HOST_SWFDA_EVENT, 1775 WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1776 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD, 1777 WMI_TAG_STATS_PERIOD, 1778 WMI_TAG_NDL_SCHEDULE_UPDATE, 1779 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD, 1780 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE, 1781 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD, 1782 WMI_TAG_SAR2_RESULT_EVENT, 1783 WMI_TAG_SAR_CAPABILITIES, 1784 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD, 1785 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT, 1786 WMI_TAG_DMA_RING_CAPABILITIES, 1787 WMI_TAG_DMA_RING_CFG_REQ, 1788 WMI_TAG_DMA_RING_CFG_RSP, 1789 WMI_TAG_DMA_BUF_RELEASE, 1790 WMI_TAG_DMA_BUF_RELEASE_ENTRY, 1791 WMI_TAG_SAR_GET_LIMITS_CMD, 1792 WMI_TAG_SAR_GET_LIMITS_EVENT, 1793 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW, 1794 WMI_TAG_OFFLOAD_11K_REPORT, 1795 WMI_TAG_INVOKE_NEIGHBOR_REPORT, 1796 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD, 1797 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS, 1798 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS, 1799 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD, 1800 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD, 1801 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD, 1802 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT, 1803 WMI_TAG_PDEV_GET_NFCAL_POWER, 1804 WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 1805 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 1806 WMI_TAG_OBSS_COLOR_COLLISION_EVT, 1807 WMI_TAG_RUNTIME_DPD_RECAL_CMD, 1808 WMI_TAG_TWT_ENABLE_CMD, 1809 WMI_TAG_TWT_DISABLE_CMD, 1810 WMI_TAG_TWT_ADD_DIALOG_CMD, 1811 WMI_TAG_TWT_DEL_DIALOG_CMD, 1812 WMI_TAG_TWT_PAUSE_DIALOG_CMD, 1813 WMI_TAG_TWT_RESUME_DIALOG_CMD, 1814 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT, 1815 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT, 1816 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT, 1817 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT, 1818 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT, 1819 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT, 1820 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD, 1821 WMI_TAG_ROAM_SCAN_STATS_EVENT, 1822 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD, 1823 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD, 1824 WMI_TAG_GET_TPC_POWER_CMD, 1825 WMI_TAG_GET_TPC_POWER_EVENT, 1826 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA, 1827 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD, 1828 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD, 1829 WMI_TAG_MOTION_DET_START_STOP_CMD, 1830 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD, 1831 WMI_TAG_MOTION_DET_EVENT, 1832 WMI_TAG_MOTION_DET_BASE_LINE_EVENT, 1833 WMI_TAG_NDP_TRANSPORT_IP, 1834 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 1835 WMI_TAG_ESP_ESTIMATE_EVENT, 1836 WMI_TAG_NAN_HOST_CONFIG, 1837 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS, 1838 WMI_TAG_PEER_CFR_CAPTURE_CMD, 1839 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD, 1840 WMI_TAG_CHAN_WIDTH_PEER_LIST, 1841 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD, 1842 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD, 1843 WMI_TAG_PEER_EXTD2_STATS, 1844 WMI_TAG_HPCS_PULSE_START_CMD, 1845 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT, 1846 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD, 1847 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD, 1848 WMI_TAG_NAN_EVENT_INFO, 1849 WMI_TAG_NDP_CHANNEL_INFO, 1850 WMI_TAG_NDP_CMD, 1851 WMI_TAG_NDP_EVENT, 1852 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301, 1853 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO, 1854 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344, 1855 WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD = 0x37b, 1856 WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD, 1857 WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD = 0x381, 1858 WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 1859 WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD, 1860 WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 1861 WMI_TAG_MAX 1862 }; 1863 1864 enum wmi_tlv_service { 1865 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0, 1866 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1, 1867 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2, 1868 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3, 1869 WMI_TLV_SERVICE_STA_PWRSAVE = 4, 1870 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5, 1871 WMI_TLV_SERVICE_AP_UAPSD = 6, 1872 WMI_TLV_SERVICE_AP_DFS = 7, 1873 WMI_TLV_SERVICE_11AC = 8, 1874 WMI_TLV_SERVICE_BLOCKACK = 9, 1875 WMI_TLV_SERVICE_PHYERR = 10, 1876 WMI_TLV_SERVICE_BCN_FILTER = 11, 1877 WMI_TLV_SERVICE_RTT = 12, 1878 WMI_TLV_SERVICE_WOW = 13, 1879 WMI_TLV_SERVICE_RATECTRL_CACHE = 14, 1880 WMI_TLV_SERVICE_IRAM_TIDS = 15, 1881 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16, 1882 WMI_TLV_SERVICE_NLO = 17, 1883 WMI_TLV_SERVICE_GTK_OFFLOAD = 18, 1884 WMI_TLV_SERVICE_SCAN_SCH = 19, 1885 WMI_TLV_SERVICE_CSA_OFFLOAD = 20, 1886 WMI_TLV_SERVICE_CHATTER = 21, 1887 WMI_TLV_SERVICE_COEX_FREQAVOID = 22, 1888 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23, 1889 WMI_TLV_SERVICE_FORCE_FW_HANG = 24, 1890 WMI_TLV_SERVICE_GPIO = 25, 1891 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26, 1892 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27, 1893 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28, 1894 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29, 1895 WMI_TLV_SERVICE_TX_ENCAP = 30, 1896 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31, 1897 WMI_TLV_SERVICE_EARLY_RX = 32, 1898 WMI_TLV_SERVICE_STA_SMPS = 33, 1899 WMI_TLV_SERVICE_FWTEST = 34, 1900 WMI_TLV_SERVICE_STA_WMMAC = 35, 1901 WMI_TLV_SERVICE_TDLS = 36, 1902 WMI_TLV_SERVICE_BURST = 37, 1903 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38, 1904 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39, 1905 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40, 1906 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41, 1907 WMI_TLV_SERVICE_WLAN_HB = 42, 1908 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43, 1909 WMI_TLV_SERVICE_BATCH_SCAN = 44, 1910 WMI_TLV_SERVICE_QPOWER = 45, 1911 WMI_TLV_SERVICE_PLMREQ = 46, 1912 WMI_TLV_SERVICE_THERMAL_MGMT = 47, 1913 WMI_TLV_SERVICE_RMC = 48, 1914 WMI_TLV_SERVICE_MHF_OFFLOAD = 49, 1915 WMI_TLV_SERVICE_COEX_SAR = 50, 1916 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51, 1917 WMI_TLV_SERVICE_NAN = 52, 1918 WMI_TLV_SERVICE_L1SS_STAT = 53, 1919 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54, 1920 WMI_TLV_SERVICE_OBSS_SCAN = 55, 1921 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56, 1922 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57, 1923 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58, 1924 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59, 1925 WMI_TLV_SERVICE_LPASS = 60, 1926 WMI_TLV_SERVICE_EXTSCAN = 61, 1927 WMI_TLV_SERVICE_D0WOW = 62, 1928 WMI_TLV_SERVICE_HSOFFLOAD = 63, 1929 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64, 1930 WMI_TLV_SERVICE_RX_FULL_REORDER = 65, 1931 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66, 1932 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67, 1933 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68, 1934 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69, 1935 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70, 1936 WMI_TLV_SERVICE_OCB = 71, 1937 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72, 1938 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73, 1939 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74, 1940 WMI_TLV_SERVICE_MGMT_TX_HTT = 75, 1941 WMI_TLV_SERVICE_MGMT_TX_WMI = 76, 1942 WMI_TLV_SERVICE_EXT_MSG = 77, 1943 WMI_TLV_SERVICE_MAWC = 78, 1944 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79, 1945 WMI_TLV_SERVICE_EGAP = 80, 1946 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81, 1947 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82, 1948 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83, 1949 WMI_TLV_SERVICE_ATF = 84, 1950 WMI_TLV_SERVICE_COEX_GPIO = 85, 1951 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86, 1952 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87, 1953 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88, 1954 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89, 1955 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90, 1956 WMI_TLV_SERVICE_BPF_OFFLOAD = 91, 1957 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92, 1958 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93, 1959 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94, 1960 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95, 1961 WMI_TLV_SERVICE_NAN_DATA = 96, 1962 WMI_TLV_SERVICE_NAN_RTT = 97, 1963 WMI_TLV_SERVICE_11AX = 98, 1964 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99, 1965 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100, 1966 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101, 1967 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102, 1968 WMI_TLV_SERVICE_MESH_11S = 103, 1969 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104, 1970 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105, 1971 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106, 1972 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107, 1973 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108, 1974 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109, 1975 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110, 1976 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111, 1977 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112, 1978 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113, 1979 WMI_TLV_SERVICE_RCPI_SUPPORT = 114, 1980 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115, 1981 WMI_TLV_SERVICE_PEER_STATS_INFO = 116, 1982 WMI_TLV_SERVICE_REGULATORY_DB = 117, 1983 WMI_TLV_SERVICE_11D_OFFLOAD = 118, 1984 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119, 1985 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120, 1986 WMI_TLV_SERVICE_PKT_ROUTING = 121, 1987 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122, 1988 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123, 1989 WMI_TLV_SERVICE_8SS_TX_BFEE = 124, 1990 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125, 1991 WMI_TLV_SERVICE_ACK_TIMEOUT = 126, 1992 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127, 1993 1994 WMI_MAX_SERVICE = 128, 1995 1996 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128, 1997 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129, 1998 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130, 1999 WMI_TLV_SERVICE_FILS_SUPPORT = 131, 2000 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132, 2001 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133, 2002 WMI_TLV_SERVICE_MAWC_SUPPORT = 134, 2003 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135, 2004 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136, 2005 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137, 2006 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138, 2007 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139, 2008 WMI_TLV_SERVICE_THERM_THROT = 140, 2009 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141, 2010 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142, 2011 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143, 2012 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144, 2013 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145, 2014 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146, 2015 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147, 2016 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148, 2017 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149, 2018 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150, 2019 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151, 2020 WMI_TLV_SERVICE_STA_TWT = 152, 2021 WMI_TLV_SERVICE_AP_TWT = 153, 2022 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154, 2023 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155, 2024 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156, 2025 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157, 2026 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158, 2027 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159, 2028 WMI_TLV_SERVICE_MOTION_DET = 160, 2029 WMI_TLV_SERVICE_INFRA_MBSSID = 161, 2030 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162, 2031 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163, 2032 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164, 2033 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165, 2034 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166, 2035 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167, 2036 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168, 2037 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169, 2038 WMI_TLV_SERVICE_ESP_SUPPORT = 170, 2039 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171, 2040 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172, 2041 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173, 2042 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174, 2043 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175, 2044 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176, 2045 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177, 2046 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178, 2047 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179, 2048 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180, 2049 WMI_TLV_SERVICE_FETCH_TX_PN = 181, 2050 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182, 2051 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183, 2052 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184, 2053 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185, 2054 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186, 2055 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187, 2056 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188, 2057 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189, 2058 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190, 2059 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191, 2060 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192, 2061 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193, 2062 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194, 2063 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195, 2064 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196, 2065 WMI_TLV_SERVICE_VOW_ENABLE = 197, 2066 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198, 2067 WMI_TLV_SERVICE_BROADCAST_TWT = 199, 2068 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200, 2069 WMI_TLV_SERVICE_PS_TDCC = 201, 2070 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202, 2071 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203, 2072 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204, 2073 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205, 2074 WMI_TLV_SERVICE_WPA3_FT_FILS = 206, 2075 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207, 2076 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208, 2077 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209, 2078 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210, 2079 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211, 2080 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212, 2081 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213, 2082 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219, 2083 WMI_TLV_SERVICE_EXT2_MSG = 220, 2084 WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249, 2085 2086 WMI_MAX_EXT_SERVICE 2087 }; 2088 2089 enum { 2090 WMI_SMPS_FORCED_MODE_NONE = 0, 2091 WMI_SMPS_FORCED_MODE_DISABLED, 2092 WMI_SMPS_FORCED_MODE_STATIC, 2093 WMI_SMPS_FORCED_MODE_DYNAMIC 2094 }; 2095 2096 #define WMI_TPC_CHAINMASK_CONFIG_BAND_2G 0 2097 #define WMI_TPC_CHAINMASK_CONFIG_BAND_5G 1 2098 #define WMI_NUM_SUPPORTED_BAND_MAX 2 2099 2100 #define WMI_PEER_MIMO_PS_STATE 0x1 2101 #define WMI_PEER_AMPDU 0x2 2102 #define WMI_PEER_AUTHORIZE 0x3 2103 #define WMI_PEER_CHWIDTH 0x4 2104 #define WMI_PEER_NSS 0x5 2105 #define WMI_PEER_USE_4ADDR 0x6 2106 #define WMI_PEER_MEMBERSHIP 0x7 2107 #define WMI_PEER_USERPOS 0x8 2108 #define WMI_PEER_CRIT_PROTO_HINT_ENABLED 0x9 2109 #define WMI_PEER_TX_FAIL_CNT_THR 0xA 2110 #define WMI_PEER_SET_HW_RETRY_CTS2S 0xB 2111 #define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH 0xC 2112 #define WMI_PEER_PHYMODE 0xD 2113 #define WMI_PEER_USE_FIXED_PWR 0xE 2114 #define WMI_PEER_PARAM_FIXED_RATE 0xF 2115 #define WMI_PEER_SET_MU_WHITELIST 0x10 2116 #define WMI_PEER_SET_MAX_TX_RATE 0x11 2117 #define WMI_PEER_SET_MIN_TX_RATE 0x12 2118 #define WMI_PEER_SET_DEFAULT_ROUTING 0x13 2119 2120 /* slot time long */ 2121 #define WMI_VDEV_SLOT_TIME_LONG 0x1 2122 /* slot time short */ 2123 #define WMI_VDEV_SLOT_TIME_SHORT 0x2 2124 /* preablbe long */ 2125 #define WMI_VDEV_PREAMBLE_LONG 0x1 2126 /* preablbe short */ 2127 #define WMI_VDEV_PREAMBLE_SHORT 0x2 2128 2129 enum wmi_peer_smps_state { 2130 WMI_PEER_SMPS_PS_NONE = 0x0, 2131 WMI_PEER_SMPS_STATIC = 0x1, 2132 WMI_PEER_SMPS_DYNAMIC = 0x2 2133 }; 2134 2135 enum wmi_peer_chwidth { 2136 WMI_PEER_CHWIDTH_20MHZ = 0, 2137 WMI_PEER_CHWIDTH_40MHZ = 1, 2138 WMI_PEER_CHWIDTH_80MHZ = 2, 2139 WMI_PEER_CHWIDTH_160MHZ = 3, 2140 }; 2141 2142 enum wmi_beacon_gen_mode { 2143 WMI_BEACON_STAGGERED_MODE = 0, 2144 WMI_BEACON_BURST_MODE = 1 2145 }; 2146 2147 enum wmi_direct_buffer_module { 2148 WMI_DIRECT_BUF_SPECTRAL = 0, 2149 WMI_DIRECT_BUF_CFR = 1, 2150 2151 /* keep it last */ 2152 WMI_DIRECT_BUF_MAX 2153 }; 2154 2155 /* enum wmi_nss_ratio - NSS ratio received from FW during service ready ext 2156 * event 2157 * WMI_NSS_RATIO_1BY2_NSS -Max nss of 160MHz is equals to half of the max nss 2158 * of 80MHz 2159 * WMI_NSS_RATIO_3BY4_NSS - Max nss of 160MHz is equals to 3/4 of the max nss 2160 * of 80MHz 2161 * WMI_NSS_RATIO_1_NSS - Max nss of 160MHz is equals to the max nss of 80MHz 2162 * WMI_NSS_RATIO_2_NSS - Max nss of 160MHz is equals to two times the max 2163 * nss of 80MHz 2164 */ 2165 2166 enum wmi_nss_ratio { 2167 WMI_NSS_RATIO_1BY2_NSS = 0x0, 2168 WMI_NSS_RATIO_3BY4_NSS = 0x1, 2169 WMI_NSS_RATIO_1_NSS = 0x2, 2170 WMI_NSS_RATIO_2_NSS = 0x3, 2171 }; 2172 2173 enum wmi_dtim_policy { 2174 WMI_DTIM_POLICY_IGNORE = 1, 2175 WMI_DTIM_POLICY_NORMAL = 2, 2176 WMI_DTIM_POLICY_STICK = 3, 2177 WMI_DTIM_POLICY_AUTO = 4, 2178 }; 2179 2180 struct wmi_host_pdev_band_to_mac { 2181 u32 pdev_id; 2182 u32 start_freq; 2183 u32 end_freq; 2184 }; 2185 2186 struct ath11k_ppe_threshold { 2187 u32 numss_m1; 2188 u32 ru_bit_mask; 2189 u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS]; 2190 }; 2191 2192 struct ath11k_service_ext_param { 2193 u32 default_conc_scan_config_bits; 2194 u32 default_fw_config_bits; 2195 struct ath11k_ppe_threshold ppet; 2196 u32 he_cap_info; 2197 u32 mpdu_density; 2198 u32 max_bssid_rx_filters; 2199 u32 num_hw_modes; 2200 u32 num_phy; 2201 }; 2202 2203 struct ath11k_hw_mode_caps { 2204 u32 hw_mode_id; 2205 u32 phy_id_map; 2206 u32 hw_mode_config_type; 2207 }; 2208 2209 #define PSOC_HOST_MAX_PHY_SIZE (3) 2210 #define ATH11K_11B_SUPPORT BIT(0) 2211 #define ATH11K_11G_SUPPORT BIT(1) 2212 #define ATH11K_11A_SUPPORT BIT(2) 2213 #define ATH11K_11N_SUPPORT BIT(3) 2214 #define ATH11K_11AC_SUPPORT BIT(4) 2215 #define ATH11K_11AX_SUPPORT BIT(5) 2216 2217 struct ath11k_hal_reg_capabilities_ext { 2218 u32 phy_id; 2219 u32 eeprom_reg_domain; 2220 u32 eeprom_reg_domain_ext; 2221 u32 regcap1; 2222 u32 regcap2; 2223 u32 wireless_modes; 2224 u32 low_2ghz_chan; 2225 u32 high_2ghz_chan; 2226 u32 low_5ghz_chan; 2227 u32 high_5ghz_chan; 2228 }; 2229 2230 #define WMI_HOST_MAX_PDEV 3 2231 2232 struct wlan_host_mem_chunk { 2233 u32 tlv_header; 2234 u32 req_id; 2235 u32 ptr; 2236 u32 size; 2237 } __packed; 2238 2239 struct wmi_host_mem_chunk { 2240 void *vaddr; 2241 dma_addr_t paddr; 2242 u32 len; 2243 u32 req_id; 2244 }; 2245 2246 struct wmi_init_cmd_param { 2247 u32 tlv_header; 2248 struct target_resource_config *res_cfg; 2249 u8 num_mem_chunks; 2250 struct wmi_host_mem_chunk *mem_chunks; 2251 u32 hw_mode_id; 2252 u32 num_band_to_mac; 2253 struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV]; 2254 }; 2255 2256 struct wmi_pdev_band_to_mac { 2257 u32 tlv_header; 2258 u32 pdev_id; 2259 u32 start_freq; 2260 u32 end_freq; 2261 } __packed; 2262 2263 struct wmi_pdev_set_hw_mode_cmd_param { 2264 u32 tlv_header; 2265 u32 pdev_id; 2266 u32 hw_mode_index; 2267 u32 num_band_to_mac; 2268 } __packed; 2269 2270 struct wmi_ppe_threshold { 2271 u32 numss_m1; /** NSS - 1*/ 2272 union { 2273 u32 ru_count; 2274 u32 ru_mask; 2275 } __packed; 2276 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2277 } __packed; 2278 2279 #define HW_BD_INFO_SIZE 5 2280 2281 struct wmi_abi_version { 2282 u32 abi_version_0; 2283 u32 abi_version_1; 2284 u32 abi_version_ns_0; 2285 u32 abi_version_ns_1; 2286 u32 abi_version_ns_2; 2287 u32 abi_version_ns_3; 2288 } __packed; 2289 2290 struct wmi_init_cmd { 2291 u32 tlv_header; 2292 struct wmi_abi_version host_abi_vers; 2293 u32 num_host_mem_chunks; 2294 } __packed; 2295 2296 #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5) 2297 2298 struct wmi_resource_config { 2299 u32 tlv_header; 2300 u32 num_vdevs; 2301 u32 num_peers; 2302 u32 num_offload_peers; 2303 u32 num_offload_reorder_buffs; 2304 u32 num_peer_keys; 2305 u32 num_tids; 2306 u32 ast_skid_limit; 2307 u32 tx_chain_mask; 2308 u32 rx_chain_mask; 2309 u32 rx_timeout_pri[4]; 2310 u32 rx_decap_mode; 2311 u32 scan_max_pending_req; 2312 u32 bmiss_offload_max_vdev; 2313 u32 roam_offload_max_vdev; 2314 u32 roam_offload_max_ap_profiles; 2315 u32 num_mcast_groups; 2316 u32 num_mcast_table_elems; 2317 u32 mcast2ucast_mode; 2318 u32 tx_dbg_log_size; 2319 u32 num_wds_entries; 2320 u32 dma_burst_size; 2321 u32 mac_aggr_delim; 2322 u32 rx_skip_defrag_timeout_dup_detection_check; 2323 u32 vow_config; 2324 u32 gtk_offload_max_vdev; 2325 u32 num_msdu_desc; 2326 u32 max_frag_entries; 2327 u32 num_tdls_vdevs; 2328 u32 num_tdls_conn_table_entries; 2329 u32 beacon_tx_offload_max_vdev; 2330 u32 num_multicast_filter_entries; 2331 u32 num_wow_filters; 2332 u32 num_keep_alive_pattern; 2333 u32 keep_alive_pattern_size; 2334 u32 max_tdls_concurrent_sleep_sta; 2335 u32 max_tdls_concurrent_buffer_sta; 2336 u32 wmi_send_separate; 2337 u32 num_ocb_vdevs; 2338 u32 num_ocb_channels; 2339 u32 num_ocb_schedules; 2340 u32 flag1; 2341 u32 smart_ant_cap; 2342 u32 bk_minfree; 2343 u32 be_minfree; 2344 u32 vi_minfree; 2345 u32 vo_minfree; 2346 u32 alloc_frag_desc_for_data_pkt; 2347 u32 num_ns_ext_tuples_cfg; 2348 u32 bpf_instruction_size; 2349 u32 max_bssid_rx_filters; 2350 u32 use_pdev_id; 2351 u32 max_num_dbs_scan_duty_cycle; 2352 u32 max_num_group_keys; 2353 u32 peer_map_unmap_v2_support; 2354 u32 sched_params; 2355 u32 twt_ap_pdev_count; 2356 u32 twt_ap_sta_count; 2357 } __packed; 2358 2359 struct wmi_service_ready_event { 2360 u32 fw_build_vers; 2361 struct wmi_abi_version fw_abi_vers; 2362 u32 phy_capability; 2363 u32 max_frag_entry; 2364 u32 num_rf_chains; 2365 u32 ht_cap_info; 2366 u32 vht_cap_info; 2367 u32 vht_supp_mcs; 2368 u32 hw_min_tx_power; 2369 u32 hw_max_tx_power; 2370 u32 sys_cap_info; 2371 u32 min_pkt_size_enable; 2372 u32 max_bcn_ie_size; 2373 u32 num_mem_reqs; 2374 u32 max_num_scan_channels; 2375 u32 hw_bd_id; 2376 u32 hw_bd_info[HW_BD_INFO_SIZE]; 2377 u32 max_supported_macs; 2378 u32 wmi_fw_sub_feat_caps; 2379 u32 num_dbs_hw_modes; 2380 /* txrx_chainmask 2381 * [7:0] - 2G band tx chain mask 2382 * [15:8] - 2G band rx chain mask 2383 * [23:16] - 5G band tx chain mask 2384 * [31:24] - 5G band rx chain mask 2385 */ 2386 u32 txrx_chainmask; 2387 u32 default_dbs_hw_mode_index; 2388 u32 num_msdu_desc; 2389 } __packed; 2390 2391 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32)) 2392 2393 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */ 2394 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32)) 2395 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32 2396 #define WMI_SERVICE_BITS_IN_SIZE32 4 2397 2398 struct wmi_service_ready_ext_event { 2399 u32 default_conc_scan_config_bits; 2400 u32 default_fw_config_bits; 2401 struct wmi_ppe_threshold ppet; 2402 u32 he_cap_info; 2403 u32 mpdu_density; 2404 u32 max_bssid_rx_filters; 2405 u32 fw_build_vers_ext; 2406 u32 max_nlo_ssids; 2407 u32 max_bssid_indicator; 2408 u32 he_cap_info_ext; 2409 } __packed; 2410 2411 struct wmi_soc_mac_phy_hw_mode_caps { 2412 u32 num_hw_modes; 2413 u32 num_chainmask_tables; 2414 } __packed; 2415 2416 struct wmi_hw_mode_capabilities { 2417 u32 tlv_header; 2418 u32 hw_mode_id; 2419 u32 phy_id_map; 2420 u32 hw_mode_config_type; 2421 } __packed; 2422 2423 #define WMI_MAX_HECAP_PHY_SIZE (3) 2424 #define WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS BIT(0) 2425 #define WMI_NSS_RATIO_ENABLE_DISABLE_GET(_val) \ 2426 FIELD_GET(WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS, _val) 2427 #define WMI_NSS_RATIO_INFO_BITPOS GENMASK(4, 1) 2428 #define WMI_NSS_RATIO_INFO_GET(_val) \ 2429 FIELD_GET(WMI_NSS_RATIO_INFO_BITPOS, _val) 2430 2431 struct wmi_mac_phy_capabilities { 2432 u32 hw_mode_id; 2433 u32 pdev_id; 2434 u32 phy_id; 2435 u32 supported_flags; 2436 u32 supported_bands; 2437 u32 ampdu_density; 2438 u32 max_bw_supported_2g; 2439 u32 ht_cap_info_2g; 2440 u32 vht_cap_info_2g; 2441 u32 vht_supp_mcs_2g; 2442 u32 he_cap_info_2g; 2443 u32 he_supp_mcs_2g; 2444 u32 tx_chain_mask_2g; 2445 u32 rx_chain_mask_2g; 2446 u32 max_bw_supported_5g; 2447 u32 ht_cap_info_5g; 2448 u32 vht_cap_info_5g; 2449 u32 vht_supp_mcs_5g; 2450 u32 he_cap_info_5g; 2451 u32 he_supp_mcs_5g; 2452 u32 tx_chain_mask_5g; 2453 u32 rx_chain_mask_5g; 2454 u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE]; 2455 u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE]; 2456 struct wmi_ppe_threshold he_ppet2g; 2457 struct wmi_ppe_threshold he_ppet5g; 2458 u32 chainmask_table_id; 2459 u32 lmac_id; 2460 u32 he_cap_info_2g_ext; 2461 u32 he_cap_info_5g_ext; 2462 u32 he_cap_info_internal; 2463 u32 wireless_modes; 2464 u32 low_2ghz_chan_freq; 2465 u32 high_2ghz_chan_freq; 2466 u32 low_5ghz_chan_freq; 2467 u32 high_5ghz_chan_freq; 2468 u32 nss_ratio; 2469 } __packed; 2470 2471 struct wmi_hal_reg_capabilities_ext { 2472 u32 tlv_header; 2473 u32 phy_id; 2474 u32 eeprom_reg_domain; 2475 u32 eeprom_reg_domain_ext; 2476 u32 regcap1; 2477 u32 regcap2; 2478 u32 wireless_modes; 2479 u32 low_2ghz_chan; 2480 u32 high_2ghz_chan; 2481 u32 low_5ghz_chan; 2482 u32 high_5ghz_chan; 2483 } __packed; 2484 2485 struct wmi_soc_hal_reg_capabilities { 2486 u32 num_phy; 2487 } __packed; 2488 2489 /* 2 word representation of MAC addr */ 2490 struct wmi_mac_addr { 2491 union { 2492 u8 addr[6]; 2493 struct { 2494 u32 word0; 2495 u32 word1; 2496 } __packed; 2497 } __packed; 2498 } __packed; 2499 2500 struct wmi_dma_ring_capabilities { 2501 u32 tlv_header; 2502 u32 pdev_id; 2503 u32 module_id; 2504 u32 min_elem; 2505 u32 min_buf_sz; 2506 u32 min_buf_align; 2507 } __packed; 2508 2509 struct wmi_ready_event_min { 2510 struct wmi_abi_version fw_abi_vers; 2511 struct wmi_mac_addr mac_addr; 2512 u32 status; 2513 u32 num_dscp_table; 2514 u32 num_extra_mac_addr; 2515 u32 num_total_peers; 2516 u32 num_extra_peers; 2517 } __packed; 2518 2519 struct wmi_ready_event { 2520 struct wmi_ready_event_min ready_event_min; 2521 u32 max_ast_index; 2522 u32 pktlog_defs_checksum; 2523 } __packed; 2524 2525 struct wmi_service_available_event { 2526 u32 wmi_service_segment_offset; 2527 u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32]; 2528 } __packed; 2529 2530 struct ath11k_pdev_wmi { 2531 struct ath11k_wmi_base *wmi_ab; 2532 enum ath11k_htc_ep_id eid; 2533 const struct wmi_peer_flags_map *peer_flags; 2534 u32 rx_decap_mode; 2535 wait_queue_head_t tx_ce_desc_wq; 2536 }; 2537 2538 struct vdev_create_params { 2539 u8 if_id; 2540 u32 type; 2541 u32 subtype; 2542 struct { 2543 u8 tx; 2544 u8 rx; 2545 } chains[NUM_NL80211_BANDS]; 2546 u32 pdev_id; 2547 }; 2548 2549 struct wmi_vdev_create_cmd { 2550 u32 tlv_header; 2551 u32 vdev_id; 2552 u32 vdev_type; 2553 u32 vdev_subtype; 2554 struct wmi_mac_addr vdev_macaddr; 2555 u32 num_cfg_txrx_streams; 2556 u32 pdev_id; 2557 } __packed; 2558 2559 struct wmi_vdev_txrx_streams { 2560 u32 tlv_header; 2561 u32 band; 2562 u32 supported_tx_streams; 2563 u32 supported_rx_streams; 2564 } __packed; 2565 2566 struct wmi_vdev_delete_cmd { 2567 u32 tlv_header; 2568 u32 vdev_id; 2569 } __packed; 2570 2571 struct wmi_vdev_up_cmd { 2572 u32 tlv_header; 2573 u32 vdev_id; 2574 u32 vdev_assoc_id; 2575 struct wmi_mac_addr vdev_bssid; 2576 struct wmi_mac_addr trans_bssid; 2577 u32 profile_idx; 2578 u32 profile_num; 2579 } __packed; 2580 2581 struct wmi_vdev_stop_cmd { 2582 u32 tlv_header; 2583 u32 vdev_id; 2584 } __packed; 2585 2586 struct wmi_vdev_down_cmd { 2587 u32 tlv_header; 2588 u32 vdev_id; 2589 } __packed; 2590 2591 #define WMI_VDEV_START_HIDDEN_SSID BIT(0) 2592 #define WMI_VDEV_START_PMF_ENABLED BIT(1) 2593 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) 2594 #define WMI_VDEV_START_HW_ENCRYPTION_DISABLED BIT(4) 2595 2596 struct wmi_ssid { 2597 u32 ssid_len; 2598 u32 ssid[8]; 2599 } __packed; 2600 2601 #define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ) 2602 2603 struct wmi_vdev_start_request_cmd { 2604 u32 tlv_header; 2605 u32 vdev_id; 2606 u32 requestor_id; 2607 u32 beacon_interval; 2608 u32 dtim_period; 2609 u32 flags; 2610 struct wmi_ssid ssid; 2611 u32 bcn_tx_rate; 2612 u32 bcn_txpower; 2613 u32 num_noa_descriptors; 2614 u32 disable_hw_ack; 2615 u32 preferred_tx_streams; 2616 u32 preferred_rx_streams; 2617 u32 he_ops; 2618 u32 cac_duration_ms; 2619 u32 regdomain; 2620 } __packed; 2621 2622 #define MGMT_TX_DL_FRM_LEN 64 2623 #define WMI_MAC_MAX_SSID_LENGTH 32 2624 struct mac_ssid { 2625 u8 length; 2626 u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH]; 2627 } __packed; 2628 2629 struct wmi_p2p_noa_descriptor { 2630 u32 type_count; 2631 u32 duration; 2632 u32 interval; 2633 u32 start_time; 2634 }; 2635 2636 struct channel_param { 2637 u8 chan_id; 2638 u8 pwr; 2639 u32 mhz; 2640 u32 half_rate:1, 2641 quarter_rate:1, 2642 dfs_set:1, 2643 dfs_set_cfreq2:1, 2644 is_chan_passive:1, 2645 allow_ht:1, 2646 allow_vht:1, 2647 allow_he:1, 2648 set_agile:1, 2649 psc_channel:1; 2650 u32 phy_mode; 2651 u32 cfreq1; 2652 u32 cfreq2; 2653 char maxpower; 2654 char minpower; 2655 char maxregpower; 2656 u8 antennamax; 2657 u8 reg_class_id; 2658 } __packed; 2659 2660 enum wmi_phy_mode { 2661 MODE_11A = 0, 2662 MODE_11G = 1, /* 11b/g Mode */ 2663 MODE_11B = 2, /* 11b Mode */ 2664 MODE_11GONLY = 3, /* 11g only Mode */ 2665 MODE_11NA_HT20 = 4, 2666 MODE_11NG_HT20 = 5, 2667 MODE_11NA_HT40 = 6, 2668 MODE_11NG_HT40 = 7, 2669 MODE_11AC_VHT20 = 8, 2670 MODE_11AC_VHT40 = 9, 2671 MODE_11AC_VHT80 = 10, 2672 MODE_11AC_VHT20_2G = 11, 2673 MODE_11AC_VHT40_2G = 12, 2674 MODE_11AC_VHT80_2G = 13, 2675 MODE_11AC_VHT80_80 = 14, 2676 MODE_11AC_VHT160 = 15, 2677 MODE_11AX_HE20 = 16, 2678 MODE_11AX_HE40 = 17, 2679 MODE_11AX_HE80 = 18, 2680 MODE_11AX_HE80_80 = 19, 2681 MODE_11AX_HE160 = 20, 2682 MODE_11AX_HE20_2G = 21, 2683 MODE_11AX_HE40_2G = 22, 2684 MODE_11AX_HE80_2G = 23, 2685 MODE_UNKNOWN = 24, 2686 MODE_MAX = 24 2687 }; 2688 2689 static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode) 2690 { 2691 switch (mode) { 2692 case MODE_11A: 2693 return "11a"; 2694 case MODE_11G: 2695 return "11g"; 2696 case MODE_11B: 2697 return "11b"; 2698 case MODE_11GONLY: 2699 return "11gonly"; 2700 case MODE_11NA_HT20: 2701 return "11na-ht20"; 2702 case MODE_11NG_HT20: 2703 return "11ng-ht20"; 2704 case MODE_11NA_HT40: 2705 return "11na-ht40"; 2706 case MODE_11NG_HT40: 2707 return "11ng-ht40"; 2708 case MODE_11AC_VHT20: 2709 return "11ac-vht20"; 2710 case MODE_11AC_VHT40: 2711 return "11ac-vht40"; 2712 case MODE_11AC_VHT80: 2713 return "11ac-vht80"; 2714 case MODE_11AC_VHT160: 2715 return "11ac-vht160"; 2716 case MODE_11AC_VHT80_80: 2717 return "11ac-vht80+80"; 2718 case MODE_11AC_VHT20_2G: 2719 return "11ac-vht20-2g"; 2720 case MODE_11AC_VHT40_2G: 2721 return "11ac-vht40-2g"; 2722 case MODE_11AC_VHT80_2G: 2723 return "11ac-vht80-2g"; 2724 case MODE_11AX_HE20: 2725 return "11ax-he20"; 2726 case MODE_11AX_HE40: 2727 return "11ax-he40"; 2728 case MODE_11AX_HE80: 2729 return "11ax-he80"; 2730 case MODE_11AX_HE80_80: 2731 return "11ax-he80+80"; 2732 case MODE_11AX_HE160: 2733 return "11ax-he160"; 2734 case MODE_11AX_HE20_2G: 2735 return "11ax-he20-2g"; 2736 case MODE_11AX_HE40_2G: 2737 return "11ax-he40-2g"; 2738 case MODE_11AX_HE80_2G: 2739 return "11ax-he80-2g"; 2740 case MODE_UNKNOWN: 2741 /* skip */ 2742 break; 2743 2744 /* no default handler to allow compiler to check that the 2745 * enum is fully handled 2746 */ 2747 } 2748 2749 return "<unknown>"; 2750 } 2751 2752 struct wmi_channel_arg { 2753 u32 freq; 2754 u32 band_center_freq1; 2755 u32 band_center_freq2; 2756 bool passive; 2757 bool allow_ibss; 2758 bool allow_ht; 2759 bool allow_vht; 2760 bool ht40plus; 2761 bool chan_radar; 2762 bool freq2_radar; 2763 bool allow_he; 2764 u32 min_power; 2765 u32 max_power; 2766 u32 max_reg_power; 2767 u32 max_antenna_gain; 2768 enum wmi_phy_mode mode; 2769 }; 2770 2771 struct wmi_vdev_start_req_arg { 2772 u32 vdev_id; 2773 struct wmi_channel_arg channel; 2774 u32 bcn_intval; 2775 u32 dtim_period; 2776 u8 *ssid; 2777 u32 ssid_len; 2778 u32 bcn_tx_rate; 2779 u32 bcn_tx_power; 2780 bool disable_hw_ack; 2781 bool hidden_ssid; 2782 bool pmf_enabled; 2783 u32 he_ops; 2784 u32 cac_duration_ms; 2785 u32 regdomain; 2786 u32 pref_rx_streams; 2787 u32 pref_tx_streams; 2788 u32 num_noa_descriptors; 2789 }; 2790 2791 struct peer_create_params { 2792 const u8 *peer_addr; 2793 u32 peer_type; 2794 u32 vdev_id; 2795 }; 2796 2797 struct peer_delete_params { 2798 u8 vdev_id; 2799 }; 2800 2801 struct peer_flush_params { 2802 u32 peer_tid_bitmap; 2803 u8 vdev_id; 2804 }; 2805 2806 struct pdev_set_regdomain_params { 2807 u16 current_rd_in_use; 2808 u16 current_rd_2g; 2809 u16 current_rd_5g; 2810 u32 ctl_2g; 2811 u32 ctl_5g; 2812 u8 dfs_domain; 2813 u32 pdev_id; 2814 }; 2815 2816 struct rx_reorder_queue_remove_params { 2817 u8 *peer_macaddr; 2818 u16 vdev_id; 2819 u32 peer_tid_bitmap; 2820 }; 2821 2822 #define WMI_HOST_PDEV_ID_SOC 0xFF 2823 #define WMI_HOST_PDEV_ID_0 0 2824 #define WMI_HOST_PDEV_ID_1 1 2825 #define WMI_HOST_PDEV_ID_2 2 2826 2827 #define WMI_PDEV_ID_SOC 0 2828 #define WMI_PDEV_ID_1ST 1 2829 #define WMI_PDEV_ID_2ND 2 2830 #define WMI_PDEV_ID_3RD 3 2831 2832 /* Freq units in MHz */ 2833 #define REG_RULE_START_FREQ 0x0000ffff 2834 #define REG_RULE_END_FREQ 0xffff0000 2835 #define REG_RULE_FLAGS 0x0000ffff 2836 #define REG_RULE_MAX_BW 0x0000ffff 2837 #define REG_RULE_REG_PWR 0x00ff0000 2838 #define REG_RULE_ANT_GAIN 0xff000000 2839 2840 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 2841 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 2842 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 2843 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 2844 2845 #define HECAP_PHYDWORD_0 0 2846 #define HECAP_PHYDWORD_1 1 2847 #define HECAP_PHYDWORD_2 2 2848 2849 #define HECAP_PHY_SU_BFER BIT(31) 2850 #define HECAP_PHY_SU_BFEE BIT(0) 2851 #define HECAP_PHY_MU_BFER BIT(1) 2852 #define HECAP_PHY_UL_MUMIMO BIT(22) 2853 #define HECAP_PHY_UL_MUOFDMA BIT(23) 2854 2855 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \ 2856 FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0]) 2857 2858 #define HECAP_PHY_SUBFME_GET(hecap_phy) \ 2859 FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1]) 2860 2861 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \ 2862 FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1]) 2863 2864 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \ 2865 FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0]) 2866 2867 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \ 2868 FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0]) 2869 2870 #define HE_MODE_SU_TX_BFEE BIT(0) 2871 #define HE_MODE_SU_TX_BFER BIT(1) 2872 #define HE_MODE_MU_TX_BFEE BIT(2) 2873 #define HE_MODE_MU_TX_BFER BIT(3) 2874 #define HE_MODE_DL_OFDMA BIT(4) 2875 #define HE_MODE_UL_OFDMA BIT(5) 2876 #define HE_MODE_UL_MUMIMO BIT(6) 2877 2878 #define HE_DL_MUOFDMA_ENABLE 1 2879 #define HE_UL_MUOFDMA_ENABLE 1 2880 #define HE_DL_MUMIMO_ENABLE 1 2881 #define HE_MU_BFEE_ENABLE 1 2882 #define HE_SU_BFEE_ENABLE 1 2883 2884 #define HE_VHT_SOUNDING_MODE_ENABLE 1 2885 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1 2886 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1 2887 2888 /* HE or VHT Sounding */ 2889 #define HE_VHT_SOUNDING_MODE BIT(0) 2890 /* SU or MU Sounding */ 2891 #define HE_SU_MU_SOUNDING_MODE BIT(2) 2892 /* Trig or Non-Trig Sounding */ 2893 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3) 2894 2895 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 2896 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 2897 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 2898 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700 2899 2900 struct pdev_params { 2901 u32 param_id; 2902 u32 param_value; 2903 }; 2904 2905 enum wmi_peer_type { 2906 WMI_PEER_TYPE_DEFAULT = 0, 2907 WMI_PEER_TYPE_BSS = 1, 2908 WMI_PEER_TYPE_TDLS = 2, 2909 }; 2910 2911 struct wmi_peer_create_cmd { 2912 u32 tlv_header; 2913 u32 vdev_id; 2914 struct wmi_mac_addr peer_macaddr; 2915 u32 peer_type; 2916 } __packed; 2917 2918 struct wmi_peer_delete_cmd { 2919 u32 tlv_header; 2920 u32 vdev_id; 2921 struct wmi_mac_addr peer_macaddr; 2922 } __packed; 2923 2924 struct wmi_peer_reorder_queue_setup_cmd { 2925 u32 tlv_header; 2926 u32 vdev_id; 2927 struct wmi_mac_addr peer_macaddr; 2928 u32 tid; 2929 u32 queue_ptr_lo; 2930 u32 queue_ptr_hi; 2931 u32 queue_no; 2932 u32 ba_window_size_valid; 2933 u32 ba_window_size; 2934 } __packed; 2935 2936 struct wmi_peer_reorder_queue_remove_cmd { 2937 u32 tlv_header; 2938 u32 vdev_id; 2939 struct wmi_mac_addr peer_macaddr; 2940 u32 tid_mask; 2941 } __packed; 2942 2943 struct gpio_config_params { 2944 u32 gpio_num; 2945 u32 input; 2946 u32 pull_type; 2947 u32 intr_mode; 2948 }; 2949 2950 enum wmi_gpio_type { 2951 WMI_GPIO_PULL_NONE, 2952 WMI_GPIO_PULL_UP, 2953 WMI_GPIO_PULL_DOWN 2954 }; 2955 2956 enum wmi_gpio_intr_type { 2957 WMI_GPIO_INTTYPE_DISABLE, 2958 WMI_GPIO_INTTYPE_RISING_EDGE, 2959 WMI_GPIO_INTTYPE_FALLING_EDGE, 2960 WMI_GPIO_INTTYPE_BOTH_EDGE, 2961 WMI_GPIO_INTTYPE_LEVEL_LOW, 2962 WMI_GPIO_INTTYPE_LEVEL_HIGH 2963 }; 2964 2965 enum wmi_bss_chan_info_req_type { 2966 WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 2967 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 2968 }; 2969 2970 struct wmi_gpio_config_cmd_param { 2971 u32 tlv_header; 2972 u32 gpio_num; 2973 u32 input; 2974 u32 pull_type; 2975 u32 intr_mode; 2976 }; 2977 2978 struct gpio_output_params { 2979 u32 gpio_num; 2980 u32 set; 2981 }; 2982 2983 struct wmi_gpio_output_cmd_param { 2984 u32 tlv_header; 2985 u32 gpio_num; 2986 u32 set; 2987 }; 2988 2989 struct set_fwtest_params { 2990 u32 arg; 2991 u32 value; 2992 }; 2993 2994 struct wmi_fwtest_set_param_cmd_param { 2995 u32 tlv_header; 2996 u32 param_id; 2997 u32 param_value; 2998 }; 2999 3000 struct wmi_pdev_set_param_cmd { 3001 u32 tlv_header; 3002 u32 pdev_id; 3003 u32 param_id; 3004 u32 param_value; 3005 } __packed; 3006 3007 struct wmi_pdev_set_ps_mode_cmd { 3008 u32 tlv_header; 3009 u32 vdev_id; 3010 u32 sta_ps_mode; 3011 } __packed; 3012 3013 struct wmi_pdev_suspend_cmd { 3014 u32 tlv_header; 3015 u32 pdev_id; 3016 u32 suspend_opt; 3017 } __packed; 3018 3019 struct wmi_pdev_resume_cmd { 3020 u32 tlv_header; 3021 u32 pdev_id; 3022 } __packed; 3023 3024 struct wmi_pdev_bss_chan_info_req_cmd { 3025 u32 tlv_header; 3026 /* ref wmi_bss_chan_info_req_type */ 3027 u32 req_type; 3028 u32 pdev_id; 3029 } __packed; 3030 3031 struct wmi_ap_ps_peer_cmd { 3032 u32 tlv_header; 3033 u32 vdev_id; 3034 struct wmi_mac_addr peer_macaddr; 3035 u32 param; 3036 u32 value; 3037 } __packed; 3038 3039 struct wmi_sta_powersave_param_cmd { 3040 u32 tlv_header; 3041 u32 vdev_id; 3042 u32 param; 3043 u32 value; 3044 } __packed; 3045 3046 struct wmi_pdev_set_regdomain_cmd { 3047 u32 tlv_header; 3048 u32 pdev_id; 3049 u32 reg_domain; 3050 u32 reg_domain_2g; 3051 u32 reg_domain_5g; 3052 u32 conformance_test_limit_2g; 3053 u32 conformance_test_limit_5g; 3054 u32 dfs_domain; 3055 } __packed; 3056 3057 struct wmi_peer_set_param_cmd { 3058 u32 tlv_header; 3059 u32 vdev_id; 3060 struct wmi_mac_addr peer_macaddr; 3061 u32 param_id; 3062 u32 param_value; 3063 } __packed; 3064 3065 struct wmi_peer_flush_tids_cmd { 3066 u32 tlv_header; 3067 u32 vdev_id; 3068 struct wmi_mac_addr peer_macaddr; 3069 u32 peer_tid_bitmap; 3070 } __packed; 3071 3072 struct wmi_dfs_phyerr_offload_cmd { 3073 u32 tlv_header; 3074 u32 pdev_id; 3075 } __packed; 3076 3077 struct wmi_bcn_offload_ctrl_cmd { 3078 u32 tlv_header; 3079 u32 vdev_id; 3080 u32 bcn_ctrl_op; 3081 } __packed; 3082 3083 enum scan_dwelltime_adaptive_mode { 3084 SCAN_DWELL_MODE_DEFAULT = 0, 3085 SCAN_DWELL_MODE_CONSERVATIVE = 1, 3086 SCAN_DWELL_MODE_MODERATE = 2, 3087 SCAN_DWELL_MODE_AGGRESSIVE = 3, 3088 SCAN_DWELL_MODE_STATIC = 4 3089 }; 3090 3091 #define WLAN_SCAN_MAX_NUM_SSID 10 3092 #define WLAN_SCAN_MAX_NUM_BSSID 10 3093 3094 #define WLAN_SSID_MAX_LEN 32 3095 3096 struct element_info { 3097 u32 len; 3098 u8 *ptr; 3099 }; 3100 3101 struct wlan_ssid { 3102 u8 length; 3103 u8 ssid[WLAN_SSID_MAX_LEN]; 3104 }; 3105 3106 #define WMI_IE_BITMAP_SIZE 8 3107 3108 #define WMI_SCAN_MAX_NUM_SSID 0x0A 3109 /* prefix used by scan requestor ids on the host */ 3110 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 3111 3112 /* prefix used by scan request ids generated on the host */ 3113 /* host cycles through the lower 12 bits to generate ids */ 3114 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 3115 3116 #define WLAN_SCAN_PARAMS_MAX_SSID 16 3117 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 3118 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 3119 3120 /* Values lower than this may be refused by some firmware revisions with a scan 3121 * completion with a timedout reason. 3122 */ 3123 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 3124 3125 /* Scan priority numbers must be sequential, starting with 0 */ 3126 enum wmi_scan_priority { 3127 WMI_SCAN_PRIORITY_VERY_LOW = 0, 3128 WMI_SCAN_PRIORITY_LOW, 3129 WMI_SCAN_PRIORITY_MEDIUM, 3130 WMI_SCAN_PRIORITY_HIGH, 3131 WMI_SCAN_PRIORITY_VERY_HIGH, 3132 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 3133 }; 3134 3135 enum wmi_scan_event_type { 3136 WMI_SCAN_EVENT_STARTED = BIT(0), 3137 WMI_SCAN_EVENT_COMPLETED = BIT(1), 3138 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 3139 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3), 3140 WMI_SCAN_EVENT_DEQUEUED = BIT(4), 3141 /* possibly by high-prio scan */ 3142 WMI_SCAN_EVENT_PREEMPTED = BIT(5), 3143 WMI_SCAN_EVENT_START_FAILED = BIT(6), 3144 WMI_SCAN_EVENT_RESTARTED = BIT(7), 3145 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8), 3146 WMI_SCAN_EVENT_SUSPENDED = BIT(9), 3147 WMI_SCAN_EVENT_RESUMED = BIT(10), 3148 WMI_SCAN_EVENT_MAX = BIT(15), 3149 }; 3150 3151 enum wmi_scan_completion_reason { 3152 WMI_SCAN_REASON_COMPLETED, 3153 WMI_SCAN_REASON_CANCELLED, 3154 WMI_SCAN_REASON_PREEMPTED, 3155 WMI_SCAN_REASON_TIMEDOUT, 3156 WMI_SCAN_REASON_INTERNAL_FAILURE, 3157 WMI_SCAN_REASON_MAX, 3158 }; 3159 3160 struct wmi_start_scan_cmd { 3161 u32 tlv_header; 3162 u32 scan_id; 3163 u32 scan_req_id; 3164 u32 vdev_id; 3165 u32 scan_priority; 3166 u32 notify_scan_events; 3167 u32 dwell_time_active; 3168 u32 dwell_time_passive; 3169 u32 min_rest_time; 3170 u32 max_rest_time; 3171 u32 repeat_probe_time; 3172 u32 probe_spacing_time; 3173 u32 idle_time; 3174 u32 max_scan_time; 3175 u32 probe_delay; 3176 u32 scan_ctrl_flags; 3177 u32 burst_duration; 3178 u32 num_chan; 3179 u32 num_bssid; 3180 u32 num_ssids; 3181 u32 ie_len; 3182 u32 n_probes; 3183 struct wmi_mac_addr mac_addr; 3184 struct wmi_mac_addr mac_mask; 3185 u32 ie_bitmap[WMI_IE_BITMAP_SIZE]; 3186 u32 num_vendor_oui; 3187 u32 scan_ctrl_flags_ext; 3188 u32 dwell_time_active_2g; 3189 u32 dwell_time_active_6g; 3190 u32 dwell_time_passive_6g; 3191 u32 scan_start_offset; 3192 } __packed; 3193 3194 #define WMI_SCAN_FLAG_PASSIVE 0x1 3195 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 3196 #define WMI_SCAN_ADD_CCK_RATES 0x4 3197 #define WMI_SCAN_ADD_OFDM_RATES 0x8 3198 #define WMI_SCAN_CHAN_STAT_EVENT 0x10 3199 #define WMI_SCAN_FILTER_PROBE_REQ 0x20 3200 #define WMI_SCAN_BYPASS_DFS_CHN 0x40 3201 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 3202 #define WMI_SCAN_FILTER_PROMISCUOS 0x100 3203 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200 3204 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400 3205 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800 3206 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000 3207 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000 3208 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000 3209 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000 3210 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000 3211 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000 3212 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 3213 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 3214 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 3215 3216 #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000 3217 #define WMI_SCAN_DWELL_MODE_SHIFT 21 3218 3219 enum { 3220 WMI_SCAN_DWELL_MODE_DEFAULT = 0, 3221 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1, 3222 WMI_SCAN_DWELL_MODE_MODERATE = 2, 3223 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3, 3224 WMI_SCAN_DWELL_MODE_STATIC = 4, 3225 }; 3226 3227 #define WMI_SCAN_SET_DWELL_MODE(flag, mode) \ 3228 ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \ 3229 WMI_SCAN_DWELL_MODE_MASK)) 3230 3231 struct hint_short_ssid { 3232 u32 freq_flags; 3233 u32 short_ssid; 3234 }; 3235 3236 struct hint_bssid { 3237 u32 freq_flags; 3238 struct wmi_mac_addr bssid; 3239 }; 3240 3241 struct scan_req_params { 3242 u32 scan_id; 3243 u32 scan_req_id; 3244 u32 vdev_id; 3245 u32 pdev_id; 3246 enum wmi_scan_priority scan_priority; 3247 union { 3248 struct { 3249 u32 scan_ev_started:1, 3250 scan_ev_completed:1, 3251 scan_ev_bss_chan:1, 3252 scan_ev_foreign_chan:1, 3253 scan_ev_dequeued:1, 3254 scan_ev_preempted:1, 3255 scan_ev_start_failed:1, 3256 scan_ev_restarted:1, 3257 scan_ev_foreign_chn_exit:1, 3258 scan_ev_invalid:1, 3259 scan_ev_gpio_timeout:1, 3260 scan_ev_suspended:1, 3261 scan_ev_resumed:1; 3262 }; 3263 u32 scan_events; 3264 }; 3265 u32 dwell_time_active; 3266 u32 dwell_time_active_2g; 3267 u32 dwell_time_passive; 3268 u32 dwell_time_active_6g; 3269 u32 dwell_time_passive_6g; 3270 u32 min_rest_time; 3271 u32 max_rest_time; 3272 u32 repeat_probe_time; 3273 u32 probe_spacing_time; 3274 u32 idle_time; 3275 u32 max_scan_time; 3276 u32 probe_delay; 3277 union { 3278 struct { 3279 u32 scan_f_passive:1, 3280 scan_f_bcast_probe:1, 3281 scan_f_cck_rates:1, 3282 scan_f_ofdm_rates:1, 3283 scan_f_chan_stat_evnt:1, 3284 scan_f_filter_prb_req:1, 3285 scan_f_bypass_dfs_chn:1, 3286 scan_f_continue_on_err:1, 3287 scan_f_offchan_mgmt_tx:1, 3288 scan_f_offchan_data_tx:1, 3289 scan_f_promisc_mode:1, 3290 scan_f_capture_phy_err:1, 3291 scan_f_strict_passive_pch:1, 3292 scan_f_half_rate:1, 3293 scan_f_quarter_rate:1, 3294 scan_f_force_active_dfs_chn:1, 3295 scan_f_add_tpc_ie_in_probe:1, 3296 scan_f_add_ds_ie_in_probe:1, 3297 scan_f_add_spoofed_mac_in_probe:1, 3298 scan_f_add_rand_seq_in_probe:1, 3299 scan_f_en_ie_whitelist_in_probe:1, 3300 scan_f_forced:1, 3301 scan_f_2ghz:1, 3302 scan_f_5ghz:1, 3303 scan_f_80mhz:1; 3304 }; 3305 u32 scan_flags; 3306 }; 3307 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode; 3308 u32 burst_duration; 3309 u32 num_chan; 3310 u32 num_bssid; 3311 u32 num_ssids; 3312 u32 n_probes; 3313 u32 *chan_list; 3314 u32 notify_scan_events; 3315 struct wlan_ssid ssid[WLAN_SCAN_MAX_NUM_SSID]; 3316 struct wmi_mac_addr bssid_list[WLAN_SCAN_MAX_NUM_BSSID]; 3317 struct element_info extraie; 3318 struct element_info htcap; 3319 struct element_info vhtcap; 3320 u32 num_hint_s_ssid; 3321 u32 num_hint_bssid; 3322 struct hint_short_ssid hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID]; 3323 struct hint_bssid hint_bssid[WLAN_SCAN_MAX_HINT_BSSID]; 3324 struct wmi_mac_addr mac_addr; 3325 struct wmi_mac_addr mac_mask; 3326 }; 3327 3328 struct wmi_ssid_arg { 3329 int len; 3330 const u8 *ssid; 3331 }; 3332 3333 struct wmi_bssid_arg { 3334 const u8 *bssid; 3335 }; 3336 3337 struct wmi_start_scan_arg { 3338 u32 scan_id; 3339 u32 scan_req_id; 3340 u32 vdev_id; 3341 u32 scan_priority; 3342 u32 notify_scan_events; 3343 u32 dwell_time_active; 3344 u32 dwell_time_passive; 3345 u32 min_rest_time; 3346 u32 max_rest_time; 3347 u32 repeat_probe_time; 3348 u32 probe_spacing_time; 3349 u32 idle_time; 3350 u32 max_scan_time; 3351 u32 probe_delay; 3352 u32 scan_ctrl_flags; 3353 3354 u32 ie_len; 3355 u32 n_channels; 3356 u32 n_ssids; 3357 u32 n_bssids; 3358 3359 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN]; 3360 u32 channels[64]; 3361 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID]; 3362 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID]; 3363 }; 3364 3365 #define WMI_SCAN_STOP_ONE 0x00000000 3366 #define WMI_SCN_STOP_VAP_ALL 0x01000000 3367 #define WMI_SCAN_STOP_ALL 0x04000000 3368 3369 /* Prefix 0xA000 indicates that the scan request 3370 * is trigger by HOST 3371 */ 3372 #define ATH11K_SCAN_ID 0xA000 3373 3374 enum scan_cancel_req_type { 3375 WLAN_SCAN_CANCEL_SINGLE = 1, 3376 WLAN_SCAN_CANCEL_VDEV_ALL, 3377 WLAN_SCAN_CANCEL_PDEV_ALL, 3378 }; 3379 3380 struct scan_cancel_param { 3381 u32 requester; 3382 u32 scan_id; 3383 enum scan_cancel_req_type req_type; 3384 u32 vdev_id; 3385 u32 pdev_id; 3386 }; 3387 3388 struct wmi_bcn_send_from_host_cmd { 3389 u32 tlv_header; 3390 u32 vdev_id; 3391 u32 data_len; 3392 union { 3393 u32 frag_ptr; 3394 u32 frag_ptr_lo; 3395 }; 3396 u32 frame_ctrl; 3397 u32 dtim_flag; 3398 u32 bcn_antenna; 3399 u32 frag_ptr_hi; 3400 }; 3401 3402 #define WMI_CHAN_INFO_MODE GENMASK(5, 0) 3403 #define WMI_CHAN_INFO_HT40_PLUS BIT(6) 3404 #define WMI_CHAN_INFO_PASSIVE BIT(7) 3405 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8) 3406 #define WMI_CHAN_INFO_AP_DISABLED BIT(9) 3407 #define WMI_CHAN_INFO_DFS BIT(10) 3408 #define WMI_CHAN_INFO_ALLOW_HT BIT(11) 3409 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12) 3410 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13) 3411 #define WMI_CHAN_INFO_HALF_RATE BIT(14) 3412 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15) 3413 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) 3414 #define WMI_CHAN_INFO_ALLOW_HE BIT(17) 3415 #define WMI_CHAN_INFO_PSC BIT(18) 3416 3417 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) 3418 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) 3419 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16) 3420 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24) 3421 3422 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0) 3423 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8) 3424 3425 struct wmi_channel { 3426 u32 tlv_header; 3427 u32 mhz; 3428 u32 band_center_freq1; 3429 u32 band_center_freq2; 3430 u32 info; 3431 u32 reg_info_1; 3432 u32 reg_info_2; 3433 } __packed; 3434 3435 struct wmi_mgmt_params { 3436 void *tx_frame; 3437 u16 frm_len; 3438 u8 vdev_id; 3439 u16 chanfreq; 3440 void *pdata; 3441 u16 desc_id; 3442 u8 *macaddr; 3443 }; 3444 3445 enum wmi_sta_ps_mode { 3446 WMI_STA_PS_MODE_DISABLED = 0, 3447 WMI_STA_PS_MODE_ENABLED = 1, 3448 }; 3449 3450 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF 3451 #define WMI_SMPS_MASK_UPPER_3BITS 0x7 3452 #define WMI_SMPS_PARAM_VALUE_SHIFT 29 3453 3454 #define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1 3455 #define ATH11K_WMI_FW_HANG_DELAY 0 3456 3457 /* type, 0:unused 1: ASSERT 2: not respond detect command 3458 * delay_time_ms, the simulate will delay time 3459 */ 3460 3461 struct wmi_force_fw_hang_cmd { 3462 u32 tlv_header; 3463 u32 type; 3464 u32 delay_time_ms; 3465 }; 3466 3467 struct wmi_vdev_set_param_cmd { 3468 u32 tlv_header; 3469 u32 vdev_id; 3470 u32 param_id; 3471 u32 param_value; 3472 } __packed; 3473 3474 enum wmi_stats_id { 3475 WMI_REQUEST_PEER_STAT = BIT(0), 3476 WMI_REQUEST_AP_STAT = BIT(1), 3477 WMI_REQUEST_PDEV_STAT = BIT(2), 3478 WMI_REQUEST_VDEV_STAT = BIT(3), 3479 WMI_REQUEST_BCNFLT_STAT = BIT(4), 3480 WMI_REQUEST_VDEV_RATE_STAT = BIT(5), 3481 WMI_REQUEST_INST_STAT = BIT(6), 3482 WMI_REQUEST_MIB_STAT = BIT(7), 3483 WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8), 3484 WMI_REQUEST_CONGESTION_STAT = BIT(9), 3485 WMI_REQUEST_PEER_EXTD_STAT = BIT(10), 3486 WMI_REQUEST_BCN_STAT = BIT(11), 3487 WMI_REQUEST_BCN_STAT_RESET = BIT(12), 3488 WMI_REQUEST_PEER_EXTD2_STAT = BIT(13), 3489 }; 3490 3491 struct wmi_request_stats_cmd { 3492 u32 tlv_header; 3493 enum wmi_stats_id stats_id; 3494 u32 vdev_id; 3495 struct wmi_mac_addr peer_macaddr; 3496 u32 pdev_id; 3497 } __packed; 3498 3499 struct wmi_get_pdev_temperature_cmd { 3500 u32 tlv_header; 3501 u32 param; 3502 u32 pdev_id; 3503 } __packed; 3504 3505 #define WMI_BEACON_TX_BUFFER_SIZE 512 3506 3507 struct wmi_bcn_tmpl_cmd { 3508 u32 tlv_header; 3509 u32 vdev_id; 3510 u32 tim_ie_offset; 3511 u32 buf_len; 3512 u32 csa_switch_count_offset; 3513 u32 ext_csa_switch_count_offset; 3514 u32 csa_event_bitmap; 3515 u32 mbssid_ie_offset; 3516 u32 esp_ie_offset; 3517 } __packed; 3518 3519 struct wmi_key_seq_counter { 3520 u32 key_seq_counter_l; 3521 u32 key_seq_counter_h; 3522 } __packed; 3523 3524 struct wmi_vdev_install_key_cmd { 3525 u32 tlv_header; 3526 u32 vdev_id; 3527 struct wmi_mac_addr peer_macaddr; 3528 u32 key_idx; 3529 u32 key_flags; 3530 u32 key_cipher; 3531 struct wmi_key_seq_counter key_rsc_counter; 3532 struct wmi_key_seq_counter key_global_rsc_counter; 3533 struct wmi_key_seq_counter key_tsc_counter; 3534 u8 wpi_key_rsc_counter[16]; 3535 u8 wpi_key_tsc_counter[16]; 3536 u32 key_len; 3537 u32 key_txmic_len; 3538 u32 key_rxmic_len; 3539 u32 is_group_key_id_valid; 3540 u32 group_key_id; 3541 3542 /* Followed by key_data containing key followed by 3543 * tx mic and then rx mic 3544 */ 3545 } __packed; 3546 3547 struct wmi_vdev_install_key_arg { 3548 u32 vdev_id; 3549 const u8 *macaddr; 3550 u32 key_idx; 3551 u32 key_flags; 3552 u32 key_cipher; 3553 u32 key_len; 3554 u32 key_txmic_len; 3555 u32 key_rxmic_len; 3556 u64 key_rsc_counter; 3557 const void *key_data; 3558 }; 3559 3560 #define WMI_MAX_SUPPORTED_RATES 128 3561 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3 3562 #define WMI_HOST_MAX_HE_RATE_SET 3 3563 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0 3564 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1 3565 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2 3566 3567 struct wmi_rate_set_arg { 3568 u32 num_rates; 3569 u8 rates[WMI_MAX_SUPPORTED_RATES]; 3570 }; 3571 3572 struct peer_assoc_params { 3573 struct wmi_mac_addr peer_macaddr; 3574 u32 vdev_id; 3575 u32 peer_new_assoc; 3576 u32 peer_associd; 3577 u32 peer_flags; 3578 u32 peer_caps; 3579 u32 peer_listen_intval; 3580 u32 peer_ht_caps; 3581 u32 peer_max_mpdu; 3582 u32 peer_mpdu_density; 3583 u32 peer_rate_caps; 3584 u32 peer_nss; 3585 u32 peer_vht_caps; 3586 u32 peer_phymode; 3587 u32 peer_ht_info[2]; 3588 struct wmi_rate_set_arg peer_legacy_rates; 3589 struct wmi_rate_set_arg peer_ht_rates; 3590 u32 rx_max_rate; 3591 u32 rx_mcs_set; 3592 u32 tx_max_rate; 3593 u32 tx_mcs_set; 3594 u8 vht_capable; 3595 u8 min_data_rate; 3596 u32 tx_max_mcs_nss; 3597 u32 peer_bw_rxnss_override; 3598 bool is_pmf_enabled; 3599 bool is_wme_set; 3600 bool qos_flag; 3601 bool apsd_flag; 3602 bool ht_flag; 3603 bool bw_40; 3604 bool bw_80; 3605 bool bw_160; 3606 bool stbc_flag; 3607 bool ldpc_flag; 3608 bool static_mimops_flag; 3609 bool dynamic_mimops_flag; 3610 bool spatial_mux_flag; 3611 bool vht_flag; 3612 bool vht_ng_flag; 3613 bool need_ptk_4_way; 3614 bool need_gtk_2_way; 3615 bool auth_flag; 3616 bool safe_mode_enabled; 3617 bool amsdu_disable; 3618 /* Use common structure */ 3619 u8 peer_mac[ETH_ALEN]; 3620 3621 bool he_flag; 3622 u32 peer_he_cap_macinfo[2]; 3623 u32 peer_he_cap_macinfo_internal; 3624 u32 peer_he_caps_6ghz; 3625 u32 peer_he_ops; 3626 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; 3627 u32 peer_he_mcs_count; 3628 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3629 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3630 bool twt_responder; 3631 bool twt_requester; 3632 bool is_assoc; 3633 struct ath11k_ppe_threshold peer_ppet; 3634 }; 3635 3636 struct wmi_peer_assoc_complete_cmd { 3637 u32 tlv_header; 3638 struct wmi_mac_addr peer_macaddr; 3639 u32 vdev_id; 3640 u32 peer_new_assoc; 3641 u32 peer_associd; 3642 u32 peer_flags; 3643 u32 peer_caps; 3644 u32 peer_listen_intval; 3645 u32 peer_ht_caps; 3646 u32 peer_max_mpdu; 3647 u32 peer_mpdu_density; 3648 u32 peer_rate_caps; 3649 u32 peer_nss; 3650 u32 peer_vht_caps; 3651 u32 peer_phymode; 3652 u32 peer_ht_info[2]; 3653 u32 num_peer_legacy_rates; 3654 u32 num_peer_ht_rates; 3655 u32 peer_bw_rxnss_override; 3656 struct wmi_ppe_threshold peer_ppet; 3657 u32 peer_he_cap_info; 3658 u32 peer_he_ops; 3659 u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE]; 3660 u32 peer_he_mcs; 3661 u32 peer_he_cap_info_ext; 3662 u32 peer_he_cap_info_internal; 3663 u32 min_data_rate; 3664 u32 peer_he_caps_6ghz; 3665 } __packed; 3666 3667 struct wmi_stop_scan_cmd { 3668 u32 tlv_header; 3669 u32 requestor; 3670 u32 scan_id; 3671 u32 req_type; 3672 u32 vdev_id; 3673 u32 pdev_id; 3674 }; 3675 3676 struct scan_chan_list_params { 3677 u32 pdev_id; 3678 u16 nallchans; 3679 struct channel_param ch_param[]; 3680 }; 3681 3682 struct wmi_scan_chan_list_cmd { 3683 u32 tlv_header; 3684 u32 num_scan_chans; 3685 u32 flags; 3686 u32 pdev_id; 3687 } __packed; 3688 3689 struct wmi_scan_prob_req_oui_cmd { 3690 u32 tlv_header; 3691 u32 prob_req_oui; 3692 } __packed; 3693 3694 #define WMI_MGMT_SEND_DOWNLD_LEN 64 3695 3696 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0) 3697 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8) 3698 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20) 3699 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28) 3700 3701 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0) 3702 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8) 3703 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15) 3704 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20) 3705 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21) 3706 3707 struct wmi_mgmt_send_params { 3708 u32 tlv_header; 3709 u32 tx_params_dword0; 3710 u32 tx_params_dword1; 3711 }; 3712 3713 struct wmi_mgmt_send_cmd { 3714 u32 tlv_header; 3715 u32 vdev_id; 3716 u32 desc_id; 3717 u32 chanfreq; 3718 u32 paddr_lo; 3719 u32 paddr_hi; 3720 u32 frame_len; 3721 u32 buf_len; 3722 u32 tx_params_valid; 3723 3724 /* This TLV is followed by struct wmi_mgmt_frame */ 3725 3726 /* Followed by struct wmi_mgmt_send_params */ 3727 } __packed; 3728 3729 struct wmi_sta_powersave_mode_cmd { 3730 u32 tlv_header; 3731 u32 vdev_id; 3732 u32 sta_ps_mode; 3733 }; 3734 3735 struct wmi_sta_smps_force_mode_cmd { 3736 u32 tlv_header; 3737 u32 vdev_id; 3738 u32 forced_mode; 3739 }; 3740 3741 struct wmi_sta_smps_param_cmd { 3742 u32 tlv_header; 3743 u32 vdev_id; 3744 u32 param; 3745 u32 value; 3746 }; 3747 3748 struct wmi_bcn_prb_info { 3749 u32 tlv_header; 3750 u32 caps; 3751 u32 erp; 3752 } __packed; 3753 3754 enum { 3755 WMI_PDEV_SUSPEND, 3756 WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 3757 }; 3758 3759 struct green_ap_ps_params { 3760 u32 value; 3761 }; 3762 3763 struct wmi_pdev_green_ap_ps_enable_cmd_param { 3764 u32 tlv_header; 3765 u32 pdev_id; 3766 u32 enable; 3767 }; 3768 3769 struct ap_ps_params { 3770 u32 vdev_id; 3771 u32 param; 3772 u32 value; 3773 }; 3774 3775 struct vdev_set_params { 3776 u32 if_id; 3777 u32 param_id; 3778 u32 param_value; 3779 }; 3780 3781 struct stats_request_params { 3782 u32 stats_id; 3783 u32 vdev_id; 3784 u32 pdev_id; 3785 }; 3786 3787 struct wmi_set_current_country_params { 3788 u8 alpha2[3]; 3789 }; 3790 3791 struct wmi_set_current_country_cmd { 3792 u32 tlv_header; 3793 u32 pdev_id; 3794 u32 new_alpha2; 3795 } __packed; 3796 3797 enum set_init_cc_type { 3798 WMI_COUNTRY_INFO_TYPE_ALPHA, 3799 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE, 3800 WMI_COUNTRY_INFO_TYPE_REGDOMAIN, 3801 }; 3802 3803 enum set_init_cc_flags { 3804 INVALID_CC, 3805 CC_IS_SET, 3806 REGDMN_IS_SET, 3807 ALPHA_IS_SET, 3808 }; 3809 3810 struct wmi_init_country_params { 3811 union { 3812 u16 country_code; 3813 u16 regdom_id; 3814 u8 alpha2[3]; 3815 } cc_info; 3816 enum set_init_cc_flags flags; 3817 }; 3818 3819 struct wmi_init_country_cmd { 3820 u32 tlv_header; 3821 u32 pdev_id; 3822 u32 init_cc_type; 3823 union { 3824 u32 country_code; 3825 u32 regdom_id; 3826 u32 alpha2; 3827 } cc_info; 3828 } __packed; 3829 3830 struct wmi_11d_scan_start_params { 3831 u32 vdev_id; 3832 u32 scan_period_msec; 3833 u32 start_interval_msec; 3834 }; 3835 3836 struct wmi_11d_scan_start_cmd { 3837 u32 tlv_header; 3838 u32 vdev_id; 3839 u32 scan_period_msec; 3840 u32 start_interval_msec; 3841 } __packed; 3842 3843 struct wmi_11d_scan_stop_cmd { 3844 u32 tlv_header; 3845 u32 vdev_id; 3846 } __packed; 3847 3848 struct wmi_11d_new_cc_ev { 3849 u32 new_alpha2; 3850 } __packed; 3851 3852 #define THERMAL_LEVELS 1 3853 struct tt_level_config { 3854 u32 tmplwm; 3855 u32 tmphwm; 3856 u32 dcoffpercent; 3857 u32 priority; 3858 }; 3859 3860 struct thermal_mitigation_params { 3861 u32 pdev_id; 3862 u32 enable; 3863 u32 dc; 3864 u32 dc_per_event; 3865 struct tt_level_config levelconf[THERMAL_LEVELS]; 3866 }; 3867 3868 struct wmi_therm_throt_config_request_cmd { 3869 u32 tlv_header; 3870 u32 pdev_id; 3871 u32 enable; 3872 u32 dc; 3873 u32 dc_per_event; 3874 u32 therm_throt_levels; 3875 } __packed; 3876 3877 struct wmi_therm_throt_level_config_info { 3878 u32 tlv_header; 3879 u32 temp_lwm; 3880 u32 temp_hwm; 3881 u32 dc_off_percent; 3882 u32 prio; 3883 } __packed; 3884 3885 struct wmi_delba_send_cmd { 3886 u32 tlv_header; 3887 u32 vdev_id; 3888 struct wmi_mac_addr peer_macaddr; 3889 u32 tid; 3890 u32 initiator; 3891 u32 reasoncode; 3892 } __packed; 3893 3894 struct wmi_addba_setresponse_cmd { 3895 u32 tlv_header; 3896 u32 vdev_id; 3897 struct wmi_mac_addr peer_macaddr; 3898 u32 tid; 3899 u32 statuscode; 3900 } __packed; 3901 3902 struct wmi_addba_send_cmd { 3903 u32 tlv_header; 3904 u32 vdev_id; 3905 struct wmi_mac_addr peer_macaddr; 3906 u32 tid; 3907 u32 buffersize; 3908 } __packed; 3909 3910 struct wmi_addba_clear_resp_cmd { 3911 u32 tlv_header; 3912 u32 vdev_id; 3913 struct wmi_mac_addr peer_macaddr; 3914 } __packed; 3915 3916 struct wmi_pdev_pktlog_filter_info { 3917 u32 tlv_header; 3918 struct wmi_mac_addr peer_macaddr; 3919 } __packed; 3920 3921 struct wmi_pdev_pktlog_filter_cmd { 3922 u32 tlv_header; 3923 u32 pdev_id; 3924 u32 enable; 3925 u32 filter_type; 3926 u32 num_mac; 3927 } __packed; 3928 3929 enum ath11k_wmi_pktlog_enable { 3930 ATH11K_WMI_PKTLOG_ENABLE_AUTO = 0, 3931 ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1, 3932 }; 3933 3934 struct wmi_pktlog_enable_cmd { 3935 u32 tlv_header; 3936 u32 pdev_id; 3937 u32 evlist; /* WMI_PKTLOG_EVENT */ 3938 u32 enable; 3939 } __packed; 3940 3941 struct wmi_pktlog_disable_cmd { 3942 u32 tlv_header; 3943 u32 pdev_id; 3944 } __packed; 3945 3946 #define DFS_PHYERR_UNIT_TEST_CMD 0 3947 #define DFS_UNIT_TEST_MODULE 0x2b 3948 #define DFS_UNIT_TEST_TOKEN 0xAA 3949 3950 enum dfs_test_args_idx { 3951 DFS_TEST_CMDID = 0, 3952 DFS_TEST_PDEV_ID, 3953 DFS_TEST_RADAR_PARAM, 3954 DFS_MAX_TEST_ARGS, 3955 }; 3956 3957 struct wmi_dfs_unit_test_arg { 3958 u32 cmd_id; 3959 u32 pdev_id; 3960 u32 radar_param; 3961 }; 3962 3963 struct wmi_unit_test_cmd { 3964 u32 tlv_header; 3965 u32 vdev_id; 3966 u32 module_id; 3967 u32 num_args; 3968 u32 diag_token; 3969 /* Followed by test args*/ 3970 } __packed; 3971 3972 #define MAX_SUPPORTED_RATES 128 3973 3974 #define WMI_PEER_AUTH 0x00000001 3975 #define WMI_PEER_QOS 0x00000002 3976 #define WMI_PEER_NEED_PTK_4_WAY 0x00000004 3977 #define WMI_PEER_NEED_GTK_2_WAY 0x00000010 3978 #define WMI_PEER_HE 0x00000400 3979 #define WMI_PEER_APSD 0x00000800 3980 #define WMI_PEER_HT 0x00001000 3981 #define WMI_PEER_40MHZ 0x00002000 3982 #define WMI_PEER_STBC 0x00008000 3983 #define WMI_PEER_LDPC 0x00010000 3984 #define WMI_PEER_DYN_MIMOPS 0x00020000 3985 #define WMI_PEER_STATIC_MIMOPS 0x00040000 3986 #define WMI_PEER_SPATIAL_MUX 0x00200000 3987 #define WMI_PEER_TWT_REQ 0x00400000 3988 #define WMI_PEER_TWT_RESP 0x00800000 3989 #define WMI_PEER_VHT 0x02000000 3990 #define WMI_PEER_80MHZ 0x04000000 3991 #define WMI_PEER_PMF 0x08000000 3992 /* TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000. 3993 * Need to be cleaned up 3994 */ 3995 #define WMI_PEER_IS_P2P_CAPABLE 0x20000000 3996 #define WMI_PEER_160MHZ 0x40000000 3997 #define WMI_PEER_SAFEMODE_EN 0x80000000 3998 3999 struct beacon_tmpl_params { 4000 u8 vdev_id; 4001 u32 tim_ie_offset; 4002 u32 tmpl_len; 4003 u32 tmpl_len_aligned; 4004 u32 csa_switch_count_offset; 4005 u32 ext_csa_switch_count_offset; 4006 u8 *frm; 4007 }; 4008 4009 struct wmi_rate_set { 4010 u32 num_rates; 4011 u32 rates[(MAX_SUPPORTED_RATES / 4) + 1]; 4012 }; 4013 4014 struct wmi_vht_rate_set { 4015 u32 tlv_header; 4016 u32 rx_max_rate; 4017 u32 rx_mcs_set; 4018 u32 tx_max_rate; 4019 u32 tx_mcs_set; 4020 u32 tx_max_mcs_nss; 4021 } __packed; 4022 4023 struct wmi_he_rate_set { 4024 u32 tlv_header; 4025 4026 /* MCS at which the peer can receive */ 4027 u32 rx_mcs_set; 4028 4029 /* MCS at which the peer can transmit */ 4030 u32 tx_mcs_set; 4031 } __packed; 4032 4033 #define MAX_REG_RULES 10 4034 #define REG_ALPHA2_LEN 2 4035 4036 enum wmi_start_event_param { 4037 WMI_VDEV_START_RESP_EVENT = 0, 4038 WMI_VDEV_RESTART_RESP_EVENT, 4039 }; 4040 4041 struct wmi_vdev_start_resp_event { 4042 u32 vdev_id; 4043 u32 requestor_id; 4044 enum wmi_start_event_param resp_type; 4045 u32 status; 4046 u32 chain_mask; 4047 u32 smps_mode; 4048 union { 4049 u32 mac_id; 4050 u32 pdev_id; 4051 }; 4052 u32 cfgd_tx_streams; 4053 u32 cfgd_rx_streams; 4054 } __packed; 4055 4056 /* VDEV start response status codes */ 4057 enum wmi_vdev_start_resp_status_code { 4058 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0, 4059 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1, 4060 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2, 4061 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3, 4062 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, 4063 }; 4064 4065 ; 4066 enum cc_setting_code { 4067 REG_SET_CC_STATUS_PASS = 0, 4068 REG_CURRENT_ALPHA2_NOT_FOUND = 1, 4069 REG_INIT_ALPHA2_NOT_FOUND = 2, 4070 REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 4071 REG_SET_CC_STATUS_NO_MEMORY = 4, 4072 REG_SET_CC_STATUS_FAIL = 5, 4073 }; 4074 4075 /* Regaulatory Rule Flags Passed by FW */ 4076 #define REGULATORY_CHAN_DISABLED BIT(0) 4077 #define REGULATORY_CHAN_NO_IR BIT(1) 4078 #define REGULATORY_CHAN_RADAR BIT(3) 4079 #define REGULATORY_CHAN_NO_OFDM BIT(6) 4080 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 4081 4082 #define REGULATORY_CHAN_NO_HT40 BIT(4) 4083 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 4084 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 4085 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 4086 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 4087 4088 enum { 4089 WMI_REG_SET_CC_STATUS_PASS = 0, 4090 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1, 4091 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2, 4092 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 4093 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4, 4094 WMI_REG_SET_CC_STATUS_FAIL = 5, 4095 }; 4096 4097 struct cur_reg_rule { 4098 u16 start_freq; 4099 u16 end_freq; 4100 u16 max_bw; 4101 u8 reg_power; 4102 u8 ant_gain; 4103 u16 flags; 4104 }; 4105 4106 struct cur_regulatory_info { 4107 enum cc_setting_code status_code; 4108 u8 num_phy; 4109 u8 phy_id; 4110 u16 reg_dmn_pair; 4111 u16 ctry_code; 4112 u8 alpha2[REG_ALPHA2_LEN + 1]; 4113 u32 dfs_region; 4114 u32 phybitmap; 4115 u32 min_bw_2g; 4116 u32 max_bw_2g; 4117 u32 min_bw_5g; 4118 u32 max_bw_5g; 4119 u32 num_2g_reg_rules; 4120 u32 num_5g_reg_rules; 4121 struct cur_reg_rule *reg_rules_2g_ptr; 4122 struct cur_reg_rule *reg_rules_5g_ptr; 4123 }; 4124 4125 struct wmi_reg_chan_list_cc_event { 4126 u32 status_code; 4127 u32 phy_id; 4128 u32 alpha2; 4129 u32 num_phy; 4130 u32 country_id; 4131 u32 domain_code; 4132 u32 dfs_region; 4133 u32 phybitmap; 4134 u32 min_bw_2g; 4135 u32 max_bw_2g; 4136 u32 min_bw_5g; 4137 u32 max_bw_5g; 4138 u32 num_2g_reg_rules; 4139 u32 num_5g_reg_rules; 4140 } __packed; 4141 4142 struct wmi_regulatory_rule_struct { 4143 u32 tlv_header; 4144 u32 freq_info; 4145 u32 bw_pwr_info; 4146 u32 flag_info; 4147 }; 4148 4149 struct wmi_vdev_delete_resp_event { 4150 u32 vdev_id; 4151 } __packed; 4152 4153 struct wmi_peer_delete_resp_event { 4154 u32 vdev_id; 4155 struct wmi_mac_addr peer_macaddr; 4156 } __packed; 4157 4158 struct wmi_bcn_tx_status_event { 4159 u32 vdev_id; 4160 u32 tx_status; 4161 } __packed; 4162 4163 struct wmi_vdev_stopped_event { 4164 u32 vdev_id; 4165 } __packed; 4166 4167 struct wmi_pdev_bss_chan_info_event { 4168 u32 freq; /* Units in MHz */ 4169 u32 noise_floor; /* units are dBm */ 4170 /* rx clear - how often the channel was unused */ 4171 u32 rx_clear_count_low; 4172 u32 rx_clear_count_high; 4173 /* cycle count - elapsed time during measured period, in clock ticks */ 4174 u32 cycle_count_low; 4175 u32 cycle_count_high; 4176 /* tx cycle count - elapsed time spent in tx, in clock ticks */ 4177 u32 tx_cycle_count_low; 4178 u32 tx_cycle_count_high; 4179 /* rx cycle count - elapsed time spent in rx, in clock ticks */ 4180 u32 rx_cycle_count_low; 4181 u32 rx_cycle_count_high; 4182 /*rx_cycle cnt for my bss in 64bits format */ 4183 u32 rx_bss_cycle_count_low; 4184 u32 rx_bss_cycle_count_high; 4185 u32 pdev_id; 4186 } __packed; 4187 4188 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 4189 4190 struct wmi_vdev_install_key_compl_event { 4191 u32 vdev_id; 4192 struct wmi_mac_addr peer_macaddr; 4193 u32 key_idx; 4194 u32 key_flags; 4195 u32 status; 4196 } __packed; 4197 4198 struct wmi_vdev_install_key_complete_arg { 4199 u32 vdev_id; 4200 const u8 *macaddr; 4201 u32 key_idx; 4202 u32 key_flags; 4203 u32 status; 4204 }; 4205 4206 struct wmi_peer_assoc_conf_event { 4207 u32 vdev_id; 4208 struct wmi_mac_addr peer_macaddr; 4209 } __packed; 4210 4211 struct wmi_peer_assoc_conf_arg { 4212 u32 vdev_id; 4213 const u8 *macaddr; 4214 }; 4215 4216 struct wmi_fils_discovery_event { 4217 u32 vdev_id; 4218 u32 fils_tt; 4219 u32 tbtt; 4220 } __packed; 4221 4222 struct wmi_probe_resp_tx_status_event { 4223 u32 vdev_id; 4224 u32 tx_status; 4225 } __packed; 4226 4227 /* 4228 * PDEV statistics 4229 */ 4230 struct wmi_pdev_stats_base { 4231 s32 chan_nf; 4232 u32 tx_frame_count; /* Cycles spent transmitting frames */ 4233 u32 rx_frame_count; /* Cycles spent receiving frames */ 4234 u32 rx_clear_count; /* Total channel busy time, evidently */ 4235 u32 cycle_count; /* Total on-channel time */ 4236 u32 phy_err_count; 4237 u32 chan_tx_pwr; 4238 } __packed; 4239 4240 struct wmi_pdev_stats_extra { 4241 u32 ack_rx_bad; 4242 u32 rts_bad; 4243 u32 rts_good; 4244 u32 fcs_bad; 4245 u32 no_beacons; 4246 u32 mib_int_count; 4247 } __packed; 4248 4249 struct wmi_pdev_stats_tx { 4250 /* Num HTT cookies queued to dispatch list */ 4251 s32 comp_queued; 4252 4253 /* Num HTT cookies dispatched */ 4254 s32 comp_delivered; 4255 4256 /* Num MSDU queued to WAL */ 4257 s32 msdu_enqued; 4258 4259 /* Num MPDU queue to WAL */ 4260 s32 mpdu_enqued; 4261 4262 /* Num MSDUs dropped by WMM limit */ 4263 s32 wmm_drop; 4264 4265 /* Num Local frames queued */ 4266 s32 local_enqued; 4267 4268 /* Num Local frames done */ 4269 s32 local_freed; 4270 4271 /* Num queued to HW */ 4272 s32 hw_queued; 4273 4274 /* Num PPDU reaped from HW */ 4275 s32 hw_reaped; 4276 4277 /* Num underruns */ 4278 s32 underrun; 4279 4280 /* Num hw paused */ 4281 u32 hw_paused; 4282 4283 /* Num PPDUs cleaned up in TX abort */ 4284 s32 tx_abort; 4285 4286 /* Num MPDUs requeued by SW */ 4287 s32 mpdus_requeued; 4288 4289 /* excessive retries */ 4290 u32 tx_ko; 4291 4292 u32 tx_xretry; 4293 4294 /* data hw rate code */ 4295 u32 data_rc; 4296 4297 /* Scheduler self triggers */ 4298 u32 self_triggers; 4299 4300 /* frames dropped due to excessive sw retries */ 4301 u32 sw_retry_failure; 4302 4303 /* illegal rate phy errors */ 4304 u32 illgl_rate_phy_err; 4305 4306 /* wal pdev continuous xretry */ 4307 u32 pdev_cont_xretry; 4308 4309 /* wal pdev tx timeouts */ 4310 u32 pdev_tx_timeout; 4311 4312 /* wal pdev resets */ 4313 u32 pdev_resets; 4314 4315 /* frames dropped due to non-availability of stateless TIDs */ 4316 u32 stateless_tid_alloc_failure; 4317 4318 /* PhY/BB underrun */ 4319 u32 phy_underrun; 4320 4321 /* MPDU is more than txop limit */ 4322 u32 txop_ovf; 4323 4324 /* Num sequences posted */ 4325 u32 seq_posted; 4326 4327 /* Num sequences failed in queueing */ 4328 u32 seq_failed_queueing; 4329 4330 /* Num sequences completed */ 4331 u32 seq_completed; 4332 4333 /* Num sequences restarted */ 4334 u32 seq_restarted; 4335 4336 /* Num of MU sequences posted */ 4337 u32 mu_seq_posted; 4338 4339 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT 4340 * (Reset,channel change) 4341 */ 4342 s32 mpdus_sw_flush; 4343 4344 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 4345 s32 mpdus_hw_filter; 4346 4347 /* Num MPDUs truncated by PDG (TXOP, TBTT, 4348 * PPDU_duration based on rate, dyn_bw) 4349 */ 4350 s32 mpdus_truncated; 4351 4352 /* Num MPDUs that was tried but didn't receive ACK or BA */ 4353 s32 mpdus_ack_failed; 4354 4355 /* Num MPDUs that was dropped du to expiry. */ 4356 s32 mpdus_expired; 4357 } __packed; 4358 4359 struct wmi_pdev_stats_rx { 4360 /* Cnts any change in ring routing mid-ppdu */ 4361 s32 mid_ppdu_route_change; 4362 4363 /* Total number of statuses processed */ 4364 s32 status_rcvd; 4365 4366 /* Extra frags on rings 0-3 */ 4367 s32 r0_frags; 4368 s32 r1_frags; 4369 s32 r2_frags; 4370 s32 r3_frags; 4371 4372 /* MSDUs / MPDUs delivered to HTT */ 4373 s32 htt_msdus; 4374 s32 htt_mpdus; 4375 4376 /* MSDUs / MPDUs delivered to local stack */ 4377 s32 loc_msdus; 4378 s32 loc_mpdus; 4379 4380 /* AMSDUs that have more MSDUs than the status ring size */ 4381 s32 oversize_amsdu; 4382 4383 /* Number of PHY errors */ 4384 s32 phy_errs; 4385 4386 /* Number of PHY errors drops */ 4387 s32 phy_err_drop; 4388 4389 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 4390 s32 mpdu_errs; 4391 4392 /* Num overflow errors */ 4393 s32 rx_ovfl_errs; 4394 } __packed; 4395 4396 struct wmi_pdev_stats { 4397 struct wmi_pdev_stats_base base; 4398 struct wmi_pdev_stats_tx tx; 4399 struct wmi_pdev_stats_rx rx; 4400 } __packed; 4401 4402 #define WLAN_MAX_AC 4 4403 #define MAX_TX_RATE_VALUES 10 4404 #define MAX_TX_RATE_VALUES 10 4405 4406 struct wmi_vdev_stats { 4407 u32 vdev_id; 4408 u32 beacon_snr; 4409 u32 data_snr; 4410 u32 num_tx_frames[WLAN_MAX_AC]; 4411 u32 num_rx_frames; 4412 u32 num_tx_frames_retries[WLAN_MAX_AC]; 4413 u32 num_tx_frames_failures[WLAN_MAX_AC]; 4414 u32 num_rts_fail; 4415 u32 num_rts_success; 4416 u32 num_rx_err; 4417 u32 num_rx_discard; 4418 u32 num_tx_not_acked; 4419 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 4420 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 4421 } __packed; 4422 4423 struct wmi_bcn_stats { 4424 u32 vdev_id; 4425 u32 tx_bcn_succ_cnt; 4426 u32 tx_bcn_outage_cnt; 4427 } __packed; 4428 4429 struct wmi_stats_event { 4430 u32 stats_id; 4431 u32 num_pdev_stats; 4432 u32 num_vdev_stats; 4433 u32 num_peer_stats; 4434 u32 num_bcnflt_stats; 4435 u32 num_chan_stats; 4436 u32 num_mib_stats; 4437 u32 pdev_id; 4438 u32 num_bcn_stats; 4439 u32 num_peer_extd_stats; 4440 u32 num_peer_extd2_stats; 4441 } __packed; 4442 4443 struct wmi_rssi_stats { 4444 u32 vdev_id; 4445 u32 rssi_avg_beacon[WMI_MAX_CHAINS]; 4446 u32 rssi_avg_data[WMI_MAX_CHAINS]; 4447 struct wmi_mac_addr peer_macaddr; 4448 } __packed; 4449 4450 struct wmi_per_chain_rssi_stats { 4451 u32 num_per_chain_rssi_stats; 4452 } __packed; 4453 4454 struct wmi_pdev_ctl_failsafe_chk_event { 4455 u32 pdev_id; 4456 u32 ctl_failsafe_status; 4457 } __packed; 4458 4459 struct wmi_pdev_csa_switch_ev { 4460 u32 pdev_id; 4461 u32 current_switch_count; 4462 u32 num_vdevs; 4463 } __packed; 4464 4465 struct wmi_pdev_radar_ev { 4466 u32 pdev_id; 4467 u32 detection_mode; 4468 u32 chan_freq; 4469 u32 chan_width; 4470 u32 detector_id; 4471 u32 segment_id; 4472 u32 timestamp; 4473 u32 is_chirp; 4474 s32 freq_offset; 4475 s32 sidx; 4476 } __packed; 4477 4478 struct wmi_pdev_temperature_event { 4479 /* temperature value in Celcius degree */ 4480 s32 temp; 4481 u32 pdev_id; 4482 } __packed; 4483 4484 #define WMI_RX_STATUS_OK 0x00 4485 #define WMI_RX_STATUS_ERR_CRC 0x01 4486 #define WMI_RX_STATUS_ERR_DECRYPT 0x08 4487 #define WMI_RX_STATUS_ERR_MIC 0x10 4488 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 4489 4490 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 4491 4492 struct mgmt_rx_event_params { 4493 u32 chan_freq; 4494 u32 channel; 4495 u32 snr; 4496 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; 4497 u32 rate; 4498 enum wmi_phy_mode phy_mode; 4499 u32 buf_len; 4500 int status; 4501 u32 flags; 4502 int rssi; 4503 u32 tsf_delta; 4504 u8 pdev_id; 4505 }; 4506 4507 #define ATH_MAX_ANTENNA 4 4508 4509 struct wmi_mgmt_rx_hdr { 4510 u32 channel; 4511 u32 snr; 4512 u32 rate; 4513 u32 phy_mode; 4514 u32 buf_len; 4515 u32 status; 4516 u32 rssi_ctl[ATH_MAX_ANTENNA]; 4517 u32 flags; 4518 int rssi; 4519 u32 tsf_delta; 4520 u32 rx_tsf_l32; 4521 u32 rx_tsf_u32; 4522 u32 pdev_id; 4523 u32 chan_freq; 4524 } __packed; 4525 4526 #define MAX_ANTENNA_EIGHT 8 4527 4528 struct wmi_rssi_ctl_ext { 4529 u32 tlv_header; 4530 u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA]; 4531 }; 4532 4533 struct wmi_mgmt_tx_compl_event { 4534 u32 desc_id; 4535 u32 status; 4536 u32 pdev_id; 4537 } __packed; 4538 4539 struct wmi_scan_event { 4540 u32 event_type; /* %WMI_SCAN_EVENT_ */ 4541 u32 reason; /* %WMI_SCAN_REASON_ */ 4542 u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 4543 u32 scan_req_id; 4544 u32 scan_id; 4545 u32 vdev_id; 4546 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed 4547 * In case of AP it is TSF of the AP vdev 4548 * In case of STA connected state, this is the TSF of the AP 4549 * In case of STA not connected, it will be the free running HW timer 4550 */ 4551 u32 tsf_timestamp; 4552 } __packed; 4553 4554 struct wmi_peer_sta_kickout_arg { 4555 const u8 *mac_addr; 4556 }; 4557 4558 struct wmi_peer_sta_kickout_event { 4559 struct wmi_mac_addr peer_macaddr; 4560 } __packed; 4561 4562 enum wmi_roam_reason { 4563 WMI_ROAM_REASON_BETTER_AP = 1, 4564 WMI_ROAM_REASON_BEACON_MISS = 2, 4565 WMI_ROAM_REASON_LOW_RSSI = 3, 4566 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 4567 WMI_ROAM_REASON_HO_FAILED = 5, 4568 4569 /* keep last */ 4570 WMI_ROAM_REASON_MAX, 4571 }; 4572 4573 struct wmi_roam_event { 4574 u32 vdev_id; 4575 u32 reason; 4576 u32 rssi; 4577 } __packed; 4578 4579 #define WMI_CHAN_INFO_START_RESP 0 4580 #define WMI_CHAN_INFO_END_RESP 1 4581 4582 struct wmi_chan_info_event { 4583 u32 err_code; 4584 u32 freq; 4585 u32 cmd_flags; 4586 u32 noise_floor; 4587 u32 rx_clear_count; 4588 u32 cycle_count; 4589 u32 chan_tx_pwr_range; 4590 u32 chan_tx_pwr_tp; 4591 u32 rx_frame_count; 4592 u32 my_bss_rx_cycle_count; 4593 u32 rx_11b_mode_data_duration; 4594 u32 tx_frame_cnt; 4595 u32 mac_clk_mhz; 4596 u32 vdev_id; 4597 } __packed; 4598 4599 struct ath11k_targ_cap { 4600 u32 phy_capability; 4601 u32 max_frag_entry; 4602 u32 num_rf_chains; 4603 u32 ht_cap_info; 4604 u32 vht_cap_info; 4605 u32 vht_supp_mcs; 4606 u32 hw_min_tx_power; 4607 u32 hw_max_tx_power; 4608 u32 sys_cap_info; 4609 u32 min_pkt_size_enable; 4610 u32 max_bcn_ie_size; 4611 u32 max_num_scan_channels; 4612 u32 max_supported_macs; 4613 u32 wmi_fw_sub_feat_caps; 4614 u32 txrx_chainmask; 4615 u32 default_dbs_hw_mode_index; 4616 u32 num_msdu_desc; 4617 }; 4618 4619 enum wmi_vdev_type { 4620 WMI_VDEV_TYPE_AP = 1, 4621 WMI_VDEV_TYPE_STA = 2, 4622 WMI_VDEV_TYPE_IBSS = 3, 4623 WMI_VDEV_TYPE_MONITOR = 4, 4624 }; 4625 4626 enum wmi_vdev_subtype { 4627 WMI_VDEV_SUBTYPE_NONE, 4628 WMI_VDEV_SUBTYPE_P2P_DEVICE, 4629 WMI_VDEV_SUBTYPE_P2P_CLIENT, 4630 WMI_VDEV_SUBTYPE_P2P_GO, 4631 WMI_VDEV_SUBTYPE_PROXY_STA, 4632 WMI_VDEV_SUBTYPE_MESH_NON_11S, 4633 WMI_VDEV_SUBTYPE_MESH_11S, 4634 }; 4635 4636 enum wmi_sta_powersave_param { 4637 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 4638 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 4639 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 4640 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 4641 WMI_STA_PS_PARAM_UAPSD = 4, 4642 }; 4643 4644 #define WMI_UAPSD_AC_TYPE_DELI 0 4645 #define WMI_UAPSD_AC_TYPE_TRIG 1 4646 4647 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \ 4648 ((type == WMI_UAPSD_AC_TYPE_DELI) ? \ 4649 (1 << (ac << 1)) : (1 << ((ac << 1) + 1))) 4650 4651 enum wmi_sta_ps_param_uapsd { 4652 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4653 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4654 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4655 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4656 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4657 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4658 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4659 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4660 }; 4661 4662 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX 4663 4664 struct wmi_sta_uapsd_auto_trig_param { 4665 u32 wmm_ac; 4666 u32 user_priority; 4667 u32 service_interval; 4668 u32 suspend_interval; 4669 u32 delay_interval; 4670 }; 4671 4672 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param { 4673 u32 vdev_id; 4674 struct wmi_mac_addr peer_macaddr; 4675 u32 num_ac; 4676 }; 4677 4678 struct wmi_sta_uapsd_auto_trig_arg { 4679 u32 wmm_ac; 4680 u32 user_priority; 4681 u32 service_interval; 4682 u32 suspend_interval; 4683 u32 delay_interval; 4684 }; 4685 4686 enum wmi_sta_ps_param_tx_wake_threshold { 4687 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 4688 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 4689 4690 /* Values greater than one indicate that many TX attempts per beacon 4691 * interval before the STA will wake up 4692 */ 4693 }; 4694 4695 /* The maximum number of PS-Poll frames the FW will send in response to 4696 * traffic advertised in TIM before waking up (by sending a null frame with PS 4697 * = 0). Value 0 has a special meaning: there is no maximum count and the FW 4698 * will send as many PS-Poll as are necessary to retrieve buffered BU. This 4699 * parameter is used when the RX wake policy is 4700 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 4701 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 4702 */ 4703 enum wmi_sta_ps_param_pspoll_count { 4704 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 4705 /* Values greater than 0 indicate the maximum numer of PS-Poll frames 4706 * FW will send before waking up. 4707 */ 4708 }; 4709 4710 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 4711 enum wmi_ap_ps_param_uapsd { 4712 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4713 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4714 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4715 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4716 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4717 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4718 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4719 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4720 }; 4721 4722 /* U-APSD maximum service period of peer station */ 4723 enum wmi_ap_ps_peer_param_max_sp { 4724 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 4725 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 4726 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 4727 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 4728 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 4729 }; 4730 4731 enum wmi_ap_ps_peer_param { 4732 /** Set uapsd configuration for a given peer. 4733 * 4734 * This include the delivery and trigger enabled state for each AC. 4735 * The host MLME needs to set this based on AP capability and stations 4736 * request Set in the association request received from the station. 4737 * 4738 * Lower 8 bits of the value specify the UAPSD configuration. 4739 * 4740 * (see enum wmi_ap_ps_param_uapsd) 4741 * The default value is 0. 4742 */ 4743 WMI_AP_PS_PEER_PARAM_UAPSD = 0, 4744 4745 /** 4746 * Set the service period for a UAPSD capable station 4747 * 4748 * The service period from wme ie in the (re)assoc request frame. 4749 * 4750 * (see enum wmi_ap_ps_peer_param_max_sp) 4751 */ 4752 WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 4753 4754 /** Time in seconds for aging out buffered frames 4755 * for STA in power save 4756 */ 4757 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 4758 4759 /** Specify frame types that are considered SIFS 4760 * RESP trigger frame 4761 */ 4762 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3, 4763 4764 /** Specifies the trigger state of TID. 4765 * Valid only for UAPSD frame type 4766 */ 4767 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4, 4768 4769 /* Specifies the WNM sleep state of a STA */ 4770 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5, 4771 }; 4772 4773 #define DISABLE_SIFS_RESPONSE_TRIGGER 0 4774 4775 #define WMI_MAX_KEY_INDEX 3 4776 #define WMI_MAX_KEY_LEN 32 4777 4778 #define WMI_KEY_PAIRWISE 0x00 4779 #define WMI_KEY_GROUP 0x01 4780 4781 #define WMI_CIPHER_NONE 0x0 /* clear key */ 4782 #define WMI_CIPHER_WEP 0x1 4783 #define WMI_CIPHER_TKIP 0x2 4784 #define WMI_CIPHER_AES_OCB 0x3 4785 #define WMI_CIPHER_AES_CCM 0x4 4786 #define WMI_CIPHER_WAPI 0x5 4787 #define WMI_CIPHER_CKIP 0x6 4788 #define WMI_CIPHER_AES_CMAC 0x7 4789 #define WMI_CIPHER_ANY 0x8 4790 #define WMI_CIPHER_AES_GCM 0x9 4791 #define WMI_CIPHER_AES_GMAC 0xa 4792 4793 /* Value to disable fixed rate setting */ 4794 #define WMI_FIXED_RATE_NONE (0xffff) 4795 4796 #define ATH11K_RC_VERSION_OFFSET 28 4797 #define ATH11K_RC_PREAMBLE_OFFSET 8 4798 #define ATH11K_RC_NSS_OFFSET 5 4799 4800 #define ATH11K_HW_RATE_CODE(rate, nss, preamble) \ 4801 ((1 << ATH11K_RC_VERSION_OFFSET) | \ 4802 ((nss) << ATH11K_RC_NSS_OFFSET) | \ 4803 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) | \ 4804 (rate)) 4805 4806 /* Preamble types to be used with VDEV fixed rate configuration */ 4807 enum wmi_rate_preamble { 4808 WMI_RATE_PREAMBLE_OFDM, 4809 WMI_RATE_PREAMBLE_CCK, 4810 WMI_RATE_PREAMBLE_HT, 4811 WMI_RATE_PREAMBLE_VHT, 4812 WMI_RATE_PREAMBLE_HE, 4813 }; 4814 4815 /** 4816 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection. 4817 * @WMI_RTS_CTS_DISABLED : RTS/CTS protection is disabled. 4818 * @WMI_USE_RTS_CTS : RTS/CTS Enabled. 4819 * @WMI_USE_CTS2SELF : CTS to self protection Enabled. 4820 */ 4821 enum wmi_rtscts_prot_mode { 4822 WMI_RTS_CTS_DISABLED = 0, 4823 WMI_USE_RTS_CTS = 1, 4824 WMI_USE_CTS2SELF = 2, 4825 }; 4826 4827 /** 4828 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling 4829 * protection mode. 4830 * @WMI_RTSCTS_FOR_NO_RATESERIES - Neither of rate-series should use RTS-CTS 4831 * @WMI_RTSCTS_FOR_SECOND_RATESERIES - Only second rate-series will use RTS-CTS 4832 * @WMI_RTSCTS_ACROSS_SW_RETRIES - Only the second rate-series will use RTS-CTS, 4833 * but if there's a sw retry, both the rate 4834 * series will use RTS-CTS. 4835 * @WMI_RTSCTS_ERP - RTS/CTS used for ERP protection for every PPDU. 4836 * @WMI_RTSCTS_FOR_ALL_RATESERIES - Enable RTS-CTS for all rate series. 4837 */ 4838 enum wmi_rtscts_profile { 4839 WMI_RTSCTS_FOR_NO_RATESERIES = 0, 4840 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1, 4841 WMI_RTSCTS_ACROSS_SW_RETRIES = 2, 4842 WMI_RTSCTS_ERP = 3, 4843 WMI_RTSCTS_FOR_ALL_RATESERIES = 4, 4844 }; 4845 4846 struct ath11k_hal_reg_cap { 4847 u32 eeprom_rd; 4848 u32 eeprom_rd_ext; 4849 u32 regcap1; 4850 u32 regcap2; 4851 u32 wireless_modes; 4852 u32 low_2ghz_chan; 4853 u32 high_2ghz_chan; 4854 u32 low_5ghz_chan; 4855 u32 high_5ghz_chan; 4856 }; 4857 4858 struct ath11k_mem_chunk { 4859 void *vaddr; 4860 dma_addr_t paddr; 4861 u32 len; 4862 u32 req_id; 4863 }; 4864 4865 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 4866 4867 enum wmi_sta_ps_param_rx_wake_policy { 4868 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 4869 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 4870 }; 4871 4872 /* Do not change existing values! Used by ath11k_frame_mode parameter 4873 * module parameter. 4874 */ 4875 enum ath11k_hw_txrx_mode { 4876 ATH11K_HW_TXRX_RAW = 0, 4877 ATH11K_HW_TXRX_NATIVE_WIFI = 1, 4878 ATH11K_HW_TXRX_ETHERNET = 2, 4879 }; 4880 4881 struct wmi_wmm_params { 4882 u32 tlv_header; 4883 u32 cwmin; 4884 u32 cwmax; 4885 u32 aifs; 4886 u32 txoplimit; 4887 u32 acm; 4888 u32 no_ack; 4889 } __packed; 4890 4891 struct wmi_wmm_params_arg { 4892 u8 acm; 4893 u8 aifs; 4894 u16 cwmin; 4895 u16 cwmax; 4896 u16 txop; 4897 u8 no_ack; 4898 }; 4899 4900 struct wmi_vdev_set_wmm_params_cmd { 4901 u32 tlv_header; 4902 u32 vdev_id; 4903 struct wmi_wmm_params wmm_params[4]; 4904 u32 wmm_param_type; 4905 } __packed; 4906 4907 struct wmi_wmm_params_all_arg { 4908 struct wmi_wmm_params_arg ac_be; 4909 struct wmi_wmm_params_arg ac_bk; 4910 struct wmi_wmm_params_arg ac_vi; 4911 struct wmi_wmm_params_arg ac_vo; 4912 }; 4913 4914 #define ATH11K_TWT_DEF_STA_CONG_TIMER_MS 5000 4915 #define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE 10 4916 #define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP 50 4917 #define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20 4918 #define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100 4919 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80 4920 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50 4921 #define ATH11K_TWT_DEF_MIN_NO_STA_SETUP 10 4922 #define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN 2 4923 #define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2 4924 #define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS 2 4925 #define ATH11K_TWT_DEF_MAX_NO_STA_TWT 500 4926 #define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL 10000 4927 #define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000 4928 #define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000 4929 4930 struct wmi_twt_enable_params_cmd { 4931 u32 tlv_header; 4932 u32 pdev_id; 4933 u32 sta_cong_timer_ms; 4934 u32 mbss_support; 4935 u32 default_slot_size; 4936 u32 congestion_thresh_setup; 4937 u32 congestion_thresh_teardown; 4938 u32 congestion_thresh_critical; 4939 u32 interference_thresh_teardown; 4940 u32 interference_thresh_setup; 4941 u32 min_no_sta_setup; 4942 u32 min_no_sta_teardown; 4943 u32 no_of_bcast_mcast_slots; 4944 u32 min_no_twt_slots; 4945 u32 max_no_sta_twt; 4946 u32 mode_check_interval; 4947 u32 add_sta_slot_interval; 4948 u32 remove_sta_slot_interval; 4949 } __packed; 4950 4951 struct wmi_twt_disable_params_cmd { 4952 u32 tlv_header; 4953 u32 pdev_id; 4954 } __packed; 4955 4956 enum WMI_HOST_TWT_COMMAND { 4957 WMI_HOST_TWT_COMMAND_REQUEST_TWT = 0, 4958 WMI_HOST_TWT_COMMAND_SUGGEST_TWT, 4959 WMI_HOST_TWT_COMMAND_DEMAND_TWT, 4960 WMI_HOST_TWT_COMMAND_TWT_GROUPING, 4961 WMI_HOST_TWT_COMMAND_ACCEPT_TWT, 4962 WMI_HOST_TWT_COMMAND_ALTERNATE_TWT, 4963 WMI_HOST_TWT_COMMAND_DICTATE_TWT, 4964 WMI_HOST_TWT_COMMAND_REJECT_TWT, 4965 }; 4966 4967 #define WMI_TWT_ADD_DIALOG_FLAG_BCAST BIT(8) 4968 #define WMI_TWT_ADD_DIALOG_FLAG_TRIGGER BIT(9) 4969 #define WMI_TWT_ADD_DIALOG_FLAG_FLOW_TYPE BIT(10) 4970 #define WMI_TWT_ADD_DIALOG_FLAG_PROTECTION BIT(11) 4971 4972 struct wmi_twt_add_dialog_params_cmd { 4973 u32 tlv_header; 4974 u32 vdev_id; 4975 struct wmi_mac_addr peer_macaddr; 4976 u32 dialog_id; 4977 u32 wake_intvl_us; 4978 u32 wake_intvl_mantis; 4979 u32 wake_dura_us; 4980 u32 sp_offset_us; 4981 u32 flags; 4982 } __packed; 4983 4984 struct wmi_twt_add_dialog_params { 4985 u32 vdev_id; 4986 u8 peer_macaddr[ETH_ALEN]; 4987 u32 dialog_id; 4988 u32 wake_intvl_us; 4989 u32 wake_intvl_mantis; 4990 u32 wake_dura_us; 4991 u32 sp_offset_us; 4992 u8 twt_cmd; 4993 u8 flag_bcast; 4994 u8 flag_trigger; 4995 u8 flag_flow_type; 4996 u8 flag_protection; 4997 } __packed; 4998 4999 enum wmi_twt_add_dialog_status { 5000 WMI_ADD_TWT_STATUS_OK, 5001 WMI_ADD_TWT_STATUS_TWT_NOT_ENABLED, 5002 WMI_ADD_TWT_STATUS_USED_DIALOG_ID, 5003 WMI_ADD_TWT_STATUS_INVALID_PARAM, 5004 WMI_ADD_TWT_STATUS_NOT_READY, 5005 WMI_ADD_TWT_STATUS_NO_RESOURCE, 5006 WMI_ADD_TWT_STATUS_NO_ACK, 5007 WMI_ADD_TWT_STATUS_NO_RESPONSE, 5008 WMI_ADD_TWT_STATUS_DENIED, 5009 WMI_ADD_TWT_STATUS_UNKNOWN_ERROR, 5010 }; 5011 5012 struct wmi_twt_add_dialog_event { 5013 u32 vdev_id; 5014 struct wmi_mac_addr peer_macaddr; 5015 u32 dialog_id; 5016 u32 status; 5017 } __packed; 5018 5019 struct wmi_twt_del_dialog_params { 5020 u32 vdev_id; 5021 u8 peer_macaddr[ETH_ALEN]; 5022 u32 dialog_id; 5023 } __packed; 5024 5025 struct wmi_twt_del_dialog_params_cmd { 5026 u32 tlv_header; 5027 u32 vdev_id; 5028 struct wmi_mac_addr peer_macaddr; 5029 u32 dialog_id; 5030 } __packed; 5031 5032 struct wmi_twt_pause_dialog_params { 5033 u32 vdev_id; 5034 u8 peer_macaddr[ETH_ALEN]; 5035 u32 dialog_id; 5036 } __packed; 5037 5038 struct wmi_twt_pause_dialog_params_cmd { 5039 u32 tlv_header; 5040 u32 vdev_id; 5041 struct wmi_mac_addr peer_macaddr; 5042 u32 dialog_id; 5043 } __packed; 5044 5045 struct wmi_twt_resume_dialog_params { 5046 u32 vdev_id; 5047 u8 peer_macaddr[ETH_ALEN]; 5048 u32 dialog_id; 5049 u32 sp_offset_us; 5050 u32 next_twt_size; 5051 } __packed; 5052 5053 struct wmi_twt_resume_dialog_params_cmd { 5054 u32 tlv_header; 5055 u32 vdev_id; 5056 struct wmi_mac_addr peer_macaddr; 5057 u32 dialog_id; 5058 u32 sp_offset_us; 5059 u32 next_twt_size; 5060 } __packed; 5061 5062 struct wmi_obss_spatial_reuse_params_cmd { 5063 u32 tlv_header; 5064 u32 pdev_id; 5065 u32 enable; 5066 s32 obss_min; 5067 s32 obss_max; 5068 u32 vdev_id; 5069 } __packed; 5070 5071 struct wmi_pdev_obss_pd_bitmap_cmd { 5072 u32 tlv_header; 5073 u32 pdev_id; 5074 u32 bitmap[2]; 5075 } __packed; 5076 5077 #define ATH11K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200 5078 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0 5079 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION 1 5080 5081 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS 10000 5082 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS 5000 5083 5084 enum wmi_bss_color_collision { 5085 WMI_BSS_COLOR_COLLISION_DISABLE = 0, 5086 WMI_BSS_COLOR_COLLISION_DETECTION, 5087 WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY, 5088 WMI_BSS_COLOR_FREE_SLOT_AVAILABLE, 5089 }; 5090 5091 struct wmi_obss_color_collision_cfg_params_cmd { 5092 u32 tlv_header; 5093 u32 vdev_id; 5094 u32 flags; 5095 u32 evt_type; 5096 u32 current_bss_color; 5097 u32 detection_period_ms; 5098 u32 scan_period_ms; 5099 u32 free_slot_expiry_time_ms; 5100 } __packed; 5101 5102 struct wmi_bss_color_change_enable_params_cmd { 5103 u32 tlv_header; 5104 u32 vdev_id; 5105 u32 enable; 5106 } __packed; 5107 5108 struct wmi_obss_color_collision_event { 5109 u32 vdev_id; 5110 u32 evt_type; 5111 u64 obss_color_bitmap; 5112 } __packed; 5113 5114 #define ATH11K_IPV4_TH_SEED_SIZE 5 5115 #define ATH11K_IPV6_TH_SEED_SIZE 11 5116 5117 struct ath11k_wmi_pdev_lro_config_cmd { 5118 u32 tlv_header; 5119 u32 lro_enable; 5120 u32 res; 5121 u32 th_4[ATH11K_IPV4_TH_SEED_SIZE]; 5122 u32 th_6[ATH11K_IPV6_TH_SEED_SIZE]; 5123 u32 pdev_id; 5124 } __packed; 5125 5126 #define ATH11K_WMI_SPECTRAL_COUNT_DEFAULT 0 5127 #define ATH11K_WMI_SPECTRAL_PERIOD_DEFAULT 224 5128 #define ATH11K_WMI_SPECTRAL_PRIORITY_DEFAULT 1 5129 #define ATH11K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 5130 #define ATH11K_WMI_SPECTRAL_GC_ENA_DEFAULT 1 5131 #define ATH11K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 5132 #define ATH11K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 5133 #define ATH11K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 5134 #define ATH11K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 5135 #define ATH11K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 5136 #define ATH11K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 5137 #define ATH11K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 5138 #define ATH11K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 5139 #define ATH11K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 5140 #define ATH11K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2 5141 #define ATH11K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 5142 #define ATH11K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 5143 #define ATH11K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1 5144 5145 struct ath11k_wmi_vdev_spectral_conf_param { 5146 u32 vdev_id; 5147 u32 scan_count; 5148 u32 scan_period; 5149 u32 scan_priority; 5150 u32 scan_fft_size; 5151 u32 scan_gc_ena; 5152 u32 scan_restart_ena; 5153 u32 scan_noise_floor_ref; 5154 u32 scan_init_delay; 5155 u32 scan_nb_tone_thr; 5156 u32 scan_str_bin_thr; 5157 u32 scan_wb_rpt_mode; 5158 u32 scan_rssi_rpt_mode; 5159 u32 scan_rssi_thr; 5160 u32 scan_pwr_format; 5161 u32 scan_rpt_mode; 5162 u32 scan_bin_scale; 5163 u32 scan_dbm_adj; 5164 u32 scan_chn_mask; 5165 } __packed; 5166 5167 struct ath11k_wmi_vdev_spectral_conf_cmd { 5168 u32 tlv_header; 5169 struct ath11k_wmi_vdev_spectral_conf_param param; 5170 } __packed; 5171 5172 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 5173 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 5174 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 5175 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 5176 5177 struct ath11k_wmi_vdev_spectral_enable_cmd { 5178 u32 tlv_header; 5179 u32 vdev_id; 5180 u32 trigger_cmd; 5181 u32 enable_cmd; 5182 } __packed; 5183 5184 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd { 5185 u32 tlv_header; 5186 u32 pdev_id; 5187 u32 module_id; /* see enum wmi_direct_buffer_module */ 5188 u32 base_paddr_lo; 5189 u32 base_paddr_hi; 5190 u32 head_idx_paddr_lo; 5191 u32 head_idx_paddr_hi; 5192 u32 tail_idx_paddr_lo; 5193 u32 tail_idx_paddr_hi; 5194 u32 num_elems; /* Number of elems in the ring */ 5195 u32 buf_size; /* size of allocated buffer in bytes */ 5196 5197 /* Number of wmi_dma_buf_release_entry packed together */ 5198 u32 num_resp_per_event; 5199 5200 /* Target should timeout and send whatever resp 5201 * it has if this time expires, units in milliseconds 5202 */ 5203 u32 event_timeout_ms; 5204 } __packed; 5205 5206 struct ath11k_wmi_dma_buf_release_fixed_param { 5207 u32 pdev_id; 5208 u32 module_id; 5209 u32 num_buf_release_entry; 5210 u32 num_meta_data_entry; 5211 } __packed; 5212 5213 struct wmi_dma_buf_release_entry { 5214 u32 tlv_header; 5215 u32 paddr_lo; 5216 5217 /* Bits 11:0: address of data 5218 * Bits 31:12: host context data 5219 */ 5220 u32 paddr_hi; 5221 } __packed; 5222 5223 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0) 5224 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16) 5225 5226 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0) 5227 5228 struct wmi_dma_buf_release_meta_data { 5229 u32 tlv_header; 5230 s32 noise_floor[WMI_MAX_CHAINS]; 5231 u32 reset_delay; 5232 u32 freq1; 5233 u32 freq2; 5234 u32 ch_width; 5235 } __packed; 5236 5237 enum wmi_fils_discovery_cmd_type { 5238 WMI_FILS_DISCOVERY_CMD, 5239 WMI_UNSOL_BCAST_PROBE_RESP, 5240 }; 5241 5242 struct wmi_fils_discovery_cmd { 5243 u32 tlv_header; 5244 u32 vdev_id; 5245 u32 interval; 5246 u32 config; /* enum wmi_fils_discovery_cmd_type */ 5247 } __packed; 5248 5249 struct wmi_fils_discovery_tmpl_cmd { 5250 u32 tlv_header; 5251 u32 vdev_id; 5252 u32 buf_len; 5253 } __packed; 5254 5255 struct wmi_probe_tmpl_cmd { 5256 u32 tlv_header; 5257 u32 vdev_id; 5258 u32 buf_len; 5259 } __packed; 5260 5261 struct target_resource_config { 5262 u32 num_vdevs; 5263 u32 num_peers; 5264 u32 num_active_peers; 5265 u32 num_offload_peers; 5266 u32 num_offload_reorder_buffs; 5267 u32 num_peer_keys; 5268 u32 num_tids; 5269 u32 ast_skid_limit; 5270 u32 tx_chain_mask; 5271 u32 rx_chain_mask; 5272 u32 rx_timeout_pri[4]; 5273 u32 rx_decap_mode; 5274 u32 scan_max_pending_req; 5275 u32 bmiss_offload_max_vdev; 5276 u32 roam_offload_max_vdev; 5277 u32 roam_offload_max_ap_profiles; 5278 u32 num_mcast_groups; 5279 u32 num_mcast_table_elems; 5280 u32 mcast2ucast_mode; 5281 u32 tx_dbg_log_size; 5282 u32 num_wds_entries; 5283 u32 dma_burst_size; 5284 u32 mac_aggr_delim; 5285 u32 rx_skip_defrag_timeout_dup_detection_check; 5286 u32 vow_config; 5287 u32 gtk_offload_max_vdev; 5288 u32 num_msdu_desc; 5289 u32 max_frag_entries; 5290 u32 max_peer_ext_stats; 5291 u32 smart_ant_cap; 5292 u32 bk_minfree; 5293 u32 be_minfree; 5294 u32 vi_minfree; 5295 u32 vo_minfree; 5296 u32 rx_batchmode; 5297 u32 tt_support; 5298 u32 flag1; 5299 u32 iphdr_pad_config; 5300 u32 qwrap_config:16, 5301 alloc_frag_desc_for_data_pkt:16; 5302 u32 num_tdls_vdevs; 5303 u32 num_tdls_conn_table_entries; 5304 u32 beacon_tx_offload_max_vdev; 5305 u32 num_multicast_filter_entries; 5306 u32 num_wow_filters; 5307 u32 num_keep_alive_pattern; 5308 u32 keep_alive_pattern_size; 5309 u32 max_tdls_concurrent_sleep_sta; 5310 u32 max_tdls_concurrent_buffer_sta; 5311 u32 wmi_send_separate; 5312 u32 num_ocb_vdevs; 5313 u32 num_ocb_channels; 5314 u32 num_ocb_schedules; 5315 u32 num_ns_ext_tuples_cfg; 5316 u32 bpf_instruction_size; 5317 u32 max_bssid_rx_filters; 5318 u32 use_pdev_id; 5319 u32 peer_map_unmap_v2_support; 5320 u32 sched_params; 5321 u32 twt_ap_pdev_count; 5322 u32 twt_ap_sta_count; 5323 }; 5324 5325 enum wmi_sys_cap_info_flags { 5326 WMI_SYS_CAP_INFO_RXTX_LED = BIT(0), 5327 WMI_SYS_CAP_INFO_RFKILL = BIT(1), 5328 }; 5329 5330 #define WMI_RFKILL_CFG_GPIO_PIN_NUM GENMASK(5, 0) 5331 #define WMI_RFKILL_CFG_RADIO_LEVEL BIT(6) 5332 #define WMI_RFKILL_CFG_PIN_AS_GPIO GENMASK(10, 7) 5333 5334 enum wmi_rfkill_enable_radio { 5335 WMI_RFKILL_ENABLE_RADIO_ON = 0, 5336 WMI_RFKILL_ENABLE_RADIO_OFF = 1, 5337 }; 5338 5339 enum wmi_rfkill_radio_state { 5340 WMI_RFKILL_RADIO_STATE_OFF = 1, 5341 WMI_RFKILL_RADIO_STATE_ON = 2, 5342 }; 5343 5344 struct wmi_rfkill_state_change_ev { 5345 u32 gpio_pin_num; 5346 u32 int_type; 5347 u32 radio_state; 5348 } __packed; 5349 5350 enum wmi_debug_log_param { 5351 WMI_DEBUG_LOG_PARAM_LOG_LEVEL = 0x1, 5352 WMI_DEBUG_LOG_PARAM_VDEV_ENABLE, 5353 WMI_DEBUG_LOG_PARAM_VDEV_DISABLE, 5354 WMI_DEBUG_LOG_PARAM_VDEV_ENABLE_BITMAP, 5355 WMI_DEBUG_LOG_PARAM_MOD_ENABLE_BITMAP, 5356 WMI_DEBUG_LOG_PARAM_WOW_MOD_ENABLE_BITMAP, 5357 }; 5358 5359 struct wmi_debug_log_config_cmd_fixed_param { 5360 u32 tlv_header; 5361 u32 dbg_log_param; 5362 u32 value; 5363 } __packed; 5364 5365 #define WMI_MAX_MEM_REQS 32 5366 5367 #define MAX_RADIOS 3 5368 5369 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 5370 #define WMI_SEND_TIMEOUT_HZ (3 * HZ) 5371 5372 struct ath11k_wmi_base { 5373 struct ath11k_base *ab; 5374 struct ath11k_pdev_wmi wmi[MAX_RADIOS]; 5375 enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS]; 5376 u32 max_msg_len[MAX_RADIOS]; 5377 5378 struct completion service_ready; 5379 struct completion unified_ready; 5380 DECLARE_BITMAP(svc_map, WMI_MAX_EXT_SERVICE); 5381 wait_queue_head_t tx_credits_wq; 5382 const struct wmi_peer_flags_map *peer_flags; 5383 u32 num_mem_chunks; 5384 u32 rx_decap_mode; 5385 struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 5386 5387 enum wmi_host_hw_mode_config_type preferred_hw_mode; 5388 struct target_resource_config wlan_resource_config; 5389 5390 struct ath11k_targ_cap *targ_cap; 5391 }; 5392 5393 /* WOW structures */ 5394 enum wmi_wow_wakeup_event { 5395 WOW_BMISS_EVENT = 0, 5396 WOW_BETTER_AP_EVENT, 5397 WOW_DEAUTH_RECVD_EVENT, 5398 WOW_MAGIC_PKT_RECVD_EVENT, 5399 WOW_GTK_ERR_EVENT, 5400 WOW_FOURWAY_HSHAKE_EVENT, 5401 WOW_EAPOL_RECVD_EVENT, 5402 WOW_NLO_DETECTED_EVENT, 5403 WOW_DISASSOC_RECVD_EVENT, 5404 WOW_PATTERN_MATCH_EVENT, 5405 WOW_CSA_IE_EVENT, 5406 WOW_PROBE_REQ_WPS_IE_EVENT, 5407 WOW_AUTH_REQ_EVENT, 5408 WOW_ASSOC_REQ_EVENT, 5409 WOW_HTT_EVENT, 5410 WOW_RA_MATCH_EVENT, 5411 WOW_HOST_AUTO_SHUTDOWN_EVENT, 5412 WOW_IOAC_MAGIC_EVENT, 5413 WOW_IOAC_SHORT_EVENT, 5414 WOW_IOAC_EXTEND_EVENT, 5415 WOW_IOAC_TIMER_EVENT, 5416 WOW_DFS_PHYERR_RADAR_EVENT, 5417 WOW_BEACON_EVENT, 5418 WOW_CLIENT_KICKOUT_EVENT, 5419 WOW_EVENT_MAX, 5420 }; 5421 5422 enum wmi_wow_interface_cfg { 5423 WOW_IFACE_PAUSE_ENABLED, 5424 WOW_IFACE_PAUSE_DISABLED 5425 }; 5426 5427 #define C2S(x) case x: return #x 5428 5429 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev) 5430 { 5431 switch (ev) { 5432 C2S(WOW_BMISS_EVENT); 5433 C2S(WOW_BETTER_AP_EVENT); 5434 C2S(WOW_DEAUTH_RECVD_EVENT); 5435 C2S(WOW_MAGIC_PKT_RECVD_EVENT); 5436 C2S(WOW_GTK_ERR_EVENT); 5437 C2S(WOW_FOURWAY_HSHAKE_EVENT); 5438 C2S(WOW_EAPOL_RECVD_EVENT); 5439 C2S(WOW_NLO_DETECTED_EVENT); 5440 C2S(WOW_DISASSOC_RECVD_EVENT); 5441 C2S(WOW_PATTERN_MATCH_EVENT); 5442 C2S(WOW_CSA_IE_EVENT); 5443 C2S(WOW_PROBE_REQ_WPS_IE_EVENT); 5444 C2S(WOW_AUTH_REQ_EVENT); 5445 C2S(WOW_ASSOC_REQ_EVENT); 5446 C2S(WOW_HTT_EVENT); 5447 C2S(WOW_RA_MATCH_EVENT); 5448 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT); 5449 C2S(WOW_IOAC_MAGIC_EVENT); 5450 C2S(WOW_IOAC_SHORT_EVENT); 5451 C2S(WOW_IOAC_EXTEND_EVENT); 5452 C2S(WOW_IOAC_TIMER_EVENT); 5453 C2S(WOW_DFS_PHYERR_RADAR_EVENT); 5454 C2S(WOW_BEACON_EVENT); 5455 C2S(WOW_CLIENT_KICKOUT_EVENT); 5456 C2S(WOW_EVENT_MAX); 5457 default: 5458 return NULL; 5459 } 5460 } 5461 5462 enum wmi_wow_wake_reason { 5463 WOW_REASON_UNSPECIFIED = -1, 5464 WOW_REASON_NLOD = 0, 5465 WOW_REASON_AP_ASSOC_LOST, 5466 WOW_REASON_LOW_RSSI, 5467 WOW_REASON_DEAUTH_RECVD, 5468 WOW_REASON_DISASSOC_RECVD, 5469 WOW_REASON_GTK_HS_ERR, 5470 WOW_REASON_EAP_REQ, 5471 WOW_REASON_FOURWAY_HS_RECV, 5472 WOW_REASON_TIMER_INTR_RECV, 5473 WOW_REASON_PATTERN_MATCH_FOUND, 5474 WOW_REASON_RECV_MAGIC_PATTERN, 5475 WOW_REASON_P2P_DISC, 5476 WOW_REASON_WLAN_HB, 5477 WOW_REASON_CSA_EVENT, 5478 WOW_REASON_PROBE_REQ_WPS_IE_RECV, 5479 WOW_REASON_AUTH_REQ_RECV, 5480 WOW_REASON_ASSOC_REQ_RECV, 5481 WOW_REASON_HTT_EVENT, 5482 WOW_REASON_RA_MATCH, 5483 WOW_REASON_HOST_AUTO_SHUTDOWN, 5484 WOW_REASON_IOAC_MAGIC_EVENT, 5485 WOW_REASON_IOAC_SHORT_EVENT, 5486 WOW_REASON_IOAC_EXTEND_EVENT, 5487 WOW_REASON_IOAC_TIMER_EVENT, 5488 WOW_REASON_ROAM_HO, 5489 WOW_REASON_DFS_PHYERR_RADADR_EVENT, 5490 WOW_REASON_BEACON_RECV, 5491 WOW_REASON_CLIENT_KICKOUT_EVENT, 5492 WOW_REASON_PAGE_FAULT = 0x3a, 5493 WOW_REASON_DEBUG_TEST = 0xFF, 5494 }; 5495 5496 static inline const char *wow_reason(enum wmi_wow_wake_reason reason) 5497 { 5498 switch (reason) { 5499 C2S(WOW_REASON_UNSPECIFIED); 5500 C2S(WOW_REASON_NLOD); 5501 C2S(WOW_REASON_AP_ASSOC_LOST); 5502 C2S(WOW_REASON_LOW_RSSI); 5503 C2S(WOW_REASON_DEAUTH_RECVD); 5504 C2S(WOW_REASON_DISASSOC_RECVD); 5505 C2S(WOW_REASON_GTK_HS_ERR); 5506 C2S(WOW_REASON_EAP_REQ); 5507 C2S(WOW_REASON_FOURWAY_HS_RECV); 5508 C2S(WOW_REASON_TIMER_INTR_RECV); 5509 C2S(WOW_REASON_PATTERN_MATCH_FOUND); 5510 C2S(WOW_REASON_RECV_MAGIC_PATTERN); 5511 C2S(WOW_REASON_P2P_DISC); 5512 C2S(WOW_REASON_WLAN_HB); 5513 C2S(WOW_REASON_CSA_EVENT); 5514 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV); 5515 C2S(WOW_REASON_AUTH_REQ_RECV); 5516 C2S(WOW_REASON_ASSOC_REQ_RECV); 5517 C2S(WOW_REASON_HTT_EVENT); 5518 C2S(WOW_REASON_RA_MATCH); 5519 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN); 5520 C2S(WOW_REASON_IOAC_MAGIC_EVENT); 5521 C2S(WOW_REASON_IOAC_SHORT_EVENT); 5522 C2S(WOW_REASON_IOAC_EXTEND_EVENT); 5523 C2S(WOW_REASON_IOAC_TIMER_EVENT); 5524 C2S(WOW_REASON_ROAM_HO); 5525 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT); 5526 C2S(WOW_REASON_BEACON_RECV); 5527 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT); 5528 C2S(WOW_REASON_PAGE_FAULT); 5529 C2S(WOW_REASON_DEBUG_TEST); 5530 default: 5531 return NULL; 5532 } 5533 } 5534 5535 #undef C2S 5536 5537 struct wmi_wow_enable_cmd { 5538 u32 tlv_header; 5539 u32 enable; 5540 u32 pause_iface_config; 5541 u32 flags; 5542 } __packed; 5543 5544 struct wmi_wow_host_wakeup_ind { 5545 u32 tlv_header; 5546 u32 reserved; 5547 } __packed; 5548 5549 struct wmi_wow_ev_arg { 5550 u32 vdev_id; 5551 u32 flag; 5552 enum wmi_wow_wake_reason wake_reason; 5553 u32 data_len; 5554 }; 5555 5556 int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb, 5557 u32 cmd_id); 5558 struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len); 5559 int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id, 5560 struct sk_buff *frame); 5561 int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id, 5562 struct ieee80211_mutable_offsets *offs, 5563 struct sk_buff *bcn); 5564 int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id); 5565 int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid, 5566 const u8 *bssid); 5567 int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id); 5568 int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg, 5569 bool restart); 5570 int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr, 5571 u32 vdev_id, u32 param_id, u32 param_val); 5572 int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id, 5573 u32 param_value, u8 pdev_id); 5574 int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, 5575 enum wmi_sta_ps_mode psmode); 5576 int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab); 5577 int ath11k_wmi_cmd_init(struct ath11k_base *ab); 5578 int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab); 5579 int ath11k_wmi_connect(struct ath11k_base *ab); 5580 int ath11k_wmi_pdev_attach(struct ath11k_base *ab, 5581 u8 pdev_id); 5582 int ath11k_wmi_attach(struct ath11k_base *ab); 5583 void ath11k_wmi_detach(struct ath11k_base *ab); 5584 int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr, 5585 struct vdev_create_params *param); 5586 int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id, 5587 const u8 *addr, dma_addr_t paddr, 5588 u8 tid, u8 ba_window_size_valid, 5589 u32 ba_window_size); 5590 int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar, 5591 struct peer_create_params *param); 5592 int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id, 5593 u32 param_id, u32 param_value); 5594 5595 int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id, 5596 u32 param, u32 param_value); 5597 int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms); 5598 int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar, 5599 const u8 *peer_addr, u8 vdev_id); 5600 int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id); 5601 void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg); 5602 int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar, 5603 struct scan_req_params *params); 5604 int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar, 5605 struct scan_cancel_param *param); 5606 int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id, 5607 struct wmi_wmm_params_all_arg *param); 5608 int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt, 5609 u32 pdev_id); 5610 int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id); 5611 5612 int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar, 5613 struct peer_assoc_params *param); 5614 int ath11k_wmi_vdev_install_key(struct ath11k *ar, 5615 struct wmi_vdev_install_key_arg *arg); 5616 int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar, 5617 enum wmi_bss_chan_info_req_type type); 5618 int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar, 5619 struct stats_request_params *param); 5620 int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar); 5621 int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar, 5622 u8 peer_addr[ETH_ALEN], 5623 struct peer_flush_params *param); 5624 int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr, 5625 struct ap_ps_params *param); 5626 int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar, 5627 struct scan_chan_list_params *chan_list); 5628 int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar, 5629 u32 pdev_id); 5630 int ath11k_wmi_addba_clear_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac); 5631 int ath11k_wmi_addba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac, 5632 u32 tid, u32 buf_size); 5633 int ath11k_wmi_addba_set_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac, 5634 u32 tid, u32 status); 5635 int ath11k_wmi_delba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac, 5636 u32 tid, u32 initiator, u32 reason); 5637 int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar, 5638 u32 vdev_id, u32 bcn_ctrl_op); 5639 int ath11k_wmi_send_set_current_country_cmd(struct ath11k *ar, 5640 struct wmi_set_current_country_params *param); 5641 int 5642 ath11k_wmi_send_init_country_cmd(struct ath11k *ar, 5643 struct wmi_init_country_params init_cc_param); 5644 5645 int ath11k_wmi_send_11d_scan_start_cmd(struct ath11k *ar, 5646 struct wmi_11d_scan_start_params *param); 5647 int ath11k_wmi_send_11d_scan_stop_cmd(struct ath11k *ar, u32 vdev_id); 5648 5649 int 5650 ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar, 5651 struct thermal_mitigation_params *param); 5652 int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter); 5653 int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar); 5654 int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable); 5655 int 5656 ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar, 5657 struct rx_reorder_queue_remove_params *param); 5658 int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar, 5659 struct pdev_set_regdomain_params *param); 5660 int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb, 5661 struct ath11k_fw_stats *stats); 5662 size_t ath11k_wmi_fw_stats_num_peers(struct list_head *head); 5663 size_t ath11k_wmi_fw_stats_num_peers_extd(struct list_head *head); 5664 size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head); 5665 void ath11k_wmi_fw_stats_fill(struct ath11k *ar, 5666 struct ath11k_fw_stats *fw_stats, u32 stats_id, 5667 char *buf); 5668 int ath11k_wmi_simulate_radar(struct ath11k *ar); 5669 int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id); 5670 int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id); 5671 int ath11k_wmi_send_twt_add_dialog_cmd(struct ath11k *ar, 5672 struct wmi_twt_add_dialog_params *params); 5673 int ath11k_wmi_send_twt_del_dialog_cmd(struct ath11k *ar, 5674 struct wmi_twt_del_dialog_params *params); 5675 int ath11k_wmi_send_twt_pause_dialog_cmd(struct ath11k *ar, 5676 struct wmi_twt_pause_dialog_params *params); 5677 int ath11k_wmi_send_twt_resume_dialog_cmd(struct ath11k *ar, 5678 struct wmi_twt_resume_dialog_params *params); 5679 int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id, 5680 struct ieee80211_he_obss_pd *he_obss_pd); 5681 int ath11k_wmi_pdev_set_srg_bss_color_bitmap(struct ath11k *ar, u32 *bitmap); 5682 int ath11k_wmi_pdev_set_srg_patial_bssid_bitmap(struct ath11k *ar, u32 *bitmap); 5683 int ath11k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath11k *ar, 5684 u32 *bitmap); 5685 int ath11k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath11k *ar, 5686 u32 *bitmap); 5687 int ath11k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath11k *ar, 5688 u32 *bitmap); 5689 int ath11k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath11k *ar, 5690 u32 *bitmap); 5691 int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id, 5692 u8 bss_color, u32 period, 5693 bool enable); 5694 int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id, 5695 bool enable); 5696 int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id); 5697 int ath11k_wmi_pdev_dma_ring_cfg(struct ath11k *ar, 5698 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd *param); 5699 int ath11k_wmi_vdev_spectral_enable(struct ath11k *ar, u32 vdev_id, 5700 u32 trigger, u32 enable); 5701 int ath11k_wmi_vdev_spectral_conf(struct ath11k *ar, 5702 struct ath11k_wmi_vdev_spectral_conf_param *param); 5703 int ath11k_wmi_fils_discovery_tmpl(struct ath11k *ar, u32 vdev_id, 5704 struct sk_buff *tmpl); 5705 int ath11k_wmi_fils_discovery(struct ath11k *ar, u32 vdev_id, u32 interval, 5706 bool unsol_bcast_probe_resp_enabled); 5707 int ath11k_wmi_probe_resp_tmpl(struct ath11k *ar, u32 vdev_id, 5708 struct sk_buff *tmpl); 5709 int ath11k_wmi_set_hw_mode(struct ath11k_base *ab, 5710 enum wmi_host_hw_mode_config_type mode); 5711 int ath11k_wmi_wow_host_wakeup_ind(struct ath11k *ar); 5712 int ath11k_wmi_wow_enable(struct ath11k *ar); 5713 int ath11k_wmi_scan_prob_req_oui(struct ath11k *ar, 5714 const u8 mac_addr[ETH_ALEN]); 5715 int ath11k_wmi_fw_dbglog_cfg(struct ath11k *ar, u32 *module_id_bitmap, 5716 struct ath11k_fw_dbglog *dbglog); 5717 #endif 5718