1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef ATH11K_WMI_H 7 #define ATH11K_WMI_H 8 9 #include <net/mac80211.h> 10 #include "htc.h" 11 12 struct ath11k_base; 13 struct ath11k; 14 struct ath11k_fw_stats; 15 16 #define PSOC_HOST_MAX_NUM_SS (8) 17 18 /* defines to set Packet extension values whic can be 0 us, 8 usec or 16 usec */ 19 #define MAX_HE_NSS 8 20 #define MAX_HE_MODULATION 8 21 #define MAX_HE_RU 4 22 #define HE_MODULATION_NONE 7 23 #define HE_PET_0_USEC 0 24 #define HE_PET_8_USEC 1 25 #define HE_PET_16_USEC 2 26 27 #define WMI_MAX_CHAINS 8 28 29 #define WMI_MAX_NUM_SS MAX_HE_NSS 30 #define WMI_MAX_NUM_RU MAX_HE_RU 31 32 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1) 33 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1) 34 #define WMI_TLV_CMD_UNSUPPORTED 0 35 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0 36 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0 37 38 struct wmi_cmd_hdr { 39 u32 cmd_id; 40 } __packed; 41 42 struct wmi_tlv { 43 u32 header; 44 u8 value[]; 45 } __packed; 46 47 #define WMI_TLV_LEN GENMASK(15, 0) 48 #define WMI_TLV_TAG GENMASK(31, 16) 49 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header) 50 51 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0) 52 #define WMI_MAX_MEM_REQS 32 53 #define ATH11K_MAX_HW_LISTEN_INTERVAL 5 54 55 #define WLAN_SCAN_MAX_HINT_S_SSID 10 56 #define WLAN_SCAN_MAX_HINT_BSSID 10 57 #define MAX_RNR_BSS 5 58 59 #define WLAN_SCAN_MAX_HINT_S_SSID 10 60 #define WLAN_SCAN_MAX_HINT_BSSID 10 61 #define MAX_RNR_BSS 5 62 63 #define WLAN_SCAN_PARAMS_MAX_SSID 16 64 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 65 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 66 67 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1 68 69 #define WMI_BA_MODE_BUFFER_SIZE_256 3 70 /* 71 * HW mode config type replicated from FW header 72 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active. 73 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands, 74 * one in 2G and another in 5G. 75 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in 76 * same band; no tx allowed. 77 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band. 78 * Support for both PHYs within one band is planned 79 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES), 80 * but could be extended to other bands in the future. 81 * The separation of the band between the two PHYs needs 82 * to be communicated separately. 83 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS 84 * as in WMI_HW_MODE_SBS, and 3rd on the other band 85 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and 86 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). 87 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. 88 */ 89 enum wmi_host_hw_mode_config_type { 90 WMI_HOST_HW_MODE_SINGLE = 0, 91 WMI_HOST_HW_MODE_DBS = 1, 92 WMI_HOST_HW_MODE_SBS_PASSIVE = 2, 93 WMI_HOST_HW_MODE_SBS = 3, 94 WMI_HOST_HW_MODE_DBS_SBS = 4, 95 WMI_HOST_HW_MODE_DBS_OR_SBS = 5, 96 97 /* keep last */ 98 WMI_HOST_HW_MODE_MAX 99 }; 100 101 /* HW mode priority values used to detect the preferred HW mode 102 * on the available modes. 103 */ 104 enum wmi_host_hw_mode_priority { 105 WMI_HOST_HW_MODE_DBS_SBS_PRI, 106 WMI_HOST_HW_MODE_DBS_PRI, 107 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI, 108 WMI_HOST_HW_MODE_SBS_PRI, 109 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI, 110 WMI_HOST_HW_MODE_SINGLE_PRI, 111 112 /* keep last the lowest priority */ 113 WMI_HOST_HW_MODE_MAX_PRI 114 }; 115 116 enum { 117 WMI_HOST_WLAN_2G_CAP = 0x1, 118 WMI_HOST_WLAN_5G_CAP = 0x2, 119 WMI_HOST_WLAN_2G_5G_CAP = 0x3, 120 }; 121 122 /* 123 * wmi command groups. 124 */ 125 enum wmi_cmd_group { 126 /* 0 to 2 are reserved */ 127 WMI_GRP_START = 0x3, 128 WMI_GRP_SCAN = WMI_GRP_START, 129 WMI_GRP_PDEV = 0x4, 130 WMI_GRP_VDEV = 0x5, 131 WMI_GRP_PEER = 0x6, 132 WMI_GRP_MGMT = 0x7, 133 WMI_GRP_BA_NEG = 0x8, 134 WMI_GRP_STA_PS = 0x9, 135 WMI_GRP_DFS = 0xa, 136 WMI_GRP_ROAM = 0xb, 137 WMI_GRP_OFL_SCAN = 0xc, 138 WMI_GRP_P2P = 0xd, 139 WMI_GRP_AP_PS = 0xe, 140 WMI_GRP_RATE_CTRL = 0xf, 141 WMI_GRP_PROFILE = 0x10, 142 WMI_GRP_SUSPEND = 0x11, 143 WMI_GRP_BCN_FILTER = 0x12, 144 WMI_GRP_WOW = 0x13, 145 WMI_GRP_RTT = 0x14, 146 WMI_GRP_SPECTRAL = 0x15, 147 WMI_GRP_STATS = 0x16, 148 WMI_GRP_ARP_NS_OFL = 0x17, 149 WMI_GRP_NLO_OFL = 0x18, 150 WMI_GRP_GTK_OFL = 0x19, 151 WMI_GRP_CSA_OFL = 0x1a, 152 WMI_GRP_CHATTER = 0x1b, 153 WMI_GRP_TID_ADDBA = 0x1c, 154 WMI_GRP_MISC = 0x1d, 155 WMI_GRP_GPIO = 0x1e, 156 WMI_GRP_FWTEST = 0x1f, 157 WMI_GRP_TDLS = 0x20, 158 WMI_GRP_RESMGR = 0x21, 159 WMI_GRP_STA_SMPS = 0x22, 160 WMI_GRP_WLAN_HB = 0x23, 161 WMI_GRP_RMC = 0x24, 162 WMI_GRP_MHF_OFL = 0x25, 163 WMI_GRP_LOCATION_SCAN = 0x26, 164 WMI_GRP_OEM = 0x27, 165 WMI_GRP_NAN = 0x28, 166 WMI_GRP_COEX = 0x29, 167 WMI_GRP_OBSS_OFL = 0x2a, 168 WMI_GRP_LPI = 0x2b, 169 WMI_GRP_EXTSCAN = 0x2c, 170 WMI_GRP_DHCP_OFL = 0x2d, 171 WMI_GRP_IPA = 0x2e, 172 WMI_GRP_MDNS_OFL = 0x2f, 173 WMI_GRP_SAP_OFL = 0x30, 174 WMI_GRP_OCB = 0x31, 175 WMI_GRP_SOC = 0x32, 176 WMI_GRP_PKT_FILTER = 0x33, 177 WMI_GRP_MAWC = 0x34, 178 WMI_GRP_PMF_OFFLOAD = 0x35, 179 WMI_GRP_BPF_OFFLOAD = 0x36, 180 WMI_GRP_NAN_DATA = 0x37, 181 WMI_GRP_PROTOTYPE = 0x38, 182 WMI_GRP_MONITOR = 0x39, 183 WMI_GRP_REGULATORY = 0x3a, 184 WMI_GRP_HW_DATA_FILTER = 0x3b, 185 WMI_GRP_WLM = 0x3c, 186 WMI_GRP_11K_OFFLOAD = 0x3d, 187 WMI_GRP_TWT = 0x3e, 188 WMI_GRP_MOTION_DET = 0x3f, 189 WMI_GRP_SPATIAL_REUSE = 0x40, 190 }; 191 192 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 193 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 194 195 #define WMI_CMD_UNSUPPORTED 0 196 197 enum wmi_tlv_cmd_id { 198 WMI_INIT_CMDID = 0x1, 199 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN), 200 WMI_STOP_SCAN_CMDID, 201 WMI_SCAN_CHAN_LIST_CMDID, 202 WMI_SCAN_SCH_PRIO_TBL_CMDID, 203 WMI_SCAN_UPDATE_REQUEST_CMDID, 204 WMI_SCAN_PROB_REQ_OUI_CMDID, 205 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID, 206 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV), 207 WMI_PDEV_SET_CHANNEL_CMDID, 208 WMI_PDEV_SET_PARAM_CMDID, 209 WMI_PDEV_PKTLOG_ENABLE_CMDID, 210 WMI_PDEV_PKTLOG_DISABLE_CMDID, 211 WMI_PDEV_SET_WMM_PARAMS_CMDID, 212 WMI_PDEV_SET_HT_CAP_IE_CMDID, 213 WMI_PDEV_SET_VHT_CAP_IE_CMDID, 214 WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 215 WMI_PDEV_SET_QUIET_MODE_CMDID, 216 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 217 WMI_PDEV_GET_TPC_CONFIG_CMDID, 218 WMI_PDEV_SET_BASE_MACADDR_CMDID, 219 WMI_PDEV_DUMP_CMDID, 220 WMI_PDEV_SET_LED_CONFIG_CMDID, 221 WMI_PDEV_GET_TEMPERATURE_CMDID, 222 WMI_PDEV_SET_LED_FLASHING_CMDID, 223 WMI_PDEV_SMART_ANT_ENABLE_CMDID, 224 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 225 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 226 WMI_PDEV_SET_CTL_TABLE_CMDID, 227 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID, 228 WMI_PDEV_FIPS_CMDID, 229 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID, 230 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 231 WMI_PDEV_GET_NFCAL_POWER_CMDID, 232 WMI_PDEV_GET_TPC_CMDID, 233 WMI_MIB_STATS_ENABLE_CMDID, 234 WMI_PDEV_SET_PCL_CMDID, 235 WMI_PDEV_SET_HW_MODE_CMDID, 236 WMI_PDEV_SET_MAC_CONFIG_CMDID, 237 WMI_PDEV_SET_ANTENNA_MODE_CMDID, 238 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID, 239 WMI_PDEV_WAL_POWER_DEBUG_CMDID, 240 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID, 241 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID, 242 WMI_PDEV_GET_ANTDIV_STATUS_CMDID, 243 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID, 244 WMI_PDEV_SET_STATS_THRESHOLD_CMDID, 245 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID, 246 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID, 247 WMI_PDEV_CHECK_CAL_VERSION_CMDID, 248 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID, 249 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID, 250 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 251 WMI_PDEV_UPDATE_PMK_CACHE_CMDID, 252 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID, 253 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID, 254 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID, 255 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID, 256 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID, 257 WMI_PDEV_DMA_RING_CFG_REQ_CMDID, 258 WMI_PDEV_HE_TB_ACTION_FRM_CMDID, 259 WMI_PDEV_PKTLOG_FILTER_CMDID, 260 WMI_PDEV_SET_RAP_CONFIG_CMDID, 261 WMI_PDEV_DSM_FILTER_CMDID, 262 WMI_PDEV_FRAME_INJECT_CMDID, 263 WMI_PDEV_TBTT_OFFSET_SYNC_CMDID, 264 WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID, 265 WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID, 266 WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 267 WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 268 WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 269 WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 270 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV), 271 WMI_VDEV_DELETE_CMDID, 272 WMI_VDEV_START_REQUEST_CMDID, 273 WMI_VDEV_RESTART_REQUEST_CMDID, 274 WMI_VDEV_UP_CMDID, 275 WMI_VDEV_STOP_CMDID, 276 WMI_VDEV_DOWN_CMDID, 277 WMI_VDEV_SET_PARAM_CMDID, 278 WMI_VDEV_INSTALL_KEY_CMDID, 279 WMI_VDEV_WNM_SLEEPMODE_CMDID, 280 WMI_VDEV_WMM_ADDTS_CMDID, 281 WMI_VDEV_WMM_DELTS_CMDID, 282 WMI_VDEV_SET_WMM_PARAMS_CMDID, 283 WMI_VDEV_SET_GTX_PARAMS_CMDID, 284 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID, 285 WMI_VDEV_PLMREQ_START_CMDID, 286 WMI_VDEV_PLMREQ_STOP_CMDID, 287 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID, 288 WMI_VDEV_SET_IE_CMDID, 289 WMI_VDEV_RATEMASK_CMDID, 290 WMI_VDEV_ATF_REQUEST_CMDID, 291 WMI_VDEV_SET_DSCP_TID_MAP_CMDID, 292 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 293 WMI_VDEV_SET_QUIET_MODE_CMDID, 294 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID, 295 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID, 296 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID, 297 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER), 298 WMI_PEER_DELETE_CMDID, 299 WMI_PEER_FLUSH_TIDS_CMDID, 300 WMI_PEER_SET_PARAM_CMDID, 301 WMI_PEER_ASSOC_CMDID, 302 WMI_PEER_ADD_WDS_ENTRY_CMDID, 303 WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 304 WMI_PEER_MCAST_GROUP_CMDID, 305 WMI_PEER_INFO_REQ_CMDID, 306 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID, 307 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID, 308 WMI_PEER_UPDATE_WDS_ENTRY_CMDID, 309 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID, 310 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 311 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 312 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 313 WMI_PEER_ATF_REQUEST_CMDID, 314 WMI_PEER_BWF_REQUEST_CMDID, 315 WMI_PEER_REORDER_QUEUE_SETUP_CMDID, 316 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID, 317 WMI_PEER_SET_RX_BLOCKSIZE_CMDID, 318 WMI_PEER_ANTDIV_INFO_REQ_CMDID, 319 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT), 320 WMI_PDEV_SEND_BCN_CMDID, 321 WMI_BCN_TMPL_CMDID, 322 WMI_BCN_FILTER_RX_CMDID, 323 WMI_PRB_REQ_FILTER_RX_CMDID, 324 WMI_MGMT_TX_CMDID, 325 WMI_PRB_TMPL_CMDID, 326 WMI_MGMT_TX_SEND_CMDID, 327 WMI_OFFCHAN_DATA_TX_SEND_CMDID, 328 WMI_PDEV_SEND_FD_CMDID, 329 WMI_BCN_OFFLOAD_CTRL_CMDID, 330 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID, 331 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID, 332 WMI_FILS_DISCOVERY_TMPL_CMDID, 333 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 334 WMI_ADDBA_SEND_CMDID, 335 WMI_ADDBA_STATUS_CMDID, 336 WMI_DELBA_SEND_CMDID, 337 WMI_ADDBA_SET_RESP_CMDID, 338 WMI_SEND_SINGLEAMSDU_CMDID, 339 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS), 340 WMI_STA_POWERSAVE_PARAM_CMDID, 341 WMI_STA_MIMO_PS_MODE_CMDID, 342 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS), 343 WMI_PDEV_DFS_DISABLE_CMDID, 344 WMI_DFS_PHYERR_FILTER_ENA_CMDID, 345 WMI_DFS_PHYERR_FILTER_DIS_CMDID, 346 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID, 347 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID, 348 WMI_VDEV_ADFS_CH_CFG_CMDID, 349 WMI_VDEV_ADFS_OCAC_ABORT_CMDID, 350 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM), 351 WMI_ROAM_SCAN_RSSI_THRESHOLD, 352 WMI_ROAM_SCAN_PERIOD, 353 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 354 WMI_ROAM_AP_PROFILE, 355 WMI_ROAM_CHAN_LIST, 356 WMI_ROAM_SCAN_CMD, 357 WMI_ROAM_SYNCH_COMPLETE, 358 WMI_ROAM_SET_RIC_REQUEST_CMDID, 359 WMI_ROAM_INVOKE_CMDID, 360 WMI_ROAM_FILTER_CMDID, 361 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID, 362 WMI_ROAM_CONFIGURE_MAWC_CMDID, 363 WMI_ROAM_SET_MBO_PARAM_CMDID, 364 WMI_ROAM_PER_CONFIG_CMDID, 365 WMI_ROAM_BTM_CONFIG_CMDID, 366 WMI_ENABLE_FILS_CMDID, 367 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN), 368 WMI_OFL_SCAN_REMOVE_AP_PROFILE, 369 WMI_OFL_SCAN_PERIOD, 370 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P), 371 WMI_P2P_DEV_SET_DISCOVERABILITY, 372 WMI_P2P_GO_SET_BEACON_IE, 373 WMI_P2P_GO_SET_PROBE_RESP_IE, 374 WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 375 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID, 376 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID, 377 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID, 378 WMI_P2P_SET_OPPPS_PARAM_CMDID, 379 WMI_P2P_LISTEN_OFFLOAD_START_CMDID, 380 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID, 381 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS), 382 WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 383 WMI_AP_PS_EGAP_PARAM_CMDID, 384 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL), 385 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE), 386 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 387 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 388 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 389 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 390 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 391 WMI_PDEV_RESUME_CMDID, 392 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER), 393 WMI_RMV_BCN_FILTER_CMDID, 394 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW), 395 WMI_WOW_DEL_WAKE_PATTERN_CMDID, 396 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 397 WMI_WOW_ENABLE_CMDID, 398 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 399 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID, 400 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID, 401 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID, 402 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID, 403 WMI_D0_WOW_ENABLE_DISABLE_CMDID, 404 WMI_EXTWOW_ENABLE_CMDID, 405 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID, 406 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID, 407 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID, 408 WMI_WOW_UDP_SVC_OFLD_CMDID, 409 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID, 410 WMI_WOW_SET_ACTION_WAKE_UP_CMDID, 411 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT), 412 WMI_RTT_TSF_CMDID, 413 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL), 414 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 415 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS), 416 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID, 417 WMI_REQUEST_STATS_EXT_CMDID, 418 WMI_REQUEST_LINK_STATS_CMDID, 419 WMI_START_LINK_STATS_CMDID, 420 WMI_CLEAR_LINK_STATS_CMDID, 421 WMI_GET_FW_MEM_DUMP_CMDID, 422 WMI_DEBUG_MESG_FLUSH_CMDID, 423 WMI_DIAG_EVENT_LOG_CONFIG_CMDID, 424 WMI_REQUEST_WLAN_STATS_CMDID, 425 WMI_REQUEST_RCPI_CMDID, 426 WMI_REQUEST_PEER_STATS_INFO_CMDID, 427 WMI_REQUEST_RADIO_CHAN_STATS_CMDID, 428 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL), 429 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID, 430 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID, 431 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 432 WMI_APFIND_CMDID, 433 WMI_PASSPOINT_LIST_CONFIG_CMDID, 434 WMI_NLO_CONFIGURE_MAWC_CMDID, 435 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 436 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 437 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 438 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER), 439 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID, 440 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID, 441 WMI_CHATTER_COALESCING_QUERY_CMDID, 442 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA), 443 WMI_PEER_TID_DELBA_CMDID, 444 WMI_STA_DTIM_PS_METHOD_CMDID, 445 WMI_STA_UAPSD_AUTO_TRIG_CMDID, 446 WMI_STA_KEEPALIVE_CMDID, 447 WMI_BA_REQ_SSN_CMDID, 448 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC), 449 WMI_PDEV_UTF_CMDID, 450 WMI_DBGLOG_CFG_CMDID, 451 WMI_PDEV_QVIT_CMDID, 452 WMI_PDEV_FTM_INTG_CMDID, 453 WMI_VDEV_SET_KEEPALIVE_CMDID, 454 WMI_VDEV_GET_KEEPALIVE_CMDID, 455 WMI_FORCE_FW_HANG_CMDID, 456 WMI_SET_MCASTBCAST_FILTER_CMDID, 457 WMI_THERMAL_MGMT_CMDID, 458 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID, 459 WMI_TPC_CHAINMASK_CONFIG_CMDID, 460 WMI_SET_ANTENNA_DIVERSITY_CMDID, 461 WMI_OCB_SET_SCHED_CMDID, 462 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID, 463 WMI_LRO_CONFIG_CMDID, 464 WMI_TRANSFER_DATA_TO_FLASH_CMDID, 465 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID, 466 WMI_VDEV_WISA_CMDID, 467 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 468 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 469 WMI_READ_DATA_FROM_FLASH_CMDID, 470 WMI_THERM_THROT_SET_CONF_CMDID, 471 WMI_RUNTIME_DPD_RECAL_CMDID, 472 WMI_GET_TPC_POWER_CMDID, 473 WMI_IDLE_TRIGGER_MONITOR_CMDID, 474 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 475 WMI_GPIO_OUTPUT_CMDID, 476 WMI_TXBF_CMDID, 477 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST), 478 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID, 479 WMI_UNIT_TEST_CMDID, 480 WMI_FWTEST_CMDID, 481 WMI_QBOOST_CFG_CMDID, 482 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS), 483 WMI_TDLS_PEER_UPDATE_CMDID, 484 WMI_TDLS_SET_OFFCHAN_MODE_CMDID, 485 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR), 486 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID, 487 WMI_RESMGR_SET_CHAN_LATENCY_CMDID, 488 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 489 WMI_STA_SMPS_PARAM_CMDID, 490 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB), 491 WMI_HB_SET_TCP_PARAMS_CMDID, 492 WMI_HB_SET_TCP_PKT_FILTER_CMDID, 493 WMI_HB_SET_UDP_PARAMS_CMDID, 494 WMI_HB_SET_UDP_PKT_FILTER_CMDID, 495 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC), 496 WMI_RMC_SET_ACTION_PERIOD_CMDID, 497 WMI_RMC_CONFIG_CMDID, 498 WMI_RMC_SET_MANUAL_LEADER_CMDID, 499 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL), 500 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID, 501 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 502 WMI_BATCH_SCAN_DISABLE_CMDID, 503 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID, 504 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM), 505 WMI_OEM_REQUEST_CMDID, 506 WMI_LPI_OEM_REQ_CMDID, 507 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN), 508 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX), 509 WMI_CHAN_AVOID_UPDATE_CMDID, 510 WMI_COEX_CONFIG_CMDID, 511 WMI_CHAN_AVOID_RPT_ALLOW_CMDID, 512 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID, 513 WMI_SAR_LIMITS_CMDID, 514 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL), 515 WMI_OBSS_SCAN_DISABLE_CMDID, 516 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID, 517 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI), 518 WMI_LPI_START_SCAN_CMDID, 519 WMI_LPI_STOP_SCAN_CMDID, 520 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 521 WMI_EXTSCAN_STOP_CMDID, 522 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID, 523 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID, 524 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID, 525 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID, 526 WMI_EXTSCAN_SET_CAPABILITIES_CMDID, 527 WMI_EXTSCAN_GET_CAPABILITIES_CMDID, 528 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID, 529 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID, 530 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL), 531 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA), 532 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 533 WMI_MDNS_SET_FQDN_CMDID, 534 WMI_MDNS_SET_RESPONSE_CMDID, 535 WMI_MDNS_GET_STATS_CMDID, 536 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 537 WMI_SAP_SET_BLACKLIST_PARAM_CMDID, 538 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB), 539 WMI_OCB_SET_UTC_TIME_CMDID, 540 WMI_OCB_START_TIMING_ADVERT_CMDID, 541 WMI_OCB_STOP_TIMING_ADVERT_CMDID, 542 WMI_OCB_GET_TSF_TIMER_CMDID, 543 WMI_DCC_GET_STATS_CMDID, 544 WMI_DCC_CLEAR_STATS_CMDID, 545 WMI_DCC_UPDATE_NDL_CMDID, 546 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC), 547 WMI_SOC_SET_HW_MODE_CMDID, 548 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID, 549 WMI_SOC_SET_ANTENNA_MODE_CMDID, 550 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER), 551 WMI_PACKET_FILTER_ENABLE_CMDID, 552 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC), 553 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD), 554 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 555 WMI_BPF_GET_VDEV_STATS_CMDID, 556 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID, 557 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID, 558 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID, 559 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR), 560 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 561 WMI_11D_SCAN_START_CMDID, 562 WMI_11D_SCAN_STOP_CMDID, 563 WMI_SET_INIT_COUNTRY_CMDID, 564 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 565 WMI_NDP_INITIATOR_REQ_CMDID, 566 WMI_NDP_RESPONDER_REQ_CMDID, 567 WMI_NDP_END_REQ_CMDID, 568 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER), 569 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT), 570 WMI_TWT_DISABLE_CMDID, 571 WMI_TWT_ADD_DIALOG_CMDID, 572 WMI_TWT_DEL_DIALOG_CMDID, 573 WMI_TWT_PAUSE_DIALOG_CMDID, 574 WMI_TWT_RESUME_DIALOG_CMDID, 575 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID = 576 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE), 577 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID, 578 }; 579 580 enum wmi_tlv_event_id { 581 WMI_SERVICE_READY_EVENTID = 0x1, 582 WMI_READY_EVENTID, 583 WMI_SERVICE_AVAILABLE_EVENTID, 584 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 585 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV), 586 WMI_CHAN_INFO_EVENTID, 587 WMI_PHYERR_EVENTID, 588 WMI_PDEV_DUMP_EVENTID, 589 WMI_TX_PAUSE_EVENTID, 590 WMI_DFS_RADAR_EVENTID, 591 WMI_PDEV_L1SS_TRACK_EVENTID, 592 WMI_PDEV_TEMPERATURE_EVENTID, 593 WMI_SERVICE_READY_EXT_EVENTID, 594 WMI_PDEV_FIPS_EVENTID, 595 WMI_PDEV_CHANNEL_HOPPING_EVENTID, 596 WMI_PDEV_ANI_CCK_LEVEL_EVENTID, 597 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID, 598 WMI_PDEV_TPC_EVENTID, 599 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 600 WMI_PDEV_SET_HW_MODE_RESP_EVENTID, 601 WMI_PDEV_HW_MODE_TRANSITION_EVENTID, 602 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID, 603 WMI_PDEV_ANTDIV_STATUS_EVENTID, 604 WMI_PDEV_CHIP_POWER_STATS_EVENTID, 605 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID, 606 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID, 607 WMI_PDEV_CHECK_CAL_VERSION_EVENTID, 608 WMI_PDEV_DIV_RSSI_ANTID_EVENTID, 609 WMI_PDEV_BSS_CHAN_INFO_EVENTID, 610 WMI_PDEV_UPDATE_CTLTABLE_EVENTID, 611 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, 612 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, 613 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, 614 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID, 615 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID, 616 WMI_PDEV_RAP_INFO_EVENTID, 617 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID, 618 WMI_SERVICE_READY_EXT2_EVENTID, 619 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), 620 WMI_VDEV_STOPPED_EVENTID, 621 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 622 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID, 623 WMI_VDEV_TSF_REPORT_EVENTID, 624 WMI_VDEV_DELETE_RESP_EVENTID, 625 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID, 626 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID, 627 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER), 628 WMI_PEER_INFO_EVENTID, 629 WMI_PEER_TX_FAIL_CNT_THR_EVENTID, 630 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID, 631 WMI_PEER_STATE_EVENTID, 632 WMI_PEER_ASSOC_CONF_EVENTID, 633 WMI_PEER_DELETE_RESP_EVENTID, 634 WMI_PEER_RATECODE_LIST_EVENTID, 635 WMI_WDS_PEER_EVENTID, 636 WMI_PEER_STA_PS_STATECHG_EVENTID, 637 WMI_PEER_ANTDIV_INFO_EVENTID, 638 WMI_PEER_RESERVED0_EVENTID, 639 WMI_PEER_RESERVED1_EVENTID, 640 WMI_PEER_RESERVED2_EVENTID, 641 WMI_PEER_RESERVED3_EVENTID, 642 WMI_PEER_RESERVED4_EVENTID, 643 WMI_PEER_RESERVED5_EVENTID, 644 WMI_PEER_RESERVED6_EVENTID, 645 WMI_PEER_RESERVED7_EVENTID, 646 WMI_PEER_RESERVED8_EVENTID, 647 WMI_PEER_RESERVED9_EVENTID, 648 WMI_PEER_RESERVED10_EVENTID, 649 WMI_PEER_OPER_MODE_CHANGE_EVENTID, 650 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), 651 WMI_HOST_SWBA_EVENTID, 652 WMI_TBTTOFFSET_UPDATE_EVENTID, 653 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID, 654 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID, 655 WMI_MGMT_TX_COMPLETION_EVENTID, 656 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID, 657 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID, 658 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID, 659 WMI_HOST_FILS_DISCOVERY_EVENTID, 660 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 661 WMI_TX_ADDBA_COMPLETE_EVENTID, 662 WMI_BA_RSP_SSN_EVENTID, 663 WMI_AGGR_STATE_TRIG_EVENTID, 664 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM), 665 WMI_PROFILE_MATCH, 666 WMI_ROAM_SYNCH_EVENTID, 667 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P), 668 WMI_P2P_NOA_EVENTID, 669 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID, 670 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS), 671 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 672 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW), 673 WMI_D0_WOW_DISABLE_ACK_EVENTID, 674 WMI_WOW_INITIAL_WAKEUP_EVENTID, 675 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT), 676 WMI_TSF_MEASUREMENT_REPORT_EVENTID, 677 WMI_RTT_ERROR_REPORT_EVENTID, 678 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS), 679 WMI_IFACE_LINK_STATS_EVENTID, 680 WMI_PEER_LINK_STATS_EVENTID, 681 WMI_RADIO_LINK_STATS_EVENTID, 682 WMI_UPDATE_FW_MEM_DUMP_EVENTID, 683 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID, 684 WMI_INST_RSSI_STATS_EVENTID, 685 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID, 686 WMI_REPORT_STATS_EVENTID, 687 WMI_UPDATE_RCPI_EVENTID, 688 WMI_PEER_STATS_INFO_EVENTID, 689 WMI_RADIO_CHAN_STATS_EVENTID, 690 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 691 WMI_NLO_SCAN_COMPLETE_EVENTID, 692 WMI_APFIND_EVENTID, 693 WMI_PASSPOINT_MATCH_EVENTID, 694 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 695 WMI_GTK_REKEY_FAIL_EVENTID, 696 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 697 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER), 698 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS), 699 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID, 700 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID, 701 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC), 702 WMI_PDEV_UTF_EVENTID, 703 WMI_DEBUG_MESG_EVENTID, 704 WMI_UPDATE_STATS_EVENTID, 705 WMI_DEBUG_PRINT_EVENTID, 706 WMI_DCS_INTERFERENCE_EVENTID, 707 WMI_PDEV_QVIT_EVENTID, 708 WMI_WLAN_PROFILE_DATA_EVENTID, 709 WMI_PDEV_FTM_INTG_EVENTID, 710 WMI_WLAN_FREQ_AVOID_EVENTID, 711 WMI_VDEV_GET_KEEPALIVE_EVENTID, 712 WMI_THERMAL_MGMT_EVENTID, 713 WMI_DIAG_DATA_CONTAINER_EVENTID, 714 WMI_HOST_AUTO_SHUTDOWN_EVENTID, 715 WMI_UPDATE_WHAL_MIB_STATS_EVENTID, 716 WMI_UPDATE_VDEV_RATE_STATS_EVENTID, 717 WMI_DIAG_EVENTID, 718 WMI_OCB_SET_SCHED_EVENTID, 719 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID, 720 WMI_RSSI_BREACH_EVENTID, 721 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID, 722 WMI_PDEV_UTF_SCPC_EVENTID, 723 WMI_READ_DATA_FROM_FLASH_EVENTID, 724 WMI_REPORT_RX_AGGR_FAILURE_EVENTID, 725 WMI_PKGID_EVENTID, 726 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO), 727 WMI_UPLOADH_EVENTID, 728 WMI_CAPTUREH_EVENTID, 729 WMI_RFKILL_STATE_CHANGE_EVENTID, 730 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS), 731 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 732 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 733 WMI_BATCH_SCAN_RESULT_EVENTID, 734 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM), 735 WMI_OEM_MEASUREMENT_REPORT_EVENTID, 736 WMI_OEM_ERROR_REPORT_EVENTID, 737 WMI_OEM_RESPONSE_EVENTID, 738 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN), 739 WMI_NAN_DISC_IFACE_CREATED_EVENTID, 740 WMI_NAN_DISC_IFACE_DELETED_EVENTID, 741 WMI_NAN_STARTED_CLUSTER_EVENTID, 742 WMI_NAN_JOINED_CLUSTER_EVENTID, 743 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX), 744 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI), 745 WMI_LPI_STATUS_EVENTID, 746 WMI_LPI_HANDOFF_EVENTID, 747 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 748 WMI_EXTSCAN_OPERATION_EVENTID, 749 WMI_EXTSCAN_TABLE_USAGE_EVENTID, 750 WMI_EXTSCAN_CACHED_RESULTS_EVENTID, 751 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID, 752 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID, 753 WMI_EXTSCAN_CAPABILITIES_EVENTID, 754 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID, 755 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 756 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 757 WMI_SAP_OFL_DEL_STA_EVENTID, 758 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB), 759 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID, 760 WMI_DCC_GET_STATS_RESP_EVENTID, 761 WMI_DCC_UPDATE_NDL_RESP_EVENTID, 762 WMI_DCC_STATS_EVENTID, 763 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC), 764 WMI_SOC_HW_MODE_TRANSITION_EVENTID, 765 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID, 766 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC), 767 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 768 WMI_BPF_VDEV_STATS_INFO_EVENTID, 769 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC), 770 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 771 WMI_11D_NEW_COUNTRY_EVENTID, 772 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 773 WMI_NDP_INITIATOR_RSP_EVENTID, 774 WMI_NDP_RESPONDER_RSP_EVENTID, 775 WMI_NDP_END_RSP_EVENTID, 776 WMI_NDP_INDICATION_EVENTID, 777 WMI_NDP_CONFIRM_EVENTID, 778 WMI_NDP_END_INDICATION_EVENTID, 779 780 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT), 781 WMI_TWT_DISABLE_EVENTID, 782 WMI_TWT_ADD_DIALOG_EVENTID, 783 WMI_TWT_DEL_DIALOG_EVENTID, 784 WMI_TWT_PAUSE_DIALOG_EVENTID, 785 WMI_TWT_RESUME_DIALOG_EVENTID, 786 }; 787 788 enum wmi_tlv_pdev_param { 789 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 790 WMI_PDEV_PARAM_RX_CHAIN_MASK, 791 WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 792 WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 793 WMI_PDEV_PARAM_TXPOWER_SCALE, 794 WMI_PDEV_PARAM_BEACON_GEN_MODE, 795 WMI_PDEV_PARAM_BEACON_TX_MODE, 796 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 797 WMI_PDEV_PARAM_PROTECTION_MODE, 798 WMI_PDEV_PARAM_DYNAMIC_BW, 799 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 800 WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 801 WMI_PDEV_PARAM_STA_KICKOUT_TH, 802 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 803 WMI_PDEV_PARAM_LTR_ENABLE, 804 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 805 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 806 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 807 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 808 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 809 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 810 WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 811 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 812 WMI_PDEV_PARAM_L1SS_ENABLE, 813 WMI_PDEV_PARAM_DSLEEP_ENABLE, 814 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 815 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 816 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 817 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 818 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 819 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 820 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 821 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 822 WMI_PDEV_PARAM_PMF_QOS, 823 WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 824 WMI_PDEV_PARAM_DCS, 825 WMI_PDEV_PARAM_ANI_ENABLE, 826 WMI_PDEV_PARAM_ANI_POLL_PERIOD, 827 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 828 WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 829 WMI_PDEV_PARAM_ANI_CCK_LEVEL, 830 WMI_PDEV_PARAM_DYNTXCHAIN, 831 WMI_PDEV_PARAM_PROXY_STA, 832 WMI_PDEV_PARAM_IDLE_PS_CONFIG, 833 WMI_PDEV_PARAM_POWER_GATING_SLEEP, 834 WMI_PDEV_PARAM_RFKILL_ENABLE, 835 WMI_PDEV_PARAM_BURST_DUR, 836 WMI_PDEV_PARAM_BURST_ENABLE, 837 WMI_PDEV_PARAM_HW_RFKILL_CONFIG, 838 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE, 839 WMI_PDEV_PARAM_L1SS_TRACK, 840 WMI_PDEV_PARAM_HYST_EN, 841 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE, 842 WMI_PDEV_PARAM_LED_SYS_STATE, 843 WMI_PDEV_PARAM_LED_ENABLE, 844 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY, 845 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE, 846 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE, 847 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD, 848 WMI_PDEV_PARAM_CTS_CBW, 849 WMI_PDEV_PARAM_WNTS_CONFIG, 850 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE, 851 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP, 852 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP, 853 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP, 854 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE, 855 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT, 856 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP, 857 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT, 858 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE, 859 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE, 860 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G, 861 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G, 862 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G, 863 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G, 864 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK, 865 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS, 866 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG, 867 WMI_PDEV_PARAM_TXPOWER_DECR_DB, 868 WMI_PDEV_PARAM_AGGR_BURST, 869 WMI_PDEV_PARAM_RX_DECAP_MODE, 870 WMI_PDEV_PARAM_FAST_CHANNEL_RESET, 871 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 872 WMI_PDEV_PARAM_ANTENNA_GAIN, 873 WMI_PDEV_PARAM_RX_FILTER, 874 WMI_PDEV_SET_MCAST_TO_UCAST_TID, 875 WMI_PDEV_PARAM_PROXY_STA_MODE, 876 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE, 877 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 878 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 879 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE, 880 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 881 WMI_PDEV_PARAM_BLOCK_INTERBSS, 882 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 883 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID, 884 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 885 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 886 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 887 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID, 888 WMI_PDEV_PARAM_EN_STATS, 889 WMI_PDEV_PARAM_MU_GROUP_POLICY, 890 WMI_PDEV_PARAM_NOISE_DETECTION, 891 WMI_PDEV_PARAM_NOISE_THRESHOLD, 892 WMI_PDEV_PARAM_DPD_ENABLE, 893 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 894 WMI_PDEV_PARAM_ATF_STRICT_SCH, 895 WMI_PDEV_PARAM_ATF_SCHED_DURATION, 896 WMI_PDEV_PARAM_ANT_PLZN, 897 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT, 898 WMI_PDEV_PARAM_SENSITIVITY_LEVEL, 899 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G, 900 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G, 901 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 902 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 903 WMI_PDEV_PARAM_CCA_THRESHOLD, 904 WMI_PDEV_PARAM_RTS_FIXED_RATE, 905 WMI_PDEV_PARAM_PDEV_RESET, 906 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET, 907 WMI_PDEV_PARAM_ARP_DBG_SRCADDR, 908 WMI_PDEV_PARAM_ARP_DBG_DSTADDR, 909 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 910 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 911 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE, 912 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 913 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT, 914 WMI_PDEV_PARAM_PROPAGATION_DELAY, 915 WMI_PDEV_PARAM_ENA_ANT_DIV, 916 WMI_PDEV_PARAM_FORCE_CHAIN_ANT, 917 WMI_PDEV_PARAM_ANT_DIV_SELFTEST, 918 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL, 919 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD, 920 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS, 921 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN, 922 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN, 923 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN, 924 WMI_PDEV_PARAM_TX_SCH_DELAY, 925 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING, 926 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU, 927 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE, 928 WMI_PDEV_PARAM_FAST_PWR_TRANSITION, 929 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE, 930 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE, 931 WMI_PDEV_PARAM_MESH_MCAST_ENABLE, 932 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_THRESHOLD = 0xbc, 933 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_PER_AC = 0xbe, 934 WMI_PDEV_PARAM_ENABLE_SR_PROHIBIT = 0xc6, 935 }; 936 937 enum wmi_tlv_vdev_param { 938 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 939 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 940 WMI_VDEV_PARAM_BEACON_INTERVAL, 941 WMI_VDEV_PARAM_LISTEN_INTERVAL, 942 WMI_VDEV_PARAM_MULTICAST_RATE, 943 WMI_VDEV_PARAM_MGMT_TX_RATE, 944 WMI_VDEV_PARAM_SLOT_TIME, 945 WMI_VDEV_PARAM_PREAMBLE, 946 WMI_VDEV_PARAM_SWBA_TIME, 947 WMI_VDEV_STATS_UPDATE_PERIOD, 948 WMI_VDEV_PWRSAVE_AGEOUT_TIME, 949 WMI_VDEV_HOST_SWBA_INTERVAL, 950 WMI_VDEV_PARAM_DTIM_PERIOD, 951 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 952 WMI_VDEV_PARAM_WDS, 953 WMI_VDEV_PARAM_ATIM_WINDOW, 954 WMI_VDEV_PARAM_BMISS_COUNT_MAX, 955 WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 956 WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 957 WMI_VDEV_PARAM_FEATURE_WMM, 958 WMI_VDEV_PARAM_CHWIDTH, 959 WMI_VDEV_PARAM_CHEXTOFFSET, 960 WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 961 WMI_VDEV_PARAM_STA_QUICKKICKOUT, 962 WMI_VDEV_PARAM_MGMT_RATE, 963 WMI_VDEV_PARAM_PROTECTION_MODE, 964 WMI_VDEV_PARAM_FIXED_RATE, 965 WMI_VDEV_PARAM_SGI, 966 WMI_VDEV_PARAM_LDPC, 967 WMI_VDEV_PARAM_TX_STBC, 968 WMI_VDEV_PARAM_RX_STBC, 969 WMI_VDEV_PARAM_INTRA_BSS_FWD, 970 WMI_VDEV_PARAM_DEF_KEYID, 971 WMI_VDEV_PARAM_NSS, 972 WMI_VDEV_PARAM_BCAST_DATA_RATE, 973 WMI_VDEV_PARAM_MCAST_DATA_RATE, 974 WMI_VDEV_PARAM_MCAST_INDICATE, 975 WMI_VDEV_PARAM_DHCP_INDICATE, 976 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 977 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 978 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 979 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 980 WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 981 WMI_VDEV_PARAM_ENABLE_RTSCTS, 982 WMI_VDEV_PARAM_TXBF, 983 WMI_VDEV_PARAM_PACKET_POWERSAVE, 984 WMI_VDEV_PARAM_DROP_UNENCRY, 985 WMI_VDEV_PARAM_TX_ENCAP_TYPE, 986 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 987 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 988 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 989 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 990 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP, 991 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP, 992 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 993 WMI_VDEV_PARAM_TX_PWRLIMIT, 994 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL, 995 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD, 996 WMI_VDEV_PARAM_ENABLE_RMC, 997 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS, 998 WMI_VDEV_PARAM_MAX_RATE, 999 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE, 1000 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR, 1001 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT, 1002 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE, 1003 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED, 1004 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED, 1005 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED, 1006 WMI_VDEV_PARAM_INACTIVITY_CNT, 1007 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS, 1008 WMI_VDEV_PARAM_DTIM_POLICY, 1009 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS, 1010 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE, 1011 WMI_VDEV_PARAM_RX_LEAK_WINDOW, 1012 WMI_VDEV_PARAM_STATS_AVG_FACTOR, 1013 WMI_VDEV_PARAM_DISCONNECT_TH, 1014 WMI_VDEV_PARAM_RTSCTS_RATE, 1015 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE, 1016 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE, 1017 WMI_VDEV_PARAM_TXPOWER_SCALE, 1018 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB, 1019 WMI_VDEV_PARAM_MCAST2UCAST_SET, 1020 WMI_VDEV_PARAM_RC_NUM_RETRIES, 1021 WMI_VDEV_PARAM_CABQ_MAXDUR, 1022 WMI_VDEV_PARAM_MFPTEST_SET, 1023 WMI_VDEV_PARAM_RTS_FIXED_RATE, 1024 WMI_VDEV_PARAM_VHT_SGIMASK, 1025 WMI_VDEV_PARAM_VHT80_RATEMASK, 1026 WMI_VDEV_PARAM_PROXY_STA, 1027 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE, 1028 WMI_VDEV_PARAM_RX_DECAP_TYPE, 1029 WMI_VDEV_PARAM_BW_NSS_RATEMASK, 1030 WMI_VDEV_PARAM_SENSOR_AP, 1031 WMI_VDEV_PARAM_BEACON_RATE, 1032 WMI_VDEV_PARAM_DTIM_ENABLE_CTS, 1033 WMI_VDEV_PARAM_STA_KICKOUT, 1034 WMI_VDEV_PARAM_CAPABILITIES, 1035 WMI_VDEV_PARAM_TSF_INCREMENT, 1036 WMI_VDEV_PARAM_AMPDU_PER_AC, 1037 WMI_VDEV_PARAM_RX_FILTER, 1038 WMI_VDEV_PARAM_MGMT_TX_POWER, 1039 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH, 1040 WMI_VDEV_PARAM_AGG_SW_RETRY_TH, 1041 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS, 1042 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 1043 WMI_VDEV_PARAM_HE_DCM, 1044 WMI_VDEV_PARAM_HE_RANGE_EXT, 1045 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, 1046 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, 1047 WMI_VDEV_PARAM_BA_MODE = 0x7e, 1048 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, 1049 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99, 1050 WMI_VDEV_PARAM_PROTOTYPE = 0x8000, 1051 WMI_VDEV_PARAM_BSS_COLOR, 1052 WMI_VDEV_PARAM_SET_HEMU_MODE, 1053 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003, 1054 }; 1055 1056 enum wmi_tlv_peer_flags { 1057 WMI_TLV_PEER_AUTH = 0x00000001, 1058 WMI_TLV_PEER_QOS = 0x00000002, 1059 WMI_TLV_PEER_NEED_PTK_4_WAY = 0x00000004, 1060 WMI_TLV_PEER_NEED_GTK_2_WAY = 0x00000010, 1061 WMI_TLV_PEER_APSD = 0x00000800, 1062 WMI_TLV_PEER_HT = 0x00001000, 1063 WMI_TLV_PEER_40MHZ = 0x00002000, 1064 WMI_TLV_PEER_STBC = 0x00008000, 1065 WMI_TLV_PEER_LDPC = 0x00010000, 1066 WMI_TLV_PEER_DYN_MIMOPS = 0x00020000, 1067 WMI_TLV_PEER_STATIC_MIMOPS = 0x00040000, 1068 WMI_TLV_PEER_SPATIAL_MUX = 0x00200000, 1069 WMI_TLV_PEER_VHT = 0x02000000, 1070 WMI_TLV_PEER_80MHZ = 0x04000000, 1071 WMI_TLV_PEER_PMF = 0x08000000, 1072 WMI_PEER_IS_P2P_CAPABLE = 0x20000000, 1073 WMI_PEER_160MHZ = 0x40000000, 1074 WMI_PEER_SAFEMODE_EN = 0x80000000, 1075 1076 }; 1077 1078 /** Enum list of TLV Tags for each parameter structure type. */ 1079 enum wmi_tlv_tag { 1080 WMI_TAG_LAST_RESERVED = 15, 1081 WMI_TAG_FIRST_ARRAY_ENUM, 1082 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM, 1083 WMI_TAG_ARRAY_BYTE, 1084 WMI_TAG_ARRAY_STRUCT, 1085 WMI_TAG_ARRAY_FIXED_STRUCT, 1086 WMI_TAG_LAST_ARRAY_ENUM = 31, 1087 WMI_TAG_SERVICE_READY_EVENT, 1088 WMI_TAG_HAL_REG_CAPABILITIES, 1089 WMI_TAG_WLAN_HOST_MEM_REQ, 1090 WMI_TAG_READY_EVENT, 1091 WMI_TAG_SCAN_EVENT, 1092 WMI_TAG_PDEV_TPC_CONFIG_EVENT, 1093 WMI_TAG_CHAN_INFO_EVENT, 1094 WMI_TAG_COMB_PHYERR_RX_HDR, 1095 WMI_TAG_VDEV_START_RESPONSE_EVENT, 1096 WMI_TAG_VDEV_STOPPED_EVENT, 1097 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT, 1098 WMI_TAG_PEER_STA_KICKOUT_EVENT, 1099 WMI_TAG_MGMT_RX_HDR, 1100 WMI_TAG_TBTT_OFFSET_EVENT, 1101 WMI_TAG_TX_DELBA_COMPLETE_EVENT, 1102 WMI_TAG_TX_ADDBA_COMPLETE_EVENT, 1103 WMI_TAG_ROAM_EVENT, 1104 WMI_TAG_WOW_EVENT_INFO, 1105 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP, 1106 WMI_TAG_RTT_EVENT_HEADER, 1107 WMI_TAG_RTT_ERROR_REPORT_EVENT, 1108 WMI_TAG_RTT_MEAS_EVENT, 1109 WMI_TAG_ECHO_EVENT, 1110 WMI_TAG_FTM_INTG_EVENT, 1111 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT, 1112 WMI_TAG_GPIO_INPUT_EVENT, 1113 WMI_TAG_CSA_EVENT, 1114 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT, 1115 WMI_TAG_IGTK_INFO, 1116 WMI_TAG_DCS_INTERFERENCE_EVENT, 1117 WMI_TAG_ATH_DCS_CW_INT, 1118 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */ 1119 WMI_TAG_ATH_DCS_CW_INT, 1120 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1121 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */ 1122 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1123 WMI_TAG_WLAN_PROFILE_CTX_T, 1124 WMI_TAG_WLAN_PROFILE_T, 1125 WMI_TAG_PDEV_QVIT_EVENT, 1126 WMI_TAG_HOST_SWBA_EVENT, 1127 WMI_TAG_TIM_INFO, 1128 WMI_TAG_P2P_NOA_INFO, 1129 WMI_TAG_STATS_EVENT, 1130 WMI_TAG_AVOID_FREQ_RANGES_EVENT, 1131 WMI_TAG_AVOID_FREQ_RANGE_DESC, 1132 WMI_TAG_GTK_REKEY_FAIL_EVENT, 1133 WMI_TAG_INIT_CMD, 1134 WMI_TAG_RESOURCE_CONFIG, 1135 WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 1136 WMI_TAG_START_SCAN_CMD, 1137 WMI_TAG_STOP_SCAN_CMD, 1138 WMI_TAG_SCAN_CHAN_LIST_CMD, 1139 WMI_TAG_CHANNEL, 1140 WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1141 WMI_TAG_PDEV_SET_PARAM_CMD, 1142 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD, 1143 WMI_TAG_WMM_PARAMS, 1144 WMI_TAG_PDEV_SET_QUIET_CMD, 1145 WMI_TAG_VDEV_CREATE_CMD, 1146 WMI_TAG_VDEV_DELETE_CMD, 1147 WMI_TAG_VDEV_START_REQUEST_CMD, 1148 WMI_TAG_P2P_NOA_DESCRIPTOR, 1149 WMI_TAG_P2P_GO_SET_BEACON_IE, 1150 WMI_TAG_GTK_OFFLOAD_CMD, 1151 WMI_TAG_VDEV_UP_CMD, 1152 WMI_TAG_VDEV_STOP_CMD, 1153 WMI_TAG_VDEV_DOWN_CMD, 1154 WMI_TAG_VDEV_SET_PARAM_CMD, 1155 WMI_TAG_VDEV_INSTALL_KEY_CMD, 1156 WMI_TAG_PEER_CREATE_CMD, 1157 WMI_TAG_PEER_DELETE_CMD, 1158 WMI_TAG_PEER_FLUSH_TIDS_CMD, 1159 WMI_TAG_PEER_SET_PARAM_CMD, 1160 WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1161 WMI_TAG_VHT_RATE_SET, 1162 WMI_TAG_BCN_TMPL_CMD, 1163 WMI_TAG_PRB_TMPL_CMD, 1164 WMI_TAG_BCN_PRB_INFO, 1165 WMI_TAG_PEER_TID_ADDBA_CMD, 1166 WMI_TAG_PEER_TID_DELBA_CMD, 1167 WMI_TAG_STA_POWERSAVE_MODE_CMD, 1168 WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1169 WMI_TAG_STA_DTIM_PS_METHOD_CMD, 1170 WMI_TAG_ROAM_SCAN_MODE, 1171 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD, 1172 WMI_TAG_ROAM_SCAN_PERIOD, 1173 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1174 WMI_TAG_PDEV_SUSPEND_CMD, 1175 WMI_TAG_PDEV_RESUME_CMD, 1176 WMI_TAG_ADD_BCN_FILTER_CMD, 1177 WMI_TAG_RMV_BCN_FILTER_CMD, 1178 WMI_TAG_WOW_ENABLE_CMD, 1179 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 1180 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD, 1181 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM, 1182 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 1183 WMI_TAG_ARP_OFFLOAD_TUPLE, 1184 WMI_TAG_NS_OFFLOAD_TUPLE, 1185 WMI_TAG_FTM_INTG_CMD, 1186 WMI_TAG_STA_KEEPALIVE_CMD, 1187 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 1188 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD, 1189 WMI_TAG_AP_PS_PEER_CMD, 1190 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD, 1191 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD, 1192 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD, 1193 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD, 1194 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD, 1195 WMI_TAG_WOW_DEL_PATTERN_CMD, 1196 WMI_TAG_WOW_ADD_DEL_EVT_CMD, 1197 WMI_TAG_RTT_MEASREQ_HEAD, 1198 WMI_TAG_RTT_MEASREQ_BODY, 1199 WMI_TAG_RTT_TSF_CMD, 1200 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 1201 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 1202 WMI_TAG_REQUEST_STATS_CMD, 1203 WMI_TAG_NLO_CONFIG_CMD, 1204 WMI_TAG_NLO_CONFIGURED_PARAMETERS, 1205 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD, 1206 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD, 1207 WMI_TAG_CHATTER_SET_MODE_CMD, 1208 WMI_TAG_ECHO_CMD, 1209 WMI_TAG_VDEV_SET_KEEPALIVE_CMD, 1210 WMI_TAG_VDEV_GET_KEEPALIVE_CMD, 1211 WMI_TAG_FORCE_FW_HANG_CMD, 1212 WMI_TAG_GPIO_CONFIG_CMD, 1213 WMI_TAG_GPIO_OUTPUT_CMD, 1214 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD, 1215 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD, 1216 WMI_TAG_BCN_TX_HDR, 1217 WMI_TAG_BCN_SEND_FROM_HOST_CMD, 1218 WMI_TAG_MGMT_TX_HDR, 1219 WMI_TAG_ADDBA_CLEAR_RESP_CMD, 1220 WMI_TAG_ADDBA_SEND_CMD, 1221 WMI_TAG_DELBA_SEND_CMD, 1222 WMI_TAG_ADDBA_SETRESPONSE_CMD, 1223 WMI_TAG_SEND_SINGLEAMSDU_CMD, 1224 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD, 1225 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD, 1226 WMI_TAG_PDEV_SET_HT_IE_CMD, 1227 WMI_TAG_PDEV_SET_VHT_IE_CMD, 1228 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD, 1229 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD, 1230 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD, 1231 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD, 1232 WMI_TAG_PEER_MCAST_GROUP_CMD, 1233 WMI_TAG_ROAM_AP_PROFILE, 1234 WMI_TAG_AP_PROFILE, 1235 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD, 1236 WMI_TAG_PDEV_DFS_ENABLE_CMD, 1237 WMI_TAG_PDEV_DFS_DISABLE_CMD, 1238 WMI_TAG_WOW_ADD_PATTERN_CMD, 1239 WMI_TAG_WOW_BITMAP_PATTERN_T, 1240 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T, 1241 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T, 1242 WMI_TAG_WOW_MAGIC_PATTERN_CMD, 1243 WMI_TAG_SCAN_UPDATE_REQUEST_CMD, 1244 WMI_TAG_CHATTER_PKT_COALESCING_FILTER, 1245 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD, 1246 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD, 1247 WMI_TAG_CHATTER_COALESCING_QUERY_CMD, 1248 WMI_TAG_TXBF_CMD, 1249 WMI_TAG_DEBUG_LOG_CONFIG_CMD, 1250 WMI_TAG_NLO_EVENT, 1251 WMI_TAG_CHATTER_QUERY_REPLY_EVENT, 1252 WMI_TAG_UPLOAD_H_HDR, 1253 WMI_TAG_CAPTURE_H_EVENT_HDR, 1254 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD, 1255 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD, 1256 WMI_TAG_VDEV_WMM_ADDTS_CMD, 1257 WMI_TAG_VDEV_WMM_DELTS_CMD, 1258 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 1259 WMI_TAG_TDLS_SET_STATE_CMD, 1260 WMI_TAG_TDLS_PEER_UPDATE_CMD, 1261 WMI_TAG_TDLS_PEER_EVENT, 1262 WMI_TAG_TDLS_PEER_CAPABILITIES, 1263 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD, 1264 WMI_TAG_ROAM_CHAN_LIST, 1265 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT, 1266 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD, 1267 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD, 1268 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD, 1269 WMI_TAG_BA_REQ_SSN_CMD, 1270 WMI_TAG_BA_RSP_SSN_EVENT, 1271 WMI_TAG_STA_SMPS_FORCE_MODE_CMD, 1272 WMI_TAG_SET_MCASTBCAST_FILTER_CMD, 1273 WMI_TAG_P2P_SET_OPPPS_CMD, 1274 WMI_TAG_P2P_SET_NOA_CMD, 1275 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM, 1276 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM, 1277 WMI_TAG_STA_SMPS_PARAM_CMD, 1278 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD, 1279 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD, 1280 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS, 1281 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT, 1282 WMI_TAG_P2P_NOA_EVENT, 1283 WMI_TAG_HB_SET_ENABLE_CMD, 1284 WMI_TAG_HB_SET_TCP_PARAMS_CMD, 1285 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD, 1286 WMI_TAG_HB_SET_UDP_PARAMS_CMD, 1287 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD, 1288 WMI_TAG_HB_IND_EVENT, 1289 WMI_TAG_TX_PAUSE_EVENT, 1290 WMI_TAG_RFKILL_EVENT, 1291 WMI_TAG_DFS_RADAR_EVENT, 1292 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD, 1293 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD, 1294 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST, 1295 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO, 1296 WMI_TAG_BATCH_SCAN_ENABLE_CMD, 1297 WMI_TAG_BATCH_SCAN_DISABLE_CMD, 1298 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD, 1299 WMI_TAG_BATCH_SCAN_ENABLED_EVENT, 1300 WMI_TAG_BATCH_SCAN_RESULT_EVENT, 1301 WMI_TAG_VDEV_PLMREQ_START_CMD, 1302 WMI_TAG_VDEV_PLMREQ_STOP_CMD, 1303 WMI_TAG_THERMAL_MGMT_CMD, 1304 WMI_TAG_THERMAL_MGMT_EVENT, 1305 WMI_TAG_PEER_INFO_REQ_CMD, 1306 WMI_TAG_PEER_INFO_EVENT, 1307 WMI_TAG_PEER_INFO, 1308 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT, 1309 WMI_TAG_RMC_SET_MODE_CMD, 1310 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD, 1311 WMI_TAG_RMC_CONFIG_CMD, 1312 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD, 1313 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD, 1314 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD, 1315 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD, 1316 WMI_TAG_NAN_CMD_PARAM, 1317 WMI_TAG_NAN_EVENT_HDR, 1318 WMI_TAG_PDEV_L1SS_TRACK_EVENT, 1319 WMI_TAG_DIAG_DATA_CONTAINER_EVENT, 1320 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM, 1321 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD, 1322 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT, 1323 WMI_TAG_AGGR_STATE_TRIG_EVENT, 1324 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY, 1325 WMI_TAG_ROAM_SCAN_CMD, 1326 WMI_TAG_REQ_STATS_EXT_CMD, 1327 WMI_TAG_STATS_EXT_EVENT, 1328 WMI_TAG_OBSS_SCAN_ENABLE_CMD, 1329 WMI_TAG_OBSS_SCAN_DISABLE_CMD, 1330 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT, 1331 WMI_TAG_PDEV_SET_LED_CONFIG_CMD, 1332 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD, 1333 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT, 1334 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT, 1335 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM, 1336 WMI_TAG_WOW_IOAC_PKT_PATTERN_T, 1337 WMI_TAG_WOW_IOAC_TMR_PATTERN_T, 1338 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD, 1339 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD, 1340 WMI_TAG_WOW_IOAC_KEEPALIVE_T, 1341 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD, 1342 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD, 1343 WMI_TAG_START_LINK_STATS_CMD, 1344 WMI_TAG_CLEAR_LINK_STATS_CMD, 1345 WMI_TAG_REQUEST_LINK_STATS_CMD, 1346 WMI_TAG_IFACE_LINK_STATS_EVENT, 1347 WMI_TAG_RADIO_LINK_STATS_EVENT, 1348 WMI_TAG_PEER_STATS_EVENT, 1349 WMI_TAG_CHANNEL_STATS, 1350 WMI_TAG_RADIO_LINK_STATS, 1351 WMI_TAG_RATE_STATS, 1352 WMI_TAG_PEER_LINK_STATS, 1353 WMI_TAG_WMM_AC_STATS, 1354 WMI_TAG_IFACE_LINK_STATS, 1355 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD, 1356 WMI_TAG_LPI_START_SCAN_CMD, 1357 WMI_TAG_LPI_STOP_SCAN_CMD, 1358 WMI_TAG_LPI_RESULT_EVENT, 1359 WMI_TAG_PEER_STATE_EVENT, 1360 WMI_TAG_EXTSCAN_BUCKET_CMD, 1361 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT, 1362 WMI_TAG_EXTSCAN_START_CMD, 1363 WMI_TAG_EXTSCAN_STOP_CMD, 1364 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD, 1365 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD, 1366 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD, 1367 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD, 1368 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD, 1369 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD, 1370 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD, 1371 WMI_TAG_EXTSCAN_OPERATION_EVENT, 1372 WMI_TAG_EXTSCAN_START_STOP_EVENT, 1373 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT, 1374 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT, 1375 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT, 1376 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT, 1377 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT, 1378 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT, 1379 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT, 1380 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT, 1381 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT, 1382 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT, 1383 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT, 1384 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD, 1385 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT, 1386 WMI_TAG_UNIT_TEST_CMD, 1387 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM, 1388 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM, 1389 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM, 1390 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM, 1391 WMI_TAG_ROAM_SYNCH_EVENT, 1392 WMI_TAG_ROAM_SYNCH_COMPLETE, 1393 WMI_TAG_EXTWOW_ENABLE_CMD, 1394 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD, 1395 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD, 1396 WMI_TAG_LPI_STATUS_EVENT, 1397 WMI_TAG_LPI_HANDOFF_EVENT, 1398 WMI_TAG_VDEV_RATE_STATS_EVENT, 1399 WMI_TAG_VDEV_RATE_HT_INFO, 1400 WMI_TAG_RIC_REQUEST, 1401 WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1402 WMI_TAG_PDEV_TEMPERATURE_EVENT, 1403 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD, 1404 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD, 1405 WMI_TAG_RIC_TSPEC, 1406 WMI_TAG_TPC_CHAINMASK_CONFIG, 1407 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD, 1408 WMI_TAG_SCAN_PROB_REQ_OUI_CMD, 1409 WMI_TAG_KEY_MATERIAL, 1410 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD, 1411 WMI_TAG_SET_LED_FLASHING_CMD, 1412 WMI_TAG_MDNS_OFFLOAD_CMD, 1413 WMI_TAG_MDNS_SET_FQDN_CMD, 1414 WMI_TAG_MDNS_SET_RESP_CMD, 1415 WMI_TAG_MDNS_GET_STATS_CMD, 1416 WMI_TAG_MDNS_STATS_EVENT, 1417 WMI_TAG_ROAM_INVOKE_CMD, 1418 WMI_TAG_PDEV_RESUME_EVENT, 1419 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD, 1420 WMI_TAG_SAP_OFL_ENABLE_CMD, 1421 WMI_TAG_SAP_OFL_ADD_STA_EVENT, 1422 WMI_TAG_SAP_OFL_DEL_STA_EVENT, 1423 WMI_TAG_APFIND_CMD_PARAM, 1424 WMI_TAG_APFIND_EVENT_HDR, 1425 WMI_TAG_OCB_SET_SCHED_CMD, 1426 WMI_TAG_OCB_SET_SCHED_EVENT, 1427 WMI_TAG_OCB_SET_CONFIG_CMD, 1428 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT, 1429 WMI_TAG_OCB_SET_UTC_TIME_CMD, 1430 WMI_TAG_OCB_START_TIMING_ADVERT_CMD, 1431 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD, 1432 WMI_TAG_OCB_GET_TSF_TIMER_CMD, 1433 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT, 1434 WMI_TAG_DCC_GET_STATS_CMD, 1435 WMI_TAG_DCC_CHANNEL_STATS_REQUEST, 1436 WMI_TAG_DCC_GET_STATS_RESP_EVENT, 1437 WMI_TAG_DCC_CLEAR_STATS_CMD, 1438 WMI_TAG_DCC_UPDATE_NDL_CMD, 1439 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT, 1440 WMI_TAG_DCC_STATS_EVENT, 1441 WMI_TAG_OCB_CHANNEL, 1442 WMI_TAG_OCB_SCHEDULE_ELEMENT, 1443 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL, 1444 WMI_TAG_DCC_NDL_CHAN, 1445 WMI_TAG_QOS_PARAMETER, 1446 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG, 1447 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM, 1448 WMI_TAG_ROAM_FILTER, 1449 WMI_TAG_PASSPOINT_CONFIG_CMD, 1450 WMI_TAG_PASSPOINT_EVENT_HDR, 1451 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD, 1452 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT, 1453 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD, 1454 WMI_TAG_VDEV_TSF_REPORT_EVENT, 1455 WMI_TAG_GET_FW_MEM_DUMP, 1456 WMI_TAG_UPDATE_FW_MEM_DUMP, 1457 WMI_TAG_FW_MEM_DUMP_PARAMS, 1458 WMI_TAG_DEBUG_MESG_FLUSH, 1459 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE, 1460 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION, 1461 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG, 1462 WMI_TAG_VDEV_SET_IE_CMD, 1463 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG, 1464 WMI_TAG_RSSI_BREACH_EVENT, 1465 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP, 1466 WMI_TAG_SOC_SET_PCL_CMD, 1467 WMI_TAG_SOC_SET_HW_MODE_CMD, 1468 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT, 1469 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT, 1470 WMI_TAG_VDEV_TXRX_STREAMS, 1471 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1472 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD, 1473 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT, 1474 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T, 1475 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD, 1476 WMI_TAG_DIAG_EVENT_LOG_CONFIG, 1477 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS, 1478 WMI_TAG_PACKET_FILTER_CONFIG, 1479 WMI_TAG_PACKET_FILTER_ENABLE, 1480 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD, 1481 WMI_TAG_MGMT_TX_SEND_CMD, 1482 WMI_TAG_MGMT_TX_COMPL_EVENT, 1483 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD, 1484 WMI_TAG_WOW_UDP_SVC_OFLD_CMD, 1485 WMI_TAG_LRO_INFO_CMD, 1486 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM, 1487 WMI_TAG_SERVICE_READY_EXT_EVENT, 1488 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD, 1489 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT, 1490 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD, 1491 WMI_TAG_NLO_CONFIGURE_MAWC_CMD, 1492 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD, 1493 WMI_TAG_PEER_ASSOC_CONF_EVENT, 1494 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD, 1495 WMI_TAG_AP_PS_EGAP_PARAM_CMD, 1496 WMI_TAG_AP_PS_EGAP_INFO_EVENT, 1497 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD, 1498 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD, 1499 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT, 1500 WMI_TAG_SCPC_EVENT, 1501 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST, 1502 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT, 1503 WMI_TAG_BPF_GET_CAPABILITY_CMD, 1504 WMI_TAG_BPF_CAPABILITY_INFO_EVT, 1505 WMI_TAG_BPF_GET_VDEV_STATS_CMD, 1506 WMI_TAG_BPF_VDEV_STATS_INFO_EVT, 1507 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD, 1508 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD, 1509 WMI_TAG_VDEV_DELETE_RESP_EVENT, 1510 WMI_TAG_PEER_DELETE_RESP_EVENT, 1511 WMI_TAG_ROAM_DENSE_THRES_PARAM, 1512 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM, 1513 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD, 1514 WMI_TAG_VDEV_CONFIG_RATEMASK, 1515 WMI_TAG_PDEV_FIPS_CMD, 1516 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD, 1517 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD, 1518 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD, 1519 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD, 1520 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD, 1521 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD, 1522 WMI_TAG_PDEV_SET_CTL_TABLE_CMD, 1523 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD, 1524 WMI_TAG_FWTEST_SET_PARAM_CMD, 1525 WMI_TAG_PEER_ATF_REQUEST, 1526 WMI_TAG_VDEV_ATF_REQUEST, 1527 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD, 1528 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD, 1529 WMI_TAG_INST_RSSI_STATS_RESP, 1530 WMI_TAG_MED_UTIL_REPORT_EVENT, 1531 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT, 1532 WMI_TAG_WDS_ADDR_EVENT, 1533 WMI_TAG_PEER_RATECODE_LIST_EVENT, 1534 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT, 1535 WMI_TAG_PDEV_TPC_EVENT, 1536 WMI_TAG_ANI_OFDM_EVENT, 1537 WMI_TAG_ANI_CCK_EVENT, 1538 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT, 1539 WMI_TAG_PDEV_FIPS_EVENT, 1540 WMI_TAG_ATF_PEER_INFO, 1541 WMI_TAG_PDEV_GET_TPC_CMD, 1542 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD, 1543 WMI_TAG_QBOOST_CFG_CMD, 1544 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE, 1545 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES, 1546 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM, 1547 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN, 1548 WMI_TAG_PEER_CCK_OFDM_RATE_INFO, 1549 WMI_TAG_PEER_MCS_RATE_INFO, 1550 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR, 1551 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM, 1552 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM, 1553 WMI_TAG_MU_REPORT_TOTAL_MU, 1554 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD, 1555 WMI_TAG_ROAM_SET_MBO, 1556 WMI_TAG_MIB_STATS_ENABLE_CMD, 1557 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT, 1558 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT, 1559 WMI_TAG_NAN_STARTED_CLUSTER_EVENT, 1560 WMI_TAG_NAN_JOINED_CLUSTER_EVENT, 1561 WMI_TAG_NDI_GET_CAP_REQ, 1562 WMI_TAG_NDP_INITIATOR_REQ, 1563 WMI_TAG_NDP_RESPONDER_REQ, 1564 WMI_TAG_NDP_END_REQ, 1565 WMI_TAG_NDI_CAP_RSP_EVENT, 1566 WMI_TAG_NDP_INITIATOR_RSP_EVENT, 1567 WMI_TAG_NDP_RESPONDER_RSP_EVENT, 1568 WMI_TAG_NDP_END_RSP_EVENT, 1569 WMI_TAG_NDP_INDICATION_EVENT, 1570 WMI_TAG_NDP_CONFIRM_EVENT, 1571 WMI_TAG_NDP_END_INDICATION_EVENT, 1572 WMI_TAG_VDEV_SET_QUIET_CMD, 1573 WMI_TAG_PDEV_SET_PCL_CMD, 1574 WMI_TAG_PDEV_SET_HW_MODE_CMD, 1575 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD, 1576 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD, 1577 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT, 1578 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT, 1579 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1580 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT, 1581 WMI_TAG_COEX_CONFIG_CMD, 1582 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER, 1583 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD, 1584 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1585 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD, 1586 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD, 1587 WMI_TAG_MAC_PHY_CAPABILITIES, 1588 WMI_TAG_HW_MODE_CAPABILITIES, 1589 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS, 1590 WMI_TAG_HAL_REG_CAPABILITIES_EXT, 1591 WMI_TAG_SOC_HAL_REG_CAPABILITIES, 1592 WMI_TAG_VDEV_WISA_CMD, 1593 WMI_TAG_TX_POWER_LEVEL_STATS_EVT, 1594 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV, 1595 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG, 1596 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD, 1597 WMI_TAG_NDP_END_RSP_PER_NDI, 1598 WMI_TAG_PEER_BWF_REQUEST, 1599 WMI_TAG_BWF_PEER_INFO, 1600 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD, 1601 WMI_TAG_RMC_SET_LEADER_CMD, 1602 WMI_TAG_RMC_MANUAL_LEADER_EVENT, 1603 WMI_TAG_PER_CHAIN_RSSI_STATS, 1604 WMI_TAG_RSSI_STATS, 1605 WMI_TAG_P2P_LO_START_CMD, 1606 WMI_TAG_P2P_LO_STOP_CMD, 1607 WMI_TAG_P2P_LO_STOPPED_EVENT, 1608 WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1609 WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1610 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD, 1611 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT, 1612 WMI_TAG_READ_DATA_FROM_FLASH_CMD, 1613 WMI_TAG_READ_DATA_FROM_FLASH_EVENT, 1614 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD, 1615 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD, 1616 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID, 1617 WMI_TAG_TLV_BUF_LEN_PARAM, 1618 WMI_TAG_SERVICE_AVAILABLE_EVENT, 1619 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD, 1620 WMI_TAG_PEER_ANTDIV_INFO_EVENT, 1621 WMI_TAG_PEER_ANTDIV_INFO, 1622 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD, 1623 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT, 1624 WMI_TAG_MNT_FILTER_CMD, 1625 WMI_TAG_GET_CHIP_POWER_STATS_CMD, 1626 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT, 1627 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD, 1628 WMI_TAG_COEX_REPORT_ISOLATION_EVENT, 1629 WMI_TAG_CHAN_CCA_STATS, 1630 WMI_TAG_PEER_SIGNAL_STATS, 1631 WMI_TAG_TX_STATS, 1632 WMI_TAG_PEER_AC_TX_STATS, 1633 WMI_TAG_RX_STATS, 1634 WMI_TAG_PEER_AC_RX_STATS, 1635 WMI_TAG_REPORT_STATS_EVENT, 1636 WMI_TAG_CHAN_CCA_STATS_THRESH, 1637 WMI_TAG_PEER_SIGNAL_STATS_THRESH, 1638 WMI_TAG_TX_STATS_THRESH, 1639 WMI_TAG_RX_STATS_THRESH, 1640 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD, 1641 WMI_TAG_REQUEST_WLAN_STATS_CMD, 1642 WMI_TAG_RX_AGGR_FAILURE_EVENT, 1643 WMI_TAG_RX_AGGR_FAILURE_INFO, 1644 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD, 1645 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT, 1646 WMI_TAG_PDEV_BAND_TO_MAC, 1647 WMI_TAG_TBTT_OFFSET_INFO, 1648 WMI_TAG_TBTT_OFFSET_EXT_EVENT, 1649 WMI_TAG_SAR_LIMITS_CMD, 1650 WMI_TAG_SAR_LIMIT_CMD_ROW, 1651 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 1652 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD, 1653 WMI_TAG_VDEV_ADFS_CH_CFG_CMD, 1654 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD, 1655 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT, 1656 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT, 1657 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT, 1658 WMI_TAG_VENDOR_OUI, 1659 WMI_TAG_REQUEST_RCPI_CMD, 1660 WMI_TAG_UPDATE_RCPI_EVENT, 1661 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD, 1662 WMI_TAG_PEER_STATS_INFO, 1663 WMI_TAG_PEER_STATS_INFO_EVENT, 1664 WMI_TAG_PKGID_EVENT, 1665 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS, 1666 WMI_TAG_SET_CURRENT_COUNTRY_CMD, 1667 WMI_TAG_REGULATORY_RULE_STRUCT, 1668 WMI_TAG_REG_CHAN_LIST_CC_EVENT, 1669 WMI_TAG_11D_SCAN_START_CMD, 1670 WMI_TAG_11D_SCAN_STOP_CMD, 1671 WMI_TAG_11D_NEW_COUNTRY_EVENT, 1672 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD, 1673 WMI_TAG_RADIO_CHAN_STATS, 1674 WMI_TAG_RADIO_CHAN_STATS_EVENT, 1675 WMI_TAG_ROAM_PER_CONFIG, 1676 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD, 1677 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT, 1678 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD, 1679 WMI_TAG_HW_DATA_FILTER_CMD, 1680 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF, 1681 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT, 1682 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED, 1683 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD, 1684 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT, 1685 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD, 1686 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD, 1687 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT, 1688 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD, 1689 WMI_TAG_MAC_PHY_CHAINMASK_COMBO, 1690 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY, 1691 WMI_TAG_VDEV_SET_ARP_STATS_CMD, 1692 WMI_TAG_VDEV_GET_ARP_STATS_CMD, 1693 WMI_TAG_VDEV_GET_ARP_STATS_EVENT, 1694 WMI_TAG_IFACE_OFFLOAD_STATS, 1695 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM, 1696 WMI_TAG_RSSI_CTL_EXT, 1697 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR, 1698 WMI_TAG_COEX_BT_ACTIVITY_EVENT, 1699 WMI_TAG_VDEV_GET_TX_POWER_CMD, 1700 WMI_TAG_VDEV_TX_POWER_EVENT, 1701 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT, 1702 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD, 1703 WMI_TAG_TX_SEND_PARAMS, 1704 WMI_TAG_HE_RATE_SET, 1705 WMI_TAG_CONGESTION_STATS, 1706 WMI_TAG_SET_INIT_COUNTRY_CMD, 1707 WMI_TAG_SCAN_DBS_DUTY_CYCLE, 1708 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV, 1709 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID, 1710 WMI_TAG_THERM_THROT_CONFIG_REQUEST, 1711 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 1712 WMI_TAG_THERM_THROT_STATS_EVENT, 1713 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO, 1714 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT, 1715 WMI_TAG_OEM_DMA_RING_CAPABILITIES, 1716 WMI_TAG_OEM_DMA_RING_CFG_REQ, 1717 WMI_TAG_OEM_DMA_RING_CFG_RSP, 1718 WMI_TAG_OEM_INDIRECT_DATA, 1719 WMI_TAG_OEM_DMA_BUF_RELEASE, 1720 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY, 1721 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1722 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT, 1723 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG, 1724 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD, 1725 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG, 1726 WMI_TAG_UNIT_TEST_EVENT, 1727 WMI_TAG_ROAM_FILS_OFFLOAD, 1728 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD, 1729 WMI_TAG_PMK_CACHE, 1730 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD, 1731 WMI_TAG_ROAM_FILS_SYNCH, 1732 WMI_TAG_GTK_OFFLOAD_EXTENDED, 1733 WMI_TAG_ROAM_BG_SCAN_ROAMING, 1734 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD, 1735 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD, 1736 WMI_TAG_OIC_PING_HANDOFF_EVENT, 1737 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD, 1738 WMI_TAG_DHCP_LEASE_RENEW_EVENT, 1739 WMI_TAG_BTM_CONFIG, 1740 WMI_TAG_DEBUG_MESG_FW_DATA_STALL, 1741 WMI_TAG_WLM_CONFIG_CMD, 1742 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST, 1743 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT, 1744 WMI_TAG_ROAM_CND_SCORING_PARAM, 1745 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION, 1746 WMI_TAG_VENDOR_OUI_EXT, 1747 WMI_TAG_ROAM_SYNCH_FRAME_EVENT, 1748 WMI_TAG_FD_SEND_FROM_HOST_CMD, 1749 WMI_TAG_ENABLE_FILS_CMD, 1750 WMI_TAG_HOST_SWFDA_EVENT, 1751 WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1752 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD, 1753 WMI_TAG_STATS_PERIOD, 1754 WMI_TAG_NDL_SCHEDULE_UPDATE, 1755 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD, 1756 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE, 1757 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD, 1758 WMI_TAG_SAR2_RESULT_EVENT, 1759 WMI_TAG_SAR_CAPABILITIES, 1760 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD, 1761 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT, 1762 WMI_TAG_DMA_RING_CAPABILITIES, 1763 WMI_TAG_DMA_RING_CFG_REQ, 1764 WMI_TAG_DMA_RING_CFG_RSP, 1765 WMI_TAG_DMA_BUF_RELEASE, 1766 WMI_TAG_DMA_BUF_RELEASE_ENTRY, 1767 WMI_TAG_SAR_GET_LIMITS_CMD, 1768 WMI_TAG_SAR_GET_LIMITS_EVENT, 1769 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW, 1770 WMI_TAG_OFFLOAD_11K_REPORT, 1771 WMI_TAG_INVOKE_NEIGHBOR_REPORT, 1772 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD, 1773 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS, 1774 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS, 1775 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD, 1776 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD, 1777 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD, 1778 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT, 1779 WMI_TAG_PDEV_GET_NFCAL_POWER, 1780 WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 1781 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 1782 WMI_TAG_OBSS_COLOR_COLLISION_EVT, 1783 WMI_TAG_RUNTIME_DPD_RECAL_CMD, 1784 WMI_TAG_TWT_ENABLE_CMD, 1785 WMI_TAG_TWT_DISABLE_CMD, 1786 WMI_TAG_TWT_ADD_DIALOG_CMD, 1787 WMI_TAG_TWT_DEL_DIALOG_CMD, 1788 WMI_TAG_TWT_PAUSE_DIALOG_CMD, 1789 WMI_TAG_TWT_RESUME_DIALOG_CMD, 1790 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT, 1791 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT, 1792 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT, 1793 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT, 1794 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT, 1795 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT, 1796 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD, 1797 WMI_TAG_ROAM_SCAN_STATS_EVENT, 1798 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD, 1799 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD, 1800 WMI_TAG_GET_TPC_POWER_CMD, 1801 WMI_TAG_GET_TPC_POWER_EVENT, 1802 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA, 1803 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD, 1804 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD, 1805 WMI_TAG_MOTION_DET_START_STOP_CMD, 1806 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD, 1807 WMI_TAG_MOTION_DET_EVENT, 1808 WMI_TAG_MOTION_DET_BASE_LINE_EVENT, 1809 WMI_TAG_NDP_TRANSPORT_IP, 1810 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 1811 WMI_TAG_ESP_ESTIMATE_EVENT, 1812 WMI_TAG_NAN_HOST_CONFIG, 1813 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS, 1814 WMI_TAG_PEER_CFR_CAPTURE_CMD, 1815 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD, 1816 WMI_TAG_CHAN_WIDTH_PEER_LIST, 1817 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD, 1818 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD, 1819 WMI_TAG_PEER_EXTD2_STATS, 1820 WMI_TAG_HPCS_PULSE_START_CMD, 1821 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT, 1822 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD, 1823 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD, 1824 WMI_TAG_NAN_EVENT_INFO, 1825 WMI_TAG_NDP_CHANNEL_INFO, 1826 WMI_TAG_NDP_CMD, 1827 WMI_TAG_NDP_EVENT, 1828 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301, 1829 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO, 1830 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344, 1831 WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD = 0x37b, 1832 WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD, 1833 WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD = 0x381, 1834 WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 1835 WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD, 1836 WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 1837 WMI_TAG_MAX 1838 }; 1839 1840 enum wmi_tlv_service { 1841 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0, 1842 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1, 1843 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2, 1844 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3, 1845 WMI_TLV_SERVICE_STA_PWRSAVE = 4, 1846 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5, 1847 WMI_TLV_SERVICE_AP_UAPSD = 6, 1848 WMI_TLV_SERVICE_AP_DFS = 7, 1849 WMI_TLV_SERVICE_11AC = 8, 1850 WMI_TLV_SERVICE_BLOCKACK = 9, 1851 WMI_TLV_SERVICE_PHYERR = 10, 1852 WMI_TLV_SERVICE_BCN_FILTER = 11, 1853 WMI_TLV_SERVICE_RTT = 12, 1854 WMI_TLV_SERVICE_WOW = 13, 1855 WMI_TLV_SERVICE_RATECTRL_CACHE = 14, 1856 WMI_TLV_SERVICE_IRAM_TIDS = 15, 1857 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16, 1858 WMI_TLV_SERVICE_NLO = 17, 1859 WMI_TLV_SERVICE_GTK_OFFLOAD = 18, 1860 WMI_TLV_SERVICE_SCAN_SCH = 19, 1861 WMI_TLV_SERVICE_CSA_OFFLOAD = 20, 1862 WMI_TLV_SERVICE_CHATTER = 21, 1863 WMI_TLV_SERVICE_COEX_FREQAVOID = 22, 1864 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23, 1865 WMI_TLV_SERVICE_FORCE_FW_HANG = 24, 1866 WMI_TLV_SERVICE_GPIO = 25, 1867 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26, 1868 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27, 1869 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28, 1870 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29, 1871 WMI_TLV_SERVICE_TX_ENCAP = 30, 1872 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31, 1873 WMI_TLV_SERVICE_EARLY_RX = 32, 1874 WMI_TLV_SERVICE_STA_SMPS = 33, 1875 WMI_TLV_SERVICE_FWTEST = 34, 1876 WMI_TLV_SERVICE_STA_WMMAC = 35, 1877 WMI_TLV_SERVICE_TDLS = 36, 1878 WMI_TLV_SERVICE_BURST = 37, 1879 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38, 1880 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39, 1881 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40, 1882 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41, 1883 WMI_TLV_SERVICE_WLAN_HB = 42, 1884 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43, 1885 WMI_TLV_SERVICE_BATCH_SCAN = 44, 1886 WMI_TLV_SERVICE_QPOWER = 45, 1887 WMI_TLV_SERVICE_PLMREQ = 46, 1888 WMI_TLV_SERVICE_THERMAL_MGMT = 47, 1889 WMI_TLV_SERVICE_RMC = 48, 1890 WMI_TLV_SERVICE_MHF_OFFLOAD = 49, 1891 WMI_TLV_SERVICE_COEX_SAR = 50, 1892 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51, 1893 WMI_TLV_SERVICE_NAN = 52, 1894 WMI_TLV_SERVICE_L1SS_STAT = 53, 1895 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54, 1896 WMI_TLV_SERVICE_OBSS_SCAN = 55, 1897 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56, 1898 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57, 1899 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58, 1900 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59, 1901 WMI_TLV_SERVICE_LPASS = 60, 1902 WMI_TLV_SERVICE_EXTSCAN = 61, 1903 WMI_TLV_SERVICE_D0WOW = 62, 1904 WMI_TLV_SERVICE_HSOFFLOAD = 63, 1905 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64, 1906 WMI_TLV_SERVICE_RX_FULL_REORDER = 65, 1907 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66, 1908 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67, 1909 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68, 1910 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69, 1911 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70, 1912 WMI_TLV_SERVICE_OCB = 71, 1913 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72, 1914 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73, 1915 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74, 1916 WMI_TLV_SERVICE_MGMT_TX_HTT = 75, 1917 WMI_TLV_SERVICE_MGMT_TX_WMI = 76, 1918 WMI_TLV_SERVICE_EXT_MSG = 77, 1919 WMI_TLV_SERVICE_MAWC = 78, 1920 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79, 1921 WMI_TLV_SERVICE_EGAP = 80, 1922 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81, 1923 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82, 1924 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83, 1925 WMI_TLV_SERVICE_ATF = 84, 1926 WMI_TLV_SERVICE_COEX_GPIO = 85, 1927 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86, 1928 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87, 1929 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88, 1930 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89, 1931 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90, 1932 WMI_TLV_SERVICE_BPF_OFFLOAD = 91, 1933 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92, 1934 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93, 1935 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94, 1936 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95, 1937 WMI_TLV_SERVICE_NAN_DATA = 96, 1938 WMI_TLV_SERVICE_NAN_RTT = 97, 1939 WMI_TLV_SERVICE_11AX = 98, 1940 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99, 1941 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100, 1942 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101, 1943 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102, 1944 WMI_TLV_SERVICE_MESH_11S = 103, 1945 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104, 1946 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105, 1947 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106, 1948 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107, 1949 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108, 1950 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109, 1951 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110, 1952 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111, 1953 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112, 1954 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113, 1955 WMI_TLV_SERVICE_RCPI_SUPPORT = 114, 1956 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115, 1957 WMI_TLV_SERVICE_PEER_STATS_INFO = 116, 1958 WMI_TLV_SERVICE_REGULATORY_DB = 117, 1959 WMI_TLV_SERVICE_11D_OFFLOAD = 118, 1960 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119, 1961 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120, 1962 WMI_TLV_SERVICE_PKT_ROUTING = 121, 1963 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122, 1964 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123, 1965 WMI_TLV_SERVICE_8SS_TX_BFEE = 124, 1966 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125, 1967 WMI_TLV_SERVICE_ACK_TIMEOUT = 126, 1968 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127, 1969 1970 WMI_MAX_SERVICE = 128, 1971 1972 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128, 1973 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129, 1974 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130, 1975 WMI_TLV_SERVICE_FILS_SUPPORT = 131, 1976 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132, 1977 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133, 1978 WMI_TLV_SERVICE_MAWC_SUPPORT = 134, 1979 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135, 1980 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136, 1981 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137, 1982 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138, 1983 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139, 1984 WMI_TLV_SERVICE_THERM_THROT = 140, 1985 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141, 1986 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142, 1987 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143, 1988 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144, 1989 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145, 1990 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146, 1991 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147, 1992 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148, 1993 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149, 1994 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150, 1995 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151, 1996 WMI_TLV_SERVICE_STA_TWT = 152, 1997 WMI_TLV_SERVICE_AP_TWT = 153, 1998 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154, 1999 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155, 2000 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156, 2001 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157, 2002 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158, 2003 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159, 2004 WMI_TLV_SERVICE_MOTION_DET = 160, 2005 WMI_TLV_SERVICE_INFRA_MBSSID = 161, 2006 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162, 2007 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163, 2008 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164, 2009 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165, 2010 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166, 2011 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167, 2012 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168, 2013 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169, 2014 WMI_TLV_SERVICE_ESP_SUPPORT = 170, 2015 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171, 2016 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172, 2017 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173, 2018 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174, 2019 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175, 2020 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176, 2021 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177, 2022 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178, 2023 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179, 2024 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180, 2025 WMI_TLV_SERVICE_FETCH_TX_PN = 181, 2026 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182, 2027 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183, 2028 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184, 2029 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185, 2030 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186, 2031 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187, 2032 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188, 2033 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189, 2034 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190, 2035 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191, 2036 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192, 2037 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193, 2038 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194, 2039 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195, 2040 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196, 2041 WMI_TLV_SERVICE_VOW_ENABLE = 197, 2042 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198, 2043 WMI_TLV_SERVICE_BROADCAST_TWT = 199, 2044 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200, 2045 WMI_TLV_SERVICE_PS_TDCC = 201, 2046 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202, 2047 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203, 2048 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204, 2049 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205, 2050 WMI_TLV_SERVICE_WPA3_FT_FILS = 206, 2051 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207, 2052 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208, 2053 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209, 2054 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210, 2055 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211, 2056 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212, 2057 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213, 2058 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219, 2059 WMI_TLV_SERVICE_EXT2_MSG = 220, 2060 WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249, 2061 2062 WMI_MAX_EXT_SERVICE 2063 }; 2064 2065 enum { 2066 WMI_SMPS_FORCED_MODE_NONE = 0, 2067 WMI_SMPS_FORCED_MODE_DISABLED, 2068 WMI_SMPS_FORCED_MODE_STATIC, 2069 WMI_SMPS_FORCED_MODE_DYNAMIC 2070 }; 2071 2072 #define WMI_TPC_CHAINMASK_CONFIG_BAND_2G 0 2073 #define WMI_TPC_CHAINMASK_CONFIG_BAND_5G 1 2074 #define WMI_NUM_SUPPORTED_BAND_MAX 2 2075 2076 #define WMI_PEER_MIMO_PS_STATE 0x1 2077 #define WMI_PEER_AMPDU 0x2 2078 #define WMI_PEER_AUTHORIZE 0x3 2079 #define WMI_PEER_CHWIDTH 0x4 2080 #define WMI_PEER_NSS 0x5 2081 #define WMI_PEER_USE_4ADDR 0x6 2082 #define WMI_PEER_MEMBERSHIP 0x7 2083 #define WMI_PEER_USERPOS 0x8 2084 #define WMI_PEER_CRIT_PROTO_HINT_ENABLED 0x9 2085 #define WMI_PEER_TX_FAIL_CNT_THR 0xA 2086 #define WMI_PEER_SET_HW_RETRY_CTS2S 0xB 2087 #define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH 0xC 2088 #define WMI_PEER_PHYMODE 0xD 2089 #define WMI_PEER_USE_FIXED_PWR 0xE 2090 #define WMI_PEER_PARAM_FIXED_RATE 0xF 2091 #define WMI_PEER_SET_MU_WHITELIST 0x10 2092 #define WMI_PEER_SET_MAX_TX_RATE 0x11 2093 #define WMI_PEER_SET_MIN_TX_RATE 0x12 2094 #define WMI_PEER_SET_DEFAULT_ROUTING 0x13 2095 2096 /* slot time long */ 2097 #define WMI_VDEV_SLOT_TIME_LONG 0x1 2098 /* slot time short */ 2099 #define WMI_VDEV_SLOT_TIME_SHORT 0x2 2100 /* preablbe long */ 2101 #define WMI_VDEV_PREAMBLE_LONG 0x1 2102 /* preablbe short */ 2103 #define WMI_VDEV_PREAMBLE_SHORT 0x2 2104 2105 enum wmi_peer_smps_state { 2106 WMI_PEER_SMPS_PS_NONE = 0x0, 2107 WMI_PEER_SMPS_STATIC = 0x1, 2108 WMI_PEER_SMPS_DYNAMIC = 0x2 2109 }; 2110 2111 enum wmi_peer_chwidth { 2112 WMI_PEER_CHWIDTH_20MHZ = 0, 2113 WMI_PEER_CHWIDTH_40MHZ = 1, 2114 WMI_PEER_CHWIDTH_80MHZ = 2, 2115 WMI_PEER_CHWIDTH_160MHZ = 3, 2116 }; 2117 2118 enum wmi_beacon_gen_mode { 2119 WMI_BEACON_STAGGERED_MODE = 0, 2120 WMI_BEACON_BURST_MODE = 1 2121 }; 2122 2123 enum wmi_direct_buffer_module { 2124 WMI_DIRECT_BUF_SPECTRAL = 0, 2125 WMI_DIRECT_BUF_CFR = 1, 2126 2127 /* keep it last */ 2128 WMI_DIRECT_BUF_MAX 2129 }; 2130 2131 struct wmi_host_pdev_band_to_mac { 2132 u32 pdev_id; 2133 u32 start_freq; 2134 u32 end_freq; 2135 }; 2136 2137 struct ath11k_ppe_threshold { 2138 u32 numss_m1; 2139 u32 ru_bit_mask; 2140 u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS]; 2141 }; 2142 2143 struct ath11k_service_ext_param { 2144 u32 default_conc_scan_config_bits; 2145 u32 default_fw_config_bits; 2146 struct ath11k_ppe_threshold ppet; 2147 u32 he_cap_info; 2148 u32 mpdu_density; 2149 u32 max_bssid_rx_filters; 2150 u32 num_hw_modes; 2151 u32 num_phy; 2152 }; 2153 2154 struct ath11k_hw_mode_caps { 2155 u32 hw_mode_id; 2156 u32 phy_id_map; 2157 u32 hw_mode_config_type; 2158 }; 2159 2160 #define PSOC_HOST_MAX_PHY_SIZE (3) 2161 #define ATH11K_11B_SUPPORT BIT(0) 2162 #define ATH11K_11G_SUPPORT BIT(1) 2163 #define ATH11K_11A_SUPPORT BIT(2) 2164 #define ATH11K_11N_SUPPORT BIT(3) 2165 #define ATH11K_11AC_SUPPORT BIT(4) 2166 #define ATH11K_11AX_SUPPORT BIT(5) 2167 2168 struct ath11k_hal_reg_capabilities_ext { 2169 u32 phy_id; 2170 u32 eeprom_reg_domain; 2171 u32 eeprom_reg_domain_ext; 2172 u32 regcap1; 2173 u32 regcap2; 2174 u32 wireless_modes; 2175 u32 low_2ghz_chan; 2176 u32 high_2ghz_chan; 2177 u32 low_5ghz_chan; 2178 u32 high_5ghz_chan; 2179 }; 2180 2181 #define WMI_HOST_MAX_PDEV 3 2182 2183 struct wlan_host_mem_chunk { 2184 u32 tlv_header; 2185 u32 req_id; 2186 u32 ptr; 2187 u32 size; 2188 } __packed; 2189 2190 struct wmi_host_mem_chunk { 2191 void *vaddr; 2192 dma_addr_t paddr; 2193 u32 len; 2194 u32 req_id; 2195 }; 2196 2197 struct wmi_init_cmd_param { 2198 u32 tlv_header; 2199 struct target_resource_config *res_cfg; 2200 u8 num_mem_chunks; 2201 struct wmi_host_mem_chunk *mem_chunks; 2202 u32 hw_mode_id; 2203 u32 num_band_to_mac; 2204 struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV]; 2205 }; 2206 2207 struct wmi_pdev_band_to_mac { 2208 u32 tlv_header; 2209 u32 pdev_id; 2210 u32 start_freq; 2211 u32 end_freq; 2212 } __packed; 2213 2214 struct wmi_pdev_set_hw_mode_cmd_param { 2215 u32 tlv_header; 2216 u32 pdev_id; 2217 u32 hw_mode_index; 2218 u32 num_band_to_mac; 2219 } __packed; 2220 2221 struct wmi_ppe_threshold { 2222 u32 numss_m1; /** NSS - 1*/ 2223 union { 2224 u32 ru_count; 2225 u32 ru_mask; 2226 } __packed; 2227 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2228 } __packed; 2229 2230 #define HW_BD_INFO_SIZE 5 2231 2232 struct wmi_abi_version { 2233 u32 abi_version_0; 2234 u32 abi_version_1; 2235 u32 abi_version_ns_0; 2236 u32 abi_version_ns_1; 2237 u32 abi_version_ns_2; 2238 u32 abi_version_ns_3; 2239 } __packed; 2240 2241 struct wmi_init_cmd { 2242 u32 tlv_header; 2243 struct wmi_abi_version host_abi_vers; 2244 u32 num_host_mem_chunks; 2245 } __packed; 2246 2247 struct wmi_resource_config { 2248 u32 tlv_header; 2249 u32 num_vdevs; 2250 u32 num_peers; 2251 u32 num_offload_peers; 2252 u32 num_offload_reorder_buffs; 2253 u32 num_peer_keys; 2254 u32 num_tids; 2255 u32 ast_skid_limit; 2256 u32 tx_chain_mask; 2257 u32 rx_chain_mask; 2258 u32 rx_timeout_pri[4]; 2259 u32 rx_decap_mode; 2260 u32 scan_max_pending_req; 2261 u32 bmiss_offload_max_vdev; 2262 u32 roam_offload_max_vdev; 2263 u32 roam_offload_max_ap_profiles; 2264 u32 num_mcast_groups; 2265 u32 num_mcast_table_elems; 2266 u32 mcast2ucast_mode; 2267 u32 tx_dbg_log_size; 2268 u32 num_wds_entries; 2269 u32 dma_burst_size; 2270 u32 mac_aggr_delim; 2271 u32 rx_skip_defrag_timeout_dup_detection_check; 2272 u32 vow_config; 2273 u32 gtk_offload_max_vdev; 2274 u32 num_msdu_desc; 2275 u32 max_frag_entries; 2276 u32 num_tdls_vdevs; 2277 u32 num_tdls_conn_table_entries; 2278 u32 beacon_tx_offload_max_vdev; 2279 u32 num_multicast_filter_entries; 2280 u32 num_wow_filters; 2281 u32 num_keep_alive_pattern; 2282 u32 keep_alive_pattern_size; 2283 u32 max_tdls_concurrent_sleep_sta; 2284 u32 max_tdls_concurrent_buffer_sta; 2285 u32 wmi_send_separate; 2286 u32 num_ocb_vdevs; 2287 u32 num_ocb_channels; 2288 u32 num_ocb_schedules; 2289 u32 flag1; 2290 u32 smart_ant_cap; 2291 u32 bk_minfree; 2292 u32 be_minfree; 2293 u32 vi_minfree; 2294 u32 vo_minfree; 2295 u32 alloc_frag_desc_for_data_pkt; 2296 u32 num_ns_ext_tuples_cfg; 2297 u32 bpf_instruction_size; 2298 u32 max_bssid_rx_filters; 2299 u32 use_pdev_id; 2300 u32 max_num_dbs_scan_duty_cycle; 2301 u32 max_num_group_keys; 2302 u32 peer_map_unmap_v2_support; 2303 u32 sched_params; 2304 u32 twt_ap_pdev_count; 2305 u32 twt_ap_sta_count; 2306 } __packed; 2307 2308 struct wmi_service_ready_event { 2309 u32 fw_build_vers; 2310 struct wmi_abi_version fw_abi_vers; 2311 u32 phy_capability; 2312 u32 max_frag_entry; 2313 u32 num_rf_chains; 2314 u32 ht_cap_info; 2315 u32 vht_cap_info; 2316 u32 vht_supp_mcs; 2317 u32 hw_min_tx_power; 2318 u32 hw_max_tx_power; 2319 u32 sys_cap_info; 2320 u32 min_pkt_size_enable; 2321 u32 max_bcn_ie_size; 2322 u32 num_mem_reqs; 2323 u32 max_num_scan_channels; 2324 u32 hw_bd_id; 2325 u32 hw_bd_info[HW_BD_INFO_SIZE]; 2326 u32 max_supported_macs; 2327 u32 wmi_fw_sub_feat_caps; 2328 u32 num_dbs_hw_modes; 2329 /* txrx_chainmask 2330 * [7:0] - 2G band tx chain mask 2331 * [15:8] - 2G band rx chain mask 2332 * [23:16] - 5G band tx chain mask 2333 * [31:24] - 5G band rx chain mask 2334 */ 2335 u32 txrx_chainmask; 2336 u32 default_dbs_hw_mode_index; 2337 u32 num_msdu_desc; 2338 } __packed; 2339 2340 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32)) 2341 2342 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */ 2343 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32)) 2344 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32 2345 #define WMI_SERVICE_BITS_IN_SIZE32 4 2346 2347 struct wmi_service_ready_ext_event { 2348 u32 default_conc_scan_config_bits; 2349 u32 default_fw_config_bits; 2350 struct wmi_ppe_threshold ppet; 2351 u32 he_cap_info; 2352 u32 mpdu_density; 2353 u32 max_bssid_rx_filters; 2354 u32 fw_build_vers_ext; 2355 u32 max_nlo_ssids; 2356 u32 max_bssid_indicator; 2357 u32 he_cap_info_ext; 2358 } __packed; 2359 2360 struct wmi_soc_mac_phy_hw_mode_caps { 2361 u32 num_hw_modes; 2362 u32 num_chainmask_tables; 2363 } __packed; 2364 2365 struct wmi_hw_mode_capabilities { 2366 u32 tlv_header; 2367 u32 hw_mode_id; 2368 u32 phy_id_map; 2369 u32 hw_mode_config_type; 2370 } __packed; 2371 2372 #define WMI_MAX_HECAP_PHY_SIZE (3) 2373 2374 struct wmi_mac_phy_capabilities { 2375 u32 hw_mode_id; 2376 u32 pdev_id; 2377 u32 phy_id; 2378 u32 supported_flags; 2379 u32 supported_bands; 2380 u32 ampdu_density; 2381 u32 max_bw_supported_2g; 2382 u32 ht_cap_info_2g; 2383 u32 vht_cap_info_2g; 2384 u32 vht_supp_mcs_2g; 2385 u32 he_cap_info_2g; 2386 u32 he_supp_mcs_2g; 2387 u32 tx_chain_mask_2g; 2388 u32 rx_chain_mask_2g; 2389 u32 max_bw_supported_5g; 2390 u32 ht_cap_info_5g; 2391 u32 vht_cap_info_5g; 2392 u32 vht_supp_mcs_5g; 2393 u32 he_cap_info_5g; 2394 u32 he_supp_mcs_5g; 2395 u32 tx_chain_mask_5g; 2396 u32 rx_chain_mask_5g; 2397 u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE]; 2398 u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE]; 2399 struct wmi_ppe_threshold he_ppet2g; 2400 struct wmi_ppe_threshold he_ppet5g; 2401 u32 chainmask_table_id; 2402 u32 lmac_id; 2403 u32 he_cap_info_2g_ext; 2404 u32 he_cap_info_5g_ext; 2405 u32 he_cap_info_internal; 2406 } __packed; 2407 2408 struct wmi_hal_reg_capabilities_ext { 2409 u32 tlv_header; 2410 u32 phy_id; 2411 u32 eeprom_reg_domain; 2412 u32 eeprom_reg_domain_ext; 2413 u32 regcap1; 2414 u32 regcap2; 2415 u32 wireless_modes; 2416 u32 low_2ghz_chan; 2417 u32 high_2ghz_chan; 2418 u32 low_5ghz_chan; 2419 u32 high_5ghz_chan; 2420 } __packed; 2421 2422 struct wmi_soc_hal_reg_capabilities { 2423 u32 num_phy; 2424 } __packed; 2425 2426 /* 2 word representation of MAC addr */ 2427 struct wmi_mac_addr { 2428 union { 2429 u8 addr[6]; 2430 struct { 2431 u32 word0; 2432 u32 word1; 2433 } __packed; 2434 } __packed; 2435 } __packed; 2436 2437 struct wmi_dma_ring_capabilities { 2438 u32 tlv_header; 2439 u32 pdev_id; 2440 u32 module_id; 2441 u32 min_elem; 2442 u32 min_buf_sz; 2443 u32 min_buf_align; 2444 } __packed; 2445 2446 struct wmi_ready_event_min { 2447 struct wmi_abi_version fw_abi_vers; 2448 struct wmi_mac_addr mac_addr; 2449 u32 status; 2450 u32 num_dscp_table; 2451 u32 num_extra_mac_addr; 2452 u32 num_total_peers; 2453 u32 num_extra_peers; 2454 } __packed; 2455 2456 struct wmi_ready_event { 2457 struct wmi_ready_event_min ready_event_min; 2458 u32 max_ast_index; 2459 u32 pktlog_defs_checksum; 2460 } __packed; 2461 2462 struct wmi_service_available_event { 2463 u32 wmi_service_segment_offset; 2464 u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32]; 2465 } __packed; 2466 2467 struct ath11k_pdev_wmi { 2468 struct ath11k_wmi_base *wmi_ab; 2469 enum ath11k_htc_ep_id eid; 2470 const struct wmi_peer_flags_map *peer_flags; 2471 u32 rx_decap_mode; 2472 }; 2473 2474 struct vdev_create_params { 2475 u8 if_id; 2476 u32 type; 2477 u32 subtype; 2478 struct { 2479 u8 tx; 2480 u8 rx; 2481 } chains[NUM_NL80211_BANDS]; 2482 u32 pdev_id; 2483 }; 2484 2485 struct wmi_vdev_create_cmd { 2486 u32 tlv_header; 2487 u32 vdev_id; 2488 u32 vdev_type; 2489 u32 vdev_subtype; 2490 struct wmi_mac_addr vdev_macaddr; 2491 u32 num_cfg_txrx_streams; 2492 u32 pdev_id; 2493 } __packed; 2494 2495 struct wmi_vdev_txrx_streams { 2496 u32 tlv_header; 2497 u32 band; 2498 u32 supported_tx_streams; 2499 u32 supported_rx_streams; 2500 } __packed; 2501 2502 struct wmi_vdev_delete_cmd { 2503 u32 tlv_header; 2504 u32 vdev_id; 2505 } __packed; 2506 2507 struct wmi_vdev_up_cmd { 2508 u32 tlv_header; 2509 u32 vdev_id; 2510 u32 vdev_assoc_id; 2511 struct wmi_mac_addr vdev_bssid; 2512 struct wmi_mac_addr trans_bssid; 2513 u32 profile_idx; 2514 u32 profile_num; 2515 } __packed; 2516 2517 struct wmi_vdev_stop_cmd { 2518 u32 tlv_header; 2519 u32 vdev_id; 2520 } __packed; 2521 2522 struct wmi_vdev_down_cmd { 2523 u32 tlv_header; 2524 u32 vdev_id; 2525 } __packed; 2526 2527 #define WMI_VDEV_START_HIDDEN_SSID BIT(0) 2528 #define WMI_VDEV_START_PMF_ENABLED BIT(1) 2529 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) 2530 2531 struct wmi_ssid { 2532 u32 ssid_len; 2533 u32 ssid[8]; 2534 } __packed; 2535 2536 #define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ) 2537 2538 struct wmi_vdev_start_request_cmd { 2539 u32 tlv_header; 2540 u32 vdev_id; 2541 u32 requestor_id; 2542 u32 beacon_interval; 2543 u32 dtim_period; 2544 u32 flags; 2545 struct wmi_ssid ssid; 2546 u32 bcn_tx_rate; 2547 u32 bcn_txpower; 2548 u32 num_noa_descriptors; 2549 u32 disable_hw_ack; 2550 u32 preferred_tx_streams; 2551 u32 preferred_rx_streams; 2552 u32 he_ops; 2553 u32 cac_duration_ms; 2554 u32 regdomain; 2555 } __packed; 2556 2557 #define MGMT_TX_DL_FRM_LEN 64 2558 #define WMI_MAC_MAX_SSID_LENGTH 32 2559 struct mac_ssid { 2560 u8 length; 2561 u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH]; 2562 } __packed; 2563 2564 struct wmi_p2p_noa_descriptor { 2565 u32 type_count; 2566 u32 duration; 2567 u32 interval; 2568 u32 start_time; 2569 }; 2570 2571 struct channel_param { 2572 u8 chan_id; 2573 u8 pwr; 2574 u32 mhz; 2575 u32 half_rate:1, 2576 quarter_rate:1, 2577 dfs_set:1, 2578 dfs_set_cfreq2:1, 2579 is_chan_passive:1, 2580 allow_ht:1, 2581 allow_vht:1, 2582 allow_he:1, 2583 set_agile:1, 2584 psc_channel:1; 2585 u32 phy_mode; 2586 u32 cfreq1; 2587 u32 cfreq2; 2588 char maxpower; 2589 char minpower; 2590 char maxregpower; 2591 u8 antennamax; 2592 u8 reg_class_id; 2593 } __packed; 2594 2595 enum wmi_phy_mode { 2596 MODE_11A = 0, 2597 MODE_11G = 1, /* 11b/g Mode */ 2598 MODE_11B = 2, /* 11b Mode */ 2599 MODE_11GONLY = 3, /* 11g only Mode */ 2600 MODE_11NA_HT20 = 4, 2601 MODE_11NG_HT20 = 5, 2602 MODE_11NA_HT40 = 6, 2603 MODE_11NG_HT40 = 7, 2604 MODE_11AC_VHT20 = 8, 2605 MODE_11AC_VHT40 = 9, 2606 MODE_11AC_VHT80 = 10, 2607 MODE_11AC_VHT20_2G = 11, 2608 MODE_11AC_VHT40_2G = 12, 2609 MODE_11AC_VHT80_2G = 13, 2610 MODE_11AC_VHT80_80 = 14, 2611 MODE_11AC_VHT160 = 15, 2612 MODE_11AX_HE20 = 16, 2613 MODE_11AX_HE40 = 17, 2614 MODE_11AX_HE80 = 18, 2615 MODE_11AX_HE80_80 = 19, 2616 MODE_11AX_HE160 = 20, 2617 MODE_11AX_HE20_2G = 21, 2618 MODE_11AX_HE40_2G = 22, 2619 MODE_11AX_HE80_2G = 23, 2620 MODE_UNKNOWN = 24, 2621 MODE_MAX = 24 2622 }; 2623 2624 static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode) 2625 { 2626 switch (mode) { 2627 case MODE_11A: 2628 return "11a"; 2629 case MODE_11G: 2630 return "11g"; 2631 case MODE_11B: 2632 return "11b"; 2633 case MODE_11GONLY: 2634 return "11gonly"; 2635 case MODE_11NA_HT20: 2636 return "11na-ht20"; 2637 case MODE_11NG_HT20: 2638 return "11ng-ht20"; 2639 case MODE_11NA_HT40: 2640 return "11na-ht40"; 2641 case MODE_11NG_HT40: 2642 return "11ng-ht40"; 2643 case MODE_11AC_VHT20: 2644 return "11ac-vht20"; 2645 case MODE_11AC_VHT40: 2646 return "11ac-vht40"; 2647 case MODE_11AC_VHT80: 2648 return "11ac-vht80"; 2649 case MODE_11AC_VHT160: 2650 return "11ac-vht160"; 2651 case MODE_11AC_VHT80_80: 2652 return "11ac-vht80+80"; 2653 case MODE_11AC_VHT20_2G: 2654 return "11ac-vht20-2g"; 2655 case MODE_11AC_VHT40_2G: 2656 return "11ac-vht40-2g"; 2657 case MODE_11AC_VHT80_2G: 2658 return "11ac-vht80-2g"; 2659 case MODE_11AX_HE20: 2660 return "11ax-he20"; 2661 case MODE_11AX_HE40: 2662 return "11ax-he40"; 2663 case MODE_11AX_HE80: 2664 return "11ax-he80"; 2665 case MODE_11AX_HE80_80: 2666 return "11ax-he80+80"; 2667 case MODE_11AX_HE160: 2668 return "11ax-he160"; 2669 case MODE_11AX_HE20_2G: 2670 return "11ax-he20-2g"; 2671 case MODE_11AX_HE40_2G: 2672 return "11ax-he40-2g"; 2673 case MODE_11AX_HE80_2G: 2674 return "11ax-he80-2g"; 2675 case MODE_UNKNOWN: 2676 /* skip */ 2677 break; 2678 2679 /* no default handler to allow compiler to check that the 2680 * enum is fully handled 2681 */ 2682 } 2683 2684 return "<unknown>"; 2685 } 2686 2687 struct wmi_channel_arg { 2688 u32 freq; 2689 u32 band_center_freq1; 2690 u32 band_center_freq2; 2691 bool passive; 2692 bool allow_ibss; 2693 bool allow_ht; 2694 bool allow_vht; 2695 bool ht40plus; 2696 bool chan_radar; 2697 bool freq2_radar; 2698 bool allow_he; 2699 u32 min_power; 2700 u32 max_power; 2701 u32 max_reg_power; 2702 u32 max_antenna_gain; 2703 enum wmi_phy_mode mode; 2704 }; 2705 2706 struct wmi_vdev_start_req_arg { 2707 u32 vdev_id; 2708 struct wmi_channel_arg channel; 2709 u32 bcn_intval; 2710 u32 dtim_period; 2711 u8 *ssid; 2712 u32 ssid_len; 2713 u32 bcn_tx_rate; 2714 u32 bcn_tx_power; 2715 bool disable_hw_ack; 2716 bool hidden_ssid; 2717 bool pmf_enabled; 2718 u32 he_ops; 2719 u32 cac_duration_ms; 2720 u32 regdomain; 2721 u32 pref_rx_streams; 2722 u32 pref_tx_streams; 2723 u32 num_noa_descriptors; 2724 }; 2725 2726 struct peer_create_params { 2727 const u8 *peer_addr; 2728 u32 peer_type; 2729 u32 vdev_id; 2730 }; 2731 2732 struct peer_delete_params { 2733 u8 vdev_id; 2734 }; 2735 2736 struct peer_flush_params { 2737 u32 peer_tid_bitmap; 2738 u8 vdev_id; 2739 }; 2740 2741 struct pdev_set_regdomain_params { 2742 u16 current_rd_in_use; 2743 u16 current_rd_2g; 2744 u16 current_rd_5g; 2745 u32 ctl_2g; 2746 u32 ctl_5g; 2747 u8 dfs_domain; 2748 u32 pdev_id; 2749 }; 2750 2751 struct rx_reorder_queue_remove_params { 2752 u8 *peer_macaddr; 2753 u16 vdev_id; 2754 u32 peer_tid_bitmap; 2755 }; 2756 2757 #define WMI_HOST_PDEV_ID_SOC 0xFF 2758 #define WMI_HOST_PDEV_ID_0 0 2759 #define WMI_HOST_PDEV_ID_1 1 2760 #define WMI_HOST_PDEV_ID_2 2 2761 2762 #define WMI_PDEV_ID_SOC 0 2763 #define WMI_PDEV_ID_1ST 1 2764 #define WMI_PDEV_ID_2ND 2 2765 #define WMI_PDEV_ID_3RD 3 2766 2767 /* Freq units in MHz */ 2768 #define REG_RULE_START_FREQ 0x0000ffff 2769 #define REG_RULE_END_FREQ 0xffff0000 2770 #define REG_RULE_FLAGS 0x0000ffff 2771 #define REG_RULE_MAX_BW 0x0000ffff 2772 #define REG_RULE_REG_PWR 0x00ff0000 2773 #define REG_RULE_ANT_GAIN 0xff000000 2774 2775 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 2776 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 2777 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 2778 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 2779 2780 #define HECAP_PHYDWORD_0 0 2781 #define HECAP_PHYDWORD_1 1 2782 #define HECAP_PHYDWORD_2 2 2783 2784 #define HECAP_PHY_SU_BFER BIT(31) 2785 #define HECAP_PHY_SU_BFEE BIT(0) 2786 #define HECAP_PHY_MU_BFER BIT(1) 2787 #define HECAP_PHY_UL_MUMIMO BIT(22) 2788 #define HECAP_PHY_UL_MUOFDMA BIT(23) 2789 2790 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \ 2791 FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0]) 2792 2793 #define HECAP_PHY_SUBFME_GET(hecap_phy) \ 2794 FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1]) 2795 2796 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \ 2797 FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1]) 2798 2799 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \ 2800 FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0]) 2801 2802 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \ 2803 FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0]) 2804 2805 #define HE_MODE_SU_TX_BFEE BIT(0) 2806 #define HE_MODE_SU_TX_BFER BIT(1) 2807 #define HE_MODE_MU_TX_BFEE BIT(2) 2808 #define HE_MODE_MU_TX_BFER BIT(3) 2809 #define HE_MODE_DL_OFDMA BIT(4) 2810 #define HE_MODE_UL_OFDMA BIT(5) 2811 #define HE_MODE_UL_MUMIMO BIT(6) 2812 2813 #define HE_DL_MUOFDMA_ENABLE 1 2814 #define HE_UL_MUOFDMA_ENABLE 1 2815 #define HE_DL_MUMIMO_ENABLE 1 2816 #define HE_MU_BFEE_ENABLE 1 2817 #define HE_SU_BFEE_ENABLE 1 2818 2819 #define HE_VHT_SOUNDING_MODE_ENABLE 1 2820 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1 2821 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1 2822 2823 /* HE or VHT Sounding */ 2824 #define HE_VHT_SOUNDING_MODE BIT(0) 2825 /* SU or MU Sounding */ 2826 #define HE_SU_MU_SOUNDING_MODE BIT(2) 2827 /* Trig or Non-Trig Sounding */ 2828 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3) 2829 2830 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 2831 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 2832 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 2833 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700 2834 2835 struct pdev_params { 2836 u32 param_id; 2837 u32 param_value; 2838 }; 2839 2840 enum wmi_peer_type { 2841 WMI_PEER_TYPE_DEFAULT = 0, 2842 WMI_PEER_TYPE_BSS = 1, 2843 WMI_PEER_TYPE_TDLS = 2, 2844 }; 2845 2846 struct wmi_peer_create_cmd { 2847 u32 tlv_header; 2848 u32 vdev_id; 2849 struct wmi_mac_addr peer_macaddr; 2850 u32 peer_type; 2851 } __packed; 2852 2853 struct wmi_peer_delete_cmd { 2854 u32 tlv_header; 2855 u32 vdev_id; 2856 struct wmi_mac_addr peer_macaddr; 2857 } __packed; 2858 2859 struct wmi_peer_reorder_queue_setup_cmd { 2860 u32 tlv_header; 2861 u32 vdev_id; 2862 struct wmi_mac_addr peer_macaddr; 2863 u32 tid; 2864 u32 queue_ptr_lo; 2865 u32 queue_ptr_hi; 2866 u32 queue_no; 2867 u32 ba_window_size_valid; 2868 u32 ba_window_size; 2869 } __packed; 2870 2871 struct wmi_peer_reorder_queue_remove_cmd { 2872 u32 tlv_header; 2873 u32 vdev_id; 2874 struct wmi_mac_addr peer_macaddr; 2875 u32 tid_mask; 2876 } __packed; 2877 2878 struct gpio_config_params { 2879 u32 gpio_num; 2880 u32 input; 2881 u32 pull_type; 2882 u32 intr_mode; 2883 }; 2884 2885 enum wmi_gpio_type { 2886 WMI_GPIO_PULL_NONE, 2887 WMI_GPIO_PULL_UP, 2888 WMI_GPIO_PULL_DOWN 2889 }; 2890 2891 enum wmi_gpio_intr_type { 2892 WMI_GPIO_INTTYPE_DISABLE, 2893 WMI_GPIO_INTTYPE_RISING_EDGE, 2894 WMI_GPIO_INTTYPE_FALLING_EDGE, 2895 WMI_GPIO_INTTYPE_BOTH_EDGE, 2896 WMI_GPIO_INTTYPE_LEVEL_LOW, 2897 WMI_GPIO_INTTYPE_LEVEL_HIGH 2898 }; 2899 2900 enum wmi_bss_chan_info_req_type { 2901 WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 2902 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 2903 }; 2904 2905 struct wmi_gpio_config_cmd_param { 2906 u32 tlv_header; 2907 u32 gpio_num; 2908 u32 input; 2909 u32 pull_type; 2910 u32 intr_mode; 2911 }; 2912 2913 struct gpio_output_params { 2914 u32 gpio_num; 2915 u32 set; 2916 }; 2917 2918 struct wmi_gpio_output_cmd_param { 2919 u32 tlv_header; 2920 u32 gpio_num; 2921 u32 set; 2922 }; 2923 2924 struct set_fwtest_params { 2925 u32 arg; 2926 u32 value; 2927 }; 2928 2929 struct wmi_fwtest_set_param_cmd_param { 2930 u32 tlv_header; 2931 u32 param_id; 2932 u32 param_value; 2933 }; 2934 2935 struct wmi_pdev_set_param_cmd { 2936 u32 tlv_header; 2937 u32 pdev_id; 2938 u32 param_id; 2939 u32 param_value; 2940 } __packed; 2941 2942 struct wmi_pdev_set_ps_mode_cmd { 2943 u32 tlv_header; 2944 u32 vdev_id; 2945 u32 sta_ps_mode; 2946 } __packed; 2947 2948 struct wmi_pdev_suspend_cmd { 2949 u32 tlv_header; 2950 u32 pdev_id; 2951 u32 suspend_opt; 2952 } __packed; 2953 2954 struct wmi_pdev_resume_cmd { 2955 u32 tlv_header; 2956 u32 pdev_id; 2957 } __packed; 2958 2959 struct wmi_pdev_bss_chan_info_req_cmd { 2960 u32 tlv_header; 2961 /* ref wmi_bss_chan_info_req_type */ 2962 u32 req_type; 2963 } __packed; 2964 2965 struct wmi_ap_ps_peer_cmd { 2966 u32 tlv_header; 2967 u32 vdev_id; 2968 struct wmi_mac_addr peer_macaddr; 2969 u32 param; 2970 u32 value; 2971 } __packed; 2972 2973 struct wmi_sta_powersave_param_cmd { 2974 u32 tlv_header; 2975 u32 vdev_id; 2976 u32 param; 2977 u32 value; 2978 } __packed; 2979 2980 struct wmi_pdev_set_regdomain_cmd { 2981 u32 tlv_header; 2982 u32 pdev_id; 2983 u32 reg_domain; 2984 u32 reg_domain_2g; 2985 u32 reg_domain_5g; 2986 u32 conformance_test_limit_2g; 2987 u32 conformance_test_limit_5g; 2988 u32 dfs_domain; 2989 } __packed; 2990 2991 struct wmi_peer_set_param_cmd { 2992 u32 tlv_header; 2993 u32 vdev_id; 2994 struct wmi_mac_addr peer_macaddr; 2995 u32 param_id; 2996 u32 param_value; 2997 } __packed; 2998 2999 struct wmi_peer_flush_tids_cmd { 3000 u32 tlv_header; 3001 u32 vdev_id; 3002 struct wmi_mac_addr peer_macaddr; 3003 u32 peer_tid_bitmap; 3004 } __packed; 3005 3006 struct wmi_dfs_phyerr_offload_cmd { 3007 u32 tlv_header; 3008 u32 pdev_id; 3009 } __packed; 3010 3011 struct wmi_bcn_offload_ctrl_cmd { 3012 u32 tlv_header; 3013 u32 vdev_id; 3014 u32 bcn_ctrl_op; 3015 } __packed; 3016 3017 enum scan_dwelltime_adaptive_mode { 3018 SCAN_DWELL_MODE_DEFAULT = 0, 3019 SCAN_DWELL_MODE_CONSERVATIVE = 1, 3020 SCAN_DWELL_MODE_MODERATE = 2, 3021 SCAN_DWELL_MODE_AGGRESSIVE = 3, 3022 SCAN_DWELL_MODE_STATIC = 4 3023 }; 3024 3025 #define WLAN_SCAN_MAX_NUM_SSID 10 3026 #define WLAN_SCAN_MAX_NUM_BSSID 10 3027 #define WLAN_SCAN_MAX_NUM_CHANNELS 40 3028 3029 #define WLAN_SSID_MAX_LEN 32 3030 3031 struct element_info { 3032 u32 len; 3033 u8 *ptr; 3034 }; 3035 3036 struct wlan_ssid { 3037 u8 length; 3038 u8 ssid[WLAN_SSID_MAX_LEN]; 3039 }; 3040 3041 #define WMI_IE_BITMAP_SIZE 8 3042 3043 #define WMI_SCAN_MAX_NUM_SSID 0x0A 3044 /* prefix used by scan requestor ids on the host */ 3045 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 3046 3047 /* prefix used by scan request ids generated on the host */ 3048 /* host cycles through the lower 12 bits to generate ids */ 3049 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 3050 3051 #define WLAN_SCAN_PARAMS_MAX_SSID 16 3052 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 3053 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 3054 3055 /* Values lower than this may be refused by some firmware revisions with a scan 3056 * completion with a timedout reason. 3057 */ 3058 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 3059 3060 /* Scan priority numbers must be sequential, starting with 0 */ 3061 enum wmi_scan_priority { 3062 WMI_SCAN_PRIORITY_VERY_LOW = 0, 3063 WMI_SCAN_PRIORITY_LOW, 3064 WMI_SCAN_PRIORITY_MEDIUM, 3065 WMI_SCAN_PRIORITY_HIGH, 3066 WMI_SCAN_PRIORITY_VERY_HIGH, 3067 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 3068 }; 3069 3070 enum wmi_scan_event_type { 3071 WMI_SCAN_EVENT_STARTED = BIT(0), 3072 WMI_SCAN_EVENT_COMPLETED = BIT(1), 3073 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 3074 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3), 3075 WMI_SCAN_EVENT_DEQUEUED = BIT(4), 3076 /* possibly by high-prio scan */ 3077 WMI_SCAN_EVENT_PREEMPTED = BIT(5), 3078 WMI_SCAN_EVENT_START_FAILED = BIT(6), 3079 WMI_SCAN_EVENT_RESTARTED = BIT(7), 3080 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8), 3081 WMI_SCAN_EVENT_SUSPENDED = BIT(9), 3082 WMI_SCAN_EVENT_RESUMED = BIT(10), 3083 WMI_SCAN_EVENT_MAX = BIT(15), 3084 }; 3085 3086 enum wmi_scan_completion_reason { 3087 WMI_SCAN_REASON_COMPLETED, 3088 WMI_SCAN_REASON_CANCELLED, 3089 WMI_SCAN_REASON_PREEMPTED, 3090 WMI_SCAN_REASON_TIMEDOUT, 3091 WMI_SCAN_REASON_INTERNAL_FAILURE, 3092 WMI_SCAN_REASON_MAX, 3093 }; 3094 3095 struct wmi_start_scan_cmd { 3096 u32 tlv_header; 3097 u32 scan_id; 3098 u32 scan_req_id; 3099 u32 vdev_id; 3100 u32 scan_priority; 3101 u32 notify_scan_events; 3102 u32 dwell_time_active; 3103 u32 dwell_time_passive; 3104 u32 min_rest_time; 3105 u32 max_rest_time; 3106 u32 repeat_probe_time; 3107 u32 probe_spacing_time; 3108 u32 idle_time; 3109 u32 max_scan_time; 3110 u32 probe_delay; 3111 u32 scan_ctrl_flags; 3112 u32 burst_duration; 3113 u32 num_chan; 3114 u32 num_bssid; 3115 u32 num_ssids; 3116 u32 ie_len; 3117 u32 n_probes; 3118 struct wmi_mac_addr mac_addr; 3119 struct wmi_mac_addr mac_mask; 3120 u32 ie_bitmap[WMI_IE_BITMAP_SIZE]; 3121 u32 num_vendor_oui; 3122 u32 scan_ctrl_flags_ext; 3123 u32 dwell_time_active_2g; 3124 u32 dwell_time_active_6g; 3125 u32 dwell_time_passive_6g; 3126 u32 scan_start_offset; 3127 } __packed; 3128 3129 #define WMI_SCAN_FLAG_PASSIVE 0x1 3130 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 3131 #define WMI_SCAN_ADD_CCK_RATES 0x4 3132 #define WMI_SCAN_ADD_OFDM_RATES 0x8 3133 #define WMI_SCAN_CHAN_STAT_EVENT 0x10 3134 #define WMI_SCAN_FILTER_PROBE_REQ 0x20 3135 #define WMI_SCAN_BYPASS_DFS_CHN 0x40 3136 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 3137 #define WMI_SCAN_FILTER_PROMISCUOS 0x100 3138 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200 3139 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400 3140 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800 3141 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000 3142 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000 3143 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000 3144 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000 3145 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000 3146 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000 3147 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 3148 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 3149 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 3150 3151 #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000 3152 #define WMI_SCAN_DWELL_MODE_SHIFT 21 3153 3154 enum { 3155 WMI_SCAN_DWELL_MODE_DEFAULT = 0, 3156 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1, 3157 WMI_SCAN_DWELL_MODE_MODERATE = 2, 3158 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3, 3159 WMI_SCAN_DWELL_MODE_STATIC = 4, 3160 }; 3161 3162 #define WMI_SCAN_SET_DWELL_MODE(flag, mode) \ 3163 ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \ 3164 WMI_SCAN_DWELL_MODE_MASK)) 3165 3166 struct hint_short_ssid { 3167 u32 freq_flags; 3168 u32 short_ssid; 3169 }; 3170 3171 struct hint_bssid { 3172 u32 freq_flags; 3173 struct wmi_mac_addr bssid; 3174 }; 3175 3176 struct scan_req_params { 3177 u32 scan_id; 3178 u32 scan_req_id; 3179 u32 vdev_id; 3180 u32 pdev_id; 3181 enum wmi_scan_priority scan_priority; 3182 union { 3183 struct { 3184 u32 scan_ev_started:1, 3185 scan_ev_completed:1, 3186 scan_ev_bss_chan:1, 3187 scan_ev_foreign_chan:1, 3188 scan_ev_dequeued:1, 3189 scan_ev_preempted:1, 3190 scan_ev_start_failed:1, 3191 scan_ev_restarted:1, 3192 scan_ev_foreign_chn_exit:1, 3193 scan_ev_invalid:1, 3194 scan_ev_gpio_timeout:1, 3195 scan_ev_suspended:1, 3196 scan_ev_resumed:1; 3197 }; 3198 u32 scan_events; 3199 }; 3200 u32 dwell_time_active; 3201 u32 dwell_time_active_2g; 3202 u32 dwell_time_passive; 3203 u32 dwell_time_active_6g; 3204 u32 dwell_time_passive_6g; 3205 u32 min_rest_time; 3206 u32 max_rest_time; 3207 u32 repeat_probe_time; 3208 u32 probe_spacing_time; 3209 u32 idle_time; 3210 u32 max_scan_time; 3211 u32 probe_delay; 3212 union { 3213 struct { 3214 u32 scan_f_passive:1, 3215 scan_f_bcast_probe:1, 3216 scan_f_cck_rates:1, 3217 scan_f_ofdm_rates:1, 3218 scan_f_chan_stat_evnt:1, 3219 scan_f_filter_prb_req:1, 3220 scan_f_bypass_dfs_chn:1, 3221 scan_f_continue_on_err:1, 3222 scan_f_offchan_mgmt_tx:1, 3223 scan_f_offchan_data_tx:1, 3224 scan_f_promisc_mode:1, 3225 scan_f_capture_phy_err:1, 3226 scan_f_strict_passive_pch:1, 3227 scan_f_half_rate:1, 3228 scan_f_quarter_rate:1, 3229 scan_f_force_active_dfs_chn:1, 3230 scan_f_add_tpc_ie_in_probe:1, 3231 scan_f_add_ds_ie_in_probe:1, 3232 scan_f_add_spoofed_mac_in_probe:1, 3233 scan_f_add_rand_seq_in_probe:1, 3234 scan_f_en_ie_whitelist_in_probe:1, 3235 scan_f_forced:1, 3236 scan_f_2ghz:1, 3237 scan_f_5ghz:1, 3238 scan_f_80mhz:1; 3239 }; 3240 u32 scan_flags; 3241 }; 3242 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode; 3243 u32 burst_duration; 3244 u32 num_chan; 3245 u32 num_bssid; 3246 u32 num_ssids; 3247 u32 n_probes; 3248 u32 chan_list[WLAN_SCAN_MAX_NUM_CHANNELS]; 3249 u32 notify_scan_events; 3250 struct wlan_ssid ssid[WLAN_SCAN_MAX_NUM_SSID]; 3251 struct wmi_mac_addr bssid_list[WLAN_SCAN_MAX_NUM_BSSID]; 3252 struct element_info extraie; 3253 struct element_info htcap; 3254 struct element_info vhtcap; 3255 u32 num_hint_s_ssid; 3256 u32 num_hint_bssid; 3257 struct hint_short_ssid hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID]; 3258 struct hint_bssid hint_bssid[WLAN_SCAN_MAX_HINT_BSSID]; 3259 }; 3260 3261 struct wmi_ssid_arg { 3262 int len; 3263 const u8 *ssid; 3264 }; 3265 3266 struct wmi_bssid_arg { 3267 const u8 *bssid; 3268 }; 3269 3270 struct wmi_start_scan_arg { 3271 u32 scan_id; 3272 u32 scan_req_id; 3273 u32 vdev_id; 3274 u32 scan_priority; 3275 u32 notify_scan_events; 3276 u32 dwell_time_active; 3277 u32 dwell_time_passive; 3278 u32 min_rest_time; 3279 u32 max_rest_time; 3280 u32 repeat_probe_time; 3281 u32 probe_spacing_time; 3282 u32 idle_time; 3283 u32 max_scan_time; 3284 u32 probe_delay; 3285 u32 scan_ctrl_flags; 3286 3287 u32 ie_len; 3288 u32 n_channels; 3289 u32 n_ssids; 3290 u32 n_bssids; 3291 3292 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN]; 3293 u32 channels[64]; 3294 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID]; 3295 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID]; 3296 }; 3297 3298 #define WMI_SCAN_STOP_ONE 0x00000000 3299 #define WMI_SCN_STOP_VAP_ALL 0x01000000 3300 #define WMI_SCAN_STOP_ALL 0x04000000 3301 3302 /* Prefix 0xA000 indicates that the scan request 3303 * is trigger by HOST 3304 */ 3305 #define ATH11K_SCAN_ID 0xA000 3306 3307 enum scan_cancel_req_type { 3308 WLAN_SCAN_CANCEL_SINGLE = 1, 3309 WLAN_SCAN_CANCEL_VDEV_ALL, 3310 WLAN_SCAN_CANCEL_PDEV_ALL, 3311 }; 3312 3313 struct scan_cancel_param { 3314 u32 requester; 3315 u32 scan_id; 3316 enum scan_cancel_req_type req_type; 3317 u32 vdev_id; 3318 u32 pdev_id; 3319 }; 3320 3321 struct wmi_bcn_send_from_host_cmd { 3322 u32 tlv_header; 3323 u32 vdev_id; 3324 u32 data_len; 3325 union { 3326 u32 frag_ptr; 3327 u32 frag_ptr_lo; 3328 }; 3329 u32 frame_ctrl; 3330 u32 dtim_flag; 3331 u32 bcn_antenna; 3332 u32 frag_ptr_hi; 3333 }; 3334 3335 #define WMI_CHAN_INFO_MODE GENMASK(5, 0) 3336 #define WMI_CHAN_INFO_HT40_PLUS BIT(6) 3337 #define WMI_CHAN_INFO_PASSIVE BIT(7) 3338 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8) 3339 #define WMI_CHAN_INFO_AP_DISABLED BIT(9) 3340 #define WMI_CHAN_INFO_DFS BIT(10) 3341 #define WMI_CHAN_INFO_ALLOW_HT BIT(11) 3342 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12) 3343 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13) 3344 #define WMI_CHAN_INFO_HALF_RATE BIT(14) 3345 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15) 3346 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) 3347 #define WMI_CHAN_INFO_ALLOW_HE BIT(17) 3348 #define WMI_CHAN_INFO_PSC BIT(18) 3349 3350 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) 3351 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) 3352 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16) 3353 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24) 3354 3355 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0) 3356 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8) 3357 3358 struct wmi_channel { 3359 u32 tlv_header; 3360 u32 mhz; 3361 u32 band_center_freq1; 3362 u32 band_center_freq2; 3363 u32 info; 3364 u32 reg_info_1; 3365 u32 reg_info_2; 3366 } __packed; 3367 3368 struct wmi_mgmt_params { 3369 void *tx_frame; 3370 u16 frm_len; 3371 u8 vdev_id; 3372 u16 chanfreq; 3373 void *pdata; 3374 u16 desc_id; 3375 u8 *macaddr; 3376 }; 3377 3378 enum wmi_sta_ps_mode { 3379 WMI_STA_PS_MODE_DISABLED = 0, 3380 WMI_STA_PS_MODE_ENABLED = 1, 3381 }; 3382 3383 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF 3384 #define WMI_SMPS_MASK_UPPER_3BITS 0x7 3385 #define WMI_SMPS_PARAM_VALUE_SHIFT 29 3386 3387 #define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1 3388 #define ATH11K_WMI_FW_HANG_DELAY 0 3389 3390 /* type, 0:unused 1: ASSERT 2: not respond detect command 3391 * delay_time_ms, the simulate will delay time 3392 */ 3393 3394 struct wmi_force_fw_hang_cmd { 3395 u32 tlv_header; 3396 u32 type; 3397 u32 delay_time_ms; 3398 }; 3399 3400 struct wmi_vdev_set_param_cmd { 3401 u32 tlv_header; 3402 u32 vdev_id; 3403 u32 param_id; 3404 u32 param_value; 3405 } __packed; 3406 3407 enum wmi_stats_id { 3408 WMI_REQUEST_PEER_STAT = BIT(0), 3409 WMI_REQUEST_AP_STAT = BIT(1), 3410 WMI_REQUEST_PDEV_STAT = BIT(2), 3411 WMI_REQUEST_VDEV_STAT = BIT(3), 3412 WMI_REQUEST_BCNFLT_STAT = BIT(4), 3413 WMI_REQUEST_VDEV_RATE_STAT = BIT(5), 3414 WMI_REQUEST_INST_STAT = BIT(6), 3415 WMI_REQUEST_MIB_STAT = BIT(7), 3416 WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8), 3417 WMI_REQUEST_CONGESTION_STAT = BIT(9), 3418 WMI_REQUEST_PEER_EXTD_STAT = BIT(10), 3419 WMI_REQUEST_BCN_STAT = BIT(11), 3420 WMI_REQUEST_BCN_STAT_RESET = BIT(12), 3421 WMI_REQUEST_PEER_EXTD2_STAT = BIT(13), 3422 }; 3423 3424 struct wmi_request_stats_cmd { 3425 u32 tlv_header; 3426 enum wmi_stats_id stats_id; 3427 u32 vdev_id; 3428 struct wmi_mac_addr peer_macaddr; 3429 u32 pdev_id; 3430 } __packed; 3431 3432 struct wmi_get_pdev_temperature_cmd { 3433 u32 tlv_header; 3434 u32 param; 3435 u32 pdev_id; 3436 } __packed; 3437 3438 #define WMI_BEACON_TX_BUFFER_SIZE 512 3439 3440 struct wmi_bcn_tmpl_cmd { 3441 u32 tlv_header; 3442 u32 vdev_id; 3443 u32 tim_ie_offset; 3444 u32 buf_len; 3445 u32 csa_switch_count_offset; 3446 u32 ext_csa_switch_count_offset; 3447 u32 csa_event_bitmap; 3448 u32 mbssid_ie_offset; 3449 u32 esp_ie_offset; 3450 } __packed; 3451 3452 struct wmi_key_seq_counter { 3453 u32 key_seq_counter_l; 3454 u32 key_seq_counter_h; 3455 } __packed; 3456 3457 struct wmi_vdev_install_key_cmd { 3458 u32 tlv_header; 3459 u32 vdev_id; 3460 struct wmi_mac_addr peer_macaddr; 3461 u32 key_idx; 3462 u32 key_flags; 3463 u32 key_cipher; 3464 struct wmi_key_seq_counter key_rsc_counter; 3465 struct wmi_key_seq_counter key_global_rsc_counter; 3466 struct wmi_key_seq_counter key_tsc_counter; 3467 u8 wpi_key_rsc_counter[16]; 3468 u8 wpi_key_tsc_counter[16]; 3469 u32 key_len; 3470 u32 key_txmic_len; 3471 u32 key_rxmic_len; 3472 u32 is_group_key_id_valid; 3473 u32 group_key_id; 3474 3475 /* Followed by key_data containing key followed by 3476 * tx mic and then rx mic 3477 */ 3478 } __packed; 3479 3480 struct wmi_vdev_install_key_arg { 3481 u32 vdev_id; 3482 const u8 *macaddr; 3483 u32 key_idx; 3484 u32 key_flags; 3485 u32 key_cipher; 3486 u32 key_len; 3487 u32 key_txmic_len; 3488 u32 key_rxmic_len; 3489 u64 key_rsc_counter; 3490 const void *key_data; 3491 }; 3492 3493 #define WMI_MAX_SUPPORTED_RATES 128 3494 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3 3495 #define WMI_HOST_MAX_HE_RATE_SET 3 3496 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0 3497 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1 3498 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2 3499 3500 struct wmi_rate_set_arg { 3501 u32 num_rates; 3502 u8 rates[WMI_MAX_SUPPORTED_RATES]; 3503 }; 3504 3505 struct peer_assoc_params { 3506 struct wmi_mac_addr peer_macaddr; 3507 u32 vdev_id; 3508 u32 peer_new_assoc; 3509 u32 peer_associd; 3510 u32 peer_flags; 3511 u32 peer_caps; 3512 u32 peer_listen_intval; 3513 u32 peer_ht_caps; 3514 u32 peer_max_mpdu; 3515 u32 peer_mpdu_density; 3516 u32 peer_rate_caps; 3517 u32 peer_nss; 3518 u32 peer_vht_caps; 3519 u32 peer_phymode; 3520 u32 peer_ht_info[2]; 3521 struct wmi_rate_set_arg peer_legacy_rates; 3522 struct wmi_rate_set_arg peer_ht_rates; 3523 u32 rx_max_rate; 3524 u32 rx_mcs_set; 3525 u32 tx_max_rate; 3526 u32 tx_mcs_set; 3527 u8 vht_capable; 3528 u8 min_data_rate; 3529 u32 tx_max_mcs_nss; 3530 u32 peer_bw_rxnss_override; 3531 bool is_pmf_enabled; 3532 bool is_wme_set; 3533 bool qos_flag; 3534 bool apsd_flag; 3535 bool ht_flag; 3536 bool bw_40; 3537 bool bw_80; 3538 bool bw_160; 3539 bool stbc_flag; 3540 bool ldpc_flag; 3541 bool static_mimops_flag; 3542 bool dynamic_mimops_flag; 3543 bool spatial_mux_flag; 3544 bool vht_flag; 3545 bool vht_ng_flag; 3546 bool need_ptk_4_way; 3547 bool need_gtk_2_way; 3548 bool auth_flag; 3549 bool safe_mode_enabled; 3550 bool amsdu_disable; 3551 /* Use common structure */ 3552 u8 peer_mac[ETH_ALEN]; 3553 3554 bool he_flag; 3555 u32 peer_he_cap_macinfo[2]; 3556 u32 peer_he_cap_macinfo_internal; 3557 u32 peer_he_caps_6ghz; 3558 u32 peer_he_ops; 3559 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; 3560 u32 peer_he_mcs_count; 3561 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3562 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3563 bool twt_responder; 3564 bool twt_requester; 3565 struct ath11k_ppe_threshold peer_ppet; 3566 }; 3567 3568 struct wmi_peer_assoc_complete_cmd { 3569 u32 tlv_header; 3570 struct wmi_mac_addr peer_macaddr; 3571 u32 vdev_id; 3572 u32 peer_new_assoc; 3573 u32 peer_associd; 3574 u32 peer_flags; 3575 u32 peer_caps; 3576 u32 peer_listen_intval; 3577 u32 peer_ht_caps; 3578 u32 peer_max_mpdu; 3579 u32 peer_mpdu_density; 3580 u32 peer_rate_caps; 3581 u32 peer_nss; 3582 u32 peer_vht_caps; 3583 u32 peer_phymode; 3584 u32 peer_ht_info[2]; 3585 u32 num_peer_legacy_rates; 3586 u32 num_peer_ht_rates; 3587 u32 peer_bw_rxnss_override; 3588 struct wmi_ppe_threshold peer_ppet; 3589 u32 peer_he_cap_info; 3590 u32 peer_he_ops; 3591 u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE]; 3592 u32 peer_he_mcs; 3593 u32 peer_he_cap_info_ext; 3594 u32 peer_he_cap_info_internal; 3595 u32 min_data_rate; 3596 u32 peer_he_caps_6ghz; 3597 } __packed; 3598 3599 struct wmi_stop_scan_cmd { 3600 u32 tlv_header; 3601 u32 requestor; 3602 u32 scan_id; 3603 u32 req_type; 3604 u32 vdev_id; 3605 u32 pdev_id; 3606 }; 3607 3608 struct scan_chan_list_params { 3609 u32 pdev_id; 3610 u16 nallchans; 3611 struct channel_param ch_param[1]; 3612 }; 3613 3614 struct wmi_scan_chan_list_cmd { 3615 u32 tlv_header; 3616 u32 num_scan_chans; 3617 u32 flags; 3618 u32 pdev_id; 3619 } __packed; 3620 3621 #define WMI_MGMT_SEND_DOWNLD_LEN 64 3622 3623 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0) 3624 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8) 3625 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20) 3626 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28) 3627 3628 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0) 3629 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8) 3630 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15) 3631 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20) 3632 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21) 3633 3634 struct wmi_mgmt_send_params { 3635 u32 tlv_header; 3636 u32 tx_params_dword0; 3637 u32 tx_params_dword1; 3638 }; 3639 3640 struct wmi_mgmt_send_cmd { 3641 u32 tlv_header; 3642 u32 vdev_id; 3643 u32 desc_id; 3644 u32 chanfreq; 3645 u32 paddr_lo; 3646 u32 paddr_hi; 3647 u32 frame_len; 3648 u32 buf_len; 3649 u32 tx_params_valid; 3650 3651 /* This TLV is followed by struct wmi_mgmt_frame */ 3652 3653 /* Followed by struct wmi_mgmt_send_params */ 3654 } __packed; 3655 3656 struct wmi_sta_powersave_mode_cmd { 3657 u32 tlv_header; 3658 u32 vdev_id; 3659 u32 sta_ps_mode; 3660 }; 3661 3662 struct wmi_sta_smps_force_mode_cmd { 3663 u32 tlv_header; 3664 u32 vdev_id; 3665 u32 forced_mode; 3666 }; 3667 3668 struct wmi_sta_smps_param_cmd { 3669 u32 tlv_header; 3670 u32 vdev_id; 3671 u32 param; 3672 u32 value; 3673 }; 3674 3675 struct wmi_bcn_prb_info { 3676 u32 tlv_header; 3677 u32 caps; 3678 u32 erp; 3679 } __packed; 3680 3681 enum { 3682 WMI_PDEV_SUSPEND, 3683 WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 3684 }; 3685 3686 struct green_ap_ps_params { 3687 u32 value; 3688 }; 3689 3690 struct wmi_pdev_green_ap_ps_enable_cmd_param { 3691 u32 tlv_header; 3692 u32 pdev_id; 3693 u32 enable; 3694 }; 3695 3696 struct ap_ps_params { 3697 u32 vdev_id; 3698 u32 param; 3699 u32 value; 3700 }; 3701 3702 struct vdev_set_params { 3703 u32 if_id; 3704 u32 param_id; 3705 u32 param_value; 3706 }; 3707 3708 struct stats_request_params { 3709 u32 stats_id; 3710 u32 vdev_id; 3711 u32 pdev_id; 3712 }; 3713 3714 enum set_init_cc_type { 3715 WMI_COUNTRY_INFO_TYPE_ALPHA, 3716 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE, 3717 WMI_COUNTRY_INFO_TYPE_REGDOMAIN, 3718 }; 3719 3720 enum set_init_cc_flags { 3721 INVALID_CC, 3722 CC_IS_SET, 3723 REGDMN_IS_SET, 3724 ALPHA_IS_SET, 3725 }; 3726 3727 struct wmi_init_country_params { 3728 union { 3729 u16 country_code; 3730 u16 regdom_id; 3731 u8 alpha2[3]; 3732 } cc_info; 3733 enum set_init_cc_flags flags; 3734 }; 3735 3736 struct wmi_init_country_cmd { 3737 u32 tlv_header; 3738 u32 pdev_id; 3739 u32 init_cc_type; 3740 union { 3741 u32 country_code; 3742 u32 regdom_id; 3743 u32 alpha2; 3744 } cc_info; 3745 } __packed; 3746 3747 #define THERMAL_LEVELS 1 3748 struct tt_level_config { 3749 u32 tmplwm; 3750 u32 tmphwm; 3751 u32 dcoffpercent; 3752 u32 priority; 3753 }; 3754 3755 struct thermal_mitigation_params { 3756 u32 pdev_id; 3757 u32 enable; 3758 u32 dc; 3759 u32 dc_per_event; 3760 struct tt_level_config levelconf[THERMAL_LEVELS]; 3761 }; 3762 3763 struct wmi_therm_throt_config_request_cmd { 3764 u32 tlv_header; 3765 u32 pdev_id; 3766 u32 enable; 3767 u32 dc; 3768 u32 dc_per_event; 3769 u32 therm_throt_levels; 3770 } __packed; 3771 3772 struct wmi_therm_throt_level_config_info { 3773 u32 tlv_header; 3774 u32 temp_lwm; 3775 u32 temp_hwm; 3776 u32 dc_off_percent; 3777 u32 prio; 3778 } __packed; 3779 3780 struct wmi_delba_send_cmd { 3781 u32 tlv_header; 3782 u32 vdev_id; 3783 struct wmi_mac_addr peer_macaddr; 3784 u32 tid; 3785 u32 initiator; 3786 u32 reasoncode; 3787 } __packed; 3788 3789 struct wmi_addba_setresponse_cmd { 3790 u32 tlv_header; 3791 u32 vdev_id; 3792 struct wmi_mac_addr peer_macaddr; 3793 u32 tid; 3794 u32 statuscode; 3795 } __packed; 3796 3797 struct wmi_addba_send_cmd { 3798 u32 tlv_header; 3799 u32 vdev_id; 3800 struct wmi_mac_addr peer_macaddr; 3801 u32 tid; 3802 u32 buffersize; 3803 } __packed; 3804 3805 struct wmi_addba_clear_resp_cmd { 3806 u32 tlv_header; 3807 u32 vdev_id; 3808 struct wmi_mac_addr peer_macaddr; 3809 } __packed; 3810 3811 struct wmi_pdev_pktlog_filter_info { 3812 u32 tlv_header; 3813 struct wmi_mac_addr peer_macaddr; 3814 } __packed; 3815 3816 struct wmi_pdev_pktlog_filter_cmd { 3817 u32 tlv_header; 3818 u32 pdev_id; 3819 u32 enable; 3820 u32 filter_type; 3821 u32 num_mac; 3822 } __packed; 3823 3824 enum ath11k_wmi_pktlog_enable { 3825 ATH11K_WMI_PKTLOG_ENABLE_AUTO = 0, 3826 ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1, 3827 }; 3828 3829 struct wmi_pktlog_enable_cmd { 3830 u32 tlv_header; 3831 u32 pdev_id; 3832 u32 evlist; /* WMI_PKTLOG_EVENT */ 3833 u32 enable; 3834 } __packed; 3835 3836 struct wmi_pktlog_disable_cmd { 3837 u32 tlv_header; 3838 u32 pdev_id; 3839 } __packed; 3840 3841 #define DFS_PHYERR_UNIT_TEST_CMD 0 3842 #define DFS_UNIT_TEST_MODULE 0x2b 3843 #define DFS_UNIT_TEST_TOKEN 0xAA 3844 3845 enum dfs_test_args_idx { 3846 DFS_TEST_CMDID = 0, 3847 DFS_TEST_PDEV_ID, 3848 DFS_TEST_RADAR_PARAM, 3849 DFS_MAX_TEST_ARGS, 3850 }; 3851 3852 struct wmi_dfs_unit_test_arg { 3853 u32 cmd_id; 3854 u32 pdev_id; 3855 u32 radar_param; 3856 }; 3857 3858 struct wmi_unit_test_cmd { 3859 u32 tlv_header; 3860 u32 vdev_id; 3861 u32 module_id; 3862 u32 num_args; 3863 u32 diag_token; 3864 /* Followed by test args*/ 3865 } __packed; 3866 3867 #define MAX_SUPPORTED_RATES 128 3868 3869 #define WMI_PEER_AUTH 0x00000001 3870 #define WMI_PEER_QOS 0x00000002 3871 #define WMI_PEER_NEED_PTK_4_WAY 0x00000004 3872 #define WMI_PEER_NEED_GTK_2_WAY 0x00000010 3873 #define WMI_PEER_HE 0x00000400 3874 #define WMI_PEER_APSD 0x00000800 3875 #define WMI_PEER_HT 0x00001000 3876 #define WMI_PEER_40MHZ 0x00002000 3877 #define WMI_PEER_STBC 0x00008000 3878 #define WMI_PEER_LDPC 0x00010000 3879 #define WMI_PEER_DYN_MIMOPS 0x00020000 3880 #define WMI_PEER_STATIC_MIMOPS 0x00040000 3881 #define WMI_PEER_SPATIAL_MUX 0x00200000 3882 #define WMI_PEER_TWT_REQ 0x00400000 3883 #define WMI_PEER_TWT_RESP 0x00800000 3884 #define WMI_PEER_VHT 0x02000000 3885 #define WMI_PEER_80MHZ 0x04000000 3886 #define WMI_PEER_PMF 0x08000000 3887 /* TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000. 3888 * Need to be cleaned up 3889 */ 3890 #define WMI_PEER_IS_P2P_CAPABLE 0x20000000 3891 #define WMI_PEER_160MHZ 0x40000000 3892 #define WMI_PEER_SAFEMODE_EN 0x80000000 3893 3894 struct beacon_tmpl_params { 3895 u8 vdev_id; 3896 u32 tim_ie_offset; 3897 u32 tmpl_len; 3898 u32 tmpl_len_aligned; 3899 u32 csa_switch_count_offset; 3900 u32 ext_csa_switch_count_offset; 3901 u8 *frm; 3902 }; 3903 3904 struct wmi_rate_set { 3905 u32 num_rates; 3906 u32 rates[(MAX_SUPPORTED_RATES / 4) + 1]; 3907 }; 3908 3909 struct wmi_vht_rate_set { 3910 u32 tlv_header; 3911 u32 rx_max_rate; 3912 u32 rx_mcs_set; 3913 u32 tx_max_rate; 3914 u32 tx_mcs_set; 3915 u32 tx_max_mcs_nss; 3916 } __packed; 3917 3918 struct wmi_he_rate_set { 3919 u32 tlv_header; 3920 u32 rx_mcs_set; 3921 u32 tx_mcs_set; 3922 } __packed; 3923 3924 #define MAX_REG_RULES 10 3925 #define REG_ALPHA2_LEN 2 3926 3927 enum wmi_start_event_param { 3928 WMI_VDEV_START_RESP_EVENT = 0, 3929 WMI_VDEV_RESTART_RESP_EVENT, 3930 }; 3931 3932 struct wmi_vdev_start_resp_event { 3933 u32 vdev_id; 3934 u32 requestor_id; 3935 enum wmi_start_event_param resp_type; 3936 u32 status; 3937 u32 chain_mask; 3938 u32 smps_mode; 3939 union { 3940 u32 mac_id; 3941 u32 pdev_id; 3942 }; 3943 u32 cfgd_tx_streams; 3944 u32 cfgd_rx_streams; 3945 } __packed; 3946 3947 /* VDEV start response status codes */ 3948 enum wmi_vdev_start_resp_status_code { 3949 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0, 3950 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1, 3951 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2, 3952 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3, 3953 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, 3954 }; 3955 3956 ; 3957 enum cc_setting_code { 3958 REG_SET_CC_STATUS_PASS = 0, 3959 REG_CURRENT_ALPHA2_NOT_FOUND = 1, 3960 REG_INIT_ALPHA2_NOT_FOUND = 2, 3961 REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 3962 REG_SET_CC_STATUS_NO_MEMORY = 4, 3963 REG_SET_CC_STATUS_FAIL = 5, 3964 }; 3965 3966 /* Regaulatory Rule Flags Passed by FW */ 3967 #define REGULATORY_CHAN_DISABLED BIT(0) 3968 #define REGULATORY_CHAN_NO_IR BIT(1) 3969 #define REGULATORY_CHAN_RADAR BIT(3) 3970 #define REGULATORY_CHAN_NO_OFDM BIT(6) 3971 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 3972 3973 #define REGULATORY_CHAN_NO_HT40 BIT(4) 3974 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 3975 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 3976 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 3977 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 3978 3979 enum { 3980 WMI_REG_SET_CC_STATUS_PASS = 0, 3981 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1, 3982 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2, 3983 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 3984 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4, 3985 WMI_REG_SET_CC_STATUS_FAIL = 5, 3986 }; 3987 3988 struct cur_reg_rule { 3989 u16 start_freq; 3990 u16 end_freq; 3991 u16 max_bw; 3992 u8 reg_power; 3993 u8 ant_gain; 3994 u16 flags; 3995 }; 3996 3997 struct cur_regulatory_info { 3998 enum cc_setting_code status_code; 3999 u8 num_phy; 4000 u8 phy_id; 4001 u16 reg_dmn_pair; 4002 u16 ctry_code; 4003 u8 alpha2[REG_ALPHA2_LEN + 1]; 4004 u32 dfs_region; 4005 u32 phybitmap; 4006 u32 min_bw_2g; 4007 u32 max_bw_2g; 4008 u32 min_bw_5g; 4009 u32 max_bw_5g; 4010 u32 num_2g_reg_rules; 4011 u32 num_5g_reg_rules; 4012 struct cur_reg_rule *reg_rules_2g_ptr; 4013 struct cur_reg_rule *reg_rules_5g_ptr; 4014 }; 4015 4016 struct wmi_reg_chan_list_cc_event { 4017 u32 status_code; 4018 u32 phy_id; 4019 u32 alpha2; 4020 u32 num_phy; 4021 u32 country_id; 4022 u32 domain_code; 4023 u32 dfs_region; 4024 u32 phybitmap; 4025 u32 min_bw_2g; 4026 u32 max_bw_2g; 4027 u32 min_bw_5g; 4028 u32 max_bw_5g; 4029 u32 num_2g_reg_rules; 4030 u32 num_5g_reg_rules; 4031 } __packed; 4032 4033 struct wmi_regulatory_rule_struct { 4034 u32 tlv_header; 4035 u32 freq_info; 4036 u32 bw_pwr_info; 4037 u32 flag_info; 4038 }; 4039 4040 struct wmi_vdev_delete_resp_event { 4041 u32 vdev_id; 4042 } __packed; 4043 4044 struct wmi_peer_delete_resp_event { 4045 u32 vdev_id; 4046 struct wmi_mac_addr peer_macaddr; 4047 } __packed; 4048 4049 struct wmi_bcn_tx_status_event { 4050 u32 vdev_id; 4051 u32 tx_status; 4052 } __packed; 4053 4054 struct wmi_vdev_stopped_event { 4055 u32 vdev_id; 4056 } __packed; 4057 4058 struct wmi_pdev_bss_chan_info_event { 4059 u32 pdev_id; 4060 u32 freq; /* Units in MHz */ 4061 u32 noise_floor; /* units are dBm */ 4062 /* rx clear - how often the channel was unused */ 4063 u32 rx_clear_count_low; 4064 u32 rx_clear_count_high; 4065 /* cycle count - elapsed time during measured period, in clock ticks */ 4066 u32 cycle_count_low; 4067 u32 cycle_count_high; 4068 /* tx cycle count - elapsed time spent in tx, in clock ticks */ 4069 u32 tx_cycle_count_low; 4070 u32 tx_cycle_count_high; 4071 /* rx cycle count - elapsed time spent in rx, in clock ticks */ 4072 u32 rx_cycle_count_low; 4073 u32 rx_cycle_count_high; 4074 /*rx_cycle cnt for my bss in 64bits format */ 4075 u32 rx_bss_cycle_count_low; 4076 u32 rx_bss_cycle_count_high; 4077 } __packed; 4078 4079 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 4080 4081 struct wmi_vdev_install_key_compl_event { 4082 u32 vdev_id; 4083 struct wmi_mac_addr peer_macaddr; 4084 u32 key_idx; 4085 u32 key_flags; 4086 u32 status; 4087 } __packed; 4088 4089 struct wmi_vdev_install_key_complete_arg { 4090 u32 vdev_id; 4091 const u8 *macaddr; 4092 u32 key_idx; 4093 u32 key_flags; 4094 u32 status; 4095 }; 4096 4097 struct wmi_peer_assoc_conf_event { 4098 u32 vdev_id; 4099 struct wmi_mac_addr peer_macaddr; 4100 } __packed; 4101 4102 struct wmi_peer_assoc_conf_arg { 4103 u32 vdev_id; 4104 const u8 *macaddr; 4105 }; 4106 4107 struct wmi_fils_discovery_event { 4108 u32 vdev_id; 4109 u32 fils_tt; 4110 u32 tbtt; 4111 } __packed; 4112 4113 struct wmi_probe_resp_tx_status_event { 4114 u32 vdev_id; 4115 u32 tx_status; 4116 } __packed; 4117 4118 /* 4119 * PDEV statistics 4120 */ 4121 struct wmi_pdev_stats_base { 4122 s32 chan_nf; 4123 u32 tx_frame_count; /* Cycles spent transmitting frames */ 4124 u32 rx_frame_count; /* Cycles spent receiving frames */ 4125 u32 rx_clear_count; /* Total channel busy time, evidently */ 4126 u32 cycle_count; /* Total on-channel time */ 4127 u32 phy_err_count; 4128 u32 chan_tx_pwr; 4129 } __packed; 4130 4131 struct wmi_pdev_stats_extra { 4132 u32 ack_rx_bad; 4133 u32 rts_bad; 4134 u32 rts_good; 4135 u32 fcs_bad; 4136 u32 no_beacons; 4137 u32 mib_int_count; 4138 } __packed; 4139 4140 struct wmi_pdev_stats_tx { 4141 /* Num HTT cookies queued to dispatch list */ 4142 s32 comp_queued; 4143 4144 /* Num HTT cookies dispatched */ 4145 s32 comp_delivered; 4146 4147 /* Num MSDU queued to WAL */ 4148 s32 msdu_enqued; 4149 4150 /* Num MPDU queue to WAL */ 4151 s32 mpdu_enqued; 4152 4153 /* Num MSDUs dropped by WMM limit */ 4154 s32 wmm_drop; 4155 4156 /* Num Local frames queued */ 4157 s32 local_enqued; 4158 4159 /* Num Local frames done */ 4160 s32 local_freed; 4161 4162 /* Num queued to HW */ 4163 s32 hw_queued; 4164 4165 /* Num PPDU reaped from HW */ 4166 s32 hw_reaped; 4167 4168 /* Num underruns */ 4169 s32 underrun; 4170 4171 /* Num PPDUs cleaned up in TX abort */ 4172 s32 tx_abort; 4173 4174 /* Num MPDUs requed by SW */ 4175 s32 mpdus_requed; 4176 4177 /* excessive retries */ 4178 u32 tx_ko; 4179 4180 /* data hw rate code */ 4181 u32 data_rc; 4182 4183 /* Scheduler self triggers */ 4184 u32 self_triggers; 4185 4186 /* frames dropped due to excessive sw retries */ 4187 u32 sw_retry_failure; 4188 4189 /* illegal rate phy errors */ 4190 u32 illgl_rate_phy_err; 4191 4192 /* wal pdev continuous xretry */ 4193 u32 pdev_cont_xretry; 4194 4195 /* wal pdev tx timeouts */ 4196 u32 pdev_tx_timeout; 4197 4198 /* wal pdev resets */ 4199 u32 pdev_resets; 4200 4201 /* frames dropped due to non-availability of stateless TIDs */ 4202 u32 stateless_tid_alloc_failure; 4203 4204 /* PhY/BB underrun */ 4205 u32 phy_underrun; 4206 4207 /* MPDU is more than txop limit */ 4208 u32 txop_ovf; 4209 } __packed; 4210 4211 struct wmi_pdev_stats_rx { 4212 /* Cnts any change in ring routing mid-ppdu */ 4213 s32 mid_ppdu_route_change; 4214 4215 /* Total number of statuses processed */ 4216 s32 status_rcvd; 4217 4218 /* Extra frags on rings 0-3 */ 4219 s32 r0_frags; 4220 s32 r1_frags; 4221 s32 r2_frags; 4222 s32 r3_frags; 4223 4224 /* MSDUs / MPDUs delivered to HTT */ 4225 s32 htt_msdus; 4226 s32 htt_mpdus; 4227 4228 /* MSDUs / MPDUs delivered to local stack */ 4229 s32 loc_msdus; 4230 s32 loc_mpdus; 4231 4232 /* AMSDUs that have more MSDUs than the status ring size */ 4233 s32 oversize_amsdu; 4234 4235 /* Number of PHY errors */ 4236 s32 phy_errs; 4237 4238 /* Number of PHY errors drops */ 4239 s32 phy_err_drop; 4240 4241 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 4242 s32 mpdu_errs; 4243 } __packed; 4244 4245 struct wmi_pdev_stats { 4246 struct wmi_pdev_stats_base base; 4247 struct wmi_pdev_stats_tx tx; 4248 struct wmi_pdev_stats_rx rx; 4249 } __packed; 4250 4251 #define WLAN_MAX_AC 4 4252 #define MAX_TX_RATE_VALUES 10 4253 #define MAX_TX_RATE_VALUES 10 4254 4255 struct wmi_vdev_stats { 4256 u32 vdev_id; 4257 u32 beacon_snr; 4258 u32 data_snr; 4259 u32 num_tx_frames[WLAN_MAX_AC]; 4260 u32 num_rx_frames; 4261 u32 num_tx_frames_retries[WLAN_MAX_AC]; 4262 u32 num_tx_frames_failures[WLAN_MAX_AC]; 4263 u32 num_rts_fail; 4264 u32 num_rts_success; 4265 u32 num_rx_err; 4266 u32 num_rx_discard; 4267 u32 num_tx_not_acked; 4268 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 4269 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 4270 } __packed; 4271 4272 struct wmi_bcn_stats { 4273 u32 vdev_id; 4274 u32 tx_bcn_succ_cnt; 4275 u32 tx_bcn_outage_cnt; 4276 } __packed; 4277 4278 struct wmi_stats_event { 4279 u32 stats_id; 4280 u32 num_pdev_stats; 4281 u32 num_vdev_stats; 4282 u32 num_peer_stats; 4283 u32 num_bcnflt_stats; 4284 u32 num_chan_stats; 4285 u32 num_mib_stats; 4286 u32 pdev_id; 4287 u32 num_bcn_stats; 4288 u32 num_peer_extd_stats; 4289 u32 num_peer_extd2_stats; 4290 } __packed; 4291 4292 struct wmi_pdev_ctl_failsafe_chk_event { 4293 u32 pdev_id; 4294 u32 ctl_failsafe_status; 4295 } __packed; 4296 4297 struct wmi_pdev_csa_switch_ev { 4298 u32 pdev_id; 4299 u32 current_switch_count; 4300 u32 num_vdevs; 4301 } __packed; 4302 4303 struct wmi_pdev_radar_ev { 4304 u32 pdev_id; 4305 u32 detection_mode; 4306 u32 chan_freq; 4307 u32 chan_width; 4308 u32 detector_id; 4309 u32 segment_id; 4310 u32 timestamp; 4311 u32 is_chirp; 4312 s32 freq_offset; 4313 s32 sidx; 4314 } __packed; 4315 4316 struct wmi_pdev_temperature_event { 4317 /* temperature value in Celcius degree */ 4318 s32 temp; 4319 u32 pdev_id; 4320 } __packed; 4321 4322 #define WMI_RX_STATUS_OK 0x00 4323 #define WMI_RX_STATUS_ERR_CRC 0x01 4324 #define WMI_RX_STATUS_ERR_DECRYPT 0x08 4325 #define WMI_RX_STATUS_ERR_MIC 0x10 4326 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 4327 4328 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 4329 4330 struct mgmt_rx_event_params { 4331 u32 chan_freq; 4332 u32 channel; 4333 u32 snr; 4334 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; 4335 u32 rate; 4336 enum wmi_phy_mode phy_mode; 4337 u32 buf_len; 4338 int status; 4339 u32 flags; 4340 int rssi; 4341 u32 tsf_delta; 4342 u8 pdev_id; 4343 }; 4344 4345 #define ATH_MAX_ANTENNA 4 4346 4347 struct wmi_mgmt_rx_hdr { 4348 u32 channel; 4349 u32 snr; 4350 u32 rate; 4351 u32 phy_mode; 4352 u32 buf_len; 4353 u32 status; 4354 u32 rssi_ctl[ATH_MAX_ANTENNA]; 4355 u32 flags; 4356 int rssi; 4357 u32 tsf_delta; 4358 u32 rx_tsf_l32; 4359 u32 rx_tsf_u32; 4360 u32 pdev_id; 4361 u32 chan_freq; 4362 } __packed; 4363 4364 #define MAX_ANTENNA_EIGHT 8 4365 4366 struct wmi_rssi_ctl_ext { 4367 u32 tlv_header; 4368 u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA]; 4369 }; 4370 4371 struct wmi_mgmt_tx_compl_event { 4372 u32 desc_id; 4373 u32 status; 4374 u32 pdev_id; 4375 } __packed; 4376 4377 struct wmi_scan_event { 4378 u32 event_type; /* %WMI_SCAN_EVENT_ */ 4379 u32 reason; /* %WMI_SCAN_REASON_ */ 4380 u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 4381 u32 scan_req_id; 4382 u32 scan_id; 4383 u32 vdev_id; 4384 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed 4385 * In case of AP it is TSF of the AP vdev 4386 * In case of STA connected state, this is the TSF of the AP 4387 * In case of STA not connected, it will be the free running HW timer 4388 */ 4389 u32 tsf_timestamp; 4390 } __packed; 4391 4392 struct wmi_peer_sta_kickout_arg { 4393 const u8 *mac_addr; 4394 }; 4395 4396 struct wmi_peer_sta_kickout_event { 4397 struct wmi_mac_addr peer_macaddr; 4398 } __packed; 4399 4400 enum wmi_roam_reason { 4401 WMI_ROAM_REASON_BETTER_AP = 1, 4402 WMI_ROAM_REASON_BEACON_MISS = 2, 4403 WMI_ROAM_REASON_LOW_RSSI = 3, 4404 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 4405 WMI_ROAM_REASON_HO_FAILED = 5, 4406 4407 /* keep last */ 4408 WMI_ROAM_REASON_MAX, 4409 }; 4410 4411 struct wmi_roam_event { 4412 u32 vdev_id; 4413 u32 reason; 4414 u32 rssi; 4415 } __packed; 4416 4417 #define WMI_CHAN_INFO_START_RESP 0 4418 #define WMI_CHAN_INFO_END_RESP 1 4419 4420 struct wmi_chan_info_event { 4421 u32 err_code; 4422 u32 freq; 4423 u32 cmd_flags; 4424 u32 noise_floor; 4425 u32 rx_clear_count; 4426 u32 cycle_count; 4427 u32 chan_tx_pwr_range; 4428 u32 chan_tx_pwr_tp; 4429 u32 rx_frame_count; 4430 u32 my_bss_rx_cycle_count; 4431 u32 rx_11b_mode_data_duration; 4432 u32 tx_frame_cnt; 4433 u32 mac_clk_mhz; 4434 u32 vdev_id; 4435 } __packed; 4436 4437 struct ath11k_targ_cap { 4438 u32 phy_capability; 4439 u32 max_frag_entry; 4440 u32 num_rf_chains; 4441 u32 ht_cap_info; 4442 u32 vht_cap_info; 4443 u32 vht_supp_mcs; 4444 u32 hw_min_tx_power; 4445 u32 hw_max_tx_power; 4446 u32 sys_cap_info; 4447 u32 min_pkt_size_enable; 4448 u32 max_bcn_ie_size; 4449 u32 max_num_scan_channels; 4450 u32 max_supported_macs; 4451 u32 wmi_fw_sub_feat_caps; 4452 u32 txrx_chainmask; 4453 u32 default_dbs_hw_mode_index; 4454 u32 num_msdu_desc; 4455 }; 4456 4457 enum wmi_vdev_type { 4458 WMI_VDEV_TYPE_AP = 1, 4459 WMI_VDEV_TYPE_STA = 2, 4460 WMI_VDEV_TYPE_IBSS = 3, 4461 WMI_VDEV_TYPE_MONITOR = 4, 4462 }; 4463 4464 enum wmi_vdev_subtype { 4465 WMI_VDEV_SUBTYPE_NONE, 4466 WMI_VDEV_SUBTYPE_P2P_DEVICE, 4467 WMI_VDEV_SUBTYPE_P2P_CLIENT, 4468 WMI_VDEV_SUBTYPE_P2P_GO, 4469 WMI_VDEV_SUBTYPE_PROXY_STA, 4470 WMI_VDEV_SUBTYPE_MESH_NON_11S, 4471 WMI_VDEV_SUBTYPE_MESH_11S, 4472 }; 4473 4474 enum wmi_sta_powersave_param { 4475 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 4476 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 4477 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 4478 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 4479 WMI_STA_PS_PARAM_UAPSD = 4, 4480 }; 4481 4482 #define WMI_UAPSD_AC_TYPE_DELI 0 4483 #define WMI_UAPSD_AC_TYPE_TRIG 1 4484 4485 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \ 4486 ((type == WMI_UAPSD_AC_TYPE_DELI) ? \ 4487 (1 << (ac << 1)) : (1 << ((ac << 1) + 1))) 4488 4489 enum wmi_sta_ps_param_uapsd { 4490 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4491 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4492 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4493 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4494 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4495 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4496 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4497 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4498 }; 4499 4500 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX 4501 4502 struct wmi_sta_uapsd_auto_trig_param { 4503 u32 wmm_ac; 4504 u32 user_priority; 4505 u32 service_interval; 4506 u32 suspend_interval; 4507 u32 delay_interval; 4508 }; 4509 4510 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param { 4511 u32 vdev_id; 4512 struct wmi_mac_addr peer_macaddr; 4513 u32 num_ac; 4514 }; 4515 4516 struct wmi_sta_uapsd_auto_trig_arg { 4517 u32 wmm_ac; 4518 u32 user_priority; 4519 u32 service_interval; 4520 u32 suspend_interval; 4521 u32 delay_interval; 4522 }; 4523 4524 enum wmi_sta_ps_param_tx_wake_threshold { 4525 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 4526 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 4527 4528 /* Values greater than one indicate that many TX attempts per beacon 4529 * interval before the STA will wake up 4530 */ 4531 }; 4532 4533 /* The maximum number of PS-Poll frames the FW will send in response to 4534 * traffic advertised in TIM before waking up (by sending a null frame with PS 4535 * = 0). Value 0 has a special meaning: there is no maximum count and the FW 4536 * will send as many PS-Poll as are necessary to retrieve buffered BU. This 4537 * parameter is used when the RX wake policy is 4538 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 4539 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 4540 */ 4541 enum wmi_sta_ps_param_pspoll_count { 4542 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 4543 /* Values greater than 0 indicate the maximum numer of PS-Poll frames 4544 * FW will send before waking up. 4545 */ 4546 }; 4547 4548 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 4549 enum wmi_ap_ps_param_uapsd { 4550 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4551 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4552 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4553 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4554 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4555 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4556 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4557 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4558 }; 4559 4560 /* U-APSD maximum service period of peer station */ 4561 enum wmi_ap_ps_peer_param_max_sp { 4562 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 4563 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 4564 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 4565 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 4566 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 4567 }; 4568 4569 enum wmi_ap_ps_peer_param { 4570 /** Set uapsd configuration for a given peer. 4571 * 4572 * This include the delivery and trigger enabled state for each AC. 4573 * The host MLME needs to set this based on AP capability and stations 4574 * request Set in the association request received from the station. 4575 * 4576 * Lower 8 bits of the value specify the UAPSD configuration. 4577 * 4578 * (see enum wmi_ap_ps_param_uapsd) 4579 * The default value is 0. 4580 */ 4581 WMI_AP_PS_PEER_PARAM_UAPSD = 0, 4582 4583 /** 4584 * Set the service period for a UAPSD capable station 4585 * 4586 * The service period from wme ie in the (re)assoc request frame. 4587 * 4588 * (see enum wmi_ap_ps_peer_param_max_sp) 4589 */ 4590 WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 4591 4592 /** Time in seconds for aging out buffered frames 4593 * for STA in power save 4594 */ 4595 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 4596 4597 /** Specify frame types that are considered SIFS 4598 * RESP trigger frame 4599 */ 4600 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3, 4601 4602 /** Specifies the trigger state of TID. 4603 * Valid only for UAPSD frame type 4604 */ 4605 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4, 4606 4607 /* Specifies the WNM sleep state of a STA */ 4608 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5, 4609 }; 4610 4611 #define DISABLE_SIFS_RESPONSE_TRIGGER 0 4612 4613 #define WMI_MAX_KEY_INDEX 3 4614 #define WMI_MAX_KEY_LEN 32 4615 4616 #define WMI_KEY_PAIRWISE 0x00 4617 #define WMI_KEY_GROUP 0x01 4618 4619 #define WMI_CIPHER_NONE 0x0 /* clear key */ 4620 #define WMI_CIPHER_WEP 0x1 4621 #define WMI_CIPHER_TKIP 0x2 4622 #define WMI_CIPHER_AES_OCB 0x3 4623 #define WMI_CIPHER_AES_CCM 0x4 4624 #define WMI_CIPHER_WAPI 0x5 4625 #define WMI_CIPHER_CKIP 0x6 4626 #define WMI_CIPHER_AES_CMAC 0x7 4627 #define WMI_CIPHER_ANY 0x8 4628 #define WMI_CIPHER_AES_GCM 0x9 4629 #define WMI_CIPHER_AES_GMAC 0xa 4630 4631 /* Value to disable fixed rate setting */ 4632 #define WMI_FIXED_RATE_NONE (0xffff) 4633 4634 #define ATH11K_RC_VERSION_OFFSET 28 4635 #define ATH11K_RC_PREAMBLE_OFFSET 8 4636 #define ATH11K_RC_NSS_OFFSET 5 4637 4638 #define ATH11K_HW_RATE_CODE(rate, nss, preamble) \ 4639 ((1 << ATH11K_RC_VERSION_OFFSET) | \ 4640 ((nss) << ATH11K_RC_NSS_OFFSET) | \ 4641 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) | \ 4642 (rate)) 4643 4644 /* Preamble types to be used with VDEV fixed rate configuration */ 4645 enum wmi_rate_preamble { 4646 WMI_RATE_PREAMBLE_OFDM, 4647 WMI_RATE_PREAMBLE_CCK, 4648 WMI_RATE_PREAMBLE_HT, 4649 WMI_RATE_PREAMBLE_VHT, 4650 WMI_RATE_PREAMBLE_HE, 4651 }; 4652 4653 /** 4654 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection. 4655 * @WMI_RTS_CTS_DISABLED : RTS/CTS protection is disabled. 4656 * @WMI_USE_RTS_CTS : RTS/CTS Enabled. 4657 * @WMI_USE_CTS2SELF : CTS to self protection Enabled. 4658 */ 4659 enum wmi_rtscts_prot_mode { 4660 WMI_RTS_CTS_DISABLED = 0, 4661 WMI_USE_RTS_CTS = 1, 4662 WMI_USE_CTS2SELF = 2, 4663 }; 4664 4665 /** 4666 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling 4667 * protection mode. 4668 * @WMI_RTSCTS_FOR_NO_RATESERIES - Neither of rate-series should use RTS-CTS 4669 * @WMI_RTSCTS_FOR_SECOND_RATESERIES - Only second rate-series will use RTS-CTS 4670 * @WMI_RTSCTS_ACROSS_SW_RETRIES - Only the second rate-series will use RTS-CTS, 4671 * but if there's a sw retry, both the rate 4672 * series will use RTS-CTS. 4673 * @WMI_RTSCTS_ERP - RTS/CTS used for ERP protection for every PPDU. 4674 * @WMI_RTSCTS_FOR_ALL_RATESERIES - Enable RTS-CTS for all rate series. 4675 */ 4676 enum wmi_rtscts_profile { 4677 WMI_RTSCTS_FOR_NO_RATESERIES = 0, 4678 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1, 4679 WMI_RTSCTS_ACROSS_SW_RETRIES = 2, 4680 WMI_RTSCTS_ERP = 3, 4681 WMI_RTSCTS_FOR_ALL_RATESERIES = 4, 4682 }; 4683 4684 struct ath11k_hal_reg_cap { 4685 u32 eeprom_rd; 4686 u32 eeprom_rd_ext; 4687 u32 regcap1; 4688 u32 regcap2; 4689 u32 wireless_modes; 4690 u32 low_2ghz_chan; 4691 u32 high_2ghz_chan; 4692 u32 low_5ghz_chan; 4693 u32 high_5ghz_chan; 4694 }; 4695 4696 struct ath11k_mem_chunk { 4697 void *vaddr; 4698 dma_addr_t paddr; 4699 u32 len; 4700 u32 req_id; 4701 }; 4702 4703 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 4704 4705 enum wmi_sta_ps_param_rx_wake_policy { 4706 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 4707 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 4708 }; 4709 4710 /* Do not change existing values! Used by ath11k_frame_mode parameter 4711 * module parameter. 4712 */ 4713 enum ath11k_hw_txrx_mode { 4714 ATH11K_HW_TXRX_RAW = 0, 4715 ATH11K_HW_TXRX_NATIVE_WIFI = 1, 4716 ATH11K_HW_TXRX_ETHERNET = 2, 4717 }; 4718 4719 struct wmi_wmm_params { 4720 u32 tlv_header; 4721 u32 cwmin; 4722 u32 cwmax; 4723 u32 aifs; 4724 u32 txoplimit; 4725 u32 acm; 4726 u32 no_ack; 4727 } __packed; 4728 4729 struct wmi_wmm_params_arg { 4730 u8 acm; 4731 u8 aifs; 4732 u16 cwmin; 4733 u16 cwmax; 4734 u16 txop; 4735 u8 no_ack; 4736 }; 4737 4738 struct wmi_vdev_set_wmm_params_cmd { 4739 u32 tlv_header; 4740 u32 vdev_id; 4741 struct wmi_wmm_params wmm_params[4]; 4742 u32 wmm_param_type; 4743 } __packed; 4744 4745 struct wmi_wmm_params_all_arg { 4746 struct wmi_wmm_params_arg ac_be; 4747 struct wmi_wmm_params_arg ac_bk; 4748 struct wmi_wmm_params_arg ac_vi; 4749 struct wmi_wmm_params_arg ac_vo; 4750 }; 4751 4752 #define ATH11K_TWT_DEF_STA_CONG_TIMER_MS 5000 4753 #define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE 10 4754 #define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP 50 4755 #define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20 4756 #define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100 4757 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80 4758 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50 4759 #define ATH11K_TWT_DEF_MIN_NO_STA_SETUP 10 4760 #define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN 2 4761 #define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2 4762 #define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS 2 4763 #define ATH11K_TWT_DEF_MAX_NO_STA_TWT 500 4764 #define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL 10000 4765 #define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000 4766 #define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000 4767 4768 struct wmi_twt_enable_params_cmd { 4769 u32 tlv_header; 4770 u32 pdev_id; 4771 u32 sta_cong_timer_ms; 4772 u32 mbss_support; 4773 u32 default_slot_size; 4774 u32 congestion_thresh_setup; 4775 u32 congestion_thresh_teardown; 4776 u32 congestion_thresh_critical; 4777 u32 interference_thresh_teardown; 4778 u32 interference_thresh_setup; 4779 u32 min_no_sta_setup; 4780 u32 min_no_sta_teardown; 4781 u32 no_of_bcast_mcast_slots; 4782 u32 min_no_twt_slots; 4783 u32 max_no_sta_twt; 4784 u32 mode_check_interval; 4785 u32 add_sta_slot_interval; 4786 u32 remove_sta_slot_interval; 4787 } __packed; 4788 4789 struct wmi_twt_disable_params_cmd { 4790 u32 tlv_header; 4791 u32 pdev_id; 4792 } __packed; 4793 4794 struct wmi_obss_spatial_reuse_params_cmd { 4795 u32 tlv_header; 4796 u32 pdev_id; 4797 u32 enable; 4798 s32 obss_min; 4799 s32 obss_max; 4800 u32 vdev_id; 4801 } __packed; 4802 4803 struct wmi_pdev_obss_pd_bitmap_cmd { 4804 u32 tlv_header; 4805 u32 pdev_id; 4806 u32 bitmap[2]; 4807 } __packed; 4808 4809 #define ATH11K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200 4810 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0 4811 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION 1 4812 4813 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS 10000 4814 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS 5000 4815 4816 struct wmi_obss_color_collision_cfg_params_cmd { 4817 u32 tlv_header; 4818 u32 vdev_id; 4819 u32 flags; 4820 u32 evt_type; 4821 u32 current_bss_color; 4822 u32 detection_period_ms; 4823 u32 scan_period_ms; 4824 u32 free_slot_expiry_time_ms; 4825 } __packed; 4826 4827 struct wmi_bss_color_change_enable_params_cmd { 4828 u32 tlv_header; 4829 u32 vdev_id; 4830 u32 enable; 4831 } __packed; 4832 4833 #define ATH11K_IPV4_TH_SEED_SIZE 5 4834 #define ATH11K_IPV6_TH_SEED_SIZE 11 4835 4836 struct ath11k_wmi_pdev_lro_config_cmd { 4837 u32 tlv_header; 4838 u32 lro_enable; 4839 u32 res; 4840 u32 th_4[ATH11K_IPV4_TH_SEED_SIZE]; 4841 u32 th_6[ATH11K_IPV6_TH_SEED_SIZE]; 4842 u32 pdev_id; 4843 } __packed; 4844 4845 #define ATH11K_WMI_SPECTRAL_COUNT_DEFAULT 0 4846 #define ATH11K_WMI_SPECTRAL_PERIOD_DEFAULT 224 4847 #define ATH11K_WMI_SPECTRAL_PRIORITY_DEFAULT 1 4848 #define ATH11K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 4849 #define ATH11K_WMI_SPECTRAL_GC_ENA_DEFAULT 1 4850 #define ATH11K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 4851 #define ATH11K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 4852 #define ATH11K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 4853 #define ATH11K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 4854 #define ATH11K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 4855 #define ATH11K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 4856 #define ATH11K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 4857 #define ATH11K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 4858 #define ATH11K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 4859 #define ATH11K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2 4860 #define ATH11K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 4861 #define ATH11K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 4862 #define ATH11K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1 4863 4864 struct ath11k_wmi_vdev_spectral_conf_param { 4865 u32 vdev_id; 4866 u32 scan_count; 4867 u32 scan_period; 4868 u32 scan_priority; 4869 u32 scan_fft_size; 4870 u32 scan_gc_ena; 4871 u32 scan_restart_ena; 4872 u32 scan_noise_floor_ref; 4873 u32 scan_init_delay; 4874 u32 scan_nb_tone_thr; 4875 u32 scan_str_bin_thr; 4876 u32 scan_wb_rpt_mode; 4877 u32 scan_rssi_rpt_mode; 4878 u32 scan_rssi_thr; 4879 u32 scan_pwr_format; 4880 u32 scan_rpt_mode; 4881 u32 scan_bin_scale; 4882 u32 scan_dbm_adj; 4883 u32 scan_chn_mask; 4884 } __packed; 4885 4886 struct ath11k_wmi_vdev_spectral_conf_cmd { 4887 u32 tlv_header; 4888 struct ath11k_wmi_vdev_spectral_conf_param param; 4889 } __packed; 4890 4891 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 4892 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 4893 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 4894 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 4895 4896 struct ath11k_wmi_vdev_spectral_enable_cmd { 4897 u32 tlv_header; 4898 u32 vdev_id; 4899 u32 trigger_cmd; 4900 u32 enable_cmd; 4901 } __packed; 4902 4903 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd { 4904 u32 tlv_header; 4905 u32 pdev_id; 4906 u32 module_id; /* see enum wmi_direct_buffer_module */ 4907 u32 base_paddr_lo; 4908 u32 base_paddr_hi; 4909 u32 head_idx_paddr_lo; 4910 u32 head_idx_paddr_hi; 4911 u32 tail_idx_paddr_lo; 4912 u32 tail_idx_paddr_hi; 4913 u32 num_elems; /* Number of elems in the ring */ 4914 u32 buf_size; /* size of allocated buffer in bytes */ 4915 4916 /* Number of wmi_dma_buf_release_entry packed together */ 4917 u32 num_resp_per_event; 4918 4919 /* Target should timeout and send whatever resp 4920 * it has if this time expires, units in milliseconds 4921 */ 4922 u32 event_timeout_ms; 4923 } __packed; 4924 4925 struct ath11k_wmi_dma_buf_release_fixed_param { 4926 u32 pdev_id; 4927 u32 module_id; 4928 u32 num_buf_release_entry; 4929 u32 num_meta_data_entry; 4930 } __packed; 4931 4932 struct wmi_dma_buf_release_entry { 4933 u32 tlv_header; 4934 u32 paddr_lo; 4935 4936 /* Bits 11:0: address of data 4937 * Bits 31:12: host context data 4938 */ 4939 u32 paddr_hi; 4940 } __packed; 4941 4942 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0) 4943 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16) 4944 4945 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0) 4946 4947 struct wmi_dma_buf_release_meta_data { 4948 u32 tlv_header; 4949 s32 noise_floor[WMI_MAX_CHAINS]; 4950 u32 reset_delay; 4951 u32 freq1; 4952 u32 freq2; 4953 u32 ch_width; 4954 } __packed; 4955 4956 enum wmi_fils_discovery_cmd_type { 4957 WMI_FILS_DISCOVERY_CMD, 4958 WMI_UNSOL_BCAST_PROBE_RESP, 4959 }; 4960 4961 struct wmi_fils_discovery_cmd { 4962 u32 tlv_header; 4963 u32 vdev_id; 4964 u32 interval; 4965 u32 config; /* enum wmi_fils_discovery_cmd_type */ 4966 } __packed; 4967 4968 struct wmi_fils_discovery_tmpl_cmd { 4969 u32 tlv_header; 4970 u32 vdev_id; 4971 u32 buf_len; 4972 } __packed; 4973 4974 struct wmi_probe_tmpl_cmd { 4975 u32 tlv_header; 4976 u32 vdev_id; 4977 u32 buf_len; 4978 } __packed; 4979 4980 struct target_resource_config { 4981 u32 num_vdevs; 4982 u32 num_peers; 4983 u32 num_active_peers; 4984 u32 num_offload_peers; 4985 u32 num_offload_reorder_buffs; 4986 u32 num_peer_keys; 4987 u32 num_tids; 4988 u32 ast_skid_limit; 4989 u32 tx_chain_mask; 4990 u32 rx_chain_mask; 4991 u32 rx_timeout_pri[4]; 4992 u32 rx_decap_mode; 4993 u32 scan_max_pending_req; 4994 u32 bmiss_offload_max_vdev; 4995 u32 roam_offload_max_vdev; 4996 u32 roam_offload_max_ap_profiles; 4997 u32 num_mcast_groups; 4998 u32 num_mcast_table_elems; 4999 u32 mcast2ucast_mode; 5000 u32 tx_dbg_log_size; 5001 u32 num_wds_entries; 5002 u32 dma_burst_size; 5003 u32 mac_aggr_delim; 5004 u32 rx_skip_defrag_timeout_dup_detection_check; 5005 u32 vow_config; 5006 u32 gtk_offload_max_vdev; 5007 u32 num_msdu_desc; 5008 u32 max_frag_entries; 5009 u32 max_peer_ext_stats; 5010 u32 smart_ant_cap; 5011 u32 bk_minfree; 5012 u32 be_minfree; 5013 u32 vi_minfree; 5014 u32 vo_minfree; 5015 u32 rx_batchmode; 5016 u32 tt_support; 5017 u32 atf_config; 5018 u32 iphdr_pad_config; 5019 u32 qwrap_config:16, 5020 alloc_frag_desc_for_data_pkt:16; 5021 u32 num_tdls_vdevs; 5022 u32 num_tdls_conn_table_entries; 5023 u32 beacon_tx_offload_max_vdev; 5024 u32 num_multicast_filter_entries; 5025 u32 num_wow_filters; 5026 u32 num_keep_alive_pattern; 5027 u32 keep_alive_pattern_size; 5028 u32 max_tdls_concurrent_sleep_sta; 5029 u32 max_tdls_concurrent_buffer_sta; 5030 u32 wmi_send_separate; 5031 u32 num_ocb_vdevs; 5032 u32 num_ocb_channels; 5033 u32 num_ocb_schedules; 5034 u32 num_ns_ext_tuples_cfg; 5035 u32 bpf_instruction_size; 5036 u32 max_bssid_rx_filters; 5037 u32 use_pdev_id; 5038 u32 peer_map_unmap_v2_support; 5039 u32 sched_params; 5040 u32 twt_ap_pdev_count; 5041 u32 twt_ap_sta_count; 5042 }; 5043 5044 #define WMI_MAX_MEM_REQS 32 5045 5046 #define MAX_RADIOS 3 5047 5048 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 5049 #define WMI_SEND_TIMEOUT_HZ (3 * HZ) 5050 5051 struct ath11k_wmi_base { 5052 struct ath11k_base *ab; 5053 struct ath11k_pdev_wmi wmi[MAX_RADIOS]; 5054 enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS]; 5055 u32 max_msg_len[MAX_RADIOS]; 5056 5057 struct completion service_ready; 5058 struct completion unified_ready; 5059 DECLARE_BITMAP(svc_map, WMI_MAX_EXT_SERVICE); 5060 wait_queue_head_t tx_credits_wq; 5061 const struct wmi_peer_flags_map *peer_flags; 5062 u32 num_mem_chunks; 5063 u32 rx_decap_mode; 5064 struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 5065 5066 enum wmi_host_hw_mode_config_type preferred_hw_mode; 5067 struct target_resource_config wlan_resource_config; 5068 5069 struct ath11k_targ_cap *targ_cap; 5070 }; 5071 5072 /* WOW structures */ 5073 enum wmi_wow_wakeup_event { 5074 WOW_BMISS_EVENT = 0, 5075 WOW_BETTER_AP_EVENT, 5076 WOW_DEAUTH_RECVD_EVENT, 5077 WOW_MAGIC_PKT_RECVD_EVENT, 5078 WOW_GTK_ERR_EVENT, 5079 WOW_FOURWAY_HSHAKE_EVENT, 5080 WOW_EAPOL_RECVD_EVENT, 5081 WOW_NLO_DETECTED_EVENT, 5082 WOW_DISASSOC_RECVD_EVENT, 5083 WOW_PATTERN_MATCH_EVENT, 5084 WOW_CSA_IE_EVENT, 5085 WOW_PROBE_REQ_WPS_IE_EVENT, 5086 WOW_AUTH_REQ_EVENT, 5087 WOW_ASSOC_REQ_EVENT, 5088 WOW_HTT_EVENT, 5089 WOW_RA_MATCH_EVENT, 5090 WOW_HOST_AUTO_SHUTDOWN_EVENT, 5091 WOW_IOAC_MAGIC_EVENT, 5092 WOW_IOAC_SHORT_EVENT, 5093 WOW_IOAC_EXTEND_EVENT, 5094 WOW_IOAC_TIMER_EVENT, 5095 WOW_DFS_PHYERR_RADAR_EVENT, 5096 WOW_BEACON_EVENT, 5097 WOW_CLIENT_KICKOUT_EVENT, 5098 WOW_EVENT_MAX, 5099 }; 5100 5101 enum wmi_wow_interface_cfg { 5102 WOW_IFACE_PAUSE_ENABLED, 5103 WOW_IFACE_PAUSE_DISABLED 5104 }; 5105 5106 #define C2S(x) case x: return #x 5107 5108 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev) 5109 { 5110 switch (ev) { 5111 C2S(WOW_BMISS_EVENT); 5112 C2S(WOW_BETTER_AP_EVENT); 5113 C2S(WOW_DEAUTH_RECVD_EVENT); 5114 C2S(WOW_MAGIC_PKT_RECVD_EVENT); 5115 C2S(WOW_GTK_ERR_EVENT); 5116 C2S(WOW_FOURWAY_HSHAKE_EVENT); 5117 C2S(WOW_EAPOL_RECVD_EVENT); 5118 C2S(WOW_NLO_DETECTED_EVENT); 5119 C2S(WOW_DISASSOC_RECVD_EVENT); 5120 C2S(WOW_PATTERN_MATCH_EVENT); 5121 C2S(WOW_CSA_IE_EVENT); 5122 C2S(WOW_PROBE_REQ_WPS_IE_EVENT); 5123 C2S(WOW_AUTH_REQ_EVENT); 5124 C2S(WOW_ASSOC_REQ_EVENT); 5125 C2S(WOW_HTT_EVENT); 5126 C2S(WOW_RA_MATCH_EVENT); 5127 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT); 5128 C2S(WOW_IOAC_MAGIC_EVENT); 5129 C2S(WOW_IOAC_SHORT_EVENT); 5130 C2S(WOW_IOAC_EXTEND_EVENT); 5131 C2S(WOW_IOAC_TIMER_EVENT); 5132 C2S(WOW_DFS_PHYERR_RADAR_EVENT); 5133 C2S(WOW_BEACON_EVENT); 5134 C2S(WOW_CLIENT_KICKOUT_EVENT); 5135 C2S(WOW_EVENT_MAX); 5136 default: 5137 return NULL; 5138 } 5139 } 5140 5141 enum wmi_wow_wake_reason { 5142 WOW_REASON_UNSPECIFIED = -1, 5143 WOW_REASON_NLOD = 0, 5144 WOW_REASON_AP_ASSOC_LOST, 5145 WOW_REASON_LOW_RSSI, 5146 WOW_REASON_DEAUTH_RECVD, 5147 WOW_REASON_DISASSOC_RECVD, 5148 WOW_REASON_GTK_HS_ERR, 5149 WOW_REASON_EAP_REQ, 5150 WOW_REASON_FOURWAY_HS_RECV, 5151 WOW_REASON_TIMER_INTR_RECV, 5152 WOW_REASON_PATTERN_MATCH_FOUND, 5153 WOW_REASON_RECV_MAGIC_PATTERN, 5154 WOW_REASON_P2P_DISC, 5155 WOW_REASON_WLAN_HB, 5156 WOW_REASON_CSA_EVENT, 5157 WOW_REASON_PROBE_REQ_WPS_IE_RECV, 5158 WOW_REASON_AUTH_REQ_RECV, 5159 WOW_REASON_ASSOC_REQ_RECV, 5160 WOW_REASON_HTT_EVENT, 5161 WOW_REASON_RA_MATCH, 5162 WOW_REASON_HOST_AUTO_SHUTDOWN, 5163 WOW_REASON_IOAC_MAGIC_EVENT, 5164 WOW_REASON_IOAC_SHORT_EVENT, 5165 WOW_REASON_IOAC_EXTEND_EVENT, 5166 WOW_REASON_IOAC_TIMER_EVENT, 5167 WOW_REASON_ROAM_HO, 5168 WOW_REASON_DFS_PHYERR_RADADR_EVENT, 5169 WOW_REASON_BEACON_RECV, 5170 WOW_REASON_CLIENT_KICKOUT_EVENT, 5171 WOW_REASON_PAGE_FAULT = 0x3a, 5172 WOW_REASON_DEBUG_TEST = 0xFF, 5173 }; 5174 5175 static inline const char *wow_reason(enum wmi_wow_wake_reason reason) 5176 { 5177 switch (reason) { 5178 C2S(WOW_REASON_UNSPECIFIED); 5179 C2S(WOW_REASON_NLOD); 5180 C2S(WOW_REASON_AP_ASSOC_LOST); 5181 C2S(WOW_REASON_LOW_RSSI); 5182 C2S(WOW_REASON_DEAUTH_RECVD); 5183 C2S(WOW_REASON_DISASSOC_RECVD); 5184 C2S(WOW_REASON_GTK_HS_ERR); 5185 C2S(WOW_REASON_EAP_REQ); 5186 C2S(WOW_REASON_FOURWAY_HS_RECV); 5187 C2S(WOW_REASON_TIMER_INTR_RECV); 5188 C2S(WOW_REASON_PATTERN_MATCH_FOUND); 5189 C2S(WOW_REASON_RECV_MAGIC_PATTERN); 5190 C2S(WOW_REASON_P2P_DISC); 5191 C2S(WOW_REASON_WLAN_HB); 5192 C2S(WOW_REASON_CSA_EVENT); 5193 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV); 5194 C2S(WOW_REASON_AUTH_REQ_RECV); 5195 C2S(WOW_REASON_ASSOC_REQ_RECV); 5196 C2S(WOW_REASON_HTT_EVENT); 5197 C2S(WOW_REASON_RA_MATCH); 5198 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN); 5199 C2S(WOW_REASON_IOAC_MAGIC_EVENT); 5200 C2S(WOW_REASON_IOAC_SHORT_EVENT); 5201 C2S(WOW_REASON_IOAC_EXTEND_EVENT); 5202 C2S(WOW_REASON_IOAC_TIMER_EVENT); 5203 C2S(WOW_REASON_ROAM_HO); 5204 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT); 5205 C2S(WOW_REASON_BEACON_RECV); 5206 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT); 5207 C2S(WOW_REASON_PAGE_FAULT); 5208 C2S(WOW_REASON_DEBUG_TEST); 5209 default: 5210 return NULL; 5211 } 5212 } 5213 5214 #undef C2S 5215 5216 struct wmi_wow_enable_cmd { 5217 u32 tlv_header; 5218 u32 enable; 5219 u32 pause_iface_config; 5220 u32 flags; 5221 } __packed; 5222 5223 struct wmi_wow_host_wakeup_ind { 5224 u32 tlv_header; 5225 u32 reserved; 5226 } __packed; 5227 5228 struct wmi_wow_ev_arg { 5229 u32 vdev_id; 5230 u32 flag; 5231 enum wmi_wow_wake_reason wake_reason; 5232 u32 data_len; 5233 }; 5234 5235 int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb, 5236 u32 cmd_id); 5237 struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len); 5238 int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id, 5239 struct sk_buff *frame); 5240 int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id, 5241 struct ieee80211_mutable_offsets *offs, 5242 struct sk_buff *bcn); 5243 int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id); 5244 int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid, 5245 const u8 *bssid); 5246 int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id); 5247 int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg, 5248 bool restart); 5249 int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr, 5250 u32 vdev_id, u32 param_id, u32 param_val); 5251 int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id, 5252 u32 param_value, u8 pdev_id); 5253 int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, u32 enable); 5254 int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab); 5255 int ath11k_wmi_cmd_init(struct ath11k_base *ab); 5256 int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab); 5257 int ath11k_wmi_connect(struct ath11k_base *ab); 5258 int ath11k_wmi_pdev_attach(struct ath11k_base *ab, 5259 u8 pdev_id); 5260 int ath11k_wmi_attach(struct ath11k_base *ab); 5261 void ath11k_wmi_detach(struct ath11k_base *ab); 5262 int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr, 5263 struct vdev_create_params *param); 5264 int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id, 5265 const u8 *addr, dma_addr_t paddr, 5266 u8 tid, u8 ba_window_size_valid, 5267 u32 ba_window_size); 5268 int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar, 5269 struct peer_create_params *param); 5270 int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id, 5271 u32 param_id, u32 param_value); 5272 5273 int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id, 5274 u32 param, u32 param_value); 5275 int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms); 5276 int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar, 5277 const u8 *peer_addr, u8 vdev_id); 5278 int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id); 5279 void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg); 5280 int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar, 5281 struct scan_req_params *params); 5282 int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar, 5283 struct scan_cancel_param *param); 5284 int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id, 5285 struct wmi_wmm_params_all_arg *param); 5286 int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt, 5287 u32 pdev_id); 5288 int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id); 5289 5290 int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar, 5291 struct peer_assoc_params *param); 5292 int ath11k_wmi_vdev_install_key(struct ath11k *ar, 5293 struct wmi_vdev_install_key_arg *arg); 5294 int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar, 5295 enum wmi_bss_chan_info_req_type type); 5296 int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar, 5297 struct stats_request_params *param); 5298 int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar); 5299 int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar, 5300 u8 peer_addr[ETH_ALEN], 5301 struct peer_flush_params *param); 5302 int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr, 5303 struct ap_ps_params *param); 5304 int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar, 5305 struct scan_chan_list_params *chan_list); 5306 int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar, 5307 u32 pdev_id); 5308 int ath11k_wmi_addba_clear_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac); 5309 int ath11k_wmi_addba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac, 5310 u32 tid, u32 buf_size); 5311 int ath11k_wmi_addba_set_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac, 5312 u32 tid, u32 status); 5313 int ath11k_wmi_delba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac, 5314 u32 tid, u32 initiator, u32 reason); 5315 int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar, 5316 u32 vdev_id, u32 bcn_ctrl_op); 5317 int 5318 ath11k_wmi_send_init_country_cmd(struct ath11k *ar, 5319 struct wmi_init_country_params init_cc_param); 5320 int 5321 ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar, 5322 struct thermal_mitigation_params *param); 5323 int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter); 5324 int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar); 5325 int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable); 5326 int 5327 ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar, 5328 struct rx_reorder_queue_remove_params *param); 5329 int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar, 5330 struct pdev_set_regdomain_params *param); 5331 int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb, 5332 struct ath11k_fw_stats *stats); 5333 size_t ath11k_wmi_fw_stats_num_peers(struct list_head *head); 5334 size_t ath11k_wmi_fw_stats_num_peers_extd(struct list_head *head); 5335 size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head); 5336 void ath11k_wmi_fw_stats_fill(struct ath11k *ar, 5337 struct ath11k_fw_stats *fw_stats, u32 stats_id, 5338 char *buf); 5339 int ath11k_wmi_simulate_radar(struct ath11k *ar); 5340 int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id); 5341 int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id); 5342 int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id, 5343 struct ieee80211_he_obss_pd *he_obss_pd); 5344 int ath11k_wmi_pdev_set_srg_bss_color_bitmap(struct ath11k *ar, u32 *bitmap); 5345 int ath11k_wmi_pdev_set_srg_patial_bssid_bitmap(struct ath11k *ar, u32 *bitmap); 5346 int ath11k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath11k *ar, 5347 u32 *bitmap); 5348 int ath11k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath11k *ar, 5349 u32 *bitmap); 5350 int ath11k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath11k *ar, 5351 u32 *bitmap); 5352 int ath11k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath11k *ar, 5353 u32 *bitmap); 5354 int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id, 5355 u8 bss_color, u32 period, 5356 bool enable); 5357 int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id, 5358 bool enable); 5359 int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id); 5360 int ath11k_wmi_pdev_dma_ring_cfg(struct ath11k *ar, 5361 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd *param); 5362 int ath11k_wmi_vdev_spectral_enable(struct ath11k *ar, u32 vdev_id, 5363 u32 trigger, u32 enable); 5364 int ath11k_wmi_vdev_spectral_conf(struct ath11k *ar, 5365 struct ath11k_wmi_vdev_spectral_conf_param *param); 5366 int ath11k_wmi_fils_discovery_tmpl(struct ath11k *ar, u32 vdev_id, 5367 struct sk_buff *tmpl); 5368 int ath11k_wmi_fils_discovery(struct ath11k *ar, u32 vdev_id, u32 interval, 5369 bool unsol_bcast_probe_resp_enabled); 5370 int ath11k_wmi_probe_resp_tmpl(struct ath11k *ar, u32 vdev_id, 5371 struct sk_buff *tmpl); 5372 int ath11k_wmi_set_hw_mode(struct ath11k_base *ab, 5373 enum wmi_host_hw_mode_config_type mode); 5374 int ath11k_wmi_wow_host_wakeup_ind(struct ath11k *ar); 5375 int ath11k_wmi_wow_enable(struct ath11k *ar); 5376 5377 #endif 5378