1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef ATH11K_WMI_H 7 #define ATH11K_WMI_H 8 9 #include <net/mac80211.h> 10 #include "htc.h" 11 12 struct ath11k_base; 13 struct ath11k; 14 struct ath11k_fw_stats; 15 16 #define PSOC_HOST_MAX_NUM_SS (8) 17 18 /* defines to set Packet extension values whic can be 0 us, 8 usec or 16 usec */ 19 #define MAX_HE_NSS 8 20 #define MAX_HE_MODULATION 8 21 #define MAX_HE_RU 4 22 #define HE_MODULATION_NONE 7 23 #define HE_PET_0_USEC 0 24 #define HE_PET_8_USEC 1 25 #define HE_PET_16_USEC 2 26 27 #define WMI_MAX_NUM_SS MAX_HE_NSS 28 #define WMI_MAX_NUM_RU MAX_HE_RU 29 30 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1) 31 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1) 32 #define WMI_TLV_CMD_UNSUPPORTED 0 33 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0 34 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0 35 36 struct wmi_cmd_hdr { 37 u32 cmd_id; 38 } __packed; 39 40 struct wmi_tlv { 41 u32 header; 42 u8 value[0]; 43 } __packed; 44 45 #define WMI_TLV_LEN GENMASK(15, 0) 46 #define WMI_TLV_TAG GENMASK(31, 16) 47 #define TLV_HDR_SIZE FIELD_SIZEOF(struct wmi_tlv, header) 48 49 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0) 50 #define WMI_MAX_MEM_REQS 32 51 #define ATH11K_MAX_HW_LISTEN_INTERVAL 5 52 53 #define WLAN_SCAN_PARAMS_MAX_SSID 16 54 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 55 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 56 57 /* 58 * HW mode config type replicated from FW header 59 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active. 60 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands, 61 * one in 2G and another in 5G. 62 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in 63 * same band; no tx allowed. 64 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band. 65 * Support for both PHYs within one band is planned 66 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES), 67 * but could be extended to other bands in the future. 68 * The separation of the band between the two PHYs needs 69 * to be communicated separately. 70 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS 71 * as in WMI_HW_MODE_SBS, and 3rd on the other band 72 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and 73 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). 74 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. 75 */ 76 enum wmi_host_hw_mode_config_type { 77 WMI_HOST_HW_MODE_SINGLE = 0, 78 WMI_HOST_HW_MODE_DBS = 1, 79 WMI_HOST_HW_MODE_SBS_PASSIVE = 2, 80 WMI_HOST_HW_MODE_SBS = 3, 81 WMI_HOST_HW_MODE_DBS_SBS = 4, 82 WMI_HOST_HW_MODE_DBS_OR_SBS = 5, 83 84 /* keep last */ 85 WMI_HOST_HW_MODE_MAX 86 }; 87 88 /* HW mode priority values used to detect the preferred HW mode 89 * on the available modes. 90 */ 91 enum wmi_host_hw_mode_priority { 92 WMI_HOST_HW_MODE_DBS_SBS_PRI, 93 WMI_HOST_HW_MODE_DBS_PRI, 94 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI, 95 WMI_HOST_HW_MODE_SBS_PRI, 96 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI, 97 WMI_HOST_HW_MODE_SINGLE_PRI, 98 99 /* keep last the lowest priority */ 100 WMI_HOST_HW_MODE_MAX_PRI 101 }; 102 103 enum { 104 WMI_HOST_WLAN_2G_CAP = 0x1, 105 WMI_HOST_WLAN_5G_CAP = 0x2, 106 WMI_HOST_WLAN_2G_5G_CAP = 0x3, 107 }; 108 109 /* 110 * wmi command groups. 111 */ 112 enum wmi_cmd_group { 113 /* 0 to 2 are reserved */ 114 WMI_GRP_START = 0x3, 115 WMI_GRP_SCAN = WMI_GRP_START, 116 WMI_GRP_PDEV = 0x4, 117 WMI_GRP_VDEV = 0x5, 118 WMI_GRP_PEER = 0x6, 119 WMI_GRP_MGMT = 0x7, 120 WMI_GRP_BA_NEG = 0x8, 121 WMI_GRP_STA_PS = 0x9, 122 WMI_GRP_DFS = 0xa, 123 WMI_GRP_ROAM = 0xb, 124 WMI_GRP_OFL_SCAN = 0xc, 125 WMI_GRP_P2P = 0xd, 126 WMI_GRP_AP_PS = 0xe, 127 WMI_GRP_RATE_CTRL = 0xf, 128 WMI_GRP_PROFILE = 0x10, 129 WMI_GRP_SUSPEND = 0x11, 130 WMI_GRP_BCN_FILTER = 0x12, 131 WMI_GRP_WOW = 0x13, 132 WMI_GRP_RTT = 0x14, 133 WMI_GRP_SPECTRAL = 0x15, 134 WMI_GRP_STATS = 0x16, 135 WMI_GRP_ARP_NS_OFL = 0x17, 136 WMI_GRP_NLO_OFL = 0x18, 137 WMI_GRP_GTK_OFL = 0x19, 138 WMI_GRP_CSA_OFL = 0x1a, 139 WMI_GRP_CHATTER = 0x1b, 140 WMI_GRP_TID_ADDBA = 0x1c, 141 WMI_GRP_MISC = 0x1d, 142 WMI_GRP_GPIO = 0x1e, 143 WMI_GRP_FWTEST = 0x1f, 144 WMI_GRP_TDLS = 0x20, 145 WMI_GRP_RESMGR = 0x21, 146 WMI_GRP_STA_SMPS = 0x22, 147 WMI_GRP_WLAN_HB = 0x23, 148 WMI_GRP_RMC = 0x24, 149 WMI_GRP_MHF_OFL = 0x25, 150 WMI_GRP_LOCATION_SCAN = 0x26, 151 WMI_GRP_OEM = 0x27, 152 WMI_GRP_NAN = 0x28, 153 WMI_GRP_COEX = 0x29, 154 WMI_GRP_OBSS_OFL = 0x2a, 155 WMI_GRP_LPI = 0x2b, 156 WMI_GRP_EXTSCAN = 0x2c, 157 WMI_GRP_DHCP_OFL = 0x2d, 158 WMI_GRP_IPA = 0x2e, 159 WMI_GRP_MDNS_OFL = 0x2f, 160 WMI_GRP_SAP_OFL = 0x30, 161 WMI_GRP_OCB = 0x31, 162 WMI_GRP_SOC = 0x32, 163 WMI_GRP_PKT_FILTER = 0x33, 164 WMI_GRP_MAWC = 0x34, 165 WMI_GRP_PMF_OFFLOAD = 0x35, 166 WMI_GRP_BPF_OFFLOAD = 0x36, 167 WMI_GRP_NAN_DATA = 0x37, 168 WMI_GRP_PROTOTYPE = 0x38, 169 WMI_GRP_MONITOR = 0x39, 170 WMI_GRP_REGULATORY = 0x3a, 171 WMI_GRP_HW_DATA_FILTER = 0x3b, 172 WMI_GRP_WLM = 0x3c, 173 WMI_GRP_11K_OFFLOAD = 0x3d, 174 WMI_GRP_TWT = 0x3e, 175 WMI_GRP_MOTION_DET = 0x3f, 176 WMI_GRP_SPATIAL_REUSE = 0x40, 177 }; 178 179 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 180 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 181 182 #define WMI_CMD_UNSUPPORTED 0 183 184 enum wmi_tlv_cmd_id { 185 WMI_INIT_CMDID = 0x1, 186 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN), 187 WMI_STOP_SCAN_CMDID, 188 WMI_SCAN_CHAN_LIST_CMDID, 189 WMI_SCAN_SCH_PRIO_TBL_CMDID, 190 WMI_SCAN_UPDATE_REQUEST_CMDID, 191 WMI_SCAN_PROB_REQ_OUI_CMDID, 192 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID, 193 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV), 194 WMI_PDEV_SET_CHANNEL_CMDID, 195 WMI_PDEV_SET_PARAM_CMDID, 196 WMI_PDEV_PKTLOG_ENABLE_CMDID, 197 WMI_PDEV_PKTLOG_DISABLE_CMDID, 198 WMI_PDEV_SET_WMM_PARAMS_CMDID, 199 WMI_PDEV_SET_HT_CAP_IE_CMDID, 200 WMI_PDEV_SET_VHT_CAP_IE_CMDID, 201 WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 202 WMI_PDEV_SET_QUIET_MODE_CMDID, 203 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 204 WMI_PDEV_GET_TPC_CONFIG_CMDID, 205 WMI_PDEV_SET_BASE_MACADDR_CMDID, 206 WMI_PDEV_DUMP_CMDID, 207 WMI_PDEV_SET_LED_CONFIG_CMDID, 208 WMI_PDEV_GET_TEMPERATURE_CMDID, 209 WMI_PDEV_SET_LED_FLASHING_CMDID, 210 WMI_PDEV_SMART_ANT_ENABLE_CMDID, 211 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 212 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 213 WMI_PDEV_SET_CTL_TABLE_CMDID, 214 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID, 215 WMI_PDEV_FIPS_CMDID, 216 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID, 217 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 218 WMI_PDEV_GET_NFCAL_POWER_CMDID, 219 WMI_PDEV_GET_TPC_CMDID, 220 WMI_MIB_STATS_ENABLE_CMDID, 221 WMI_PDEV_SET_PCL_CMDID, 222 WMI_PDEV_SET_HW_MODE_CMDID, 223 WMI_PDEV_SET_MAC_CONFIG_CMDID, 224 WMI_PDEV_SET_ANTENNA_MODE_CMDID, 225 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID, 226 WMI_PDEV_WAL_POWER_DEBUG_CMDID, 227 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID, 228 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID, 229 WMI_PDEV_GET_ANTDIV_STATUS_CMDID, 230 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID, 231 WMI_PDEV_SET_STATS_THRESHOLD_CMDID, 232 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID, 233 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID, 234 WMI_PDEV_CHECK_CAL_VERSION_CMDID, 235 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID, 236 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID, 237 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 238 WMI_PDEV_UPDATE_PMK_CACHE_CMDID, 239 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID, 240 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID, 241 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID, 242 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID, 243 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID, 244 WMI_PDEV_DMA_RING_CFG_REQ_CMDID, 245 WMI_PDEV_HE_TB_ACTION_FRM_CMDID, 246 WMI_PDEV_PKTLOG_FILTER_CMDID, 247 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV), 248 WMI_VDEV_DELETE_CMDID, 249 WMI_VDEV_START_REQUEST_CMDID, 250 WMI_VDEV_RESTART_REQUEST_CMDID, 251 WMI_VDEV_UP_CMDID, 252 WMI_VDEV_STOP_CMDID, 253 WMI_VDEV_DOWN_CMDID, 254 WMI_VDEV_SET_PARAM_CMDID, 255 WMI_VDEV_INSTALL_KEY_CMDID, 256 WMI_VDEV_WNM_SLEEPMODE_CMDID, 257 WMI_VDEV_WMM_ADDTS_CMDID, 258 WMI_VDEV_WMM_DELTS_CMDID, 259 WMI_VDEV_SET_WMM_PARAMS_CMDID, 260 WMI_VDEV_SET_GTX_PARAMS_CMDID, 261 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID, 262 WMI_VDEV_PLMREQ_START_CMDID, 263 WMI_VDEV_PLMREQ_STOP_CMDID, 264 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID, 265 WMI_VDEV_SET_IE_CMDID, 266 WMI_VDEV_RATEMASK_CMDID, 267 WMI_VDEV_ATF_REQUEST_CMDID, 268 WMI_VDEV_SET_DSCP_TID_MAP_CMDID, 269 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 270 WMI_VDEV_SET_QUIET_MODE_CMDID, 271 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID, 272 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID, 273 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID, 274 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER), 275 WMI_PEER_DELETE_CMDID, 276 WMI_PEER_FLUSH_TIDS_CMDID, 277 WMI_PEER_SET_PARAM_CMDID, 278 WMI_PEER_ASSOC_CMDID, 279 WMI_PEER_ADD_WDS_ENTRY_CMDID, 280 WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 281 WMI_PEER_MCAST_GROUP_CMDID, 282 WMI_PEER_INFO_REQ_CMDID, 283 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID, 284 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID, 285 WMI_PEER_UPDATE_WDS_ENTRY_CMDID, 286 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID, 287 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 288 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 289 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 290 WMI_PEER_ATF_REQUEST_CMDID, 291 WMI_PEER_BWF_REQUEST_CMDID, 292 WMI_PEER_REORDER_QUEUE_SETUP_CMDID, 293 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID, 294 WMI_PEER_SET_RX_BLOCKSIZE_CMDID, 295 WMI_PEER_ANTDIV_INFO_REQ_CMDID, 296 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT), 297 WMI_PDEV_SEND_BCN_CMDID, 298 WMI_BCN_TMPL_CMDID, 299 WMI_BCN_FILTER_RX_CMDID, 300 WMI_PRB_REQ_FILTER_RX_CMDID, 301 WMI_MGMT_TX_CMDID, 302 WMI_PRB_TMPL_CMDID, 303 WMI_MGMT_TX_SEND_CMDID, 304 WMI_OFFCHAN_DATA_TX_SEND_CMDID, 305 WMI_PDEV_SEND_FD_CMDID, 306 WMI_BCN_OFFLOAD_CTRL_CMDID, 307 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID, 308 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID, 309 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 310 WMI_ADDBA_SEND_CMDID, 311 WMI_ADDBA_STATUS_CMDID, 312 WMI_DELBA_SEND_CMDID, 313 WMI_ADDBA_SET_RESP_CMDID, 314 WMI_SEND_SINGLEAMSDU_CMDID, 315 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS), 316 WMI_STA_POWERSAVE_PARAM_CMDID, 317 WMI_STA_MIMO_PS_MODE_CMDID, 318 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS), 319 WMI_PDEV_DFS_DISABLE_CMDID, 320 WMI_DFS_PHYERR_FILTER_ENA_CMDID, 321 WMI_DFS_PHYERR_FILTER_DIS_CMDID, 322 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID, 323 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID, 324 WMI_VDEV_ADFS_CH_CFG_CMDID, 325 WMI_VDEV_ADFS_OCAC_ABORT_CMDID, 326 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM), 327 WMI_ROAM_SCAN_RSSI_THRESHOLD, 328 WMI_ROAM_SCAN_PERIOD, 329 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 330 WMI_ROAM_AP_PROFILE, 331 WMI_ROAM_CHAN_LIST, 332 WMI_ROAM_SCAN_CMD, 333 WMI_ROAM_SYNCH_COMPLETE, 334 WMI_ROAM_SET_RIC_REQUEST_CMDID, 335 WMI_ROAM_INVOKE_CMDID, 336 WMI_ROAM_FILTER_CMDID, 337 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID, 338 WMI_ROAM_CONFIGURE_MAWC_CMDID, 339 WMI_ROAM_SET_MBO_PARAM_CMDID, 340 WMI_ROAM_PER_CONFIG_CMDID, 341 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN), 342 WMI_OFL_SCAN_REMOVE_AP_PROFILE, 343 WMI_OFL_SCAN_PERIOD, 344 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P), 345 WMI_P2P_DEV_SET_DISCOVERABILITY, 346 WMI_P2P_GO_SET_BEACON_IE, 347 WMI_P2P_GO_SET_PROBE_RESP_IE, 348 WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 349 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID, 350 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID, 351 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID, 352 WMI_P2P_SET_OPPPS_PARAM_CMDID, 353 WMI_P2P_LISTEN_OFFLOAD_START_CMDID, 354 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID, 355 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS), 356 WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 357 WMI_AP_PS_EGAP_PARAM_CMDID, 358 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL), 359 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE), 360 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 361 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 362 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 363 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 364 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 365 WMI_PDEV_RESUME_CMDID, 366 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER), 367 WMI_RMV_BCN_FILTER_CMDID, 368 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW), 369 WMI_WOW_DEL_WAKE_PATTERN_CMDID, 370 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 371 WMI_WOW_ENABLE_CMDID, 372 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 373 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID, 374 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID, 375 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID, 376 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID, 377 WMI_D0_WOW_ENABLE_DISABLE_CMDID, 378 WMI_EXTWOW_ENABLE_CMDID, 379 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID, 380 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID, 381 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID, 382 WMI_WOW_UDP_SVC_OFLD_CMDID, 383 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID, 384 WMI_WOW_SET_ACTION_WAKE_UP_CMDID, 385 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT), 386 WMI_RTT_TSF_CMDID, 387 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL), 388 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 389 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS), 390 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID, 391 WMI_REQUEST_STATS_EXT_CMDID, 392 WMI_REQUEST_LINK_STATS_CMDID, 393 WMI_START_LINK_STATS_CMDID, 394 WMI_CLEAR_LINK_STATS_CMDID, 395 WMI_GET_FW_MEM_DUMP_CMDID, 396 WMI_DEBUG_MESG_FLUSH_CMDID, 397 WMI_DIAG_EVENT_LOG_CONFIG_CMDID, 398 WMI_REQUEST_WLAN_STATS_CMDID, 399 WMI_REQUEST_RCPI_CMDID, 400 WMI_REQUEST_PEER_STATS_INFO_CMDID, 401 WMI_REQUEST_RADIO_CHAN_STATS_CMDID, 402 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL), 403 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID, 404 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID, 405 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 406 WMI_APFIND_CMDID, 407 WMI_PASSPOINT_LIST_CONFIG_CMDID, 408 WMI_NLO_CONFIGURE_MAWC_CMDID, 409 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 410 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 411 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 412 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER), 413 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID, 414 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID, 415 WMI_CHATTER_COALESCING_QUERY_CMDID, 416 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA), 417 WMI_PEER_TID_DELBA_CMDID, 418 WMI_STA_DTIM_PS_METHOD_CMDID, 419 WMI_STA_UAPSD_AUTO_TRIG_CMDID, 420 WMI_STA_KEEPALIVE_CMDID, 421 WMI_BA_REQ_SSN_CMDID, 422 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC), 423 WMI_PDEV_UTF_CMDID, 424 WMI_DBGLOG_CFG_CMDID, 425 WMI_PDEV_QVIT_CMDID, 426 WMI_PDEV_FTM_INTG_CMDID, 427 WMI_VDEV_SET_KEEPALIVE_CMDID, 428 WMI_VDEV_GET_KEEPALIVE_CMDID, 429 WMI_FORCE_FW_HANG_CMDID, 430 WMI_SET_MCASTBCAST_FILTER_CMDID, 431 WMI_THERMAL_MGMT_CMDID, 432 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID, 433 WMI_TPC_CHAINMASK_CONFIG_CMDID, 434 WMI_SET_ANTENNA_DIVERSITY_CMDID, 435 WMI_OCB_SET_SCHED_CMDID, 436 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID, 437 WMI_LRO_CONFIG_CMDID, 438 WMI_TRANSFER_DATA_TO_FLASH_CMDID, 439 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID, 440 WMI_VDEV_WISA_CMDID, 441 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 442 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 443 WMI_READ_DATA_FROM_FLASH_CMDID, 444 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 445 WMI_GPIO_OUTPUT_CMDID, 446 WMI_TXBF_CMDID, 447 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST), 448 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID, 449 WMI_UNIT_TEST_CMDID, 450 WMI_FWTEST_CMDID, 451 WMI_QBOOST_CFG_CMDID, 452 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS), 453 WMI_TDLS_PEER_UPDATE_CMDID, 454 WMI_TDLS_SET_OFFCHAN_MODE_CMDID, 455 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR), 456 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID, 457 WMI_RESMGR_SET_CHAN_LATENCY_CMDID, 458 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 459 WMI_STA_SMPS_PARAM_CMDID, 460 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB), 461 WMI_HB_SET_TCP_PARAMS_CMDID, 462 WMI_HB_SET_TCP_PKT_FILTER_CMDID, 463 WMI_HB_SET_UDP_PARAMS_CMDID, 464 WMI_HB_SET_UDP_PKT_FILTER_CMDID, 465 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC), 466 WMI_RMC_SET_ACTION_PERIOD_CMDID, 467 WMI_RMC_CONFIG_CMDID, 468 WMI_RMC_SET_MANUAL_LEADER_CMDID, 469 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL), 470 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID, 471 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 472 WMI_BATCH_SCAN_DISABLE_CMDID, 473 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID, 474 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM), 475 WMI_OEM_REQUEST_CMDID, 476 WMI_LPI_OEM_REQ_CMDID, 477 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN), 478 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX), 479 WMI_CHAN_AVOID_UPDATE_CMDID, 480 WMI_COEX_CONFIG_CMDID, 481 WMI_CHAN_AVOID_RPT_ALLOW_CMDID, 482 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID, 483 WMI_SAR_LIMITS_CMDID, 484 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL), 485 WMI_OBSS_SCAN_DISABLE_CMDID, 486 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI), 487 WMI_LPI_START_SCAN_CMDID, 488 WMI_LPI_STOP_SCAN_CMDID, 489 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 490 WMI_EXTSCAN_STOP_CMDID, 491 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID, 492 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID, 493 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID, 494 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID, 495 WMI_EXTSCAN_SET_CAPABILITIES_CMDID, 496 WMI_EXTSCAN_GET_CAPABILITIES_CMDID, 497 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID, 498 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID, 499 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL), 500 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA), 501 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 502 WMI_MDNS_SET_FQDN_CMDID, 503 WMI_MDNS_SET_RESPONSE_CMDID, 504 WMI_MDNS_GET_STATS_CMDID, 505 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 506 WMI_SAP_SET_BLACKLIST_PARAM_CMDID, 507 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB), 508 WMI_OCB_SET_UTC_TIME_CMDID, 509 WMI_OCB_START_TIMING_ADVERT_CMDID, 510 WMI_OCB_STOP_TIMING_ADVERT_CMDID, 511 WMI_OCB_GET_TSF_TIMER_CMDID, 512 WMI_DCC_GET_STATS_CMDID, 513 WMI_DCC_CLEAR_STATS_CMDID, 514 WMI_DCC_UPDATE_NDL_CMDID, 515 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC), 516 WMI_SOC_SET_HW_MODE_CMDID, 517 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID, 518 WMI_SOC_SET_ANTENNA_MODE_CMDID, 519 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER), 520 WMI_PACKET_FILTER_ENABLE_CMDID, 521 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC), 522 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD), 523 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 524 WMI_BPF_GET_VDEV_STATS_CMDID, 525 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID, 526 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID, 527 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID, 528 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR), 529 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 530 WMI_11D_SCAN_START_CMDID, 531 WMI_11D_SCAN_STOP_CMDID, 532 WMI_SET_INIT_COUNTRY_CMDID, 533 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 534 WMI_NDP_INITIATOR_REQ_CMDID, 535 WMI_NDP_RESPONDER_REQ_CMDID, 536 WMI_NDP_END_REQ_CMDID, 537 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER), 538 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT), 539 WMI_TWT_DISABLE_CMDID, 540 WMI_TWT_ADD_DIALOG_CMDID, 541 WMI_TWT_DEL_DIALOG_CMDID, 542 WMI_TWT_PAUSE_DIALOG_CMDID, 543 WMI_TWT_RESUME_DIALOG_CMDID, 544 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID = 545 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE), 546 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID, 547 }; 548 549 enum wmi_tlv_event_id { 550 WMI_SERVICE_READY_EVENTID = 0x1, 551 WMI_READY_EVENTID, 552 WMI_SERVICE_AVAILABLE_EVENTID, 553 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 554 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV), 555 WMI_CHAN_INFO_EVENTID, 556 WMI_PHYERR_EVENTID, 557 WMI_PDEV_DUMP_EVENTID, 558 WMI_TX_PAUSE_EVENTID, 559 WMI_DFS_RADAR_EVENTID, 560 WMI_PDEV_L1SS_TRACK_EVENTID, 561 WMI_PDEV_TEMPERATURE_EVENTID, 562 WMI_SERVICE_READY_EXT_EVENTID, 563 WMI_PDEV_FIPS_EVENTID, 564 WMI_PDEV_CHANNEL_HOPPING_EVENTID, 565 WMI_PDEV_ANI_CCK_LEVEL_EVENTID, 566 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID, 567 WMI_PDEV_TPC_EVENTID, 568 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 569 WMI_PDEV_SET_HW_MODE_RESP_EVENTID, 570 WMI_PDEV_HW_MODE_TRANSITION_EVENTID, 571 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID, 572 WMI_PDEV_ANTDIV_STATUS_EVENTID, 573 WMI_PDEV_CHIP_POWER_STATS_EVENTID, 574 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID, 575 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID, 576 WMI_PDEV_CHECK_CAL_VERSION_EVENTID, 577 WMI_PDEV_DIV_RSSI_ANTID_EVENTID, 578 WMI_PDEV_BSS_CHAN_INFO_EVENTID, 579 WMI_PDEV_UPDATE_CTLTABLE_EVENTID, 580 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, 581 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, 582 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, 583 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), 584 WMI_VDEV_STOPPED_EVENTID, 585 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 586 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID, 587 WMI_VDEV_TSF_REPORT_EVENTID, 588 WMI_VDEV_DELETE_RESP_EVENTID, 589 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID, 590 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID, 591 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER), 592 WMI_PEER_INFO_EVENTID, 593 WMI_PEER_TX_FAIL_CNT_THR_EVENTID, 594 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID, 595 WMI_PEER_STATE_EVENTID, 596 WMI_PEER_ASSOC_CONF_EVENTID, 597 WMI_PEER_DELETE_RESP_EVENTID, 598 WMI_PEER_RATECODE_LIST_EVENTID, 599 WMI_WDS_PEER_EVENTID, 600 WMI_PEER_STA_PS_STATECHG_EVENTID, 601 WMI_PEER_ANTDIV_INFO_EVENTID, 602 WMI_PEER_RESERVED0_EVENTID, 603 WMI_PEER_RESERVED1_EVENTID, 604 WMI_PEER_RESERVED2_EVENTID, 605 WMI_PEER_RESERVED3_EVENTID, 606 WMI_PEER_RESERVED4_EVENTID, 607 WMI_PEER_RESERVED5_EVENTID, 608 WMI_PEER_RESERVED6_EVENTID, 609 WMI_PEER_RESERVED7_EVENTID, 610 WMI_PEER_RESERVED8_EVENTID, 611 WMI_PEER_RESERVED9_EVENTID, 612 WMI_PEER_RESERVED10_EVENTID, 613 WMI_PEER_OPER_MODE_CHANGE_EVENTID, 614 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), 615 WMI_HOST_SWBA_EVENTID, 616 WMI_TBTTOFFSET_UPDATE_EVENTID, 617 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID, 618 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID, 619 WMI_MGMT_TX_COMPLETION_EVENTID, 620 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID, 621 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID, 622 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 623 WMI_TX_ADDBA_COMPLETE_EVENTID, 624 WMI_BA_RSP_SSN_EVENTID, 625 WMI_AGGR_STATE_TRIG_EVENTID, 626 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM), 627 WMI_PROFILE_MATCH, 628 WMI_ROAM_SYNCH_EVENTID, 629 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P), 630 WMI_P2P_NOA_EVENTID, 631 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID, 632 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS), 633 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 634 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW), 635 WMI_D0_WOW_DISABLE_ACK_EVENTID, 636 WMI_WOW_INITIAL_WAKEUP_EVENTID, 637 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT), 638 WMI_TSF_MEASUREMENT_REPORT_EVENTID, 639 WMI_RTT_ERROR_REPORT_EVENTID, 640 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS), 641 WMI_IFACE_LINK_STATS_EVENTID, 642 WMI_PEER_LINK_STATS_EVENTID, 643 WMI_RADIO_LINK_STATS_EVENTID, 644 WMI_UPDATE_FW_MEM_DUMP_EVENTID, 645 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID, 646 WMI_INST_RSSI_STATS_EVENTID, 647 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID, 648 WMI_REPORT_STATS_EVENTID, 649 WMI_UPDATE_RCPI_EVENTID, 650 WMI_PEER_STATS_INFO_EVENTID, 651 WMI_RADIO_CHAN_STATS_EVENTID, 652 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 653 WMI_NLO_SCAN_COMPLETE_EVENTID, 654 WMI_APFIND_EVENTID, 655 WMI_PASSPOINT_MATCH_EVENTID, 656 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 657 WMI_GTK_REKEY_FAIL_EVENTID, 658 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 659 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER), 660 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS), 661 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID, 662 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID, 663 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC), 664 WMI_PDEV_UTF_EVENTID, 665 WMI_DEBUG_MESG_EVENTID, 666 WMI_UPDATE_STATS_EVENTID, 667 WMI_DEBUG_PRINT_EVENTID, 668 WMI_DCS_INTERFERENCE_EVENTID, 669 WMI_PDEV_QVIT_EVENTID, 670 WMI_WLAN_PROFILE_DATA_EVENTID, 671 WMI_PDEV_FTM_INTG_EVENTID, 672 WMI_WLAN_FREQ_AVOID_EVENTID, 673 WMI_VDEV_GET_KEEPALIVE_EVENTID, 674 WMI_THERMAL_MGMT_EVENTID, 675 WMI_DIAG_DATA_CONTAINER_EVENTID, 676 WMI_HOST_AUTO_SHUTDOWN_EVENTID, 677 WMI_UPDATE_WHAL_MIB_STATS_EVENTID, 678 WMI_UPDATE_VDEV_RATE_STATS_EVENTID, 679 WMI_DIAG_EVENTID, 680 WMI_OCB_SET_SCHED_EVENTID, 681 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID, 682 WMI_RSSI_BREACH_EVENTID, 683 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID, 684 WMI_PDEV_UTF_SCPC_EVENTID, 685 WMI_READ_DATA_FROM_FLASH_EVENTID, 686 WMI_REPORT_RX_AGGR_FAILURE_EVENTID, 687 WMI_PKGID_EVENTID, 688 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO), 689 WMI_UPLOADH_EVENTID, 690 WMI_CAPTUREH_EVENTID, 691 WMI_RFKILL_STATE_CHANGE_EVENTID, 692 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS), 693 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 694 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 695 WMI_BATCH_SCAN_RESULT_EVENTID, 696 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM), 697 WMI_OEM_MEASUREMENT_REPORT_EVENTID, 698 WMI_OEM_ERROR_REPORT_EVENTID, 699 WMI_OEM_RESPONSE_EVENTID, 700 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN), 701 WMI_NAN_DISC_IFACE_CREATED_EVENTID, 702 WMI_NAN_DISC_IFACE_DELETED_EVENTID, 703 WMI_NAN_STARTED_CLUSTER_EVENTID, 704 WMI_NAN_JOINED_CLUSTER_EVENTID, 705 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX), 706 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI), 707 WMI_LPI_STATUS_EVENTID, 708 WMI_LPI_HANDOFF_EVENTID, 709 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 710 WMI_EXTSCAN_OPERATION_EVENTID, 711 WMI_EXTSCAN_TABLE_USAGE_EVENTID, 712 WMI_EXTSCAN_CACHED_RESULTS_EVENTID, 713 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID, 714 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID, 715 WMI_EXTSCAN_CAPABILITIES_EVENTID, 716 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID, 717 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 718 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 719 WMI_SAP_OFL_DEL_STA_EVENTID, 720 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB), 721 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID, 722 WMI_DCC_GET_STATS_RESP_EVENTID, 723 WMI_DCC_UPDATE_NDL_RESP_EVENTID, 724 WMI_DCC_STATS_EVENTID, 725 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC), 726 WMI_SOC_HW_MODE_TRANSITION_EVENTID, 727 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID, 728 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC), 729 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 730 WMI_BPF_VDEV_STATS_INFO_EVENTID, 731 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC), 732 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 733 WMI_11D_NEW_COUNTRY_EVENTID, 734 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 735 WMI_NDP_INITIATOR_RSP_EVENTID, 736 WMI_NDP_RESPONDER_RSP_EVENTID, 737 WMI_NDP_END_RSP_EVENTID, 738 WMI_NDP_INDICATION_EVENTID, 739 WMI_NDP_CONFIRM_EVENTID, 740 WMI_NDP_END_INDICATION_EVENTID, 741 742 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT), 743 WMI_TWT_DISABLE_EVENTID, 744 WMI_TWT_ADD_DIALOG_EVENTID, 745 WMI_TWT_DEL_DIALOG_EVENTID, 746 WMI_TWT_PAUSE_DIALOG_EVENTID, 747 WMI_TWT_RESUME_DIALOG_EVENTID, 748 }; 749 750 enum wmi_tlv_pdev_param { 751 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 752 WMI_PDEV_PARAM_RX_CHAIN_MASK, 753 WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 754 WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 755 WMI_PDEV_PARAM_TXPOWER_SCALE, 756 WMI_PDEV_PARAM_BEACON_GEN_MODE, 757 WMI_PDEV_PARAM_BEACON_TX_MODE, 758 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 759 WMI_PDEV_PARAM_PROTECTION_MODE, 760 WMI_PDEV_PARAM_DYNAMIC_BW, 761 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 762 WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 763 WMI_PDEV_PARAM_STA_KICKOUT_TH, 764 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 765 WMI_PDEV_PARAM_LTR_ENABLE, 766 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 767 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 768 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 769 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 770 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 771 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 772 WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 773 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 774 WMI_PDEV_PARAM_L1SS_ENABLE, 775 WMI_PDEV_PARAM_DSLEEP_ENABLE, 776 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 777 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 778 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 779 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 780 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 781 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 782 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 783 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 784 WMI_PDEV_PARAM_PMF_QOS, 785 WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 786 WMI_PDEV_PARAM_DCS, 787 WMI_PDEV_PARAM_ANI_ENABLE, 788 WMI_PDEV_PARAM_ANI_POLL_PERIOD, 789 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 790 WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 791 WMI_PDEV_PARAM_ANI_CCK_LEVEL, 792 WMI_PDEV_PARAM_DYNTXCHAIN, 793 WMI_PDEV_PARAM_PROXY_STA, 794 WMI_PDEV_PARAM_IDLE_PS_CONFIG, 795 WMI_PDEV_PARAM_POWER_GATING_SLEEP, 796 WMI_PDEV_PARAM_RFKILL_ENABLE, 797 WMI_PDEV_PARAM_BURST_DUR, 798 WMI_PDEV_PARAM_BURST_ENABLE, 799 WMI_PDEV_PARAM_HW_RFKILL_CONFIG, 800 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE, 801 WMI_PDEV_PARAM_L1SS_TRACK, 802 WMI_PDEV_PARAM_HYST_EN, 803 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE, 804 WMI_PDEV_PARAM_LED_SYS_STATE, 805 WMI_PDEV_PARAM_LED_ENABLE, 806 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY, 807 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE, 808 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE, 809 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD, 810 WMI_PDEV_PARAM_CTS_CBW, 811 WMI_PDEV_PARAM_WNTS_CONFIG, 812 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE, 813 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP, 814 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP, 815 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP, 816 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE, 817 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT, 818 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP, 819 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT, 820 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE, 821 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE, 822 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G, 823 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G, 824 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G, 825 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G, 826 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK, 827 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS, 828 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG, 829 WMI_PDEV_PARAM_TXPOWER_DECR_DB, 830 WMI_PDEV_PARAM_AGGR_BURST, 831 WMI_PDEV_PARAM_RX_DECAP_MODE, 832 WMI_PDEV_PARAM_FAST_CHANNEL_RESET, 833 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 834 WMI_PDEV_PARAM_ANTENNA_GAIN, 835 WMI_PDEV_PARAM_RX_FILTER, 836 WMI_PDEV_SET_MCAST_TO_UCAST_TID, 837 WMI_PDEV_PARAM_PROXY_STA_MODE, 838 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE, 839 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 840 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 841 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE, 842 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 843 WMI_PDEV_PARAM_BLOCK_INTERBSS, 844 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 845 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID, 846 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 847 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 848 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 849 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID, 850 WMI_PDEV_PARAM_EN_STATS, 851 WMI_PDEV_PARAM_MU_GROUP_POLICY, 852 WMI_PDEV_PARAM_NOISE_DETECTION, 853 WMI_PDEV_PARAM_NOISE_THRESHOLD, 854 WMI_PDEV_PARAM_DPD_ENABLE, 855 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 856 WMI_PDEV_PARAM_ATF_STRICT_SCH, 857 WMI_PDEV_PARAM_ATF_SCHED_DURATION, 858 WMI_PDEV_PARAM_ANT_PLZN, 859 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT, 860 WMI_PDEV_PARAM_SENSITIVITY_LEVEL, 861 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G, 862 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G, 863 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 864 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 865 WMI_PDEV_PARAM_CCA_THRESHOLD, 866 WMI_PDEV_PARAM_RTS_FIXED_RATE, 867 WMI_PDEV_PARAM_PDEV_RESET, 868 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET, 869 WMI_PDEV_PARAM_ARP_DBG_SRCADDR, 870 WMI_PDEV_PARAM_ARP_DBG_DSTADDR, 871 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 872 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 873 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE, 874 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 875 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT, 876 WMI_PDEV_PARAM_PROPAGATION_DELAY, 877 WMI_PDEV_PARAM_ENA_ANT_DIV, 878 WMI_PDEV_PARAM_FORCE_CHAIN_ANT, 879 WMI_PDEV_PARAM_ANT_DIV_SELFTEST, 880 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL, 881 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD, 882 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS, 883 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN, 884 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN, 885 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN, 886 WMI_PDEV_PARAM_TX_SCH_DELAY, 887 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING, 888 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU, 889 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE, 890 WMI_PDEV_PARAM_FAST_PWR_TRANSITION, 891 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE, 892 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE, 893 WMI_PDEV_PARAM_MESH_MCAST_ENABLE, 894 }; 895 896 enum wmi_tlv_vdev_param { 897 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 898 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 899 WMI_VDEV_PARAM_BEACON_INTERVAL, 900 WMI_VDEV_PARAM_LISTEN_INTERVAL, 901 WMI_VDEV_PARAM_MULTICAST_RATE, 902 WMI_VDEV_PARAM_MGMT_TX_RATE, 903 WMI_VDEV_PARAM_SLOT_TIME, 904 WMI_VDEV_PARAM_PREAMBLE, 905 WMI_VDEV_PARAM_SWBA_TIME, 906 WMI_VDEV_STATS_UPDATE_PERIOD, 907 WMI_VDEV_PWRSAVE_AGEOUT_TIME, 908 WMI_VDEV_HOST_SWBA_INTERVAL, 909 WMI_VDEV_PARAM_DTIM_PERIOD, 910 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 911 WMI_VDEV_PARAM_WDS, 912 WMI_VDEV_PARAM_ATIM_WINDOW, 913 WMI_VDEV_PARAM_BMISS_COUNT_MAX, 914 WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 915 WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 916 WMI_VDEV_PARAM_FEATURE_WMM, 917 WMI_VDEV_PARAM_CHWIDTH, 918 WMI_VDEV_PARAM_CHEXTOFFSET, 919 WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 920 WMI_VDEV_PARAM_STA_QUICKKICKOUT, 921 WMI_VDEV_PARAM_MGMT_RATE, 922 WMI_VDEV_PARAM_PROTECTION_MODE, 923 WMI_VDEV_PARAM_FIXED_RATE, 924 WMI_VDEV_PARAM_SGI, 925 WMI_VDEV_PARAM_LDPC, 926 WMI_VDEV_PARAM_TX_STBC, 927 WMI_VDEV_PARAM_RX_STBC, 928 WMI_VDEV_PARAM_INTRA_BSS_FWD, 929 WMI_VDEV_PARAM_DEF_KEYID, 930 WMI_VDEV_PARAM_NSS, 931 WMI_VDEV_PARAM_BCAST_DATA_RATE, 932 WMI_VDEV_PARAM_MCAST_DATA_RATE, 933 WMI_VDEV_PARAM_MCAST_INDICATE, 934 WMI_VDEV_PARAM_DHCP_INDICATE, 935 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 936 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 937 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 938 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 939 WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 940 WMI_VDEV_PARAM_ENABLE_RTSCTS, 941 WMI_VDEV_PARAM_TXBF, 942 WMI_VDEV_PARAM_PACKET_POWERSAVE, 943 WMI_VDEV_PARAM_DROP_UNENCRY, 944 WMI_VDEV_PARAM_TX_ENCAP_TYPE, 945 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 946 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 947 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 948 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 949 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP, 950 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP, 951 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 952 WMI_VDEV_PARAM_TX_PWRLIMIT, 953 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL, 954 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD, 955 WMI_VDEV_PARAM_ENABLE_RMC, 956 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS, 957 WMI_VDEV_PARAM_MAX_RATE, 958 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE, 959 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR, 960 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT, 961 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE, 962 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED, 963 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED, 964 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED, 965 WMI_VDEV_PARAM_INACTIVITY_CNT, 966 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS, 967 WMI_VDEV_PARAM_DTIM_POLICY, 968 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS, 969 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE, 970 WMI_VDEV_PARAM_RX_LEAK_WINDOW, 971 WMI_VDEV_PARAM_STATS_AVG_FACTOR, 972 WMI_VDEV_PARAM_DISCONNECT_TH, 973 WMI_VDEV_PARAM_RTSCTS_RATE, 974 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE, 975 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE, 976 WMI_VDEV_PARAM_TXPOWER_SCALE, 977 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB, 978 WMI_VDEV_PARAM_MCAST2UCAST_SET, 979 WMI_VDEV_PARAM_RC_NUM_RETRIES, 980 WMI_VDEV_PARAM_CABQ_MAXDUR, 981 WMI_VDEV_PARAM_MFPTEST_SET, 982 WMI_VDEV_PARAM_RTS_FIXED_RATE, 983 WMI_VDEV_PARAM_VHT_SGIMASK, 984 WMI_VDEV_PARAM_VHT80_RATEMASK, 985 WMI_VDEV_PARAM_PROXY_STA, 986 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE, 987 WMI_VDEV_PARAM_RX_DECAP_TYPE, 988 WMI_VDEV_PARAM_BW_NSS_RATEMASK, 989 WMI_VDEV_PARAM_SENSOR_AP, 990 WMI_VDEV_PARAM_BEACON_RATE, 991 WMI_VDEV_PARAM_DTIM_ENABLE_CTS, 992 WMI_VDEV_PARAM_STA_KICKOUT, 993 WMI_VDEV_PARAM_CAPABILITIES, 994 WMI_VDEV_PARAM_TSF_INCREMENT, 995 WMI_VDEV_PARAM_AMPDU_PER_AC, 996 WMI_VDEV_PARAM_RX_FILTER, 997 WMI_VDEV_PARAM_MGMT_TX_POWER, 998 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH, 999 WMI_VDEV_PARAM_AGG_SW_RETRY_TH, 1000 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS, 1001 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 1002 WMI_VDEV_PARAM_HE_DCM, 1003 WMI_VDEV_PARAM_HE_RANGE_EXT, 1004 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, 1005 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, 1006 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, 1007 WMI_VDEV_PARAM_PROTOTYPE = 0x8000, 1008 WMI_VDEV_PARAM_BSS_COLOR, 1009 WMI_VDEV_PARAM_SET_HEMU_MODE, 1010 WMI_VDEV_PARAM_TX_OFDMA_CPLEN, 1011 }; 1012 1013 enum wmi_tlv_peer_flags { 1014 WMI_TLV_PEER_AUTH = 0x00000001, 1015 WMI_TLV_PEER_QOS = 0x00000002, 1016 WMI_TLV_PEER_NEED_PTK_4_WAY = 0x00000004, 1017 WMI_TLV_PEER_NEED_GTK_2_WAY = 0x00000010, 1018 WMI_TLV_PEER_APSD = 0x00000800, 1019 WMI_TLV_PEER_HT = 0x00001000, 1020 WMI_TLV_PEER_40MHZ = 0x00002000, 1021 WMI_TLV_PEER_STBC = 0x00008000, 1022 WMI_TLV_PEER_LDPC = 0x00010000, 1023 WMI_TLV_PEER_DYN_MIMOPS = 0x00020000, 1024 WMI_TLV_PEER_STATIC_MIMOPS = 0x00040000, 1025 WMI_TLV_PEER_SPATIAL_MUX = 0x00200000, 1026 WMI_TLV_PEER_VHT = 0x02000000, 1027 WMI_TLV_PEER_80MHZ = 0x04000000, 1028 WMI_TLV_PEER_PMF = 0x08000000, 1029 WMI_PEER_IS_P2P_CAPABLE = 0x20000000, 1030 WMI_PEER_160MHZ = 0x40000000, 1031 WMI_PEER_SAFEMODE_EN = 0x80000000, 1032 1033 }; 1034 1035 /** Enum list of TLV Tags for each parameter structure type. */ 1036 enum wmi_tlv_tag { 1037 WMI_TAG_LAST_RESERVED = 15, 1038 WMI_TAG_FIRST_ARRAY_ENUM, 1039 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM, 1040 WMI_TAG_ARRAY_BYTE, 1041 WMI_TAG_ARRAY_STRUCT, 1042 WMI_TAG_ARRAY_FIXED_STRUCT, 1043 WMI_TAG_LAST_ARRAY_ENUM = 31, 1044 WMI_TAG_SERVICE_READY_EVENT, 1045 WMI_TAG_HAL_REG_CAPABILITIES, 1046 WMI_TAG_WLAN_HOST_MEM_REQ, 1047 WMI_TAG_READY_EVENT, 1048 WMI_TAG_SCAN_EVENT, 1049 WMI_TAG_PDEV_TPC_CONFIG_EVENT, 1050 WMI_TAG_CHAN_INFO_EVENT, 1051 WMI_TAG_COMB_PHYERR_RX_HDR, 1052 WMI_TAG_VDEV_START_RESPONSE_EVENT, 1053 WMI_TAG_VDEV_STOPPED_EVENT, 1054 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT, 1055 WMI_TAG_PEER_STA_KICKOUT_EVENT, 1056 WMI_TAG_MGMT_RX_HDR, 1057 WMI_TAG_TBTT_OFFSET_EVENT, 1058 WMI_TAG_TX_DELBA_COMPLETE_EVENT, 1059 WMI_TAG_TX_ADDBA_COMPLETE_EVENT, 1060 WMI_TAG_ROAM_EVENT, 1061 WMI_TAG_WOW_EVENT_INFO, 1062 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP, 1063 WMI_TAG_RTT_EVENT_HEADER, 1064 WMI_TAG_RTT_ERROR_REPORT_EVENT, 1065 WMI_TAG_RTT_MEAS_EVENT, 1066 WMI_TAG_ECHO_EVENT, 1067 WMI_TAG_FTM_INTG_EVENT, 1068 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT, 1069 WMI_TAG_GPIO_INPUT_EVENT, 1070 WMI_TAG_CSA_EVENT, 1071 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT, 1072 WMI_TAG_IGTK_INFO, 1073 WMI_TAG_DCS_INTERFERENCE_EVENT, 1074 WMI_TAG_ATH_DCS_CW_INT, 1075 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */ 1076 WMI_TAG_ATH_DCS_CW_INT, 1077 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1078 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */ 1079 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1080 WMI_TAG_WLAN_PROFILE_CTX_T, 1081 WMI_TAG_WLAN_PROFILE_T, 1082 WMI_TAG_PDEV_QVIT_EVENT, 1083 WMI_TAG_HOST_SWBA_EVENT, 1084 WMI_TAG_TIM_INFO, 1085 WMI_TAG_P2P_NOA_INFO, 1086 WMI_TAG_STATS_EVENT, 1087 WMI_TAG_AVOID_FREQ_RANGES_EVENT, 1088 WMI_TAG_AVOID_FREQ_RANGE_DESC, 1089 WMI_TAG_GTK_REKEY_FAIL_EVENT, 1090 WMI_TAG_INIT_CMD, 1091 WMI_TAG_RESOURCE_CONFIG, 1092 WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 1093 WMI_TAG_START_SCAN_CMD, 1094 WMI_TAG_STOP_SCAN_CMD, 1095 WMI_TAG_SCAN_CHAN_LIST_CMD, 1096 WMI_TAG_CHANNEL, 1097 WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1098 WMI_TAG_PDEV_SET_PARAM_CMD, 1099 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD, 1100 WMI_TAG_WMM_PARAMS, 1101 WMI_TAG_PDEV_SET_QUIET_CMD, 1102 WMI_TAG_VDEV_CREATE_CMD, 1103 WMI_TAG_VDEV_DELETE_CMD, 1104 WMI_TAG_VDEV_START_REQUEST_CMD, 1105 WMI_TAG_P2P_NOA_DESCRIPTOR, 1106 WMI_TAG_P2P_GO_SET_BEACON_IE, 1107 WMI_TAG_GTK_OFFLOAD_CMD, 1108 WMI_TAG_VDEV_UP_CMD, 1109 WMI_TAG_VDEV_STOP_CMD, 1110 WMI_TAG_VDEV_DOWN_CMD, 1111 WMI_TAG_VDEV_SET_PARAM_CMD, 1112 WMI_TAG_VDEV_INSTALL_KEY_CMD, 1113 WMI_TAG_PEER_CREATE_CMD, 1114 WMI_TAG_PEER_DELETE_CMD, 1115 WMI_TAG_PEER_FLUSH_TIDS_CMD, 1116 WMI_TAG_PEER_SET_PARAM_CMD, 1117 WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1118 WMI_TAG_VHT_RATE_SET, 1119 WMI_TAG_BCN_TMPL_CMD, 1120 WMI_TAG_PRB_TMPL_CMD, 1121 WMI_TAG_BCN_PRB_INFO, 1122 WMI_TAG_PEER_TID_ADDBA_CMD, 1123 WMI_TAG_PEER_TID_DELBA_CMD, 1124 WMI_TAG_STA_POWERSAVE_MODE_CMD, 1125 WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1126 WMI_TAG_STA_DTIM_PS_METHOD_CMD, 1127 WMI_TAG_ROAM_SCAN_MODE, 1128 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD, 1129 WMI_TAG_ROAM_SCAN_PERIOD, 1130 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1131 WMI_TAG_PDEV_SUSPEND_CMD, 1132 WMI_TAG_PDEV_RESUME_CMD, 1133 WMI_TAG_ADD_BCN_FILTER_CMD, 1134 WMI_TAG_RMV_BCN_FILTER_CMD, 1135 WMI_TAG_WOW_ENABLE_CMD, 1136 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 1137 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD, 1138 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM, 1139 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 1140 WMI_TAG_ARP_OFFLOAD_TUPLE, 1141 WMI_TAG_NS_OFFLOAD_TUPLE, 1142 WMI_TAG_FTM_INTG_CMD, 1143 WMI_TAG_STA_KEEPALIVE_CMD, 1144 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 1145 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD, 1146 WMI_TAG_AP_PS_PEER_CMD, 1147 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD, 1148 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD, 1149 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD, 1150 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD, 1151 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD, 1152 WMI_TAG_WOW_DEL_PATTERN_CMD, 1153 WMI_TAG_WOW_ADD_DEL_EVT_CMD, 1154 WMI_TAG_RTT_MEASREQ_HEAD, 1155 WMI_TAG_RTT_MEASREQ_BODY, 1156 WMI_TAG_RTT_TSF_CMD, 1157 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 1158 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 1159 WMI_TAG_REQUEST_STATS_CMD, 1160 WMI_TAG_NLO_CONFIG_CMD, 1161 WMI_TAG_NLO_CONFIGURED_PARAMETERS, 1162 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD, 1163 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD, 1164 WMI_TAG_CHATTER_SET_MODE_CMD, 1165 WMI_TAG_ECHO_CMD, 1166 WMI_TAG_VDEV_SET_KEEPALIVE_CMD, 1167 WMI_TAG_VDEV_GET_KEEPALIVE_CMD, 1168 WMI_TAG_FORCE_FW_HANG_CMD, 1169 WMI_TAG_GPIO_CONFIG_CMD, 1170 WMI_TAG_GPIO_OUTPUT_CMD, 1171 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD, 1172 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD, 1173 WMI_TAG_BCN_TX_HDR, 1174 WMI_TAG_BCN_SEND_FROM_HOST_CMD, 1175 WMI_TAG_MGMT_TX_HDR, 1176 WMI_TAG_ADDBA_CLEAR_RESP_CMD, 1177 WMI_TAG_ADDBA_SEND_CMD, 1178 WMI_TAG_DELBA_SEND_CMD, 1179 WMI_TAG_ADDBA_SETRESPONSE_CMD, 1180 WMI_TAG_SEND_SINGLEAMSDU_CMD, 1181 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD, 1182 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD, 1183 WMI_TAG_PDEV_SET_HT_IE_CMD, 1184 WMI_TAG_PDEV_SET_VHT_IE_CMD, 1185 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD, 1186 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD, 1187 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD, 1188 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD, 1189 WMI_TAG_PEER_MCAST_GROUP_CMD, 1190 WMI_TAG_ROAM_AP_PROFILE, 1191 WMI_TAG_AP_PROFILE, 1192 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD, 1193 WMI_TAG_PDEV_DFS_ENABLE_CMD, 1194 WMI_TAG_PDEV_DFS_DISABLE_CMD, 1195 WMI_TAG_WOW_ADD_PATTERN_CMD, 1196 WMI_TAG_WOW_BITMAP_PATTERN_T, 1197 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T, 1198 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T, 1199 WMI_TAG_WOW_MAGIC_PATTERN_CMD, 1200 WMI_TAG_SCAN_UPDATE_REQUEST_CMD, 1201 WMI_TAG_CHATTER_PKT_COALESCING_FILTER, 1202 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD, 1203 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD, 1204 WMI_TAG_CHATTER_COALESCING_QUERY_CMD, 1205 WMI_TAG_TXBF_CMD, 1206 WMI_TAG_DEBUG_LOG_CONFIG_CMD, 1207 WMI_TAG_NLO_EVENT, 1208 WMI_TAG_CHATTER_QUERY_REPLY_EVENT, 1209 WMI_TAG_UPLOAD_H_HDR, 1210 WMI_TAG_CAPTURE_H_EVENT_HDR, 1211 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD, 1212 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD, 1213 WMI_TAG_VDEV_WMM_ADDTS_CMD, 1214 WMI_TAG_VDEV_WMM_DELTS_CMD, 1215 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 1216 WMI_TAG_TDLS_SET_STATE_CMD, 1217 WMI_TAG_TDLS_PEER_UPDATE_CMD, 1218 WMI_TAG_TDLS_PEER_EVENT, 1219 WMI_TAG_TDLS_PEER_CAPABILITIES, 1220 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD, 1221 WMI_TAG_ROAM_CHAN_LIST, 1222 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT, 1223 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD, 1224 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD, 1225 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD, 1226 WMI_TAG_BA_REQ_SSN_CMD, 1227 WMI_TAG_BA_RSP_SSN_EVENT, 1228 WMI_TAG_STA_SMPS_FORCE_MODE_CMD, 1229 WMI_TAG_SET_MCASTBCAST_FILTER_CMD, 1230 WMI_TAG_P2P_SET_OPPPS_CMD, 1231 WMI_TAG_P2P_SET_NOA_CMD, 1232 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM, 1233 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM, 1234 WMI_TAG_STA_SMPS_PARAM_CMD, 1235 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD, 1236 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD, 1237 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS, 1238 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT, 1239 WMI_TAG_P2P_NOA_EVENT, 1240 WMI_TAG_HB_SET_ENABLE_CMD, 1241 WMI_TAG_HB_SET_TCP_PARAMS_CMD, 1242 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD, 1243 WMI_TAG_HB_SET_UDP_PARAMS_CMD, 1244 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD, 1245 WMI_TAG_HB_IND_EVENT, 1246 WMI_TAG_TX_PAUSE_EVENT, 1247 WMI_TAG_RFKILL_EVENT, 1248 WMI_TAG_DFS_RADAR_EVENT, 1249 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD, 1250 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD, 1251 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST, 1252 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO, 1253 WMI_TAG_BATCH_SCAN_ENABLE_CMD, 1254 WMI_TAG_BATCH_SCAN_DISABLE_CMD, 1255 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD, 1256 WMI_TAG_BATCH_SCAN_ENABLED_EVENT, 1257 WMI_TAG_BATCH_SCAN_RESULT_EVENT, 1258 WMI_TAG_VDEV_PLMREQ_START_CMD, 1259 WMI_TAG_VDEV_PLMREQ_STOP_CMD, 1260 WMI_TAG_THERMAL_MGMT_CMD, 1261 WMI_TAG_THERMAL_MGMT_EVENT, 1262 WMI_TAG_PEER_INFO_REQ_CMD, 1263 WMI_TAG_PEER_INFO_EVENT, 1264 WMI_TAG_PEER_INFO, 1265 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT, 1266 WMI_TAG_RMC_SET_MODE_CMD, 1267 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD, 1268 WMI_TAG_RMC_CONFIG_CMD, 1269 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD, 1270 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD, 1271 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD, 1272 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD, 1273 WMI_TAG_NAN_CMD_PARAM, 1274 WMI_TAG_NAN_EVENT_HDR, 1275 WMI_TAG_PDEV_L1SS_TRACK_EVENT, 1276 WMI_TAG_DIAG_DATA_CONTAINER_EVENT, 1277 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM, 1278 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD, 1279 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT, 1280 WMI_TAG_AGGR_STATE_TRIG_EVENT, 1281 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY, 1282 WMI_TAG_ROAM_SCAN_CMD, 1283 WMI_TAG_REQ_STATS_EXT_CMD, 1284 WMI_TAG_STATS_EXT_EVENT, 1285 WMI_TAG_OBSS_SCAN_ENABLE_CMD, 1286 WMI_TAG_OBSS_SCAN_DISABLE_CMD, 1287 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT, 1288 WMI_TAG_PDEV_SET_LED_CONFIG_CMD, 1289 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD, 1290 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT, 1291 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT, 1292 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM, 1293 WMI_TAG_WOW_IOAC_PKT_PATTERN_T, 1294 WMI_TAG_WOW_IOAC_TMR_PATTERN_T, 1295 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD, 1296 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD, 1297 WMI_TAG_WOW_IOAC_KEEPALIVE_T, 1298 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD, 1299 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD, 1300 WMI_TAG_START_LINK_STATS_CMD, 1301 WMI_TAG_CLEAR_LINK_STATS_CMD, 1302 WMI_TAG_REQUEST_LINK_STATS_CMD, 1303 WMI_TAG_IFACE_LINK_STATS_EVENT, 1304 WMI_TAG_RADIO_LINK_STATS_EVENT, 1305 WMI_TAG_PEER_STATS_EVENT, 1306 WMI_TAG_CHANNEL_STATS, 1307 WMI_TAG_RADIO_LINK_STATS, 1308 WMI_TAG_RATE_STATS, 1309 WMI_TAG_PEER_LINK_STATS, 1310 WMI_TAG_WMM_AC_STATS, 1311 WMI_TAG_IFACE_LINK_STATS, 1312 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD, 1313 WMI_TAG_LPI_START_SCAN_CMD, 1314 WMI_TAG_LPI_STOP_SCAN_CMD, 1315 WMI_TAG_LPI_RESULT_EVENT, 1316 WMI_TAG_PEER_STATE_EVENT, 1317 WMI_TAG_EXTSCAN_BUCKET_CMD, 1318 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT, 1319 WMI_TAG_EXTSCAN_START_CMD, 1320 WMI_TAG_EXTSCAN_STOP_CMD, 1321 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD, 1322 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD, 1323 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD, 1324 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD, 1325 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD, 1326 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD, 1327 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD, 1328 WMI_TAG_EXTSCAN_OPERATION_EVENT, 1329 WMI_TAG_EXTSCAN_START_STOP_EVENT, 1330 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT, 1331 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT, 1332 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT, 1333 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT, 1334 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT, 1335 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT, 1336 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT, 1337 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT, 1338 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT, 1339 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT, 1340 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT, 1341 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD, 1342 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT, 1343 WMI_TAG_UNIT_TEST_CMD, 1344 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM, 1345 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM, 1346 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM, 1347 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM, 1348 WMI_TAG_ROAM_SYNCH_EVENT, 1349 WMI_TAG_ROAM_SYNCH_COMPLETE, 1350 WMI_TAG_EXTWOW_ENABLE_CMD, 1351 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD, 1352 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD, 1353 WMI_TAG_LPI_STATUS_EVENT, 1354 WMI_TAG_LPI_HANDOFF_EVENT, 1355 WMI_TAG_VDEV_RATE_STATS_EVENT, 1356 WMI_TAG_VDEV_RATE_HT_INFO, 1357 WMI_TAG_RIC_REQUEST, 1358 WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1359 WMI_TAG_PDEV_TEMPERATURE_EVENT, 1360 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD, 1361 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD, 1362 WMI_TAG_RIC_TSPEC, 1363 WMI_TAG_TPC_CHAINMASK_CONFIG, 1364 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD, 1365 WMI_TAG_SCAN_PROB_REQ_OUI_CMD, 1366 WMI_TAG_KEY_MATERIAL, 1367 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD, 1368 WMI_TAG_SET_LED_FLASHING_CMD, 1369 WMI_TAG_MDNS_OFFLOAD_CMD, 1370 WMI_TAG_MDNS_SET_FQDN_CMD, 1371 WMI_TAG_MDNS_SET_RESP_CMD, 1372 WMI_TAG_MDNS_GET_STATS_CMD, 1373 WMI_TAG_MDNS_STATS_EVENT, 1374 WMI_TAG_ROAM_INVOKE_CMD, 1375 WMI_TAG_PDEV_RESUME_EVENT, 1376 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD, 1377 WMI_TAG_SAP_OFL_ENABLE_CMD, 1378 WMI_TAG_SAP_OFL_ADD_STA_EVENT, 1379 WMI_TAG_SAP_OFL_DEL_STA_EVENT, 1380 WMI_TAG_APFIND_CMD_PARAM, 1381 WMI_TAG_APFIND_EVENT_HDR, 1382 WMI_TAG_OCB_SET_SCHED_CMD, 1383 WMI_TAG_OCB_SET_SCHED_EVENT, 1384 WMI_TAG_OCB_SET_CONFIG_CMD, 1385 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT, 1386 WMI_TAG_OCB_SET_UTC_TIME_CMD, 1387 WMI_TAG_OCB_START_TIMING_ADVERT_CMD, 1388 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD, 1389 WMI_TAG_OCB_GET_TSF_TIMER_CMD, 1390 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT, 1391 WMI_TAG_DCC_GET_STATS_CMD, 1392 WMI_TAG_DCC_CHANNEL_STATS_REQUEST, 1393 WMI_TAG_DCC_GET_STATS_RESP_EVENT, 1394 WMI_TAG_DCC_CLEAR_STATS_CMD, 1395 WMI_TAG_DCC_UPDATE_NDL_CMD, 1396 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT, 1397 WMI_TAG_DCC_STATS_EVENT, 1398 WMI_TAG_OCB_CHANNEL, 1399 WMI_TAG_OCB_SCHEDULE_ELEMENT, 1400 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL, 1401 WMI_TAG_DCC_NDL_CHAN, 1402 WMI_TAG_QOS_PARAMETER, 1403 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG, 1404 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM, 1405 WMI_TAG_ROAM_FILTER, 1406 WMI_TAG_PASSPOINT_CONFIG_CMD, 1407 WMI_TAG_PASSPOINT_EVENT_HDR, 1408 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD, 1409 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT, 1410 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD, 1411 WMI_TAG_VDEV_TSF_REPORT_EVENT, 1412 WMI_TAG_GET_FW_MEM_DUMP, 1413 WMI_TAG_UPDATE_FW_MEM_DUMP, 1414 WMI_TAG_FW_MEM_DUMP_PARAMS, 1415 WMI_TAG_DEBUG_MESG_FLUSH, 1416 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE, 1417 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION, 1418 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG, 1419 WMI_TAG_VDEV_SET_IE_CMD, 1420 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG, 1421 WMI_TAG_RSSI_BREACH_EVENT, 1422 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP, 1423 WMI_TAG_SOC_SET_PCL_CMD, 1424 WMI_TAG_SOC_SET_HW_MODE_CMD, 1425 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT, 1426 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT, 1427 WMI_TAG_VDEV_TXRX_STREAMS, 1428 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1429 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD, 1430 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT, 1431 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T, 1432 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD, 1433 WMI_TAG_DIAG_EVENT_LOG_CONFIG, 1434 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS, 1435 WMI_TAG_PACKET_FILTER_CONFIG, 1436 WMI_TAG_PACKET_FILTER_ENABLE, 1437 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD, 1438 WMI_TAG_MGMT_TX_SEND_CMD, 1439 WMI_TAG_MGMT_TX_COMPL_EVENT, 1440 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD, 1441 WMI_TAG_WOW_UDP_SVC_OFLD_CMD, 1442 WMI_TAG_LRO_INFO_CMD, 1443 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM, 1444 WMI_TAG_SERVICE_READY_EXT_EVENT, 1445 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD, 1446 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT, 1447 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD, 1448 WMI_TAG_NLO_CONFIGURE_MAWC_CMD, 1449 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD, 1450 WMI_TAG_PEER_ASSOC_CONF_EVENT, 1451 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD, 1452 WMI_TAG_AP_PS_EGAP_PARAM_CMD, 1453 WMI_TAG_AP_PS_EGAP_INFO_EVENT, 1454 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD, 1455 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD, 1456 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT, 1457 WMI_TAG_SCPC_EVENT, 1458 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST, 1459 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT, 1460 WMI_TAG_BPF_GET_CAPABILITY_CMD, 1461 WMI_TAG_BPF_CAPABILITY_INFO_EVT, 1462 WMI_TAG_BPF_GET_VDEV_STATS_CMD, 1463 WMI_TAG_BPF_VDEV_STATS_INFO_EVT, 1464 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD, 1465 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD, 1466 WMI_TAG_VDEV_DELETE_RESP_EVENT, 1467 WMI_TAG_PEER_DELETE_RESP_EVENT, 1468 WMI_TAG_ROAM_DENSE_THRES_PARAM, 1469 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM, 1470 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD, 1471 WMI_TAG_VDEV_CONFIG_RATEMASK, 1472 WMI_TAG_PDEV_FIPS_CMD, 1473 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD, 1474 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD, 1475 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD, 1476 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD, 1477 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD, 1478 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD, 1479 WMI_TAG_PDEV_SET_CTL_TABLE_CMD, 1480 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD, 1481 WMI_TAG_FWTEST_SET_PARAM_CMD, 1482 WMI_TAG_PEER_ATF_REQUEST, 1483 WMI_TAG_VDEV_ATF_REQUEST, 1484 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD, 1485 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD, 1486 WMI_TAG_INST_RSSI_STATS_RESP, 1487 WMI_TAG_MED_UTIL_REPORT_EVENT, 1488 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT, 1489 WMI_TAG_WDS_ADDR_EVENT, 1490 WMI_TAG_PEER_RATECODE_LIST_EVENT, 1491 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT, 1492 WMI_TAG_PDEV_TPC_EVENT, 1493 WMI_TAG_ANI_OFDM_EVENT, 1494 WMI_TAG_ANI_CCK_EVENT, 1495 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT, 1496 WMI_TAG_PDEV_FIPS_EVENT, 1497 WMI_TAG_ATF_PEER_INFO, 1498 WMI_TAG_PDEV_GET_TPC_CMD, 1499 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD, 1500 WMI_TAG_QBOOST_CFG_CMD, 1501 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE, 1502 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES, 1503 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM, 1504 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN, 1505 WMI_TAG_PEER_CCK_OFDM_RATE_INFO, 1506 WMI_TAG_PEER_MCS_RATE_INFO, 1507 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR, 1508 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM, 1509 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM, 1510 WMI_TAG_MU_REPORT_TOTAL_MU, 1511 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD, 1512 WMI_TAG_ROAM_SET_MBO, 1513 WMI_TAG_MIB_STATS_ENABLE_CMD, 1514 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT, 1515 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT, 1516 WMI_TAG_NAN_STARTED_CLUSTER_EVENT, 1517 WMI_TAG_NAN_JOINED_CLUSTER_EVENT, 1518 WMI_TAG_NDI_GET_CAP_REQ, 1519 WMI_TAG_NDP_INITIATOR_REQ, 1520 WMI_TAG_NDP_RESPONDER_REQ, 1521 WMI_TAG_NDP_END_REQ, 1522 WMI_TAG_NDI_CAP_RSP_EVENT, 1523 WMI_TAG_NDP_INITIATOR_RSP_EVENT, 1524 WMI_TAG_NDP_RESPONDER_RSP_EVENT, 1525 WMI_TAG_NDP_END_RSP_EVENT, 1526 WMI_TAG_NDP_INDICATION_EVENT, 1527 WMI_TAG_NDP_CONFIRM_EVENT, 1528 WMI_TAG_NDP_END_INDICATION_EVENT, 1529 WMI_TAG_VDEV_SET_QUIET_CMD, 1530 WMI_TAG_PDEV_SET_PCL_CMD, 1531 WMI_TAG_PDEV_SET_HW_MODE_CMD, 1532 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD, 1533 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD, 1534 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT, 1535 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT, 1536 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1537 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT, 1538 WMI_TAG_COEX_CONFIG_CMD, 1539 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER, 1540 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD, 1541 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1542 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD, 1543 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD, 1544 WMI_TAG_MAC_PHY_CAPABILITIES, 1545 WMI_TAG_HW_MODE_CAPABILITIES, 1546 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS, 1547 WMI_TAG_HAL_REG_CAPABILITIES_EXT, 1548 WMI_TAG_SOC_HAL_REG_CAPABILITIES, 1549 WMI_TAG_VDEV_WISA_CMD, 1550 WMI_TAG_TX_POWER_LEVEL_STATS_EVT, 1551 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV, 1552 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG, 1553 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD, 1554 WMI_TAG_NDP_END_RSP_PER_NDI, 1555 WMI_TAG_PEER_BWF_REQUEST, 1556 WMI_TAG_BWF_PEER_INFO, 1557 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD, 1558 WMI_TAG_RMC_SET_LEADER_CMD, 1559 WMI_TAG_RMC_MANUAL_LEADER_EVENT, 1560 WMI_TAG_PER_CHAIN_RSSI_STATS, 1561 WMI_TAG_RSSI_STATS, 1562 WMI_TAG_P2P_LO_START_CMD, 1563 WMI_TAG_P2P_LO_STOP_CMD, 1564 WMI_TAG_P2P_LO_STOPPED_EVENT, 1565 WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1566 WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1567 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD, 1568 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT, 1569 WMI_TAG_READ_DATA_FROM_FLASH_CMD, 1570 WMI_TAG_READ_DATA_FROM_FLASH_EVENT, 1571 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD, 1572 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD, 1573 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID, 1574 WMI_TAG_TLV_BUF_LEN_PARAM, 1575 WMI_TAG_SERVICE_AVAILABLE_EVENT, 1576 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD, 1577 WMI_TAG_PEER_ANTDIV_INFO_EVENT, 1578 WMI_TAG_PEER_ANTDIV_INFO, 1579 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD, 1580 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT, 1581 WMI_TAG_MNT_FILTER_CMD, 1582 WMI_TAG_GET_CHIP_POWER_STATS_CMD, 1583 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT, 1584 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD, 1585 WMI_TAG_COEX_REPORT_ISOLATION_EVENT, 1586 WMI_TAG_CHAN_CCA_STATS, 1587 WMI_TAG_PEER_SIGNAL_STATS, 1588 WMI_TAG_TX_STATS, 1589 WMI_TAG_PEER_AC_TX_STATS, 1590 WMI_TAG_RX_STATS, 1591 WMI_TAG_PEER_AC_RX_STATS, 1592 WMI_TAG_REPORT_STATS_EVENT, 1593 WMI_TAG_CHAN_CCA_STATS_THRESH, 1594 WMI_TAG_PEER_SIGNAL_STATS_THRESH, 1595 WMI_TAG_TX_STATS_THRESH, 1596 WMI_TAG_RX_STATS_THRESH, 1597 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD, 1598 WMI_TAG_REQUEST_WLAN_STATS_CMD, 1599 WMI_TAG_RX_AGGR_FAILURE_EVENT, 1600 WMI_TAG_RX_AGGR_FAILURE_INFO, 1601 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD, 1602 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT, 1603 WMI_TAG_PDEV_BAND_TO_MAC, 1604 WMI_TAG_TBTT_OFFSET_INFO, 1605 WMI_TAG_TBTT_OFFSET_EXT_EVENT, 1606 WMI_TAG_SAR_LIMITS_CMD, 1607 WMI_TAG_SAR_LIMIT_CMD_ROW, 1608 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 1609 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD, 1610 WMI_TAG_VDEV_ADFS_CH_CFG_CMD, 1611 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD, 1612 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT, 1613 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT, 1614 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT, 1615 WMI_TAG_VENDOR_OUI, 1616 WMI_TAG_REQUEST_RCPI_CMD, 1617 WMI_TAG_UPDATE_RCPI_EVENT, 1618 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD, 1619 WMI_TAG_PEER_STATS_INFO, 1620 WMI_TAG_PEER_STATS_INFO_EVENT, 1621 WMI_TAG_PKGID_EVENT, 1622 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS, 1623 WMI_TAG_SET_CURRENT_COUNTRY_CMD, 1624 WMI_TAG_REGULATORY_RULE_STRUCT, 1625 WMI_TAG_REG_CHAN_LIST_CC_EVENT, 1626 WMI_TAG_11D_SCAN_START_CMD, 1627 WMI_TAG_11D_SCAN_STOP_CMD, 1628 WMI_TAG_11D_NEW_COUNTRY_EVENT, 1629 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD, 1630 WMI_TAG_RADIO_CHAN_STATS, 1631 WMI_TAG_RADIO_CHAN_STATS_EVENT, 1632 WMI_TAG_ROAM_PER_CONFIG, 1633 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD, 1634 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT, 1635 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD, 1636 WMI_TAG_HW_DATA_FILTER_CMD, 1637 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF, 1638 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT, 1639 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED, 1640 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD, 1641 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT, 1642 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD, 1643 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD, 1644 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT, 1645 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD, 1646 WMI_TAG_MAC_PHY_CHAINMASK_COMBO, 1647 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY, 1648 WMI_TAG_VDEV_SET_ARP_STATS_CMD, 1649 WMI_TAG_VDEV_GET_ARP_STATS_CMD, 1650 WMI_TAG_VDEV_GET_ARP_STATS_EVENT, 1651 WMI_TAG_IFACE_OFFLOAD_STATS, 1652 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM, 1653 WMI_TAG_RSSI_CTL_EXT, 1654 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR, 1655 WMI_TAG_COEX_BT_ACTIVITY_EVENT, 1656 WMI_TAG_VDEV_GET_TX_POWER_CMD, 1657 WMI_TAG_VDEV_TX_POWER_EVENT, 1658 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT, 1659 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD, 1660 WMI_TAG_TX_SEND_PARAMS, 1661 WMI_TAG_HE_RATE_SET, 1662 WMI_TAG_CONGESTION_STATS, 1663 WMI_TAG_SET_INIT_COUNTRY_CMD, 1664 WMI_TAG_SCAN_DBS_DUTY_CYCLE, 1665 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV, 1666 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID, 1667 WMI_TAG_THERM_THROT_CONFIG_REQUEST, 1668 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 1669 WMI_TAG_THERM_THROT_STATS_EVENT, 1670 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO, 1671 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT, 1672 WMI_TAG_OEM_DMA_RING_CAPABILITIES, 1673 WMI_TAG_OEM_DMA_RING_CFG_REQ, 1674 WMI_TAG_OEM_DMA_RING_CFG_RSP, 1675 WMI_TAG_OEM_INDIRECT_DATA, 1676 WMI_TAG_OEM_DMA_BUF_RELEASE, 1677 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY, 1678 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1679 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT, 1680 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG, 1681 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD, 1682 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG, 1683 WMI_TAG_UNIT_TEST_EVENT, 1684 WMI_TAG_ROAM_FILS_OFFLOAD, 1685 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD, 1686 WMI_TAG_PMK_CACHE, 1687 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD, 1688 WMI_TAG_ROAM_FILS_SYNCH, 1689 WMI_TAG_GTK_OFFLOAD_EXTENDED, 1690 WMI_TAG_ROAM_BG_SCAN_ROAMING, 1691 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD, 1692 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD, 1693 WMI_TAG_OIC_PING_HANDOFF_EVENT, 1694 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD, 1695 WMI_TAG_DHCP_LEASE_RENEW_EVENT, 1696 WMI_TAG_BTM_CONFIG, 1697 WMI_TAG_DEBUG_MESG_FW_DATA_STALL, 1698 WMI_TAG_WLM_CONFIG_CMD, 1699 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST, 1700 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT, 1701 WMI_TAG_ROAM_CND_SCORING_PARAM, 1702 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION, 1703 WMI_TAG_VENDOR_OUI_EXT, 1704 WMI_TAG_ROAM_SYNCH_FRAME_EVENT, 1705 WMI_TAG_FD_SEND_FROM_HOST_CMD, 1706 WMI_TAG_ENABLE_FILS_CMD, 1707 WMI_TAG_HOST_SWFDA_EVENT, 1708 WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1709 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD, 1710 WMI_TAG_STATS_PERIOD, 1711 WMI_TAG_NDL_SCHEDULE_UPDATE, 1712 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD, 1713 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE, 1714 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD, 1715 WMI_TAG_SAR2_RESULT_EVENT, 1716 WMI_TAG_SAR_CAPABILITIES, 1717 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD, 1718 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT, 1719 WMI_TAG_DMA_RING_CAPABILITIES, 1720 WMI_TAG_DMA_RING_CFG_REQ, 1721 WMI_TAG_DMA_RING_CFG_RSP, 1722 WMI_TAG_DMA_BUF_RELEASE, 1723 WMI_TAG_DMA_BUF_RELEASE_ENTRY, 1724 WMI_TAG_SAR_GET_LIMITS_CMD, 1725 WMI_TAG_SAR_GET_LIMITS_EVENT, 1726 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW, 1727 WMI_TAG_OFFLOAD_11K_REPORT, 1728 WMI_TAG_INVOKE_NEIGHBOR_REPORT, 1729 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD, 1730 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS, 1731 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS, 1732 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD, 1733 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD, 1734 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD, 1735 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT, 1736 WMI_TAG_PDEV_GET_NFCAL_POWER, 1737 WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 1738 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 1739 WMI_TAG_OBSS_COLOR_COLLISION_EVT, 1740 WMI_TAG_RUNTIME_DPD_RECAL_CMD, 1741 WMI_TAG_TWT_ENABLE_CMD, 1742 WMI_TAG_TWT_DISABLE_CMD, 1743 WMI_TAG_TWT_ADD_DIALOG_CMD, 1744 WMI_TAG_TWT_DEL_DIALOG_CMD, 1745 WMI_TAG_TWT_PAUSE_DIALOG_CMD, 1746 WMI_TAG_TWT_RESUME_DIALOG_CMD, 1747 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT, 1748 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT, 1749 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT, 1750 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT, 1751 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT, 1752 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT, 1753 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD, 1754 WMI_TAG_ROAM_SCAN_STATS_EVENT, 1755 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD, 1756 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD, 1757 WMI_TAG_GET_TPC_POWER_CMD, 1758 WMI_TAG_GET_TPC_POWER_EVENT, 1759 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA, 1760 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD, 1761 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD, 1762 WMI_TAG_MOTION_DET_START_STOP_CMD, 1763 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD, 1764 WMI_TAG_MOTION_DET_EVENT, 1765 WMI_TAG_MOTION_DET_BASE_LINE_EVENT, 1766 WMI_TAG_NDP_TRANSPORT_IP, 1767 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 1768 WMI_TAG_ESP_ESTIMATE_EVENT, 1769 WMI_TAG_NAN_HOST_CONFIG, 1770 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS, 1771 WMI_TAG_PEER_CFR_CAPTURE_CMD, 1772 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD, 1773 WMI_TAG_CHAN_WIDTH_PEER_LIST, 1774 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD, 1775 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD, 1776 WMI_TAG_PEER_EXTD2_STATS, 1777 WMI_TAG_HPCS_PULSE_START_CMD, 1778 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT, 1779 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD, 1780 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD, 1781 WMI_TAG_NAN_EVENT_INFO, 1782 WMI_TAG_NDP_CHANNEL_INFO, 1783 WMI_TAG_NDP_CMD, 1784 WMI_TAG_NDP_EVENT, 1785 /* TODO add all the missing cmds */ 1786 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301, 1787 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO, 1788 WMI_TAG_MAX 1789 }; 1790 1791 enum wmi_tlv_service { 1792 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0, 1793 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1, 1794 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2, 1795 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3, 1796 WMI_TLV_SERVICE_STA_PWRSAVE = 4, 1797 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5, 1798 WMI_TLV_SERVICE_AP_UAPSD = 6, 1799 WMI_TLV_SERVICE_AP_DFS = 7, 1800 WMI_TLV_SERVICE_11AC = 8, 1801 WMI_TLV_SERVICE_BLOCKACK = 9, 1802 WMI_TLV_SERVICE_PHYERR = 10, 1803 WMI_TLV_SERVICE_BCN_FILTER = 11, 1804 WMI_TLV_SERVICE_RTT = 12, 1805 WMI_TLV_SERVICE_WOW = 13, 1806 WMI_TLV_SERVICE_RATECTRL_CACHE = 14, 1807 WMI_TLV_SERVICE_IRAM_TIDS = 15, 1808 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16, 1809 WMI_TLV_SERVICE_NLO = 17, 1810 WMI_TLV_SERVICE_GTK_OFFLOAD = 18, 1811 WMI_TLV_SERVICE_SCAN_SCH = 19, 1812 WMI_TLV_SERVICE_CSA_OFFLOAD = 20, 1813 WMI_TLV_SERVICE_CHATTER = 21, 1814 WMI_TLV_SERVICE_COEX_FREQAVOID = 22, 1815 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23, 1816 WMI_TLV_SERVICE_FORCE_FW_HANG = 24, 1817 WMI_TLV_SERVICE_GPIO = 25, 1818 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26, 1819 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27, 1820 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28, 1821 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29, 1822 WMI_TLV_SERVICE_TX_ENCAP = 30, 1823 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31, 1824 WMI_TLV_SERVICE_EARLY_RX = 32, 1825 WMI_TLV_SERVICE_STA_SMPS = 33, 1826 WMI_TLV_SERVICE_FWTEST = 34, 1827 WMI_TLV_SERVICE_STA_WMMAC = 35, 1828 WMI_TLV_SERVICE_TDLS = 36, 1829 WMI_TLV_SERVICE_BURST = 37, 1830 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38, 1831 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39, 1832 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40, 1833 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41, 1834 WMI_TLV_SERVICE_WLAN_HB = 42, 1835 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43, 1836 WMI_TLV_SERVICE_BATCH_SCAN = 44, 1837 WMI_TLV_SERVICE_QPOWER = 45, 1838 WMI_TLV_SERVICE_PLMREQ = 46, 1839 WMI_TLV_SERVICE_THERMAL_MGMT = 47, 1840 WMI_TLV_SERVICE_RMC = 48, 1841 WMI_TLV_SERVICE_MHF_OFFLOAD = 49, 1842 WMI_TLV_SERVICE_COEX_SAR = 50, 1843 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51, 1844 WMI_TLV_SERVICE_NAN = 52, 1845 WMI_TLV_SERVICE_L1SS_STAT = 53, 1846 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54, 1847 WMI_TLV_SERVICE_OBSS_SCAN = 55, 1848 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56, 1849 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57, 1850 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58, 1851 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59, 1852 WMI_TLV_SERVICE_LPASS = 60, 1853 WMI_TLV_SERVICE_EXTSCAN = 61, 1854 WMI_TLV_SERVICE_D0WOW = 62, 1855 WMI_TLV_SERVICE_HSOFFLOAD = 63, 1856 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64, 1857 WMI_TLV_SERVICE_RX_FULL_REORDER = 65, 1858 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66, 1859 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67, 1860 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68, 1861 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69, 1862 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70, 1863 WMI_TLV_SERVICE_OCB = 71, 1864 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72, 1865 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73, 1866 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74, 1867 WMI_TLV_SERVICE_MGMT_TX_HTT = 75, 1868 WMI_TLV_SERVICE_MGMT_TX_WMI = 76, 1869 WMI_TLV_SERVICE_EXT_MSG = 77, 1870 WMI_TLV_SERVICE_MAWC = 78, 1871 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79, 1872 WMI_TLV_SERVICE_EGAP = 80, 1873 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81, 1874 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82, 1875 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83, 1876 WMI_TLV_SERVICE_ATF = 84, 1877 WMI_TLV_SERVICE_COEX_GPIO = 85, 1878 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86, 1879 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87, 1880 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88, 1881 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89, 1882 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90, 1883 WMI_TLV_SERVICE_BPF_OFFLOAD = 91, 1884 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92, 1885 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93, 1886 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94, 1887 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95, 1888 WMI_TLV_SERVICE_NAN_DATA = 96, 1889 WMI_TLV_SERVICE_NAN_RTT = 97, 1890 WMI_TLV_SERVICE_11AX = 98, 1891 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99, 1892 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100, 1893 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101, 1894 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102, 1895 WMI_TLV_SERVICE_MESH_11S = 103, 1896 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104, 1897 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105, 1898 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106, 1899 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107, 1900 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108, 1901 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109, 1902 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110, 1903 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111, 1904 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112, 1905 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113, 1906 WMI_TLV_SERVICE_RCPI_SUPPORT = 114, 1907 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115, 1908 WMI_TLV_SERVICE_PEER_STATS_INFO = 116, 1909 WMI_TLV_SERVICE_REGULATORY_DB = 117, 1910 WMI_TLV_SERVICE_11D_OFFLOAD = 118, 1911 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119, 1912 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120, 1913 WMI_TLV_SERVICE_PKT_ROUTING = 121, 1914 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122, 1915 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123, 1916 WMI_TLV_SERVICE_8SS_TX_BFEE = 124, 1917 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125, 1918 WMI_TLV_SERVICE_ACK_TIMEOUT = 126, 1919 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127, 1920 1921 WMI_MAX_SERVICE = 128, 1922 1923 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128, 1924 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129, 1925 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130, 1926 WMI_TLV_SERVICE_FILS_SUPPORT = 131, 1927 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132, 1928 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133, 1929 WMI_TLV_SERVICE_MAWC_SUPPORT = 134, 1930 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135, 1931 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136, 1932 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137, 1933 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138, 1934 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139, 1935 WMI_TLV_SERVICE_THERM_THROT = 140, 1936 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141, 1937 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142, 1938 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143, 1939 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144, 1940 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145, 1941 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146, 1942 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147, 1943 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148, 1944 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149, 1945 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150, 1946 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151, 1947 WMI_TLV_SERVICE_STA_TWT = 152, 1948 WMI_TLV_SERVICE_AP_TWT = 153, 1949 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154, 1950 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155, 1951 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156, 1952 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157, 1953 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158, 1954 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159, 1955 WMI_TLV_SERVICE_MOTION_DET = 160, 1956 WMI_TLV_SERVICE_INFRA_MBSSID = 161, 1957 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162, 1958 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163, 1959 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164, 1960 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165, 1961 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166, 1962 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167, 1963 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168, 1964 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169, 1965 WMI_TLV_SERVICE_ESP_SUPPORT = 170, 1966 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171, 1967 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172, 1968 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173, 1969 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174, 1970 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175, 1971 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176, 1972 1973 WMI_MAX_EXT_SERVICE 1974 1975 }; 1976 1977 enum { 1978 WMI_SMPS_FORCED_MODE_NONE = 0, 1979 WMI_SMPS_FORCED_MODE_DISABLED, 1980 WMI_SMPS_FORCED_MODE_STATIC, 1981 WMI_SMPS_FORCED_MODE_DYNAMIC 1982 }; 1983 1984 #define WMI_TPC_CHAINMASK_CONFIG_BAND_2G 0 1985 #define WMI_TPC_CHAINMASK_CONFIG_BAND_5G 1 1986 #define WMI_NUM_SUPPORTED_BAND_MAX 2 1987 1988 #define WMI_PEER_MIMO_PS_STATE 0x1 1989 #define WMI_PEER_AMPDU 0x2 1990 #define WMI_PEER_AUTHORIZE 0x3 1991 #define WMI_PEER_CHWIDTH 0x4 1992 #define WMI_PEER_NSS 0x5 1993 #define WMI_PEER_USE_4ADDR 0x6 1994 #define WMI_PEER_MEMBERSHIP 0x7 1995 #define WMI_PEER_USERPOS 0x8 1996 #define WMI_PEER_CRIT_PROTO_HINT_ENABLED 0x9 1997 #define WMI_PEER_TX_FAIL_CNT_THR 0xA 1998 #define WMI_PEER_SET_HW_RETRY_CTS2S 0xB 1999 #define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH 0xC 2000 #define WMI_PEER_PHYMODE 0xD 2001 #define WMI_PEER_USE_FIXED_PWR 0xE 2002 #define WMI_PEER_PARAM_FIXED_RATE 0xF 2003 #define WMI_PEER_SET_MU_WHITELIST 0x10 2004 #define WMI_PEER_SET_MAX_TX_RATE 0x11 2005 #define WMI_PEER_SET_MIN_TX_RATE 0x12 2006 #define WMI_PEER_SET_DEFAULT_ROUTING 0x13 2007 2008 /* slot time long */ 2009 #define WMI_VDEV_SLOT_TIME_LONG 0x1 2010 /* slot time short */ 2011 #define WMI_VDEV_SLOT_TIME_SHORT 0x2 2012 /* preablbe long */ 2013 #define WMI_VDEV_PREAMBLE_LONG 0x1 2014 /* preablbe short */ 2015 #define WMI_VDEV_PREAMBLE_SHORT 0x2 2016 2017 enum wmi_peer_smps_state { 2018 WMI_PEER_SMPS_PS_NONE = 0x0, 2019 WMI_PEER_SMPS_STATIC = 0x1, 2020 WMI_PEER_SMPS_DYNAMIC = 0x2 2021 }; 2022 2023 enum wmi_peer_chwidth { 2024 WMI_PEER_CHWIDTH_20MHZ = 0, 2025 WMI_PEER_CHWIDTH_40MHZ = 1, 2026 WMI_PEER_CHWIDTH_80MHZ = 2, 2027 WMI_PEER_CHWIDTH_160MHZ = 3, 2028 }; 2029 2030 enum wmi_beacon_gen_mode { 2031 WMI_BEACON_STAGGERED_MODE = 0, 2032 WMI_BEACON_BURST_MODE = 1 2033 }; 2034 2035 struct wmi_host_pdev_band_to_mac { 2036 u32 pdev_id; 2037 u32 start_freq; 2038 u32 end_freq; 2039 }; 2040 2041 struct ath11k_ppe_threshold { 2042 u32 numss_m1; 2043 u32 ru_bit_mask; 2044 u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS]; 2045 }; 2046 2047 struct ath11k_service_ext_param { 2048 u32 default_conc_scan_config_bits; 2049 u32 default_fw_config_bits; 2050 struct ath11k_ppe_threshold ppet; 2051 u32 he_cap_info; 2052 u32 mpdu_density; 2053 u32 max_bssid_rx_filters; 2054 u32 num_hw_modes; 2055 u32 num_phy; 2056 }; 2057 2058 struct ath11k_hw_mode_caps { 2059 u32 hw_mode_id; 2060 u32 phy_id_map; 2061 u32 hw_mode_config_type; 2062 }; 2063 2064 #define PSOC_HOST_MAX_PHY_SIZE (3) 2065 #define ATH11K_11B_SUPPORT BIT(0) 2066 #define ATH11K_11G_SUPPORT BIT(1) 2067 #define ATH11K_11A_SUPPORT BIT(2) 2068 #define ATH11K_11N_SUPPORT BIT(3) 2069 #define ATH11K_11AC_SUPPORT BIT(4) 2070 #define ATH11K_11AX_SUPPORT BIT(5) 2071 2072 struct ath11k_hal_reg_capabilities_ext { 2073 u32 phy_id; 2074 u32 eeprom_reg_domain; 2075 u32 eeprom_reg_domain_ext; 2076 u32 regcap1; 2077 u32 regcap2; 2078 u32 wireless_modes; 2079 u32 low_2ghz_chan; 2080 u32 high_2ghz_chan; 2081 u32 low_5ghz_chan; 2082 u32 high_5ghz_chan; 2083 }; 2084 2085 #define WMI_HOST_MAX_PDEV 3 2086 2087 struct wlan_host_mem_chunk { 2088 u32 tlv_header; 2089 u32 req_id; 2090 u32 ptr; 2091 u32 size; 2092 } __packed; 2093 2094 struct wmi_host_mem_chunk { 2095 void *vaddr; 2096 dma_addr_t paddr; 2097 u32 len; 2098 u32 req_id; 2099 }; 2100 2101 struct wmi_init_cmd_param { 2102 u32 tlv_header; 2103 struct target_resource_config *res_cfg; 2104 u8 num_mem_chunks; 2105 struct wmi_host_mem_chunk *mem_chunks; 2106 u32 hw_mode_id; 2107 u32 num_band_to_mac; 2108 struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV]; 2109 }; 2110 2111 struct wmi_pdev_band_to_mac { 2112 u32 tlv_header; 2113 u32 pdev_id; 2114 u32 start_freq; 2115 u32 end_freq; 2116 } __packed; 2117 2118 struct wmi_pdev_set_hw_mode_cmd_param { 2119 u32 tlv_header; 2120 u32 pdev_id; 2121 u32 hw_mode_index; 2122 u32 num_band_to_mac; 2123 } __packed; 2124 2125 struct wmi_ppe_threshold { 2126 u32 numss_m1; /** NSS - 1*/ 2127 union { 2128 u32 ru_count; 2129 u32 ru_mask; 2130 } __packed; 2131 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2132 } __packed; 2133 2134 #define HW_BD_INFO_SIZE 5 2135 2136 struct wmi_abi_version { 2137 u32 abi_version_0; 2138 u32 abi_version_1; 2139 u32 abi_version_ns_0; 2140 u32 abi_version_ns_1; 2141 u32 abi_version_ns_2; 2142 u32 abi_version_ns_3; 2143 } __packed; 2144 2145 struct wmi_init_cmd { 2146 u32 tlv_header; 2147 struct wmi_abi_version host_abi_vers; 2148 u32 num_host_mem_chunks; 2149 } __packed; 2150 2151 struct wmi_resource_config { 2152 u32 tlv_header; 2153 u32 num_vdevs; 2154 u32 num_peers; 2155 u32 num_offload_peers; 2156 u32 num_offload_reorder_buffs; 2157 u32 num_peer_keys; 2158 u32 num_tids; 2159 u32 ast_skid_limit; 2160 u32 tx_chain_mask; 2161 u32 rx_chain_mask; 2162 u32 rx_timeout_pri[4]; 2163 u32 rx_decap_mode; 2164 u32 scan_max_pending_req; 2165 u32 bmiss_offload_max_vdev; 2166 u32 roam_offload_max_vdev; 2167 u32 roam_offload_max_ap_profiles; 2168 u32 num_mcast_groups; 2169 u32 num_mcast_table_elems; 2170 u32 mcast2ucast_mode; 2171 u32 tx_dbg_log_size; 2172 u32 num_wds_entries; 2173 u32 dma_burst_size; 2174 u32 mac_aggr_delim; 2175 u32 rx_skip_defrag_timeout_dup_detection_check; 2176 u32 vow_config; 2177 u32 gtk_offload_max_vdev; 2178 u32 num_msdu_desc; 2179 u32 max_frag_entries; 2180 u32 num_tdls_vdevs; 2181 u32 num_tdls_conn_table_entries; 2182 u32 beacon_tx_offload_max_vdev; 2183 u32 num_multicast_filter_entries; 2184 u32 num_wow_filters; 2185 u32 num_keep_alive_pattern; 2186 u32 keep_alive_pattern_size; 2187 u32 max_tdls_concurrent_sleep_sta; 2188 u32 max_tdls_concurrent_buffer_sta; 2189 u32 wmi_send_separate; 2190 u32 num_ocb_vdevs; 2191 u32 num_ocb_channels; 2192 u32 num_ocb_schedules; 2193 u32 flag1; 2194 u32 smart_ant_cap; 2195 u32 bk_minfree; 2196 u32 be_minfree; 2197 u32 vi_minfree; 2198 u32 vo_minfree; 2199 u32 alloc_frag_desc_for_data_pkt; 2200 u32 num_ns_ext_tuples_cfg; 2201 u32 bpf_instruction_size; 2202 u32 max_bssid_rx_filters; 2203 u32 use_pdev_id; 2204 u32 max_num_dbs_scan_duty_cycle; 2205 u32 max_num_group_keys; 2206 u32 peer_map_unmap_v2_support; 2207 u32 sched_params; 2208 u32 twt_ap_pdev_count; 2209 u32 twt_ap_sta_count; 2210 } __packed; 2211 2212 struct wmi_service_ready_event { 2213 u32 fw_build_vers; 2214 struct wmi_abi_version fw_abi_vers; 2215 u32 phy_capability; 2216 u32 max_frag_entry; 2217 u32 num_rf_chains; 2218 u32 ht_cap_info; 2219 u32 vht_cap_info; 2220 u32 vht_supp_mcs; 2221 u32 hw_min_tx_power; 2222 u32 hw_max_tx_power; 2223 u32 sys_cap_info; 2224 u32 min_pkt_size_enable; 2225 u32 max_bcn_ie_size; 2226 u32 num_mem_reqs; 2227 u32 max_num_scan_channels; 2228 u32 hw_bd_id; 2229 u32 hw_bd_info[HW_BD_INFO_SIZE]; 2230 u32 max_supported_macs; 2231 u32 wmi_fw_sub_feat_caps; 2232 u32 num_dbs_hw_modes; 2233 /* txrx_chainmask 2234 * [7:0] - 2G band tx chain mask 2235 * [15:8] - 2G band rx chain mask 2236 * [23:16] - 5G band tx chain mask 2237 * [31:24] - 5G band rx chain mask 2238 */ 2239 u32 txrx_chainmask; 2240 u32 default_dbs_hw_mode_index; 2241 u32 num_msdu_desc; 2242 } __packed; 2243 2244 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32)) 2245 2246 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */ 2247 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32)) 2248 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32 2249 #define WMI_SERVICE_BITS_IN_SIZE32 4 2250 2251 struct wmi_service_ready_ext_event { 2252 u32 default_conc_scan_config_bits; 2253 u32 default_fw_config_bits; 2254 struct wmi_ppe_threshold ppet; 2255 u32 he_cap_info; 2256 u32 mpdu_density; 2257 u32 max_bssid_rx_filters; 2258 u32 fw_build_vers_ext; 2259 u32 max_nlo_ssids; 2260 u32 max_bssid_indicator; 2261 u32 he_cap_info_ext; 2262 } __packed; 2263 2264 struct wmi_soc_mac_phy_hw_mode_caps { 2265 u32 num_hw_modes; 2266 u32 num_chainmask_tables; 2267 } __packed; 2268 2269 struct wmi_hw_mode_capabilities { 2270 u32 tlv_header; 2271 u32 hw_mode_id; 2272 u32 phy_id_map; 2273 u32 hw_mode_config_type; 2274 } __packed; 2275 2276 #define WMI_MAX_HECAP_PHY_SIZE (3) 2277 2278 struct wmi_mac_phy_capabilities { 2279 u32 hw_mode_id; 2280 u32 pdev_id; 2281 u32 phy_id; 2282 u32 supported_flags; 2283 u32 supported_bands; 2284 u32 ampdu_density; 2285 u32 max_bw_supported_2g; 2286 u32 ht_cap_info_2g; 2287 u32 vht_cap_info_2g; 2288 u32 vht_supp_mcs_2g; 2289 u32 he_cap_info_2g; 2290 u32 he_supp_mcs_2g; 2291 u32 tx_chain_mask_2g; 2292 u32 rx_chain_mask_2g; 2293 u32 max_bw_supported_5g; 2294 u32 ht_cap_info_5g; 2295 u32 vht_cap_info_5g; 2296 u32 vht_supp_mcs_5g; 2297 u32 he_cap_info_5g; 2298 u32 he_supp_mcs_5g; 2299 u32 tx_chain_mask_5g; 2300 u32 rx_chain_mask_5g; 2301 u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE]; 2302 u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE]; 2303 struct wmi_ppe_threshold he_ppet2g; 2304 struct wmi_ppe_threshold he_ppet5g; 2305 u32 chainmask_table_id; 2306 u32 lmac_id; 2307 u32 he_cap_info_2g_ext; 2308 u32 he_cap_info_5g_ext; 2309 u32 he_cap_info_internal; 2310 } __packed; 2311 2312 struct wmi_hal_reg_capabilities_ext { 2313 u32 tlv_header; 2314 u32 phy_id; 2315 u32 eeprom_reg_domain; 2316 u32 eeprom_reg_domain_ext; 2317 u32 regcap1; 2318 u32 regcap2; 2319 u32 wireless_modes; 2320 u32 low_2ghz_chan; 2321 u32 high_2ghz_chan; 2322 u32 low_5ghz_chan; 2323 u32 high_5ghz_chan; 2324 } __packed; 2325 2326 struct wmi_soc_hal_reg_capabilities { 2327 u32 num_phy; 2328 } __packed; 2329 2330 /* 2 word representation of MAC addr */ 2331 struct wmi_mac_addr { 2332 union { 2333 u8 addr[6]; 2334 struct { 2335 u32 word0; 2336 u32 word1; 2337 } __packed; 2338 } __packed; 2339 } __packed; 2340 2341 struct wmi_ready_event { 2342 struct wmi_abi_version fw_abi_vers; 2343 struct wmi_mac_addr mac_addr; 2344 u32 status; 2345 u32 num_dscp_table; 2346 u32 num_extra_mac_addr; 2347 u32 num_total_peers; 2348 u32 num_extra_peers; 2349 } __packed; 2350 2351 struct wmi_service_available_event { 2352 u32 wmi_service_segment_offset; 2353 u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32]; 2354 } __packed; 2355 2356 struct ath11k_pdev_wmi { 2357 struct ath11k_wmi_base *wmi_sc; 2358 enum ath11k_htc_ep_id eid; 2359 const struct wmi_peer_flags_map *peer_flags; 2360 u32 rx_decap_mode; 2361 }; 2362 2363 struct vdev_create_params { 2364 u8 if_id; 2365 u32 type; 2366 u32 subtype; 2367 struct { 2368 u8 tx; 2369 u8 rx; 2370 } chains[NUM_NL80211_BANDS]; 2371 u32 pdev_id; 2372 }; 2373 2374 struct wmi_vdev_create_cmd { 2375 u32 tlv_header; 2376 u32 vdev_id; 2377 u32 vdev_type; 2378 u32 vdev_subtype; 2379 struct wmi_mac_addr vdev_macaddr; 2380 u32 num_cfg_txrx_streams; 2381 u32 pdev_id; 2382 } __packed; 2383 2384 struct wmi_vdev_txrx_streams { 2385 u32 tlv_header; 2386 u32 band; 2387 u32 supported_tx_streams; 2388 u32 supported_rx_streams; 2389 } __packed; 2390 2391 struct wmi_vdev_delete_cmd { 2392 u32 tlv_header; 2393 u32 vdev_id; 2394 } __packed; 2395 2396 struct wmi_vdev_up_cmd { 2397 u32 tlv_header; 2398 u32 vdev_id; 2399 u32 vdev_assoc_id; 2400 struct wmi_mac_addr vdev_bssid; 2401 struct wmi_mac_addr trans_bssid; 2402 u32 profile_idx; 2403 u32 profile_num; 2404 } __packed; 2405 2406 struct wmi_vdev_stop_cmd { 2407 u32 tlv_header; 2408 u32 vdev_id; 2409 } __packed; 2410 2411 struct wmi_vdev_down_cmd { 2412 u32 tlv_header; 2413 u32 vdev_id; 2414 } __packed; 2415 2416 #define WMI_VDEV_START_HIDDEN_SSID BIT(0) 2417 #define WMI_VDEV_START_PMF_ENABLED BIT(1) 2418 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) 2419 2420 struct wmi_ssid { 2421 u32 ssid_len; 2422 u32 ssid[8]; 2423 } __packed; 2424 2425 #define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ) 2426 2427 struct wmi_vdev_start_request_cmd { 2428 u32 tlv_header; 2429 u32 vdev_id; 2430 u32 requestor_id; 2431 u32 beacon_interval; 2432 u32 dtim_period; 2433 u32 flags; 2434 struct wmi_ssid ssid; 2435 u32 bcn_tx_rate; 2436 u32 bcn_txpower; 2437 u32 num_noa_descriptors; 2438 u32 disable_hw_ack; 2439 u32 preferred_tx_streams; 2440 u32 preferred_rx_streams; 2441 u32 he_ops; 2442 u32 cac_duration_ms; 2443 u32 regdomain; 2444 } __packed; 2445 2446 #define MGMT_TX_DL_FRM_LEN 64 2447 #define WMI_MAC_MAX_SSID_LENGTH 32 2448 struct mac_ssid { 2449 u8 length; 2450 u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH]; 2451 } __packed; 2452 2453 struct wmi_p2p_noa_descriptor { 2454 u32 type_count; 2455 u32 duration; 2456 u32 interval; 2457 u32 start_time; 2458 }; 2459 2460 struct channel_param { 2461 u8 chan_id; 2462 u8 pwr; 2463 u32 mhz; 2464 u32 half_rate:1, 2465 quarter_rate:1, 2466 dfs_set:1, 2467 dfs_set_cfreq2:1, 2468 is_chan_passive:1, 2469 allow_ht:1, 2470 allow_vht:1, 2471 allow_he:1, 2472 set_agile:1; 2473 u32 phy_mode; 2474 u32 cfreq1; 2475 u32 cfreq2; 2476 char maxpower; 2477 char minpower; 2478 char maxregpower; 2479 u8 antennamax; 2480 u8 reg_class_id; 2481 } __packed; 2482 2483 enum wmi_phy_mode { 2484 MODE_11A = 0, 2485 MODE_11G = 1, /* 11b/g Mode */ 2486 MODE_11B = 2, /* 11b Mode */ 2487 MODE_11GONLY = 3, /* 11g only Mode */ 2488 MODE_11NA_HT20 = 4, 2489 MODE_11NG_HT20 = 5, 2490 MODE_11NA_HT40 = 6, 2491 MODE_11NG_HT40 = 7, 2492 MODE_11AC_VHT20 = 8, 2493 MODE_11AC_VHT40 = 9, 2494 MODE_11AC_VHT80 = 10, 2495 MODE_11AC_VHT20_2G = 11, 2496 MODE_11AC_VHT40_2G = 12, 2497 MODE_11AC_VHT80_2G = 13, 2498 MODE_11AC_VHT80_80 = 14, 2499 MODE_11AC_VHT160 = 15, 2500 MODE_11AX_HE20 = 16, 2501 MODE_11AX_HE40 = 17, 2502 MODE_11AX_HE80 = 18, 2503 MODE_11AX_HE80_80 = 19, 2504 MODE_11AX_HE160 = 20, 2505 MODE_11AX_HE20_2G = 21, 2506 MODE_11AX_HE40_2G = 22, 2507 MODE_11AX_HE80_2G = 23, 2508 MODE_UNKNOWN = 24, 2509 MODE_MAX = 24 2510 }; 2511 2512 static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode) 2513 { 2514 switch (mode) { 2515 case MODE_11A: 2516 return "11a"; 2517 case MODE_11G: 2518 return "11g"; 2519 case MODE_11B: 2520 return "11b"; 2521 case MODE_11GONLY: 2522 return "11gonly"; 2523 case MODE_11NA_HT20: 2524 return "11na-ht20"; 2525 case MODE_11NG_HT20: 2526 return "11ng-ht20"; 2527 case MODE_11NA_HT40: 2528 return "11na-ht40"; 2529 case MODE_11NG_HT40: 2530 return "11ng-ht40"; 2531 case MODE_11AC_VHT20: 2532 return "11ac-vht20"; 2533 case MODE_11AC_VHT40: 2534 return "11ac-vht40"; 2535 case MODE_11AC_VHT80: 2536 return "11ac-vht80"; 2537 case MODE_11AC_VHT160: 2538 return "11ac-vht160"; 2539 case MODE_11AC_VHT80_80: 2540 return "11ac-vht80+80"; 2541 case MODE_11AC_VHT20_2G: 2542 return "11ac-vht20-2g"; 2543 case MODE_11AC_VHT40_2G: 2544 return "11ac-vht40-2g"; 2545 case MODE_11AC_VHT80_2G: 2546 return "11ac-vht80-2g"; 2547 case MODE_11AX_HE20: 2548 return "11ax-he20"; 2549 case MODE_11AX_HE40: 2550 return "11ax-he40"; 2551 case MODE_11AX_HE80: 2552 return "11ax-he80"; 2553 case MODE_11AX_HE80_80: 2554 return "11ax-he80+80"; 2555 case MODE_11AX_HE160: 2556 return "11ax-he160"; 2557 case MODE_11AX_HE20_2G: 2558 return "11ax-he20-2g"; 2559 case MODE_11AX_HE40_2G: 2560 return "11ax-he40-2g"; 2561 case MODE_11AX_HE80_2G: 2562 return "11ax-he80-2g"; 2563 case MODE_UNKNOWN: 2564 /* skip */ 2565 break; 2566 2567 /* no default handler to allow compiler to check that the 2568 * enum is fully handled 2569 */ 2570 }; 2571 2572 return "<unknown>"; 2573 } 2574 2575 struct wmi_channel_arg { 2576 u32 freq; 2577 u32 band_center_freq1; 2578 u32 band_center_freq2; 2579 bool passive; 2580 bool allow_ibss; 2581 bool allow_ht; 2582 bool allow_vht; 2583 bool ht40plus; 2584 bool chan_radar; 2585 bool freq2_radar; 2586 bool allow_he; 2587 u32 min_power; 2588 u32 max_power; 2589 u32 max_reg_power; 2590 u32 max_antenna_gain; 2591 enum wmi_phy_mode mode; 2592 }; 2593 2594 struct wmi_vdev_start_req_arg { 2595 u32 vdev_id; 2596 struct wmi_channel_arg channel; 2597 u32 bcn_intval; 2598 u32 dtim_period; 2599 u8 *ssid; 2600 u32 ssid_len; 2601 u32 bcn_tx_rate; 2602 u32 bcn_tx_power; 2603 bool disable_hw_ack; 2604 bool hidden_ssid; 2605 bool pmf_enabled; 2606 u32 he_ops; 2607 u32 cac_duration_ms; 2608 u32 regdomain; 2609 u32 pref_rx_streams; 2610 u32 pref_tx_streams; 2611 u32 num_noa_descriptors; 2612 }; 2613 2614 struct peer_create_params { 2615 const u8 *peer_addr; 2616 u32 peer_type; 2617 u32 vdev_id; 2618 }; 2619 2620 struct peer_delete_params { 2621 u8 vdev_id; 2622 }; 2623 2624 struct peer_flush_params { 2625 u32 peer_tid_bitmap; 2626 u8 vdev_id; 2627 }; 2628 2629 struct pdev_set_regdomain_params { 2630 u16 current_rd_in_use; 2631 u16 current_rd_2g; 2632 u16 current_rd_5g; 2633 u32 ctl_2g; 2634 u32 ctl_5g; 2635 u8 dfs_domain; 2636 u32 pdev_id; 2637 }; 2638 2639 struct rx_reorder_queue_remove_params { 2640 u8 *peer_macaddr; 2641 u16 vdev_id; 2642 u32 peer_tid_bitmap; 2643 }; 2644 2645 #define WMI_HOST_PDEV_ID_SOC 0xFF 2646 #define WMI_HOST_PDEV_ID_0 0 2647 #define WMI_HOST_PDEV_ID_1 1 2648 #define WMI_HOST_PDEV_ID_2 2 2649 2650 #define WMI_PDEV_ID_SOC 0 2651 #define WMI_PDEV_ID_1ST 1 2652 #define WMI_PDEV_ID_2ND 2 2653 #define WMI_PDEV_ID_3RD 3 2654 2655 /* Freq units in MHz */ 2656 #define REG_RULE_START_FREQ 0x0000ffff 2657 #define REG_RULE_END_FREQ 0xffff0000 2658 #define REG_RULE_FLAGS 0x0000ffff 2659 #define REG_RULE_MAX_BW 0x0000ffff 2660 #define REG_RULE_REG_PWR 0x00ff0000 2661 #define REG_RULE_ANT_GAIN 0xff000000 2662 2663 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 2664 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 2665 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 2666 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 2667 2668 #define HECAP_PHYDWORD_0 0 2669 #define HECAP_PHYDWORD_1 1 2670 #define HECAP_PHYDWORD_2 2 2671 2672 #define HECAP_PHY_SU_BFER BIT(31) 2673 #define HECAP_PHY_SU_BFEE BIT(0) 2674 #define HECAP_PHY_MU_BFER BIT(1) 2675 #define HECAP_PHY_UL_MUMIMO BIT(22) 2676 #define HECAP_PHY_UL_MUOFDMA BIT(23) 2677 2678 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \ 2679 FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0]) 2680 2681 #define HECAP_PHY_SUBFME_GET(hecap_phy) \ 2682 FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1]) 2683 2684 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \ 2685 FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1]) 2686 2687 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \ 2688 FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0]) 2689 2690 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \ 2691 FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0]) 2692 2693 #define HE_MODE_SU_TX_BFEE BIT(0) 2694 #define HE_MODE_SU_TX_BFER BIT(1) 2695 #define HE_MODE_MU_TX_BFEE BIT(2) 2696 #define HE_MODE_MU_TX_BFER BIT(3) 2697 #define HE_MODE_DL_OFDMA BIT(4) 2698 #define HE_MODE_UL_OFDMA BIT(5) 2699 #define HE_MODE_UL_MUMIMO BIT(6) 2700 2701 #define HE_DL_MUOFDMA_ENABLE 1 2702 #define HE_UL_MUOFDMA_ENABLE 1 2703 #define HE_DL_MUMIMO_ENABLE 1 2704 #define HE_MU_BFEE_ENABLE 1 2705 #define HE_SU_BFEE_ENABLE 1 2706 2707 #define HE_VHT_SOUNDING_MODE_ENABLE 1 2708 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1 2709 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1 2710 2711 /* HE or VHT Sounding */ 2712 #define HE_VHT_SOUNDING_MODE BIT(0) 2713 /* SU or MU Sounding */ 2714 #define HE_SU_MU_SOUNDING_MODE BIT(2) 2715 /* Trig or Non-Trig Sounding */ 2716 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3) 2717 2718 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 2719 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 2720 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 2721 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700 2722 2723 struct pdev_params { 2724 u32 param_id; 2725 u32 param_value; 2726 }; 2727 2728 enum wmi_peer_type { 2729 WMI_PEER_TYPE_DEFAULT = 0, 2730 WMI_PEER_TYPE_BSS = 1, 2731 WMI_PEER_TYPE_TDLS = 2, 2732 }; 2733 2734 struct wmi_peer_create_cmd { 2735 u32 tlv_header; 2736 u32 vdev_id; 2737 struct wmi_mac_addr peer_macaddr; 2738 u32 peer_type; 2739 } __packed; 2740 2741 struct wmi_peer_delete_cmd { 2742 u32 tlv_header; 2743 u32 vdev_id; 2744 struct wmi_mac_addr peer_macaddr; 2745 } __packed; 2746 2747 struct wmi_peer_reorder_queue_setup_cmd { 2748 u32 tlv_header; 2749 u32 vdev_id; 2750 struct wmi_mac_addr peer_macaddr; 2751 u32 tid; 2752 u32 queue_ptr_lo; 2753 u32 queue_ptr_hi; 2754 u32 queue_no; 2755 u32 ba_window_size_valid; 2756 u32 ba_window_size; 2757 } __packed; 2758 2759 struct wmi_peer_reorder_queue_remove_cmd { 2760 u32 tlv_header; 2761 u32 vdev_id; 2762 struct wmi_mac_addr peer_macaddr; 2763 u32 tid_mask; 2764 } __packed; 2765 2766 struct gpio_config_params { 2767 u32 gpio_num; 2768 u32 input; 2769 u32 pull_type; 2770 u32 intr_mode; 2771 }; 2772 2773 enum wmi_gpio_type { 2774 WMI_GPIO_PULL_NONE, 2775 WMI_GPIO_PULL_UP, 2776 WMI_GPIO_PULL_DOWN 2777 }; 2778 2779 enum wmi_gpio_intr_type { 2780 WMI_GPIO_INTTYPE_DISABLE, 2781 WMI_GPIO_INTTYPE_RISING_EDGE, 2782 WMI_GPIO_INTTYPE_FALLING_EDGE, 2783 WMI_GPIO_INTTYPE_BOTH_EDGE, 2784 WMI_GPIO_INTTYPE_LEVEL_LOW, 2785 WMI_GPIO_INTTYPE_LEVEL_HIGH 2786 }; 2787 2788 enum wmi_bss_chan_info_req_type { 2789 WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 2790 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 2791 }; 2792 2793 struct wmi_gpio_config_cmd_param { 2794 u32 tlv_header; 2795 u32 gpio_num; 2796 u32 input; 2797 u32 pull_type; 2798 u32 intr_mode; 2799 }; 2800 2801 struct gpio_output_params { 2802 u32 gpio_num; 2803 u32 set; 2804 }; 2805 2806 struct wmi_gpio_output_cmd_param { 2807 u32 tlv_header; 2808 u32 gpio_num; 2809 u32 set; 2810 }; 2811 2812 struct set_fwtest_params { 2813 u32 arg; 2814 u32 value; 2815 }; 2816 2817 struct wmi_fwtest_set_param_cmd_param { 2818 u32 tlv_header; 2819 u32 param_id; 2820 u32 param_value; 2821 }; 2822 2823 struct wmi_pdev_set_param_cmd { 2824 u32 tlv_header; 2825 u32 pdev_id; 2826 u32 param_id; 2827 u32 param_value; 2828 } __packed; 2829 2830 struct wmi_pdev_suspend_cmd { 2831 u32 tlv_header; 2832 u32 pdev_id; 2833 u32 suspend_opt; 2834 } __packed; 2835 2836 struct wmi_pdev_resume_cmd { 2837 u32 tlv_header; 2838 u32 pdev_id; 2839 } __packed; 2840 2841 struct wmi_pdev_bss_chan_info_req_cmd { 2842 u32 tlv_header; 2843 /* ref wmi_bss_chan_info_req_type */ 2844 u32 req_type; 2845 } __packed; 2846 2847 struct wmi_ap_ps_peer_cmd { 2848 u32 tlv_header; 2849 u32 vdev_id; 2850 struct wmi_mac_addr peer_macaddr; 2851 u32 param; 2852 u32 value; 2853 } __packed; 2854 2855 struct wmi_sta_powersave_param_cmd { 2856 u32 tlv_header; 2857 u32 vdev_id; 2858 u32 param; 2859 u32 value; 2860 } __packed; 2861 2862 struct wmi_pdev_set_regdomain_cmd { 2863 u32 tlv_header; 2864 u32 pdev_id; 2865 u32 reg_domain; 2866 u32 reg_domain_2g; 2867 u32 reg_domain_5g; 2868 u32 conformance_test_limit_2g; 2869 u32 conformance_test_limit_5g; 2870 u32 dfs_domain; 2871 } __packed; 2872 2873 struct wmi_peer_set_param_cmd { 2874 u32 tlv_header; 2875 u32 vdev_id; 2876 struct wmi_mac_addr peer_macaddr; 2877 u32 param_id; 2878 u32 param_value; 2879 } __packed; 2880 2881 struct wmi_peer_flush_tids_cmd { 2882 u32 tlv_header; 2883 u32 vdev_id; 2884 struct wmi_mac_addr peer_macaddr; 2885 u32 peer_tid_bitmap; 2886 } __packed; 2887 2888 struct wmi_dfs_phyerr_offload_cmd { 2889 u32 tlv_header; 2890 u32 pdev_id; 2891 } __packed; 2892 2893 struct wmi_bcn_offload_ctrl_cmd { 2894 u32 tlv_header; 2895 u32 vdev_id; 2896 u32 bcn_ctrl_op; 2897 } __packed; 2898 2899 enum scan_priority { 2900 SCAN_PRIORITY_VERY_LOW, 2901 SCAN_PRIORITY_LOW, 2902 SCAN_PRIORITY_MEDIUM, 2903 SCAN_PRIORITY_HIGH, 2904 SCAN_PRIORITY_VERY_HIGH, 2905 SCAN_PRIORITY_COUNT, 2906 }; 2907 2908 enum scan_dwelltime_adaptive_mode { 2909 SCAN_DWELL_MODE_DEFAULT = 0, 2910 SCAN_DWELL_MODE_CONSERVATIVE = 1, 2911 SCAN_DWELL_MODE_MODERATE = 2, 2912 SCAN_DWELL_MODE_AGGRESSIVE = 3, 2913 SCAN_DWELL_MODE_STATIC = 4 2914 }; 2915 2916 #define WLAN_SCAN_MAX_NUM_SSID 10 2917 #define WLAN_SCAN_MAX_NUM_BSSID 10 2918 #define WLAN_SCAN_MAX_NUM_CHANNELS 40 2919 2920 #define WLAN_SSID_MAX_LEN 32 2921 2922 struct element_info { 2923 u32 len; 2924 u8 *ptr; 2925 }; 2926 2927 struct wlan_ssid { 2928 u8 length; 2929 u8 ssid[WLAN_SSID_MAX_LEN]; 2930 }; 2931 2932 #define WMI_IE_BITMAP_SIZE 8 2933 2934 #define WMI_SCAN_MAX_NUM_SSID 0x0A 2935 /* prefix used by scan requestor ids on the host */ 2936 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 2937 2938 /* prefix used by scan request ids generated on the host */ 2939 /* host cycles through the lower 12 bits to generate ids */ 2940 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 2941 2942 #define WLAN_SCAN_PARAMS_MAX_SSID 16 2943 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 2944 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 2945 2946 /* Values lower than this may be refused by some firmware revisions with a scan 2947 * completion with a timedout reason. 2948 */ 2949 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 2950 2951 /* Scan priority numbers must be sequential, starting with 0 */ 2952 enum wmi_scan_priority { 2953 WMI_SCAN_PRIORITY_VERY_LOW = 0, 2954 WMI_SCAN_PRIORITY_LOW, 2955 WMI_SCAN_PRIORITY_MEDIUM, 2956 WMI_SCAN_PRIORITY_HIGH, 2957 WMI_SCAN_PRIORITY_VERY_HIGH, 2958 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 2959 }; 2960 2961 enum wmi_scan_event_type { 2962 WMI_SCAN_EVENT_STARTED = BIT(0), 2963 WMI_SCAN_EVENT_COMPLETED = BIT(1), 2964 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 2965 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3), 2966 WMI_SCAN_EVENT_DEQUEUED = BIT(4), 2967 /* possibly by high-prio scan */ 2968 WMI_SCAN_EVENT_PREEMPTED = BIT(5), 2969 WMI_SCAN_EVENT_START_FAILED = BIT(6), 2970 WMI_SCAN_EVENT_RESTARTED = BIT(7), 2971 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8), 2972 WMI_SCAN_EVENT_SUSPENDED = BIT(9), 2973 WMI_SCAN_EVENT_RESUMED = BIT(10), 2974 WMI_SCAN_EVENT_MAX = BIT(15), 2975 }; 2976 2977 enum wmi_scan_completion_reason { 2978 WMI_SCAN_REASON_COMPLETED, 2979 WMI_SCAN_REASON_CANCELLED, 2980 WMI_SCAN_REASON_PREEMPTED, 2981 WMI_SCAN_REASON_TIMEDOUT, 2982 WMI_SCAN_REASON_INTERNAL_FAILURE, 2983 WMI_SCAN_REASON_MAX, 2984 }; 2985 2986 struct wmi_start_scan_cmd { 2987 u32 tlv_header; 2988 u32 scan_id; 2989 u32 scan_req_id; 2990 u32 vdev_id; 2991 u32 scan_priority; 2992 u32 notify_scan_events; 2993 u32 dwell_time_active; 2994 u32 dwell_time_passive; 2995 u32 min_rest_time; 2996 u32 max_rest_time; 2997 u32 repeat_probe_time; 2998 u32 probe_spacing_time; 2999 u32 idle_time; 3000 u32 max_scan_time; 3001 u32 probe_delay; 3002 u32 scan_ctrl_flags; 3003 u32 burst_duration; 3004 u32 num_chan; 3005 u32 num_bssid; 3006 u32 num_ssids; 3007 u32 ie_len; 3008 u32 n_probes; 3009 struct wmi_mac_addr mac_addr; 3010 struct wmi_mac_addr mac_mask; 3011 u32 ie_bitmap[WMI_IE_BITMAP_SIZE]; 3012 u32 num_vendor_oui; 3013 u32 scan_ctrl_flags_ext; 3014 u32 dwell_time_active_2g; 3015 } __packed; 3016 3017 #define WMI_SCAN_FLAG_PASSIVE 0x1 3018 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 3019 #define WMI_SCAN_ADD_CCK_RATES 0x4 3020 #define WMI_SCAN_ADD_OFDM_RATES 0x8 3021 #define WMI_SCAN_CHAN_STAT_EVENT 0x10 3022 #define WMI_SCAN_FILTER_PROBE_REQ 0x20 3023 #define WMI_SCAN_BYPASS_DFS_CHN 0x40 3024 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 3025 #define WMI_SCAN_FILTER_PROMISCUOS 0x100 3026 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200 3027 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400 3028 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800 3029 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000 3030 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000 3031 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000 3032 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000 3033 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000 3034 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000 3035 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 3036 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 3037 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 3038 3039 #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000 3040 #define WMI_SCAN_DWELL_MODE_SHIFT 21 3041 3042 enum { 3043 WMI_SCAN_DWELL_MODE_DEFAULT = 0, 3044 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1, 3045 WMI_SCAN_DWELL_MODE_MODERATE = 2, 3046 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3, 3047 WMI_SCAN_DWELL_MODE_STATIC = 4, 3048 }; 3049 3050 #define WMI_SCAN_SET_DWELL_MODE(flag, mode) \ 3051 ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \ 3052 WMI_SCAN_DWELL_MODE_MASK)) 3053 3054 struct scan_req_params { 3055 u32 scan_id; 3056 u32 scan_req_id; 3057 u32 vdev_id; 3058 u32 pdev_id; 3059 enum scan_priority scan_priority; 3060 union { 3061 struct { 3062 u32 scan_ev_started:1, 3063 scan_ev_completed:1, 3064 scan_ev_bss_chan:1, 3065 scan_ev_foreign_chan:1, 3066 scan_ev_dequeued:1, 3067 scan_ev_preempted:1, 3068 scan_ev_start_failed:1, 3069 scan_ev_restarted:1, 3070 scan_ev_foreign_chn_exit:1, 3071 scan_ev_invalid:1, 3072 scan_ev_gpio_timeout:1, 3073 scan_ev_suspended:1, 3074 scan_ev_resumed:1; 3075 }; 3076 u32 scan_events; 3077 }; 3078 u32 dwell_time_active; 3079 u32 dwell_time_active_2g; 3080 u32 dwell_time_passive; 3081 u32 min_rest_time; 3082 u32 max_rest_time; 3083 u32 repeat_probe_time; 3084 u32 probe_spacing_time; 3085 u32 idle_time; 3086 u32 max_scan_time; 3087 u32 probe_delay; 3088 union { 3089 struct { 3090 u32 scan_f_passive:1, 3091 scan_f_bcast_probe:1, 3092 scan_f_cck_rates:1, 3093 scan_f_ofdm_rates:1, 3094 scan_f_chan_stat_evnt:1, 3095 scan_f_filter_prb_req:1, 3096 scan_f_bypass_dfs_chn:1, 3097 scan_f_continue_on_err:1, 3098 scan_f_offchan_mgmt_tx:1, 3099 scan_f_offchan_data_tx:1, 3100 scan_f_promisc_mode:1, 3101 scan_f_capture_phy_err:1, 3102 scan_f_strict_passive_pch:1, 3103 scan_f_half_rate:1, 3104 scan_f_quarter_rate:1, 3105 scan_f_force_active_dfs_chn:1, 3106 scan_f_add_tpc_ie_in_probe:1, 3107 scan_f_add_ds_ie_in_probe:1, 3108 scan_f_add_spoofed_mac_in_probe:1, 3109 scan_f_add_rand_seq_in_probe:1, 3110 scan_f_en_ie_whitelist_in_probe:1, 3111 scan_f_forced:1, 3112 scan_f_2ghz:1, 3113 scan_f_5ghz:1, 3114 scan_f_80mhz:1; 3115 }; 3116 u32 scan_flags; 3117 }; 3118 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode; 3119 u32 burst_duration; 3120 u32 num_chan; 3121 u32 num_bssid; 3122 u32 num_ssids; 3123 u32 n_probes; 3124 u32 chan_list[WLAN_SCAN_MAX_NUM_CHANNELS]; 3125 u32 notify_scan_events; 3126 struct wlan_ssid ssid[WLAN_SCAN_MAX_NUM_SSID]; 3127 struct wmi_mac_addr bssid_list[WLAN_SCAN_MAX_NUM_BSSID]; 3128 struct element_info extraie; 3129 struct element_info htcap; 3130 struct element_info vhtcap; 3131 }; 3132 3133 struct wmi_ssid_arg { 3134 int len; 3135 const u8 *ssid; 3136 }; 3137 3138 struct wmi_bssid_arg { 3139 const u8 *bssid; 3140 }; 3141 3142 struct wmi_start_scan_arg { 3143 u32 scan_id; 3144 u32 scan_req_id; 3145 u32 vdev_id; 3146 u32 scan_priority; 3147 u32 notify_scan_events; 3148 u32 dwell_time_active; 3149 u32 dwell_time_passive; 3150 u32 min_rest_time; 3151 u32 max_rest_time; 3152 u32 repeat_probe_time; 3153 u32 probe_spacing_time; 3154 u32 idle_time; 3155 u32 max_scan_time; 3156 u32 probe_delay; 3157 u32 scan_ctrl_flags; 3158 3159 u32 ie_len; 3160 u32 n_channels; 3161 u32 n_ssids; 3162 u32 n_bssids; 3163 3164 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN]; 3165 u32 channels[64]; 3166 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID]; 3167 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID]; 3168 }; 3169 3170 #define WMI_SCAN_STOP_ONE 0x00000000 3171 #define WMI_SCN_STOP_VAP_ALL 0x01000000 3172 #define WMI_SCAN_STOP_ALL 0x04000000 3173 3174 /* Prefix 0xA000 indicates that the scan request 3175 * is trigger by HOST 3176 */ 3177 #define ATH11K_SCAN_ID 0xA000 3178 3179 enum scan_cancel_req_type { 3180 WLAN_SCAN_CANCEL_SINGLE = 1, 3181 WLAN_SCAN_CANCEL_VDEV_ALL, 3182 WLAN_SCAN_CANCEL_PDEV_ALL, 3183 }; 3184 3185 struct scan_cancel_param { 3186 u32 requester; 3187 u32 scan_id; 3188 enum scan_cancel_req_type req_type; 3189 u32 vdev_id; 3190 u32 pdev_id; 3191 }; 3192 3193 struct wmi_bcn_send_from_host_cmd { 3194 u32 tlv_header; 3195 u32 vdev_id; 3196 u32 data_len; 3197 union { 3198 u32 frag_ptr; 3199 u32 frag_ptr_lo; 3200 }; 3201 u32 frame_ctrl; 3202 u32 dtim_flag; 3203 u32 bcn_antenna; 3204 u32 frag_ptr_hi; 3205 }; 3206 3207 #define WMI_CHAN_INFO_MODE GENMASK(5, 0) 3208 #define WMI_CHAN_INFO_HT40_PLUS BIT(6) 3209 #define WMI_CHAN_INFO_PASSIVE BIT(7) 3210 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8) 3211 #define WMI_CHAN_INFO_AP_DISABLED BIT(9) 3212 #define WMI_CHAN_INFO_DFS BIT(10) 3213 #define WMI_CHAN_INFO_ALLOW_HT BIT(11) 3214 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12) 3215 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13) 3216 #define WMI_CHAN_INFO_HALF_RATE BIT(14) 3217 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15) 3218 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) 3219 #define WMI_CHAN_INFO_ALLOW_HE BIT(17) 3220 3221 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) 3222 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) 3223 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16) 3224 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24) 3225 3226 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0) 3227 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8) 3228 3229 struct wmi_channel { 3230 u32 tlv_header; 3231 u32 mhz; 3232 u32 band_center_freq1; 3233 u32 band_center_freq2; 3234 u32 info; 3235 u32 reg_info_1; 3236 u32 reg_info_2; 3237 } __packed; 3238 3239 struct wmi_mgmt_params { 3240 void *tx_frame; 3241 u16 frm_len; 3242 u8 vdev_id; 3243 u16 chanfreq; 3244 void *pdata; 3245 u16 desc_id; 3246 u8 *macaddr; 3247 void *qdf_ctx; 3248 }; 3249 3250 enum wmi_sta_ps_mode { 3251 WMI_STA_PS_MODE_DISABLED = 0, 3252 WMI_STA_PS_MODE_ENABLED = 1, 3253 }; 3254 3255 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF 3256 #define WMI_SMPS_MASK_UPPER_3BITS 0x7 3257 #define WMI_SMPS_PARAM_VALUE_SHIFT 29 3258 3259 #define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1 3260 #define ATH11K_WMI_FW_HANG_DELAY 0 3261 3262 /* type, 0:unused 1: ASSERT 2: not respond detect command 3263 * delay_time_ms, the simulate will delay time 3264 */ 3265 3266 struct wmi_force_fw_hang_cmd { 3267 u32 tlv_header; 3268 u32 type; 3269 u32 delay_time_ms; 3270 }; 3271 3272 struct wmi_vdev_set_param_cmd { 3273 u32 tlv_header; 3274 u32 vdev_id; 3275 u32 param_id; 3276 u32 param_value; 3277 } __packed; 3278 3279 enum wmi_stats_id { 3280 WMI_REQUEST_PEER_STAT = BIT(0), 3281 WMI_REQUEST_AP_STAT = BIT(1), 3282 WMI_REQUEST_PDEV_STAT = BIT(2), 3283 WMI_REQUEST_VDEV_STAT = BIT(3), 3284 WMI_REQUEST_BCNFLT_STAT = BIT(4), 3285 WMI_REQUEST_VDEV_RATE_STAT = BIT(5), 3286 WMI_REQUEST_INST_STAT = BIT(6), 3287 WMI_REQUEST_MIB_STAT = BIT(7), 3288 WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8), 3289 WMI_REQUEST_CONGESTION_STAT = BIT(9), 3290 WMI_REQUEST_PEER_EXTD_STAT = BIT(10), 3291 WMI_REQUEST_BCN_STAT = BIT(11), 3292 WMI_REQUEST_BCN_STAT_RESET = BIT(12), 3293 WMI_REQUEST_PEER_EXTD2_STAT = BIT(13), 3294 }; 3295 3296 struct wmi_request_stats_cmd { 3297 u32 tlv_header; 3298 enum wmi_stats_id stats_id; 3299 u32 vdev_id; 3300 struct wmi_mac_addr peer_macaddr; 3301 u32 pdev_id; 3302 } __packed; 3303 3304 #define WMI_BEACON_TX_BUFFER_SIZE 512 3305 3306 struct wmi_bcn_tmpl_cmd { 3307 u32 tlv_header; 3308 u32 vdev_id; 3309 u32 tim_ie_offset; 3310 u32 buf_len; 3311 u32 csa_switch_count_offset; 3312 u32 ext_csa_switch_count_offset; 3313 u32 csa_event_bitmap; 3314 u32 mbssid_ie_offset; 3315 u32 esp_ie_offset; 3316 } __packed; 3317 3318 struct wmi_key_seq_counter { 3319 u32 key_seq_counter_l; 3320 u32 key_seq_counter_h; 3321 } __packed; 3322 3323 struct wmi_vdev_install_key_cmd { 3324 u32 tlv_header; 3325 u32 vdev_id; 3326 struct wmi_mac_addr peer_macaddr; 3327 u32 key_idx; 3328 u32 key_flags; 3329 u32 key_cipher; 3330 struct wmi_key_seq_counter key_rsc_counter; 3331 struct wmi_key_seq_counter key_global_rsc_counter; 3332 struct wmi_key_seq_counter key_tsc_counter; 3333 u8 wpi_key_rsc_counter[16]; 3334 u8 wpi_key_tsc_counter[16]; 3335 u32 key_len; 3336 u32 key_txmic_len; 3337 u32 key_rxmic_len; 3338 u32 is_group_key_id_valid; 3339 u32 group_key_id; 3340 3341 /* Followed by key_data containing key followed by 3342 * tx mic and then rx mic 3343 */ 3344 } __packed; 3345 3346 struct wmi_vdev_install_key_arg { 3347 u32 vdev_id; 3348 const u8 *macaddr; 3349 u32 key_idx; 3350 u32 key_flags; 3351 u32 key_cipher; 3352 u32 key_len; 3353 u32 key_txmic_len; 3354 u32 key_rxmic_len; 3355 u64 key_rsc_counter; 3356 const void *key_data; 3357 }; 3358 3359 #define WMI_MAX_SUPPORTED_RATES 128 3360 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3 3361 #define WMI_HOST_MAX_HE_RATE_SET 3 3362 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0 3363 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1 3364 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2 3365 3366 struct wmi_rate_set_arg { 3367 u32 num_rates; 3368 u8 rates[WMI_MAX_SUPPORTED_RATES]; 3369 }; 3370 3371 struct peer_assoc_params { 3372 struct wmi_mac_addr peer_macaddr; 3373 u32 vdev_id; 3374 u32 peer_new_assoc; 3375 u32 peer_associd; 3376 u32 peer_flags; 3377 u32 peer_caps; 3378 u32 peer_listen_intval; 3379 u32 peer_ht_caps; 3380 u32 peer_max_mpdu; 3381 u32 peer_mpdu_density; 3382 u32 peer_rate_caps; 3383 u32 peer_nss; 3384 u32 peer_vht_caps; 3385 u32 peer_phymode; 3386 u32 peer_ht_info[2]; 3387 struct wmi_rate_set_arg peer_legacy_rates; 3388 struct wmi_rate_set_arg peer_ht_rates; 3389 u32 rx_max_rate; 3390 u32 rx_mcs_set; 3391 u32 tx_max_rate; 3392 u32 tx_mcs_set; 3393 u8 vht_capable; 3394 u32 tx_max_mcs_nss; 3395 u32 peer_bw_rxnss_override; 3396 bool is_pmf_enabled; 3397 bool is_wme_set; 3398 bool qos_flag; 3399 bool apsd_flag; 3400 bool ht_flag; 3401 bool bw_40; 3402 bool bw_80; 3403 bool bw_160; 3404 bool stbc_flag; 3405 bool ldpc_flag; 3406 bool static_mimops_flag; 3407 bool dynamic_mimops_flag; 3408 bool spatial_mux_flag; 3409 bool vht_flag; 3410 bool vht_ng_flag; 3411 bool need_ptk_4_way; 3412 bool need_gtk_2_way; 3413 bool auth_flag; 3414 bool safe_mode_enabled; 3415 bool amsdu_disable; 3416 /* Use common structure */ 3417 u8 peer_mac[ETH_ALEN]; 3418 3419 bool he_flag; 3420 u32 peer_he_cap_macinfo[2]; 3421 u32 peer_he_cap_macinfo_internal; 3422 u32 peer_he_ops; 3423 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; 3424 u32 peer_he_mcs_count; 3425 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3426 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3427 bool twt_responder; 3428 bool twt_requester; 3429 struct ath11k_ppe_threshold peer_ppet; 3430 }; 3431 3432 struct wmi_peer_assoc_complete_cmd { 3433 u32 tlv_header; 3434 struct wmi_mac_addr peer_macaddr; 3435 u32 vdev_id; 3436 u32 peer_new_assoc; 3437 u32 peer_associd; 3438 u32 peer_flags; 3439 u32 peer_caps; 3440 u32 peer_listen_intval; 3441 u32 peer_ht_caps; 3442 u32 peer_max_mpdu; 3443 u32 peer_mpdu_density; 3444 u32 peer_rate_caps; 3445 u32 peer_nss; 3446 u32 peer_vht_caps; 3447 u32 peer_phymode; 3448 u32 peer_ht_info[2]; 3449 u32 num_peer_legacy_rates; 3450 u32 num_peer_ht_rates; 3451 u32 peer_bw_rxnss_override; 3452 struct wmi_ppe_threshold peer_ppet; 3453 u32 peer_he_cap_info; 3454 u32 peer_he_ops; 3455 u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE]; 3456 u32 peer_he_mcs; 3457 u32 peer_he_cap_info_ext; 3458 u32 peer_he_cap_info_internal; 3459 } __packed; 3460 3461 struct wmi_stop_scan_cmd { 3462 u32 tlv_header; 3463 u32 requestor; 3464 u32 scan_id; 3465 u32 req_type; 3466 u32 vdev_id; 3467 u32 pdev_id; 3468 }; 3469 3470 struct scan_chan_list_params { 3471 u32 pdev_id; 3472 u16 nallchans; 3473 struct channel_param ch_param[1]; 3474 }; 3475 3476 struct wmi_scan_chan_list_cmd { 3477 u32 tlv_header; 3478 u32 num_scan_chans; 3479 u32 flags; 3480 u32 pdev_id; 3481 } __packed; 3482 3483 #define WMI_MGMT_SEND_DOWNLD_LEN 64 3484 3485 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0) 3486 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8) 3487 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20) 3488 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28) 3489 3490 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0) 3491 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8) 3492 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15) 3493 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20) 3494 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21) 3495 3496 struct wmi_mgmt_send_params { 3497 u32 tlv_header; 3498 u32 tx_params_dword0; 3499 u32 tx_params_dword1; 3500 }; 3501 3502 struct wmi_mgmt_send_cmd { 3503 u32 tlv_header; 3504 u32 vdev_id; 3505 u32 desc_id; 3506 u32 chanfreq; 3507 u32 paddr_lo; 3508 u32 paddr_hi; 3509 u32 frame_len; 3510 u32 buf_len; 3511 u32 tx_params_valid; 3512 3513 /* This TLV is followed by struct wmi_mgmt_frame */ 3514 3515 /* Followed by struct wmi_mgmt_send_params */ 3516 } __packed; 3517 3518 struct wmi_sta_powersave_mode_cmd { 3519 u32 tlv_header; 3520 u32 vdev_id; 3521 u32 sta_ps_mode; 3522 }; 3523 3524 struct wmi_sta_smps_force_mode_cmd { 3525 u32 tlv_header; 3526 u32 vdev_id; 3527 u32 forced_mode; 3528 }; 3529 3530 struct wmi_sta_smps_param_cmd { 3531 u32 tlv_header; 3532 u32 vdev_id; 3533 u32 param; 3534 u32 value; 3535 }; 3536 3537 struct wmi_bcn_prb_info { 3538 u32 tlv_header; 3539 u32 caps; 3540 u32 erp; 3541 } __packed; 3542 3543 enum { 3544 WMI_PDEV_SUSPEND, 3545 WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 3546 }; 3547 3548 struct green_ap_ps_params { 3549 u32 value; 3550 }; 3551 3552 struct wmi_pdev_green_ap_ps_enable_cmd_param { 3553 u32 tlv_header; 3554 u32 pdev_id; 3555 u32 enable; 3556 }; 3557 3558 struct ap_ps_params { 3559 u32 vdev_id; 3560 u32 param; 3561 u32 value; 3562 }; 3563 3564 struct vdev_set_params { 3565 u32 if_id; 3566 u32 param_id; 3567 u32 param_value; 3568 }; 3569 3570 struct stats_request_params { 3571 u32 stats_id; 3572 u32 vdev_id; 3573 u32 pdev_id; 3574 }; 3575 3576 enum set_init_cc_type { 3577 WMI_COUNTRY_INFO_TYPE_ALPHA, 3578 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE, 3579 WMI_COUNTRY_INFO_TYPE_REGDOMAIN, 3580 }; 3581 3582 enum set_init_cc_flags { 3583 INVALID_CC, 3584 CC_IS_SET, 3585 REGDMN_IS_SET, 3586 ALPHA_IS_SET, 3587 }; 3588 3589 struct wmi_init_country_params { 3590 union { 3591 u16 country_code; 3592 u16 regdom_id; 3593 u8 alpha2[3]; 3594 } cc_info; 3595 enum set_init_cc_flags flags; 3596 }; 3597 3598 struct wmi_init_country_cmd { 3599 u32 tlv_header; 3600 u32 pdev_id; 3601 u32 init_cc_type; 3602 union { 3603 u32 country_code; 3604 u32 regdom_id; 3605 u32 alpha2; 3606 } cc_info; 3607 } __packed; 3608 3609 struct wmi_pdev_pktlog_filter_info { 3610 u32 tlv_header; 3611 struct wmi_mac_addr peer_macaddr; 3612 } __packed; 3613 3614 struct wmi_pdev_pktlog_filter_cmd { 3615 u32 tlv_header; 3616 u32 pdev_id; 3617 u32 enable; 3618 u32 filter_type; 3619 u32 num_mac; 3620 } __packed; 3621 3622 enum ath11k_wmi_pktlog_enable { 3623 ATH11K_WMI_PKTLOG_ENABLE_AUTO = 0, 3624 ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1, 3625 }; 3626 3627 struct wmi_pktlog_enable_cmd { 3628 u32 tlv_header; 3629 u32 pdev_id; 3630 u32 evlist; /* WMI_PKTLOG_EVENT */ 3631 u32 enable; 3632 } __packed; 3633 3634 struct wmi_pktlog_disable_cmd { 3635 u32 tlv_header; 3636 u32 pdev_id; 3637 } __packed; 3638 3639 #define DFS_PHYERR_UNIT_TEST_CMD 0 3640 #define DFS_UNIT_TEST_MODULE 0x2b 3641 #define DFS_UNIT_TEST_TOKEN 0xAA 3642 3643 enum dfs_test_args_idx { 3644 DFS_TEST_CMDID = 0, 3645 DFS_TEST_PDEV_ID, 3646 DFS_TEST_RADAR_PARAM, 3647 DFS_MAX_TEST_ARGS, 3648 }; 3649 3650 struct wmi_dfs_unit_test_arg { 3651 u32 cmd_id; 3652 u32 pdev_id; 3653 u32 radar_param; 3654 }; 3655 3656 struct wmi_unit_test_cmd { 3657 u32 tlv_header; 3658 u32 vdev_id; 3659 u32 module_id; 3660 u32 num_args; 3661 u32 diag_token; 3662 /* Followed by test args*/ 3663 } __packed; 3664 3665 #define MAX_SUPPORTED_RATES 128 3666 3667 #define WMI_PEER_AUTH 0x00000001 3668 #define WMI_PEER_QOS 0x00000002 3669 #define WMI_PEER_NEED_PTK_4_WAY 0x00000004 3670 #define WMI_PEER_NEED_GTK_2_WAY 0x00000010 3671 #define WMI_PEER_HE 0x00000400 3672 #define WMI_PEER_APSD 0x00000800 3673 #define WMI_PEER_HT 0x00001000 3674 #define WMI_PEER_40MHZ 0x00002000 3675 #define WMI_PEER_STBC 0x00008000 3676 #define WMI_PEER_LDPC 0x00010000 3677 #define WMI_PEER_DYN_MIMOPS 0x00020000 3678 #define WMI_PEER_STATIC_MIMOPS 0x00040000 3679 #define WMI_PEER_SPATIAL_MUX 0x00200000 3680 #define WMI_PEER_TWT_REQ 0x00400000 3681 #define WMI_PEER_TWT_RESP 0x00800000 3682 #define WMI_PEER_VHT 0x02000000 3683 #define WMI_PEER_80MHZ 0x04000000 3684 #define WMI_PEER_PMF 0x08000000 3685 /* TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000. 3686 * Need to be cleaned up 3687 */ 3688 #define WMI_PEER_IS_P2P_CAPABLE 0x20000000 3689 #define WMI_PEER_160MHZ 0x40000000 3690 #define WMI_PEER_SAFEMODE_EN 0x80000000 3691 3692 struct beacon_tmpl_params { 3693 u8 vdev_id; 3694 u32 tim_ie_offset; 3695 u32 tmpl_len; 3696 u32 tmpl_len_aligned; 3697 u32 csa_switch_count_offset; 3698 u32 ext_csa_switch_count_offset; 3699 u8 *frm; 3700 }; 3701 3702 struct wmi_rate_set { 3703 u32 num_rates; 3704 u32 rates[(MAX_SUPPORTED_RATES / 4) + 1]; 3705 }; 3706 3707 struct wmi_vht_rate_set { 3708 u32 tlv_header; 3709 u32 rx_max_rate; 3710 u32 rx_mcs_set; 3711 u32 tx_max_rate; 3712 u32 tx_mcs_set; 3713 u32 tx_max_mcs_nss; 3714 } __packed; 3715 3716 struct wmi_he_rate_set { 3717 u32 tlv_header; 3718 u32 rx_mcs_set; 3719 u32 tx_mcs_set; 3720 } __packed; 3721 3722 #define MAX_REG_RULES 10 3723 #define REG_ALPHA2_LEN 2 3724 3725 enum wmi_start_event_param { 3726 WMI_VDEV_START_RESP_EVENT = 0, 3727 WMI_VDEV_RESTART_RESP_EVENT, 3728 }; 3729 3730 struct wmi_vdev_start_resp_event { 3731 u32 vdev_id; 3732 u32 requestor_id; 3733 enum wmi_start_event_param resp_type; 3734 u32 status; 3735 u32 chain_mask; 3736 u32 smps_mode; 3737 union { 3738 u32 mac_id; 3739 u32 pdev_id; 3740 }; 3741 u32 cfgd_tx_streams; 3742 u32 cfgd_rx_streams; 3743 } __packed; 3744 3745 /* VDEV start response status codes */ 3746 enum wmi_vdev_start_resp_status_code { 3747 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0, 3748 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1, 3749 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2, 3750 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3, 3751 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, 3752 }; 3753 3754 ; 3755 enum cc_setting_code { 3756 REG_SET_CC_STATUS_PASS = 0, 3757 REG_CURRENT_ALPHA2_NOT_FOUND = 1, 3758 REG_INIT_ALPHA2_NOT_FOUND = 2, 3759 REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 3760 REG_SET_CC_STATUS_NO_MEMORY = 4, 3761 REG_SET_CC_STATUS_FAIL = 5, 3762 }; 3763 3764 /* Regaulatory Rule Flags Passed by FW */ 3765 #define REGULATORY_CHAN_DISABLED BIT(0) 3766 #define REGULATORY_CHAN_NO_IR BIT(1) 3767 #define REGULATORY_CHAN_RADAR BIT(3) 3768 #define REGULATORY_CHAN_NO_OFDM BIT(6) 3769 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 3770 3771 #define REGULATORY_CHAN_NO_HT40 BIT(4) 3772 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 3773 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 3774 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 3775 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 3776 3777 enum { 3778 WMI_REG_SET_CC_STATUS_PASS = 0, 3779 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1, 3780 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2, 3781 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 3782 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4, 3783 WMI_REG_SET_CC_STATUS_FAIL = 5, 3784 }; 3785 3786 struct cur_reg_rule { 3787 u16 start_freq; 3788 u16 end_freq; 3789 u16 max_bw; 3790 u8 reg_power; 3791 u8 ant_gain; 3792 u16 flags; 3793 }; 3794 3795 struct cur_regulatory_info { 3796 enum cc_setting_code status_code; 3797 u8 num_phy; 3798 u8 phy_id; 3799 u16 reg_dmn_pair; 3800 u16 ctry_code; 3801 u8 alpha2[REG_ALPHA2_LEN + 1]; 3802 u32 dfs_region; 3803 u32 phybitmap; 3804 u32 min_bw_2g; 3805 u32 max_bw_2g; 3806 u32 min_bw_5g; 3807 u32 max_bw_5g; 3808 u32 num_2g_reg_rules; 3809 u32 num_5g_reg_rules; 3810 struct cur_reg_rule *reg_rules_2g_ptr; 3811 struct cur_reg_rule *reg_rules_5g_ptr; 3812 }; 3813 3814 struct wmi_reg_chan_list_cc_event { 3815 u32 status_code; 3816 u32 phy_id; 3817 u32 alpha2; 3818 u32 num_phy; 3819 u32 country_id; 3820 u32 domain_code; 3821 u32 dfs_region; 3822 u32 phybitmap; 3823 u32 min_bw_2g; 3824 u32 max_bw_2g; 3825 u32 min_bw_5g; 3826 u32 max_bw_5g; 3827 u32 num_2g_reg_rules; 3828 u32 num_5g_reg_rules; 3829 } __packed; 3830 3831 struct wmi_regulatory_rule_struct { 3832 u32 tlv_header; 3833 u32 freq_info; 3834 u32 bw_pwr_info; 3835 u32 flag_info; 3836 }; 3837 3838 struct wmi_peer_delete_resp_event { 3839 u32 vdev_id; 3840 struct wmi_mac_addr peer_macaddr; 3841 } __packed; 3842 3843 struct wmi_bcn_tx_status_event { 3844 u32 vdev_id; 3845 u32 tx_status; 3846 } __packed; 3847 3848 struct wmi_vdev_stopped_event { 3849 u32 vdev_id; 3850 } __packed; 3851 3852 struct wmi_pdev_bss_chan_info_event { 3853 u32 pdev_id; 3854 u32 freq; /* Units in MHz */ 3855 u32 noise_floor; /* units are dBm */ 3856 /* rx clear - how often the channel was unused */ 3857 u32 rx_clear_count_low; 3858 u32 rx_clear_count_high; 3859 /* cycle count - elapsed time during measured period, in clock ticks */ 3860 u32 cycle_count_low; 3861 u32 cycle_count_high; 3862 /* tx cycle count - elapsed time spent in tx, in clock ticks */ 3863 u32 tx_cycle_count_low; 3864 u32 tx_cycle_count_high; 3865 /* rx cycle count - elapsed time spent in rx, in clock ticks */ 3866 u32 rx_cycle_count_low; 3867 u32 rx_cycle_count_high; 3868 /*rx_cycle cnt for my bss in 64bits format */ 3869 u32 rx_bss_cycle_count_low; 3870 u32 rx_bss_cycle_count_high; 3871 } __packed; 3872 3873 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 3874 3875 struct wmi_vdev_install_key_compl_event { 3876 u32 vdev_id; 3877 struct wmi_mac_addr peer_macaddr; 3878 u32 key_idx; 3879 u32 key_flags; 3880 u32 status; 3881 } __packed; 3882 3883 struct wmi_vdev_install_key_complete_arg { 3884 u32 vdev_id; 3885 const u8 *macaddr; 3886 u32 key_idx; 3887 u32 key_flags; 3888 u32 status; 3889 }; 3890 3891 struct wmi_peer_assoc_conf_event { 3892 u32 vdev_id; 3893 struct wmi_mac_addr peer_macaddr; 3894 } __packed; 3895 3896 struct wmi_peer_assoc_conf_arg { 3897 u32 vdev_id; 3898 const u8 *macaddr; 3899 }; 3900 3901 /* 3902 * PDEV statistics 3903 */ 3904 struct wmi_pdev_stats_base { 3905 s32 chan_nf; 3906 u32 tx_frame_count; /* Cycles spent transmitting frames */ 3907 u32 rx_frame_count; /* Cycles spent receiving frames */ 3908 u32 rx_clear_count; /* Total channel busy time, evidently */ 3909 u32 cycle_count; /* Total on-channel time */ 3910 u32 phy_err_count; 3911 u32 chan_tx_pwr; 3912 } __packed; 3913 3914 struct wmi_pdev_stats_extra { 3915 u32 ack_rx_bad; 3916 u32 rts_bad; 3917 u32 rts_good; 3918 u32 fcs_bad; 3919 u32 no_beacons; 3920 u32 mib_int_count; 3921 } __packed; 3922 3923 struct wmi_pdev_stats_tx { 3924 /* Num HTT cookies queued to dispatch list */ 3925 s32 comp_queued; 3926 3927 /* Num HTT cookies dispatched */ 3928 s32 comp_delivered; 3929 3930 /* Num MSDU queued to WAL */ 3931 s32 msdu_enqued; 3932 3933 /* Num MPDU queue to WAL */ 3934 s32 mpdu_enqued; 3935 3936 /* Num MSDUs dropped by WMM limit */ 3937 s32 wmm_drop; 3938 3939 /* Num Local frames queued */ 3940 s32 local_enqued; 3941 3942 /* Num Local frames done */ 3943 s32 local_freed; 3944 3945 /* Num queued to HW */ 3946 s32 hw_queued; 3947 3948 /* Num PPDU reaped from HW */ 3949 s32 hw_reaped; 3950 3951 /* Num underruns */ 3952 s32 underrun; 3953 3954 /* Num PPDUs cleaned up in TX abort */ 3955 s32 tx_abort; 3956 3957 /* Num MPDUs requed by SW */ 3958 s32 mpdus_requed; 3959 3960 /* excessive retries */ 3961 u32 tx_ko; 3962 3963 /* data hw rate code */ 3964 u32 data_rc; 3965 3966 /* Scheduler self triggers */ 3967 u32 self_triggers; 3968 3969 /* frames dropped due to excessive sw retries */ 3970 u32 sw_retry_failure; 3971 3972 /* illegal rate phy errors */ 3973 u32 illgl_rate_phy_err; 3974 3975 /* wal pdev continuous xretry */ 3976 u32 pdev_cont_xretry; 3977 3978 /* wal pdev tx timeouts */ 3979 u32 pdev_tx_timeout; 3980 3981 /* wal pdev resets */ 3982 u32 pdev_resets; 3983 3984 /* frames dropped due to non-availability of stateless TIDs */ 3985 u32 stateless_tid_alloc_failure; 3986 3987 /* PhY/BB underrun */ 3988 u32 phy_underrun; 3989 3990 /* MPDU is more than txop limit */ 3991 u32 txop_ovf; 3992 } __packed; 3993 3994 struct wmi_pdev_stats_rx { 3995 /* Cnts any change in ring routing mid-ppdu */ 3996 s32 mid_ppdu_route_change; 3997 3998 /* Total number of statuses processed */ 3999 s32 status_rcvd; 4000 4001 /* Extra frags on rings 0-3 */ 4002 s32 r0_frags; 4003 s32 r1_frags; 4004 s32 r2_frags; 4005 s32 r3_frags; 4006 4007 /* MSDUs / MPDUs delivered to HTT */ 4008 s32 htt_msdus; 4009 s32 htt_mpdus; 4010 4011 /* MSDUs / MPDUs delivered to local stack */ 4012 s32 loc_msdus; 4013 s32 loc_mpdus; 4014 4015 /* AMSDUs that have more MSDUs than the status ring size */ 4016 s32 oversize_amsdu; 4017 4018 /* Number of PHY errors */ 4019 s32 phy_errs; 4020 4021 /* Number of PHY errors drops */ 4022 s32 phy_err_drop; 4023 4024 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 4025 s32 mpdu_errs; 4026 } __packed; 4027 4028 struct wmi_pdev_stats { 4029 struct wmi_pdev_stats_base base; 4030 struct wmi_pdev_stats_tx tx; 4031 struct wmi_pdev_stats_rx rx; 4032 } __packed; 4033 4034 #define WLAN_MAX_AC 4 4035 #define MAX_TX_RATE_VALUES 10 4036 #define MAX_TX_RATE_VALUES 10 4037 4038 struct wmi_vdev_stats { 4039 u32 vdev_id; 4040 u32 beacon_snr; 4041 u32 data_snr; 4042 u32 num_tx_frames[WLAN_MAX_AC]; 4043 u32 num_rx_frames; 4044 u32 num_tx_frames_retries[WLAN_MAX_AC]; 4045 u32 num_tx_frames_failures[WLAN_MAX_AC]; 4046 u32 num_rts_fail; 4047 u32 num_rts_success; 4048 u32 num_rx_err; 4049 u32 num_rx_discard; 4050 u32 num_tx_not_acked; 4051 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 4052 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 4053 } __packed; 4054 4055 struct wmi_bcn_stats { 4056 u32 vdev_id; 4057 u32 tx_bcn_succ_cnt; 4058 u32 tx_bcn_outage_cnt; 4059 } __packed; 4060 4061 struct wmi_stats_event { 4062 u32 stats_id; 4063 u32 num_pdev_stats; 4064 u32 num_vdev_stats; 4065 u32 num_peer_stats; 4066 u32 num_bcnflt_stats; 4067 u32 num_chan_stats; 4068 u32 num_mib_stats; 4069 u32 pdev_id; 4070 u32 num_bcn_stats; 4071 u32 num_peer_extd_stats; 4072 u32 num_peer_extd2_stats; 4073 } __packed; 4074 4075 struct wmi_pdev_ctl_failsafe_chk_event { 4076 u32 pdev_id; 4077 u32 ctl_failsafe_status; 4078 } __packed; 4079 4080 struct wmi_pdev_csa_switch_ev { 4081 u32 pdev_id; 4082 u32 current_switch_count; 4083 u32 num_vdevs; 4084 } __packed; 4085 4086 struct wmi_pdev_radar_ev { 4087 u32 pdev_id; 4088 u32 detection_mode; 4089 u32 chan_freq; 4090 u32 chan_width; 4091 u32 detector_id; 4092 u32 segment_id; 4093 u32 timestamp; 4094 u32 is_chirp; 4095 s32 freq_offset; 4096 s32 sidx; 4097 } __packed; 4098 4099 #define WMI_RX_STATUS_OK 0x00 4100 #define WMI_RX_STATUS_ERR_CRC 0x01 4101 #define WMI_RX_STATUS_ERR_DECRYPT 0x08 4102 #define WMI_RX_STATUS_ERR_MIC 0x10 4103 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 4104 4105 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 4106 4107 struct mgmt_rx_event_params { 4108 u32 channel; 4109 u32 snr; 4110 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; 4111 u32 rate; 4112 enum wmi_phy_mode phy_mode; 4113 u32 buf_len; 4114 int status; 4115 u32 flags; 4116 int rssi; 4117 u32 tsf_delta; 4118 u8 pdev_id; 4119 }; 4120 4121 #define ATH_MAX_ANTENNA 4 4122 4123 struct wmi_mgmt_rx_hdr { 4124 u32 channel; 4125 u32 snr; 4126 u32 rate; 4127 u32 phy_mode; 4128 u32 buf_len; 4129 u32 status; 4130 u32 rssi_ctl[ATH_MAX_ANTENNA]; 4131 u32 flags; 4132 int rssi; 4133 u32 tsf_delta; 4134 u32 rx_tsf_l32; 4135 u32 rx_tsf_u32; 4136 u32 pdev_id; 4137 } __packed; 4138 4139 #define MAX_ANTENNA_EIGHT 8 4140 4141 struct wmi_rssi_ctl_ext { 4142 u32 tlv_header; 4143 u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA]; 4144 }; 4145 4146 struct wmi_mgmt_tx_compl_event { 4147 u32 desc_id; 4148 u32 status; 4149 u32 pdev_id; 4150 } __packed; 4151 4152 struct wmi_scan_event { 4153 u32 event_type; /* %WMI_SCAN_EVENT_ */ 4154 u32 reason; /* %WMI_SCAN_REASON_ */ 4155 u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 4156 u32 scan_req_id; 4157 u32 scan_id; 4158 u32 vdev_id; 4159 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed 4160 * In case of AP it is TSF of the AP vdev 4161 * In case of STA connected state, this is the TSF of the AP 4162 * In case of STA not connected, it will be the free running HW timer 4163 */ 4164 u32 tsf_timestamp; 4165 } __packed; 4166 4167 struct wmi_peer_sta_kickout_arg { 4168 const u8 *mac_addr; 4169 }; 4170 4171 struct wmi_peer_sta_kickout_event { 4172 struct wmi_mac_addr peer_macaddr; 4173 } __packed; 4174 4175 enum wmi_roam_reason { 4176 WMI_ROAM_REASON_BETTER_AP = 1, 4177 WMI_ROAM_REASON_BEACON_MISS = 2, 4178 WMI_ROAM_REASON_LOW_RSSI = 3, 4179 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 4180 WMI_ROAM_REASON_HO_FAILED = 5, 4181 4182 /* keep last */ 4183 WMI_ROAM_REASON_MAX, 4184 }; 4185 4186 struct wmi_roam_event { 4187 u32 vdev_id; 4188 u32 reason; 4189 u32 rssi; 4190 } __packed; 4191 4192 #define WMI_CHAN_INFO_START_RESP 0 4193 #define WMI_CHAN_INFO_END_RESP 1 4194 4195 struct wmi_chan_info_event { 4196 u32 err_code; 4197 u32 freq; 4198 u32 cmd_flags; 4199 u32 noise_floor; 4200 u32 rx_clear_count; 4201 u32 cycle_count; 4202 u32 chan_tx_pwr_range; 4203 u32 chan_tx_pwr_tp; 4204 u32 rx_frame_count; 4205 u32 my_bss_rx_cycle_count; 4206 u32 rx_11b_mode_data_duration; 4207 u32 tx_frame_cnt; 4208 u32 mac_clk_mhz; 4209 u32 vdev_id; 4210 } __packed; 4211 4212 struct ath11k_targ_cap { 4213 u32 phy_capability; 4214 u32 max_frag_entry; 4215 u32 num_rf_chains; 4216 u32 ht_cap_info; 4217 u32 vht_cap_info; 4218 u32 vht_supp_mcs; 4219 u32 hw_min_tx_power; 4220 u32 hw_max_tx_power; 4221 u32 sys_cap_info; 4222 u32 min_pkt_size_enable; 4223 u32 max_bcn_ie_size; 4224 u32 max_num_scan_channels; 4225 u32 max_supported_macs; 4226 u32 wmi_fw_sub_feat_caps; 4227 u32 txrx_chainmask; 4228 u32 default_dbs_hw_mode_index; 4229 u32 num_msdu_desc; 4230 }; 4231 4232 enum wmi_vdev_type { 4233 WMI_VDEV_TYPE_AP = 1, 4234 WMI_VDEV_TYPE_STA = 2, 4235 WMI_VDEV_TYPE_IBSS = 3, 4236 WMI_VDEV_TYPE_MONITOR = 4, 4237 }; 4238 4239 enum wmi_vdev_subtype { 4240 WMI_VDEV_SUBTYPE_NONE, 4241 WMI_VDEV_SUBTYPE_P2P_DEVICE, 4242 WMI_VDEV_SUBTYPE_P2P_CLIENT, 4243 WMI_VDEV_SUBTYPE_P2P_GO, 4244 WMI_VDEV_SUBTYPE_PROXY_STA, 4245 WMI_VDEV_SUBTYPE_MESH_NON_11S, 4246 WMI_VDEV_SUBTYPE_MESH_11S, 4247 }; 4248 4249 enum wmi_sta_powersave_param { 4250 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 4251 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 4252 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 4253 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 4254 WMI_STA_PS_PARAM_UAPSD = 4, 4255 }; 4256 4257 #define WMI_UAPSD_AC_TYPE_DELI 0 4258 #define WMI_UAPSD_AC_TYPE_TRIG 1 4259 4260 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \ 4261 ((type == WMI_UAPSD_AC_TYPE_DELI) ? \ 4262 (1 << (ac << 1)) : (1 << ((ac << 1) + 1))) 4263 4264 enum wmi_sta_ps_param_uapsd { 4265 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4266 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4267 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4268 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4269 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4270 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4271 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4272 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4273 }; 4274 4275 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX 4276 4277 struct wmi_sta_uapsd_auto_trig_param { 4278 u32 wmm_ac; 4279 u32 user_priority; 4280 u32 service_interval; 4281 u32 suspend_interval; 4282 u32 delay_interval; 4283 }; 4284 4285 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param { 4286 u32 vdev_id; 4287 struct wmi_mac_addr peer_macaddr; 4288 u32 num_ac; 4289 }; 4290 4291 struct wmi_sta_uapsd_auto_trig_arg { 4292 u32 wmm_ac; 4293 u32 user_priority; 4294 u32 service_interval; 4295 u32 suspend_interval; 4296 u32 delay_interval; 4297 }; 4298 4299 enum wmi_sta_ps_param_tx_wake_threshold { 4300 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 4301 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 4302 4303 /* Values greater than one indicate that many TX attempts per beacon 4304 * interval before the STA will wake up 4305 */ 4306 }; 4307 4308 /* The maximum number of PS-Poll frames the FW will send in response to 4309 * traffic advertised in TIM before waking up (by sending a null frame with PS 4310 * = 0). Value 0 has a special meaning: there is no maximum count and the FW 4311 * will send as many PS-Poll as are necessary to retrieve buffered BU. This 4312 * parameter is used when the RX wake policy is 4313 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 4314 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 4315 */ 4316 enum wmi_sta_ps_param_pspoll_count { 4317 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 4318 /* Values greater than 0 indicate the maximum numer of PS-Poll frames 4319 * FW will send before waking up. 4320 */ 4321 }; 4322 4323 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 4324 enum wmi_ap_ps_param_uapsd { 4325 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4326 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4327 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4328 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4329 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4330 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4331 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4332 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4333 }; 4334 4335 /* U-APSD maximum service period of peer station */ 4336 enum wmi_ap_ps_peer_param_max_sp { 4337 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 4338 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 4339 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 4340 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 4341 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 4342 }; 4343 4344 enum wmi_ap_ps_peer_param { 4345 /** Set uapsd configuration for a given peer. 4346 * 4347 * This include the delivery and trigger enabled state for each AC. 4348 * The host MLME needs to set this based on AP capability and stations 4349 * request Set in the association request received from the station. 4350 * 4351 * Lower 8 bits of the value specify the UAPSD configuration. 4352 * 4353 * (see enum wmi_ap_ps_param_uapsd) 4354 * The default value is 0. 4355 */ 4356 WMI_AP_PS_PEER_PARAM_UAPSD = 0, 4357 4358 /** 4359 * Set the service period for a UAPSD capable station 4360 * 4361 * The service period from wme ie in the (re)assoc request frame. 4362 * 4363 * (see enum wmi_ap_ps_peer_param_max_sp) 4364 */ 4365 WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 4366 4367 /** Time in seconds for aging out buffered frames 4368 * for STA in power save 4369 */ 4370 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 4371 4372 /** Specify frame types that are considered SIFS 4373 * RESP trigger frame 4374 */ 4375 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3, 4376 4377 /** Specifies the trigger state of TID. 4378 * Valid only for UAPSD frame type 4379 */ 4380 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4, 4381 4382 /* Specifies the WNM sleep state of a STA */ 4383 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5, 4384 }; 4385 4386 #define DISABLE_SIFS_RESPONSE_TRIGGER 0 4387 4388 #define WMI_MAX_KEY_INDEX 3 4389 #define WMI_MAX_KEY_LEN 32 4390 4391 #define WMI_KEY_PAIRWISE 0x00 4392 #define WMI_KEY_GROUP 0x01 4393 4394 #define WMI_CIPHER_NONE 0x0 /* clear key */ 4395 #define WMI_CIPHER_WEP 0x1 4396 #define WMI_CIPHER_TKIP 0x2 4397 #define WMI_CIPHER_AES_OCB 0x3 4398 #define WMI_CIPHER_AES_CCM 0x4 4399 #define WMI_CIPHER_WAPI 0x5 4400 #define WMI_CIPHER_CKIP 0x6 4401 #define WMI_CIPHER_AES_CMAC 0x7 4402 #define WMI_CIPHER_ANY 0x8 4403 #define WMI_CIPHER_AES_GCM 0x9 4404 #define WMI_CIPHER_AES_GMAC 0xa 4405 4406 /* Value to disable fixed rate setting */ 4407 #define WMI_FIXED_RATE_NONE (0xffff) 4408 4409 #define ATH11K_RC_VERSION_OFFSET 28 4410 #define ATH11K_RC_PREAMBLE_OFFSET 8 4411 #define ATH11K_RC_NSS_OFFSET 5 4412 4413 #define ATH11K_HW_RATE_CODE(rate, nss, preamble) \ 4414 ((1 << ATH11K_RC_VERSION_OFFSET) | \ 4415 ((nss) << ATH11K_RC_NSS_OFFSET) | \ 4416 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) | \ 4417 (rate)) 4418 4419 /* Preamble types to be used with VDEV fixed rate configuration */ 4420 enum wmi_rate_preamble { 4421 WMI_RATE_PREAMBLE_OFDM, 4422 WMI_RATE_PREAMBLE_CCK, 4423 WMI_RATE_PREAMBLE_HT, 4424 WMI_RATE_PREAMBLE_VHT, 4425 WMI_RATE_PREAMBLE_HE, 4426 }; 4427 4428 /** 4429 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection. 4430 * @WMI_RTS_CTS_DISABLED : RTS/CTS protection is disabled. 4431 * @WMI_USE_RTS_CTS : RTS/CTS Enabled. 4432 * @WMI_USE_CTS2SELF : CTS to self protection Enabled. 4433 */ 4434 enum wmi_rtscts_prot_mode { 4435 WMI_RTS_CTS_DISABLED = 0, 4436 WMI_USE_RTS_CTS = 1, 4437 WMI_USE_CTS2SELF = 2, 4438 }; 4439 4440 /** 4441 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling 4442 * protection mode. 4443 * @WMI_RTSCTS_FOR_NO_RATESERIES - Neither of rate-series should use RTS-CTS 4444 * @WMI_RTSCTS_FOR_SECOND_RATESERIES - Only second rate-series will use RTS-CTS 4445 * @WMI_RTSCTS_ACROSS_SW_RETRIES - Only the second rate-series will use RTS-CTS, 4446 * but if there's a sw retry, both the rate 4447 * series will use RTS-CTS. 4448 * @WMI_RTSCTS_ERP - RTS/CTS used for ERP protection for every PPDU. 4449 * @WMI_RTSCTS_FOR_ALL_RATESERIES - Enable RTS-CTS for all rate series. 4450 */ 4451 enum wmi_rtscts_profile { 4452 WMI_RTSCTS_FOR_NO_RATESERIES = 0, 4453 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1, 4454 WMI_RTSCTS_ACROSS_SW_RETRIES = 2, 4455 WMI_RTSCTS_ERP = 3, 4456 WMI_RTSCTS_FOR_ALL_RATESERIES = 4, 4457 }; 4458 4459 struct ath11k_hal_reg_cap { 4460 u32 eeprom_rd; 4461 u32 eeprom_rd_ext; 4462 u32 regcap1; 4463 u32 regcap2; 4464 u32 wireless_modes; 4465 u32 low_2ghz_chan; 4466 u32 high_2ghz_chan; 4467 u32 low_5ghz_chan; 4468 u32 high_5ghz_chan; 4469 }; 4470 4471 struct ath11k_mem_chunk { 4472 void *vaddr; 4473 dma_addr_t paddr; 4474 u32 len; 4475 u32 req_id; 4476 }; 4477 4478 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 4479 4480 enum wmi_sta_ps_param_rx_wake_policy { 4481 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 4482 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 4483 }; 4484 4485 enum ath11k_hw_txrx_mode { 4486 ATH11K_HW_TXRX_RAW = 0, 4487 ATH11K_HW_TXRX_NATIVE_WIFI = 1, 4488 ATH11K_HW_TXRX_ETHERNET = 2, 4489 }; 4490 4491 struct wmi_wmm_params { 4492 u32 tlv_header; 4493 u32 cwmin; 4494 u32 cwmax; 4495 u32 aifs; 4496 u32 txoplimit; 4497 u32 acm; 4498 u32 no_ack; 4499 } __packed; 4500 4501 struct wmi_wmm_params_arg { 4502 u8 acm; 4503 u8 aifs; 4504 u16 cwmin; 4505 u16 cwmax; 4506 u16 txop; 4507 u8 no_ack; 4508 }; 4509 4510 struct wmi_vdev_set_wmm_params_cmd { 4511 u32 tlv_header; 4512 u32 vdev_id; 4513 struct wmi_wmm_params wmm_params[4]; 4514 u32 wmm_param_type; 4515 } __packed; 4516 4517 struct wmi_wmm_params_all_arg { 4518 struct wmi_wmm_params_arg ac_be; 4519 struct wmi_wmm_params_arg ac_bk; 4520 struct wmi_wmm_params_arg ac_vi; 4521 struct wmi_wmm_params_arg ac_vo; 4522 }; 4523 4524 #define ATH11K_TWT_DEF_STA_CONG_TIMER_MS 5000 4525 #define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE 10 4526 #define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP 50 4527 #define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20 4528 #define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100 4529 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80 4530 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50 4531 #define ATH11K_TWT_DEF_MIN_NO_STA_SETUP 10 4532 #define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN 2 4533 #define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2 4534 #define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS 2 4535 #define ATH11K_TWT_DEF_MAX_NO_STA_TWT 500 4536 #define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL 10000 4537 #define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000 4538 #define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000 4539 4540 struct wmi_twt_enable_params_cmd { 4541 u32 tlv_header; 4542 u32 pdev_id; 4543 u32 sta_cong_timer_ms; 4544 u32 mbss_support; 4545 u32 default_slot_size; 4546 u32 congestion_thresh_setup; 4547 u32 congestion_thresh_teardown; 4548 u32 congestion_thresh_critical; 4549 u32 interference_thresh_teardown; 4550 u32 interference_thresh_setup; 4551 u32 min_no_sta_setup; 4552 u32 min_no_sta_teardown; 4553 u32 no_of_bcast_mcast_slots; 4554 u32 min_no_twt_slots; 4555 u32 max_no_sta_twt; 4556 u32 mode_check_interval; 4557 u32 add_sta_slot_interval; 4558 u32 remove_sta_slot_interval; 4559 }; 4560 4561 struct wmi_twt_disable_params_cmd { 4562 u32 tlv_header; 4563 u32 pdev_id; 4564 }; 4565 4566 struct wmi_obss_spatial_reuse_params_cmd { 4567 u32 tlv_header; 4568 u32 pdev_id; 4569 u32 enable; 4570 s32 obss_min; 4571 s32 obss_max; 4572 u32 vdev_id; 4573 }; 4574 4575 struct target_resource_config { 4576 u32 num_vdevs; 4577 u32 num_peers; 4578 u32 num_active_peers; 4579 u32 num_offload_peers; 4580 u32 num_offload_reorder_buffs; 4581 u32 num_peer_keys; 4582 u32 num_tids; 4583 u32 ast_skid_limit; 4584 u32 tx_chain_mask; 4585 u32 rx_chain_mask; 4586 u32 rx_timeout_pri[4]; 4587 u32 rx_decap_mode; 4588 u32 scan_max_pending_req; 4589 u32 bmiss_offload_max_vdev; 4590 u32 roam_offload_max_vdev; 4591 u32 roam_offload_max_ap_profiles; 4592 u32 num_mcast_groups; 4593 u32 num_mcast_table_elems; 4594 u32 mcast2ucast_mode; 4595 u32 tx_dbg_log_size; 4596 u32 num_wds_entries; 4597 u32 dma_burst_size; 4598 u32 mac_aggr_delim; 4599 u32 rx_skip_defrag_timeout_dup_detection_check; 4600 u32 vow_config; 4601 u32 gtk_offload_max_vdev; 4602 u32 num_msdu_desc; 4603 u32 max_frag_entries; 4604 u32 max_peer_ext_stats; 4605 u32 smart_ant_cap; 4606 u32 bk_minfree; 4607 u32 be_minfree; 4608 u32 vi_minfree; 4609 u32 vo_minfree; 4610 u32 rx_batchmode; 4611 u32 tt_support; 4612 u32 atf_config; 4613 u32 iphdr_pad_config; 4614 u32 qwrap_config:16, 4615 alloc_frag_desc_for_data_pkt:16; 4616 u32 num_tdls_vdevs; 4617 u32 num_tdls_conn_table_entries; 4618 u32 beacon_tx_offload_max_vdev; 4619 u32 num_multicast_filter_entries; 4620 u32 num_wow_filters; 4621 u32 num_keep_alive_pattern; 4622 u32 keep_alive_pattern_size; 4623 u32 max_tdls_concurrent_sleep_sta; 4624 u32 max_tdls_concurrent_buffer_sta; 4625 u32 wmi_send_separate; 4626 u32 num_ocb_vdevs; 4627 u32 num_ocb_channels; 4628 u32 num_ocb_schedules; 4629 u32 num_ns_ext_tuples_cfg; 4630 u32 bpf_instruction_size; 4631 u32 max_bssid_rx_filters; 4632 u32 use_pdev_id; 4633 u32 peer_map_unmap_v2_support; 4634 u32 sched_params; 4635 u32 twt_ap_pdev_count; 4636 u32 twt_ap_sta_count; 4637 }; 4638 4639 #define WMI_MAX_MEM_REQS 32 4640 4641 #define MAX_RADIOS 3 4642 4643 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 4644 #define WMI_SEND_TIMEOUT_HZ (3 * HZ) 4645 4646 struct ath11k_wmi_base { 4647 struct ath11k_base *ab; 4648 struct ath11k_pdev_wmi wmi[MAX_RADIOS]; 4649 enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS]; 4650 u32 max_msg_len[MAX_RADIOS]; 4651 4652 struct completion service_ready; 4653 struct completion unified_ready; 4654 DECLARE_BITMAP(svc_map, WMI_MAX_EXT_SERVICE); 4655 wait_queue_head_t tx_credits_wq; 4656 const struct wmi_peer_flags_map *peer_flags; 4657 u32 num_mem_chunks; 4658 u32 rx_decap_mode; 4659 struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 4660 4661 enum wmi_host_hw_mode_config_type preferred_hw_mode; 4662 struct target_resource_config wlan_resource_config; 4663 4664 struct ath11k_targ_cap *targ_cap; 4665 }; 4666 4667 int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb, 4668 u32 cmd_id); 4669 struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len); 4670 int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id, 4671 struct sk_buff *frame); 4672 int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id, 4673 struct ieee80211_mutable_offsets *offs, 4674 struct sk_buff *bcn); 4675 int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id); 4676 int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid, 4677 const u8 *bssid); 4678 int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id); 4679 int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg, 4680 bool restart); 4681 int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr, 4682 u32 vdev_id, u32 param_id, u32 param_val); 4683 int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id, 4684 u32 param_value, u8 pdev_id); 4685 int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab); 4686 int ath11k_wmi_cmd_init(struct ath11k_base *ab); 4687 int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab); 4688 int ath11k_wmi_connect(struct ath11k_base *ab); 4689 int ath11k_wmi_pdev_attach(struct ath11k_base *ab, 4690 u8 pdev_id); 4691 int ath11k_wmi_attach(struct ath11k_base *ab); 4692 void ath11k_wmi_detach(struct ath11k_base *ab); 4693 int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr, 4694 struct vdev_create_params *param); 4695 int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id, 4696 const u8 *addr, dma_addr_t paddr, 4697 u8 tid, u8 ba_window_size_valid, 4698 u32 ba_window_size); 4699 int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar, 4700 struct peer_create_params *param); 4701 int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id, 4702 u32 param_id, u32 param_value); 4703 4704 int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id, 4705 u32 param, u32 param_value); 4706 int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms); 4707 int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar, 4708 const u8 *peer_addr, u8 vdev_id); 4709 int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id); 4710 void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg); 4711 int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar, 4712 struct scan_req_params *params); 4713 int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar, 4714 struct scan_cancel_param *param); 4715 int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id, 4716 struct wmi_wmm_params_all_arg *param); 4717 int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt, 4718 u32 pdev_id); 4719 int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id); 4720 4721 int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar, 4722 struct peer_assoc_params *param); 4723 int ath11k_wmi_vdev_install_key(struct ath11k *ar, 4724 struct wmi_vdev_install_key_arg *arg); 4725 int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar, 4726 enum wmi_bss_chan_info_req_type type); 4727 int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar, 4728 struct stats_request_params *param); 4729 int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar, 4730 u8 peer_addr[ETH_ALEN], 4731 struct peer_flush_params *param); 4732 int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr, 4733 struct ap_ps_params *param); 4734 int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar, 4735 struct scan_chan_list_params *chan_list); 4736 int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar, 4737 u32 pdev_id); 4738 int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar, 4739 u32 vdev_id, u32 bcn_ctrl_op); 4740 int 4741 ath11k_wmi_send_init_country_cmd(struct ath11k *ar, 4742 struct wmi_init_country_params init_cc_param); 4743 int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter); 4744 int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar); 4745 int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable); 4746 int 4747 ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar, 4748 struct rx_reorder_queue_remove_params *param); 4749 int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar, 4750 struct pdev_set_regdomain_params *param); 4751 int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb, 4752 struct ath11k_fw_stats *stats); 4753 size_t ath11k_wmi_fw_stats_num_peers(struct list_head *head); 4754 size_t ath11k_wmi_fw_stats_num_peers_extd(struct list_head *head); 4755 size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head); 4756 void ath11k_wmi_fw_stats_fill(struct ath11k *ar, 4757 struct ath11k_fw_stats *fw_stats, u32 stats_id, 4758 char *buf); 4759 int ath11k_wmi_simulate_radar(struct ath11k *ar); 4760 int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id); 4761 int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id); 4762 int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id, 4763 struct ieee80211_he_obss_pd *he_obss_pd); 4764 #endif 4765