1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef ATH11K_WMI_H 7 #define ATH11K_WMI_H 8 9 #include <net/mac80211.h> 10 #include "htc.h" 11 12 struct ath11k_base; 13 struct ath11k; 14 struct ath11k_fw_stats; 15 16 #define PSOC_HOST_MAX_NUM_SS (8) 17 18 /* defines to set Packet extension values whic can be 0 us, 8 usec or 16 usec */ 19 #define MAX_HE_NSS 8 20 #define MAX_HE_MODULATION 8 21 #define MAX_HE_RU 4 22 #define HE_MODULATION_NONE 7 23 #define HE_PET_0_USEC 0 24 #define HE_PET_8_USEC 1 25 #define HE_PET_16_USEC 2 26 27 #define WMI_MAX_CHAINS 8 28 29 #define WMI_MAX_NUM_SS MAX_HE_NSS 30 #define WMI_MAX_NUM_RU MAX_HE_RU 31 32 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1) 33 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1) 34 #define WMI_TLV_CMD_UNSUPPORTED 0 35 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0 36 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0 37 38 struct wmi_cmd_hdr { 39 u32 cmd_id; 40 } __packed; 41 42 struct wmi_tlv { 43 u32 header; 44 u8 value[]; 45 } __packed; 46 47 #define WMI_TLV_LEN GENMASK(15, 0) 48 #define WMI_TLV_TAG GENMASK(31, 16) 49 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header) 50 51 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0) 52 #define WMI_MAX_MEM_REQS 32 53 #define ATH11K_MAX_HW_LISTEN_INTERVAL 5 54 55 #define WLAN_SCAN_MAX_HINT_S_SSID 10 56 #define WLAN_SCAN_MAX_HINT_BSSID 10 57 #define MAX_RNR_BSS 5 58 59 #define WLAN_SCAN_MAX_HINT_S_SSID 10 60 #define WLAN_SCAN_MAX_HINT_BSSID 10 61 #define MAX_RNR_BSS 5 62 63 #define WLAN_SCAN_PARAMS_MAX_SSID 16 64 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 65 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 66 67 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1 68 69 #define WMI_BA_MODE_BUFFER_SIZE_256 3 70 /* 71 * HW mode config type replicated from FW header 72 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active. 73 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands, 74 * one in 2G and another in 5G. 75 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in 76 * same band; no tx allowed. 77 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band. 78 * Support for both PHYs within one band is planned 79 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES), 80 * but could be extended to other bands in the future. 81 * The separation of the band between the two PHYs needs 82 * to be communicated separately. 83 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS 84 * as in WMI_HW_MODE_SBS, and 3rd on the other band 85 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and 86 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). 87 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. 88 */ 89 enum wmi_host_hw_mode_config_type { 90 WMI_HOST_HW_MODE_SINGLE = 0, 91 WMI_HOST_HW_MODE_DBS = 1, 92 WMI_HOST_HW_MODE_SBS_PASSIVE = 2, 93 WMI_HOST_HW_MODE_SBS = 3, 94 WMI_HOST_HW_MODE_DBS_SBS = 4, 95 WMI_HOST_HW_MODE_DBS_OR_SBS = 5, 96 97 /* keep last */ 98 WMI_HOST_HW_MODE_MAX 99 }; 100 101 /* HW mode priority values used to detect the preferred HW mode 102 * on the available modes. 103 */ 104 enum wmi_host_hw_mode_priority { 105 WMI_HOST_HW_MODE_DBS_SBS_PRI, 106 WMI_HOST_HW_MODE_DBS_PRI, 107 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI, 108 WMI_HOST_HW_MODE_SBS_PRI, 109 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI, 110 WMI_HOST_HW_MODE_SINGLE_PRI, 111 112 /* keep last the lowest priority */ 113 WMI_HOST_HW_MODE_MAX_PRI 114 }; 115 116 enum { 117 WMI_HOST_WLAN_2G_CAP = 0x1, 118 WMI_HOST_WLAN_5G_CAP = 0x2, 119 WMI_HOST_WLAN_2G_5G_CAP = 0x3, 120 }; 121 122 /* Parameters used for WMI_VDEV_PARAM_AUTORATE_MISC_CFG command. 123 * Used only for HE auto rate mode. 124 */ 125 enum { 126 /* HE LTF related configuration */ 127 WMI_HE_AUTORATE_LTF_1X = BIT(0), 128 WMI_HE_AUTORATE_LTF_2X = BIT(1), 129 WMI_HE_AUTORATE_LTF_4X = BIT(2), 130 131 /* HE GI related configuration */ 132 WMI_AUTORATE_400NS_GI = BIT(8), 133 WMI_AUTORATE_800NS_GI = BIT(9), 134 WMI_AUTORATE_1600NS_GI = BIT(10), 135 WMI_AUTORATE_3200NS_GI = BIT(11), 136 }; 137 138 /* 139 * wmi command groups. 140 */ 141 enum wmi_cmd_group { 142 /* 0 to 2 are reserved */ 143 WMI_GRP_START = 0x3, 144 WMI_GRP_SCAN = WMI_GRP_START, 145 WMI_GRP_PDEV = 0x4, 146 WMI_GRP_VDEV = 0x5, 147 WMI_GRP_PEER = 0x6, 148 WMI_GRP_MGMT = 0x7, 149 WMI_GRP_BA_NEG = 0x8, 150 WMI_GRP_STA_PS = 0x9, 151 WMI_GRP_DFS = 0xa, 152 WMI_GRP_ROAM = 0xb, 153 WMI_GRP_OFL_SCAN = 0xc, 154 WMI_GRP_P2P = 0xd, 155 WMI_GRP_AP_PS = 0xe, 156 WMI_GRP_RATE_CTRL = 0xf, 157 WMI_GRP_PROFILE = 0x10, 158 WMI_GRP_SUSPEND = 0x11, 159 WMI_GRP_BCN_FILTER = 0x12, 160 WMI_GRP_WOW = 0x13, 161 WMI_GRP_RTT = 0x14, 162 WMI_GRP_SPECTRAL = 0x15, 163 WMI_GRP_STATS = 0x16, 164 WMI_GRP_ARP_NS_OFL = 0x17, 165 WMI_GRP_NLO_OFL = 0x18, 166 WMI_GRP_GTK_OFL = 0x19, 167 WMI_GRP_CSA_OFL = 0x1a, 168 WMI_GRP_CHATTER = 0x1b, 169 WMI_GRP_TID_ADDBA = 0x1c, 170 WMI_GRP_MISC = 0x1d, 171 WMI_GRP_GPIO = 0x1e, 172 WMI_GRP_FWTEST = 0x1f, 173 WMI_GRP_TDLS = 0x20, 174 WMI_GRP_RESMGR = 0x21, 175 WMI_GRP_STA_SMPS = 0x22, 176 WMI_GRP_WLAN_HB = 0x23, 177 WMI_GRP_RMC = 0x24, 178 WMI_GRP_MHF_OFL = 0x25, 179 WMI_GRP_LOCATION_SCAN = 0x26, 180 WMI_GRP_OEM = 0x27, 181 WMI_GRP_NAN = 0x28, 182 WMI_GRP_COEX = 0x29, 183 WMI_GRP_OBSS_OFL = 0x2a, 184 WMI_GRP_LPI = 0x2b, 185 WMI_GRP_EXTSCAN = 0x2c, 186 WMI_GRP_DHCP_OFL = 0x2d, 187 WMI_GRP_IPA = 0x2e, 188 WMI_GRP_MDNS_OFL = 0x2f, 189 WMI_GRP_SAP_OFL = 0x30, 190 WMI_GRP_OCB = 0x31, 191 WMI_GRP_SOC = 0x32, 192 WMI_GRP_PKT_FILTER = 0x33, 193 WMI_GRP_MAWC = 0x34, 194 WMI_GRP_PMF_OFFLOAD = 0x35, 195 WMI_GRP_BPF_OFFLOAD = 0x36, 196 WMI_GRP_NAN_DATA = 0x37, 197 WMI_GRP_PROTOTYPE = 0x38, 198 WMI_GRP_MONITOR = 0x39, 199 WMI_GRP_REGULATORY = 0x3a, 200 WMI_GRP_HW_DATA_FILTER = 0x3b, 201 WMI_GRP_WLM = 0x3c, 202 WMI_GRP_11K_OFFLOAD = 0x3d, 203 WMI_GRP_TWT = 0x3e, 204 WMI_GRP_MOTION_DET = 0x3f, 205 WMI_GRP_SPATIAL_REUSE = 0x40, 206 }; 207 208 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 209 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 210 211 #define WMI_CMD_UNSUPPORTED 0 212 213 enum wmi_tlv_cmd_id { 214 WMI_INIT_CMDID = 0x1, 215 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN), 216 WMI_STOP_SCAN_CMDID, 217 WMI_SCAN_CHAN_LIST_CMDID, 218 WMI_SCAN_SCH_PRIO_TBL_CMDID, 219 WMI_SCAN_UPDATE_REQUEST_CMDID, 220 WMI_SCAN_PROB_REQ_OUI_CMDID, 221 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID, 222 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV), 223 WMI_PDEV_SET_CHANNEL_CMDID, 224 WMI_PDEV_SET_PARAM_CMDID, 225 WMI_PDEV_PKTLOG_ENABLE_CMDID, 226 WMI_PDEV_PKTLOG_DISABLE_CMDID, 227 WMI_PDEV_SET_WMM_PARAMS_CMDID, 228 WMI_PDEV_SET_HT_CAP_IE_CMDID, 229 WMI_PDEV_SET_VHT_CAP_IE_CMDID, 230 WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 231 WMI_PDEV_SET_QUIET_MODE_CMDID, 232 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 233 WMI_PDEV_GET_TPC_CONFIG_CMDID, 234 WMI_PDEV_SET_BASE_MACADDR_CMDID, 235 WMI_PDEV_DUMP_CMDID, 236 WMI_PDEV_SET_LED_CONFIG_CMDID, 237 WMI_PDEV_GET_TEMPERATURE_CMDID, 238 WMI_PDEV_SET_LED_FLASHING_CMDID, 239 WMI_PDEV_SMART_ANT_ENABLE_CMDID, 240 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 241 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 242 WMI_PDEV_SET_CTL_TABLE_CMDID, 243 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID, 244 WMI_PDEV_FIPS_CMDID, 245 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID, 246 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 247 WMI_PDEV_GET_NFCAL_POWER_CMDID, 248 WMI_PDEV_GET_TPC_CMDID, 249 WMI_MIB_STATS_ENABLE_CMDID, 250 WMI_PDEV_SET_PCL_CMDID, 251 WMI_PDEV_SET_HW_MODE_CMDID, 252 WMI_PDEV_SET_MAC_CONFIG_CMDID, 253 WMI_PDEV_SET_ANTENNA_MODE_CMDID, 254 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID, 255 WMI_PDEV_WAL_POWER_DEBUG_CMDID, 256 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID, 257 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID, 258 WMI_PDEV_GET_ANTDIV_STATUS_CMDID, 259 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID, 260 WMI_PDEV_SET_STATS_THRESHOLD_CMDID, 261 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID, 262 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID, 263 WMI_PDEV_CHECK_CAL_VERSION_CMDID, 264 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID, 265 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID, 266 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 267 WMI_PDEV_UPDATE_PMK_CACHE_CMDID, 268 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID, 269 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID, 270 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID, 271 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID, 272 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID, 273 WMI_PDEV_DMA_RING_CFG_REQ_CMDID, 274 WMI_PDEV_HE_TB_ACTION_FRM_CMDID, 275 WMI_PDEV_PKTLOG_FILTER_CMDID, 276 WMI_PDEV_SET_RAP_CONFIG_CMDID, 277 WMI_PDEV_DSM_FILTER_CMDID, 278 WMI_PDEV_FRAME_INJECT_CMDID, 279 WMI_PDEV_TBTT_OFFSET_SYNC_CMDID, 280 WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID, 281 WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID, 282 WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 283 WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 284 WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 285 WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 286 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV), 287 WMI_VDEV_DELETE_CMDID, 288 WMI_VDEV_START_REQUEST_CMDID, 289 WMI_VDEV_RESTART_REQUEST_CMDID, 290 WMI_VDEV_UP_CMDID, 291 WMI_VDEV_STOP_CMDID, 292 WMI_VDEV_DOWN_CMDID, 293 WMI_VDEV_SET_PARAM_CMDID, 294 WMI_VDEV_INSTALL_KEY_CMDID, 295 WMI_VDEV_WNM_SLEEPMODE_CMDID, 296 WMI_VDEV_WMM_ADDTS_CMDID, 297 WMI_VDEV_WMM_DELTS_CMDID, 298 WMI_VDEV_SET_WMM_PARAMS_CMDID, 299 WMI_VDEV_SET_GTX_PARAMS_CMDID, 300 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID, 301 WMI_VDEV_PLMREQ_START_CMDID, 302 WMI_VDEV_PLMREQ_STOP_CMDID, 303 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID, 304 WMI_VDEV_SET_IE_CMDID, 305 WMI_VDEV_RATEMASK_CMDID, 306 WMI_VDEV_ATF_REQUEST_CMDID, 307 WMI_VDEV_SET_DSCP_TID_MAP_CMDID, 308 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 309 WMI_VDEV_SET_QUIET_MODE_CMDID, 310 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID, 311 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID, 312 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID, 313 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER), 314 WMI_PEER_DELETE_CMDID, 315 WMI_PEER_FLUSH_TIDS_CMDID, 316 WMI_PEER_SET_PARAM_CMDID, 317 WMI_PEER_ASSOC_CMDID, 318 WMI_PEER_ADD_WDS_ENTRY_CMDID, 319 WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 320 WMI_PEER_MCAST_GROUP_CMDID, 321 WMI_PEER_INFO_REQ_CMDID, 322 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID, 323 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID, 324 WMI_PEER_UPDATE_WDS_ENTRY_CMDID, 325 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID, 326 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 327 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 328 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 329 WMI_PEER_ATF_REQUEST_CMDID, 330 WMI_PEER_BWF_REQUEST_CMDID, 331 WMI_PEER_REORDER_QUEUE_SETUP_CMDID, 332 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID, 333 WMI_PEER_SET_RX_BLOCKSIZE_CMDID, 334 WMI_PEER_ANTDIV_INFO_REQ_CMDID, 335 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT), 336 WMI_PDEV_SEND_BCN_CMDID, 337 WMI_BCN_TMPL_CMDID, 338 WMI_BCN_FILTER_RX_CMDID, 339 WMI_PRB_REQ_FILTER_RX_CMDID, 340 WMI_MGMT_TX_CMDID, 341 WMI_PRB_TMPL_CMDID, 342 WMI_MGMT_TX_SEND_CMDID, 343 WMI_OFFCHAN_DATA_TX_SEND_CMDID, 344 WMI_PDEV_SEND_FD_CMDID, 345 WMI_BCN_OFFLOAD_CTRL_CMDID, 346 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID, 347 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID, 348 WMI_FILS_DISCOVERY_TMPL_CMDID, 349 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 350 WMI_ADDBA_SEND_CMDID, 351 WMI_ADDBA_STATUS_CMDID, 352 WMI_DELBA_SEND_CMDID, 353 WMI_ADDBA_SET_RESP_CMDID, 354 WMI_SEND_SINGLEAMSDU_CMDID, 355 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS), 356 WMI_STA_POWERSAVE_PARAM_CMDID, 357 WMI_STA_MIMO_PS_MODE_CMDID, 358 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS), 359 WMI_PDEV_DFS_DISABLE_CMDID, 360 WMI_DFS_PHYERR_FILTER_ENA_CMDID, 361 WMI_DFS_PHYERR_FILTER_DIS_CMDID, 362 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID, 363 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID, 364 WMI_VDEV_ADFS_CH_CFG_CMDID, 365 WMI_VDEV_ADFS_OCAC_ABORT_CMDID, 366 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM), 367 WMI_ROAM_SCAN_RSSI_THRESHOLD, 368 WMI_ROAM_SCAN_PERIOD, 369 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 370 WMI_ROAM_AP_PROFILE, 371 WMI_ROAM_CHAN_LIST, 372 WMI_ROAM_SCAN_CMD, 373 WMI_ROAM_SYNCH_COMPLETE, 374 WMI_ROAM_SET_RIC_REQUEST_CMDID, 375 WMI_ROAM_INVOKE_CMDID, 376 WMI_ROAM_FILTER_CMDID, 377 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID, 378 WMI_ROAM_CONFIGURE_MAWC_CMDID, 379 WMI_ROAM_SET_MBO_PARAM_CMDID, 380 WMI_ROAM_PER_CONFIG_CMDID, 381 WMI_ROAM_BTM_CONFIG_CMDID, 382 WMI_ENABLE_FILS_CMDID, 383 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN), 384 WMI_OFL_SCAN_REMOVE_AP_PROFILE, 385 WMI_OFL_SCAN_PERIOD, 386 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P), 387 WMI_P2P_DEV_SET_DISCOVERABILITY, 388 WMI_P2P_GO_SET_BEACON_IE, 389 WMI_P2P_GO_SET_PROBE_RESP_IE, 390 WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 391 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID, 392 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID, 393 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID, 394 WMI_P2P_SET_OPPPS_PARAM_CMDID, 395 WMI_P2P_LISTEN_OFFLOAD_START_CMDID, 396 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID, 397 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS), 398 WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 399 WMI_AP_PS_EGAP_PARAM_CMDID, 400 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL), 401 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE), 402 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 403 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 404 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 405 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 406 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 407 WMI_PDEV_RESUME_CMDID, 408 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER), 409 WMI_RMV_BCN_FILTER_CMDID, 410 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW), 411 WMI_WOW_DEL_WAKE_PATTERN_CMDID, 412 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 413 WMI_WOW_ENABLE_CMDID, 414 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 415 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID, 416 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID, 417 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID, 418 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID, 419 WMI_D0_WOW_ENABLE_DISABLE_CMDID, 420 WMI_EXTWOW_ENABLE_CMDID, 421 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID, 422 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID, 423 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID, 424 WMI_WOW_UDP_SVC_OFLD_CMDID, 425 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID, 426 WMI_WOW_SET_ACTION_WAKE_UP_CMDID, 427 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT), 428 WMI_RTT_TSF_CMDID, 429 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL), 430 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 431 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS), 432 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID, 433 WMI_REQUEST_STATS_EXT_CMDID, 434 WMI_REQUEST_LINK_STATS_CMDID, 435 WMI_START_LINK_STATS_CMDID, 436 WMI_CLEAR_LINK_STATS_CMDID, 437 WMI_GET_FW_MEM_DUMP_CMDID, 438 WMI_DEBUG_MESG_FLUSH_CMDID, 439 WMI_DIAG_EVENT_LOG_CONFIG_CMDID, 440 WMI_REQUEST_WLAN_STATS_CMDID, 441 WMI_REQUEST_RCPI_CMDID, 442 WMI_REQUEST_PEER_STATS_INFO_CMDID, 443 WMI_REQUEST_RADIO_CHAN_STATS_CMDID, 444 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL), 445 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID, 446 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID, 447 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 448 WMI_APFIND_CMDID, 449 WMI_PASSPOINT_LIST_CONFIG_CMDID, 450 WMI_NLO_CONFIGURE_MAWC_CMDID, 451 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 452 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 453 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 454 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER), 455 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID, 456 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID, 457 WMI_CHATTER_COALESCING_QUERY_CMDID, 458 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA), 459 WMI_PEER_TID_DELBA_CMDID, 460 WMI_STA_DTIM_PS_METHOD_CMDID, 461 WMI_STA_UAPSD_AUTO_TRIG_CMDID, 462 WMI_STA_KEEPALIVE_CMDID, 463 WMI_BA_REQ_SSN_CMDID, 464 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC), 465 WMI_PDEV_UTF_CMDID, 466 WMI_DBGLOG_CFG_CMDID, 467 WMI_PDEV_QVIT_CMDID, 468 WMI_PDEV_FTM_INTG_CMDID, 469 WMI_VDEV_SET_KEEPALIVE_CMDID, 470 WMI_VDEV_GET_KEEPALIVE_CMDID, 471 WMI_FORCE_FW_HANG_CMDID, 472 WMI_SET_MCASTBCAST_FILTER_CMDID, 473 WMI_THERMAL_MGMT_CMDID, 474 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID, 475 WMI_TPC_CHAINMASK_CONFIG_CMDID, 476 WMI_SET_ANTENNA_DIVERSITY_CMDID, 477 WMI_OCB_SET_SCHED_CMDID, 478 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID, 479 WMI_LRO_CONFIG_CMDID, 480 WMI_TRANSFER_DATA_TO_FLASH_CMDID, 481 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID, 482 WMI_VDEV_WISA_CMDID, 483 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 484 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 485 WMI_READ_DATA_FROM_FLASH_CMDID, 486 WMI_THERM_THROT_SET_CONF_CMDID, 487 WMI_RUNTIME_DPD_RECAL_CMDID, 488 WMI_GET_TPC_POWER_CMDID, 489 WMI_IDLE_TRIGGER_MONITOR_CMDID, 490 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 491 WMI_GPIO_OUTPUT_CMDID, 492 WMI_TXBF_CMDID, 493 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST), 494 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID, 495 WMI_UNIT_TEST_CMDID, 496 WMI_FWTEST_CMDID, 497 WMI_QBOOST_CFG_CMDID, 498 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS), 499 WMI_TDLS_PEER_UPDATE_CMDID, 500 WMI_TDLS_SET_OFFCHAN_MODE_CMDID, 501 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR), 502 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID, 503 WMI_RESMGR_SET_CHAN_LATENCY_CMDID, 504 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 505 WMI_STA_SMPS_PARAM_CMDID, 506 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB), 507 WMI_HB_SET_TCP_PARAMS_CMDID, 508 WMI_HB_SET_TCP_PKT_FILTER_CMDID, 509 WMI_HB_SET_UDP_PARAMS_CMDID, 510 WMI_HB_SET_UDP_PKT_FILTER_CMDID, 511 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC), 512 WMI_RMC_SET_ACTION_PERIOD_CMDID, 513 WMI_RMC_CONFIG_CMDID, 514 WMI_RMC_SET_MANUAL_LEADER_CMDID, 515 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL), 516 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID, 517 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 518 WMI_BATCH_SCAN_DISABLE_CMDID, 519 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID, 520 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM), 521 WMI_OEM_REQUEST_CMDID, 522 WMI_LPI_OEM_REQ_CMDID, 523 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN), 524 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX), 525 WMI_CHAN_AVOID_UPDATE_CMDID, 526 WMI_COEX_CONFIG_CMDID, 527 WMI_CHAN_AVOID_RPT_ALLOW_CMDID, 528 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID, 529 WMI_SAR_LIMITS_CMDID, 530 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL), 531 WMI_OBSS_SCAN_DISABLE_CMDID, 532 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID, 533 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI), 534 WMI_LPI_START_SCAN_CMDID, 535 WMI_LPI_STOP_SCAN_CMDID, 536 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 537 WMI_EXTSCAN_STOP_CMDID, 538 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID, 539 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID, 540 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID, 541 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID, 542 WMI_EXTSCAN_SET_CAPABILITIES_CMDID, 543 WMI_EXTSCAN_GET_CAPABILITIES_CMDID, 544 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID, 545 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID, 546 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL), 547 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA), 548 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 549 WMI_MDNS_SET_FQDN_CMDID, 550 WMI_MDNS_SET_RESPONSE_CMDID, 551 WMI_MDNS_GET_STATS_CMDID, 552 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 553 WMI_SAP_SET_BLACKLIST_PARAM_CMDID, 554 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB), 555 WMI_OCB_SET_UTC_TIME_CMDID, 556 WMI_OCB_START_TIMING_ADVERT_CMDID, 557 WMI_OCB_STOP_TIMING_ADVERT_CMDID, 558 WMI_OCB_GET_TSF_TIMER_CMDID, 559 WMI_DCC_GET_STATS_CMDID, 560 WMI_DCC_CLEAR_STATS_CMDID, 561 WMI_DCC_UPDATE_NDL_CMDID, 562 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC), 563 WMI_SOC_SET_HW_MODE_CMDID, 564 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID, 565 WMI_SOC_SET_ANTENNA_MODE_CMDID, 566 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER), 567 WMI_PACKET_FILTER_ENABLE_CMDID, 568 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC), 569 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD), 570 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 571 WMI_BPF_GET_VDEV_STATS_CMDID, 572 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID, 573 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID, 574 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID, 575 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR), 576 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 577 WMI_11D_SCAN_START_CMDID, 578 WMI_11D_SCAN_STOP_CMDID, 579 WMI_SET_INIT_COUNTRY_CMDID, 580 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 581 WMI_NDP_INITIATOR_REQ_CMDID, 582 WMI_NDP_RESPONDER_REQ_CMDID, 583 WMI_NDP_END_REQ_CMDID, 584 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER), 585 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT), 586 WMI_TWT_DISABLE_CMDID, 587 WMI_TWT_ADD_DIALOG_CMDID, 588 WMI_TWT_DEL_DIALOG_CMDID, 589 WMI_TWT_PAUSE_DIALOG_CMDID, 590 WMI_TWT_RESUME_DIALOG_CMDID, 591 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID = 592 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE), 593 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID, 594 }; 595 596 enum wmi_tlv_event_id { 597 WMI_SERVICE_READY_EVENTID = 0x1, 598 WMI_READY_EVENTID, 599 WMI_SERVICE_AVAILABLE_EVENTID, 600 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 601 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV), 602 WMI_CHAN_INFO_EVENTID, 603 WMI_PHYERR_EVENTID, 604 WMI_PDEV_DUMP_EVENTID, 605 WMI_TX_PAUSE_EVENTID, 606 WMI_DFS_RADAR_EVENTID, 607 WMI_PDEV_L1SS_TRACK_EVENTID, 608 WMI_PDEV_TEMPERATURE_EVENTID, 609 WMI_SERVICE_READY_EXT_EVENTID, 610 WMI_PDEV_FIPS_EVENTID, 611 WMI_PDEV_CHANNEL_HOPPING_EVENTID, 612 WMI_PDEV_ANI_CCK_LEVEL_EVENTID, 613 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID, 614 WMI_PDEV_TPC_EVENTID, 615 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 616 WMI_PDEV_SET_HW_MODE_RESP_EVENTID, 617 WMI_PDEV_HW_MODE_TRANSITION_EVENTID, 618 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID, 619 WMI_PDEV_ANTDIV_STATUS_EVENTID, 620 WMI_PDEV_CHIP_POWER_STATS_EVENTID, 621 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID, 622 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID, 623 WMI_PDEV_CHECK_CAL_VERSION_EVENTID, 624 WMI_PDEV_DIV_RSSI_ANTID_EVENTID, 625 WMI_PDEV_BSS_CHAN_INFO_EVENTID, 626 WMI_PDEV_UPDATE_CTLTABLE_EVENTID, 627 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, 628 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, 629 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, 630 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID, 631 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID, 632 WMI_PDEV_RAP_INFO_EVENTID, 633 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID, 634 WMI_SERVICE_READY_EXT2_EVENTID, 635 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), 636 WMI_VDEV_STOPPED_EVENTID, 637 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 638 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID, 639 WMI_VDEV_TSF_REPORT_EVENTID, 640 WMI_VDEV_DELETE_RESP_EVENTID, 641 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID, 642 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID, 643 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER), 644 WMI_PEER_INFO_EVENTID, 645 WMI_PEER_TX_FAIL_CNT_THR_EVENTID, 646 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID, 647 WMI_PEER_STATE_EVENTID, 648 WMI_PEER_ASSOC_CONF_EVENTID, 649 WMI_PEER_DELETE_RESP_EVENTID, 650 WMI_PEER_RATECODE_LIST_EVENTID, 651 WMI_WDS_PEER_EVENTID, 652 WMI_PEER_STA_PS_STATECHG_EVENTID, 653 WMI_PEER_ANTDIV_INFO_EVENTID, 654 WMI_PEER_RESERVED0_EVENTID, 655 WMI_PEER_RESERVED1_EVENTID, 656 WMI_PEER_RESERVED2_EVENTID, 657 WMI_PEER_RESERVED3_EVENTID, 658 WMI_PEER_RESERVED4_EVENTID, 659 WMI_PEER_RESERVED5_EVENTID, 660 WMI_PEER_RESERVED6_EVENTID, 661 WMI_PEER_RESERVED7_EVENTID, 662 WMI_PEER_RESERVED8_EVENTID, 663 WMI_PEER_RESERVED9_EVENTID, 664 WMI_PEER_RESERVED10_EVENTID, 665 WMI_PEER_OPER_MODE_CHANGE_EVENTID, 666 WMI_PEER_TX_PN_RESPONSE_EVENTID, 667 WMI_PEER_CFR_CAPTURE_EVENTID, 668 WMI_PEER_CREATE_CONF_EVENTID, 669 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), 670 WMI_HOST_SWBA_EVENTID, 671 WMI_TBTTOFFSET_UPDATE_EVENTID, 672 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID, 673 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID, 674 WMI_MGMT_TX_COMPLETION_EVENTID, 675 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID, 676 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID, 677 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID, 678 WMI_HOST_FILS_DISCOVERY_EVENTID, 679 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 680 WMI_TX_ADDBA_COMPLETE_EVENTID, 681 WMI_BA_RSP_SSN_EVENTID, 682 WMI_AGGR_STATE_TRIG_EVENTID, 683 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM), 684 WMI_PROFILE_MATCH, 685 WMI_ROAM_SYNCH_EVENTID, 686 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P), 687 WMI_P2P_NOA_EVENTID, 688 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID, 689 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS), 690 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 691 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW), 692 WMI_D0_WOW_DISABLE_ACK_EVENTID, 693 WMI_WOW_INITIAL_WAKEUP_EVENTID, 694 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT), 695 WMI_TSF_MEASUREMENT_REPORT_EVENTID, 696 WMI_RTT_ERROR_REPORT_EVENTID, 697 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS), 698 WMI_IFACE_LINK_STATS_EVENTID, 699 WMI_PEER_LINK_STATS_EVENTID, 700 WMI_RADIO_LINK_STATS_EVENTID, 701 WMI_UPDATE_FW_MEM_DUMP_EVENTID, 702 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID, 703 WMI_INST_RSSI_STATS_EVENTID, 704 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID, 705 WMI_REPORT_STATS_EVENTID, 706 WMI_UPDATE_RCPI_EVENTID, 707 WMI_PEER_STATS_INFO_EVENTID, 708 WMI_RADIO_CHAN_STATS_EVENTID, 709 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 710 WMI_NLO_SCAN_COMPLETE_EVENTID, 711 WMI_APFIND_EVENTID, 712 WMI_PASSPOINT_MATCH_EVENTID, 713 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 714 WMI_GTK_REKEY_FAIL_EVENTID, 715 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 716 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER), 717 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS), 718 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID, 719 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID, 720 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC), 721 WMI_PDEV_UTF_EVENTID, 722 WMI_DEBUG_MESG_EVENTID, 723 WMI_UPDATE_STATS_EVENTID, 724 WMI_DEBUG_PRINT_EVENTID, 725 WMI_DCS_INTERFERENCE_EVENTID, 726 WMI_PDEV_QVIT_EVENTID, 727 WMI_WLAN_PROFILE_DATA_EVENTID, 728 WMI_PDEV_FTM_INTG_EVENTID, 729 WMI_WLAN_FREQ_AVOID_EVENTID, 730 WMI_VDEV_GET_KEEPALIVE_EVENTID, 731 WMI_THERMAL_MGMT_EVENTID, 732 WMI_DIAG_DATA_CONTAINER_EVENTID, 733 WMI_HOST_AUTO_SHUTDOWN_EVENTID, 734 WMI_UPDATE_WHAL_MIB_STATS_EVENTID, 735 WMI_UPDATE_VDEV_RATE_STATS_EVENTID, 736 WMI_DIAG_EVENTID, 737 WMI_OCB_SET_SCHED_EVENTID, 738 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID, 739 WMI_RSSI_BREACH_EVENTID, 740 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID, 741 WMI_PDEV_UTF_SCPC_EVENTID, 742 WMI_READ_DATA_FROM_FLASH_EVENTID, 743 WMI_REPORT_RX_AGGR_FAILURE_EVENTID, 744 WMI_PKGID_EVENTID, 745 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO), 746 WMI_UPLOADH_EVENTID, 747 WMI_CAPTUREH_EVENTID, 748 WMI_RFKILL_STATE_CHANGE_EVENTID, 749 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS), 750 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 751 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 752 WMI_BATCH_SCAN_RESULT_EVENTID, 753 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM), 754 WMI_OEM_MEASUREMENT_REPORT_EVENTID, 755 WMI_OEM_ERROR_REPORT_EVENTID, 756 WMI_OEM_RESPONSE_EVENTID, 757 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN), 758 WMI_NAN_DISC_IFACE_CREATED_EVENTID, 759 WMI_NAN_DISC_IFACE_DELETED_EVENTID, 760 WMI_NAN_STARTED_CLUSTER_EVENTID, 761 WMI_NAN_JOINED_CLUSTER_EVENTID, 762 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX), 763 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI), 764 WMI_LPI_STATUS_EVENTID, 765 WMI_LPI_HANDOFF_EVENTID, 766 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 767 WMI_EXTSCAN_OPERATION_EVENTID, 768 WMI_EXTSCAN_TABLE_USAGE_EVENTID, 769 WMI_EXTSCAN_CACHED_RESULTS_EVENTID, 770 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID, 771 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID, 772 WMI_EXTSCAN_CAPABILITIES_EVENTID, 773 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID, 774 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 775 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 776 WMI_SAP_OFL_DEL_STA_EVENTID, 777 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB), 778 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID, 779 WMI_DCC_GET_STATS_RESP_EVENTID, 780 WMI_DCC_UPDATE_NDL_RESP_EVENTID, 781 WMI_DCC_STATS_EVENTID, 782 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC), 783 WMI_SOC_HW_MODE_TRANSITION_EVENTID, 784 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID, 785 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC), 786 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 787 WMI_BPF_VDEV_STATS_INFO_EVENTID, 788 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC), 789 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 790 WMI_11D_NEW_COUNTRY_EVENTID, 791 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 792 WMI_NDP_INITIATOR_RSP_EVENTID, 793 WMI_NDP_RESPONDER_RSP_EVENTID, 794 WMI_NDP_END_RSP_EVENTID, 795 WMI_NDP_INDICATION_EVENTID, 796 WMI_NDP_CONFIRM_EVENTID, 797 WMI_NDP_END_INDICATION_EVENTID, 798 799 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT), 800 WMI_TWT_DISABLE_EVENTID, 801 WMI_TWT_ADD_DIALOG_EVENTID, 802 WMI_TWT_DEL_DIALOG_EVENTID, 803 WMI_TWT_PAUSE_DIALOG_EVENTID, 804 WMI_TWT_RESUME_DIALOG_EVENTID, 805 }; 806 807 enum wmi_tlv_pdev_param { 808 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 809 WMI_PDEV_PARAM_RX_CHAIN_MASK, 810 WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 811 WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 812 WMI_PDEV_PARAM_TXPOWER_SCALE, 813 WMI_PDEV_PARAM_BEACON_GEN_MODE, 814 WMI_PDEV_PARAM_BEACON_TX_MODE, 815 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 816 WMI_PDEV_PARAM_PROTECTION_MODE, 817 WMI_PDEV_PARAM_DYNAMIC_BW, 818 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 819 WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 820 WMI_PDEV_PARAM_STA_KICKOUT_TH, 821 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 822 WMI_PDEV_PARAM_LTR_ENABLE, 823 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 824 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 825 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 826 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 827 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 828 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 829 WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 830 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 831 WMI_PDEV_PARAM_L1SS_ENABLE, 832 WMI_PDEV_PARAM_DSLEEP_ENABLE, 833 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 834 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 835 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 836 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 837 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 838 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 839 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 840 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 841 WMI_PDEV_PARAM_PMF_QOS, 842 WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 843 WMI_PDEV_PARAM_DCS, 844 WMI_PDEV_PARAM_ANI_ENABLE, 845 WMI_PDEV_PARAM_ANI_POLL_PERIOD, 846 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 847 WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 848 WMI_PDEV_PARAM_ANI_CCK_LEVEL, 849 WMI_PDEV_PARAM_DYNTXCHAIN, 850 WMI_PDEV_PARAM_PROXY_STA, 851 WMI_PDEV_PARAM_IDLE_PS_CONFIG, 852 WMI_PDEV_PARAM_POWER_GATING_SLEEP, 853 WMI_PDEV_PARAM_RFKILL_ENABLE, 854 WMI_PDEV_PARAM_BURST_DUR, 855 WMI_PDEV_PARAM_BURST_ENABLE, 856 WMI_PDEV_PARAM_HW_RFKILL_CONFIG, 857 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE, 858 WMI_PDEV_PARAM_L1SS_TRACK, 859 WMI_PDEV_PARAM_HYST_EN, 860 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE, 861 WMI_PDEV_PARAM_LED_SYS_STATE, 862 WMI_PDEV_PARAM_LED_ENABLE, 863 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY, 864 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE, 865 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE, 866 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD, 867 WMI_PDEV_PARAM_CTS_CBW, 868 WMI_PDEV_PARAM_WNTS_CONFIG, 869 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE, 870 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP, 871 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP, 872 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP, 873 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE, 874 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT, 875 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP, 876 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT, 877 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE, 878 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE, 879 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G, 880 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G, 881 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G, 882 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G, 883 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK, 884 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS, 885 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG, 886 WMI_PDEV_PARAM_TXPOWER_DECR_DB, 887 WMI_PDEV_PARAM_AGGR_BURST, 888 WMI_PDEV_PARAM_RX_DECAP_MODE, 889 WMI_PDEV_PARAM_FAST_CHANNEL_RESET, 890 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 891 WMI_PDEV_PARAM_ANTENNA_GAIN, 892 WMI_PDEV_PARAM_RX_FILTER, 893 WMI_PDEV_SET_MCAST_TO_UCAST_TID, 894 WMI_PDEV_PARAM_PROXY_STA_MODE, 895 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE, 896 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 897 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 898 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE, 899 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 900 WMI_PDEV_PARAM_BLOCK_INTERBSS, 901 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 902 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID, 903 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 904 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 905 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 906 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID, 907 WMI_PDEV_PARAM_EN_STATS, 908 WMI_PDEV_PARAM_MU_GROUP_POLICY, 909 WMI_PDEV_PARAM_NOISE_DETECTION, 910 WMI_PDEV_PARAM_NOISE_THRESHOLD, 911 WMI_PDEV_PARAM_DPD_ENABLE, 912 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 913 WMI_PDEV_PARAM_ATF_STRICT_SCH, 914 WMI_PDEV_PARAM_ATF_SCHED_DURATION, 915 WMI_PDEV_PARAM_ANT_PLZN, 916 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT, 917 WMI_PDEV_PARAM_SENSITIVITY_LEVEL, 918 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G, 919 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G, 920 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 921 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 922 WMI_PDEV_PARAM_CCA_THRESHOLD, 923 WMI_PDEV_PARAM_RTS_FIXED_RATE, 924 WMI_PDEV_PARAM_PDEV_RESET, 925 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET, 926 WMI_PDEV_PARAM_ARP_DBG_SRCADDR, 927 WMI_PDEV_PARAM_ARP_DBG_DSTADDR, 928 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 929 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 930 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE, 931 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 932 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT, 933 WMI_PDEV_PARAM_PROPAGATION_DELAY, 934 WMI_PDEV_PARAM_ENA_ANT_DIV, 935 WMI_PDEV_PARAM_FORCE_CHAIN_ANT, 936 WMI_PDEV_PARAM_ANT_DIV_SELFTEST, 937 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL, 938 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD, 939 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS, 940 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN, 941 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN, 942 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN, 943 WMI_PDEV_PARAM_TX_SCH_DELAY, 944 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING, 945 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU, 946 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE, 947 WMI_PDEV_PARAM_FAST_PWR_TRANSITION, 948 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE, 949 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE, 950 WMI_PDEV_PARAM_MESH_MCAST_ENABLE, 951 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_THRESHOLD = 0xbc, 952 WMI_PDEV_PARAM_SET_CMD_OBSS_PD_PER_AC = 0xbe, 953 WMI_PDEV_PARAM_ENABLE_SR_PROHIBIT = 0xc6, 954 }; 955 956 enum wmi_tlv_vdev_param { 957 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 958 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 959 WMI_VDEV_PARAM_BEACON_INTERVAL, 960 WMI_VDEV_PARAM_LISTEN_INTERVAL, 961 WMI_VDEV_PARAM_MULTICAST_RATE, 962 WMI_VDEV_PARAM_MGMT_TX_RATE, 963 WMI_VDEV_PARAM_SLOT_TIME, 964 WMI_VDEV_PARAM_PREAMBLE, 965 WMI_VDEV_PARAM_SWBA_TIME, 966 WMI_VDEV_STATS_UPDATE_PERIOD, 967 WMI_VDEV_PWRSAVE_AGEOUT_TIME, 968 WMI_VDEV_HOST_SWBA_INTERVAL, 969 WMI_VDEV_PARAM_DTIM_PERIOD, 970 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 971 WMI_VDEV_PARAM_WDS, 972 WMI_VDEV_PARAM_ATIM_WINDOW, 973 WMI_VDEV_PARAM_BMISS_COUNT_MAX, 974 WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 975 WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 976 WMI_VDEV_PARAM_FEATURE_WMM, 977 WMI_VDEV_PARAM_CHWIDTH, 978 WMI_VDEV_PARAM_CHEXTOFFSET, 979 WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 980 WMI_VDEV_PARAM_STA_QUICKKICKOUT, 981 WMI_VDEV_PARAM_MGMT_RATE, 982 WMI_VDEV_PARAM_PROTECTION_MODE, 983 WMI_VDEV_PARAM_FIXED_RATE, 984 WMI_VDEV_PARAM_SGI, 985 WMI_VDEV_PARAM_LDPC, 986 WMI_VDEV_PARAM_TX_STBC, 987 WMI_VDEV_PARAM_RX_STBC, 988 WMI_VDEV_PARAM_INTRA_BSS_FWD, 989 WMI_VDEV_PARAM_DEF_KEYID, 990 WMI_VDEV_PARAM_NSS, 991 WMI_VDEV_PARAM_BCAST_DATA_RATE, 992 WMI_VDEV_PARAM_MCAST_DATA_RATE, 993 WMI_VDEV_PARAM_MCAST_INDICATE, 994 WMI_VDEV_PARAM_DHCP_INDICATE, 995 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 996 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 997 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 998 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 999 WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 1000 WMI_VDEV_PARAM_ENABLE_RTSCTS, 1001 WMI_VDEV_PARAM_TXBF, 1002 WMI_VDEV_PARAM_PACKET_POWERSAVE, 1003 WMI_VDEV_PARAM_DROP_UNENCRY, 1004 WMI_VDEV_PARAM_TX_ENCAP_TYPE, 1005 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 1006 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 1007 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 1008 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 1009 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP, 1010 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP, 1011 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 1012 WMI_VDEV_PARAM_TX_PWRLIMIT, 1013 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL, 1014 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD, 1015 WMI_VDEV_PARAM_ENABLE_RMC, 1016 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS, 1017 WMI_VDEV_PARAM_MAX_RATE, 1018 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE, 1019 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR, 1020 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT, 1021 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE, 1022 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED, 1023 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED, 1024 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED, 1025 WMI_VDEV_PARAM_INACTIVITY_CNT, 1026 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS, 1027 WMI_VDEV_PARAM_DTIM_POLICY, 1028 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS, 1029 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE, 1030 WMI_VDEV_PARAM_RX_LEAK_WINDOW, 1031 WMI_VDEV_PARAM_STATS_AVG_FACTOR, 1032 WMI_VDEV_PARAM_DISCONNECT_TH, 1033 WMI_VDEV_PARAM_RTSCTS_RATE, 1034 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE, 1035 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE, 1036 WMI_VDEV_PARAM_TXPOWER_SCALE, 1037 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB, 1038 WMI_VDEV_PARAM_MCAST2UCAST_SET, 1039 WMI_VDEV_PARAM_RC_NUM_RETRIES, 1040 WMI_VDEV_PARAM_CABQ_MAXDUR, 1041 WMI_VDEV_PARAM_MFPTEST_SET, 1042 WMI_VDEV_PARAM_RTS_FIXED_RATE, 1043 WMI_VDEV_PARAM_VHT_SGIMASK, 1044 WMI_VDEV_PARAM_VHT80_RATEMASK, 1045 WMI_VDEV_PARAM_PROXY_STA, 1046 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE, 1047 WMI_VDEV_PARAM_RX_DECAP_TYPE, 1048 WMI_VDEV_PARAM_BW_NSS_RATEMASK, 1049 WMI_VDEV_PARAM_SENSOR_AP, 1050 WMI_VDEV_PARAM_BEACON_RATE, 1051 WMI_VDEV_PARAM_DTIM_ENABLE_CTS, 1052 WMI_VDEV_PARAM_STA_KICKOUT, 1053 WMI_VDEV_PARAM_CAPABILITIES, 1054 WMI_VDEV_PARAM_TSF_INCREMENT, 1055 WMI_VDEV_PARAM_AMPDU_PER_AC, 1056 WMI_VDEV_PARAM_RX_FILTER, 1057 WMI_VDEV_PARAM_MGMT_TX_POWER, 1058 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH, 1059 WMI_VDEV_PARAM_AGG_SW_RETRY_TH, 1060 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS, 1061 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 1062 WMI_VDEV_PARAM_HE_DCM, 1063 WMI_VDEV_PARAM_HE_RANGE_EXT, 1064 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, 1065 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, 1066 WMI_VDEV_PARAM_HE_LTF = 0x74, 1067 WMI_VDEV_PARAM_BA_MODE = 0x7e, 1068 WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80, 1069 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, 1070 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99, 1071 WMI_VDEV_PARAM_PROTOTYPE = 0x8000, 1072 WMI_VDEV_PARAM_BSS_COLOR, 1073 WMI_VDEV_PARAM_SET_HEMU_MODE, 1074 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003, 1075 }; 1076 1077 enum wmi_tlv_peer_flags { 1078 WMI_TLV_PEER_AUTH = 0x00000001, 1079 WMI_TLV_PEER_QOS = 0x00000002, 1080 WMI_TLV_PEER_NEED_PTK_4_WAY = 0x00000004, 1081 WMI_TLV_PEER_NEED_GTK_2_WAY = 0x00000010, 1082 WMI_TLV_PEER_APSD = 0x00000800, 1083 WMI_TLV_PEER_HT = 0x00001000, 1084 WMI_TLV_PEER_40MHZ = 0x00002000, 1085 WMI_TLV_PEER_STBC = 0x00008000, 1086 WMI_TLV_PEER_LDPC = 0x00010000, 1087 WMI_TLV_PEER_DYN_MIMOPS = 0x00020000, 1088 WMI_TLV_PEER_STATIC_MIMOPS = 0x00040000, 1089 WMI_TLV_PEER_SPATIAL_MUX = 0x00200000, 1090 WMI_TLV_PEER_VHT = 0x02000000, 1091 WMI_TLV_PEER_80MHZ = 0x04000000, 1092 WMI_TLV_PEER_PMF = 0x08000000, 1093 WMI_PEER_IS_P2P_CAPABLE = 0x20000000, 1094 WMI_PEER_160MHZ = 0x40000000, 1095 WMI_PEER_SAFEMODE_EN = 0x80000000, 1096 1097 }; 1098 1099 /** Enum list of TLV Tags for each parameter structure type. */ 1100 enum wmi_tlv_tag { 1101 WMI_TAG_LAST_RESERVED = 15, 1102 WMI_TAG_FIRST_ARRAY_ENUM, 1103 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM, 1104 WMI_TAG_ARRAY_BYTE, 1105 WMI_TAG_ARRAY_STRUCT, 1106 WMI_TAG_ARRAY_FIXED_STRUCT, 1107 WMI_TAG_LAST_ARRAY_ENUM = 31, 1108 WMI_TAG_SERVICE_READY_EVENT, 1109 WMI_TAG_HAL_REG_CAPABILITIES, 1110 WMI_TAG_WLAN_HOST_MEM_REQ, 1111 WMI_TAG_READY_EVENT, 1112 WMI_TAG_SCAN_EVENT, 1113 WMI_TAG_PDEV_TPC_CONFIG_EVENT, 1114 WMI_TAG_CHAN_INFO_EVENT, 1115 WMI_TAG_COMB_PHYERR_RX_HDR, 1116 WMI_TAG_VDEV_START_RESPONSE_EVENT, 1117 WMI_TAG_VDEV_STOPPED_EVENT, 1118 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT, 1119 WMI_TAG_PEER_STA_KICKOUT_EVENT, 1120 WMI_TAG_MGMT_RX_HDR, 1121 WMI_TAG_TBTT_OFFSET_EVENT, 1122 WMI_TAG_TX_DELBA_COMPLETE_EVENT, 1123 WMI_TAG_TX_ADDBA_COMPLETE_EVENT, 1124 WMI_TAG_ROAM_EVENT, 1125 WMI_TAG_WOW_EVENT_INFO, 1126 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP, 1127 WMI_TAG_RTT_EVENT_HEADER, 1128 WMI_TAG_RTT_ERROR_REPORT_EVENT, 1129 WMI_TAG_RTT_MEAS_EVENT, 1130 WMI_TAG_ECHO_EVENT, 1131 WMI_TAG_FTM_INTG_EVENT, 1132 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT, 1133 WMI_TAG_GPIO_INPUT_EVENT, 1134 WMI_TAG_CSA_EVENT, 1135 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT, 1136 WMI_TAG_IGTK_INFO, 1137 WMI_TAG_DCS_INTERFERENCE_EVENT, 1138 WMI_TAG_ATH_DCS_CW_INT, 1139 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */ 1140 WMI_TAG_ATH_DCS_CW_INT, 1141 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1142 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */ 1143 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1144 WMI_TAG_WLAN_PROFILE_CTX_T, 1145 WMI_TAG_WLAN_PROFILE_T, 1146 WMI_TAG_PDEV_QVIT_EVENT, 1147 WMI_TAG_HOST_SWBA_EVENT, 1148 WMI_TAG_TIM_INFO, 1149 WMI_TAG_P2P_NOA_INFO, 1150 WMI_TAG_STATS_EVENT, 1151 WMI_TAG_AVOID_FREQ_RANGES_EVENT, 1152 WMI_TAG_AVOID_FREQ_RANGE_DESC, 1153 WMI_TAG_GTK_REKEY_FAIL_EVENT, 1154 WMI_TAG_INIT_CMD, 1155 WMI_TAG_RESOURCE_CONFIG, 1156 WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 1157 WMI_TAG_START_SCAN_CMD, 1158 WMI_TAG_STOP_SCAN_CMD, 1159 WMI_TAG_SCAN_CHAN_LIST_CMD, 1160 WMI_TAG_CHANNEL, 1161 WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1162 WMI_TAG_PDEV_SET_PARAM_CMD, 1163 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD, 1164 WMI_TAG_WMM_PARAMS, 1165 WMI_TAG_PDEV_SET_QUIET_CMD, 1166 WMI_TAG_VDEV_CREATE_CMD, 1167 WMI_TAG_VDEV_DELETE_CMD, 1168 WMI_TAG_VDEV_START_REQUEST_CMD, 1169 WMI_TAG_P2P_NOA_DESCRIPTOR, 1170 WMI_TAG_P2P_GO_SET_BEACON_IE, 1171 WMI_TAG_GTK_OFFLOAD_CMD, 1172 WMI_TAG_VDEV_UP_CMD, 1173 WMI_TAG_VDEV_STOP_CMD, 1174 WMI_TAG_VDEV_DOWN_CMD, 1175 WMI_TAG_VDEV_SET_PARAM_CMD, 1176 WMI_TAG_VDEV_INSTALL_KEY_CMD, 1177 WMI_TAG_PEER_CREATE_CMD, 1178 WMI_TAG_PEER_DELETE_CMD, 1179 WMI_TAG_PEER_FLUSH_TIDS_CMD, 1180 WMI_TAG_PEER_SET_PARAM_CMD, 1181 WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1182 WMI_TAG_VHT_RATE_SET, 1183 WMI_TAG_BCN_TMPL_CMD, 1184 WMI_TAG_PRB_TMPL_CMD, 1185 WMI_TAG_BCN_PRB_INFO, 1186 WMI_TAG_PEER_TID_ADDBA_CMD, 1187 WMI_TAG_PEER_TID_DELBA_CMD, 1188 WMI_TAG_STA_POWERSAVE_MODE_CMD, 1189 WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1190 WMI_TAG_STA_DTIM_PS_METHOD_CMD, 1191 WMI_TAG_ROAM_SCAN_MODE, 1192 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD, 1193 WMI_TAG_ROAM_SCAN_PERIOD, 1194 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1195 WMI_TAG_PDEV_SUSPEND_CMD, 1196 WMI_TAG_PDEV_RESUME_CMD, 1197 WMI_TAG_ADD_BCN_FILTER_CMD, 1198 WMI_TAG_RMV_BCN_FILTER_CMD, 1199 WMI_TAG_WOW_ENABLE_CMD, 1200 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 1201 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD, 1202 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM, 1203 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 1204 WMI_TAG_ARP_OFFLOAD_TUPLE, 1205 WMI_TAG_NS_OFFLOAD_TUPLE, 1206 WMI_TAG_FTM_INTG_CMD, 1207 WMI_TAG_STA_KEEPALIVE_CMD, 1208 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 1209 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD, 1210 WMI_TAG_AP_PS_PEER_CMD, 1211 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD, 1212 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD, 1213 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD, 1214 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD, 1215 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD, 1216 WMI_TAG_WOW_DEL_PATTERN_CMD, 1217 WMI_TAG_WOW_ADD_DEL_EVT_CMD, 1218 WMI_TAG_RTT_MEASREQ_HEAD, 1219 WMI_TAG_RTT_MEASREQ_BODY, 1220 WMI_TAG_RTT_TSF_CMD, 1221 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 1222 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 1223 WMI_TAG_REQUEST_STATS_CMD, 1224 WMI_TAG_NLO_CONFIG_CMD, 1225 WMI_TAG_NLO_CONFIGURED_PARAMETERS, 1226 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD, 1227 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD, 1228 WMI_TAG_CHATTER_SET_MODE_CMD, 1229 WMI_TAG_ECHO_CMD, 1230 WMI_TAG_VDEV_SET_KEEPALIVE_CMD, 1231 WMI_TAG_VDEV_GET_KEEPALIVE_CMD, 1232 WMI_TAG_FORCE_FW_HANG_CMD, 1233 WMI_TAG_GPIO_CONFIG_CMD, 1234 WMI_TAG_GPIO_OUTPUT_CMD, 1235 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD, 1236 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD, 1237 WMI_TAG_BCN_TX_HDR, 1238 WMI_TAG_BCN_SEND_FROM_HOST_CMD, 1239 WMI_TAG_MGMT_TX_HDR, 1240 WMI_TAG_ADDBA_CLEAR_RESP_CMD, 1241 WMI_TAG_ADDBA_SEND_CMD, 1242 WMI_TAG_DELBA_SEND_CMD, 1243 WMI_TAG_ADDBA_SETRESPONSE_CMD, 1244 WMI_TAG_SEND_SINGLEAMSDU_CMD, 1245 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD, 1246 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD, 1247 WMI_TAG_PDEV_SET_HT_IE_CMD, 1248 WMI_TAG_PDEV_SET_VHT_IE_CMD, 1249 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD, 1250 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD, 1251 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD, 1252 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD, 1253 WMI_TAG_PEER_MCAST_GROUP_CMD, 1254 WMI_TAG_ROAM_AP_PROFILE, 1255 WMI_TAG_AP_PROFILE, 1256 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD, 1257 WMI_TAG_PDEV_DFS_ENABLE_CMD, 1258 WMI_TAG_PDEV_DFS_DISABLE_CMD, 1259 WMI_TAG_WOW_ADD_PATTERN_CMD, 1260 WMI_TAG_WOW_BITMAP_PATTERN_T, 1261 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T, 1262 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T, 1263 WMI_TAG_WOW_MAGIC_PATTERN_CMD, 1264 WMI_TAG_SCAN_UPDATE_REQUEST_CMD, 1265 WMI_TAG_CHATTER_PKT_COALESCING_FILTER, 1266 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD, 1267 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD, 1268 WMI_TAG_CHATTER_COALESCING_QUERY_CMD, 1269 WMI_TAG_TXBF_CMD, 1270 WMI_TAG_DEBUG_LOG_CONFIG_CMD, 1271 WMI_TAG_NLO_EVENT, 1272 WMI_TAG_CHATTER_QUERY_REPLY_EVENT, 1273 WMI_TAG_UPLOAD_H_HDR, 1274 WMI_TAG_CAPTURE_H_EVENT_HDR, 1275 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD, 1276 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD, 1277 WMI_TAG_VDEV_WMM_ADDTS_CMD, 1278 WMI_TAG_VDEV_WMM_DELTS_CMD, 1279 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 1280 WMI_TAG_TDLS_SET_STATE_CMD, 1281 WMI_TAG_TDLS_PEER_UPDATE_CMD, 1282 WMI_TAG_TDLS_PEER_EVENT, 1283 WMI_TAG_TDLS_PEER_CAPABILITIES, 1284 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD, 1285 WMI_TAG_ROAM_CHAN_LIST, 1286 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT, 1287 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD, 1288 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD, 1289 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD, 1290 WMI_TAG_BA_REQ_SSN_CMD, 1291 WMI_TAG_BA_RSP_SSN_EVENT, 1292 WMI_TAG_STA_SMPS_FORCE_MODE_CMD, 1293 WMI_TAG_SET_MCASTBCAST_FILTER_CMD, 1294 WMI_TAG_P2P_SET_OPPPS_CMD, 1295 WMI_TAG_P2P_SET_NOA_CMD, 1296 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM, 1297 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM, 1298 WMI_TAG_STA_SMPS_PARAM_CMD, 1299 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD, 1300 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD, 1301 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS, 1302 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT, 1303 WMI_TAG_P2P_NOA_EVENT, 1304 WMI_TAG_HB_SET_ENABLE_CMD, 1305 WMI_TAG_HB_SET_TCP_PARAMS_CMD, 1306 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD, 1307 WMI_TAG_HB_SET_UDP_PARAMS_CMD, 1308 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD, 1309 WMI_TAG_HB_IND_EVENT, 1310 WMI_TAG_TX_PAUSE_EVENT, 1311 WMI_TAG_RFKILL_EVENT, 1312 WMI_TAG_DFS_RADAR_EVENT, 1313 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD, 1314 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD, 1315 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST, 1316 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO, 1317 WMI_TAG_BATCH_SCAN_ENABLE_CMD, 1318 WMI_TAG_BATCH_SCAN_DISABLE_CMD, 1319 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD, 1320 WMI_TAG_BATCH_SCAN_ENABLED_EVENT, 1321 WMI_TAG_BATCH_SCAN_RESULT_EVENT, 1322 WMI_TAG_VDEV_PLMREQ_START_CMD, 1323 WMI_TAG_VDEV_PLMREQ_STOP_CMD, 1324 WMI_TAG_THERMAL_MGMT_CMD, 1325 WMI_TAG_THERMAL_MGMT_EVENT, 1326 WMI_TAG_PEER_INFO_REQ_CMD, 1327 WMI_TAG_PEER_INFO_EVENT, 1328 WMI_TAG_PEER_INFO, 1329 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT, 1330 WMI_TAG_RMC_SET_MODE_CMD, 1331 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD, 1332 WMI_TAG_RMC_CONFIG_CMD, 1333 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD, 1334 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD, 1335 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD, 1336 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD, 1337 WMI_TAG_NAN_CMD_PARAM, 1338 WMI_TAG_NAN_EVENT_HDR, 1339 WMI_TAG_PDEV_L1SS_TRACK_EVENT, 1340 WMI_TAG_DIAG_DATA_CONTAINER_EVENT, 1341 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM, 1342 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD, 1343 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT, 1344 WMI_TAG_AGGR_STATE_TRIG_EVENT, 1345 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY, 1346 WMI_TAG_ROAM_SCAN_CMD, 1347 WMI_TAG_REQ_STATS_EXT_CMD, 1348 WMI_TAG_STATS_EXT_EVENT, 1349 WMI_TAG_OBSS_SCAN_ENABLE_CMD, 1350 WMI_TAG_OBSS_SCAN_DISABLE_CMD, 1351 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT, 1352 WMI_TAG_PDEV_SET_LED_CONFIG_CMD, 1353 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD, 1354 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT, 1355 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT, 1356 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM, 1357 WMI_TAG_WOW_IOAC_PKT_PATTERN_T, 1358 WMI_TAG_WOW_IOAC_TMR_PATTERN_T, 1359 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD, 1360 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD, 1361 WMI_TAG_WOW_IOAC_KEEPALIVE_T, 1362 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD, 1363 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD, 1364 WMI_TAG_START_LINK_STATS_CMD, 1365 WMI_TAG_CLEAR_LINK_STATS_CMD, 1366 WMI_TAG_REQUEST_LINK_STATS_CMD, 1367 WMI_TAG_IFACE_LINK_STATS_EVENT, 1368 WMI_TAG_RADIO_LINK_STATS_EVENT, 1369 WMI_TAG_PEER_STATS_EVENT, 1370 WMI_TAG_CHANNEL_STATS, 1371 WMI_TAG_RADIO_LINK_STATS, 1372 WMI_TAG_RATE_STATS, 1373 WMI_TAG_PEER_LINK_STATS, 1374 WMI_TAG_WMM_AC_STATS, 1375 WMI_TAG_IFACE_LINK_STATS, 1376 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD, 1377 WMI_TAG_LPI_START_SCAN_CMD, 1378 WMI_TAG_LPI_STOP_SCAN_CMD, 1379 WMI_TAG_LPI_RESULT_EVENT, 1380 WMI_TAG_PEER_STATE_EVENT, 1381 WMI_TAG_EXTSCAN_BUCKET_CMD, 1382 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT, 1383 WMI_TAG_EXTSCAN_START_CMD, 1384 WMI_TAG_EXTSCAN_STOP_CMD, 1385 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD, 1386 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD, 1387 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD, 1388 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD, 1389 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD, 1390 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD, 1391 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD, 1392 WMI_TAG_EXTSCAN_OPERATION_EVENT, 1393 WMI_TAG_EXTSCAN_START_STOP_EVENT, 1394 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT, 1395 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT, 1396 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT, 1397 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT, 1398 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT, 1399 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT, 1400 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT, 1401 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT, 1402 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT, 1403 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT, 1404 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT, 1405 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD, 1406 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT, 1407 WMI_TAG_UNIT_TEST_CMD, 1408 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM, 1409 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM, 1410 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM, 1411 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM, 1412 WMI_TAG_ROAM_SYNCH_EVENT, 1413 WMI_TAG_ROAM_SYNCH_COMPLETE, 1414 WMI_TAG_EXTWOW_ENABLE_CMD, 1415 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD, 1416 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD, 1417 WMI_TAG_LPI_STATUS_EVENT, 1418 WMI_TAG_LPI_HANDOFF_EVENT, 1419 WMI_TAG_VDEV_RATE_STATS_EVENT, 1420 WMI_TAG_VDEV_RATE_HT_INFO, 1421 WMI_TAG_RIC_REQUEST, 1422 WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1423 WMI_TAG_PDEV_TEMPERATURE_EVENT, 1424 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD, 1425 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD, 1426 WMI_TAG_RIC_TSPEC, 1427 WMI_TAG_TPC_CHAINMASK_CONFIG, 1428 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD, 1429 WMI_TAG_SCAN_PROB_REQ_OUI_CMD, 1430 WMI_TAG_KEY_MATERIAL, 1431 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD, 1432 WMI_TAG_SET_LED_FLASHING_CMD, 1433 WMI_TAG_MDNS_OFFLOAD_CMD, 1434 WMI_TAG_MDNS_SET_FQDN_CMD, 1435 WMI_TAG_MDNS_SET_RESP_CMD, 1436 WMI_TAG_MDNS_GET_STATS_CMD, 1437 WMI_TAG_MDNS_STATS_EVENT, 1438 WMI_TAG_ROAM_INVOKE_CMD, 1439 WMI_TAG_PDEV_RESUME_EVENT, 1440 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD, 1441 WMI_TAG_SAP_OFL_ENABLE_CMD, 1442 WMI_TAG_SAP_OFL_ADD_STA_EVENT, 1443 WMI_TAG_SAP_OFL_DEL_STA_EVENT, 1444 WMI_TAG_APFIND_CMD_PARAM, 1445 WMI_TAG_APFIND_EVENT_HDR, 1446 WMI_TAG_OCB_SET_SCHED_CMD, 1447 WMI_TAG_OCB_SET_SCHED_EVENT, 1448 WMI_TAG_OCB_SET_CONFIG_CMD, 1449 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT, 1450 WMI_TAG_OCB_SET_UTC_TIME_CMD, 1451 WMI_TAG_OCB_START_TIMING_ADVERT_CMD, 1452 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD, 1453 WMI_TAG_OCB_GET_TSF_TIMER_CMD, 1454 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT, 1455 WMI_TAG_DCC_GET_STATS_CMD, 1456 WMI_TAG_DCC_CHANNEL_STATS_REQUEST, 1457 WMI_TAG_DCC_GET_STATS_RESP_EVENT, 1458 WMI_TAG_DCC_CLEAR_STATS_CMD, 1459 WMI_TAG_DCC_UPDATE_NDL_CMD, 1460 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT, 1461 WMI_TAG_DCC_STATS_EVENT, 1462 WMI_TAG_OCB_CHANNEL, 1463 WMI_TAG_OCB_SCHEDULE_ELEMENT, 1464 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL, 1465 WMI_TAG_DCC_NDL_CHAN, 1466 WMI_TAG_QOS_PARAMETER, 1467 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG, 1468 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM, 1469 WMI_TAG_ROAM_FILTER, 1470 WMI_TAG_PASSPOINT_CONFIG_CMD, 1471 WMI_TAG_PASSPOINT_EVENT_HDR, 1472 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD, 1473 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT, 1474 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD, 1475 WMI_TAG_VDEV_TSF_REPORT_EVENT, 1476 WMI_TAG_GET_FW_MEM_DUMP, 1477 WMI_TAG_UPDATE_FW_MEM_DUMP, 1478 WMI_TAG_FW_MEM_DUMP_PARAMS, 1479 WMI_TAG_DEBUG_MESG_FLUSH, 1480 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE, 1481 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION, 1482 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG, 1483 WMI_TAG_VDEV_SET_IE_CMD, 1484 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG, 1485 WMI_TAG_RSSI_BREACH_EVENT, 1486 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP, 1487 WMI_TAG_SOC_SET_PCL_CMD, 1488 WMI_TAG_SOC_SET_HW_MODE_CMD, 1489 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT, 1490 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT, 1491 WMI_TAG_VDEV_TXRX_STREAMS, 1492 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1493 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD, 1494 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT, 1495 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T, 1496 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD, 1497 WMI_TAG_DIAG_EVENT_LOG_CONFIG, 1498 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS, 1499 WMI_TAG_PACKET_FILTER_CONFIG, 1500 WMI_TAG_PACKET_FILTER_ENABLE, 1501 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD, 1502 WMI_TAG_MGMT_TX_SEND_CMD, 1503 WMI_TAG_MGMT_TX_COMPL_EVENT, 1504 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD, 1505 WMI_TAG_WOW_UDP_SVC_OFLD_CMD, 1506 WMI_TAG_LRO_INFO_CMD, 1507 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM, 1508 WMI_TAG_SERVICE_READY_EXT_EVENT, 1509 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD, 1510 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT, 1511 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD, 1512 WMI_TAG_NLO_CONFIGURE_MAWC_CMD, 1513 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD, 1514 WMI_TAG_PEER_ASSOC_CONF_EVENT, 1515 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD, 1516 WMI_TAG_AP_PS_EGAP_PARAM_CMD, 1517 WMI_TAG_AP_PS_EGAP_INFO_EVENT, 1518 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD, 1519 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD, 1520 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT, 1521 WMI_TAG_SCPC_EVENT, 1522 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST, 1523 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT, 1524 WMI_TAG_BPF_GET_CAPABILITY_CMD, 1525 WMI_TAG_BPF_CAPABILITY_INFO_EVT, 1526 WMI_TAG_BPF_GET_VDEV_STATS_CMD, 1527 WMI_TAG_BPF_VDEV_STATS_INFO_EVT, 1528 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD, 1529 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD, 1530 WMI_TAG_VDEV_DELETE_RESP_EVENT, 1531 WMI_TAG_PEER_DELETE_RESP_EVENT, 1532 WMI_TAG_ROAM_DENSE_THRES_PARAM, 1533 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM, 1534 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD, 1535 WMI_TAG_VDEV_CONFIG_RATEMASK, 1536 WMI_TAG_PDEV_FIPS_CMD, 1537 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD, 1538 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD, 1539 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD, 1540 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD, 1541 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD, 1542 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD, 1543 WMI_TAG_PDEV_SET_CTL_TABLE_CMD, 1544 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD, 1545 WMI_TAG_FWTEST_SET_PARAM_CMD, 1546 WMI_TAG_PEER_ATF_REQUEST, 1547 WMI_TAG_VDEV_ATF_REQUEST, 1548 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD, 1549 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD, 1550 WMI_TAG_INST_RSSI_STATS_RESP, 1551 WMI_TAG_MED_UTIL_REPORT_EVENT, 1552 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT, 1553 WMI_TAG_WDS_ADDR_EVENT, 1554 WMI_TAG_PEER_RATECODE_LIST_EVENT, 1555 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT, 1556 WMI_TAG_PDEV_TPC_EVENT, 1557 WMI_TAG_ANI_OFDM_EVENT, 1558 WMI_TAG_ANI_CCK_EVENT, 1559 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT, 1560 WMI_TAG_PDEV_FIPS_EVENT, 1561 WMI_TAG_ATF_PEER_INFO, 1562 WMI_TAG_PDEV_GET_TPC_CMD, 1563 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD, 1564 WMI_TAG_QBOOST_CFG_CMD, 1565 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE, 1566 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES, 1567 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM, 1568 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN, 1569 WMI_TAG_PEER_CCK_OFDM_RATE_INFO, 1570 WMI_TAG_PEER_MCS_RATE_INFO, 1571 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR, 1572 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM, 1573 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM, 1574 WMI_TAG_MU_REPORT_TOTAL_MU, 1575 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD, 1576 WMI_TAG_ROAM_SET_MBO, 1577 WMI_TAG_MIB_STATS_ENABLE_CMD, 1578 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT, 1579 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT, 1580 WMI_TAG_NAN_STARTED_CLUSTER_EVENT, 1581 WMI_TAG_NAN_JOINED_CLUSTER_EVENT, 1582 WMI_TAG_NDI_GET_CAP_REQ, 1583 WMI_TAG_NDP_INITIATOR_REQ, 1584 WMI_TAG_NDP_RESPONDER_REQ, 1585 WMI_TAG_NDP_END_REQ, 1586 WMI_TAG_NDI_CAP_RSP_EVENT, 1587 WMI_TAG_NDP_INITIATOR_RSP_EVENT, 1588 WMI_TAG_NDP_RESPONDER_RSP_EVENT, 1589 WMI_TAG_NDP_END_RSP_EVENT, 1590 WMI_TAG_NDP_INDICATION_EVENT, 1591 WMI_TAG_NDP_CONFIRM_EVENT, 1592 WMI_TAG_NDP_END_INDICATION_EVENT, 1593 WMI_TAG_VDEV_SET_QUIET_CMD, 1594 WMI_TAG_PDEV_SET_PCL_CMD, 1595 WMI_TAG_PDEV_SET_HW_MODE_CMD, 1596 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD, 1597 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD, 1598 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT, 1599 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT, 1600 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1601 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT, 1602 WMI_TAG_COEX_CONFIG_CMD, 1603 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER, 1604 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD, 1605 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1606 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD, 1607 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD, 1608 WMI_TAG_MAC_PHY_CAPABILITIES, 1609 WMI_TAG_HW_MODE_CAPABILITIES, 1610 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS, 1611 WMI_TAG_HAL_REG_CAPABILITIES_EXT, 1612 WMI_TAG_SOC_HAL_REG_CAPABILITIES, 1613 WMI_TAG_VDEV_WISA_CMD, 1614 WMI_TAG_TX_POWER_LEVEL_STATS_EVT, 1615 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV, 1616 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG, 1617 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD, 1618 WMI_TAG_NDP_END_RSP_PER_NDI, 1619 WMI_TAG_PEER_BWF_REQUEST, 1620 WMI_TAG_BWF_PEER_INFO, 1621 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD, 1622 WMI_TAG_RMC_SET_LEADER_CMD, 1623 WMI_TAG_RMC_MANUAL_LEADER_EVENT, 1624 WMI_TAG_PER_CHAIN_RSSI_STATS, 1625 WMI_TAG_RSSI_STATS, 1626 WMI_TAG_P2P_LO_START_CMD, 1627 WMI_TAG_P2P_LO_STOP_CMD, 1628 WMI_TAG_P2P_LO_STOPPED_EVENT, 1629 WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1630 WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1631 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD, 1632 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT, 1633 WMI_TAG_READ_DATA_FROM_FLASH_CMD, 1634 WMI_TAG_READ_DATA_FROM_FLASH_EVENT, 1635 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD, 1636 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD, 1637 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID, 1638 WMI_TAG_TLV_BUF_LEN_PARAM, 1639 WMI_TAG_SERVICE_AVAILABLE_EVENT, 1640 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD, 1641 WMI_TAG_PEER_ANTDIV_INFO_EVENT, 1642 WMI_TAG_PEER_ANTDIV_INFO, 1643 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD, 1644 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT, 1645 WMI_TAG_MNT_FILTER_CMD, 1646 WMI_TAG_GET_CHIP_POWER_STATS_CMD, 1647 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT, 1648 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD, 1649 WMI_TAG_COEX_REPORT_ISOLATION_EVENT, 1650 WMI_TAG_CHAN_CCA_STATS, 1651 WMI_TAG_PEER_SIGNAL_STATS, 1652 WMI_TAG_TX_STATS, 1653 WMI_TAG_PEER_AC_TX_STATS, 1654 WMI_TAG_RX_STATS, 1655 WMI_TAG_PEER_AC_RX_STATS, 1656 WMI_TAG_REPORT_STATS_EVENT, 1657 WMI_TAG_CHAN_CCA_STATS_THRESH, 1658 WMI_TAG_PEER_SIGNAL_STATS_THRESH, 1659 WMI_TAG_TX_STATS_THRESH, 1660 WMI_TAG_RX_STATS_THRESH, 1661 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD, 1662 WMI_TAG_REQUEST_WLAN_STATS_CMD, 1663 WMI_TAG_RX_AGGR_FAILURE_EVENT, 1664 WMI_TAG_RX_AGGR_FAILURE_INFO, 1665 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD, 1666 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT, 1667 WMI_TAG_PDEV_BAND_TO_MAC, 1668 WMI_TAG_TBTT_OFFSET_INFO, 1669 WMI_TAG_TBTT_OFFSET_EXT_EVENT, 1670 WMI_TAG_SAR_LIMITS_CMD, 1671 WMI_TAG_SAR_LIMIT_CMD_ROW, 1672 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 1673 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD, 1674 WMI_TAG_VDEV_ADFS_CH_CFG_CMD, 1675 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD, 1676 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT, 1677 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT, 1678 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT, 1679 WMI_TAG_VENDOR_OUI, 1680 WMI_TAG_REQUEST_RCPI_CMD, 1681 WMI_TAG_UPDATE_RCPI_EVENT, 1682 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD, 1683 WMI_TAG_PEER_STATS_INFO, 1684 WMI_TAG_PEER_STATS_INFO_EVENT, 1685 WMI_TAG_PKGID_EVENT, 1686 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS, 1687 WMI_TAG_SET_CURRENT_COUNTRY_CMD, 1688 WMI_TAG_REGULATORY_RULE_STRUCT, 1689 WMI_TAG_REG_CHAN_LIST_CC_EVENT, 1690 WMI_TAG_11D_SCAN_START_CMD, 1691 WMI_TAG_11D_SCAN_STOP_CMD, 1692 WMI_TAG_11D_NEW_COUNTRY_EVENT, 1693 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD, 1694 WMI_TAG_RADIO_CHAN_STATS, 1695 WMI_TAG_RADIO_CHAN_STATS_EVENT, 1696 WMI_TAG_ROAM_PER_CONFIG, 1697 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD, 1698 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT, 1699 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD, 1700 WMI_TAG_HW_DATA_FILTER_CMD, 1701 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF, 1702 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT, 1703 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED, 1704 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD, 1705 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT, 1706 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD, 1707 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD, 1708 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT, 1709 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD, 1710 WMI_TAG_MAC_PHY_CHAINMASK_COMBO, 1711 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY, 1712 WMI_TAG_VDEV_SET_ARP_STATS_CMD, 1713 WMI_TAG_VDEV_GET_ARP_STATS_CMD, 1714 WMI_TAG_VDEV_GET_ARP_STATS_EVENT, 1715 WMI_TAG_IFACE_OFFLOAD_STATS, 1716 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM, 1717 WMI_TAG_RSSI_CTL_EXT, 1718 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR, 1719 WMI_TAG_COEX_BT_ACTIVITY_EVENT, 1720 WMI_TAG_VDEV_GET_TX_POWER_CMD, 1721 WMI_TAG_VDEV_TX_POWER_EVENT, 1722 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT, 1723 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD, 1724 WMI_TAG_TX_SEND_PARAMS, 1725 WMI_TAG_HE_RATE_SET, 1726 WMI_TAG_CONGESTION_STATS, 1727 WMI_TAG_SET_INIT_COUNTRY_CMD, 1728 WMI_TAG_SCAN_DBS_DUTY_CYCLE, 1729 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV, 1730 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID, 1731 WMI_TAG_THERM_THROT_CONFIG_REQUEST, 1732 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 1733 WMI_TAG_THERM_THROT_STATS_EVENT, 1734 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO, 1735 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT, 1736 WMI_TAG_OEM_DMA_RING_CAPABILITIES, 1737 WMI_TAG_OEM_DMA_RING_CFG_REQ, 1738 WMI_TAG_OEM_DMA_RING_CFG_RSP, 1739 WMI_TAG_OEM_INDIRECT_DATA, 1740 WMI_TAG_OEM_DMA_BUF_RELEASE, 1741 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY, 1742 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1743 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT, 1744 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG, 1745 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD, 1746 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG, 1747 WMI_TAG_UNIT_TEST_EVENT, 1748 WMI_TAG_ROAM_FILS_OFFLOAD, 1749 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD, 1750 WMI_TAG_PMK_CACHE, 1751 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD, 1752 WMI_TAG_ROAM_FILS_SYNCH, 1753 WMI_TAG_GTK_OFFLOAD_EXTENDED, 1754 WMI_TAG_ROAM_BG_SCAN_ROAMING, 1755 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD, 1756 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD, 1757 WMI_TAG_OIC_PING_HANDOFF_EVENT, 1758 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD, 1759 WMI_TAG_DHCP_LEASE_RENEW_EVENT, 1760 WMI_TAG_BTM_CONFIG, 1761 WMI_TAG_DEBUG_MESG_FW_DATA_STALL, 1762 WMI_TAG_WLM_CONFIG_CMD, 1763 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST, 1764 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT, 1765 WMI_TAG_ROAM_CND_SCORING_PARAM, 1766 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION, 1767 WMI_TAG_VENDOR_OUI_EXT, 1768 WMI_TAG_ROAM_SYNCH_FRAME_EVENT, 1769 WMI_TAG_FD_SEND_FROM_HOST_CMD, 1770 WMI_TAG_ENABLE_FILS_CMD, 1771 WMI_TAG_HOST_SWFDA_EVENT, 1772 WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1773 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD, 1774 WMI_TAG_STATS_PERIOD, 1775 WMI_TAG_NDL_SCHEDULE_UPDATE, 1776 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD, 1777 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE, 1778 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD, 1779 WMI_TAG_SAR2_RESULT_EVENT, 1780 WMI_TAG_SAR_CAPABILITIES, 1781 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD, 1782 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT, 1783 WMI_TAG_DMA_RING_CAPABILITIES, 1784 WMI_TAG_DMA_RING_CFG_REQ, 1785 WMI_TAG_DMA_RING_CFG_RSP, 1786 WMI_TAG_DMA_BUF_RELEASE, 1787 WMI_TAG_DMA_BUF_RELEASE_ENTRY, 1788 WMI_TAG_SAR_GET_LIMITS_CMD, 1789 WMI_TAG_SAR_GET_LIMITS_EVENT, 1790 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW, 1791 WMI_TAG_OFFLOAD_11K_REPORT, 1792 WMI_TAG_INVOKE_NEIGHBOR_REPORT, 1793 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD, 1794 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS, 1795 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS, 1796 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD, 1797 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD, 1798 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD, 1799 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT, 1800 WMI_TAG_PDEV_GET_NFCAL_POWER, 1801 WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 1802 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 1803 WMI_TAG_OBSS_COLOR_COLLISION_EVT, 1804 WMI_TAG_RUNTIME_DPD_RECAL_CMD, 1805 WMI_TAG_TWT_ENABLE_CMD, 1806 WMI_TAG_TWT_DISABLE_CMD, 1807 WMI_TAG_TWT_ADD_DIALOG_CMD, 1808 WMI_TAG_TWT_DEL_DIALOG_CMD, 1809 WMI_TAG_TWT_PAUSE_DIALOG_CMD, 1810 WMI_TAG_TWT_RESUME_DIALOG_CMD, 1811 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT, 1812 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT, 1813 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT, 1814 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT, 1815 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT, 1816 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT, 1817 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD, 1818 WMI_TAG_ROAM_SCAN_STATS_EVENT, 1819 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD, 1820 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD, 1821 WMI_TAG_GET_TPC_POWER_CMD, 1822 WMI_TAG_GET_TPC_POWER_EVENT, 1823 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA, 1824 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD, 1825 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD, 1826 WMI_TAG_MOTION_DET_START_STOP_CMD, 1827 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD, 1828 WMI_TAG_MOTION_DET_EVENT, 1829 WMI_TAG_MOTION_DET_BASE_LINE_EVENT, 1830 WMI_TAG_NDP_TRANSPORT_IP, 1831 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 1832 WMI_TAG_ESP_ESTIMATE_EVENT, 1833 WMI_TAG_NAN_HOST_CONFIG, 1834 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS, 1835 WMI_TAG_PEER_CFR_CAPTURE_CMD, 1836 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD, 1837 WMI_TAG_CHAN_WIDTH_PEER_LIST, 1838 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD, 1839 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD, 1840 WMI_TAG_PEER_EXTD2_STATS, 1841 WMI_TAG_HPCS_PULSE_START_CMD, 1842 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT, 1843 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD, 1844 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD, 1845 WMI_TAG_NAN_EVENT_INFO, 1846 WMI_TAG_NDP_CHANNEL_INFO, 1847 WMI_TAG_NDP_CMD, 1848 WMI_TAG_NDP_EVENT, 1849 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301, 1850 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO, 1851 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344, 1852 WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD = 0x37b, 1853 WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD, 1854 WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD = 0x381, 1855 WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 1856 WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD, 1857 WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 1858 WMI_TAG_MAX 1859 }; 1860 1861 enum wmi_tlv_service { 1862 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0, 1863 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1, 1864 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2, 1865 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3, 1866 WMI_TLV_SERVICE_STA_PWRSAVE = 4, 1867 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5, 1868 WMI_TLV_SERVICE_AP_UAPSD = 6, 1869 WMI_TLV_SERVICE_AP_DFS = 7, 1870 WMI_TLV_SERVICE_11AC = 8, 1871 WMI_TLV_SERVICE_BLOCKACK = 9, 1872 WMI_TLV_SERVICE_PHYERR = 10, 1873 WMI_TLV_SERVICE_BCN_FILTER = 11, 1874 WMI_TLV_SERVICE_RTT = 12, 1875 WMI_TLV_SERVICE_WOW = 13, 1876 WMI_TLV_SERVICE_RATECTRL_CACHE = 14, 1877 WMI_TLV_SERVICE_IRAM_TIDS = 15, 1878 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16, 1879 WMI_TLV_SERVICE_NLO = 17, 1880 WMI_TLV_SERVICE_GTK_OFFLOAD = 18, 1881 WMI_TLV_SERVICE_SCAN_SCH = 19, 1882 WMI_TLV_SERVICE_CSA_OFFLOAD = 20, 1883 WMI_TLV_SERVICE_CHATTER = 21, 1884 WMI_TLV_SERVICE_COEX_FREQAVOID = 22, 1885 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23, 1886 WMI_TLV_SERVICE_FORCE_FW_HANG = 24, 1887 WMI_TLV_SERVICE_GPIO = 25, 1888 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26, 1889 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27, 1890 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28, 1891 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29, 1892 WMI_TLV_SERVICE_TX_ENCAP = 30, 1893 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31, 1894 WMI_TLV_SERVICE_EARLY_RX = 32, 1895 WMI_TLV_SERVICE_STA_SMPS = 33, 1896 WMI_TLV_SERVICE_FWTEST = 34, 1897 WMI_TLV_SERVICE_STA_WMMAC = 35, 1898 WMI_TLV_SERVICE_TDLS = 36, 1899 WMI_TLV_SERVICE_BURST = 37, 1900 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38, 1901 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39, 1902 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40, 1903 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41, 1904 WMI_TLV_SERVICE_WLAN_HB = 42, 1905 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43, 1906 WMI_TLV_SERVICE_BATCH_SCAN = 44, 1907 WMI_TLV_SERVICE_QPOWER = 45, 1908 WMI_TLV_SERVICE_PLMREQ = 46, 1909 WMI_TLV_SERVICE_THERMAL_MGMT = 47, 1910 WMI_TLV_SERVICE_RMC = 48, 1911 WMI_TLV_SERVICE_MHF_OFFLOAD = 49, 1912 WMI_TLV_SERVICE_COEX_SAR = 50, 1913 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51, 1914 WMI_TLV_SERVICE_NAN = 52, 1915 WMI_TLV_SERVICE_L1SS_STAT = 53, 1916 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54, 1917 WMI_TLV_SERVICE_OBSS_SCAN = 55, 1918 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56, 1919 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57, 1920 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58, 1921 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59, 1922 WMI_TLV_SERVICE_LPASS = 60, 1923 WMI_TLV_SERVICE_EXTSCAN = 61, 1924 WMI_TLV_SERVICE_D0WOW = 62, 1925 WMI_TLV_SERVICE_HSOFFLOAD = 63, 1926 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64, 1927 WMI_TLV_SERVICE_RX_FULL_REORDER = 65, 1928 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66, 1929 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67, 1930 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68, 1931 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69, 1932 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70, 1933 WMI_TLV_SERVICE_OCB = 71, 1934 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72, 1935 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73, 1936 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74, 1937 WMI_TLV_SERVICE_MGMT_TX_HTT = 75, 1938 WMI_TLV_SERVICE_MGMT_TX_WMI = 76, 1939 WMI_TLV_SERVICE_EXT_MSG = 77, 1940 WMI_TLV_SERVICE_MAWC = 78, 1941 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79, 1942 WMI_TLV_SERVICE_EGAP = 80, 1943 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81, 1944 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82, 1945 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83, 1946 WMI_TLV_SERVICE_ATF = 84, 1947 WMI_TLV_SERVICE_COEX_GPIO = 85, 1948 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86, 1949 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87, 1950 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88, 1951 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89, 1952 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90, 1953 WMI_TLV_SERVICE_BPF_OFFLOAD = 91, 1954 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92, 1955 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93, 1956 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94, 1957 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95, 1958 WMI_TLV_SERVICE_NAN_DATA = 96, 1959 WMI_TLV_SERVICE_NAN_RTT = 97, 1960 WMI_TLV_SERVICE_11AX = 98, 1961 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99, 1962 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100, 1963 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101, 1964 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102, 1965 WMI_TLV_SERVICE_MESH_11S = 103, 1966 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104, 1967 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105, 1968 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106, 1969 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107, 1970 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108, 1971 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109, 1972 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110, 1973 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111, 1974 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112, 1975 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113, 1976 WMI_TLV_SERVICE_RCPI_SUPPORT = 114, 1977 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115, 1978 WMI_TLV_SERVICE_PEER_STATS_INFO = 116, 1979 WMI_TLV_SERVICE_REGULATORY_DB = 117, 1980 WMI_TLV_SERVICE_11D_OFFLOAD = 118, 1981 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119, 1982 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120, 1983 WMI_TLV_SERVICE_PKT_ROUTING = 121, 1984 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122, 1985 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123, 1986 WMI_TLV_SERVICE_8SS_TX_BFEE = 124, 1987 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125, 1988 WMI_TLV_SERVICE_ACK_TIMEOUT = 126, 1989 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127, 1990 1991 WMI_MAX_SERVICE = 128, 1992 1993 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128, 1994 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129, 1995 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130, 1996 WMI_TLV_SERVICE_FILS_SUPPORT = 131, 1997 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132, 1998 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133, 1999 WMI_TLV_SERVICE_MAWC_SUPPORT = 134, 2000 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135, 2001 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136, 2002 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137, 2003 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138, 2004 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139, 2005 WMI_TLV_SERVICE_THERM_THROT = 140, 2006 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141, 2007 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142, 2008 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143, 2009 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144, 2010 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145, 2011 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146, 2012 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147, 2013 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148, 2014 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149, 2015 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150, 2016 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151, 2017 WMI_TLV_SERVICE_STA_TWT = 152, 2018 WMI_TLV_SERVICE_AP_TWT = 153, 2019 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154, 2020 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155, 2021 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156, 2022 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157, 2023 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158, 2024 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159, 2025 WMI_TLV_SERVICE_MOTION_DET = 160, 2026 WMI_TLV_SERVICE_INFRA_MBSSID = 161, 2027 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162, 2028 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163, 2029 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164, 2030 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165, 2031 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166, 2032 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167, 2033 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168, 2034 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169, 2035 WMI_TLV_SERVICE_ESP_SUPPORT = 170, 2036 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171, 2037 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172, 2038 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173, 2039 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174, 2040 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175, 2041 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176, 2042 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177, 2043 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178, 2044 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179, 2045 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180, 2046 WMI_TLV_SERVICE_FETCH_TX_PN = 181, 2047 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182, 2048 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183, 2049 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184, 2050 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185, 2051 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186, 2052 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187, 2053 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188, 2054 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189, 2055 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190, 2056 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191, 2057 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192, 2058 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193, 2059 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194, 2060 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195, 2061 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196, 2062 WMI_TLV_SERVICE_VOW_ENABLE = 197, 2063 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198, 2064 WMI_TLV_SERVICE_BROADCAST_TWT = 199, 2065 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200, 2066 WMI_TLV_SERVICE_PS_TDCC = 201, 2067 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202, 2068 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203, 2069 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204, 2070 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205, 2071 WMI_TLV_SERVICE_WPA3_FT_FILS = 206, 2072 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207, 2073 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208, 2074 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209, 2075 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210, 2076 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211, 2077 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212, 2078 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213, 2079 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219, 2080 WMI_TLV_SERVICE_EXT2_MSG = 220, 2081 WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249, 2082 2083 WMI_MAX_EXT_SERVICE 2084 }; 2085 2086 enum { 2087 WMI_SMPS_FORCED_MODE_NONE = 0, 2088 WMI_SMPS_FORCED_MODE_DISABLED, 2089 WMI_SMPS_FORCED_MODE_STATIC, 2090 WMI_SMPS_FORCED_MODE_DYNAMIC 2091 }; 2092 2093 #define WMI_TPC_CHAINMASK_CONFIG_BAND_2G 0 2094 #define WMI_TPC_CHAINMASK_CONFIG_BAND_5G 1 2095 #define WMI_NUM_SUPPORTED_BAND_MAX 2 2096 2097 #define WMI_PEER_MIMO_PS_STATE 0x1 2098 #define WMI_PEER_AMPDU 0x2 2099 #define WMI_PEER_AUTHORIZE 0x3 2100 #define WMI_PEER_CHWIDTH 0x4 2101 #define WMI_PEER_NSS 0x5 2102 #define WMI_PEER_USE_4ADDR 0x6 2103 #define WMI_PEER_MEMBERSHIP 0x7 2104 #define WMI_PEER_USERPOS 0x8 2105 #define WMI_PEER_CRIT_PROTO_HINT_ENABLED 0x9 2106 #define WMI_PEER_TX_FAIL_CNT_THR 0xA 2107 #define WMI_PEER_SET_HW_RETRY_CTS2S 0xB 2108 #define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH 0xC 2109 #define WMI_PEER_PHYMODE 0xD 2110 #define WMI_PEER_USE_FIXED_PWR 0xE 2111 #define WMI_PEER_PARAM_FIXED_RATE 0xF 2112 #define WMI_PEER_SET_MU_WHITELIST 0x10 2113 #define WMI_PEER_SET_MAX_TX_RATE 0x11 2114 #define WMI_PEER_SET_MIN_TX_RATE 0x12 2115 #define WMI_PEER_SET_DEFAULT_ROUTING 0x13 2116 2117 /* slot time long */ 2118 #define WMI_VDEV_SLOT_TIME_LONG 0x1 2119 /* slot time short */ 2120 #define WMI_VDEV_SLOT_TIME_SHORT 0x2 2121 /* preablbe long */ 2122 #define WMI_VDEV_PREAMBLE_LONG 0x1 2123 /* preablbe short */ 2124 #define WMI_VDEV_PREAMBLE_SHORT 0x2 2125 2126 enum wmi_peer_smps_state { 2127 WMI_PEER_SMPS_PS_NONE = 0x0, 2128 WMI_PEER_SMPS_STATIC = 0x1, 2129 WMI_PEER_SMPS_DYNAMIC = 0x2 2130 }; 2131 2132 enum wmi_peer_chwidth { 2133 WMI_PEER_CHWIDTH_20MHZ = 0, 2134 WMI_PEER_CHWIDTH_40MHZ = 1, 2135 WMI_PEER_CHWIDTH_80MHZ = 2, 2136 WMI_PEER_CHWIDTH_160MHZ = 3, 2137 }; 2138 2139 enum wmi_beacon_gen_mode { 2140 WMI_BEACON_STAGGERED_MODE = 0, 2141 WMI_BEACON_BURST_MODE = 1 2142 }; 2143 2144 enum wmi_direct_buffer_module { 2145 WMI_DIRECT_BUF_SPECTRAL = 0, 2146 WMI_DIRECT_BUF_CFR = 1, 2147 2148 /* keep it last */ 2149 WMI_DIRECT_BUF_MAX 2150 }; 2151 2152 /* enum wmi_nss_ratio - NSS ratio received from FW during service ready ext 2153 * event 2154 * WMI_NSS_RATIO_1BY2_NSS -Max nss of 160MHz is equals to half of the max nss 2155 * of 80MHz 2156 * WMI_NSS_RATIO_3BY4_NSS - Max nss of 160MHz is equals to 3/4 of the max nss 2157 * of 80MHz 2158 * WMI_NSS_RATIO_1_NSS - Max nss of 160MHz is equals to the max nss of 80MHz 2159 * WMI_NSS_RATIO_2_NSS - Max nss of 160MHz is equals to two times the max 2160 * nss of 80MHz 2161 */ 2162 2163 enum wmi_nss_ratio { 2164 WMI_NSS_RATIO_1BY2_NSS = 0x0, 2165 WMI_NSS_RATIO_3BY4_NSS = 0x1, 2166 WMI_NSS_RATIO_1_NSS = 0x2, 2167 WMI_NSS_RATIO_2_NSS = 0x3, 2168 }; 2169 2170 struct wmi_host_pdev_band_to_mac { 2171 u32 pdev_id; 2172 u32 start_freq; 2173 u32 end_freq; 2174 }; 2175 2176 struct ath11k_ppe_threshold { 2177 u32 numss_m1; 2178 u32 ru_bit_mask; 2179 u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS]; 2180 }; 2181 2182 struct ath11k_service_ext_param { 2183 u32 default_conc_scan_config_bits; 2184 u32 default_fw_config_bits; 2185 struct ath11k_ppe_threshold ppet; 2186 u32 he_cap_info; 2187 u32 mpdu_density; 2188 u32 max_bssid_rx_filters; 2189 u32 num_hw_modes; 2190 u32 num_phy; 2191 }; 2192 2193 struct ath11k_hw_mode_caps { 2194 u32 hw_mode_id; 2195 u32 phy_id_map; 2196 u32 hw_mode_config_type; 2197 }; 2198 2199 #define PSOC_HOST_MAX_PHY_SIZE (3) 2200 #define ATH11K_11B_SUPPORT BIT(0) 2201 #define ATH11K_11G_SUPPORT BIT(1) 2202 #define ATH11K_11A_SUPPORT BIT(2) 2203 #define ATH11K_11N_SUPPORT BIT(3) 2204 #define ATH11K_11AC_SUPPORT BIT(4) 2205 #define ATH11K_11AX_SUPPORT BIT(5) 2206 2207 struct ath11k_hal_reg_capabilities_ext { 2208 u32 phy_id; 2209 u32 eeprom_reg_domain; 2210 u32 eeprom_reg_domain_ext; 2211 u32 regcap1; 2212 u32 regcap2; 2213 u32 wireless_modes; 2214 u32 low_2ghz_chan; 2215 u32 high_2ghz_chan; 2216 u32 low_5ghz_chan; 2217 u32 high_5ghz_chan; 2218 }; 2219 2220 #define WMI_HOST_MAX_PDEV 3 2221 2222 struct wlan_host_mem_chunk { 2223 u32 tlv_header; 2224 u32 req_id; 2225 u32 ptr; 2226 u32 size; 2227 } __packed; 2228 2229 struct wmi_host_mem_chunk { 2230 void *vaddr; 2231 dma_addr_t paddr; 2232 u32 len; 2233 u32 req_id; 2234 }; 2235 2236 struct wmi_init_cmd_param { 2237 u32 tlv_header; 2238 struct target_resource_config *res_cfg; 2239 u8 num_mem_chunks; 2240 struct wmi_host_mem_chunk *mem_chunks; 2241 u32 hw_mode_id; 2242 u32 num_band_to_mac; 2243 struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV]; 2244 }; 2245 2246 struct wmi_pdev_band_to_mac { 2247 u32 tlv_header; 2248 u32 pdev_id; 2249 u32 start_freq; 2250 u32 end_freq; 2251 } __packed; 2252 2253 struct wmi_pdev_set_hw_mode_cmd_param { 2254 u32 tlv_header; 2255 u32 pdev_id; 2256 u32 hw_mode_index; 2257 u32 num_band_to_mac; 2258 } __packed; 2259 2260 struct wmi_ppe_threshold { 2261 u32 numss_m1; /** NSS - 1*/ 2262 union { 2263 u32 ru_count; 2264 u32 ru_mask; 2265 } __packed; 2266 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2267 } __packed; 2268 2269 #define HW_BD_INFO_SIZE 5 2270 2271 struct wmi_abi_version { 2272 u32 abi_version_0; 2273 u32 abi_version_1; 2274 u32 abi_version_ns_0; 2275 u32 abi_version_ns_1; 2276 u32 abi_version_ns_2; 2277 u32 abi_version_ns_3; 2278 } __packed; 2279 2280 struct wmi_init_cmd { 2281 u32 tlv_header; 2282 struct wmi_abi_version host_abi_vers; 2283 u32 num_host_mem_chunks; 2284 } __packed; 2285 2286 #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5) 2287 2288 struct wmi_resource_config { 2289 u32 tlv_header; 2290 u32 num_vdevs; 2291 u32 num_peers; 2292 u32 num_offload_peers; 2293 u32 num_offload_reorder_buffs; 2294 u32 num_peer_keys; 2295 u32 num_tids; 2296 u32 ast_skid_limit; 2297 u32 tx_chain_mask; 2298 u32 rx_chain_mask; 2299 u32 rx_timeout_pri[4]; 2300 u32 rx_decap_mode; 2301 u32 scan_max_pending_req; 2302 u32 bmiss_offload_max_vdev; 2303 u32 roam_offload_max_vdev; 2304 u32 roam_offload_max_ap_profiles; 2305 u32 num_mcast_groups; 2306 u32 num_mcast_table_elems; 2307 u32 mcast2ucast_mode; 2308 u32 tx_dbg_log_size; 2309 u32 num_wds_entries; 2310 u32 dma_burst_size; 2311 u32 mac_aggr_delim; 2312 u32 rx_skip_defrag_timeout_dup_detection_check; 2313 u32 vow_config; 2314 u32 gtk_offload_max_vdev; 2315 u32 num_msdu_desc; 2316 u32 max_frag_entries; 2317 u32 num_tdls_vdevs; 2318 u32 num_tdls_conn_table_entries; 2319 u32 beacon_tx_offload_max_vdev; 2320 u32 num_multicast_filter_entries; 2321 u32 num_wow_filters; 2322 u32 num_keep_alive_pattern; 2323 u32 keep_alive_pattern_size; 2324 u32 max_tdls_concurrent_sleep_sta; 2325 u32 max_tdls_concurrent_buffer_sta; 2326 u32 wmi_send_separate; 2327 u32 num_ocb_vdevs; 2328 u32 num_ocb_channels; 2329 u32 num_ocb_schedules; 2330 u32 flag1; 2331 u32 smart_ant_cap; 2332 u32 bk_minfree; 2333 u32 be_minfree; 2334 u32 vi_minfree; 2335 u32 vo_minfree; 2336 u32 alloc_frag_desc_for_data_pkt; 2337 u32 num_ns_ext_tuples_cfg; 2338 u32 bpf_instruction_size; 2339 u32 max_bssid_rx_filters; 2340 u32 use_pdev_id; 2341 u32 max_num_dbs_scan_duty_cycle; 2342 u32 max_num_group_keys; 2343 u32 peer_map_unmap_v2_support; 2344 u32 sched_params; 2345 u32 twt_ap_pdev_count; 2346 u32 twt_ap_sta_count; 2347 } __packed; 2348 2349 struct wmi_service_ready_event { 2350 u32 fw_build_vers; 2351 struct wmi_abi_version fw_abi_vers; 2352 u32 phy_capability; 2353 u32 max_frag_entry; 2354 u32 num_rf_chains; 2355 u32 ht_cap_info; 2356 u32 vht_cap_info; 2357 u32 vht_supp_mcs; 2358 u32 hw_min_tx_power; 2359 u32 hw_max_tx_power; 2360 u32 sys_cap_info; 2361 u32 min_pkt_size_enable; 2362 u32 max_bcn_ie_size; 2363 u32 num_mem_reqs; 2364 u32 max_num_scan_channels; 2365 u32 hw_bd_id; 2366 u32 hw_bd_info[HW_BD_INFO_SIZE]; 2367 u32 max_supported_macs; 2368 u32 wmi_fw_sub_feat_caps; 2369 u32 num_dbs_hw_modes; 2370 /* txrx_chainmask 2371 * [7:0] - 2G band tx chain mask 2372 * [15:8] - 2G band rx chain mask 2373 * [23:16] - 5G band tx chain mask 2374 * [31:24] - 5G band rx chain mask 2375 */ 2376 u32 txrx_chainmask; 2377 u32 default_dbs_hw_mode_index; 2378 u32 num_msdu_desc; 2379 } __packed; 2380 2381 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32)) 2382 2383 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */ 2384 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32)) 2385 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32 2386 #define WMI_SERVICE_BITS_IN_SIZE32 4 2387 2388 struct wmi_service_ready_ext_event { 2389 u32 default_conc_scan_config_bits; 2390 u32 default_fw_config_bits; 2391 struct wmi_ppe_threshold ppet; 2392 u32 he_cap_info; 2393 u32 mpdu_density; 2394 u32 max_bssid_rx_filters; 2395 u32 fw_build_vers_ext; 2396 u32 max_nlo_ssids; 2397 u32 max_bssid_indicator; 2398 u32 he_cap_info_ext; 2399 } __packed; 2400 2401 struct wmi_soc_mac_phy_hw_mode_caps { 2402 u32 num_hw_modes; 2403 u32 num_chainmask_tables; 2404 } __packed; 2405 2406 struct wmi_hw_mode_capabilities { 2407 u32 tlv_header; 2408 u32 hw_mode_id; 2409 u32 phy_id_map; 2410 u32 hw_mode_config_type; 2411 } __packed; 2412 2413 #define WMI_MAX_HECAP_PHY_SIZE (3) 2414 #define WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS BIT(0) 2415 #define WMI_NSS_RATIO_ENABLE_DISABLE_GET(_val) \ 2416 FIELD_GET(WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS, _val) 2417 #define WMI_NSS_RATIO_INFO_BITPOS GENMASK(4, 1) 2418 #define WMI_NSS_RATIO_INFO_GET(_val) \ 2419 FIELD_GET(WMI_NSS_RATIO_INFO_BITPOS, _val) 2420 2421 struct wmi_mac_phy_capabilities { 2422 u32 hw_mode_id; 2423 u32 pdev_id; 2424 u32 phy_id; 2425 u32 supported_flags; 2426 u32 supported_bands; 2427 u32 ampdu_density; 2428 u32 max_bw_supported_2g; 2429 u32 ht_cap_info_2g; 2430 u32 vht_cap_info_2g; 2431 u32 vht_supp_mcs_2g; 2432 u32 he_cap_info_2g; 2433 u32 he_supp_mcs_2g; 2434 u32 tx_chain_mask_2g; 2435 u32 rx_chain_mask_2g; 2436 u32 max_bw_supported_5g; 2437 u32 ht_cap_info_5g; 2438 u32 vht_cap_info_5g; 2439 u32 vht_supp_mcs_5g; 2440 u32 he_cap_info_5g; 2441 u32 he_supp_mcs_5g; 2442 u32 tx_chain_mask_5g; 2443 u32 rx_chain_mask_5g; 2444 u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE]; 2445 u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE]; 2446 struct wmi_ppe_threshold he_ppet2g; 2447 struct wmi_ppe_threshold he_ppet5g; 2448 u32 chainmask_table_id; 2449 u32 lmac_id; 2450 u32 he_cap_info_2g_ext; 2451 u32 he_cap_info_5g_ext; 2452 u32 he_cap_info_internal; 2453 u32 wireless_modes; 2454 u32 low_2ghz_chan_freq; 2455 u32 high_2ghz_chan_freq; 2456 u32 low_5ghz_chan_freq; 2457 u32 high_5ghz_chan_freq; 2458 u32 nss_ratio; 2459 } __packed; 2460 2461 struct wmi_hal_reg_capabilities_ext { 2462 u32 tlv_header; 2463 u32 phy_id; 2464 u32 eeprom_reg_domain; 2465 u32 eeprom_reg_domain_ext; 2466 u32 regcap1; 2467 u32 regcap2; 2468 u32 wireless_modes; 2469 u32 low_2ghz_chan; 2470 u32 high_2ghz_chan; 2471 u32 low_5ghz_chan; 2472 u32 high_5ghz_chan; 2473 } __packed; 2474 2475 struct wmi_soc_hal_reg_capabilities { 2476 u32 num_phy; 2477 } __packed; 2478 2479 /* 2 word representation of MAC addr */ 2480 struct wmi_mac_addr { 2481 union { 2482 u8 addr[6]; 2483 struct { 2484 u32 word0; 2485 u32 word1; 2486 } __packed; 2487 } __packed; 2488 } __packed; 2489 2490 struct wmi_dma_ring_capabilities { 2491 u32 tlv_header; 2492 u32 pdev_id; 2493 u32 module_id; 2494 u32 min_elem; 2495 u32 min_buf_sz; 2496 u32 min_buf_align; 2497 } __packed; 2498 2499 struct wmi_ready_event_min { 2500 struct wmi_abi_version fw_abi_vers; 2501 struct wmi_mac_addr mac_addr; 2502 u32 status; 2503 u32 num_dscp_table; 2504 u32 num_extra_mac_addr; 2505 u32 num_total_peers; 2506 u32 num_extra_peers; 2507 } __packed; 2508 2509 struct wmi_ready_event { 2510 struct wmi_ready_event_min ready_event_min; 2511 u32 max_ast_index; 2512 u32 pktlog_defs_checksum; 2513 } __packed; 2514 2515 struct wmi_service_available_event { 2516 u32 wmi_service_segment_offset; 2517 u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32]; 2518 } __packed; 2519 2520 struct ath11k_pdev_wmi { 2521 struct ath11k_wmi_base *wmi_ab; 2522 enum ath11k_htc_ep_id eid; 2523 const struct wmi_peer_flags_map *peer_flags; 2524 u32 rx_decap_mode; 2525 }; 2526 2527 struct vdev_create_params { 2528 u8 if_id; 2529 u32 type; 2530 u32 subtype; 2531 struct { 2532 u8 tx; 2533 u8 rx; 2534 } chains[NUM_NL80211_BANDS]; 2535 u32 pdev_id; 2536 }; 2537 2538 struct wmi_vdev_create_cmd { 2539 u32 tlv_header; 2540 u32 vdev_id; 2541 u32 vdev_type; 2542 u32 vdev_subtype; 2543 struct wmi_mac_addr vdev_macaddr; 2544 u32 num_cfg_txrx_streams; 2545 u32 pdev_id; 2546 } __packed; 2547 2548 struct wmi_vdev_txrx_streams { 2549 u32 tlv_header; 2550 u32 band; 2551 u32 supported_tx_streams; 2552 u32 supported_rx_streams; 2553 } __packed; 2554 2555 struct wmi_vdev_delete_cmd { 2556 u32 tlv_header; 2557 u32 vdev_id; 2558 } __packed; 2559 2560 struct wmi_vdev_up_cmd { 2561 u32 tlv_header; 2562 u32 vdev_id; 2563 u32 vdev_assoc_id; 2564 struct wmi_mac_addr vdev_bssid; 2565 struct wmi_mac_addr trans_bssid; 2566 u32 profile_idx; 2567 u32 profile_num; 2568 } __packed; 2569 2570 struct wmi_vdev_stop_cmd { 2571 u32 tlv_header; 2572 u32 vdev_id; 2573 } __packed; 2574 2575 struct wmi_vdev_down_cmd { 2576 u32 tlv_header; 2577 u32 vdev_id; 2578 } __packed; 2579 2580 #define WMI_VDEV_START_HIDDEN_SSID BIT(0) 2581 #define WMI_VDEV_START_PMF_ENABLED BIT(1) 2582 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) 2583 #define WMI_VDEV_START_HW_ENCRYPTION_DISABLED BIT(4) 2584 2585 struct wmi_ssid { 2586 u32 ssid_len; 2587 u32 ssid[8]; 2588 } __packed; 2589 2590 #define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ) 2591 2592 struct wmi_vdev_start_request_cmd { 2593 u32 tlv_header; 2594 u32 vdev_id; 2595 u32 requestor_id; 2596 u32 beacon_interval; 2597 u32 dtim_period; 2598 u32 flags; 2599 struct wmi_ssid ssid; 2600 u32 bcn_tx_rate; 2601 u32 bcn_txpower; 2602 u32 num_noa_descriptors; 2603 u32 disable_hw_ack; 2604 u32 preferred_tx_streams; 2605 u32 preferred_rx_streams; 2606 u32 he_ops; 2607 u32 cac_duration_ms; 2608 u32 regdomain; 2609 } __packed; 2610 2611 #define MGMT_TX_DL_FRM_LEN 64 2612 #define WMI_MAC_MAX_SSID_LENGTH 32 2613 struct mac_ssid { 2614 u8 length; 2615 u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH]; 2616 } __packed; 2617 2618 struct wmi_p2p_noa_descriptor { 2619 u32 type_count; 2620 u32 duration; 2621 u32 interval; 2622 u32 start_time; 2623 }; 2624 2625 struct channel_param { 2626 u8 chan_id; 2627 u8 pwr; 2628 u32 mhz; 2629 u32 half_rate:1, 2630 quarter_rate:1, 2631 dfs_set:1, 2632 dfs_set_cfreq2:1, 2633 is_chan_passive:1, 2634 allow_ht:1, 2635 allow_vht:1, 2636 allow_he:1, 2637 set_agile:1, 2638 psc_channel:1; 2639 u32 phy_mode; 2640 u32 cfreq1; 2641 u32 cfreq2; 2642 char maxpower; 2643 char minpower; 2644 char maxregpower; 2645 u8 antennamax; 2646 u8 reg_class_id; 2647 } __packed; 2648 2649 enum wmi_phy_mode { 2650 MODE_11A = 0, 2651 MODE_11G = 1, /* 11b/g Mode */ 2652 MODE_11B = 2, /* 11b Mode */ 2653 MODE_11GONLY = 3, /* 11g only Mode */ 2654 MODE_11NA_HT20 = 4, 2655 MODE_11NG_HT20 = 5, 2656 MODE_11NA_HT40 = 6, 2657 MODE_11NG_HT40 = 7, 2658 MODE_11AC_VHT20 = 8, 2659 MODE_11AC_VHT40 = 9, 2660 MODE_11AC_VHT80 = 10, 2661 MODE_11AC_VHT20_2G = 11, 2662 MODE_11AC_VHT40_2G = 12, 2663 MODE_11AC_VHT80_2G = 13, 2664 MODE_11AC_VHT80_80 = 14, 2665 MODE_11AC_VHT160 = 15, 2666 MODE_11AX_HE20 = 16, 2667 MODE_11AX_HE40 = 17, 2668 MODE_11AX_HE80 = 18, 2669 MODE_11AX_HE80_80 = 19, 2670 MODE_11AX_HE160 = 20, 2671 MODE_11AX_HE20_2G = 21, 2672 MODE_11AX_HE40_2G = 22, 2673 MODE_11AX_HE80_2G = 23, 2674 MODE_UNKNOWN = 24, 2675 MODE_MAX = 24 2676 }; 2677 2678 static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode) 2679 { 2680 switch (mode) { 2681 case MODE_11A: 2682 return "11a"; 2683 case MODE_11G: 2684 return "11g"; 2685 case MODE_11B: 2686 return "11b"; 2687 case MODE_11GONLY: 2688 return "11gonly"; 2689 case MODE_11NA_HT20: 2690 return "11na-ht20"; 2691 case MODE_11NG_HT20: 2692 return "11ng-ht20"; 2693 case MODE_11NA_HT40: 2694 return "11na-ht40"; 2695 case MODE_11NG_HT40: 2696 return "11ng-ht40"; 2697 case MODE_11AC_VHT20: 2698 return "11ac-vht20"; 2699 case MODE_11AC_VHT40: 2700 return "11ac-vht40"; 2701 case MODE_11AC_VHT80: 2702 return "11ac-vht80"; 2703 case MODE_11AC_VHT160: 2704 return "11ac-vht160"; 2705 case MODE_11AC_VHT80_80: 2706 return "11ac-vht80+80"; 2707 case MODE_11AC_VHT20_2G: 2708 return "11ac-vht20-2g"; 2709 case MODE_11AC_VHT40_2G: 2710 return "11ac-vht40-2g"; 2711 case MODE_11AC_VHT80_2G: 2712 return "11ac-vht80-2g"; 2713 case MODE_11AX_HE20: 2714 return "11ax-he20"; 2715 case MODE_11AX_HE40: 2716 return "11ax-he40"; 2717 case MODE_11AX_HE80: 2718 return "11ax-he80"; 2719 case MODE_11AX_HE80_80: 2720 return "11ax-he80+80"; 2721 case MODE_11AX_HE160: 2722 return "11ax-he160"; 2723 case MODE_11AX_HE20_2G: 2724 return "11ax-he20-2g"; 2725 case MODE_11AX_HE40_2G: 2726 return "11ax-he40-2g"; 2727 case MODE_11AX_HE80_2G: 2728 return "11ax-he80-2g"; 2729 case MODE_UNKNOWN: 2730 /* skip */ 2731 break; 2732 2733 /* no default handler to allow compiler to check that the 2734 * enum is fully handled 2735 */ 2736 } 2737 2738 return "<unknown>"; 2739 } 2740 2741 struct wmi_channel_arg { 2742 u32 freq; 2743 u32 band_center_freq1; 2744 u32 band_center_freq2; 2745 bool passive; 2746 bool allow_ibss; 2747 bool allow_ht; 2748 bool allow_vht; 2749 bool ht40plus; 2750 bool chan_radar; 2751 bool freq2_radar; 2752 bool allow_he; 2753 u32 min_power; 2754 u32 max_power; 2755 u32 max_reg_power; 2756 u32 max_antenna_gain; 2757 enum wmi_phy_mode mode; 2758 }; 2759 2760 struct wmi_vdev_start_req_arg { 2761 u32 vdev_id; 2762 struct wmi_channel_arg channel; 2763 u32 bcn_intval; 2764 u32 dtim_period; 2765 u8 *ssid; 2766 u32 ssid_len; 2767 u32 bcn_tx_rate; 2768 u32 bcn_tx_power; 2769 bool disable_hw_ack; 2770 bool hidden_ssid; 2771 bool pmf_enabled; 2772 u32 he_ops; 2773 u32 cac_duration_ms; 2774 u32 regdomain; 2775 u32 pref_rx_streams; 2776 u32 pref_tx_streams; 2777 u32 num_noa_descriptors; 2778 }; 2779 2780 struct peer_create_params { 2781 const u8 *peer_addr; 2782 u32 peer_type; 2783 u32 vdev_id; 2784 }; 2785 2786 struct peer_delete_params { 2787 u8 vdev_id; 2788 }; 2789 2790 struct peer_flush_params { 2791 u32 peer_tid_bitmap; 2792 u8 vdev_id; 2793 }; 2794 2795 struct pdev_set_regdomain_params { 2796 u16 current_rd_in_use; 2797 u16 current_rd_2g; 2798 u16 current_rd_5g; 2799 u32 ctl_2g; 2800 u32 ctl_5g; 2801 u8 dfs_domain; 2802 u32 pdev_id; 2803 }; 2804 2805 struct rx_reorder_queue_remove_params { 2806 u8 *peer_macaddr; 2807 u16 vdev_id; 2808 u32 peer_tid_bitmap; 2809 }; 2810 2811 #define WMI_HOST_PDEV_ID_SOC 0xFF 2812 #define WMI_HOST_PDEV_ID_0 0 2813 #define WMI_HOST_PDEV_ID_1 1 2814 #define WMI_HOST_PDEV_ID_2 2 2815 2816 #define WMI_PDEV_ID_SOC 0 2817 #define WMI_PDEV_ID_1ST 1 2818 #define WMI_PDEV_ID_2ND 2 2819 #define WMI_PDEV_ID_3RD 3 2820 2821 /* Freq units in MHz */ 2822 #define REG_RULE_START_FREQ 0x0000ffff 2823 #define REG_RULE_END_FREQ 0xffff0000 2824 #define REG_RULE_FLAGS 0x0000ffff 2825 #define REG_RULE_MAX_BW 0x0000ffff 2826 #define REG_RULE_REG_PWR 0x00ff0000 2827 #define REG_RULE_ANT_GAIN 0xff000000 2828 2829 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 2830 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 2831 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 2832 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 2833 2834 #define HECAP_PHYDWORD_0 0 2835 #define HECAP_PHYDWORD_1 1 2836 #define HECAP_PHYDWORD_2 2 2837 2838 #define HECAP_PHY_SU_BFER BIT(31) 2839 #define HECAP_PHY_SU_BFEE BIT(0) 2840 #define HECAP_PHY_MU_BFER BIT(1) 2841 #define HECAP_PHY_UL_MUMIMO BIT(22) 2842 #define HECAP_PHY_UL_MUOFDMA BIT(23) 2843 2844 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \ 2845 FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0]) 2846 2847 #define HECAP_PHY_SUBFME_GET(hecap_phy) \ 2848 FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1]) 2849 2850 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \ 2851 FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1]) 2852 2853 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \ 2854 FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0]) 2855 2856 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \ 2857 FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0]) 2858 2859 #define HE_MODE_SU_TX_BFEE BIT(0) 2860 #define HE_MODE_SU_TX_BFER BIT(1) 2861 #define HE_MODE_MU_TX_BFEE BIT(2) 2862 #define HE_MODE_MU_TX_BFER BIT(3) 2863 #define HE_MODE_DL_OFDMA BIT(4) 2864 #define HE_MODE_UL_OFDMA BIT(5) 2865 #define HE_MODE_UL_MUMIMO BIT(6) 2866 2867 #define HE_DL_MUOFDMA_ENABLE 1 2868 #define HE_UL_MUOFDMA_ENABLE 1 2869 #define HE_DL_MUMIMO_ENABLE 1 2870 #define HE_MU_BFEE_ENABLE 1 2871 #define HE_SU_BFEE_ENABLE 1 2872 2873 #define HE_VHT_SOUNDING_MODE_ENABLE 1 2874 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1 2875 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1 2876 2877 /* HE or VHT Sounding */ 2878 #define HE_VHT_SOUNDING_MODE BIT(0) 2879 /* SU or MU Sounding */ 2880 #define HE_SU_MU_SOUNDING_MODE BIT(2) 2881 /* Trig or Non-Trig Sounding */ 2882 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3) 2883 2884 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 2885 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 2886 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 2887 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700 2888 2889 struct pdev_params { 2890 u32 param_id; 2891 u32 param_value; 2892 }; 2893 2894 enum wmi_peer_type { 2895 WMI_PEER_TYPE_DEFAULT = 0, 2896 WMI_PEER_TYPE_BSS = 1, 2897 WMI_PEER_TYPE_TDLS = 2, 2898 }; 2899 2900 struct wmi_peer_create_cmd { 2901 u32 tlv_header; 2902 u32 vdev_id; 2903 struct wmi_mac_addr peer_macaddr; 2904 u32 peer_type; 2905 } __packed; 2906 2907 struct wmi_peer_delete_cmd { 2908 u32 tlv_header; 2909 u32 vdev_id; 2910 struct wmi_mac_addr peer_macaddr; 2911 } __packed; 2912 2913 struct wmi_peer_reorder_queue_setup_cmd { 2914 u32 tlv_header; 2915 u32 vdev_id; 2916 struct wmi_mac_addr peer_macaddr; 2917 u32 tid; 2918 u32 queue_ptr_lo; 2919 u32 queue_ptr_hi; 2920 u32 queue_no; 2921 u32 ba_window_size_valid; 2922 u32 ba_window_size; 2923 } __packed; 2924 2925 struct wmi_peer_reorder_queue_remove_cmd { 2926 u32 tlv_header; 2927 u32 vdev_id; 2928 struct wmi_mac_addr peer_macaddr; 2929 u32 tid_mask; 2930 } __packed; 2931 2932 struct gpio_config_params { 2933 u32 gpio_num; 2934 u32 input; 2935 u32 pull_type; 2936 u32 intr_mode; 2937 }; 2938 2939 enum wmi_gpio_type { 2940 WMI_GPIO_PULL_NONE, 2941 WMI_GPIO_PULL_UP, 2942 WMI_GPIO_PULL_DOWN 2943 }; 2944 2945 enum wmi_gpio_intr_type { 2946 WMI_GPIO_INTTYPE_DISABLE, 2947 WMI_GPIO_INTTYPE_RISING_EDGE, 2948 WMI_GPIO_INTTYPE_FALLING_EDGE, 2949 WMI_GPIO_INTTYPE_BOTH_EDGE, 2950 WMI_GPIO_INTTYPE_LEVEL_LOW, 2951 WMI_GPIO_INTTYPE_LEVEL_HIGH 2952 }; 2953 2954 enum wmi_bss_chan_info_req_type { 2955 WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 2956 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 2957 }; 2958 2959 struct wmi_gpio_config_cmd_param { 2960 u32 tlv_header; 2961 u32 gpio_num; 2962 u32 input; 2963 u32 pull_type; 2964 u32 intr_mode; 2965 }; 2966 2967 struct gpio_output_params { 2968 u32 gpio_num; 2969 u32 set; 2970 }; 2971 2972 struct wmi_gpio_output_cmd_param { 2973 u32 tlv_header; 2974 u32 gpio_num; 2975 u32 set; 2976 }; 2977 2978 struct set_fwtest_params { 2979 u32 arg; 2980 u32 value; 2981 }; 2982 2983 struct wmi_fwtest_set_param_cmd_param { 2984 u32 tlv_header; 2985 u32 param_id; 2986 u32 param_value; 2987 }; 2988 2989 struct wmi_pdev_set_param_cmd { 2990 u32 tlv_header; 2991 u32 pdev_id; 2992 u32 param_id; 2993 u32 param_value; 2994 } __packed; 2995 2996 struct wmi_pdev_set_ps_mode_cmd { 2997 u32 tlv_header; 2998 u32 vdev_id; 2999 u32 sta_ps_mode; 3000 } __packed; 3001 3002 struct wmi_pdev_suspend_cmd { 3003 u32 tlv_header; 3004 u32 pdev_id; 3005 u32 suspend_opt; 3006 } __packed; 3007 3008 struct wmi_pdev_resume_cmd { 3009 u32 tlv_header; 3010 u32 pdev_id; 3011 } __packed; 3012 3013 struct wmi_pdev_bss_chan_info_req_cmd { 3014 u32 tlv_header; 3015 /* ref wmi_bss_chan_info_req_type */ 3016 u32 req_type; 3017 u32 pdev_id; 3018 } __packed; 3019 3020 struct wmi_ap_ps_peer_cmd { 3021 u32 tlv_header; 3022 u32 vdev_id; 3023 struct wmi_mac_addr peer_macaddr; 3024 u32 param; 3025 u32 value; 3026 } __packed; 3027 3028 struct wmi_sta_powersave_param_cmd { 3029 u32 tlv_header; 3030 u32 vdev_id; 3031 u32 param; 3032 u32 value; 3033 } __packed; 3034 3035 struct wmi_pdev_set_regdomain_cmd { 3036 u32 tlv_header; 3037 u32 pdev_id; 3038 u32 reg_domain; 3039 u32 reg_domain_2g; 3040 u32 reg_domain_5g; 3041 u32 conformance_test_limit_2g; 3042 u32 conformance_test_limit_5g; 3043 u32 dfs_domain; 3044 } __packed; 3045 3046 struct wmi_peer_set_param_cmd { 3047 u32 tlv_header; 3048 u32 vdev_id; 3049 struct wmi_mac_addr peer_macaddr; 3050 u32 param_id; 3051 u32 param_value; 3052 } __packed; 3053 3054 struct wmi_peer_flush_tids_cmd { 3055 u32 tlv_header; 3056 u32 vdev_id; 3057 struct wmi_mac_addr peer_macaddr; 3058 u32 peer_tid_bitmap; 3059 } __packed; 3060 3061 struct wmi_dfs_phyerr_offload_cmd { 3062 u32 tlv_header; 3063 u32 pdev_id; 3064 } __packed; 3065 3066 struct wmi_bcn_offload_ctrl_cmd { 3067 u32 tlv_header; 3068 u32 vdev_id; 3069 u32 bcn_ctrl_op; 3070 } __packed; 3071 3072 enum scan_dwelltime_adaptive_mode { 3073 SCAN_DWELL_MODE_DEFAULT = 0, 3074 SCAN_DWELL_MODE_CONSERVATIVE = 1, 3075 SCAN_DWELL_MODE_MODERATE = 2, 3076 SCAN_DWELL_MODE_AGGRESSIVE = 3, 3077 SCAN_DWELL_MODE_STATIC = 4 3078 }; 3079 3080 #define WLAN_SCAN_MAX_NUM_SSID 10 3081 #define WLAN_SCAN_MAX_NUM_BSSID 10 3082 #define WLAN_SCAN_MAX_NUM_CHANNELS 40 3083 3084 #define WLAN_SSID_MAX_LEN 32 3085 3086 struct element_info { 3087 u32 len; 3088 u8 *ptr; 3089 }; 3090 3091 struct wlan_ssid { 3092 u8 length; 3093 u8 ssid[WLAN_SSID_MAX_LEN]; 3094 }; 3095 3096 #define WMI_IE_BITMAP_SIZE 8 3097 3098 #define WMI_SCAN_MAX_NUM_SSID 0x0A 3099 /* prefix used by scan requestor ids on the host */ 3100 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 3101 3102 /* prefix used by scan request ids generated on the host */ 3103 /* host cycles through the lower 12 bits to generate ids */ 3104 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 3105 3106 #define WLAN_SCAN_PARAMS_MAX_SSID 16 3107 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 3108 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 3109 3110 /* Values lower than this may be refused by some firmware revisions with a scan 3111 * completion with a timedout reason. 3112 */ 3113 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 3114 3115 /* Scan priority numbers must be sequential, starting with 0 */ 3116 enum wmi_scan_priority { 3117 WMI_SCAN_PRIORITY_VERY_LOW = 0, 3118 WMI_SCAN_PRIORITY_LOW, 3119 WMI_SCAN_PRIORITY_MEDIUM, 3120 WMI_SCAN_PRIORITY_HIGH, 3121 WMI_SCAN_PRIORITY_VERY_HIGH, 3122 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 3123 }; 3124 3125 enum wmi_scan_event_type { 3126 WMI_SCAN_EVENT_STARTED = BIT(0), 3127 WMI_SCAN_EVENT_COMPLETED = BIT(1), 3128 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 3129 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3), 3130 WMI_SCAN_EVENT_DEQUEUED = BIT(4), 3131 /* possibly by high-prio scan */ 3132 WMI_SCAN_EVENT_PREEMPTED = BIT(5), 3133 WMI_SCAN_EVENT_START_FAILED = BIT(6), 3134 WMI_SCAN_EVENT_RESTARTED = BIT(7), 3135 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8), 3136 WMI_SCAN_EVENT_SUSPENDED = BIT(9), 3137 WMI_SCAN_EVENT_RESUMED = BIT(10), 3138 WMI_SCAN_EVENT_MAX = BIT(15), 3139 }; 3140 3141 enum wmi_scan_completion_reason { 3142 WMI_SCAN_REASON_COMPLETED, 3143 WMI_SCAN_REASON_CANCELLED, 3144 WMI_SCAN_REASON_PREEMPTED, 3145 WMI_SCAN_REASON_TIMEDOUT, 3146 WMI_SCAN_REASON_INTERNAL_FAILURE, 3147 WMI_SCAN_REASON_MAX, 3148 }; 3149 3150 struct wmi_start_scan_cmd { 3151 u32 tlv_header; 3152 u32 scan_id; 3153 u32 scan_req_id; 3154 u32 vdev_id; 3155 u32 scan_priority; 3156 u32 notify_scan_events; 3157 u32 dwell_time_active; 3158 u32 dwell_time_passive; 3159 u32 min_rest_time; 3160 u32 max_rest_time; 3161 u32 repeat_probe_time; 3162 u32 probe_spacing_time; 3163 u32 idle_time; 3164 u32 max_scan_time; 3165 u32 probe_delay; 3166 u32 scan_ctrl_flags; 3167 u32 burst_duration; 3168 u32 num_chan; 3169 u32 num_bssid; 3170 u32 num_ssids; 3171 u32 ie_len; 3172 u32 n_probes; 3173 struct wmi_mac_addr mac_addr; 3174 struct wmi_mac_addr mac_mask; 3175 u32 ie_bitmap[WMI_IE_BITMAP_SIZE]; 3176 u32 num_vendor_oui; 3177 u32 scan_ctrl_flags_ext; 3178 u32 dwell_time_active_2g; 3179 u32 dwell_time_active_6g; 3180 u32 dwell_time_passive_6g; 3181 u32 scan_start_offset; 3182 } __packed; 3183 3184 #define WMI_SCAN_FLAG_PASSIVE 0x1 3185 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 3186 #define WMI_SCAN_ADD_CCK_RATES 0x4 3187 #define WMI_SCAN_ADD_OFDM_RATES 0x8 3188 #define WMI_SCAN_CHAN_STAT_EVENT 0x10 3189 #define WMI_SCAN_FILTER_PROBE_REQ 0x20 3190 #define WMI_SCAN_BYPASS_DFS_CHN 0x40 3191 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 3192 #define WMI_SCAN_FILTER_PROMISCUOS 0x100 3193 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200 3194 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400 3195 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800 3196 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000 3197 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000 3198 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000 3199 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000 3200 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000 3201 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000 3202 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 3203 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 3204 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 3205 3206 #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000 3207 #define WMI_SCAN_DWELL_MODE_SHIFT 21 3208 3209 enum { 3210 WMI_SCAN_DWELL_MODE_DEFAULT = 0, 3211 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1, 3212 WMI_SCAN_DWELL_MODE_MODERATE = 2, 3213 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3, 3214 WMI_SCAN_DWELL_MODE_STATIC = 4, 3215 }; 3216 3217 #define WMI_SCAN_SET_DWELL_MODE(flag, mode) \ 3218 ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \ 3219 WMI_SCAN_DWELL_MODE_MASK)) 3220 3221 struct hint_short_ssid { 3222 u32 freq_flags; 3223 u32 short_ssid; 3224 }; 3225 3226 struct hint_bssid { 3227 u32 freq_flags; 3228 struct wmi_mac_addr bssid; 3229 }; 3230 3231 struct scan_req_params { 3232 u32 scan_id; 3233 u32 scan_req_id; 3234 u32 vdev_id; 3235 u32 pdev_id; 3236 enum wmi_scan_priority scan_priority; 3237 union { 3238 struct { 3239 u32 scan_ev_started:1, 3240 scan_ev_completed:1, 3241 scan_ev_bss_chan:1, 3242 scan_ev_foreign_chan:1, 3243 scan_ev_dequeued:1, 3244 scan_ev_preempted:1, 3245 scan_ev_start_failed:1, 3246 scan_ev_restarted:1, 3247 scan_ev_foreign_chn_exit:1, 3248 scan_ev_invalid:1, 3249 scan_ev_gpio_timeout:1, 3250 scan_ev_suspended:1, 3251 scan_ev_resumed:1; 3252 }; 3253 u32 scan_events; 3254 }; 3255 u32 dwell_time_active; 3256 u32 dwell_time_active_2g; 3257 u32 dwell_time_passive; 3258 u32 dwell_time_active_6g; 3259 u32 dwell_time_passive_6g; 3260 u32 min_rest_time; 3261 u32 max_rest_time; 3262 u32 repeat_probe_time; 3263 u32 probe_spacing_time; 3264 u32 idle_time; 3265 u32 max_scan_time; 3266 u32 probe_delay; 3267 union { 3268 struct { 3269 u32 scan_f_passive:1, 3270 scan_f_bcast_probe:1, 3271 scan_f_cck_rates:1, 3272 scan_f_ofdm_rates:1, 3273 scan_f_chan_stat_evnt:1, 3274 scan_f_filter_prb_req:1, 3275 scan_f_bypass_dfs_chn:1, 3276 scan_f_continue_on_err:1, 3277 scan_f_offchan_mgmt_tx:1, 3278 scan_f_offchan_data_tx:1, 3279 scan_f_promisc_mode:1, 3280 scan_f_capture_phy_err:1, 3281 scan_f_strict_passive_pch:1, 3282 scan_f_half_rate:1, 3283 scan_f_quarter_rate:1, 3284 scan_f_force_active_dfs_chn:1, 3285 scan_f_add_tpc_ie_in_probe:1, 3286 scan_f_add_ds_ie_in_probe:1, 3287 scan_f_add_spoofed_mac_in_probe:1, 3288 scan_f_add_rand_seq_in_probe:1, 3289 scan_f_en_ie_whitelist_in_probe:1, 3290 scan_f_forced:1, 3291 scan_f_2ghz:1, 3292 scan_f_5ghz:1, 3293 scan_f_80mhz:1; 3294 }; 3295 u32 scan_flags; 3296 }; 3297 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode; 3298 u32 burst_duration; 3299 u32 num_chan; 3300 u32 num_bssid; 3301 u32 num_ssids; 3302 u32 n_probes; 3303 u32 chan_list[WLAN_SCAN_MAX_NUM_CHANNELS]; 3304 u32 notify_scan_events; 3305 struct wlan_ssid ssid[WLAN_SCAN_MAX_NUM_SSID]; 3306 struct wmi_mac_addr bssid_list[WLAN_SCAN_MAX_NUM_BSSID]; 3307 struct element_info extraie; 3308 struct element_info htcap; 3309 struct element_info vhtcap; 3310 u32 num_hint_s_ssid; 3311 u32 num_hint_bssid; 3312 struct hint_short_ssid hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID]; 3313 struct hint_bssid hint_bssid[WLAN_SCAN_MAX_HINT_BSSID]; 3314 }; 3315 3316 struct wmi_ssid_arg { 3317 int len; 3318 const u8 *ssid; 3319 }; 3320 3321 struct wmi_bssid_arg { 3322 const u8 *bssid; 3323 }; 3324 3325 struct wmi_start_scan_arg { 3326 u32 scan_id; 3327 u32 scan_req_id; 3328 u32 vdev_id; 3329 u32 scan_priority; 3330 u32 notify_scan_events; 3331 u32 dwell_time_active; 3332 u32 dwell_time_passive; 3333 u32 min_rest_time; 3334 u32 max_rest_time; 3335 u32 repeat_probe_time; 3336 u32 probe_spacing_time; 3337 u32 idle_time; 3338 u32 max_scan_time; 3339 u32 probe_delay; 3340 u32 scan_ctrl_flags; 3341 3342 u32 ie_len; 3343 u32 n_channels; 3344 u32 n_ssids; 3345 u32 n_bssids; 3346 3347 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN]; 3348 u32 channels[64]; 3349 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID]; 3350 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID]; 3351 }; 3352 3353 #define WMI_SCAN_STOP_ONE 0x00000000 3354 #define WMI_SCN_STOP_VAP_ALL 0x01000000 3355 #define WMI_SCAN_STOP_ALL 0x04000000 3356 3357 /* Prefix 0xA000 indicates that the scan request 3358 * is trigger by HOST 3359 */ 3360 #define ATH11K_SCAN_ID 0xA000 3361 3362 enum scan_cancel_req_type { 3363 WLAN_SCAN_CANCEL_SINGLE = 1, 3364 WLAN_SCAN_CANCEL_VDEV_ALL, 3365 WLAN_SCAN_CANCEL_PDEV_ALL, 3366 }; 3367 3368 struct scan_cancel_param { 3369 u32 requester; 3370 u32 scan_id; 3371 enum scan_cancel_req_type req_type; 3372 u32 vdev_id; 3373 u32 pdev_id; 3374 }; 3375 3376 struct wmi_bcn_send_from_host_cmd { 3377 u32 tlv_header; 3378 u32 vdev_id; 3379 u32 data_len; 3380 union { 3381 u32 frag_ptr; 3382 u32 frag_ptr_lo; 3383 }; 3384 u32 frame_ctrl; 3385 u32 dtim_flag; 3386 u32 bcn_antenna; 3387 u32 frag_ptr_hi; 3388 }; 3389 3390 #define WMI_CHAN_INFO_MODE GENMASK(5, 0) 3391 #define WMI_CHAN_INFO_HT40_PLUS BIT(6) 3392 #define WMI_CHAN_INFO_PASSIVE BIT(7) 3393 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8) 3394 #define WMI_CHAN_INFO_AP_DISABLED BIT(9) 3395 #define WMI_CHAN_INFO_DFS BIT(10) 3396 #define WMI_CHAN_INFO_ALLOW_HT BIT(11) 3397 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12) 3398 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13) 3399 #define WMI_CHAN_INFO_HALF_RATE BIT(14) 3400 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15) 3401 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) 3402 #define WMI_CHAN_INFO_ALLOW_HE BIT(17) 3403 #define WMI_CHAN_INFO_PSC BIT(18) 3404 3405 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) 3406 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) 3407 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16) 3408 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24) 3409 3410 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0) 3411 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8) 3412 3413 struct wmi_channel { 3414 u32 tlv_header; 3415 u32 mhz; 3416 u32 band_center_freq1; 3417 u32 band_center_freq2; 3418 u32 info; 3419 u32 reg_info_1; 3420 u32 reg_info_2; 3421 } __packed; 3422 3423 struct wmi_mgmt_params { 3424 void *tx_frame; 3425 u16 frm_len; 3426 u8 vdev_id; 3427 u16 chanfreq; 3428 void *pdata; 3429 u16 desc_id; 3430 u8 *macaddr; 3431 }; 3432 3433 enum wmi_sta_ps_mode { 3434 WMI_STA_PS_MODE_DISABLED = 0, 3435 WMI_STA_PS_MODE_ENABLED = 1, 3436 }; 3437 3438 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF 3439 #define WMI_SMPS_MASK_UPPER_3BITS 0x7 3440 #define WMI_SMPS_PARAM_VALUE_SHIFT 29 3441 3442 #define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1 3443 #define ATH11K_WMI_FW_HANG_DELAY 0 3444 3445 /* type, 0:unused 1: ASSERT 2: not respond detect command 3446 * delay_time_ms, the simulate will delay time 3447 */ 3448 3449 struct wmi_force_fw_hang_cmd { 3450 u32 tlv_header; 3451 u32 type; 3452 u32 delay_time_ms; 3453 }; 3454 3455 struct wmi_vdev_set_param_cmd { 3456 u32 tlv_header; 3457 u32 vdev_id; 3458 u32 param_id; 3459 u32 param_value; 3460 } __packed; 3461 3462 enum wmi_stats_id { 3463 WMI_REQUEST_PEER_STAT = BIT(0), 3464 WMI_REQUEST_AP_STAT = BIT(1), 3465 WMI_REQUEST_PDEV_STAT = BIT(2), 3466 WMI_REQUEST_VDEV_STAT = BIT(3), 3467 WMI_REQUEST_BCNFLT_STAT = BIT(4), 3468 WMI_REQUEST_VDEV_RATE_STAT = BIT(5), 3469 WMI_REQUEST_INST_STAT = BIT(6), 3470 WMI_REQUEST_MIB_STAT = BIT(7), 3471 WMI_REQUEST_RSSI_PER_CHAIN_STAT = BIT(8), 3472 WMI_REQUEST_CONGESTION_STAT = BIT(9), 3473 WMI_REQUEST_PEER_EXTD_STAT = BIT(10), 3474 WMI_REQUEST_BCN_STAT = BIT(11), 3475 WMI_REQUEST_BCN_STAT_RESET = BIT(12), 3476 WMI_REQUEST_PEER_EXTD2_STAT = BIT(13), 3477 }; 3478 3479 struct wmi_request_stats_cmd { 3480 u32 tlv_header; 3481 enum wmi_stats_id stats_id; 3482 u32 vdev_id; 3483 struct wmi_mac_addr peer_macaddr; 3484 u32 pdev_id; 3485 } __packed; 3486 3487 struct wmi_get_pdev_temperature_cmd { 3488 u32 tlv_header; 3489 u32 param; 3490 u32 pdev_id; 3491 } __packed; 3492 3493 #define WMI_BEACON_TX_BUFFER_SIZE 512 3494 3495 struct wmi_bcn_tmpl_cmd { 3496 u32 tlv_header; 3497 u32 vdev_id; 3498 u32 tim_ie_offset; 3499 u32 buf_len; 3500 u32 csa_switch_count_offset; 3501 u32 ext_csa_switch_count_offset; 3502 u32 csa_event_bitmap; 3503 u32 mbssid_ie_offset; 3504 u32 esp_ie_offset; 3505 } __packed; 3506 3507 struct wmi_key_seq_counter { 3508 u32 key_seq_counter_l; 3509 u32 key_seq_counter_h; 3510 } __packed; 3511 3512 struct wmi_vdev_install_key_cmd { 3513 u32 tlv_header; 3514 u32 vdev_id; 3515 struct wmi_mac_addr peer_macaddr; 3516 u32 key_idx; 3517 u32 key_flags; 3518 u32 key_cipher; 3519 struct wmi_key_seq_counter key_rsc_counter; 3520 struct wmi_key_seq_counter key_global_rsc_counter; 3521 struct wmi_key_seq_counter key_tsc_counter; 3522 u8 wpi_key_rsc_counter[16]; 3523 u8 wpi_key_tsc_counter[16]; 3524 u32 key_len; 3525 u32 key_txmic_len; 3526 u32 key_rxmic_len; 3527 u32 is_group_key_id_valid; 3528 u32 group_key_id; 3529 3530 /* Followed by key_data containing key followed by 3531 * tx mic and then rx mic 3532 */ 3533 } __packed; 3534 3535 struct wmi_vdev_install_key_arg { 3536 u32 vdev_id; 3537 const u8 *macaddr; 3538 u32 key_idx; 3539 u32 key_flags; 3540 u32 key_cipher; 3541 u32 key_len; 3542 u32 key_txmic_len; 3543 u32 key_rxmic_len; 3544 u64 key_rsc_counter; 3545 const void *key_data; 3546 }; 3547 3548 #define WMI_MAX_SUPPORTED_RATES 128 3549 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3 3550 #define WMI_HOST_MAX_HE_RATE_SET 3 3551 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0 3552 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1 3553 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2 3554 3555 struct wmi_rate_set_arg { 3556 u32 num_rates; 3557 u8 rates[WMI_MAX_SUPPORTED_RATES]; 3558 }; 3559 3560 struct peer_assoc_params { 3561 struct wmi_mac_addr peer_macaddr; 3562 u32 vdev_id; 3563 u32 peer_new_assoc; 3564 u32 peer_associd; 3565 u32 peer_flags; 3566 u32 peer_caps; 3567 u32 peer_listen_intval; 3568 u32 peer_ht_caps; 3569 u32 peer_max_mpdu; 3570 u32 peer_mpdu_density; 3571 u32 peer_rate_caps; 3572 u32 peer_nss; 3573 u32 peer_vht_caps; 3574 u32 peer_phymode; 3575 u32 peer_ht_info[2]; 3576 struct wmi_rate_set_arg peer_legacy_rates; 3577 struct wmi_rate_set_arg peer_ht_rates; 3578 u32 rx_max_rate; 3579 u32 rx_mcs_set; 3580 u32 tx_max_rate; 3581 u32 tx_mcs_set; 3582 u8 vht_capable; 3583 u8 min_data_rate; 3584 u32 tx_max_mcs_nss; 3585 u32 peer_bw_rxnss_override; 3586 bool is_pmf_enabled; 3587 bool is_wme_set; 3588 bool qos_flag; 3589 bool apsd_flag; 3590 bool ht_flag; 3591 bool bw_40; 3592 bool bw_80; 3593 bool bw_160; 3594 bool stbc_flag; 3595 bool ldpc_flag; 3596 bool static_mimops_flag; 3597 bool dynamic_mimops_flag; 3598 bool spatial_mux_flag; 3599 bool vht_flag; 3600 bool vht_ng_flag; 3601 bool need_ptk_4_way; 3602 bool need_gtk_2_way; 3603 bool auth_flag; 3604 bool safe_mode_enabled; 3605 bool amsdu_disable; 3606 /* Use common structure */ 3607 u8 peer_mac[ETH_ALEN]; 3608 3609 bool he_flag; 3610 u32 peer_he_cap_macinfo[2]; 3611 u32 peer_he_cap_macinfo_internal; 3612 u32 peer_he_caps_6ghz; 3613 u32 peer_he_ops; 3614 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; 3615 u32 peer_he_mcs_count; 3616 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3617 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3618 bool twt_responder; 3619 bool twt_requester; 3620 struct ath11k_ppe_threshold peer_ppet; 3621 }; 3622 3623 struct wmi_peer_assoc_complete_cmd { 3624 u32 tlv_header; 3625 struct wmi_mac_addr peer_macaddr; 3626 u32 vdev_id; 3627 u32 peer_new_assoc; 3628 u32 peer_associd; 3629 u32 peer_flags; 3630 u32 peer_caps; 3631 u32 peer_listen_intval; 3632 u32 peer_ht_caps; 3633 u32 peer_max_mpdu; 3634 u32 peer_mpdu_density; 3635 u32 peer_rate_caps; 3636 u32 peer_nss; 3637 u32 peer_vht_caps; 3638 u32 peer_phymode; 3639 u32 peer_ht_info[2]; 3640 u32 num_peer_legacy_rates; 3641 u32 num_peer_ht_rates; 3642 u32 peer_bw_rxnss_override; 3643 struct wmi_ppe_threshold peer_ppet; 3644 u32 peer_he_cap_info; 3645 u32 peer_he_ops; 3646 u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE]; 3647 u32 peer_he_mcs; 3648 u32 peer_he_cap_info_ext; 3649 u32 peer_he_cap_info_internal; 3650 u32 min_data_rate; 3651 u32 peer_he_caps_6ghz; 3652 } __packed; 3653 3654 struct wmi_stop_scan_cmd { 3655 u32 tlv_header; 3656 u32 requestor; 3657 u32 scan_id; 3658 u32 req_type; 3659 u32 vdev_id; 3660 u32 pdev_id; 3661 }; 3662 3663 struct scan_chan_list_params { 3664 u32 pdev_id; 3665 u16 nallchans; 3666 struct channel_param ch_param[]; 3667 }; 3668 3669 struct wmi_scan_chan_list_cmd { 3670 u32 tlv_header; 3671 u32 num_scan_chans; 3672 u32 flags; 3673 u32 pdev_id; 3674 } __packed; 3675 3676 #define WMI_MGMT_SEND_DOWNLD_LEN 64 3677 3678 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0) 3679 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8) 3680 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20) 3681 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28) 3682 3683 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0) 3684 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8) 3685 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15) 3686 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20) 3687 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21) 3688 3689 struct wmi_mgmt_send_params { 3690 u32 tlv_header; 3691 u32 tx_params_dword0; 3692 u32 tx_params_dword1; 3693 }; 3694 3695 struct wmi_mgmt_send_cmd { 3696 u32 tlv_header; 3697 u32 vdev_id; 3698 u32 desc_id; 3699 u32 chanfreq; 3700 u32 paddr_lo; 3701 u32 paddr_hi; 3702 u32 frame_len; 3703 u32 buf_len; 3704 u32 tx_params_valid; 3705 3706 /* This TLV is followed by struct wmi_mgmt_frame */ 3707 3708 /* Followed by struct wmi_mgmt_send_params */ 3709 } __packed; 3710 3711 struct wmi_sta_powersave_mode_cmd { 3712 u32 tlv_header; 3713 u32 vdev_id; 3714 u32 sta_ps_mode; 3715 }; 3716 3717 struct wmi_sta_smps_force_mode_cmd { 3718 u32 tlv_header; 3719 u32 vdev_id; 3720 u32 forced_mode; 3721 }; 3722 3723 struct wmi_sta_smps_param_cmd { 3724 u32 tlv_header; 3725 u32 vdev_id; 3726 u32 param; 3727 u32 value; 3728 }; 3729 3730 struct wmi_bcn_prb_info { 3731 u32 tlv_header; 3732 u32 caps; 3733 u32 erp; 3734 } __packed; 3735 3736 enum { 3737 WMI_PDEV_SUSPEND, 3738 WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 3739 }; 3740 3741 struct green_ap_ps_params { 3742 u32 value; 3743 }; 3744 3745 struct wmi_pdev_green_ap_ps_enable_cmd_param { 3746 u32 tlv_header; 3747 u32 pdev_id; 3748 u32 enable; 3749 }; 3750 3751 struct ap_ps_params { 3752 u32 vdev_id; 3753 u32 param; 3754 u32 value; 3755 }; 3756 3757 struct vdev_set_params { 3758 u32 if_id; 3759 u32 param_id; 3760 u32 param_value; 3761 }; 3762 3763 struct stats_request_params { 3764 u32 stats_id; 3765 u32 vdev_id; 3766 u32 pdev_id; 3767 }; 3768 3769 enum set_init_cc_type { 3770 WMI_COUNTRY_INFO_TYPE_ALPHA, 3771 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE, 3772 WMI_COUNTRY_INFO_TYPE_REGDOMAIN, 3773 }; 3774 3775 enum set_init_cc_flags { 3776 INVALID_CC, 3777 CC_IS_SET, 3778 REGDMN_IS_SET, 3779 ALPHA_IS_SET, 3780 }; 3781 3782 struct wmi_init_country_params { 3783 union { 3784 u16 country_code; 3785 u16 regdom_id; 3786 u8 alpha2[3]; 3787 } cc_info; 3788 enum set_init_cc_flags flags; 3789 }; 3790 3791 struct wmi_init_country_cmd { 3792 u32 tlv_header; 3793 u32 pdev_id; 3794 u32 init_cc_type; 3795 union { 3796 u32 country_code; 3797 u32 regdom_id; 3798 u32 alpha2; 3799 } cc_info; 3800 } __packed; 3801 3802 #define THERMAL_LEVELS 1 3803 struct tt_level_config { 3804 u32 tmplwm; 3805 u32 tmphwm; 3806 u32 dcoffpercent; 3807 u32 priority; 3808 }; 3809 3810 struct thermal_mitigation_params { 3811 u32 pdev_id; 3812 u32 enable; 3813 u32 dc; 3814 u32 dc_per_event; 3815 struct tt_level_config levelconf[THERMAL_LEVELS]; 3816 }; 3817 3818 struct wmi_therm_throt_config_request_cmd { 3819 u32 tlv_header; 3820 u32 pdev_id; 3821 u32 enable; 3822 u32 dc; 3823 u32 dc_per_event; 3824 u32 therm_throt_levels; 3825 } __packed; 3826 3827 struct wmi_therm_throt_level_config_info { 3828 u32 tlv_header; 3829 u32 temp_lwm; 3830 u32 temp_hwm; 3831 u32 dc_off_percent; 3832 u32 prio; 3833 } __packed; 3834 3835 struct wmi_delba_send_cmd { 3836 u32 tlv_header; 3837 u32 vdev_id; 3838 struct wmi_mac_addr peer_macaddr; 3839 u32 tid; 3840 u32 initiator; 3841 u32 reasoncode; 3842 } __packed; 3843 3844 struct wmi_addba_setresponse_cmd { 3845 u32 tlv_header; 3846 u32 vdev_id; 3847 struct wmi_mac_addr peer_macaddr; 3848 u32 tid; 3849 u32 statuscode; 3850 } __packed; 3851 3852 struct wmi_addba_send_cmd { 3853 u32 tlv_header; 3854 u32 vdev_id; 3855 struct wmi_mac_addr peer_macaddr; 3856 u32 tid; 3857 u32 buffersize; 3858 } __packed; 3859 3860 struct wmi_addba_clear_resp_cmd { 3861 u32 tlv_header; 3862 u32 vdev_id; 3863 struct wmi_mac_addr peer_macaddr; 3864 } __packed; 3865 3866 struct wmi_pdev_pktlog_filter_info { 3867 u32 tlv_header; 3868 struct wmi_mac_addr peer_macaddr; 3869 } __packed; 3870 3871 struct wmi_pdev_pktlog_filter_cmd { 3872 u32 tlv_header; 3873 u32 pdev_id; 3874 u32 enable; 3875 u32 filter_type; 3876 u32 num_mac; 3877 } __packed; 3878 3879 enum ath11k_wmi_pktlog_enable { 3880 ATH11K_WMI_PKTLOG_ENABLE_AUTO = 0, 3881 ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1, 3882 }; 3883 3884 struct wmi_pktlog_enable_cmd { 3885 u32 tlv_header; 3886 u32 pdev_id; 3887 u32 evlist; /* WMI_PKTLOG_EVENT */ 3888 u32 enable; 3889 } __packed; 3890 3891 struct wmi_pktlog_disable_cmd { 3892 u32 tlv_header; 3893 u32 pdev_id; 3894 } __packed; 3895 3896 #define DFS_PHYERR_UNIT_TEST_CMD 0 3897 #define DFS_UNIT_TEST_MODULE 0x2b 3898 #define DFS_UNIT_TEST_TOKEN 0xAA 3899 3900 enum dfs_test_args_idx { 3901 DFS_TEST_CMDID = 0, 3902 DFS_TEST_PDEV_ID, 3903 DFS_TEST_RADAR_PARAM, 3904 DFS_MAX_TEST_ARGS, 3905 }; 3906 3907 struct wmi_dfs_unit_test_arg { 3908 u32 cmd_id; 3909 u32 pdev_id; 3910 u32 radar_param; 3911 }; 3912 3913 struct wmi_unit_test_cmd { 3914 u32 tlv_header; 3915 u32 vdev_id; 3916 u32 module_id; 3917 u32 num_args; 3918 u32 diag_token; 3919 /* Followed by test args*/ 3920 } __packed; 3921 3922 #define MAX_SUPPORTED_RATES 128 3923 3924 #define WMI_PEER_AUTH 0x00000001 3925 #define WMI_PEER_QOS 0x00000002 3926 #define WMI_PEER_NEED_PTK_4_WAY 0x00000004 3927 #define WMI_PEER_NEED_GTK_2_WAY 0x00000010 3928 #define WMI_PEER_HE 0x00000400 3929 #define WMI_PEER_APSD 0x00000800 3930 #define WMI_PEER_HT 0x00001000 3931 #define WMI_PEER_40MHZ 0x00002000 3932 #define WMI_PEER_STBC 0x00008000 3933 #define WMI_PEER_LDPC 0x00010000 3934 #define WMI_PEER_DYN_MIMOPS 0x00020000 3935 #define WMI_PEER_STATIC_MIMOPS 0x00040000 3936 #define WMI_PEER_SPATIAL_MUX 0x00200000 3937 #define WMI_PEER_TWT_REQ 0x00400000 3938 #define WMI_PEER_TWT_RESP 0x00800000 3939 #define WMI_PEER_VHT 0x02000000 3940 #define WMI_PEER_80MHZ 0x04000000 3941 #define WMI_PEER_PMF 0x08000000 3942 /* TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000. 3943 * Need to be cleaned up 3944 */ 3945 #define WMI_PEER_IS_P2P_CAPABLE 0x20000000 3946 #define WMI_PEER_160MHZ 0x40000000 3947 #define WMI_PEER_SAFEMODE_EN 0x80000000 3948 3949 struct beacon_tmpl_params { 3950 u8 vdev_id; 3951 u32 tim_ie_offset; 3952 u32 tmpl_len; 3953 u32 tmpl_len_aligned; 3954 u32 csa_switch_count_offset; 3955 u32 ext_csa_switch_count_offset; 3956 u8 *frm; 3957 }; 3958 3959 struct wmi_rate_set { 3960 u32 num_rates; 3961 u32 rates[(MAX_SUPPORTED_RATES / 4) + 1]; 3962 }; 3963 3964 struct wmi_vht_rate_set { 3965 u32 tlv_header; 3966 u32 rx_max_rate; 3967 u32 rx_mcs_set; 3968 u32 tx_max_rate; 3969 u32 tx_mcs_set; 3970 u32 tx_max_mcs_nss; 3971 } __packed; 3972 3973 struct wmi_he_rate_set { 3974 u32 tlv_header; 3975 3976 /* MCS at which the peer can receive */ 3977 u32 rx_mcs_set; 3978 3979 /* MCS at which the peer can transmit */ 3980 u32 tx_mcs_set; 3981 } __packed; 3982 3983 #define MAX_REG_RULES 10 3984 #define REG_ALPHA2_LEN 2 3985 3986 enum wmi_start_event_param { 3987 WMI_VDEV_START_RESP_EVENT = 0, 3988 WMI_VDEV_RESTART_RESP_EVENT, 3989 }; 3990 3991 struct wmi_vdev_start_resp_event { 3992 u32 vdev_id; 3993 u32 requestor_id; 3994 enum wmi_start_event_param resp_type; 3995 u32 status; 3996 u32 chain_mask; 3997 u32 smps_mode; 3998 union { 3999 u32 mac_id; 4000 u32 pdev_id; 4001 }; 4002 u32 cfgd_tx_streams; 4003 u32 cfgd_rx_streams; 4004 } __packed; 4005 4006 /* VDEV start response status codes */ 4007 enum wmi_vdev_start_resp_status_code { 4008 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0, 4009 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1, 4010 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2, 4011 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3, 4012 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, 4013 }; 4014 4015 ; 4016 enum cc_setting_code { 4017 REG_SET_CC_STATUS_PASS = 0, 4018 REG_CURRENT_ALPHA2_NOT_FOUND = 1, 4019 REG_INIT_ALPHA2_NOT_FOUND = 2, 4020 REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 4021 REG_SET_CC_STATUS_NO_MEMORY = 4, 4022 REG_SET_CC_STATUS_FAIL = 5, 4023 }; 4024 4025 /* Regaulatory Rule Flags Passed by FW */ 4026 #define REGULATORY_CHAN_DISABLED BIT(0) 4027 #define REGULATORY_CHAN_NO_IR BIT(1) 4028 #define REGULATORY_CHAN_RADAR BIT(3) 4029 #define REGULATORY_CHAN_NO_OFDM BIT(6) 4030 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 4031 4032 #define REGULATORY_CHAN_NO_HT40 BIT(4) 4033 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 4034 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 4035 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 4036 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 4037 4038 enum { 4039 WMI_REG_SET_CC_STATUS_PASS = 0, 4040 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1, 4041 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2, 4042 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 4043 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4, 4044 WMI_REG_SET_CC_STATUS_FAIL = 5, 4045 }; 4046 4047 struct cur_reg_rule { 4048 u16 start_freq; 4049 u16 end_freq; 4050 u16 max_bw; 4051 u8 reg_power; 4052 u8 ant_gain; 4053 u16 flags; 4054 }; 4055 4056 struct cur_regulatory_info { 4057 enum cc_setting_code status_code; 4058 u8 num_phy; 4059 u8 phy_id; 4060 u16 reg_dmn_pair; 4061 u16 ctry_code; 4062 u8 alpha2[REG_ALPHA2_LEN + 1]; 4063 u32 dfs_region; 4064 u32 phybitmap; 4065 u32 min_bw_2g; 4066 u32 max_bw_2g; 4067 u32 min_bw_5g; 4068 u32 max_bw_5g; 4069 u32 num_2g_reg_rules; 4070 u32 num_5g_reg_rules; 4071 struct cur_reg_rule *reg_rules_2g_ptr; 4072 struct cur_reg_rule *reg_rules_5g_ptr; 4073 }; 4074 4075 struct wmi_reg_chan_list_cc_event { 4076 u32 status_code; 4077 u32 phy_id; 4078 u32 alpha2; 4079 u32 num_phy; 4080 u32 country_id; 4081 u32 domain_code; 4082 u32 dfs_region; 4083 u32 phybitmap; 4084 u32 min_bw_2g; 4085 u32 max_bw_2g; 4086 u32 min_bw_5g; 4087 u32 max_bw_5g; 4088 u32 num_2g_reg_rules; 4089 u32 num_5g_reg_rules; 4090 } __packed; 4091 4092 struct wmi_regulatory_rule_struct { 4093 u32 tlv_header; 4094 u32 freq_info; 4095 u32 bw_pwr_info; 4096 u32 flag_info; 4097 }; 4098 4099 struct wmi_vdev_delete_resp_event { 4100 u32 vdev_id; 4101 } __packed; 4102 4103 struct wmi_peer_delete_resp_event { 4104 u32 vdev_id; 4105 struct wmi_mac_addr peer_macaddr; 4106 } __packed; 4107 4108 struct wmi_bcn_tx_status_event { 4109 u32 vdev_id; 4110 u32 tx_status; 4111 } __packed; 4112 4113 struct wmi_vdev_stopped_event { 4114 u32 vdev_id; 4115 } __packed; 4116 4117 struct wmi_pdev_bss_chan_info_event { 4118 u32 freq; /* Units in MHz */ 4119 u32 noise_floor; /* units are dBm */ 4120 /* rx clear - how often the channel was unused */ 4121 u32 rx_clear_count_low; 4122 u32 rx_clear_count_high; 4123 /* cycle count - elapsed time during measured period, in clock ticks */ 4124 u32 cycle_count_low; 4125 u32 cycle_count_high; 4126 /* tx cycle count - elapsed time spent in tx, in clock ticks */ 4127 u32 tx_cycle_count_low; 4128 u32 tx_cycle_count_high; 4129 /* rx cycle count - elapsed time spent in rx, in clock ticks */ 4130 u32 rx_cycle_count_low; 4131 u32 rx_cycle_count_high; 4132 /*rx_cycle cnt for my bss in 64bits format */ 4133 u32 rx_bss_cycle_count_low; 4134 u32 rx_bss_cycle_count_high; 4135 u32 pdev_id; 4136 } __packed; 4137 4138 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 4139 4140 struct wmi_vdev_install_key_compl_event { 4141 u32 vdev_id; 4142 struct wmi_mac_addr peer_macaddr; 4143 u32 key_idx; 4144 u32 key_flags; 4145 u32 status; 4146 } __packed; 4147 4148 struct wmi_vdev_install_key_complete_arg { 4149 u32 vdev_id; 4150 const u8 *macaddr; 4151 u32 key_idx; 4152 u32 key_flags; 4153 u32 status; 4154 }; 4155 4156 struct wmi_peer_assoc_conf_event { 4157 u32 vdev_id; 4158 struct wmi_mac_addr peer_macaddr; 4159 } __packed; 4160 4161 struct wmi_peer_assoc_conf_arg { 4162 u32 vdev_id; 4163 const u8 *macaddr; 4164 }; 4165 4166 struct wmi_fils_discovery_event { 4167 u32 vdev_id; 4168 u32 fils_tt; 4169 u32 tbtt; 4170 } __packed; 4171 4172 struct wmi_probe_resp_tx_status_event { 4173 u32 vdev_id; 4174 u32 tx_status; 4175 } __packed; 4176 4177 /* 4178 * PDEV statistics 4179 */ 4180 struct wmi_pdev_stats_base { 4181 s32 chan_nf; 4182 u32 tx_frame_count; /* Cycles spent transmitting frames */ 4183 u32 rx_frame_count; /* Cycles spent receiving frames */ 4184 u32 rx_clear_count; /* Total channel busy time, evidently */ 4185 u32 cycle_count; /* Total on-channel time */ 4186 u32 phy_err_count; 4187 u32 chan_tx_pwr; 4188 } __packed; 4189 4190 struct wmi_pdev_stats_extra { 4191 u32 ack_rx_bad; 4192 u32 rts_bad; 4193 u32 rts_good; 4194 u32 fcs_bad; 4195 u32 no_beacons; 4196 u32 mib_int_count; 4197 } __packed; 4198 4199 struct wmi_pdev_stats_tx { 4200 /* Num HTT cookies queued to dispatch list */ 4201 s32 comp_queued; 4202 4203 /* Num HTT cookies dispatched */ 4204 s32 comp_delivered; 4205 4206 /* Num MSDU queued to WAL */ 4207 s32 msdu_enqued; 4208 4209 /* Num MPDU queue to WAL */ 4210 s32 mpdu_enqued; 4211 4212 /* Num MSDUs dropped by WMM limit */ 4213 s32 wmm_drop; 4214 4215 /* Num Local frames queued */ 4216 s32 local_enqued; 4217 4218 /* Num Local frames done */ 4219 s32 local_freed; 4220 4221 /* Num queued to HW */ 4222 s32 hw_queued; 4223 4224 /* Num PPDU reaped from HW */ 4225 s32 hw_reaped; 4226 4227 /* Num underruns */ 4228 s32 underrun; 4229 4230 /* Num hw paused */ 4231 u32 hw_paused; 4232 4233 /* Num PPDUs cleaned up in TX abort */ 4234 s32 tx_abort; 4235 4236 /* Num MPDUs requeued by SW */ 4237 s32 mpdus_requeued; 4238 4239 /* excessive retries */ 4240 u32 tx_ko; 4241 4242 u32 tx_xretry; 4243 4244 /* data hw rate code */ 4245 u32 data_rc; 4246 4247 /* Scheduler self triggers */ 4248 u32 self_triggers; 4249 4250 /* frames dropped due to excessive sw retries */ 4251 u32 sw_retry_failure; 4252 4253 /* illegal rate phy errors */ 4254 u32 illgl_rate_phy_err; 4255 4256 /* wal pdev continuous xretry */ 4257 u32 pdev_cont_xretry; 4258 4259 /* wal pdev tx timeouts */ 4260 u32 pdev_tx_timeout; 4261 4262 /* wal pdev resets */ 4263 u32 pdev_resets; 4264 4265 /* frames dropped due to non-availability of stateless TIDs */ 4266 u32 stateless_tid_alloc_failure; 4267 4268 /* PhY/BB underrun */ 4269 u32 phy_underrun; 4270 4271 /* MPDU is more than txop limit */ 4272 u32 txop_ovf; 4273 4274 /* Num sequences posted */ 4275 u32 seq_posted; 4276 4277 /* Num sequences failed in queueing */ 4278 u32 seq_failed_queueing; 4279 4280 /* Num sequences completed */ 4281 u32 seq_completed; 4282 4283 /* Num sequences restarted */ 4284 u32 seq_restarted; 4285 4286 /* Num of MU sequences posted */ 4287 u32 mu_seq_posted; 4288 4289 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT 4290 * (Reset,channel change) 4291 */ 4292 s32 mpdus_sw_flush; 4293 4294 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 4295 s32 mpdus_hw_filter; 4296 4297 /* Num MPDUs truncated by PDG (TXOP, TBTT, 4298 * PPDU_duration based on rate, dyn_bw) 4299 */ 4300 s32 mpdus_truncated; 4301 4302 /* Num MPDUs that was tried but didn't receive ACK or BA */ 4303 s32 mpdus_ack_failed; 4304 4305 /* Num MPDUs that was dropped du to expiry. */ 4306 s32 mpdus_expired; 4307 } __packed; 4308 4309 struct wmi_pdev_stats_rx { 4310 /* Cnts any change in ring routing mid-ppdu */ 4311 s32 mid_ppdu_route_change; 4312 4313 /* Total number of statuses processed */ 4314 s32 status_rcvd; 4315 4316 /* Extra frags on rings 0-3 */ 4317 s32 r0_frags; 4318 s32 r1_frags; 4319 s32 r2_frags; 4320 s32 r3_frags; 4321 4322 /* MSDUs / MPDUs delivered to HTT */ 4323 s32 htt_msdus; 4324 s32 htt_mpdus; 4325 4326 /* MSDUs / MPDUs delivered to local stack */ 4327 s32 loc_msdus; 4328 s32 loc_mpdus; 4329 4330 /* AMSDUs that have more MSDUs than the status ring size */ 4331 s32 oversize_amsdu; 4332 4333 /* Number of PHY errors */ 4334 s32 phy_errs; 4335 4336 /* Number of PHY errors drops */ 4337 s32 phy_err_drop; 4338 4339 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 4340 s32 mpdu_errs; 4341 4342 /* Num overflow errors */ 4343 s32 rx_ovfl_errs; 4344 } __packed; 4345 4346 struct wmi_pdev_stats { 4347 struct wmi_pdev_stats_base base; 4348 struct wmi_pdev_stats_tx tx; 4349 struct wmi_pdev_stats_rx rx; 4350 } __packed; 4351 4352 #define WLAN_MAX_AC 4 4353 #define MAX_TX_RATE_VALUES 10 4354 #define MAX_TX_RATE_VALUES 10 4355 4356 struct wmi_vdev_stats { 4357 u32 vdev_id; 4358 u32 beacon_snr; 4359 u32 data_snr; 4360 u32 num_tx_frames[WLAN_MAX_AC]; 4361 u32 num_rx_frames; 4362 u32 num_tx_frames_retries[WLAN_MAX_AC]; 4363 u32 num_tx_frames_failures[WLAN_MAX_AC]; 4364 u32 num_rts_fail; 4365 u32 num_rts_success; 4366 u32 num_rx_err; 4367 u32 num_rx_discard; 4368 u32 num_tx_not_acked; 4369 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 4370 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 4371 } __packed; 4372 4373 struct wmi_bcn_stats { 4374 u32 vdev_id; 4375 u32 tx_bcn_succ_cnt; 4376 u32 tx_bcn_outage_cnt; 4377 } __packed; 4378 4379 struct wmi_stats_event { 4380 u32 stats_id; 4381 u32 num_pdev_stats; 4382 u32 num_vdev_stats; 4383 u32 num_peer_stats; 4384 u32 num_bcnflt_stats; 4385 u32 num_chan_stats; 4386 u32 num_mib_stats; 4387 u32 pdev_id; 4388 u32 num_bcn_stats; 4389 u32 num_peer_extd_stats; 4390 u32 num_peer_extd2_stats; 4391 } __packed; 4392 4393 struct wmi_pdev_ctl_failsafe_chk_event { 4394 u32 pdev_id; 4395 u32 ctl_failsafe_status; 4396 } __packed; 4397 4398 struct wmi_pdev_csa_switch_ev { 4399 u32 pdev_id; 4400 u32 current_switch_count; 4401 u32 num_vdevs; 4402 } __packed; 4403 4404 struct wmi_pdev_radar_ev { 4405 u32 pdev_id; 4406 u32 detection_mode; 4407 u32 chan_freq; 4408 u32 chan_width; 4409 u32 detector_id; 4410 u32 segment_id; 4411 u32 timestamp; 4412 u32 is_chirp; 4413 s32 freq_offset; 4414 s32 sidx; 4415 } __packed; 4416 4417 struct wmi_pdev_temperature_event { 4418 /* temperature value in Celcius degree */ 4419 s32 temp; 4420 u32 pdev_id; 4421 } __packed; 4422 4423 #define WMI_RX_STATUS_OK 0x00 4424 #define WMI_RX_STATUS_ERR_CRC 0x01 4425 #define WMI_RX_STATUS_ERR_DECRYPT 0x08 4426 #define WMI_RX_STATUS_ERR_MIC 0x10 4427 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 4428 4429 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 4430 4431 struct mgmt_rx_event_params { 4432 u32 chan_freq; 4433 u32 channel; 4434 u32 snr; 4435 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; 4436 u32 rate; 4437 enum wmi_phy_mode phy_mode; 4438 u32 buf_len; 4439 int status; 4440 u32 flags; 4441 int rssi; 4442 u32 tsf_delta; 4443 u8 pdev_id; 4444 }; 4445 4446 #define ATH_MAX_ANTENNA 4 4447 4448 struct wmi_mgmt_rx_hdr { 4449 u32 channel; 4450 u32 snr; 4451 u32 rate; 4452 u32 phy_mode; 4453 u32 buf_len; 4454 u32 status; 4455 u32 rssi_ctl[ATH_MAX_ANTENNA]; 4456 u32 flags; 4457 int rssi; 4458 u32 tsf_delta; 4459 u32 rx_tsf_l32; 4460 u32 rx_tsf_u32; 4461 u32 pdev_id; 4462 u32 chan_freq; 4463 } __packed; 4464 4465 #define MAX_ANTENNA_EIGHT 8 4466 4467 struct wmi_rssi_ctl_ext { 4468 u32 tlv_header; 4469 u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA]; 4470 }; 4471 4472 struct wmi_mgmt_tx_compl_event { 4473 u32 desc_id; 4474 u32 status; 4475 u32 pdev_id; 4476 } __packed; 4477 4478 struct wmi_scan_event { 4479 u32 event_type; /* %WMI_SCAN_EVENT_ */ 4480 u32 reason; /* %WMI_SCAN_REASON_ */ 4481 u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 4482 u32 scan_req_id; 4483 u32 scan_id; 4484 u32 vdev_id; 4485 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed 4486 * In case of AP it is TSF of the AP vdev 4487 * In case of STA connected state, this is the TSF of the AP 4488 * In case of STA not connected, it will be the free running HW timer 4489 */ 4490 u32 tsf_timestamp; 4491 } __packed; 4492 4493 struct wmi_peer_sta_kickout_arg { 4494 const u8 *mac_addr; 4495 }; 4496 4497 struct wmi_peer_sta_kickout_event { 4498 struct wmi_mac_addr peer_macaddr; 4499 } __packed; 4500 4501 enum wmi_roam_reason { 4502 WMI_ROAM_REASON_BETTER_AP = 1, 4503 WMI_ROAM_REASON_BEACON_MISS = 2, 4504 WMI_ROAM_REASON_LOW_RSSI = 3, 4505 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 4506 WMI_ROAM_REASON_HO_FAILED = 5, 4507 4508 /* keep last */ 4509 WMI_ROAM_REASON_MAX, 4510 }; 4511 4512 struct wmi_roam_event { 4513 u32 vdev_id; 4514 u32 reason; 4515 u32 rssi; 4516 } __packed; 4517 4518 #define WMI_CHAN_INFO_START_RESP 0 4519 #define WMI_CHAN_INFO_END_RESP 1 4520 4521 struct wmi_chan_info_event { 4522 u32 err_code; 4523 u32 freq; 4524 u32 cmd_flags; 4525 u32 noise_floor; 4526 u32 rx_clear_count; 4527 u32 cycle_count; 4528 u32 chan_tx_pwr_range; 4529 u32 chan_tx_pwr_tp; 4530 u32 rx_frame_count; 4531 u32 my_bss_rx_cycle_count; 4532 u32 rx_11b_mode_data_duration; 4533 u32 tx_frame_cnt; 4534 u32 mac_clk_mhz; 4535 u32 vdev_id; 4536 } __packed; 4537 4538 struct ath11k_targ_cap { 4539 u32 phy_capability; 4540 u32 max_frag_entry; 4541 u32 num_rf_chains; 4542 u32 ht_cap_info; 4543 u32 vht_cap_info; 4544 u32 vht_supp_mcs; 4545 u32 hw_min_tx_power; 4546 u32 hw_max_tx_power; 4547 u32 sys_cap_info; 4548 u32 min_pkt_size_enable; 4549 u32 max_bcn_ie_size; 4550 u32 max_num_scan_channels; 4551 u32 max_supported_macs; 4552 u32 wmi_fw_sub_feat_caps; 4553 u32 txrx_chainmask; 4554 u32 default_dbs_hw_mode_index; 4555 u32 num_msdu_desc; 4556 }; 4557 4558 enum wmi_vdev_type { 4559 WMI_VDEV_TYPE_AP = 1, 4560 WMI_VDEV_TYPE_STA = 2, 4561 WMI_VDEV_TYPE_IBSS = 3, 4562 WMI_VDEV_TYPE_MONITOR = 4, 4563 }; 4564 4565 enum wmi_vdev_subtype { 4566 WMI_VDEV_SUBTYPE_NONE, 4567 WMI_VDEV_SUBTYPE_P2P_DEVICE, 4568 WMI_VDEV_SUBTYPE_P2P_CLIENT, 4569 WMI_VDEV_SUBTYPE_P2P_GO, 4570 WMI_VDEV_SUBTYPE_PROXY_STA, 4571 WMI_VDEV_SUBTYPE_MESH_NON_11S, 4572 WMI_VDEV_SUBTYPE_MESH_11S, 4573 }; 4574 4575 enum wmi_sta_powersave_param { 4576 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 4577 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 4578 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 4579 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 4580 WMI_STA_PS_PARAM_UAPSD = 4, 4581 }; 4582 4583 #define WMI_UAPSD_AC_TYPE_DELI 0 4584 #define WMI_UAPSD_AC_TYPE_TRIG 1 4585 4586 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \ 4587 ((type == WMI_UAPSD_AC_TYPE_DELI) ? \ 4588 (1 << (ac << 1)) : (1 << ((ac << 1) + 1))) 4589 4590 enum wmi_sta_ps_param_uapsd { 4591 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4592 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4593 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4594 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4595 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4596 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4597 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4598 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4599 }; 4600 4601 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX 4602 4603 struct wmi_sta_uapsd_auto_trig_param { 4604 u32 wmm_ac; 4605 u32 user_priority; 4606 u32 service_interval; 4607 u32 suspend_interval; 4608 u32 delay_interval; 4609 }; 4610 4611 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param { 4612 u32 vdev_id; 4613 struct wmi_mac_addr peer_macaddr; 4614 u32 num_ac; 4615 }; 4616 4617 struct wmi_sta_uapsd_auto_trig_arg { 4618 u32 wmm_ac; 4619 u32 user_priority; 4620 u32 service_interval; 4621 u32 suspend_interval; 4622 u32 delay_interval; 4623 }; 4624 4625 enum wmi_sta_ps_param_tx_wake_threshold { 4626 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 4627 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 4628 4629 /* Values greater than one indicate that many TX attempts per beacon 4630 * interval before the STA will wake up 4631 */ 4632 }; 4633 4634 /* The maximum number of PS-Poll frames the FW will send in response to 4635 * traffic advertised in TIM before waking up (by sending a null frame with PS 4636 * = 0). Value 0 has a special meaning: there is no maximum count and the FW 4637 * will send as many PS-Poll as are necessary to retrieve buffered BU. This 4638 * parameter is used when the RX wake policy is 4639 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 4640 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 4641 */ 4642 enum wmi_sta_ps_param_pspoll_count { 4643 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 4644 /* Values greater than 0 indicate the maximum numer of PS-Poll frames 4645 * FW will send before waking up. 4646 */ 4647 }; 4648 4649 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 4650 enum wmi_ap_ps_param_uapsd { 4651 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4652 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4653 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4654 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4655 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4656 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4657 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4658 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4659 }; 4660 4661 /* U-APSD maximum service period of peer station */ 4662 enum wmi_ap_ps_peer_param_max_sp { 4663 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 4664 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 4665 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 4666 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 4667 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 4668 }; 4669 4670 enum wmi_ap_ps_peer_param { 4671 /** Set uapsd configuration for a given peer. 4672 * 4673 * This include the delivery and trigger enabled state for each AC. 4674 * The host MLME needs to set this based on AP capability and stations 4675 * request Set in the association request received from the station. 4676 * 4677 * Lower 8 bits of the value specify the UAPSD configuration. 4678 * 4679 * (see enum wmi_ap_ps_param_uapsd) 4680 * The default value is 0. 4681 */ 4682 WMI_AP_PS_PEER_PARAM_UAPSD = 0, 4683 4684 /** 4685 * Set the service period for a UAPSD capable station 4686 * 4687 * The service period from wme ie in the (re)assoc request frame. 4688 * 4689 * (see enum wmi_ap_ps_peer_param_max_sp) 4690 */ 4691 WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 4692 4693 /** Time in seconds for aging out buffered frames 4694 * for STA in power save 4695 */ 4696 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 4697 4698 /** Specify frame types that are considered SIFS 4699 * RESP trigger frame 4700 */ 4701 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3, 4702 4703 /** Specifies the trigger state of TID. 4704 * Valid only for UAPSD frame type 4705 */ 4706 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4, 4707 4708 /* Specifies the WNM sleep state of a STA */ 4709 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5, 4710 }; 4711 4712 #define DISABLE_SIFS_RESPONSE_TRIGGER 0 4713 4714 #define WMI_MAX_KEY_INDEX 3 4715 #define WMI_MAX_KEY_LEN 32 4716 4717 #define WMI_KEY_PAIRWISE 0x00 4718 #define WMI_KEY_GROUP 0x01 4719 4720 #define WMI_CIPHER_NONE 0x0 /* clear key */ 4721 #define WMI_CIPHER_WEP 0x1 4722 #define WMI_CIPHER_TKIP 0x2 4723 #define WMI_CIPHER_AES_OCB 0x3 4724 #define WMI_CIPHER_AES_CCM 0x4 4725 #define WMI_CIPHER_WAPI 0x5 4726 #define WMI_CIPHER_CKIP 0x6 4727 #define WMI_CIPHER_AES_CMAC 0x7 4728 #define WMI_CIPHER_ANY 0x8 4729 #define WMI_CIPHER_AES_GCM 0x9 4730 #define WMI_CIPHER_AES_GMAC 0xa 4731 4732 /* Value to disable fixed rate setting */ 4733 #define WMI_FIXED_RATE_NONE (0xffff) 4734 4735 #define ATH11K_RC_VERSION_OFFSET 28 4736 #define ATH11K_RC_PREAMBLE_OFFSET 8 4737 #define ATH11K_RC_NSS_OFFSET 5 4738 4739 #define ATH11K_HW_RATE_CODE(rate, nss, preamble) \ 4740 ((1 << ATH11K_RC_VERSION_OFFSET) | \ 4741 ((nss) << ATH11K_RC_NSS_OFFSET) | \ 4742 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) | \ 4743 (rate)) 4744 4745 /* Preamble types to be used with VDEV fixed rate configuration */ 4746 enum wmi_rate_preamble { 4747 WMI_RATE_PREAMBLE_OFDM, 4748 WMI_RATE_PREAMBLE_CCK, 4749 WMI_RATE_PREAMBLE_HT, 4750 WMI_RATE_PREAMBLE_VHT, 4751 WMI_RATE_PREAMBLE_HE, 4752 }; 4753 4754 /** 4755 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection. 4756 * @WMI_RTS_CTS_DISABLED : RTS/CTS protection is disabled. 4757 * @WMI_USE_RTS_CTS : RTS/CTS Enabled. 4758 * @WMI_USE_CTS2SELF : CTS to self protection Enabled. 4759 */ 4760 enum wmi_rtscts_prot_mode { 4761 WMI_RTS_CTS_DISABLED = 0, 4762 WMI_USE_RTS_CTS = 1, 4763 WMI_USE_CTS2SELF = 2, 4764 }; 4765 4766 /** 4767 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling 4768 * protection mode. 4769 * @WMI_RTSCTS_FOR_NO_RATESERIES - Neither of rate-series should use RTS-CTS 4770 * @WMI_RTSCTS_FOR_SECOND_RATESERIES - Only second rate-series will use RTS-CTS 4771 * @WMI_RTSCTS_ACROSS_SW_RETRIES - Only the second rate-series will use RTS-CTS, 4772 * but if there's a sw retry, both the rate 4773 * series will use RTS-CTS. 4774 * @WMI_RTSCTS_ERP - RTS/CTS used for ERP protection for every PPDU. 4775 * @WMI_RTSCTS_FOR_ALL_RATESERIES - Enable RTS-CTS for all rate series. 4776 */ 4777 enum wmi_rtscts_profile { 4778 WMI_RTSCTS_FOR_NO_RATESERIES = 0, 4779 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1, 4780 WMI_RTSCTS_ACROSS_SW_RETRIES = 2, 4781 WMI_RTSCTS_ERP = 3, 4782 WMI_RTSCTS_FOR_ALL_RATESERIES = 4, 4783 }; 4784 4785 struct ath11k_hal_reg_cap { 4786 u32 eeprom_rd; 4787 u32 eeprom_rd_ext; 4788 u32 regcap1; 4789 u32 regcap2; 4790 u32 wireless_modes; 4791 u32 low_2ghz_chan; 4792 u32 high_2ghz_chan; 4793 u32 low_5ghz_chan; 4794 u32 high_5ghz_chan; 4795 }; 4796 4797 struct ath11k_mem_chunk { 4798 void *vaddr; 4799 dma_addr_t paddr; 4800 u32 len; 4801 u32 req_id; 4802 }; 4803 4804 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 4805 4806 enum wmi_sta_ps_param_rx_wake_policy { 4807 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 4808 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 4809 }; 4810 4811 /* Do not change existing values! Used by ath11k_frame_mode parameter 4812 * module parameter. 4813 */ 4814 enum ath11k_hw_txrx_mode { 4815 ATH11K_HW_TXRX_RAW = 0, 4816 ATH11K_HW_TXRX_NATIVE_WIFI = 1, 4817 ATH11K_HW_TXRX_ETHERNET = 2, 4818 }; 4819 4820 struct wmi_wmm_params { 4821 u32 tlv_header; 4822 u32 cwmin; 4823 u32 cwmax; 4824 u32 aifs; 4825 u32 txoplimit; 4826 u32 acm; 4827 u32 no_ack; 4828 } __packed; 4829 4830 struct wmi_wmm_params_arg { 4831 u8 acm; 4832 u8 aifs; 4833 u16 cwmin; 4834 u16 cwmax; 4835 u16 txop; 4836 u8 no_ack; 4837 }; 4838 4839 struct wmi_vdev_set_wmm_params_cmd { 4840 u32 tlv_header; 4841 u32 vdev_id; 4842 struct wmi_wmm_params wmm_params[4]; 4843 u32 wmm_param_type; 4844 } __packed; 4845 4846 struct wmi_wmm_params_all_arg { 4847 struct wmi_wmm_params_arg ac_be; 4848 struct wmi_wmm_params_arg ac_bk; 4849 struct wmi_wmm_params_arg ac_vi; 4850 struct wmi_wmm_params_arg ac_vo; 4851 }; 4852 4853 #define ATH11K_TWT_DEF_STA_CONG_TIMER_MS 5000 4854 #define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE 10 4855 #define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP 50 4856 #define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20 4857 #define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100 4858 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80 4859 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50 4860 #define ATH11K_TWT_DEF_MIN_NO_STA_SETUP 10 4861 #define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN 2 4862 #define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2 4863 #define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS 2 4864 #define ATH11K_TWT_DEF_MAX_NO_STA_TWT 500 4865 #define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL 10000 4866 #define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000 4867 #define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000 4868 4869 struct wmi_twt_enable_params_cmd { 4870 u32 tlv_header; 4871 u32 pdev_id; 4872 u32 sta_cong_timer_ms; 4873 u32 mbss_support; 4874 u32 default_slot_size; 4875 u32 congestion_thresh_setup; 4876 u32 congestion_thresh_teardown; 4877 u32 congestion_thresh_critical; 4878 u32 interference_thresh_teardown; 4879 u32 interference_thresh_setup; 4880 u32 min_no_sta_setup; 4881 u32 min_no_sta_teardown; 4882 u32 no_of_bcast_mcast_slots; 4883 u32 min_no_twt_slots; 4884 u32 max_no_sta_twt; 4885 u32 mode_check_interval; 4886 u32 add_sta_slot_interval; 4887 u32 remove_sta_slot_interval; 4888 } __packed; 4889 4890 struct wmi_twt_disable_params_cmd { 4891 u32 tlv_header; 4892 u32 pdev_id; 4893 } __packed; 4894 4895 struct wmi_obss_spatial_reuse_params_cmd { 4896 u32 tlv_header; 4897 u32 pdev_id; 4898 u32 enable; 4899 s32 obss_min; 4900 s32 obss_max; 4901 u32 vdev_id; 4902 } __packed; 4903 4904 struct wmi_pdev_obss_pd_bitmap_cmd { 4905 u32 tlv_header; 4906 u32 pdev_id; 4907 u32 bitmap[2]; 4908 } __packed; 4909 4910 #define ATH11K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200 4911 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0 4912 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION 1 4913 4914 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS 10000 4915 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS 5000 4916 4917 struct wmi_obss_color_collision_cfg_params_cmd { 4918 u32 tlv_header; 4919 u32 vdev_id; 4920 u32 flags; 4921 u32 evt_type; 4922 u32 current_bss_color; 4923 u32 detection_period_ms; 4924 u32 scan_period_ms; 4925 u32 free_slot_expiry_time_ms; 4926 } __packed; 4927 4928 struct wmi_bss_color_change_enable_params_cmd { 4929 u32 tlv_header; 4930 u32 vdev_id; 4931 u32 enable; 4932 } __packed; 4933 4934 #define ATH11K_IPV4_TH_SEED_SIZE 5 4935 #define ATH11K_IPV6_TH_SEED_SIZE 11 4936 4937 struct ath11k_wmi_pdev_lro_config_cmd { 4938 u32 tlv_header; 4939 u32 lro_enable; 4940 u32 res; 4941 u32 th_4[ATH11K_IPV4_TH_SEED_SIZE]; 4942 u32 th_6[ATH11K_IPV6_TH_SEED_SIZE]; 4943 u32 pdev_id; 4944 } __packed; 4945 4946 #define ATH11K_WMI_SPECTRAL_COUNT_DEFAULT 0 4947 #define ATH11K_WMI_SPECTRAL_PERIOD_DEFAULT 224 4948 #define ATH11K_WMI_SPECTRAL_PRIORITY_DEFAULT 1 4949 #define ATH11K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 4950 #define ATH11K_WMI_SPECTRAL_GC_ENA_DEFAULT 1 4951 #define ATH11K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 4952 #define ATH11K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 4953 #define ATH11K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 4954 #define ATH11K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 4955 #define ATH11K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 4956 #define ATH11K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 4957 #define ATH11K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 4958 #define ATH11K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 4959 #define ATH11K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 4960 #define ATH11K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2 4961 #define ATH11K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 4962 #define ATH11K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 4963 #define ATH11K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1 4964 4965 struct ath11k_wmi_vdev_spectral_conf_param { 4966 u32 vdev_id; 4967 u32 scan_count; 4968 u32 scan_period; 4969 u32 scan_priority; 4970 u32 scan_fft_size; 4971 u32 scan_gc_ena; 4972 u32 scan_restart_ena; 4973 u32 scan_noise_floor_ref; 4974 u32 scan_init_delay; 4975 u32 scan_nb_tone_thr; 4976 u32 scan_str_bin_thr; 4977 u32 scan_wb_rpt_mode; 4978 u32 scan_rssi_rpt_mode; 4979 u32 scan_rssi_thr; 4980 u32 scan_pwr_format; 4981 u32 scan_rpt_mode; 4982 u32 scan_bin_scale; 4983 u32 scan_dbm_adj; 4984 u32 scan_chn_mask; 4985 } __packed; 4986 4987 struct ath11k_wmi_vdev_spectral_conf_cmd { 4988 u32 tlv_header; 4989 struct ath11k_wmi_vdev_spectral_conf_param param; 4990 } __packed; 4991 4992 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 4993 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 4994 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 4995 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 4996 4997 struct ath11k_wmi_vdev_spectral_enable_cmd { 4998 u32 tlv_header; 4999 u32 vdev_id; 5000 u32 trigger_cmd; 5001 u32 enable_cmd; 5002 } __packed; 5003 5004 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd { 5005 u32 tlv_header; 5006 u32 pdev_id; 5007 u32 module_id; /* see enum wmi_direct_buffer_module */ 5008 u32 base_paddr_lo; 5009 u32 base_paddr_hi; 5010 u32 head_idx_paddr_lo; 5011 u32 head_idx_paddr_hi; 5012 u32 tail_idx_paddr_lo; 5013 u32 tail_idx_paddr_hi; 5014 u32 num_elems; /* Number of elems in the ring */ 5015 u32 buf_size; /* size of allocated buffer in bytes */ 5016 5017 /* Number of wmi_dma_buf_release_entry packed together */ 5018 u32 num_resp_per_event; 5019 5020 /* Target should timeout and send whatever resp 5021 * it has if this time expires, units in milliseconds 5022 */ 5023 u32 event_timeout_ms; 5024 } __packed; 5025 5026 struct ath11k_wmi_dma_buf_release_fixed_param { 5027 u32 pdev_id; 5028 u32 module_id; 5029 u32 num_buf_release_entry; 5030 u32 num_meta_data_entry; 5031 } __packed; 5032 5033 struct wmi_dma_buf_release_entry { 5034 u32 tlv_header; 5035 u32 paddr_lo; 5036 5037 /* Bits 11:0: address of data 5038 * Bits 31:12: host context data 5039 */ 5040 u32 paddr_hi; 5041 } __packed; 5042 5043 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0) 5044 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16) 5045 5046 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0) 5047 5048 struct wmi_dma_buf_release_meta_data { 5049 u32 tlv_header; 5050 s32 noise_floor[WMI_MAX_CHAINS]; 5051 u32 reset_delay; 5052 u32 freq1; 5053 u32 freq2; 5054 u32 ch_width; 5055 } __packed; 5056 5057 enum wmi_fils_discovery_cmd_type { 5058 WMI_FILS_DISCOVERY_CMD, 5059 WMI_UNSOL_BCAST_PROBE_RESP, 5060 }; 5061 5062 struct wmi_fils_discovery_cmd { 5063 u32 tlv_header; 5064 u32 vdev_id; 5065 u32 interval; 5066 u32 config; /* enum wmi_fils_discovery_cmd_type */ 5067 } __packed; 5068 5069 struct wmi_fils_discovery_tmpl_cmd { 5070 u32 tlv_header; 5071 u32 vdev_id; 5072 u32 buf_len; 5073 } __packed; 5074 5075 struct wmi_probe_tmpl_cmd { 5076 u32 tlv_header; 5077 u32 vdev_id; 5078 u32 buf_len; 5079 } __packed; 5080 5081 struct target_resource_config { 5082 u32 num_vdevs; 5083 u32 num_peers; 5084 u32 num_active_peers; 5085 u32 num_offload_peers; 5086 u32 num_offload_reorder_buffs; 5087 u32 num_peer_keys; 5088 u32 num_tids; 5089 u32 ast_skid_limit; 5090 u32 tx_chain_mask; 5091 u32 rx_chain_mask; 5092 u32 rx_timeout_pri[4]; 5093 u32 rx_decap_mode; 5094 u32 scan_max_pending_req; 5095 u32 bmiss_offload_max_vdev; 5096 u32 roam_offload_max_vdev; 5097 u32 roam_offload_max_ap_profiles; 5098 u32 num_mcast_groups; 5099 u32 num_mcast_table_elems; 5100 u32 mcast2ucast_mode; 5101 u32 tx_dbg_log_size; 5102 u32 num_wds_entries; 5103 u32 dma_burst_size; 5104 u32 mac_aggr_delim; 5105 u32 rx_skip_defrag_timeout_dup_detection_check; 5106 u32 vow_config; 5107 u32 gtk_offload_max_vdev; 5108 u32 num_msdu_desc; 5109 u32 max_frag_entries; 5110 u32 max_peer_ext_stats; 5111 u32 smart_ant_cap; 5112 u32 bk_minfree; 5113 u32 be_minfree; 5114 u32 vi_minfree; 5115 u32 vo_minfree; 5116 u32 rx_batchmode; 5117 u32 tt_support; 5118 u32 flag1; 5119 u32 iphdr_pad_config; 5120 u32 qwrap_config:16, 5121 alloc_frag_desc_for_data_pkt:16; 5122 u32 num_tdls_vdevs; 5123 u32 num_tdls_conn_table_entries; 5124 u32 beacon_tx_offload_max_vdev; 5125 u32 num_multicast_filter_entries; 5126 u32 num_wow_filters; 5127 u32 num_keep_alive_pattern; 5128 u32 keep_alive_pattern_size; 5129 u32 max_tdls_concurrent_sleep_sta; 5130 u32 max_tdls_concurrent_buffer_sta; 5131 u32 wmi_send_separate; 5132 u32 num_ocb_vdevs; 5133 u32 num_ocb_channels; 5134 u32 num_ocb_schedules; 5135 u32 num_ns_ext_tuples_cfg; 5136 u32 bpf_instruction_size; 5137 u32 max_bssid_rx_filters; 5138 u32 use_pdev_id; 5139 u32 peer_map_unmap_v2_support; 5140 u32 sched_params; 5141 u32 twt_ap_pdev_count; 5142 u32 twt_ap_sta_count; 5143 }; 5144 5145 #define WMI_MAX_MEM_REQS 32 5146 5147 #define MAX_RADIOS 3 5148 5149 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 5150 #define WMI_SEND_TIMEOUT_HZ (3 * HZ) 5151 5152 struct ath11k_wmi_base { 5153 struct ath11k_base *ab; 5154 struct ath11k_pdev_wmi wmi[MAX_RADIOS]; 5155 enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS]; 5156 u32 max_msg_len[MAX_RADIOS]; 5157 5158 struct completion service_ready; 5159 struct completion unified_ready; 5160 DECLARE_BITMAP(svc_map, WMI_MAX_EXT_SERVICE); 5161 wait_queue_head_t tx_credits_wq; 5162 const struct wmi_peer_flags_map *peer_flags; 5163 u32 num_mem_chunks; 5164 u32 rx_decap_mode; 5165 struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 5166 5167 enum wmi_host_hw_mode_config_type preferred_hw_mode; 5168 struct target_resource_config wlan_resource_config; 5169 5170 struct ath11k_targ_cap *targ_cap; 5171 }; 5172 5173 /* WOW structures */ 5174 enum wmi_wow_wakeup_event { 5175 WOW_BMISS_EVENT = 0, 5176 WOW_BETTER_AP_EVENT, 5177 WOW_DEAUTH_RECVD_EVENT, 5178 WOW_MAGIC_PKT_RECVD_EVENT, 5179 WOW_GTK_ERR_EVENT, 5180 WOW_FOURWAY_HSHAKE_EVENT, 5181 WOW_EAPOL_RECVD_EVENT, 5182 WOW_NLO_DETECTED_EVENT, 5183 WOW_DISASSOC_RECVD_EVENT, 5184 WOW_PATTERN_MATCH_EVENT, 5185 WOW_CSA_IE_EVENT, 5186 WOW_PROBE_REQ_WPS_IE_EVENT, 5187 WOW_AUTH_REQ_EVENT, 5188 WOW_ASSOC_REQ_EVENT, 5189 WOW_HTT_EVENT, 5190 WOW_RA_MATCH_EVENT, 5191 WOW_HOST_AUTO_SHUTDOWN_EVENT, 5192 WOW_IOAC_MAGIC_EVENT, 5193 WOW_IOAC_SHORT_EVENT, 5194 WOW_IOAC_EXTEND_EVENT, 5195 WOW_IOAC_TIMER_EVENT, 5196 WOW_DFS_PHYERR_RADAR_EVENT, 5197 WOW_BEACON_EVENT, 5198 WOW_CLIENT_KICKOUT_EVENT, 5199 WOW_EVENT_MAX, 5200 }; 5201 5202 enum wmi_wow_interface_cfg { 5203 WOW_IFACE_PAUSE_ENABLED, 5204 WOW_IFACE_PAUSE_DISABLED 5205 }; 5206 5207 #define C2S(x) case x: return #x 5208 5209 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev) 5210 { 5211 switch (ev) { 5212 C2S(WOW_BMISS_EVENT); 5213 C2S(WOW_BETTER_AP_EVENT); 5214 C2S(WOW_DEAUTH_RECVD_EVENT); 5215 C2S(WOW_MAGIC_PKT_RECVD_EVENT); 5216 C2S(WOW_GTK_ERR_EVENT); 5217 C2S(WOW_FOURWAY_HSHAKE_EVENT); 5218 C2S(WOW_EAPOL_RECVD_EVENT); 5219 C2S(WOW_NLO_DETECTED_EVENT); 5220 C2S(WOW_DISASSOC_RECVD_EVENT); 5221 C2S(WOW_PATTERN_MATCH_EVENT); 5222 C2S(WOW_CSA_IE_EVENT); 5223 C2S(WOW_PROBE_REQ_WPS_IE_EVENT); 5224 C2S(WOW_AUTH_REQ_EVENT); 5225 C2S(WOW_ASSOC_REQ_EVENT); 5226 C2S(WOW_HTT_EVENT); 5227 C2S(WOW_RA_MATCH_EVENT); 5228 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT); 5229 C2S(WOW_IOAC_MAGIC_EVENT); 5230 C2S(WOW_IOAC_SHORT_EVENT); 5231 C2S(WOW_IOAC_EXTEND_EVENT); 5232 C2S(WOW_IOAC_TIMER_EVENT); 5233 C2S(WOW_DFS_PHYERR_RADAR_EVENT); 5234 C2S(WOW_BEACON_EVENT); 5235 C2S(WOW_CLIENT_KICKOUT_EVENT); 5236 C2S(WOW_EVENT_MAX); 5237 default: 5238 return NULL; 5239 } 5240 } 5241 5242 enum wmi_wow_wake_reason { 5243 WOW_REASON_UNSPECIFIED = -1, 5244 WOW_REASON_NLOD = 0, 5245 WOW_REASON_AP_ASSOC_LOST, 5246 WOW_REASON_LOW_RSSI, 5247 WOW_REASON_DEAUTH_RECVD, 5248 WOW_REASON_DISASSOC_RECVD, 5249 WOW_REASON_GTK_HS_ERR, 5250 WOW_REASON_EAP_REQ, 5251 WOW_REASON_FOURWAY_HS_RECV, 5252 WOW_REASON_TIMER_INTR_RECV, 5253 WOW_REASON_PATTERN_MATCH_FOUND, 5254 WOW_REASON_RECV_MAGIC_PATTERN, 5255 WOW_REASON_P2P_DISC, 5256 WOW_REASON_WLAN_HB, 5257 WOW_REASON_CSA_EVENT, 5258 WOW_REASON_PROBE_REQ_WPS_IE_RECV, 5259 WOW_REASON_AUTH_REQ_RECV, 5260 WOW_REASON_ASSOC_REQ_RECV, 5261 WOW_REASON_HTT_EVENT, 5262 WOW_REASON_RA_MATCH, 5263 WOW_REASON_HOST_AUTO_SHUTDOWN, 5264 WOW_REASON_IOAC_MAGIC_EVENT, 5265 WOW_REASON_IOAC_SHORT_EVENT, 5266 WOW_REASON_IOAC_EXTEND_EVENT, 5267 WOW_REASON_IOAC_TIMER_EVENT, 5268 WOW_REASON_ROAM_HO, 5269 WOW_REASON_DFS_PHYERR_RADADR_EVENT, 5270 WOW_REASON_BEACON_RECV, 5271 WOW_REASON_CLIENT_KICKOUT_EVENT, 5272 WOW_REASON_PAGE_FAULT = 0x3a, 5273 WOW_REASON_DEBUG_TEST = 0xFF, 5274 }; 5275 5276 static inline const char *wow_reason(enum wmi_wow_wake_reason reason) 5277 { 5278 switch (reason) { 5279 C2S(WOW_REASON_UNSPECIFIED); 5280 C2S(WOW_REASON_NLOD); 5281 C2S(WOW_REASON_AP_ASSOC_LOST); 5282 C2S(WOW_REASON_LOW_RSSI); 5283 C2S(WOW_REASON_DEAUTH_RECVD); 5284 C2S(WOW_REASON_DISASSOC_RECVD); 5285 C2S(WOW_REASON_GTK_HS_ERR); 5286 C2S(WOW_REASON_EAP_REQ); 5287 C2S(WOW_REASON_FOURWAY_HS_RECV); 5288 C2S(WOW_REASON_TIMER_INTR_RECV); 5289 C2S(WOW_REASON_PATTERN_MATCH_FOUND); 5290 C2S(WOW_REASON_RECV_MAGIC_PATTERN); 5291 C2S(WOW_REASON_P2P_DISC); 5292 C2S(WOW_REASON_WLAN_HB); 5293 C2S(WOW_REASON_CSA_EVENT); 5294 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV); 5295 C2S(WOW_REASON_AUTH_REQ_RECV); 5296 C2S(WOW_REASON_ASSOC_REQ_RECV); 5297 C2S(WOW_REASON_HTT_EVENT); 5298 C2S(WOW_REASON_RA_MATCH); 5299 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN); 5300 C2S(WOW_REASON_IOAC_MAGIC_EVENT); 5301 C2S(WOW_REASON_IOAC_SHORT_EVENT); 5302 C2S(WOW_REASON_IOAC_EXTEND_EVENT); 5303 C2S(WOW_REASON_IOAC_TIMER_EVENT); 5304 C2S(WOW_REASON_ROAM_HO); 5305 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT); 5306 C2S(WOW_REASON_BEACON_RECV); 5307 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT); 5308 C2S(WOW_REASON_PAGE_FAULT); 5309 C2S(WOW_REASON_DEBUG_TEST); 5310 default: 5311 return NULL; 5312 } 5313 } 5314 5315 #undef C2S 5316 5317 struct wmi_wow_enable_cmd { 5318 u32 tlv_header; 5319 u32 enable; 5320 u32 pause_iface_config; 5321 u32 flags; 5322 } __packed; 5323 5324 struct wmi_wow_host_wakeup_ind { 5325 u32 tlv_header; 5326 u32 reserved; 5327 } __packed; 5328 5329 struct wmi_wow_ev_arg { 5330 u32 vdev_id; 5331 u32 flag; 5332 enum wmi_wow_wake_reason wake_reason; 5333 u32 data_len; 5334 }; 5335 5336 int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb, 5337 u32 cmd_id); 5338 struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len); 5339 int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id, 5340 struct sk_buff *frame); 5341 int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id, 5342 struct ieee80211_mutable_offsets *offs, 5343 struct sk_buff *bcn); 5344 int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id); 5345 int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid, 5346 const u8 *bssid); 5347 int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id); 5348 int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg, 5349 bool restart); 5350 int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr, 5351 u32 vdev_id, u32 param_id, u32 param_val); 5352 int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id, 5353 u32 param_value, u8 pdev_id); 5354 int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id, u32 enable); 5355 int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab); 5356 int ath11k_wmi_cmd_init(struct ath11k_base *ab); 5357 int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab); 5358 int ath11k_wmi_connect(struct ath11k_base *ab); 5359 int ath11k_wmi_pdev_attach(struct ath11k_base *ab, 5360 u8 pdev_id); 5361 int ath11k_wmi_attach(struct ath11k_base *ab); 5362 void ath11k_wmi_detach(struct ath11k_base *ab); 5363 int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr, 5364 struct vdev_create_params *param); 5365 int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id, 5366 const u8 *addr, dma_addr_t paddr, 5367 u8 tid, u8 ba_window_size_valid, 5368 u32 ba_window_size); 5369 int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar, 5370 struct peer_create_params *param); 5371 int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id, 5372 u32 param_id, u32 param_value); 5373 5374 int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id, 5375 u32 param, u32 param_value); 5376 int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms); 5377 int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar, 5378 const u8 *peer_addr, u8 vdev_id); 5379 int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id); 5380 void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg); 5381 int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar, 5382 struct scan_req_params *params); 5383 int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar, 5384 struct scan_cancel_param *param); 5385 int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id, 5386 struct wmi_wmm_params_all_arg *param); 5387 int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt, 5388 u32 pdev_id); 5389 int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id); 5390 5391 int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar, 5392 struct peer_assoc_params *param); 5393 int ath11k_wmi_vdev_install_key(struct ath11k *ar, 5394 struct wmi_vdev_install_key_arg *arg); 5395 int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar, 5396 enum wmi_bss_chan_info_req_type type); 5397 int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar, 5398 struct stats_request_params *param); 5399 int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar); 5400 int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar, 5401 u8 peer_addr[ETH_ALEN], 5402 struct peer_flush_params *param); 5403 int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr, 5404 struct ap_ps_params *param); 5405 int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar, 5406 struct scan_chan_list_params *chan_list); 5407 int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar, 5408 u32 pdev_id); 5409 int ath11k_wmi_addba_clear_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac); 5410 int ath11k_wmi_addba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac, 5411 u32 tid, u32 buf_size); 5412 int ath11k_wmi_addba_set_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac, 5413 u32 tid, u32 status); 5414 int ath11k_wmi_delba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac, 5415 u32 tid, u32 initiator, u32 reason); 5416 int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar, 5417 u32 vdev_id, u32 bcn_ctrl_op); 5418 int 5419 ath11k_wmi_send_init_country_cmd(struct ath11k *ar, 5420 struct wmi_init_country_params init_cc_param); 5421 int 5422 ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar, 5423 struct thermal_mitigation_params *param); 5424 int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter); 5425 int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar); 5426 int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable); 5427 int 5428 ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar, 5429 struct rx_reorder_queue_remove_params *param); 5430 int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar, 5431 struct pdev_set_regdomain_params *param); 5432 int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb, 5433 struct ath11k_fw_stats *stats); 5434 size_t ath11k_wmi_fw_stats_num_peers(struct list_head *head); 5435 size_t ath11k_wmi_fw_stats_num_peers_extd(struct list_head *head); 5436 size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head); 5437 void ath11k_wmi_fw_stats_fill(struct ath11k *ar, 5438 struct ath11k_fw_stats *fw_stats, u32 stats_id, 5439 char *buf); 5440 int ath11k_wmi_simulate_radar(struct ath11k *ar); 5441 int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id); 5442 int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id); 5443 int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id, 5444 struct ieee80211_he_obss_pd *he_obss_pd); 5445 int ath11k_wmi_pdev_set_srg_bss_color_bitmap(struct ath11k *ar, u32 *bitmap); 5446 int ath11k_wmi_pdev_set_srg_patial_bssid_bitmap(struct ath11k *ar, u32 *bitmap); 5447 int ath11k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath11k *ar, 5448 u32 *bitmap); 5449 int ath11k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath11k *ar, 5450 u32 *bitmap); 5451 int ath11k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath11k *ar, 5452 u32 *bitmap); 5453 int ath11k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath11k *ar, 5454 u32 *bitmap); 5455 int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id, 5456 u8 bss_color, u32 period, 5457 bool enable); 5458 int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id, 5459 bool enable); 5460 int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id); 5461 int ath11k_wmi_pdev_dma_ring_cfg(struct ath11k *ar, 5462 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd *param); 5463 int ath11k_wmi_vdev_spectral_enable(struct ath11k *ar, u32 vdev_id, 5464 u32 trigger, u32 enable); 5465 int ath11k_wmi_vdev_spectral_conf(struct ath11k *ar, 5466 struct ath11k_wmi_vdev_spectral_conf_param *param); 5467 int ath11k_wmi_fils_discovery_tmpl(struct ath11k *ar, u32 vdev_id, 5468 struct sk_buff *tmpl); 5469 int ath11k_wmi_fils_discovery(struct ath11k *ar, u32 vdev_id, u32 interval, 5470 bool unsol_bcast_probe_resp_enabled); 5471 int ath11k_wmi_probe_resp_tmpl(struct ath11k *ar, u32 vdev_id, 5472 struct sk_buff *tmpl); 5473 int ath11k_wmi_set_hw_mode(struct ath11k_base *ab, 5474 enum wmi_host_hw_mode_config_type mode); 5475 int ath11k_wmi_wow_host_wakeup_ind(struct ath11k *ar); 5476 int ath11k_wmi_wow_enable(struct ath11k *ar); 5477 5478 #endif 5479