1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef ATH11K_QMI_H 7 #define ATH11K_QMI_H 8 9 #include <linux/mutex.h> 10 #include <linux/soc/qcom/qmi.h> 11 12 #define ATH11K_HOST_VERSION_STRING "WIN" 13 #define ATH11K_QMI_WLANFW_TIMEOUT_MS 5000 14 #define ATH11K_QMI_MAX_BDF_FILE_NAME_SIZE 64 15 #define ATH11K_QMI_BDF_MAX_SIZE (256 * 1024) 16 #define ATH11K_QMI_CALDATA_OFFSET (128 * 1024) 17 #define ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 128 18 #define ATH11K_QMI_WLFW_SERVICE_ID_V01 0x45 19 #define ATH11K_QMI_WLFW_SERVICE_VERS_V01 0x01 20 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01 0x02 21 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390 0x01 22 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074 0x02 23 #define ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 32 24 #define ATH11K_QMI_RESP_LEN_MAX 8192 25 #define ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01 32 26 #define ATH11K_QMI_CALDB_SIZE 0x480000 27 28 #define QMI_WLFW_REQUEST_MEM_IND_V01 0x0035 29 #define QMI_WLFW_FW_MEM_READY_IND_V01 0x0037 30 #define QMI_WLFW_COLD_BOOT_CAL_DONE_IND_V01 0x0021 31 #define QMI_WLFW_FW_READY_IND_V01 0x0038 32 33 #define QMI_WLANFW_MAX_DATA_SIZE_V01 6144 34 #define ATH11K_FIRMWARE_MODE_OFF 4 35 #define ATH11K_QMI_TARGET_MEM_MODE_DEFAULT 0 36 37 struct ath11k_base; 38 39 enum ath11k_qmi_file_type { 40 ATH11K_QMI_FILE_TYPE_BDF_GOLDEN, 41 ATH11K_QMI_FILE_TYPE_CALDATA, 42 ATH11K_QMI_MAX_FILE_TYPE, 43 }; 44 45 enum ath11k_qmi_bdf_type { 46 ATH11K_QMI_BDF_TYPE_BIN = 0, 47 ATH11K_QMI_BDF_TYPE_ELF = 1, 48 }; 49 50 enum ath11k_qmi_event_type { 51 ATH11K_QMI_EVENT_SERVER_ARRIVE, 52 ATH11K_QMI_EVENT_SERVER_EXIT, 53 ATH11K_QMI_EVENT_REQUEST_MEM, 54 ATH11K_QMI_EVENT_FW_MEM_READY, 55 ATH11K_QMI_EVENT_FW_READY, 56 ATH11K_QMI_EVENT_COLD_BOOT_CAL_START, 57 ATH11K_QMI_EVENT_COLD_BOOT_CAL_DONE, 58 ATH11K_QMI_EVENT_REGISTER_DRIVER, 59 ATH11K_QMI_EVENT_UNREGISTER_DRIVER, 60 ATH11K_QMI_EVENT_RECOVERY, 61 ATH11K_QMI_EVENT_FORCE_FW_ASSERT, 62 ATH11K_QMI_EVENT_POWER_UP, 63 ATH11K_QMI_EVENT_POWER_DOWN, 64 ATH11K_QMI_EVENT_MAX, 65 }; 66 67 struct ath11k_qmi_driver_event { 68 struct list_head list; 69 enum ath11k_qmi_event_type type; 70 void *data; 71 }; 72 73 struct ath11k_qmi_ce_cfg { 74 const struct ce_pipe_config *tgt_ce; 75 int tgt_ce_len; 76 const struct service_to_pipe *svc_to_ce_map; 77 int svc_to_ce_map_len; 78 const u8 *shadow_reg; 79 int shadow_reg_len; 80 u32 *shadow_reg_v2; 81 int shadow_reg_v2_len; 82 }; 83 84 struct ath11k_qmi_event_msg { 85 struct list_head list; 86 enum ath11k_qmi_event_type type; 87 }; 88 89 struct target_mem_chunk { 90 u32 size; 91 u32 type; 92 dma_addr_t paddr; 93 u32 *vaddr; 94 }; 95 96 struct target_info { 97 u32 chip_id; 98 u32 chip_family; 99 u32 board_id; 100 u32 soc_id; 101 u32 fw_version; 102 char fw_build_timestamp[ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 + 1]; 103 char fw_build_id[ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 + 1]; 104 }; 105 106 struct m3_mem_region { 107 u32 size; 108 dma_addr_t paddr; 109 void *vaddr; 110 }; 111 112 struct ath11k_qmi { 113 struct ath11k_base *ab; 114 struct qmi_handle handle; 115 struct sockaddr_qrtr sq; 116 struct work_struct event_work; 117 struct workqueue_struct *event_wq; 118 struct list_head event_list; 119 spinlock_t event_lock; /* spinlock for qmi event list */ 120 struct ath11k_qmi_ce_cfg ce_cfg; 121 struct target_mem_chunk target_mem[ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01]; 122 u32 mem_seg_count; 123 u32 target_mem_mode; 124 u8 cal_done; 125 struct target_info target; 126 struct m3_mem_region m3_mem; 127 unsigned int service_ins_id; 128 }; 129 130 #define QMI_WLANFW_HOST_CAP_REQ_MSG_V01_MAX_LEN 189 131 #define QMI_WLANFW_HOST_CAP_REQ_V01 0x0034 132 #define QMI_WLANFW_HOST_CAP_RESP_MSG_V01_MAX_LEN 7 133 #define QMI_WLFW_HOST_CAP_RESP_V01 0x0034 134 #define QMI_WLFW_MAX_NUM_GPIO_V01 32 135 #define QMI_IPQ8074_FW_MEM_MODE 0xFF 136 #define HOST_DDR_REGION_TYPE 0x1 137 #define BDF_MEM_REGION_TYPE 0x2 138 #define CALDB_MEM_REGION_TYPE 0x4 139 140 struct qmi_wlanfw_host_cap_req_msg_v01 { 141 u8 num_clients_valid; 142 u32 num_clients; 143 u8 wake_msi_valid; 144 u32 wake_msi; 145 u8 gpios_valid; 146 u32 gpios_len; 147 u32 gpios[QMI_WLFW_MAX_NUM_GPIO_V01]; 148 u8 nm_modem_valid; 149 u8 nm_modem; 150 u8 bdf_support_valid; 151 u8 bdf_support; 152 u8 bdf_cache_support_valid; 153 u8 bdf_cache_support; 154 u8 m3_support_valid; 155 u8 m3_support; 156 u8 m3_cache_support_valid; 157 u8 m3_cache_support; 158 u8 cal_filesys_support_valid; 159 u8 cal_filesys_support; 160 u8 cal_cache_support_valid; 161 u8 cal_cache_support; 162 u8 cal_done_valid; 163 u8 cal_done; 164 u8 mem_bucket_valid; 165 u32 mem_bucket; 166 u8 mem_cfg_mode_valid; 167 u8 mem_cfg_mode; 168 }; 169 170 struct qmi_wlanfw_host_cap_resp_msg_v01 { 171 struct qmi_response_type_v01 resp; 172 }; 173 174 #define QMI_WLANFW_IND_REGISTER_REQ_MSG_V01_MAX_LEN 54 175 #define QMI_WLANFW_IND_REGISTER_REQ_V01 0x0020 176 #define QMI_WLANFW_IND_REGISTER_RESP_MSG_V01_MAX_LEN 18 177 #define QMI_WLANFW_IND_REGISTER_RESP_V01 0x0020 178 #define QMI_WLANFW_CLIENT_ID 0x4b4e454c 179 180 struct qmi_wlanfw_ind_register_req_msg_v01 { 181 u8 fw_ready_enable_valid; 182 u8 fw_ready_enable; 183 u8 initiate_cal_download_enable_valid; 184 u8 initiate_cal_download_enable; 185 u8 initiate_cal_update_enable_valid; 186 u8 initiate_cal_update_enable; 187 u8 msa_ready_enable_valid; 188 u8 msa_ready_enable; 189 u8 pin_connect_result_enable_valid; 190 u8 pin_connect_result_enable; 191 u8 client_id_valid; 192 u32 client_id; 193 u8 request_mem_enable_valid; 194 u8 request_mem_enable; 195 u8 fw_mem_ready_enable_valid; 196 u8 fw_mem_ready_enable; 197 u8 fw_init_done_enable_valid; 198 u8 fw_init_done_enable; 199 u8 rejuvenate_enable_valid; 200 u32 rejuvenate_enable; 201 u8 xo_cal_enable_valid; 202 u8 xo_cal_enable; 203 u8 cal_done_enable_valid; 204 u8 cal_done_enable; 205 }; 206 207 struct qmi_wlanfw_ind_register_resp_msg_v01 { 208 struct qmi_response_type_v01 resp; 209 u8 fw_status_valid; 210 u64 fw_status; 211 }; 212 213 #define QMI_WLANFW_REQUEST_MEM_IND_MSG_V01_MAX_LEN 1124 214 #define QMI_WLANFW_RESPOND_MEM_REQ_MSG_V01_MAX_LEN 548 215 #define QMI_WLANFW_RESPOND_MEM_RESP_MSG_V01_MAX_LEN 7 216 #define QMI_WLANFW_REQUEST_MEM_IND_V01 0x0035 217 #define QMI_WLANFW_RESPOND_MEM_REQ_V01 0x0036 218 #define QMI_WLANFW_RESPOND_MEM_RESP_V01 0x0036 219 #define QMI_WLANFW_MAX_NUM_MEM_CFG_V01 2 220 221 struct qmi_wlanfw_mem_cfg_s_v01 { 222 u64 offset; 223 u32 size; 224 u8 secure_flag; 225 }; 226 227 enum qmi_wlanfw_mem_type_enum_v01 { 228 WLANFW_MEM_TYPE_ENUM_MIN_VAL_V01 = INT_MIN, 229 QMI_WLANFW_MEM_TYPE_MSA_V01 = 0, 230 QMI_WLANFW_MEM_TYPE_DDR_V01 = 1, 231 QMI_WLANFW_MEM_BDF_V01 = 2, 232 QMI_WLANFW_MEM_M3_V01 = 3, 233 QMI_WLANFW_MEM_CAL_V01 = 4, 234 QMI_WLANFW_MEM_DPD_V01 = 5, 235 WLANFW_MEM_TYPE_ENUM_MAX_VAL_V01 = INT_MAX, 236 }; 237 238 struct qmi_wlanfw_mem_seg_s_v01 { 239 u32 size; 240 enum qmi_wlanfw_mem_type_enum_v01 type; 241 u32 mem_cfg_len; 242 struct qmi_wlanfw_mem_cfg_s_v01 mem_cfg[QMI_WLANFW_MAX_NUM_MEM_CFG_V01]; 243 }; 244 245 struct qmi_wlanfw_request_mem_ind_msg_v01 { 246 u32 mem_seg_len; 247 struct qmi_wlanfw_mem_seg_s_v01 mem_seg[ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01]; 248 }; 249 250 struct qmi_wlanfw_mem_seg_resp_s_v01 { 251 u64 addr; 252 u32 size; 253 enum qmi_wlanfw_mem_type_enum_v01 type; 254 u8 restore; 255 }; 256 257 struct qmi_wlanfw_respond_mem_req_msg_v01 { 258 u32 mem_seg_len; 259 struct qmi_wlanfw_mem_seg_resp_s_v01 mem_seg[ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01]; 260 }; 261 262 struct qmi_wlanfw_respond_mem_resp_msg_v01 { 263 struct qmi_response_type_v01 resp; 264 }; 265 266 struct qmi_wlanfw_fw_mem_ready_ind_msg_v01 { 267 char placeholder; 268 }; 269 270 struct qmi_wlanfw_fw_ready_ind_msg_v01 { 271 char placeholder; 272 }; 273 274 struct qmi_wlanfw_fw_cold_cal_done_ind_msg_v01 { 275 char placeholder; 276 }; 277 278 #define QMI_WLANFW_CAP_REQ_MSG_V01_MAX_LEN 0 279 #define QMI_WLANFW_CAP_RESP_MSG_V01_MAX_LEN 207 280 #define QMI_WLANFW_CAP_REQ_V01 0x0024 281 #define QMI_WLANFW_CAP_RESP_V01 0x0024 282 283 enum qmi_wlanfw_pipedir_enum_v01 { 284 QMI_WLFW_PIPEDIR_NONE_V01 = 0, 285 QMI_WLFW_PIPEDIR_IN_V01 = 1, 286 QMI_WLFW_PIPEDIR_OUT_V01 = 2, 287 QMI_WLFW_PIPEDIR_INOUT_V01 = 3, 288 }; 289 290 struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01 { 291 __le32 pipe_num; 292 __le32 pipe_dir; 293 __le32 nentries; 294 __le32 nbytes_max; 295 __le32 flags; 296 }; 297 298 struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01 { 299 __le32 service_id; 300 __le32 pipe_dir; 301 __le32 pipe_num; 302 }; 303 304 struct qmi_wlanfw_shadow_reg_cfg_s_v01 { 305 u16 id; 306 u16 offset; 307 }; 308 309 struct qmi_wlanfw_shadow_reg_v2_cfg_s_v01 { 310 u32 addr; 311 }; 312 313 struct qmi_wlanfw_memory_region_info_s_v01 { 314 u64 region_addr; 315 u32 size; 316 u8 secure_flag; 317 }; 318 319 struct qmi_wlanfw_rf_chip_info_s_v01 { 320 u32 chip_id; 321 u32 chip_family; 322 }; 323 324 struct qmi_wlanfw_rf_board_info_s_v01 { 325 u32 board_id; 326 }; 327 328 struct qmi_wlanfw_soc_info_s_v01 { 329 u32 soc_id; 330 }; 331 332 struct qmi_wlanfw_fw_version_info_s_v01 { 333 u32 fw_version; 334 char fw_build_timestamp[ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 + 1]; 335 }; 336 337 enum qmi_wlanfw_cal_temp_id_enum_v01 { 338 QMI_WLANFW_CAL_TEMP_IDX_0_V01 = 0, 339 QMI_WLANFW_CAL_TEMP_IDX_1_V01 = 1, 340 QMI_WLANFW_CAL_TEMP_IDX_2_V01 = 2, 341 QMI_WLANFW_CAL_TEMP_IDX_3_V01 = 3, 342 QMI_WLANFW_CAL_TEMP_IDX_4_V01 = 4, 343 QMI_WLANFW_CAL_TEMP_ID_MAX_V01 = 0xFF, 344 }; 345 346 struct qmi_wlanfw_cap_resp_msg_v01 { 347 struct qmi_response_type_v01 resp; 348 u8 chip_info_valid; 349 struct qmi_wlanfw_rf_chip_info_s_v01 chip_info; 350 u8 board_info_valid; 351 struct qmi_wlanfw_rf_board_info_s_v01 board_info; 352 u8 soc_info_valid; 353 struct qmi_wlanfw_soc_info_s_v01 soc_info; 354 u8 fw_version_info_valid; 355 struct qmi_wlanfw_fw_version_info_s_v01 fw_version_info; 356 u8 fw_build_id_valid; 357 char fw_build_id[ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 + 1]; 358 u8 num_macs_valid; 359 u8 num_macs; 360 }; 361 362 struct qmi_wlanfw_cap_req_msg_v01 { 363 char placeholder; 364 }; 365 366 #define QMI_WLANFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_LEN 6182 367 #define QMI_WLANFW_BDF_DOWNLOAD_RESP_MSG_V01_MAX_LEN 7 368 #define QMI_WLANFW_BDF_DOWNLOAD_RESP_V01 0x0025 369 #define QMI_WLANFW_BDF_DOWNLOAD_REQ_V01 0x0025 370 /* TODO: Need to check with MCL and FW team that data can be pointer and 371 * can be last element in structure 372 */ 373 struct qmi_wlanfw_bdf_download_req_msg_v01 { 374 u8 valid; 375 u8 file_id_valid; 376 enum qmi_wlanfw_cal_temp_id_enum_v01 file_id; 377 u8 total_size_valid; 378 u32 total_size; 379 u8 seg_id_valid; 380 u32 seg_id; 381 u8 data_valid; 382 u32 data_len; 383 u8 data[QMI_WLANFW_MAX_DATA_SIZE_V01]; 384 u8 end_valid; 385 u8 end; 386 u8 bdf_type_valid; 387 u8 bdf_type; 388 389 }; 390 391 struct qmi_wlanfw_bdf_download_resp_msg_v01 { 392 struct qmi_response_type_v01 resp; 393 }; 394 395 #define QMI_WLANFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN 18 396 #define QMI_WLANFW_M3_INFO_RESP_MSG_V01_MAX_MSG_LEN 7 397 #define QMI_WLANFW_M3_INFO_RESP_V01 0x003C 398 #define QMI_WLANFW_M3_INFO_REQ_V01 0x003C 399 400 struct qmi_wlanfw_m3_info_req_msg_v01 { 401 u64 addr; 402 u32 size; 403 }; 404 405 struct qmi_wlanfw_m3_info_resp_msg_v01 { 406 struct qmi_response_type_v01 resp; 407 }; 408 409 #define QMI_WLANFW_WLAN_MODE_REQ_MSG_V01_MAX_LEN 11 410 #define QMI_WLANFW_WLAN_MODE_RESP_MSG_V01_MAX_LEN 7 411 #define QMI_WLANFW_WLAN_CFG_REQ_MSG_V01_MAX_LEN 803 412 #define QMI_WLANFW_WLAN_CFG_RESP_MSG_V01_MAX_LEN 7 413 #define QMI_WLANFW_WLAN_MODE_REQ_V01 0x0022 414 #define QMI_WLANFW_WLAN_MODE_RESP_V01 0x0022 415 #define QMI_WLANFW_WLAN_CFG_REQ_V01 0x0023 416 #define QMI_WLANFW_WLAN_CFG_RESP_V01 0x0023 417 #define QMI_WLANFW_MAX_STR_LEN_V01 16 418 #define QMI_WLANFW_MAX_NUM_CE_V01 12 419 #define QMI_WLANFW_MAX_NUM_SVC_V01 24 420 #define QMI_WLANFW_MAX_NUM_SHADOW_REG_V01 24 421 #define QMI_WLANFW_MAX_NUM_SHADOW_REG_V2_V01 36 422 423 struct qmi_wlanfw_wlan_mode_req_msg_v01 { 424 u32 mode; 425 u8 hw_debug_valid; 426 u8 hw_debug; 427 }; 428 429 struct qmi_wlanfw_wlan_mode_resp_msg_v01 { 430 struct qmi_response_type_v01 resp; 431 }; 432 433 struct qmi_wlanfw_wlan_cfg_req_msg_v01 { 434 u8 host_version_valid; 435 char host_version[QMI_WLANFW_MAX_STR_LEN_V01 + 1]; 436 u8 tgt_cfg_valid; 437 u32 tgt_cfg_len; 438 struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01 439 tgt_cfg[QMI_WLANFW_MAX_NUM_CE_V01]; 440 u8 svc_cfg_valid; 441 u32 svc_cfg_len; 442 struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01 443 svc_cfg[QMI_WLANFW_MAX_NUM_SVC_V01]; 444 u8 shadow_reg_valid; 445 u32 shadow_reg_len; 446 struct qmi_wlanfw_shadow_reg_cfg_s_v01 447 shadow_reg[QMI_WLANFW_MAX_NUM_SHADOW_REG_V01]; 448 u8 shadow_reg_v2_valid; 449 u32 shadow_reg_v2_len; 450 struct qmi_wlanfw_shadow_reg_v2_cfg_s_v01 451 shadow_reg_v2[QMI_WLANFW_MAX_NUM_SHADOW_REG_V2_V01]; 452 }; 453 454 struct qmi_wlanfw_wlan_cfg_resp_msg_v01 { 455 struct qmi_response_type_v01 resp; 456 }; 457 458 int ath11k_qmi_firmware_start(struct ath11k_base *ab, 459 u32 mode); 460 void ath11k_qmi_firmware_stop(struct ath11k_base *ab); 461 void ath11k_qmi_event_work(struct work_struct *work); 462 void ath11k_qmi_msg_recv_work(struct work_struct *work); 463 void ath11k_qmi_deinit_service(struct ath11k_base *ab); 464 int ath11k_qmi_init_service(struct ath11k_base *ab); 465 466 #endif 467