1bbfdc5a7SManikanta Pubbisetty /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2bbfdc5a7SManikanta Pubbisetty /* 3bbfdc5a7SManikanta Pubbisetty * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved. 4bbfdc5a7SManikanta Pubbisetty * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved. 5bbfdc5a7SManikanta Pubbisetty */ 6bbfdc5a7SManikanta Pubbisetty 7bbfdc5a7SManikanta Pubbisetty #ifndef _ATH11K_PCI_CMN_H 8bbfdc5a7SManikanta Pubbisetty #define _ATH11K_PCI_CMN_H 9bbfdc5a7SManikanta Pubbisetty 10bbfdc5a7SManikanta Pubbisetty #include "core.h" 11bbfdc5a7SManikanta Pubbisetty #include "pci.h" 12bbfdc5a7SManikanta Pubbisetty 13bbfdc5a7SManikanta Pubbisetty #define ATH11K_PCI_IRQ_CE0_OFFSET 3 14bbfdc5a7SManikanta Pubbisetty #define ATH11K_PCI_IRQ_DP_OFFSET 14 15bbfdc5a7SManikanta Pubbisetty 16bbfdc5a7SManikanta Pubbisetty #define ATH11K_PCI_WINDOW_ENABLE_BIT 0x40000000 17bbfdc5a7SManikanta Pubbisetty #define ATH11K_PCI_WINDOW_REG_ADDRESS 0x310c 18bbfdc5a7SManikanta Pubbisetty #define ATH11K_PCI_WINDOW_VALUE_MASK GENMASK(24, 19) 19bbfdc5a7SManikanta Pubbisetty #define ATH11K_PCI_WINDOW_START 0x80000 20bbfdc5a7SManikanta Pubbisetty #define ATH11K_PCI_WINDOW_RANGE_MASK GENMASK(18, 0) 21bbfdc5a7SManikanta Pubbisetty 22bbfdc5a7SManikanta Pubbisetty /* BAR0 + 4k is always accessible, and no 23bbfdc5a7SManikanta Pubbisetty * need to force wakeup. 24bbfdc5a7SManikanta Pubbisetty * 4K - 32 = 0xFE0 25bbfdc5a7SManikanta Pubbisetty */ 26bbfdc5a7SManikanta Pubbisetty #define ATH11K_PCI_ACCESS_ALWAYS_OFF 0xFE0 27bbfdc5a7SManikanta Pubbisetty 28bbfdc5a7SManikanta Pubbisetty int ath11k_pcic_get_user_msi_assignment(struct ath11k_pci *ar_pci, char *user_name, 29bbfdc5a7SManikanta Pubbisetty int *num_vectors, u32 *user_base_data, 30bbfdc5a7SManikanta Pubbisetty u32 *base_vector); 31bbfdc5a7SManikanta Pubbisetty int ath11k_pcic_get_msi_irq(struct device *dev, unsigned int vector); 32bbfdc5a7SManikanta Pubbisetty void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value); 33bbfdc5a7SManikanta Pubbisetty u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset); 34bbfdc5a7SManikanta Pubbisetty void ath11k_pcic_get_msi_address(struct ath11k_base *ab, u32 *msi_addr_lo, 35bbfdc5a7SManikanta Pubbisetty u32 *msi_addr_hi); 36bbfdc5a7SManikanta Pubbisetty void ath11k_pcic_get_ce_msi_idx(struct ath11k_base *ab, u32 ce_id, u32 *msi_idx); 37bbfdc5a7SManikanta Pubbisetty void ath11k_pcic_free_irq(struct ath11k_base *ab); 38bbfdc5a7SManikanta Pubbisetty int ath11k_pcic_config_irq(struct ath11k_base *ab); 39bbfdc5a7SManikanta Pubbisetty void ath11k_pcic_ext_irq_enable(struct ath11k_base *ab); 40bbfdc5a7SManikanta Pubbisetty void ath11k_pcic_ext_irq_disable(struct ath11k_base *ab); 41bbfdc5a7SManikanta Pubbisetty void ath11k_pcic_stop(struct ath11k_base *ab); 42bbfdc5a7SManikanta Pubbisetty int ath11k_pcic_start(struct ath11k_base *ab); 43bbfdc5a7SManikanta Pubbisetty int ath11k_pcic_map_service_to_pipe(struct ath11k_base *ab, u16 service_id, 44bbfdc5a7SManikanta Pubbisetty u8 *ul_pipe, u8 *dl_pipe); 45bbfdc5a7SManikanta Pubbisetty void ath11k_pcic_ce_irqs_enable(struct ath11k_base *ab); 46bbfdc5a7SManikanta Pubbisetty void ath11k_pcic_ce_irq_disable_sync(struct ath11k_base *ab); 47bbfdc5a7SManikanta Pubbisetty int ath11k_get_user_msi_assignment(struct ath11k_base *ab, char *user_name, 48bbfdc5a7SManikanta Pubbisetty int *num_vectors, u32 *user_base_data, 49bbfdc5a7SManikanta Pubbisetty u32 *base_vector); 50bbfdc5a7SManikanta Pubbisetty void ath11k_pcic_aspm_restore(struct ath11k_pci *ab_pci); 51bbfdc5a7SManikanta Pubbisetty int ath11k_pcic_set_irq_affinity_hint(struct ath11k_pci *ab_pci, 52bbfdc5a7SManikanta Pubbisetty const struct cpumask *m); 53*8d06b802SManikanta Pubbisetty int ath11k_pcic_init_msi_config(struct ath11k_base *ab); 54bbfdc5a7SManikanta Pubbisetty #endif 55