xref: /openbmc/linux/drivers/net/wireless/ath/ath11k/pci.h (revision 11a163f2)
1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3  * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
4  */
5 #ifndef _ATH11K_PCI_H
6 #define _ATH11K_PCI_H
7 
8 #include <linux/mhi.h>
9 
10 #include "core.h"
11 
12 #define PCIE_SOC_GLOBAL_RESET			0x3008
13 #define PCIE_SOC_GLOBAL_RESET_V			1
14 
15 #define WLAON_WARM_SW_ENTRY			0x1f80504
16 #define WLAON_SOC_RESET_CAUSE_REG		0x01f8060c
17 
18 #define PCIE_Q6_COOKIE_ADDR			0x01f80500
19 #define PCIE_Q6_COOKIE_DATA			0xc0000000
20 
21 /* register to wake the UMAC from power collapse */
22 #define PCIE_SCRATCH_0_SOC_PCIE_REG		0x4040
23 
24 /* register used for handshake mechanism to validate UMAC is awake */
25 #define PCIE_SOC_WAKE_PCIE_LOCAL_REG		0x3004
26 
27 struct ath11k_msi_user {
28 	char *name;
29 	int num_vectors;
30 	u32 base_vector;
31 };
32 
33 struct ath11k_msi_config {
34 	int total_vectors;
35 	int total_users;
36 	struct ath11k_msi_user *users;
37 };
38 
39 enum ath11k_pci_flags {
40 	ATH11K_PCI_FLAG_INIT_DONE,
41 };
42 
43 struct ath11k_pci {
44 	struct pci_dev *pdev;
45 	struct ath11k_base *ab;
46 	u16 dev_id;
47 	char amss_path[100];
48 	u32 msi_ep_base_data;
49 	struct mhi_controller *mhi_ctrl;
50 	unsigned long mhi_state;
51 	u32 register_window;
52 
53 	/* protects register_window above */
54 	spinlock_t window_lock;
55 
56 	/* enum ath11k_pci_flags */
57 	unsigned long flags;
58 };
59 
60 static inline struct ath11k_pci *ath11k_pci_priv(struct ath11k_base *ab)
61 {
62 	return (struct ath11k_pci *)ab->drv_priv;
63 }
64 
65 int ath11k_pci_get_user_msi_assignment(struct ath11k_pci *ar_pci, char *user_name,
66 				       int *num_vectors, u32 *user_base_data,
67 				       u32 *base_vector);
68 int ath11k_pci_get_msi_irq(struct device *dev, unsigned int vector);
69 void ath11k_pci_write32(struct ath11k_base *ab, u32 offset, u32 value);
70 u32 ath11k_pci_read32(struct ath11k_base *ab, u32 offset);
71 
72 #endif
73