1d547ca4cSAnilkumar Kolli // SPDX-License-Identifier: BSD-3-Clause-Clear 2d547ca4cSAnilkumar Kolli /* 3d547ca4cSAnilkumar Kolli * Copyright (c) 2018-2020 The Linux Foundation. All rights reserved. 4d547ca4cSAnilkumar Kolli */ 5d547ca4cSAnilkumar Kolli 66976433cSCarl Huang #include <linux/types.h> 76976433cSCarl Huang #include <linux/bitops.h> 86976433cSCarl Huang #include <linux/bitfield.h> 96976433cSCarl Huang 106976433cSCarl Huang #include "hw.h" 11d547ca4cSAnilkumar Kolli #include "core.h" 12e3396b8bSCarl Huang #include "ce.h" 13d547ca4cSAnilkumar Kolli 14d547ca4cSAnilkumar Kolli /* Map from pdev index to hw mac index */ 15d547ca4cSAnilkumar Kolli static u8 ath11k_hw_ipq8074_mac_from_pdev_id(int pdev_idx) 16d547ca4cSAnilkumar Kolli { 17d547ca4cSAnilkumar Kolli switch (pdev_idx) { 18d547ca4cSAnilkumar Kolli case 0: 19d547ca4cSAnilkumar Kolli return 0; 20d547ca4cSAnilkumar Kolli case 1: 21d547ca4cSAnilkumar Kolli return 2; 22d547ca4cSAnilkumar Kolli case 2: 23d547ca4cSAnilkumar Kolli return 1; 24d547ca4cSAnilkumar Kolli default: 25d547ca4cSAnilkumar Kolli return ATH11K_INVALID_HW_MAC_ID; 26d547ca4cSAnilkumar Kolli } 27d547ca4cSAnilkumar Kolli } 28d547ca4cSAnilkumar Kolli 29d547ca4cSAnilkumar Kolli static u8 ath11k_hw_ipq6018_mac_from_pdev_id(int pdev_idx) 30d547ca4cSAnilkumar Kolli { 31d547ca4cSAnilkumar Kolli return pdev_idx; 32d547ca4cSAnilkumar Kolli } 33d547ca4cSAnilkumar Kolli 342d4bcbedSCarl Huang static void ath11k_init_wmi_config_qca6390(struct ath11k_base *ab, 352d4bcbedSCarl Huang struct target_resource_config *config) 362d4bcbedSCarl Huang { 372d4bcbedSCarl Huang config->num_vdevs = 4; 382d4bcbedSCarl Huang config->num_peers = 16; 392d4bcbedSCarl Huang config->num_tids = 32; 402d4bcbedSCarl Huang 412d4bcbedSCarl Huang config->num_offload_peers = 3; 422d4bcbedSCarl Huang config->num_offload_reorder_buffs = 3; 432d4bcbedSCarl Huang config->num_peer_keys = TARGET_NUM_PEER_KEYS; 442d4bcbedSCarl Huang config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 452d4bcbedSCarl Huang config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 462d4bcbedSCarl Huang config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 472d4bcbedSCarl Huang config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 482d4bcbedSCarl Huang config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 492d4bcbedSCarl Huang config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 502d4bcbedSCarl Huang config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 512d4bcbedSCarl Huang config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 522d4bcbedSCarl Huang config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 532d4bcbedSCarl Huang config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 542d4bcbedSCarl Huang config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 552d4bcbedSCarl Huang config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 562d4bcbedSCarl Huang config->num_mcast_groups = 0; 572d4bcbedSCarl Huang config->num_mcast_table_elems = 0; 582d4bcbedSCarl Huang config->mcast2ucast_mode = 0; 592d4bcbedSCarl Huang config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 602d4bcbedSCarl Huang config->num_wds_entries = 0; 612d4bcbedSCarl Huang config->dma_burst_size = 0; 622d4bcbedSCarl Huang config->rx_skip_defrag_timeout_dup_detection_check = 0; 632d4bcbedSCarl Huang config->vow_config = TARGET_VOW_CONFIG; 642d4bcbedSCarl Huang config->gtk_offload_max_vdev = 2; 652d4bcbedSCarl Huang config->num_msdu_desc = 0x400; 662d4bcbedSCarl Huang config->beacon_tx_offload_max_vdev = 2; 672d4bcbedSCarl Huang config->rx_batchmode = TARGET_RX_BATCHMODE; 682d4bcbedSCarl Huang 692d4bcbedSCarl Huang config->peer_map_unmap_v2_support = 0; 702d4bcbedSCarl Huang config->use_pdev_id = 1; 712d4bcbedSCarl Huang config->max_frag_entries = 0xa; 722d4bcbedSCarl Huang config->num_tdls_vdevs = 0x1; 732d4bcbedSCarl Huang config->num_tdls_conn_table_entries = 8; 742d4bcbedSCarl Huang config->beacon_tx_offload_max_vdev = 0x2; 752d4bcbedSCarl Huang config->num_multicast_filter_entries = 0x20; 762d4bcbedSCarl Huang config->num_wow_filters = 0x16; 772d4bcbedSCarl Huang config->num_keep_alive_pattern = 0x1; 782d4bcbedSCarl Huang config->num_keep_alive_pattern = 0; 792d4bcbedSCarl Huang } 802d4bcbedSCarl Huang 812d4bcbedSCarl Huang static void ath11k_init_wmi_config_ipq8074(struct ath11k_base *ab, 822d4bcbedSCarl Huang struct target_resource_config *config) 832d4bcbedSCarl Huang { 842d4bcbedSCarl Huang config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS; 852d4bcbedSCarl Huang 862d4bcbedSCarl Huang if (ab->num_radios == 2) { 872d4bcbedSCarl Huang config->num_peers = TARGET_NUM_PEERS(DBS); 882d4bcbedSCarl Huang config->num_tids = TARGET_NUM_TIDS(DBS); 892d4bcbedSCarl Huang } else if (ab->num_radios == 3) { 902d4bcbedSCarl Huang config->num_peers = TARGET_NUM_PEERS(DBS_SBS); 912d4bcbedSCarl Huang config->num_tids = TARGET_NUM_TIDS(DBS_SBS); 922d4bcbedSCarl Huang } else { 932d4bcbedSCarl Huang /* Control should not reach here */ 942d4bcbedSCarl Huang config->num_peers = TARGET_NUM_PEERS(SINGLE); 952d4bcbedSCarl Huang config->num_tids = TARGET_NUM_TIDS(SINGLE); 962d4bcbedSCarl Huang } 972d4bcbedSCarl Huang config->num_offload_peers = TARGET_NUM_OFFLD_PEERS; 982d4bcbedSCarl Huang config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS; 992d4bcbedSCarl Huang config->num_peer_keys = TARGET_NUM_PEER_KEYS; 1002d4bcbedSCarl Huang config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 1012d4bcbedSCarl Huang config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 1022d4bcbedSCarl Huang config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 1032d4bcbedSCarl Huang config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 1042d4bcbedSCarl Huang config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 1052d4bcbedSCarl Huang config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 1062d4bcbedSCarl Huang config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 107c695faf7SKalle Valo 108c695faf7SKalle Valo if (test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) 109c695faf7SKalle Valo config->rx_decap_mode = TARGET_DECAP_MODE_RAW; 110c695faf7SKalle Valo else 1112d4bcbedSCarl Huang config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 112c695faf7SKalle Valo 1132d4bcbedSCarl Huang config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 1142d4bcbedSCarl Huang config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 1152d4bcbedSCarl Huang config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 1162d4bcbedSCarl Huang config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 1172d4bcbedSCarl Huang config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS; 1182d4bcbedSCarl Huang config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS; 1192d4bcbedSCarl Huang config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE; 1202d4bcbedSCarl Huang config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 1212d4bcbedSCarl Huang config->num_wds_entries = TARGET_NUM_WDS_ENTRIES; 1222d4bcbedSCarl Huang config->dma_burst_size = TARGET_DMA_BURST_SIZE; 1232d4bcbedSCarl Huang config->rx_skip_defrag_timeout_dup_detection_check = 1242d4bcbedSCarl Huang TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 1252d4bcbedSCarl Huang config->vow_config = TARGET_VOW_CONFIG; 1262d4bcbedSCarl Huang config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV; 1272d4bcbedSCarl Huang config->num_msdu_desc = TARGET_NUM_MSDU_DESC; 1282d4bcbedSCarl Huang config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD; 1292d4bcbedSCarl Huang config->rx_batchmode = TARGET_RX_BATCHMODE; 1302d4bcbedSCarl Huang config->peer_map_unmap_v2_support = 1; 1312d4bcbedSCarl Huang config->twt_ap_pdev_count = 2; 1322d4bcbedSCarl Huang config->twt_ap_sta_count = 1000; 1332d4bcbedSCarl Huang } 1342d4bcbedSCarl Huang 1354152e420SCarl Huang static int ath11k_hw_mac_id_to_pdev_id_ipq8074(struct ath11k_hw_params *hw, 1364152e420SCarl Huang int mac_id) 1374152e420SCarl Huang { 1384152e420SCarl Huang return mac_id; 1394152e420SCarl Huang } 1404152e420SCarl Huang 1414152e420SCarl Huang static int ath11k_hw_mac_id_to_srng_id_ipq8074(struct ath11k_hw_params *hw, 1424152e420SCarl Huang int mac_id) 1434152e420SCarl Huang { 1444152e420SCarl Huang return 0; 1454152e420SCarl Huang } 1464152e420SCarl Huang 1474152e420SCarl Huang static int ath11k_hw_mac_id_to_pdev_id_qca6390(struct ath11k_hw_params *hw, 1484152e420SCarl Huang int mac_id) 1494152e420SCarl Huang { 1504152e420SCarl Huang return 0; 1514152e420SCarl Huang } 1524152e420SCarl Huang 1534152e420SCarl Huang static int ath11k_hw_mac_id_to_srng_id_qca6390(struct ath11k_hw_params *hw, 1544152e420SCarl Huang int mac_id) 1554152e420SCarl Huang { 1564152e420SCarl Huang return mac_id; 1574152e420SCarl Huang } 1584152e420SCarl Huang 159d547ca4cSAnilkumar Kolli const struct ath11k_hw_ops ipq8074_ops = { 160d547ca4cSAnilkumar Kolli .get_hw_mac_from_pdev_id = ath11k_hw_ipq8074_mac_from_pdev_id, 1612d4bcbedSCarl Huang .wmi_init_config = ath11k_init_wmi_config_qca6390, 1624152e420SCarl Huang .mac_id_to_pdev_id = ath11k_hw_mac_id_to_pdev_id_ipq8074, 1634152e420SCarl Huang .mac_id_to_srng_id = ath11k_hw_mac_id_to_srng_id_ipq8074, 164d547ca4cSAnilkumar Kolli }; 165d547ca4cSAnilkumar Kolli 166d547ca4cSAnilkumar Kolli const struct ath11k_hw_ops ipq6018_ops = { 167d547ca4cSAnilkumar Kolli .get_hw_mac_from_pdev_id = ath11k_hw_ipq6018_mac_from_pdev_id, 1682d4bcbedSCarl Huang .wmi_init_config = ath11k_init_wmi_config_ipq8074, 1694152e420SCarl Huang .mac_id_to_pdev_id = ath11k_hw_mac_id_to_pdev_id_ipq8074, 1704152e420SCarl Huang .mac_id_to_srng_id = ath11k_hw_mac_id_to_srng_id_ipq8074, 171d547ca4cSAnilkumar Kolli }; 1729de2ad43SCarl Huang 1739de2ad43SCarl Huang const struct ath11k_hw_ops qca6390_ops = { 1749de2ad43SCarl Huang .get_hw_mac_from_pdev_id = ath11k_hw_ipq8074_mac_from_pdev_id, 1754152e420SCarl Huang .wmi_init_config = ath11k_init_wmi_config_qca6390, 1764152e420SCarl Huang .mac_id_to_pdev_id = ath11k_hw_mac_id_to_pdev_id_qca6390, 1774152e420SCarl Huang .mac_id_to_srng_id = ath11k_hw_mac_id_to_srng_id_qca6390, 1789de2ad43SCarl Huang }; 17934d5a3a8SKalle Valo 18034d5a3a8SKalle Valo #define ATH11K_TX_RING_MASK_0 0x1 18134d5a3a8SKalle Valo #define ATH11K_TX_RING_MASK_1 0x2 18234d5a3a8SKalle Valo #define ATH11K_TX_RING_MASK_2 0x4 18334d5a3a8SKalle Valo 18434d5a3a8SKalle Valo #define ATH11K_RX_RING_MASK_0 0x1 18534d5a3a8SKalle Valo #define ATH11K_RX_RING_MASK_1 0x2 18634d5a3a8SKalle Valo #define ATH11K_RX_RING_MASK_2 0x4 18734d5a3a8SKalle Valo #define ATH11K_RX_RING_MASK_3 0x8 18834d5a3a8SKalle Valo 18934d5a3a8SKalle Valo #define ATH11K_RX_ERR_RING_MASK_0 0x1 19034d5a3a8SKalle Valo 19134d5a3a8SKalle Valo #define ATH11K_RX_WBM_REL_RING_MASK_0 0x1 19234d5a3a8SKalle Valo 19334d5a3a8SKalle Valo #define ATH11K_REO_STATUS_RING_MASK_0 0x1 19434d5a3a8SKalle Valo 19534d5a3a8SKalle Valo #define ATH11K_RXDMA2HOST_RING_MASK_0 0x1 19634d5a3a8SKalle Valo #define ATH11K_RXDMA2HOST_RING_MASK_1 0x2 19734d5a3a8SKalle Valo #define ATH11K_RXDMA2HOST_RING_MASK_2 0x4 19834d5a3a8SKalle Valo 19934d5a3a8SKalle Valo #define ATH11K_HOST2RXDMA_RING_MASK_0 0x1 20034d5a3a8SKalle Valo #define ATH11K_HOST2RXDMA_RING_MASK_1 0x2 20134d5a3a8SKalle Valo #define ATH11K_HOST2RXDMA_RING_MASK_2 0x4 20234d5a3a8SKalle Valo 20334d5a3a8SKalle Valo #define ATH11K_RX_MON_STATUS_RING_MASK_0 0x1 20434d5a3a8SKalle Valo #define ATH11K_RX_MON_STATUS_RING_MASK_1 0x2 20534d5a3a8SKalle Valo #define ATH11K_RX_MON_STATUS_RING_MASK_2 0x4 20634d5a3a8SKalle Valo 20734d5a3a8SKalle Valo const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_ipq8074 = { 20834d5a3a8SKalle Valo .tx = { 20934d5a3a8SKalle Valo ATH11K_TX_RING_MASK_0, 21034d5a3a8SKalle Valo ATH11K_TX_RING_MASK_1, 21134d5a3a8SKalle Valo ATH11K_TX_RING_MASK_2, 21234d5a3a8SKalle Valo }, 21334d5a3a8SKalle Valo .rx_mon_status = { 21434d5a3a8SKalle Valo 0, 0, 0, 0, 21534d5a3a8SKalle Valo ATH11K_RX_MON_STATUS_RING_MASK_0, 21634d5a3a8SKalle Valo ATH11K_RX_MON_STATUS_RING_MASK_1, 21734d5a3a8SKalle Valo ATH11K_RX_MON_STATUS_RING_MASK_2, 21834d5a3a8SKalle Valo }, 21934d5a3a8SKalle Valo .rx = { 22034d5a3a8SKalle Valo 0, 0, 0, 0, 0, 0, 0, 22134d5a3a8SKalle Valo ATH11K_RX_RING_MASK_0, 22234d5a3a8SKalle Valo ATH11K_RX_RING_MASK_1, 22334d5a3a8SKalle Valo ATH11K_RX_RING_MASK_2, 22434d5a3a8SKalle Valo ATH11K_RX_RING_MASK_3, 22534d5a3a8SKalle Valo }, 22634d5a3a8SKalle Valo .rx_err = { 22734d5a3a8SKalle Valo ATH11K_RX_ERR_RING_MASK_0, 22834d5a3a8SKalle Valo }, 22934d5a3a8SKalle Valo .rx_wbm_rel = { 23034d5a3a8SKalle Valo ATH11K_RX_WBM_REL_RING_MASK_0, 23134d5a3a8SKalle Valo }, 23234d5a3a8SKalle Valo .reo_status = { 23334d5a3a8SKalle Valo ATH11K_REO_STATUS_RING_MASK_0, 23434d5a3a8SKalle Valo }, 23534d5a3a8SKalle Valo .rxdma2host = { 23634d5a3a8SKalle Valo ATH11K_RXDMA2HOST_RING_MASK_0, 23734d5a3a8SKalle Valo ATH11K_RXDMA2HOST_RING_MASK_1, 23834d5a3a8SKalle Valo ATH11K_RXDMA2HOST_RING_MASK_2, 23934d5a3a8SKalle Valo }, 24034d5a3a8SKalle Valo .host2rxdma = { 24134d5a3a8SKalle Valo ATH11K_HOST2RXDMA_RING_MASK_0, 24234d5a3a8SKalle Valo ATH11K_HOST2RXDMA_RING_MASK_1, 24334d5a3a8SKalle Valo ATH11K_HOST2RXDMA_RING_MASK_2, 24434d5a3a8SKalle Valo }, 24534d5a3a8SKalle Valo }; 24634d5a3a8SKalle Valo 247d4ecb90bSCarl Huang const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_qca6390 = { 248d4ecb90bSCarl Huang .tx = { 249d4ecb90bSCarl Huang ATH11K_TX_RING_MASK_0, 250d4ecb90bSCarl Huang ATH11K_TX_RING_MASK_1, 251d4ecb90bSCarl Huang ATH11K_TX_RING_MASK_2, 252d4ecb90bSCarl Huang }, 253d4ecb90bSCarl Huang .rx_mon_status = { 254d4ecb90bSCarl Huang 0, 0, 0, 0, 255d4ecb90bSCarl Huang ATH11K_RX_MON_STATUS_RING_MASK_0, 256d4ecb90bSCarl Huang ATH11K_RX_MON_STATUS_RING_MASK_1, 257d4ecb90bSCarl Huang ATH11K_RX_MON_STATUS_RING_MASK_2, 258d4ecb90bSCarl Huang }, 259d4ecb90bSCarl Huang .rx = { 260d4ecb90bSCarl Huang 0, 0, 0, 0, 0, 0, 0, 261d4ecb90bSCarl Huang ATH11K_RX_RING_MASK_0, 262d4ecb90bSCarl Huang ATH11K_RX_RING_MASK_1, 263d4ecb90bSCarl Huang ATH11K_RX_RING_MASK_2, 264d4ecb90bSCarl Huang ATH11K_RX_RING_MASK_3, 265d4ecb90bSCarl Huang }, 266d4ecb90bSCarl Huang .rx_err = { 267d4ecb90bSCarl Huang ATH11K_RX_ERR_RING_MASK_0, 268d4ecb90bSCarl Huang }, 269d4ecb90bSCarl Huang .rx_wbm_rel = { 270d4ecb90bSCarl Huang ATH11K_RX_WBM_REL_RING_MASK_0, 271d4ecb90bSCarl Huang }, 272d4ecb90bSCarl Huang .reo_status = { 273d4ecb90bSCarl Huang ATH11K_REO_STATUS_RING_MASK_0, 274d4ecb90bSCarl Huang }, 275d4ecb90bSCarl Huang .rxdma2host = { 276d4ecb90bSCarl Huang ATH11K_RXDMA2HOST_RING_MASK_0, 277d4ecb90bSCarl Huang ATH11K_RXDMA2HOST_RING_MASK_1, 278d4ecb90bSCarl Huang ATH11K_RXDMA2HOST_RING_MASK_2, 279d4ecb90bSCarl Huang }, 280d4ecb90bSCarl Huang .host2rxdma = { 281d4ecb90bSCarl Huang }, 282d4ecb90bSCarl Huang }; 283d4ecb90bSCarl Huang 284967c1d11SAnilkumar Kolli /* Target firmware's Copy Engine configuration. */ 285967c1d11SAnilkumar Kolli const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[] = { 286967c1d11SAnilkumar Kolli /* CE0: host->target HTC control and raw streams */ 287967c1d11SAnilkumar Kolli { 288967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(0), 289967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), 290967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 291967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(2048), 292967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 293967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 294967c1d11SAnilkumar Kolli }, 295967c1d11SAnilkumar Kolli 296967c1d11SAnilkumar Kolli /* CE1: target->host HTT + HTC control */ 297967c1d11SAnilkumar Kolli { 298967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(1), 299967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), 300967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 301967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(2048), 302967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 303967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 304967c1d11SAnilkumar Kolli }, 305967c1d11SAnilkumar Kolli 306967c1d11SAnilkumar Kolli /* CE2: target->host WMI */ 307967c1d11SAnilkumar Kolli { 308967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(2), 309967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), 310967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 311967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(2048), 312967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 313967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 314967c1d11SAnilkumar Kolli }, 315967c1d11SAnilkumar Kolli 316967c1d11SAnilkumar Kolli /* CE3: host->target WMI */ 317967c1d11SAnilkumar Kolli { 318967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(3), 319967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), 320967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 321967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(2048), 322967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 323967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 324967c1d11SAnilkumar Kolli }, 325967c1d11SAnilkumar Kolli 326967c1d11SAnilkumar Kolli /* CE4: host->target HTT */ 327967c1d11SAnilkumar Kolli { 328967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(4), 329967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), 330967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(256), 331967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(256), 332967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS | CE_ATTR_DIS_INTR), 333967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 334967c1d11SAnilkumar Kolli }, 335967c1d11SAnilkumar Kolli 336967c1d11SAnilkumar Kolli /* CE5: target->host Pktlog */ 337967c1d11SAnilkumar Kolli { 338967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(5), 339967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), 340967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 341967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(2048), 342967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(0), 343967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 344967c1d11SAnilkumar Kolli }, 345967c1d11SAnilkumar Kolli 346967c1d11SAnilkumar Kolli /* CE6: Reserved for target autonomous hif_memcpy */ 347967c1d11SAnilkumar Kolli { 348967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(6), 349967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_INOUT), 350967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 351967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(65535), 352967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 353967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 354967c1d11SAnilkumar Kolli }, 355967c1d11SAnilkumar Kolli 356967c1d11SAnilkumar Kolli /* CE7 used only by Host */ 357967c1d11SAnilkumar Kolli { 358967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(7), 359967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), 360967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 361967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(2048), 362967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 363967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 364967c1d11SAnilkumar Kolli }, 365967c1d11SAnilkumar Kolli 366967c1d11SAnilkumar Kolli /* CE8 target->host used only by IPA */ 367967c1d11SAnilkumar Kolli { 368967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(8), 369967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_INOUT), 370967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 371967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(65535), 372967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 373967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 374967c1d11SAnilkumar Kolli }, 375967c1d11SAnilkumar Kolli 376967c1d11SAnilkumar Kolli /* CE9 host->target HTT */ 377967c1d11SAnilkumar Kolli { 378967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(9), 379967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), 380967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 381967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(2048), 382967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 383967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 384967c1d11SAnilkumar Kolli }, 385967c1d11SAnilkumar Kolli 386967c1d11SAnilkumar Kolli /* CE10 target->host HTT */ 387967c1d11SAnilkumar Kolli { 388967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(10), 389967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_INOUT_H2H), 390967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(0), 391967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(0), 392967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 393967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 394967c1d11SAnilkumar Kolli }, 395967c1d11SAnilkumar Kolli 396967c1d11SAnilkumar Kolli /* CE11 Not used */ 397967c1d11SAnilkumar Kolli }; 398967c1d11SAnilkumar Kolli 399967c1d11SAnilkumar Kolli /* Map from service/endpoint to Copy Engine. 400967c1d11SAnilkumar Kolli * This table is derived from the CE_PCI TABLE, above. 401967c1d11SAnilkumar Kolli * It is passed to the Target at startup for use by firmware. 402967c1d11SAnilkumar Kolli */ 403967c1d11SAnilkumar Kolli const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[] = { 404967c1d11SAnilkumar Kolli { 405967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VO), 406967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 407967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(3), 408967c1d11SAnilkumar Kolli }, 409967c1d11SAnilkumar Kolli { 410967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VO), 411967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 412967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(2), 413967c1d11SAnilkumar Kolli }, 414967c1d11SAnilkumar Kolli { 415967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BK), 416967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 417967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(3), 418967c1d11SAnilkumar Kolli }, 419967c1d11SAnilkumar Kolli { 420967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BK), 421967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 422967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(2), 423967c1d11SAnilkumar Kolli }, 424967c1d11SAnilkumar Kolli { 425967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BE), 426967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 427967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(3), 428967c1d11SAnilkumar Kolli }, 429967c1d11SAnilkumar Kolli { 430967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BE), 431967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 432967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(2), 433967c1d11SAnilkumar Kolli }, 434967c1d11SAnilkumar Kolli { 435967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VI), 436967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 437967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(3), 438967c1d11SAnilkumar Kolli }, 439967c1d11SAnilkumar Kolli { 440967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VI), 441967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 442967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(2), 443967c1d11SAnilkumar Kolli }, 444967c1d11SAnilkumar Kolli { 445967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL), 446967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 447967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(3), 448967c1d11SAnilkumar Kolli }, 449967c1d11SAnilkumar Kolli { 450967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL), 451967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 452967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(2), 453967c1d11SAnilkumar Kolli }, 454967c1d11SAnilkumar Kolli { 455967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL_MAC1), 456967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 457967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(7), 458967c1d11SAnilkumar Kolli }, 459967c1d11SAnilkumar Kolli { 460967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL_MAC1), 461967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 462967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(2), 463967c1d11SAnilkumar Kolli }, 464967c1d11SAnilkumar Kolli { 465967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL_MAC2), 466967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 467967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(9), 468967c1d11SAnilkumar Kolli }, 469967c1d11SAnilkumar Kolli { 470967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL_MAC2), 471967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 472967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(2), 473967c1d11SAnilkumar Kolli }, 474967c1d11SAnilkumar Kolli { 475967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_RSVD_CTRL), 476967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 477967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(0), 478967c1d11SAnilkumar Kolli }, 479967c1d11SAnilkumar Kolli { 480967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_RSVD_CTRL), 481967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 482967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(1), 483967c1d11SAnilkumar Kolli }, 484967c1d11SAnilkumar Kolli { /* not used */ 485967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_TEST_RAW_STREAMS), 486967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 487967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(0), 488967c1d11SAnilkumar Kolli }, 489967c1d11SAnilkumar Kolli { /* not used */ 490967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_TEST_RAW_STREAMS), 491967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 492967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(1), 493967c1d11SAnilkumar Kolli }, 494967c1d11SAnilkumar Kolli { 495967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_HTT_DATA_MSG), 496967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 497967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(4), 498967c1d11SAnilkumar Kolli }, 499967c1d11SAnilkumar Kolli { 500967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_HTT_DATA_MSG), 501967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 502967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(1), 503967c1d11SAnilkumar Kolli }, 504967c1d11SAnilkumar Kolli { 505967c1d11SAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_PKT_LOG), 506967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 507967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(5), 508967c1d11SAnilkumar Kolli }, 509967c1d11SAnilkumar Kolli 510967c1d11SAnilkumar Kolli /* (Additions here) */ 511967c1d11SAnilkumar Kolli 512967c1d11SAnilkumar Kolli { /* terminator entry */ } 513967c1d11SAnilkumar Kolli }; 514967c1d11SAnilkumar Kolli 515b129699aSAnilkumar Kolli const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[] = { 516b129699aSAnilkumar Kolli { 517b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VO), 518b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 519b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(3), 520b129699aSAnilkumar Kolli }, 521b129699aSAnilkumar Kolli { 522b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VO), 523b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 524b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(2), 525b129699aSAnilkumar Kolli }, 526b129699aSAnilkumar Kolli { 527b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BK), 528b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 529b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(3), 530b129699aSAnilkumar Kolli }, 531b129699aSAnilkumar Kolli { 532b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BK), 533b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 534b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(2), 535b129699aSAnilkumar Kolli }, 536b129699aSAnilkumar Kolli { 537b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BE), 538b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 539b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(3), 540b129699aSAnilkumar Kolli }, 541b129699aSAnilkumar Kolli { 542b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BE), 543b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 544b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(2), 545b129699aSAnilkumar Kolli }, 546b129699aSAnilkumar Kolli { 547b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VI), 548b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 549b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(3), 550b129699aSAnilkumar Kolli }, 551b129699aSAnilkumar Kolli { 552b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VI), 553b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 554b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(2), 555b129699aSAnilkumar Kolli }, 556b129699aSAnilkumar Kolli { 557b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL), 558b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 559b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(3), 560b129699aSAnilkumar Kolli }, 561b129699aSAnilkumar Kolli { 562b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL), 563b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 564b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(2), 565b129699aSAnilkumar Kolli }, 566b129699aSAnilkumar Kolli { 567b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL_MAC1), 568b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 569b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(7), 570b129699aSAnilkumar Kolli }, 571b129699aSAnilkumar Kolli { 572b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL_MAC1), 573b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 574b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(2), 575b129699aSAnilkumar Kolli }, 576b129699aSAnilkumar Kolli { 577b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_RSVD_CTRL), 578b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 579b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(0), 580b129699aSAnilkumar Kolli }, 581b129699aSAnilkumar Kolli { 582b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_RSVD_CTRL), 583b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 584b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(1), 585b129699aSAnilkumar Kolli }, 586b129699aSAnilkumar Kolli { /* not used */ 587b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_TEST_RAW_STREAMS), 588b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 589b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(0), 590b129699aSAnilkumar Kolli }, 591b129699aSAnilkumar Kolli { /* not used */ 592b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_TEST_RAW_STREAMS), 593b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 594b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(1), 595b129699aSAnilkumar Kolli }, 596b129699aSAnilkumar Kolli { 597b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_HTT_DATA_MSG), 598b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 599b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(4), 600b129699aSAnilkumar Kolli }, 601b129699aSAnilkumar Kolli { 602b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_HTT_DATA_MSG), 603b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 604b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(1), 605b129699aSAnilkumar Kolli }, 606b129699aSAnilkumar Kolli { 607b129699aSAnilkumar Kolli .service_id = __cpu_to_le32(ATH11K_HTC_SVC_ID_PKT_LOG), 608b129699aSAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 609b129699aSAnilkumar Kolli .pipenum = __cpu_to_le32(5), 610b129699aSAnilkumar Kolli }, 611b129699aSAnilkumar Kolli 612b129699aSAnilkumar Kolli /* (Additions here) */ 613b129699aSAnilkumar Kolli 614b129699aSAnilkumar Kolli { /* terminator entry */ } 615b129699aSAnilkumar Kolli }; 616b129699aSAnilkumar Kolli 617967c1d11SAnilkumar Kolli /* Target firmware's Copy Engine configuration. */ 618967c1d11SAnilkumar Kolli const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[] = { 619967c1d11SAnilkumar Kolli /* CE0: host->target HTC control and raw streams */ 620967c1d11SAnilkumar Kolli { 621967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(0), 622967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), 623967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 624967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(2048), 625967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 626967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 627967c1d11SAnilkumar Kolli }, 628967c1d11SAnilkumar Kolli 629967c1d11SAnilkumar Kolli /* CE1: target->host HTT + HTC control */ 630967c1d11SAnilkumar Kolli { 631967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(1), 632967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), 633967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 634967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(2048), 635967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 636967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 637967c1d11SAnilkumar Kolli }, 638967c1d11SAnilkumar Kolli 639967c1d11SAnilkumar Kolli /* CE2: target->host WMI */ 640967c1d11SAnilkumar Kolli { 641967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(2), 642967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), 643967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 644967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(2048), 645967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 646967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 647967c1d11SAnilkumar Kolli }, 648967c1d11SAnilkumar Kolli 649967c1d11SAnilkumar Kolli /* CE3: host->target WMI */ 650967c1d11SAnilkumar Kolli { 651967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(3), 652967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), 653967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 654967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(2048), 655967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 656967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 657967c1d11SAnilkumar Kolli }, 658967c1d11SAnilkumar Kolli 659967c1d11SAnilkumar Kolli /* CE4: host->target HTT */ 660967c1d11SAnilkumar Kolli { 661967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(4), 662967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_OUT), 663967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(256), 664967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(256), 665967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS | CE_ATTR_DIS_INTR), 666967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 667967c1d11SAnilkumar Kolli }, 668967c1d11SAnilkumar Kolli 669967c1d11SAnilkumar Kolli /* CE5: target->host Pktlog */ 670967c1d11SAnilkumar Kolli { 671967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(5), 672967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_IN), 673967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 674967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(2048), 675967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 676967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 677967c1d11SAnilkumar Kolli }, 678967c1d11SAnilkumar Kolli 679967c1d11SAnilkumar Kolli /* CE6: Reserved for target autonomous hif_memcpy */ 680967c1d11SAnilkumar Kolli { 681967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(6), 682967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_INOUT), 683967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 684967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(16384), 685967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 686967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 687967c1d11SAnilkumar Kolli }, 688967c1d11SAnilkumar Kolli 689967c1d11SAnilkumar Kolli /* CE7 used only by Host */ 690967c1d11SAnilkumar Kolli { 691967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(7), 692967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_INOUT_H2H), 693967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(0), 694967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(0), 695967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS | CE_ATTR_DIS_INTR), 696967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 697967c1d11SAnilkumar Kolli }, 698967c1d11SAnilkumar Kolli 699967c1d11SAnilkumar Kolli /* CE8 target->host used only by IPA */ 700967c1d11SAnilkumar Kolli { 701967c1d11SAnilkumar Kolli .pipenum = __cpu_to_le32(8), 702967c1d11SAnilkumar Kolli .pipedir = __cpu_to_le32(PIPEDIR_INOUT), 703967c1d11SAnilkumar Kolli .nentries = __cpu_to_le32(32), 704967c1d11SAnilkumar Kolli .nbytes_max = __cpu_to_le32(16384), 705967c1d11SAnilkumar Kolli .flags = __cpu_to_le32(CE_ATTR_FLAGS), 706967c1d11SAnilkumar Kolli .reserved = __cpu_to_le32(0), 707967c1d11SAnilkumar Kolli }, 708967c1d11SAnilkumar Kolli /* CE 9, 10, 11 are used by MHI driver */ 709967c1d11SAnilkumar Kolli }; 710967c1d11SAnilkumar Kolli 711967c1d11SAnilkumar Kolli /* Map from service/endpoint to Copy Engine. 712967c1d11SAnilkumar Kolli * This table is derived from the CE_PCI TABLE, above. 713967c1d11SAnilkumar Kolli * It is passed to the Target at startup for use by firmware. 714967c1d11SAnilkumar Kolli */ 715967c1d11SAnilkumar Kolli const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[] = { 716967c1d11SAnilkumar Kolli { 717967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VO), 718967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 719967c1d11SAnilkumar Kolli __cpu_to_le32(3), 720967c1d11SAnilkumar Kolli }, 721967c1d11SAnilkumar Kolli { 722967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VO), 723967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 724967c1d11SAnilkumar Kolli __cpu_to_le32(2), 725967c1d11SAnilkumar Kolli }, 726967c1d11SAnilkumar Kolli { 727967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BK), 728967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 729967c1d11SAnilkumar Kolli __cpu_to_le32(3), 730967c1d11SAnilkumar Kolli }, 731967c1d11SAnilkumar Kolli { 732967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BK), 733967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 734967c1d11SAnilkumar Kolli __cpu_to_le32(2), 735967c1d11SAnilkumar Kolli }, 736967c1d11SAnilkumar Kolli { 737967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BE), 738967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 739967c1d11SAnilkumar Kolli __cpu_to_le32(3), 740967c1d11SAnilkumar Kolli }, 741967c1d11SAnilkumar Kolli { 742967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_BE), 743967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 744967c1d11SAnilkumar Kolli __cpu_to_le32(2), 745967c1d11SAnilkumar Kolli }, 746967c1d11SAnilkumar Kolli { 747967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VI), 748967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 749967c1d11SAnilkumar Kolli __cpu_to_le32(3), 750967c1d11SAnilkumar Kolli }, 751967c1d11SAnilkumar Kolli { 752967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_DATA_VI), 753967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 754967c1d11SAnilkumar Kolli __cpu_to_le32(2), 755967c1d11SAnilkumar Kolli }, 756967c1d11SAnilkumar Kolli { 757967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL), 758967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 759967c1d11SAnilkumar Kolli __cpu_to_le32(3), 760967c1d11SAnilkumar Kolli }, 761967c1d11SAnilkumar Kolli { 762967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_WMI_CONTROL), 763967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 764967c1d11SAnilkumar Kolli __cpu_to_le32(2), 765967c1d11SAnilkumar Kolli }, 766967c1d11SAnilkumar Kolli { 767967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_RSVD_CTRL), 768967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 769967c1d11SAnilkumar Kolli __cpu_to_le32(0), 770967c1d11SAnilkumar Kolli }, 771967c1d11SAnilkumar Kolli { 772967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_RSVD_CTRL), 773967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 774967c1d11SAnilkumar Kolli __cpu_to_le32(2), 775967c1d11SAnilkumar Kolli }, 776967c1d11SAnilkumar Kolli { 777967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_HTT_DATA_MSG), 778967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_OUT), /* out = UL = host -> target */ 779967c1d11SAnilkumar Kolli __cpu_to_le32(4), 780967c1d11SAnilkumar Kolli }, 781967c1d11SAnilkumar Kolli { 782967c1d11SAnilkumar Kolli __cpu_to_le32(ATH11K_HTC_SVC_ID_HTT_DATA_MSG), 783967c1d11SAnilkumar Kolli __cpu_to_le32(PIPEDIR_IN), /* in = DL = target -> host */ 784967c1d11SAnilkumar Kolli __cpu_to_le32(1), 785967c1d11SAnilkumar Kolli }, 786967c1d11SAnilkumar Kolli 787967c1d11SAnilkumar Kolli /* (Additions here) */ 788967c1d11SAnilkumar Kolli 789967c1d11SAnilkumar Kolli { /* must be last */ 790967c1d11SAnilkumar Kolli __cpu_to_le32(0), 791967c1d11SAnilkumar Kolli __cpu_to_le32(0), 792967c1d11SAnilkumar Kolli __cpu_to_le32(0), 793967c1d11SAnilkumar Kolli }, 794967c1d11SAnilkumar Kolli }; 795967c1d11SAnilkumar Kolli 7966976433cSCarl Huang const struct ath11k_hw_regs ipq8074_regs = { 7976976433cSCarl Huang /* SW2TCL(x) R0 ring configuration address */ 7986976433cSCarl Huang .hal_tcl1_ring_base_lsb = 0x00000510, 7996976433cSCarl Huang .hal_tcl1_ring_base_msb = 0x00000514, 8006976433cSCarl Huang .hal_tcl1_ring_id = 0x00000518, 8016976433cSCarl Huang .hal_tcl1_ring_misc = 0x00000520, 8026976433cSCarl Huang .hal_tcl1_ring_tp_addr_lsb = 0x0000052c, 8036976433cSCarl Huang .hal_tcl1_ring_tp_addr_msb = 0x00000530, 8046976433cSCarl Huang .hal_tcl1_ring_consumer_int_setup_ix0 = 0x00000540, 8056976433cSCarl Huang .hal_tcl1_ring_consumer_int_setup_ix1 = 0x00000544, 8066976433cSCarl Huang .hal_tcl1_ring_msi1_base_lsb = 0x00000558, 8076976433cSCarl Huang .hal_tcl1_ring_msi1_base_msb = 0x0000055c, 8086976433cSCarl Huang .hal_tcl1_ring_msi1_data = 0x00000560, 8096976433cSCarl Huang .hal_tcl2_ring_base_lsb = 0x00000568, 8106976433cSCarl Huang .hal_tcl_ring_base_lsb = 0x00000618, 8116976433cSCarl Huang 8126976433cSCarl Huang /* TCL STATUS ring address */ 8136976433cSCarl Huang .hal_tcl_status_ring_base_lsb = 0x00000720, 8146976433cSCarl Huang 8156976433cSCarl Huang /* REO2SW(x) R0 ring configuration address */ 8166976433cSCarl Huang .hal_reo1_ring_base_lsb = 0x0000029c, 8176976433cSCarl Huang .hal_reo1_ring_base_msb = 0x000002a0, 8186976433cSCarl Huang .hal_reo1_ring_id = 0x000002a4, 8196976433cSCarl Huang .hal_reo1_ring_misc = 0x000002ac, 8206976433cSCarl Huang .hal_reo1_ring_hp_addr_lsb = 0x000002b0, 8216976433cSCarl Huang .hal_reo1_ring_hp_addr_msb = 0x000002b4, 8226976433cSCarl Huang .hal_reo1_ring_producer_int_setup = 0x000002c0, 8236976433cSCarl Huang .hal_reo1_ring_msi1_base_lsb = 0x000002e4, 8246976433cSCarl Huang .hal_reo1_ring_msi1_base_msb = 0x000002e8, 8256976433cSCarl Huang .hal_reo1_ring_msi1_data = 0x000002ec, 8266976433cSCarl Huang .hal_reo2_ring_base_lsb = 0x000002f4, 8276976433cSCarl Huang .hal_reo1_aging_thresh_ix_0 = 0x00000564, 8286976433cSCarl Huang .hal_reo1_aging_thresh_ix_1 = 0x00000568, 8296976433cSCarl Huang .hal_reo1_aging_thresh_ix_2 = 0x0000056c, 8306976433cSCarl Huang .hal_reo1_aging_thresh_ix_3 = 0x00000570, 8316976433cSCarl Huang 8326976433cSCarl Huang /* REO2SW(x) R2 ring pointers (head/tail) address */ 8336976433cSCarl Huang .hal_reo1_ring_hp = 0x00003038, 8346976433cSCarl Huang .hal_reo1_ring_tp = 0x0000303c, 8356976433cSCarl Huang .hal_reo2_ring_hp = 0x00003040, 8366976433cSCarl Huang 8376976433cSCarl Huang /* REO2TCL R0 ring configuration address */ 8386976433cSCarl Huang .hal_reo_tcl_ring_base_lsb = 0x000003fc, 8396976433cSCarl Huang .hal_reo_tcl_ring_hp = 0x00003058, 8406976433cSCarl Huang 8416976433cSCarl Huang /* REO status address */ 8426976433cSCarl Huang .hal_reo_status_ring_base_lsb = 0x00000504, 8436976433cSCarl Huang .hal_reo_status_hp = 0x00003070, 8446976433cSCarl Huang 8456976433cSCarl Huang }; 8466976433cSCarl Huang 8476976433cSCarl Huang const struct ath11k_hw_regs qca6390_regs = { 8486976433cSCarl Huang /* SW2TCL(x) R0 ring configuration address */ 8496976433cSCarl Huang .hal_tcl1_ring_base_lsb = 0x00000684, 8506976433cSCarl Huang .hal_tcl1_ring_base_msb = 0x00000688, 8516976433cSCarl Huang .hal_tcl1_ring_id = 0x0000068c, 8526976433cSCarl Huang .hal_tcl1_ring_misc = 0x00000694, 8536976433cSCarl Huang .hal_tcl1_ring_tp_addr_lsb = 0x000006a0, 8546976433cSCarl Huang .hal_tcl1_ring_tp_addr_msb = 0x000006a4, 8556976433cSCarl Huang .hal_tcl1_ring_consumer_int_setup_ix0 = 0x000006b4, 8566976433cSCarl Huang .hal_tcl1_ring_consumer_int_setup_ix1 = 0x000006b8, 8576976433cSCarl Huang .hal_tcl1_ring_msi1_base_lsb = 0x000006cc, 8586976433cSCarl Huang .hal_tcl1_ring_msi1_base_msb = 0x000006d0, 8596976433cSCarl Huang .hal_tcl1_ring_msi1_data = 0x000006d4, 8606976433cSCarl Huang .hal_tcl2_ring_base_lsb = 0x000006dc, 8616976433cSCarl Huang .hal_tcl_ring_base_lsb = 0x0000078c, 8626976433cSCarl Huang 8636976433cSCarl Huang /* TCL STATUS ring address */ 8646976433cSCarl Huang .hal_tcl_status_ring_base_lsb = 0x00000894, 8656976433cSCarl Huang 8666976433cSCarl Huang /* REO2SW(x) R0 ring configuration address */ 8676976433cSCarl Huang .hal_reo1_ring_base_lsb = 0x00000244, 8686976433cSCarl Huang .hal_reo1_ring_base_msb = 0x00000248, 8696976433cSCarl Huang .hal_reo1_ring_id = 0x0000024c, 8706976433cSCarl Huang .hal_reo1_ring_misc = 0x00000254, 8716976433cSCarl Huang .hal_reo1_ring_hp_addr_lsb = 0x00000258, 8726976433cSCarl Huang .hal_reo1_ring_hp_addr_msb = 0x0000025c, 8736976433cSCarl Huang .hal_reo1_ring_producer_int_setup = 0x00000268, 8746976433cSCarl Huang .hal_reo1_ring_msi1_base_lsb = 0x0000028c, 8756976433cSCarl Huang .hal_reo1_ring_msi1_base_msb = 0x00000290, 8766976433cSCarl Huang .hal_reo1_ring_msi1_data = 0x00000294, 8776976433cSCarl Huang .hal_reo2_ring_base_lsb = 0x0000029c, 8786976433cSCarl Huang .hal_reo1_aging_thresh_ix_0 = 0x0000050c, 8796976433cSCarl Huang .hal_reo1_aging_thresh_ix_1 = 0x00000510, 8806976433cSCarl Huang .hal_reo1_aging_thresh_ix_2 = 0x00000514, 8816976433cSCarl Huang .hal_reo1_aging_thresh_ix_3 = 0x00000518, 8826976433cSCarl Huang 8836976433cSCarl Huang /* REO2SW(x) R2 ring pointers (head/tail) address */ 8846976433cSCarl Huang .hal_reo1_ring_hp = 0x00003030, 8856976433cSCarl Huang .hal_reo1_ring_tp = 0x00003034, 8866976433cSCarl Huang .hal_reo2_ring_hp = 0x00003038, 8876976433cSCarl Huang 8886976433cSCarl Huang /* REO2TCL R0 ring configuration address */ 8896976433cSCarl Huang .hal_reo_tcl_ring_base_lsb = 0x000003a4, 8906976433cSCarl Huang .hal_reo_tcl_ring_hp = 0x00003050, 8916976433cSCarl Huang 8926976433cSCarl Huang /* REO status address */ 8936976433cSCarl Huang .hal_reo_status_ring_base_lsb = 0x000004ac, 8946976433cSCarl Huang .hal_reo_status_hp = 0x00003068, 8956976433cSCarl Huang }; 896