1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #include "core.h" 7 #include "dp_tx.h" 8 #include "debug.h" 9 #include "hw.h" 10 #include "peer.h" 11 12 static enum hal_tcl_encap_type 13 ath11k_dp_tx_get_encap_type(struct ath11k_vif *arvif, struct sk_buff *skb) 14 { 15 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 16 17 if (tx_info->control.flags & IEEE80211_TX_CTRL_HW_80211_ENCAP) 18 return HAL_TCL_ENCAP_TYPE_ETHERNET; 19 20 return HAL_TCL_ENCAP_TYPE_NATIVE_WIFI; 21 } 22 23 static void ath11k_dp_tx_encap_nwifi(struct sk_buff *skb) 24 { 25 struct ieee80211_hdr *hdr = (void *)skb->data; 26 u8 *qos_ctl; 27 28 if (!ieee80211_is_data_qos(hdr->frame_control)) 29 return; 30 31 qos_ctl = ieee80211_get_qos_ctl(hdr); 32 memmove(skb->data + IEEE80211_QOS_CTL_LEN, 33 skb->data, (void *)qos_ctl - (void *)skb->data); 34 skb_pull(skb, IEEE80211_QOS_CTL_LEN); 35 36 hdr = (void *)skb->data; 37 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_STYPE_QOS_DATA); 38 } 39 40 static u8 ath11k_dp_tx_get_tid(struct sk_buff *skb) 41 { 42 struct ieee80211_hdr *hdr = (void *)skb->data; 43 struct ath11k_skb_cb *cb = ATH11K_SKB_CB(skb); 44 45 if (cb->flags & ATH11K_SKB_HW_80211_ENCAP) 46 return skb->priority & IEEE80211_QOS_CTL_TID_MASK; 47 else if (!ieee80211_is_data_qos(hdr->frame_control)) 48 return HAL_DESC_REO_NON_QOS_TID; 49 else 50 return skb->priority & IEEE80211_QOS_CTL_TID_MASK; 51 } 52 53 enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher) 54 { 55 switch (cipher) { 56 case WLAN_CIPHER_SUITE_WEP40: 57 return HAL_ENCRYPT_TYPE_WEP_40; 58 case WLAN_CIPHER_SUITE_WEP104: 59 return HAL_ENCRYPT_TYPE_WEP_104; 60 case WLAN_CIPHER_SUITE_TKIP: 61 return HAL_ENCRYPT_TYPE_TKIP_MIC; 62 case WLAN_CIPHER_SUITE_CCMP: 63 return HAL_ENCRYPT_TYPE_CCMP_128; 64 case WLAN_CIPHER_SUITE_CCMP_256: 65 return HAL_ENCRYPT_TYPE_CCMP_256; 66 case WLAN_CIPHER_SUITE_GCMP: 67 return HAL_ENCRYPT_TYPE_GCMP_128; 68 case WLAN_CIPHER_SUITE_GCMP_256: 69 return HAL_ENCRYPT_TYPE_AES_GCMP_256; 70 default: 71 return HAL_ENCRYPT_TYPE_OPEN; 72 } 73 } 74 75 int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif, 76 struct sk_buff *skb) 77 { 78 struct ath11k_base *ab = ar->ab; 79 struct ath11k_dp *dp = &ab->dp; 80 struct hal_tx_info ti = {0}; 81 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 82 struct ath11k_skb_cb *skb_cb = ATH11K_SKB_CB(skb); 83 struct hal_srng *tcl_ring; 84 struct ieee80211_hdr *hdr = (void *)skb->data; 85 struct dp_tx_ring *tx_ring; 86 void *hal_tcl_desc; 87 u8 pool_id; 88 u8 hal_ring_id; 89 int ret; 90 u8 ring_selector = 0, ring_map = 0; 91 bool tcl_ring_retry; 92 93 if (test_bit(ATH11K_FLAG_CRASH_FLUSH, &ar->ab->dev_flags)) 94 return -ESHUTDOWN; 95 96 if (!(info->control.flags & IEEE80211_TX_CTRL_HW_80211_ENCAP) && 97 !ieee80211_is_data(hdr->frame_control)) 98 return -ENOTSUPP; 99 100 pool_id = skb_get_queue_mapping(skb) & (ATH11K_HW_MAX_QUEUES - 1); 101 102 /* Let the default ring selection be based on a round robin 103 * fashion where one of the 3 tcl rings are selected based on 104 * the tcl_ring_selector counter. In case that ring 105 * is full/busy, we resort to other available rings. 106 * If all rings are full, we drop the packet. 107 * //TODO Add throttling logic when all rings are full 108 */ 109 ring_selector = atomic_inc_return(&ab->tcl_ring_selector); 110 111 tcl_ring_sel: 112 tcl_ring_retry = false; 113 ti.ring_id = ring_selector % DP_TCL_NUM_RING_MAX; 114 ring_map |= BIT(ti.ring_id); 115 116 tx_ring = &dp->tx_ring[ti.ring_id]; 117 118 spin_lock_bh(&tx_ring->tx_idr_lock); 119 ret = idr_alloc(&tx_ring->txbuf_idr, skb, 0, 120 DP_TX_IDR_SIZE - 1, GFP_ATOMIC); 121 spin_unlock_bh(&tx_ring->tx_idr_lock); 122 123 if (ret < 0) { 124 if (ring_map == (BIT(DP_TCL_NUM_RING_MAX) - 1)) 125 return -ENOSPC; 126 127 /* Check if the next ring is available */ 128 ring_selector++; 129 goto tcl_ring_sel; 130 } 131 132 ti.desc_id = FIELD_PREP(DP_TX_DESC_ID_MAC_ID, ar->pdev_idx) | 133 FIELD_PREP(DP_TX_DESC_ID_MSDU_ID, ret) | 134 FIELD_PREP(DP_TX_DESC_ID_POOL_ID, pool_id); 135 ti.encap_type = ath11k_dp_tx_get_encap_type(arvif, skb); 136 ti.meta_data_flags = arvif->tcl_metadata; 137 138 if (info->control.hw_key) 139 ti.encrypt_type = 140 ath11k_dp_tx_get_encrypt_type(info->control.hw_key->cipher); 141 else 142 ti.encrypt_type = HAL_ENCRYPT_TYPE_OPEN; 143 144 ti.addr_search_flags = arvif->hal_addr_search_flags; 145 ti.search_type = arvif->search_type; 146 ti.type = HAL_TCL_DESC_TYPE_BUFFER; 147 ti.pkt_offset = 0; 148 ti.lmac_id = ar->lmac_id; 149 ti.bss_ast_hash = arvif->ast_hash; 150 ti.dscp_tid_tbl_idx = 0; 151 152 if (skb->ip_summed == CHECKSUM_PARTIAL) { 153 ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_IP4_CKSUM_EN, 1) | 154 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP4_CKSUM_EN, 1) | 155 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP6_CKSUM_EN, 1) | 156 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP4_CKSUM_EN, 1) | 157 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP6_CKSUM_EN, 1); 158 } 159 160 if (ieee80211_vif_is_mesh(arvif->vif)) 161 ti.flags1 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_MESH_ENABLE, 1); 162 163 ti.flags1 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_TID_OVERWRITE, 1); 164 165 ti.tid = ath11k_dp_tx_get_tid(skb); 166 167 switch (ti.encap_type) { 168 case HAL_TCL_ENCAP_TYPE_NATIVE_WIFI: 169 ath11k_dp_tx_encap_nwifi(skb); 170 break; 171 case HAL_TCL_ENCAP_TYPE_RAW: 172 /* TODO: for CHECKSUM_PARTIAL case in raw mode, HW checksum offload 173 * is not applicable, hence manual checksum calculation using 174 * skb_checksum_help() is needed 175 */ 176 case HAL_TCL_ENCAP_TYPE_ETHERNET: 177 /* no need to encap */ 178 break; 179 case HAL_TCL_ENCAP_TYPE_802_3: 180 default: 181 /* TODO: Take care of other encap modes as well */ 182 ret = -EINVAL; 183 goto fail_remove_idr; 184 } 185 186 ti.paddr = dma_map_single(ab->dev, skb->data, skb->len, DMA_TO_DEVICE); 187 if (dma_mapping_error(ab->dev, ti.paddr)) { 188 ath11k_warn(ab, "failed to DMA map data Tx buffer\n"); 189 ret = -ENOMEM; 190 goto fail_remove_idr; 191 } 192 193 ti.data_len = skb->len; 194 skb_cb->paddr = ti.paddr; 195 skb_cb->vif = arvif->vif; 196 skb_cb->ar = ar; 197 198 hal_ring_id = tx_ring->tcl_data_ring.ring_id; 199 tcl_ring = &ab->hal.srng_list[hal_ring_id]; 200 201 spin_lock_bh(&tcl_ring->lock); 202 203 ath11k_hal_srng_access_begin(ab, tcl_ring); 204 205 hal_tcl_desc = (void *)ath11k_hal_srng_src_get_next_entry(ab, tcl_ring); 206 if (!hal_tcl_desc) { 207 /* NOTE: It is highly unlikely we'll be running out of tcl_ring 208 * desc because the desc is directly enqueued onto hw queue. 209 */ 210 ath11k_hal_srng_access_end(ab, tcl_ring); 211 spin_unlock_bh(&tcl_ring->lock); 212 ret = -ENOMEM; 213 214 /* Checking for available tcl descritors in another ring in 215 * case of failure due to full tcl ring now, is better than 216 * checking this ring earlier for each pkt tx. 217 * Restart ring selection if some rings are not checked yet. 218 */ 219 if (ring_map != (BIT(DP_TCL_NUM_RING_MAX) - 1)) { 220 tcl_ring_retry = true; 221 ring_selector++; 222 } 223 224 goto fail_unmap_dma; 225 } 226 227 ath11k_hal_tx_cmd_desc_setup(ab, hal_tcl_desc + 228 sizeof(struct hal_tlv_hdr), &ti); 229 230 ath11k_hal_srng_access_end(ab, tcl_ring); 231 232 spin_unlock_bh(&tcl_ring->lock); 233 234 atomic_inc(&ar->dp.num_tx_pending); 235 236 return 0; 237 238 fail_unmap_dma: 239 dma_unmap_single(ab->dev, ti.paddr, ti.data_len, DMA_TO_DEVICE); 240 241 fail_remove_idr: 242 spin_lock_bh(&tx_ring->tx_idr_lock); 243 idr_remove(&tx_ring->txbuf_idr, 244 FIELD_GET(DP_TX_DESC_ID_MSDU_ID, ti.desc_id)); 245 spin_unlock_bh(&tx_ring->tx_idr_lock); 246 247 if (tcl_ring_retry) 248 goto tcl_ring_sel; 249 250 return ret; 251 } 252 253 static void ath11k_dp_tx_free_txbuf(struct ath11k_base *ab, u8 mac_id, 254 int msdu_id, 255 struct dp_tx_ring *tx_ring) 256 { 257 struct ath11k *ar; 258 struct sk_buff *msdu; 259 struct ath11k_skb_cb *skb_cb; 260 261 spin_lock_bh(&tx_ring->tx_idr_lock); 262 msdu = idr_find(&tx_ring->txbuf_idr, msdu_id); 263 if (!msdu) { 264 ath11k_warn(ab, "tx completion for unknown msdu_id %d\n", 265 msdu_id); 266 spin_unlock_bh(&tx_ring->tx_idr_lock); 267 return; 268 } 269 270 skb_cb = ATH11K_SKB_CB(msdu); 271 272 idr_remove(&tx_ring->txbuf_idr, msdu_id); 273 spin_unlock_bh(&tx_ring->tx_idr_lock); 274 275 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 276 dev_kfree_skb_any(msdu); 277 278 ar = ab->pdevs[mac_id].ar; 279 if (atomic_dec_and_test(&ar->dp.num_tx_pending)) 280 wake_up(&ar->dp.tx_empty_waitq); 281 } 282 283 static void 284 ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab, 285 struct dp_tx_ring *tx_ring, 286 struct ath11k_dp_htt_wbm_tx_status *ts) 287 { 288 struct sk_buff *msdu; 289 struct ieee80211_tx_info *info; 290 struct ath11k_skb_cb *skb_cb; 291 struct ath11k *ar; 292 293 spin_lock_bh(&tx_ring->tx_idr_lock); 294 msdu = idr_find(&tx_ring->txbuf_idr, ts->msdu_id); 295 if (!msdu) { 296 ath11k_warn(ab, "htt tx completion for unknown msdu_id %d\n", 297 ts->msdu_id); 298 spin_unlock_bh(&tx_ring->tx_idr_lock); 299 return; 300 } 301 302 skb_cb = ATH11K_SKB_CB(msdu); 303 info = IEEE80211_SKB_CB(msdu); 304 305 ar = skb_cb->ar; 306 307 idr_remove(&tx_ring->txbuf_idr, ts->msdu_id); 308 spin_unlock_bh(&tx_ring->tx_idr_lock); 309 310 if (atomic_dec_and_test(&ar->dp.num_tx_pending)) 311 wake_up(&ar->dp.tx_empty_waitq); 312 313 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 314 315 memset(&info->status, 0, sizeof(info->status)); 316 317 if (ts->acked) { 318 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) { 319 info->flags |= IEEE80211_TX_STAT_ACK; 320 info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR + 321 ts->ack_rssi; 322 info->status.is_valid_ack_signal = true; 323 } else { 324 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; 325 } 326 } 327 328 ieee80211_tx_status(ar->hw, msdu); 329 } 330 331 static void 332 ath11k_dp_tx_process_htt_tx_complete(struct ath11k_base *ab, 333 void *desc, u8 mac_id, 334 u32 msdu_id, struct dp_tx_ring *tx_ring) 335 { 336 struct htt_tx_wbm_completion *status_desc; 337 struct ath11k_dp_htt_wbm_tx_status ts = {0}; 338 enum hal_wbm_htt_tx_comp_status wbm_status; 339 340 status_desc = desc + HTT_TX_WBM_COMP_STATUS_OFFSET; 341 342 wbm_status = FIELD_GET(HTT_TX_WBM_COMP_INFO0_STATUS, 343 status_desc->info0); 344 345 switch (wbm_status) { 346 case HAL_WBM_REL_HTT_TX_COMP_STATUS_OK: 347 case HAL_WBM_REL_HTT_TX_COMP_STATUS_DROP: 348 case HAL_WBM_REL_HTT_TX_COMP_STATUS_TTL: 349 ts.acked = (wbm_status == HAL_WBM_REL_HTT_TX_COMP_STATUS_OK); 350 ts.msdu_id = msdu_id; 351 ts.ack_rssi = FIELD_GET(HTT_TX_WBM_COMP_INFO1_ACK_RSSI, 352 status_desc->info1); 353 ath11k_dp_tx_htt_tx_complete_buf(ab, tx_ring, &ts); 354 break; 355 case HAL_WBM_REL_HTT_TX_COMP_STATUS_REINJ: 356 case HAL_WBM_REL_HTT_TX_COMP_STATUS_INSPECT: 357 ath11k_dp_tx_free_txbuf(ab, mac_id, msdu_id, tx_ring); 358 break; 359 case HAL_WBM_REL_HTT_TX_COMP_STATUS_MEC_NOTIFY: 360 /* This event is to be handled only when the driver decides to 361 * use WDS offload functionality. 362 */ 363 break; 364 default: 365 ath11k_warn(ab, "Unknown htt tx status %d\n", wbm_status); 366 break; 367 } 368 } 369 370 static void ath11k_dp_tx_cache_peer_stats(struct ath11k *ar, 371 struct sk_buff *msdu, 372 struct hal_tx_status *ts) 373 { 374 struct ath11k_per_peer_tx_stats *peer_stats = &ar->cached_stats; 375 376 if (ts->try_cnt > 1) { 377 peer_stats->retry_pkts += ts->try_cnt - 1; 378 peer_stats->retry_bytes += (ts->try_cnt - 1) * msdu->len; 379 380 if (ts->status != HAL_WBM_TQM_REL_REASON_FRAME_ACKED) { 381 peer_stats->failed_pkts += 1; 382 peer_stats->failed_bytes += msdu->len; 383 } 384 } 385 } 386 387 static void ath11k_dp_tx_complete_msdu(struct ath11k *ar, 388 struct sk_buff *msdu, 389 struct hal_tx_status *ts) 390 { 391 struct ath11k_base *ab = ar->ab; 392 struct ieee80211_tx_info *info; 393 struct ath11k_skb_cb *skb_cb; 394 395 if (WARN_ON_ONCE(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)) { 396 /* Must not happen */ 397 return; 398 } 399 400 skb_cb = ATH11K_SKB_CB(msdu); 401 402 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 403 404 rcu_read_lock(); 405 406 if (!rcu_dereference(ab->pdevs_active[ar->pdev_idx])) { 407 dev_kfree_skb_any(msdu); 408 goto exit; 409 } 410 411 if (!skb_cb->vif) { 412 dev_kfree_skb_any(msdu); 413 goto exit; 414 } 415 416 info = IEEE80211_SKB_CB(msdu); 417 memset(&info->status, 0, sizeof(info->status)); 418 419 /* skip tx rate update from ieee80211_status*/ 420 info->status.rates[0].idx = -1; 421 422 if (ts->status == HAL_WBM_TQM_REL_REASON_FRAME_ACKED && 423 !(info->flags & IEEE80211_TX_CTL_NO_ACK)) { 424 info->flags |= IEEE80211_TX_STAT_ACK; 425 info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR + 426 ts->ack_rssi; 427 info->status.is_valid_ack_signal = true; 428 } 429 430 if (ts->status == HAL_WBM_TQM_REL_REASON_CMD_REMOVE_TX && 431 (info->flags & IEEE80211_TX_CTL_NO_ACK)) 432 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; 433 434 if (ath11k_debug_is_extd_tx_stats_enabled(ar)) { 435 if (ts->flags & HAL_TX_STATUS_FLAGS_FIRST_MSDU) { 436 if (ar->last_ppdu_id == 0) { 437 ar->last_ppdu_id = ts->ppdu_id; 438 } else if (ar->last_ppdu_id == ts->ppdu_id || 439 ar->cached_ppdu_id == ar->last_ppdu_id) { 440 ar->cached_ppdu_id = ar->last_ppdu_id; 441 ar->cached_stats.is_ampdu = true; 442 ath11k_update_per_peer_stats_from_txcompl(ar, msdu, ts); 443 memset(&ar->cached_stats, 0, 444 sizeof(struct ath11k_per_peer_tx_stats)); 445 } else { 446 ar->cached_stats.is_ampdu = false; 447 ath11k_update_per_peer_stats_from_txcompl(ar, msdu, ts); 448 memset(&ar->cached_stats, 0, 449 sizeof(struct ath11k_per_peer_tx_stats)); 450 } 451 ar->last_ppdu_id = ts->ppdu_id; 452 } 453 454 ath11k_dp_tx_cache_peer_stats(ar, msdu, ts); 455 } 456 457 /* NOTE: Tx rate status reporting. Tx completion status does not have 458 * necessary information (for example nss) to build the tx rate. 459 * Might end up reporting it out-of-band from HTT stats. 460 */ 461 462 ieee80211_tx_status(ar->hw, msdu); 463 464 exit: 465 rcu_read_unlock(); 466 } 467 468 static inline void ath11k_dp_tx_status_parse(struct ath11k_base *ab, 469 struct hal_wbm_release_ring *desc, 470 struct hal_tx_status *ts) 471 { 472 ts->buf_rel_source = 473 FIELD_GET(HAL_WBM_RELEASE_INFO0_REL_SRC_MODULE, desc->info0); 474 if (ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_FW && 475 ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM) 476 return; 477 478 if (ts->buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW) 479 return; 480 481 ts->status = FIELD_GET(HAL_WBM_RELEASE_INFO0_TQM_RELEASE_REASON, 482 desc->info0); 483 ts->ppdu_id = FIELD_GET(HAL_WBM_RELEASE_INFO1_TQM_STATUS_NUMBER, 484 desc->info1); 485 ts->try_cnt = FIELD_GET(HAL_WBM_RELEASE_INFO1_TRANSMIT_COUNT, 486 desc->info1); 487 ts->ack_rssi = FIELD_GET(HAL_WBM_RELEASE_INFO2_ACK_FRAME_RSSI, 488 desc->info2); 489 if (desc->info2 & HAL_WBM_RELEASE_INFO2_FIRST_MSDU) 490 ts->flags |= HAL_TX_STATUS_FLAGS_FIRST_MSDU; 491 ts->peer_id = FIELD_GET(HAL_WBM_RELEASE_INFO3_PEER_ID, desc->info3); 492 ts->tid = FIELD_GET(HAL_WBM_RELEASE_INFO3_TID, desc->info3); 493 if (desc->rate_stats.info0 & HAL_TX_RATE_STATS_INFO0_VALID) 494 ts->rate_stats = desc->rate_stats.info0; 495 else 496 ts->rate_stats = 0; 497 } 498 499 void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id) 500 { 501 struct ath11k *ar; 502 struct ath11k_dp *dp = &ab->dp; 503 int hal_ring_id = dp->tx_ring[ring_id].tcl_comp_ring.ring_id; 504 struct hal_srng *status_ring = &ab->hal.srng_list[hal_ring_id]; 505 struct sk_buff *msdu; 506 struct hal_tx_status ts = { 0 }; 507 struct dp_tx_ring *tx_ring = &dp->tx_ring[ring_id]; 508 u32 *desc; 509 u32 msdu_id; 510 u8 mac_id; 511 512 ath11k_hal_srng_access_begin(ab, status_ring); 513 514 while ((ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) != 515 tx_ring->tx_status_tail) && 516 (desc = ath11k_hal_srng_dst_get_next_entry(ab, status_ring))) { 517 memcpy(&tx_ring->tx_status[tx_ring->tx_status_head], 518 desc, sizeof(struct hal_wbm_release_ring)); 519 tx_ring->tx_status_head = 520 ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head); 521 } 522 523 if ((ath11k_hal_srng_dst_peek(ab, status_ring) != NULL) && 524 (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) == tx_ring->tx_status_tail)) { 525 /* TODO: Process pending tx_status messages when kfifo_is_full() */ 526 ath11k_warn(ab, "Unable to process some of the tx_status ring desc because status_fifo is full\n"); 527 } 528 529 ath11k_hal_srng_access_end(ab, status_ring); 530 531 while (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail) != tx_ring->tx_status_head) { 532 struct hal_wbm_release_ring *tx_status; 533 u32 desc_id; 534 535 tx_ring->tx_status_tail = 536 ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail); 537 tx_status = &tx_ring->tx_status[tx_ring->tx_status_tail]; 538 ath11k_dp_tx_status_parse(ab, tx_status, &ts); 539 540 desc_id = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE, 541 tx_status->buf_addr_info.info1); 542 mac_id = FIELD_GET(DP_TX_DESC_ID_MAC_ID, desc_id); 543 msdu_id = FIELD_GET(DP_TX_DESC_ID_MSDU_ID, desc_id); 544 545 if (ts.buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW) { 546 ath11k_dp_tx_process_htt_tx_complete(ab, 547 (void *)tx_status, 548 mac_id, msdu_id, 549 tx_ring); 550 continue; 551 } 552 553 spin_lock_bh(&tx_ring->tx_idr_lock); 554 msdu = idr_find(&tx_ring->txbuf_idr, msdu_id); 555 if (!msdu) { 556 ath11k_warn(ab, "tx completion for unknown msdu_id %d\n", 557 msdu_id); 558 spin_unlock_bh(&tx_ring->tx_idr_lock); 559 continue; 560 } 561 idr_remove(&tx_ring->txbuf_idr, msdu_id); 562 spin_unlock_bh(&tx_ring->tx_idr_lock); 563 564 ar = ab->pdevs[mac_id].ar; 565 566 if (atomic_dec_and_test(&ar->dp.num_tx_pending)) 567 wake_up(&ar->dp.tx_empty_waitq); 568 569 ath11k_dp_tx_complete_msdu(ar, msdu, &ts); 570 } 571 } 572 573 int ath11k_dp_tx_send_reo_cmd(struct ath11k_base *ab, struct dp_rx_tid *rx_tid, 574 enum hal_reo_cmd_type type, 575 struct ath11k_hal_reo_cmd *cmd, 576 void (*cb)(struct ath11k_dp *, void *, 577 enum hal_reo_cmd_status)) 578 { 579 struct ath11k_dp *dp = &ab->dp; 580 struct dp_reo_cmd *dp_cmd; 581 struct hal_srng *cmd_ring; 582 int cmd_num; 583 584 cmd_ring = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id]; 585 cmd_num = ath11k_hal_reo_cmd_send(ab, cmd_ring, type, cmd); 586 587 /* cmd_num should start from 1, during failure return the error code */ 588 if (cmd_num < 0) 589 return cmd_num; 590 591 /* reo cmd ring descriptors has cmd_num starting from 1 */ 592 if (cmd_num == 0) 593 return -EINVAL; 594 595 if (!cb) 596 return 0; 597 598 /* Can this be optimized so that we keep the pending command list only 599 * for tid delete command to free up the resoruce on the command status 600 * indication? 601 */ 602 dp_cmd = kzalloc(sizeof(*dp_cmd), GFP_ATOMIC); 603 604 if (!dp_cmd) 605 return -ENOMEM; 606 607 memcpy(&dp_cmd->data, rx_tid, sizeof(struct dp_rx_tid)); 608 dp_cmd->cmd_num = cmd_num; 609 dp_cmd->handler = cb; 610 611 spin_lock_bh(&dp->reo_cmd_lock); 612 list_add_tail(&dp_cmd->list, &dp->reo_cmd_list); 613 spin_unlock_bh(&dp->reo_cmd_lock); 614 615 return 0; 616 } 617 618 static int 619 ath11k_dp_tx_get_ring_id_type(struct ath11k_base *ab, 620 int mac_id, u32 ring_id, 621 enum hal_ring_type ring_type, 622 enum htt_srng_ring_type *htt_ring_type, 623 enum htt_srng_ring_id *htt_ring_id) 624 { 625 int lmac_ring_id_offset = 0; 626 int ret = 0; 627 628 switch (ring_type) { 629 case HAL_RXDMA_BUF: 630 lmac_ring_id_offset = mac_id * HAL_SRNG_RINGS_PER_LMAC; 631 if (!(ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA0_BUF + 632 lmac_ring_id_offset) || 633 ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA1_BUF + 634 lmac_ring_id_offset))) { 635 ret = -EINVAL; 636 } 637 *htt_ring_id = HTT_RXDMA_HOST_BUF_RING; 638 *htt_ring_type = HTT_SW_TO_HW_RING; 639 break; 640 case HAL_RXDMA_DST: 641 *htt_ring_id = HTT_RXDMA_NON_MONITOR_DEST_RING; 642 *htt_ring_type = HTT_HW_TO_SW_RING; 643 break; 644 case HAL_RXDMA_MONITOR_BUF: 645 *htt_ring_id = HTT_RXDMA_MONITOR_BUF_RING; 646 *htt_ring_type = HTT_SW_TO_HW_RING; 647 break; 648 case HAL_RXDMA_MONITOR_STATUS: 649 *htt_ring_id = HTT_RXDMA_MONITOR_STATUS_RING; 650 *htt_ring_type = HTT_SW_TO_HW_RING; 651 break; 652 case HAL_RXDMA_MONITOR_DST: 653 *htt_ring_id = HTT_RXDMA_MONITOR_DEST_RING; 654 *htt_ring_type = HTT_HW_TO_SW_RING; 655 break; 656 case HAL_RXDMA_MONITOR_DESC: 657 *htt_ring_id = HTT_RXDMA_MONITOR_DESC_RING; 658 *htt_ring_type = HTT_SW_TO_HW_RING; 659 break; 660 default: 661 ath11k_warn(ab, "Unsupported ring type in DP :%d\n", ring_type); 662 ret = -EINVAL; 663 } 664 return ret; 665 } 666 667 int ath11k_dp_tx_htt_srng_setup(struct ath11k_base *ab, u32 ring_id, 668 int mac_id, enum hal_ring_type ring_type) 669 { 670 struct htt_srng_setup_cmd *cmd; 671 struct hal_srng *srng = &ab->hal.srng_list[ring_id]; 672 struct hal_srng_params params; 673 struct sk_buff *skb; 674 u32 ring_entry_sz; 675 int len = sizeof(*cmd); 676 dma_addr_t hp_addr, tp_addr; 677 enum htt_srng_ring_type htt_ring_type; 678 enum htt_srng_ring_id htt_ring_id; 679 int ret; 680 681 skb = ath11k_htc_alloc_skb(ab, len); 682 if (!skb) 683 return -ENOMEM; 684 685 memset(¶ms, 0, sizeof(params)); 686 ath11k_hal_srng_get_params(ab, srng, ¶ms); 687 688 hp_addr = ath11k_hal_srng_get_hp_addr(ab, srng); 689 tp_addr = ath11k_hal_srng_get_tp_addr(ab, srng); 690 691 ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id, 692 ring_type, &htt_ring_type, 693 &htt_ring_id); 694 if (ret) 695 goto err_free; 696 697 skb_put(skb, len); 698 cmd = (struct htt_srng_setup_cmd *)skb->data; 699 cmd->info0 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_MSG_TYPE, 700 HTT_H2T_MSG_TYPE_SRING_SETUP); 701 if (htt_ring_type == HTT_SW_TO_HW_RING || 702 htt_ring_type == HTT_HW_TO_SW_RING) 703 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID, 704 DP_SW2HW_MACID(mac_id)); 705 else 706 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID, 707 mac_id); 708 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_TYPE, 709 htt_ring_type); 710 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_ID, htt_ring_id); 711 712 cmd->ring_base_addr_lo = params.ring_base_paddr & 713 HAL_ADDR_LSB_REG_MASK; 714 715 cmd->ring_base_addr_hi = (u64)params.ring_base_paddr >> 716 HAL_ADDR_MSB_REG_SHIFT; 717 718 ret = ath11k_hal_srng_get_entrysize(ring_type); 719 if (ret < 0) 720 goto err_free; 721 722 ring_entry_sz = ret; 723 724 ring_entry_sz >>= 2; 725 cmd->info1 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_ENTRY_SIZE, 726 ring_entry_sz); 727 cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_SIZE, 728 params.num_entries * ring_entry_sz); 729 cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_MSI_SWAP, 730 !!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP)); 731 cmd->info1 |= FIELD_PREP( 732 HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_TLV_SWAP, 733 !!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP)); 734 cmd->info1 |= FIELD_PREP( 735 HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_HOST_FW_SWAP, 736 !!(params.flags & HAL_SRNG_FLAGS_RING_PTR_SWAP)); 737 if (htt_ring_type == HTT_SW_TO_HW_RING) 738 cmd->info1 |= HTT_SRNG_SETUP_CMD_INFO1_RING_LOOP_CNT_DIS; 739 740 cmd->ring_head_off32_remote_addr_lo = hp_addr & HAL_ADDR_LSB_REG_MASK; 741 cmd->ring_head_off32_remote_addr_hi = (u64)hp_addr >> 742 HAL_ADDR_MSB_REG_SHIFT; 743 744 cmd->ring_tail_off32_remote_addr_lo = tp_addr & HAL_ADDR_LSB_REG_MASK; 745 cmd->ring_tail_off32_remote_addr_hi = (u64)tp_addr >> 746 HAL_ADDR_MSB_REG_SHIFT; 747 748 cmd->ring_msi_addr_lo = 0; 749 cmd->ring_msi_addr_hi = 0; 750 cmd->msi_data = 0; 751 752 cmd->intr_info = FIELD_PREP( 753 HTT_SRNG_SETUP_CMD_INTR_INFO_BATCH_COUNTER_THRESH, 754 params.intr_batch_cntr_thres_entries * ring_entry_sz); 755 cmd->intr_info |= FIELD_PREP( 756 HTT_SRNG_SETUP_CMD_INTR_INFO_INTR_TIMER_THRESH, 757 params.intr_timer_thres_us >> 3); 758 759 cmd->info2 = 0; 760 if (params.flags & HAL_SRNG_FLAGS_LOW_THRESH_INTR_EN) { 761 cmd->info2 = FIELD_PREP( 762 HTT_SRNG_SETUP_CMD_INFO2_INTR_LOW_THRESH, 763 params.low_threshold); 764 } 765 766 ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb); 767 if (ret) 768 goto err_free; 769 770 return 0; 771 772 err_free: 773 dev_kfree_skb_any(skb); 774 775 return ret; 776 } 777 778 #define HTT_TARGET_VERSION_TIMEOUT_HZ (3 * HZ) 779 780 int ath11k_dp_tx_htt_h2t_ver_req_msg(struct ath11k_base *ab) 781 { 782 struct ath11k_dp *dp = &ab->dp; 783 struct sk_buff *skb; 784 struct htt_ver_req_cmd *cmd; 785 int len = sizeof(*cmd); 786 int ret; 787 788 init_completion(&dp->htt_tgt_version_received); 789 790 skb = ath11k_htc_alloc_skb(ab, len); 791 if (!skb) 792 return -ENOMEM; 793 794 skb_put(skb, len); 795 cmd = (struct htt_ver_req_cmd *)skb->data; 796 cmd->ver_reg_info = FIELD_PREP(HTT_VER_REQ_INFO_MSG_ID, 797 HTT_H2T_MSG_TYPE_VERSION_REQ); 798 799 ret = ath11k_htc_send(&ab->htc, dp->eid, skb); 800 if (ret) { 801 dev_kfree_skb_any(skb); 802 return ret; 803 } 804 805 ret = wait_for_completion_timeout(&dp->htt_tgt_version_received, 806 HTT_TARGET_VERSION_TIMEOUT_HZ); 807 if (ret == 0) { 808 ath11k_warn(ab, "htt target version request timed out\n"); 809 return -ETIMEDOUT; 810 } 811 812 if (dp->htt_tgt_ver_major != HTT_TARGET_VERSION_MAJOR) { 813 ath11k_err(ab, "unsupported htt major version %d supported version is %d\n", 814 dp->htt_tgt_ver_major, HTT_TARGET_VERSION_MAJOR); 815 return -ENOTSUPP; 816 } 817 818 return 0; 819 } 820 821 int ath11k_dp_tx_htt_h2t_ppdu_stats_req(struct ath11k *ar, u32 mask) 822 { 823 struct ath11k_base *ab = ar->ab; 824 struct ath11k_dp *dp = &ab->dp; 825 struct sk_buff *skb; 826 struct htt_ppdu_stats_cfg_cmd *cmd; 827 int len = sizeof(*cmd); 828 u8 pdev_mask; 829 int ret; 830 831 skb = ath11k_htc_alloc_skb(ab, len); 832 if (!skb) 833 return -ENOMEM; 834 835 skb_put(skb, len); 836 cmd = (struct htt_ppdu_stats_cfg_cmd *)skb->data; 837 cmd->msg = FIELD_PREP(HTT_PPDU_STATS_CFG_MSG_TYPE, 838 HTT_H2T_MSG_TYPE_PPDU_STATS_CFG); 839 840 pdev_mask = 1 << (ar->pdev_idx); 841 cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_PDEV_ID, pdev_mask); 842 cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK, mask); 843 844 ret = ath11k_htc_send(&ab->htc, dp->eid, skb); 845 if (ret) { 846 dev_kfree_skb_any(skb); 847 return ret; 848 } 849 850 return 0; 851 } 852 853 int ath11k_dp_tx_htt_rx_filter_setup(struct ath11k_base *ab, u32 ring_id, 854 int mac_id, enum hal_ring_type ring_type, 855 int rx_buf_size, 856 struct htt_rx_ring_tlv_filter *tlv_filter) 857 { 858 struct htt_rx_ring_selection_cfg_cmd *cmd; 859 struct hal_srng *srng = &ab->hal.srng_list[ring_id]; 860 struct hal_srng_params params; 861 struct sk_buff *skb; 862 int len = sizeof(*cmd); 863 enum htt_srng_ring_type htt_ring_type; 864 enum htt_srng_ring_id htt_ring_id; 865 int ret; 866 867 skb = ath11k_htc_alloc_skb(ab, len); 868 if (!skb) 869 return -ENOMEM; 870 871 memset(¶ms, 0, sizeof(params)); 872 ath11k_hal_srng_get_params(ab, srng, ¶ms); 873 874 ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id, 875 ring_type, &htt_ring_type, 876 &htt_ring_id); 877 if (ret) 878 goto err_free; 879 880 skb_put(skb, len); 881 cmd = (struct htt_rx_ring_selection_cfg_cmd *)skb->data; 882 cmd->info0 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_MSG_TYPE, 883 HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG); 884 if (htt_ring_type == HTT_SW_TO_HW_RING || 885 htt_ring_type == HTT_HW_TO_SW_RING) 886 cmd->info0 |= 887 FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID, 888 DP_SW2HW_MACID(mac_id)); 889 else 890 cmd->info0 |= 891 FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID, 892 mac_id); 893 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_RING_ID, 894 htt_ring_id); 895 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_SS, 896 !!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP)); 897 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PS, 898 !!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP)); 899 900 cmd->info1 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO1_BUF_SIZE, 901 rx_buf_size); 902 cmd->pkt_type_en_flags0 = tlv_filter->pkt_filter_flags0; 903 cmd->pkt_type_en_flags1 = tlv_filter->pkt_filter_flags1; 904 cmd->pkt_type_en_flags2 = tlv_filter->pkt_filter_flags2; 905 cmd->pkt_type_en_flags3 = tlv_filter->pkt_filter_flags3; 906 cmd->rx_filter_tlv = tlv_filter->rx_filter; 907 908 ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb); 909 if (ret) 910 goto err_free; 911 912 return 0; 913 914 err_free: 915 dev_kfree_skb_any(skb); 916 917 return ret; 918 } 919 920 int 921 ath11k_dp_tx_htt_h2t_ext_stats_req(struct ath11k *ar, u8 type, 922 struct htt_ext_stats_cfg_params *cfg_params, 923 u64 cookie) 924 { 925 struct ath11k_base *ab = ar->ab; 926 struct ath11k_dp *dp = &ab->dp; 927 struct sk_buff *skb; 928 struct htt_ext_stats_cfg_cmd *cmd; 929 int len = sizeof(*cmd); 930 int ret; 931 932 skb = ath11k_htc_alloc_skb(ab, len); 933 if (!skb) 934 return -ENOMEM; 935 936 skb_put(skb, len); 937 938 cmd = (struct htt_ext_stats_cfg_cmd *)skb->data; 939 memset(cmd, 0, sizeof(*cmd)); 940 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_EXT_STATS_CFG; 941 942 cmd->hdr.pdev_mask = 1 << ar->pdev->pdev_id; 943 944 cmd->hdr.stats_type = type; 945 cmd->cfg_param0 = cfg_params->cfg0; 946 cmd->cfg_param1 = cfg_params->cfg1; 947 cmd->cfg_param2 = cfg_params->cfg2; 948 cmd->cfg_param3 = cfg_params->cfg3; 949 cmd->cookie_lsb = lower_32_bits(cookie); 950 cmd->cookie_msb = upper_32_bits(cookie); 951 952 ret = ath11k_htc_send(&ab->htc, dp->eid, skb); 953 if (ret) { 954 ath11k_warn(ab, "failed to send htt type stats request: %d", 955 ret); 956 dev_kfree_skb_any(skb); 957 return ret; 958 } 959 960 return 0; 961 } 962 963 int ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k *ar, bool reset) 964 { 965 struct ath11k_pdev_dp *dp = &ar->dp; 966 struct htt_rx_ring_tlv_filter tlv_filter = {0}; 967 int ret = 0, ring_id = 0; 968 969 ring_id = dp->rxdma_mon_buf_ring.refill_buf_ring.ring_id; 970 971 if (!reset) { 972 tlv_filter.rx_filter = HTT_RX_MON_FILTER_TLV_FLAGS_MON_BUF_RING; 973 tlv_filter.pkt_filter_flags0 = 974 HTT_RX_MON_FP_MGMT_FILTER_FLAGS0 | 975 HTT_RX_MON_MO_MGMT_FILTER_FLAGS0; 976 tlv_filter.pkt_filter_flags1 = 977 HTT_RX_MON_FP_MGMT_FILTER_FLAGS1 | 978 HTT_RX_MON_MO_MGMT_FILTER_FLAGS1; 979 tlv_filter.pkt_filter_flags2 = 980 HTT_RX_MON_FP_CTRL_FILTER_FLASG2 | 981 HTT_RX_MON_MO_CTRL_FILTER_FLASG2; 982 tlv_filter.pkt_filter_flags3 = 983 HTT_RX_MON_FP_CTRL_FILTER_FLASG3 | 984 HTT_RX_MON_MO_CTRL_FILTER_FLASG3 | 985 HTT_RX_MON_FP_DATA_FILTER_FLASG3 | 986 HTT_RX_MON_MO_DATA_FILTER_FLASG3; 987 } 988 989 ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, dp->mac_id, 990 HAL_RXDMA_MONITOR_BUF, 991 DP_RXDMA_REFILL_RING_SIZE, 992 &tlv_filter); 993 if (ret) 994 return ret; 995 996 ring_id = dp->rx_mon_status_refill_ring.refill_buf_ring.ring_id; 997 if (!reset) 998 tlv_filter.rx_filter = 999 HTT_RX_MON_FILTER_TLV_FLAGS_MON_STATUS_RING; 1000 else 1001 tlv_filter = ath11k_mac_mon_status_filter_default; 1002 1003 ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, dp->mac_id, 1004 HAL_RXDMA_MONITOR_STATUS, 1005 DP_RXDMA_REFILL_RING_SIZE, 1006 &tlv_filter); 1007 return ret; 1008 } 1009