1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef ATH11K_CORE_H 7 #define ATH11K_CORE_H 8 9 #include <linux/types.h> 10 #include <linux/interrupt.h> 11 #include <linux/irq.h> 12 #include <linux/bitfield.h> 13 #include "qmi.h" 14 #include "htc.h" 15 #include "wmi.h" 16 #include "hal.h" 17 #include "dp.h" 18 #include "ce.h" 19 #include "mac.h" 20 #include "hw.h" 21 #include "hal_rx.h" 22 #include "reg.h" 23 #include "thermal.h" 24 #include "dbring.h" 25 #include "spectral.h" 26 27 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 28 29 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512 30 31 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 32 33 /* Pending management packets threshold for dropping probe responses */ 34 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 35 36 #define ATH11K_INVALID_HW_MAC_ID 0xFF 37 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ) 38 39 extern unsigned int ath11k_frame_mode; 40 41 #define ATH11K_MON_TIMER_INTERVAL 10 42 43 enum ath11k_supported_bw { 44 ATH11K_BW_20 = 0, 45 ATH11K_BW_40 = 1, 46 ATH11K_BW_80 = 2, 47 ATH11K_BW_160 = 3, 48 }; 49 50 enum ath11k_bdf_search { 51 ATH11K_BDF_SEARCH_DEFAULT, 52 ATH11K_BDF_SEARCH_BUS_AND_BOARD, 53 }; 54 55 enum wme_ac { 56 WME_AC_BE, 57 WME_AC_BK, 58 WME_AC_VI, 59 WME_AC_VO, 60 WME_NUM_AC 61 }; 62 63 #define ATH11K_HT_MCS_MAX 7 64 #define ATH11K_VHT_MCS_MAX 9 65 #define ATH11K_HE_MCS_MAX 11 66 67 enum ath11k_crypt_mode { 68 /* Only use hardware crypto engine */ 69 ATH11K_CRYPT_MODE_HW, 70 /* Only use software crypto */ 71 ATH11K_CRYPT_MODE_SW, 72 }; 73 74 static inline enum wme_ac ath11k_tid_to_ac(u32 tid) 75 { 76 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 77 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 78 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 79 WME_AC_VO); 80 } 81 82 enum ath11k_skb_flags { 83 ATH11K_SKB_HW_80211_ENCAP = BIT(0), 84 ATH11K_SKB_CIPHER_SET = BIT(1), 85 }; 86 87 struct ath11k_skb_cb { 88 dma_addr_t paddr; 89 u8 eid; 90 u8 flags; 91 u32 cipher; 92 struct ath11k *ar; 93 struct ieee80211_vif *vif; 94 } __packed; 95 96 struct ath11k_skb_rxcb { 97 dma_addr_t paddr; 98 bool is_first_msdu; 99 bool is_last_msdu; 100 bool is_continuation; 101 bool is_mcbc; 102 bool is_eapol; 103 struct hal_rx_desc *rx_desc; 104 u8 err_rel_src; 105 u8 err_code; 106 u8 mac_id; 107 u8 unmapped; 108 u8 is_frag; 109 u8 tid; 110 u16 peer_id; 111 u16 seq_no; 112 }; 113 114 enum ath11k_hw_rev { 115 ATH11K_HW_IPQ8074, 116 ATH11K_HW_QCA6390_HW20, 117 ATH11K_HW_IPQ6018_HW10, 118 ATH11K_HW_QCN9074_HW10, 119 ATH11K_HW_WCN6855_HW20, 120 ATH11K_HW_WCN6855_HW21, 121 }; 122 123 enum ath11k_firmware_mode { 124 /* the default mode, standard 802.11 functionality */ 125 ATH11K_FIRMWARE_MODE_NORMAL, 126 127 /* factory tests etc */ 128 ATH11K_FIRMWARE_MODE_FTM, 129 130 /* Cold boot calibration */ 131 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7, 132 }; 133 134 extern bool ath11k_cold_boot_cal; 135 136 #define ATH11K_IRQ_NUM_MAX 52 137 #define ATH11K_EXT_IRQ_NUM_MAX 16 138 139 struct ath11k_ext_irq_grp { 140 struct ath11k_base *ab; 141 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX]; 142 u32 num_irq; 143 u32 grp_id; 144 u64 timestamp; 145 bool napi_enabled; 146 struct napi_struct napi; 147 struct net_device napi_ndev; 148 }; 149 150 #define HEHANDLE_CAP_PHYINFO_SIZE 3 151 #define HECAP_PHYINFO_SIZE 9 152 #define HECAP_MACINFO_SIZE 5 153 #define HECAP_TXRX_MCS_NSS_SIZE 2 154 #define HECAP_PPET16_PPET8_MAX_SIZE 25 155 156 #define HE_PPET16_PPET8_SIZE 8 157 158 /* 802.11ax PPE (PPDU packet Extension) threshold */ 159 struct he_ppe_threshold { 160 u32 numss_m1; 161 u32 ru_mask; 162 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 163 }; 164 165 struct ath11k_he { 166 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 167 u32 hecap_rxmcsnssmap; 168 u32 hecap_txmcsnssmap; 169 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 170 struct he_ppe_threshold hecap_ppet; 171 u32 heop_param; 172 }; 173 174 #define MAX_RADIOS 3 175 176 enum { 177 WMI_HOST_TP_SCALE_MAX = 0, 178 WMI_HOST_TP_SCALE_50 = 1, 179 WMI_HOST_TP_SCALE_25 = 2, 180 WMI_HOST_TP_SCALE_12 = 3, 181 WMI_HOST_TP_SCALE_MIN = 4, 182 WMI_HOST_TP_SCALE_SIZE = 5, 183 }; 184 185 enum ath11k_scan_state { 186 ATH11K_SCAN_IDLE, 187 ATH11K_SCAN_STARTING, 188 ATH11K_SCAN_RUNNING, 189 ATH11K_SCAN_ABORTING, 190 }; 191 192 enum ath11k_dev_flags { 193 ATH11K_CAC_RUNNING, 194 ATH11K_FLAG_CORE_REGISTERED, 195 ATH11K_FLAG_CRASH_FLUSH, 196 ATH11K_FLAG_RAW_MODE, 197 ATH11K_FLAG_HW_CRYPTO_DISABLED, 198 ATH11K_FLAG_BTCOEX, 199 ATH11K_FLAG_RECOVERY, 200 ATH11K_FLAG_UNREGISTERING, 201 ATH11K_FLAG_REGISTERED, 202 ATH11K_FLAG_QMI_FAIL, 203 ATH11K_FLAG_HTC_SUSPEND_COMPLETE, 204 ATH11K_FLAG_CE_IRQ_ENABLED, 205 ATH11K_FLAG_EXT_IRQ_ENABLED, 206 ATH11K_FLAG_FIXED_MEM_RGN, 207 }; 208 209 enum ath11k_monitor_flags { 210 ATH11K_FLAG_MONITOR_CONF_ENABLED, 211 ATH11K_FLAG_MONITOR_STARTED, 212 ATH11K_FLAG_MONITOR_VDEV_CREATED, 213 }; 214 215 struct ath11k_vif { 216 u32 vdev_id; 217 enum wmi_vdev_type vdev_type; 218 enum wmi_vdev_subtype vdev_subtype; 219 u32 beacon_interval; 220 u32 dtim_period; 221 u16 ast_hash; 222 u16 ast_idx; 223 u16 tcl_metadata; 224 u8 hal_addr_search_flags; 225 u8 search_type; 226 227 struct ath11k *ar; 228 struct ieee80211_vif *vif; 229 230 u16 tx_seq_no; 231 struct wmi_wmm_params_all_arg wmm_params; 232 struct list_head list; 233 union { 234 struct { 235 u32 uapsd; 236 } sta; 237 struct { 238 /* 127 stations; wmi limit */ 239 u8 tim_bitmap[16]; 240 u8 tim_len; 241 u32 ssid_len; 242 u8 ssid[IEEE80211_MAX_SSID_LEN]; 243 bool hidden_ssid; 244 /* P2P_IE with NoA attribute for P2P_GO case */ 245 u32 noa_len; 246 u8 *noa_data; 247 } ap; 248 } u; 249 250 bool is_started; 251 bool is_up; 252 bool spectral_enabled; 253 bool ps; 254 u32 aid; 255 u8 bssid[ETH_ALEN]; 256 struct cfg80211_bitrate_mask bitrate_mask; 257 struct delayed_work connection_loss_work; 258 int num_legacy_stations; 259 int rtscts_prot_mode; 260 int txpower; 261 bool rsnie_present; 262 bool wpaie_present; 263 bool bcca_zero_sent; 264 bool do_not_send_tmpl; 265 struct ieee80211_chanctx_conf chanctx; 266 #ifdef CONFIG_ATH11K_DEBUGFS 267 struct dentry *debugfs_twt; 268 #endif /* CONFIG_ATH11K_DEBUGFS */ 269 }; 270 271 struct ath11k_vif_iter { 272 u32 vdev_id; 273 struct ath11k_vif *arvif; 274 }; 275 276 struct ath11k_rx_peer_stats { 277 u64 num_msdu; 278 u64 num_mpdu_fcs_ok; 279 u64 num_mpdu_fcs_err; 280 u64 tcp_msdu_count; 281 u64 udp_msdu_count; 282 u64 other_msdu_count; 283 u64 ampdu_msdu_count; 284 u64 non_ampdu_msdu_count; 285 u64 stbc_count; 286 u64 beamformed_count; 287 u64 mcs_count[HAL_RX_MAX_MCS + 1]; 288 u64 nss_count[HAL_RX_MAX_NSS]; 289 u64 bw_count[HAL_RX_BW_MAX]; 290 u64 gi_count[HAL_RX_GI_MAX]; 291 u64 coding_count[HAL_RX_SU_MU_CODING_MAX]; 292 u64 tid_count[IEEE80211_NUM_TIDS + 1]; 293 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 294 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 295 u64 rx_duration; 296 u64 dcm_count; 297 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 298 }; 299 300 #define ATH11K_HE_MCS_NUM 12 301 #define ATH11K_VHT_MCS_NUM 10 302 #define ATH11K_BW_NUM 4 303 #define ATH11K_NSS_NUM 4 304 #define ATH11K_LEGACY_NUM 12 305 #define ATH11K_GI_NUM 4 306 #define ATH11K_HT_MCS_NUM 32 307 308 enum ath11k_pkt_rx_err { 309 ATH11K_PKT_RX_ERR_FCS, 310 ATH11K_PKT_RX_ERR_TKIP, 311 ATH11K_PKT_RX_ERR_CRYPT, 312 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL, 313 ATH11K_PKT_RX_ERR_MAX, 314 }; 315 316 enum ath11k_ampdu_subfrm_num { 317 ATH11K_AMPDU_SUBFRM_NUM_10, 318 ATH11K_AMPDU_SUBFRM_NUM_20, 319 ATH11K_AMPDU_SUBFRM_NUM_30, 320 ATH11K_AMPDU_SUBFRM_NUM_40, 321 ATH11K_AMPDU_SUBFRM_NUM_50, 322 ATH11K_AMPDU_SUBFRM_NUM_60, 323 ATH11K_AMPDU_SUBFRM_NUM_MORE, 324 ATH11K_AMPDU_SUBFRM_NUM_MAX, 325 }; 326 327 enum ath11k_amsdu_subfrm_num { 328 ATH11K_AMSDU_SUBFRM_NUM_1, 329 ATH11K_AMSDU_SUBFRM_NUM_2, 330 ATH11K_AMSDU_SUBFRM_NUM_3, 331 ATH11K_AMSDU_SUBFRM_NUM_4, 332 ATH11K_AMSDU_SUBFRM_NUM_MORE, 333 ATH11K_AMSDU_SUBFRM_NUM_MAX, 334 }; 335 336 enum ath11k_counter_type { 337 ATH11K_COUNTER_TYPE_BYTES, 338 ATH11K_COUNTER_TYPE_PKTS, 339 ATH11K_COUNTER_TYPE_MAX, 340 }; 341 342 enum ath11k_stats_type { 343 ATH11K_STATS_TYPE_SUCC, 344 ATH11K_STATS_TYPE_FAIL, 345 ATH11K_STATS_TYPE_RETRY, 346 ATH11K_STATS_TYPE_AMPDU, 347 ATH11K_STATS_TYPE_MAX, 348 }; 349 350 struct ath11k_htt_data_stats { 351 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM]; 352 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM]; 353 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM]; 354 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM]; 355 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM]; 356 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM]; 357 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM]; 358 }; 359 360 struct ath11k_htt_tx_stats { 361 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX]; 362 u64 tx_duration; 363 u64 ba_fails; 364 u64 ack_fails; 365 }; 366 367 struct ath11k_per_ppdu_tx_stats { 368 u16 succ_pkts; 369 u16 failed_pkts; 370 u16 retry_pkts; 371 u32 succ_bytes; 372 u32 failed_bytes; 373 u32 retry_bytes; 374 }; 375 376 struct ath11k_sta { 377 struct ath11k_vif *arvif; 378 379 /* the following are protected by ar->data_lock */ 380 u32 changed; /* IEEE80211_RC_* */ 381 u32 bw; 382 u32 nss; 383 u32 smps; 384 enum hal_pn_type pn_type; 385 386 struct work_struct update_wk; 387 struct work_struct set_4addr_wk; 388 struct rate_info txrate; 389 u32 peer_nss; 390 struct rate_info last_txrate; 391 u64 rx_duration; 392 u64 tx_duration; 393 u8 rssi_comb; 394 s8 rssi_beacon; 395 s8 chain_signal[IEEE80211_MAX_CHAINS]; 396 struct ath11k_htt_tx_stats *tx_stats; 397 struct ath11k_rx_peer_stats *rx_stats; 398 399 #ifdef CONFIG_MAC80211_DEBUGFS 400 /* protected by conf_mutex */ 401 bool aggr_mode; 402 #endif 403 404 bool use_4addr_set; 405 u16 tcl_metadata; 406 }; 407 408 #define ATH11K_MIN_5G_FREQ 4150 409 #define ATH11K_MIN_6G_FREQ 5925 410 #define ATH11K_MAX_6G_FREQ 7115 411 #define ATH11K_NUM_CHANS 101 412 #define ATH11K_MAX_5G_CHAN 173 413 414 enum ath11k_state { 415 ATH11K_STATE_OFF, 416 ATH11K_STATE_ON, 417 ATH11K_STATE_RESTARTING, 418 ATH11K_STATE_RESTARTED, 419 ATH11K_STATE_WEDGED, 420 /* Add other states as required */ 421 }; 422 423 /* Antenna noise floor */ 424 #define ATH11K_DEFAULT_NOISE_FLOOR -95 425 426 #define ATH11K_INVALID_RSSI_FULL -1 427 428 #define ATH11K_INVALID_RSSI_EMPTY -128 429 430 struct ath11k_fw_stats { 431 struct dentry *debugfs_fwstats; 432 u32 pdev_id; 433 u32 stats_id; 434 struct list_head pdevs; 435 struct list_head vdevs; 436 struct list_head bcn; 437 }; 438 439 struct ath11k_dbg_htt_stats { 440 u8 type; 441 u8 reset; 442 struct debug_htt_stats_req *stats_req; 443 /* protects shared stats req buffer */ 444 spinlock_t lock; 445 }; 446 447 #define MAX_MODULE_ID_BITMAP_WORDS 16 448 449 struct ath11k_debug { 450 struct dentry *debugfs_pdev; 451 struct ath11k_dbg_htt_stats htt_stats; 452 u32 extd_tx_stats; 453 struct ath11k_fw_stats fw_stats; 454 struct completion fw_stats_complete; 455 bool fw_stats_done; 456 u32 extd_rx_stats; 457 u32 pktlog_filter; 458 u32 pktlog_mode; 459 u32 pktlog_peer_valid; 460 u8 pktlog_peer_addr[ETH_ALEN]; 461 u32 rx_filter; 462 u32 mem_offset; 463 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS]; 464 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX]; 465 }; 466 467 struct ath11k_per_peer_tx_stats { 468 u32 succ_bytes; 469 u32 retry_bytes; 470 u32 failed_bytes; 471 u16 succ_pkts; 472 u16 retry_pkts; 473 u16 failed_pkts; 474 u32 duration; 475 u8 ba_fails; 476 bool is_ampdu; 477 }; 478 479 #define ATH11K_FLUSH_TIMEOUT (5 * HZ) 480 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 481 482 struct ath11k { 483 struct ath11k_base *ab; 484 struct ath11k_pdev *pdev; 485 struct ieee80211_hw *hw; 486 struct ieee80211_ops *ops; 487 struct ath11k_pdev_wmi *wmi; 488 struct ath11k_pdev_dp dp; 489 u8 mac_addr[ETH_ALEN]; 490 u32 ht_cap_info; 491 u32 vht_cap_info; 492 struct ath11k_he ar_he; 493 enum ath11k_state state; 494 bool supports_6ghz; 495 struct { 496 struct completion started; 497 struct completion completed; 498 struct completion on_channel; 499 struct delayed_work timeout; 500 enum ath11k_scan_state state; 501 bool is_roc; 502 int vdev_id; 503 int roc_freq; 504 bool roc_notify; 505 } scan; 506 507 struct { 508 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 509 struct ieee80211_sband_iftype_data 510 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 511 } mac; 512 513 unsigned long dev_flags; 514 unsigned int filter_flags; 515 unsigned long monitor_flags; 516 u32 min_tx_power; 517 u32 max_tx_power; 518 u32 txpower_limit_2g; 519 u32 txpower_limit_5g; 520 u32 txpower_scale; 521 u32 power_scale; 522 u32 chan_tx_pwr; 523 u32 num_stations; 524 u32 max_num_stations; 525 /* To synchronize concurrent synchronous mac80211 callback operations, 526 * concurrent debugfs configuration and concurrent FW statistics events. 527 */ 528 struct mutex conf_mutex; 529 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 530 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info, 531 * channel context data, survey info, test mode data. 532 */ 533 spinlock_t data_lock; 534 535 struct list_head arvifs; 536 /* should never be NULL; needed for regular htt rx */ 537 struct ieee80211_channel *rx_channel; 538 539 /* valid during scan; needed for mgmt rx during scan */ 540 struct ieee80211_channel *scan_channel; 541 542 u8 cfg_tx_chainmask; 543 u8 cfg_rx_chainmask; 544 u8 num_rx_chains; 545 u8 num_tx_chains; 546 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 547 u8 pdev_idx; 548 u8 lmac_id; 549 550 struct completion peer_assoc_done; 551 struct completion peer_delete_done; 552 553 int install_key_status; 554 struct completion install_key_done; 555 556 int last_wmi_vdev_start_status; 557 struct completion vdev_setup_done; 558 struct completion vdev_delete_done; 559 560 int num_peers; 561 int max_num_peers; 562 u32 num_started_vdevs; 563 u32 num_created_vdevs; 564 unsigned long long allocated_vdev_map; 565 566 struct idr txmgmt_idr; 567 /* protects txmgmt_idr data */ 568 spinlock_t txmgmt_idr_lock; 569 atomic_t num_pending_mgmt_tx; 570 wait_queue_head_t txmgmt_empty_waitq; 571 572 /* cycle count is reported twice for each visited channel during scan. 573 * access protected by data_lock 574 */ 575 u32 survey_last_rx_clear_count; 576 u32 survey_last_cycle_count; 577 578 /* Channel info events are expected to come in pairs without and with 579 * COMPLETE flag set respectively for each channel visit during scan. 580 * 581 * However there are deviations from this rule. This flag is used to 582 * avoid reporting garbage data. 583 */ 584 bool ch_info_can_report_survey; 585 struct survey_info survey[ATH11K_NUM_CHANS]; 586 struct completion bss_survey_done; 587 588 struct work_struct regd_update_work; 589 590 struct work_struct wmi_mgmt_tx_work; 591 struct sk_buff_head wmi_mgmt_tx_queue; 592 593 struct ath11k_per_peer_tx_stats peer_tx_stats; 594 struct list_head ppdu_stats_info; 595 u32 ppdu_stat_list_depth; 596 597 struct ath11k_per_peer_tx_stats cached_stats; 598 u32 last_ppdu_id; 599 u32 cached_ppdu_id; 600 int monitor_vdev_id; 601 #ifdef CONFIG_ATH11K_DEBUGFS 602 struct ath11k_debug debug; 603 #endif 604 #ifdef CONFIG_ATH11K_SPECTRAL 605 struct ath11k_spectral spectral; 606 #endif 607 bool dfs_block_radar_events; 608 struct ath11k_thermal thermal; 609 u32 vdev_id_11d_scan; 610 struct completion finish_11d_scan; 611 struct completion finish_11d_ch_list; 612 bool pending_11d; 613 bool regdom_set_by_user; 614 int hw_rate_code; 615 u8 twt_enabled; 616 }; 617 618 struct ath11k_band_cap { 619 u32 phy_id; 620 u32 max_bw_supported; 621 u32 ht_cap_info; 622 u32 he_cap_info[2]; 623 u32 he_mcs; 624 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 625 struct ath11k_ppe_threshold he_ppet; 626 u16 he_6ghz_capa; 627 }; 628 629 struct ath11k_pdev_cap { 630 u32 supported_bands; 631 u32 ampdu_density; 632 u32 vht_cap; 633 u32 vht_mcs; 634 u32 he_mcs; 635 u32 tx_chain_mask; 636 u32 rx_chain_mask; 637 u32 tx_chain_mask_shift; 638 u32 rx_chain_mask_shift; 639 struct ath11k_band_cap band[NUM_NL80211_BANDS]; 640 bool nss_ratio_enabled; 641 u8 nss_ratio_info; 642 }; 643 644 struct ath11k_pdev { 645 struct ath11k *ar; 646 u32 pdev_id; 647 struct ath11k_pdev_cap cap; 648 u8 mac_addr[ETH_ALEN]; 649 }; 650 651 struct ath11k_board_data { 652 const struct firmware *fw; 653 const void *data; 654 size_t len; 655 }; 656 657 struct ath11k_bus_params { 658 bool mhi_support; 659 bool m3_fw_support; 660 bool fixed_bdf_addr; 661 bool fixed_mem_region; 662 bool static_window_map; 663 }; 664 665 /* IPQ8074 HW channel counters frequency value in hertz */ 666 #define IPQ8074_CC_FREQ_HERTZ 320000 667 668 struct ath11k_bp_stats { 669 /* Head Pointer reported by the last HTT Backpressure event for the ring */ 670 u16 hp; 671 672 /* Tail Pointer reported by the last HTT Backpressure event for the ring */ 673 u16 tp; 674 675 /* Number of Backpressure events received for the ring */ 676 u32 count; 677 678 /* Last recorded event timestamp */ 679 unsigned long jiffies; 680 }; 681 682 struct ath11k_dp_ring_bp_stats { 683 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX]; 684 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS]; 685 }; 686 687 struct ath11k_soc_dp_tx_err_stats { 688 /* TCL Ring Descriptor unavailable */ 689 u32 desc_na[DP_TCL_NUM_RING_MAX]; 690 /* Other failures during dp_tx due to mem allocation failure 691 * idr unavailable etc. 692 */ 693 atomic_t misc_fail; 694 }; 695 696 struct ath11k_soc_dp_stats { 697 u32 err_ring_pkts; 698 u32 invalid_rbm; 699 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; 700 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; 701 u32 hal_reo_error[DP_REO_DST_RING_MAX]; 702 struct ath11k_soc_dp_tx_err_stats tx_err; 703 struct ath11k_dp_ring_bp_stats bp_stats; 704 }; 705 706 /* Master structure to hold the hw data which may be used in core module */ 707 struct ath11k_base { 708 enum ath11k_hw_rev hw_rev; 709 struct platform_device *pdev; 710 struct device *dev; 711 struct ath11k_qmi qmi; 712 struct ath11k_wmi_base wmi_ab; 713 struct completion fw_ready; 714 int num_radios; 715 /* HW channel counters frequency value in hertz common to all MACs */ 716 u32 cc_freq_hz; 717 718 struct ath11k_htc htc; 719 720 struct ath11k_dp dp; 721 722 void __iomem *mem; 723 unsigned long mem_len; 724 725 struct { 726 enum ath11k_bus bus; 727 const struct ath11k_hif_ops *ops; 728 } hif; 729 730 struct { 731 struct completion wakeup_completed; 732 } wow; 733 734 struct ath11k_ce ce; 735 struct timer_list rx_replenish_retry; 736 struct ath11k_hal hal; 737 /* To synchronize core_start/core_stop */ 738 struct mutex core_lock; 739 /* Protects data like peers */ 740 spinlock_t base_lock; 741 struct ath11k_pdev pdevs[MAX_RADIOS]; 742 struct { 743 enum WMI_HOST_WLAN_BAND supported_bands; 744 u32 pdev_id; 745 } target_pdev_ids[MAX_RADIOS]; 746 u8 target_pdev_count; 747 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS]; 748 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS]; 749 unsigned long long free_vdev_map; 750 struct list_head peers; 751 wait_queue_head_t peer_mapping_wq; 752 u8 mac_addr[ETH_ALEN]; 753 bool wmi_ready; 754 u32 wlan_init_status; 755 int irq_num[ATH11K_IRQ_NUM_MAX]; 756 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 757 struct ath11k_targ_cap target_caps; 758 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 759 bool pdevs_macaddr_valid; 760 int bd_api; 761 762 struct ath11k_hw_params hw_params; 763 struct ath11k_bus_params bus_params; 764 765 const struct firmware *cal_file; 766 767 /* Below regd's are protected by ab->data_lock */ 768 /* This is the regd set for every radio 769 * by the firmware during initializatin 770 */ 771 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 772 /* This regd is set during dynamic country setting 773 * This may or may not be used during the runtime 774 */ 775 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 776 777 /* Current DFS Regulatory */ 778 enum ath11k_dfs_region dfs_region; 779 #ifdef CONFIG_ATH11K_DEBUGFS 780 struct dentry *debugfs_soc; 781 struct dentry *debugfs_ath11k; 782 #endif 783 struct ath11k_soc_dp_stats soc_stats; 784 785 unsigned long dev_flags; 786 struct completion driver_recovery; 787 struct workqueue_struct *workqueue; 788 struct work_struct restart_work; 789 struct work_struct update_11d_work; 790 u8 new_alpha2[3]; 791 struct { 792 /* protected by data_lock */ 793 u32 fw_crash_counter; 794 } stats; 795 u32 pktlog_defs_checksum; 796 797 struct ath11k_dbring_cap *db_caps; 798 u32 num_db_cap; 799 struct work_struct rfkill_work; 800 801 /* true means radio is on */ 802 bool rfkill_radio_on; 803 804 /* To synchronize 11d scan vdev id */ 805 struct mutex vdev_id_11d_lock; 806 struct timer_list mon_reap_timer; 807 808 struct completion htc_suspend; 809 810 struct { 811 enum ath11k_bdf_search bdf_search; 812 u32 vendor; 813 u32 device; 814 u32 subsystem_vendor; 815 u32 subsystem_device; 816 } id; 817 818 /* must be last */ 819 u8 drv_priv[] __aligned(sizeof(void *)); 820 }; 821 822 struct ath11k_fw_stats_pdev { 823 struct list_head list; 824 825 /* PDEV stats */ 826 s32 ch_noise_floor; 827 /* Cycles spent transmitting frames */ 828 u32 tx_frame_count; 829 /* Cycles spent receiving frames */ 830 u32 rx_frame_count; 831 /* Total channel busy time, evidently */ 832 u32 rx_clear_count; 833 /* Total on-channel time */ 834 u32 cycle_count; 835 u32 phy_err_count; 836 u32 chan_tx_power; 837 u32 ack_rx_bad; 838 u32 rts_bad; 839 u32 rts_good; 840 u32 fcs_bad; 841 u32 no_beacons; 842 u32 mib_int_count; 843 844 /* PDEV TX stats */ 845 /* Num HTT cookies queued to dispatch list */ 846 s32 comp_queued; 847 /* Num HTT cookies dispatched */ 848 s32 comp_delivered; 849 /* Num MSDU queued to WAL */ 850 s32 msdu_enqued; 851 /* Num MPDU queue to WAL */ 852 s32 mpdu_enqued; 853 /* Num MSDUs dropped by WMM limit */ 854 s32 wmm_drop; 855 /* Num Local frames queued */ 856 s32 local_enqued; 857 /* Num Local frames done */ 858 s32 local_freed; 859 /* Num queued to HW */ 860 s32 hw_queued; 861 /* Num PPDU reaped from HW */ 862 s32 hw_reaped; 863 /* Num underruns */ 864 s32 underrun; 865 /* Num hw paused */ 866 u32 hw_paused; 867 /* Num PPDUs cleaned up in TX abort */ 868 s32 tx_abort; 869 /* Num MPDUs requeued by SW */ 870 s32 mpdus_requeued; 871 /* excessive retries */ 872 u32 tx_ko; 873 u32 tx_xretry; 874 /* data hw rate code */ 875 u32 data_rc; 876 /* Scheduler self triggers */ 877 u32 self_triggers; 878 /* frames dropped due to excessive sw retries */ 879 u32 sw_retry_failure; 880 /* illegal rate phy errors */ 881 u32 illgl_rate_phy_err; 882 /* wal pdev continuous xretry */ 883 u32 pdev_cont_xretry; 884 /* wal pdev tx timeouts */ 885 u32 pdev_tx_timeout; 886 /* wal pdev resets */ 887 u32 pdev_resets; 888 /* frames dropped due to non-availability of stateless TIDs */ 889 u32 stateless_tid_alloc_failure; 890 /* PhY/BB underrun */ 891 u32 phy_underrun; 892 /* MPDU is more than txop limit */ 893 u32 txop_ovf; 894 /* Num sequences posted */ 895 u32 seq_posted; 896 /* Num sequences failed in queueing */ 897 u32 seq_failed_queueing; 898 /* Num sequences completed */ 899 u32 seq_completed; 900 /* Num sequences restarted */ 901 u32 seq_restarted; 902 /* Num of MU sequences posted */ 903 u32 mu_seq_posted; 904 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT 905 * (Reset,channel change) 906 */ 907 s32 mpdus_sw_flush; 908 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 909 s32 mpdus_hw_filter; 910 /* Num MPDUs truncated by PDG (TXOP, TBTT, 911 * PPDU_duration based on rate, dyn_bw) 912 */ 913 s32 mpdus_truncated; 914 /* Num MPDUs that was tried but didn't receive ACK or BA */ 915 s32 mpdus_ack_failed; 916 /* Num MPDUs that was dropped du to expiry. */ 917 s32 mpdus_expired; 918 919 /* PDEV RX stats */ 920 /* Cnts any change in ring routing mid-ppdu */ 921 s32 mid_ppdu_route_change; 922 /* Total number of statuses processed */ 923 s32 status_rcvd; 924 /* Extra frags on rings 0-3 */ 925 s32 r0_frags; 926 s32 r1_frags; 927 s32 r2_frags; 928 s32 r3_frags; 929 /* MSDUs / MPDUs delivered to HTT */ 930 s32 htt_msdus; 931 s32 htt_mpdus; 932 /* MSDUs / MPDUs delivered to local stack */ 933 s32 loc_msdus; 934 s32 loc_mpdus; 935 /* AMSDUs that have more MSDUs than the status ring size */ 936 s32 oversize_amsdu; 937 /* Number of PHY errors */ 938 s32 phy_errs; 939 /* Number of PHY errors drops */ 940 s32 phy_err_drop; 941 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 942 s32 mpdu_errs; 943 /* Num overflow errors */ 944 s32 rx_ovfl_errs; 945 }; 946 947 struct ath11k_fw_stats_vdev { 948 struct list_head list; 949 950 u32 vdev_id; 951 u32 beacon_snr; 952 u32 data_snr; 953 u32 num_tx_frames[WLAN_MAX_AC]; 954 u32 num_rx_frames; 955 u32 num_tx_frames_retries[WLAN_MAX_AC]; 956 u32 num_tx_frames_failures[WLAN_MAX_AC]; 957 u32 num_rts_fail; 958 u32 num_rts_success; 959 u32 num_rx_err; 960 u32 num_rx_discard; 961 u32 num_tx_not_acked; 962 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 963 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 964 }; 965 966 struct ath11k_fw_stats_bcn { 967 struct list_head list; 968 969 u32 vdev_id; 970 u32 tx_bcn_succ_cnt; 971 u32 tx_bcn_outage_cnt; 972 }; 973 974 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[]; 975 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[]; 976 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[]; 977 978 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[]; 979 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[]; 980 981 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[]; 982 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[]; 983 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab); 984 int ath11k_core_pre_init(struct ath11k_base *ab); 985 int ath11k_core_init(struct ath11k_base *ath11k); 986 void ath11k_core_deinit(struct ath11k_base *ath11k); 987 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size, 988 enum ath11k_bus bus, 989 const struct ath11k_bus_params *bus_params); 990 void ath11k_core_free(struct ath11k_base *ath11k); 991 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k, 992 struct ath11k_board_data *bd); 993 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd); 994 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab, 995 struct ath11k_board_data *bd, 996 const char *name); 997 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd); 998 int ath11k_core_check_dt(struct ath11k_base *ath11k); 999 1000 void ath11k_core_halt(struct ath11k *ar); 1001 int ath11k_core_resume(struct ath11k_base *ab); 1002 int ath11k_core_suspend(struct ath11k_base *ab); 1003 1004 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab, 1005 const char *filename); 1006 1007 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state) 1008 { 1009 switch (state) { 1010 case ATH11K_SCAN_IDLE: 1011 return "idle"; 1012 case ATH11K_SCAN_STARTING: 1013 return "starting"; 1014 case ATH11K_SCAN_RUNNING: 1015 return "running"; 1016 case ATH11K_SCAN_ABORTING: 1017 return "aborting"; 1018 } 1019 1020 return "unknown"; 1021 } 1022 1023 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb) 1024 { 1025 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) > 1026 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 1027 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 1028 } 1029 1030 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb) 1031 { 1032 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb)); 1033 return (struct ath11k_skb_rxcb *)skb->cb; 1034 } 1035 1036 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif) 1037 { 1038 return (struct ath11k_vif *)vif->drv_priv; 1039 } 1040 1041 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab, 1042 int mac_id) 1043 { 1044 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar; 1045 } 1046 1047 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab, 1048 const char *filename, 1049 void *buf, size_t buf_len) 1050 { 1051 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR, 1052 ab->hw_params.fw.dir, filename); 1053 } 1054 1055 static inline const char *ath11k_bus_str(enum ath11k_bus bus) 1056 { 1057 switch (bus) { 1058 case ATH11K_BUS_PCI: 1059 return "pci"; 1060 case ATH11K_BUS_AHB: 1061 return "ahb"; 1062 } 1063 1064 return "unknown"; 1065 } 1066 1067 #endif /* _CORE_H_ */ 1068