1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef ATH11K_CORE_H
7 #define ATH11K_CORE_H
8 
9 #include <linux/types.h>
10 #include <linux/interrupt.h>
11 #include <linux/irq.h>
12 #include <linux/bitfield.h>
13 #include "qmi.h"
14 #include "htc.h"
15 #include "wmi.h"
16 #include "hal.h"
17 #include "dp.h"
18 #include "ce.h"
19 #include "mac.h"
20 #include "hw.h"
21 #include "hal_rx.h"
22 #include "reg.h"
23 #include "thermal.h"
24 
25 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
26 
27 #define ATH11K_TX_MGMT_NUM_PENDING_MAX	512
28 
29 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
30 
31 /* Pending management packets threshold for dropping probe responses */
32 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
33 
34 #define ATH11K_INVALID_HW_MAC_ID	0xFF
35 
36 enum ath11k_supported_bw {
37 	ATH11K_BW_20	= 0,
38 	ATH11K_BW_40	= 1,
39 	ATH11K_BW_80	= 2,
40 	ATH11K_BW_160	= 3,
41 };
42 
43 enum wme_ac {
44 	WME_AC_BE,
45 	WME_AC_BK,
46 	WME_AC_VI,
47 	WME_AC_VO,
48 	WME_NUM_AC
49 };
50 
51 #define ATH11K_HT_MCS_MAX	7
52 #define ATH11K_VHT_MCS_MAX	9
53 #define ATH11K_HE_MCS_MAX	11
54 
55 static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
56 {
57 	return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
58 		((tid == 1) || (tid == 2)) ? WME_AC_BK :
59 		((tid == 4) || (tid == 5)) ? WME_AC_VI :
60 		WME_AC_VO);
61 }
62 
63 enum ath11k_skb_flags {
64 	ATH11K_SKB_HW_80211_ENCAP = BIT(0),
65 };
66 
67 struct ath11k_skb_cb {
68 	dma_addr_t paddr;
69 	u8 eid;
70 	u8 flags;
71 	struct ath11k *ar;
72 	struct ieee80211_vif *vif;
73 } __packed;
74 
75 struct ath11k_skb_rxcb {
76 	dma_addr_t paddr;
77 	bool is_first_msdu;
78 	bool is_last_msdu;
79 	bool is_continuation;
80 	struct hal_rx_desc *rx_desc;
81 	u8 err_rel_src;
82 	u8 err_code;
83 	u8 mac_id;
84 	u8 unmapped;
85 	u8 is_frag;
86 	u8 tid;
87 };
88 
89 enum ath11k_hw_rev {
90 	ATH11K_HW_IPQ8074,
91 };
92 
93 enum ath11k_firmware_mode {
94 	/* the default mode, standard 802.11 functionality */
95 	ATH11K_FIRMWARE_MODE_NORMAL,
96 
97 	/* factory tests etc */
98 	ATH11K_FIRMWARE_MODE_FTM,
99 };
100 
101 #define ATH11K_IRQ_NUM_MAX 52
102 #define ATH11K_EXT_IRQ_GRP_NUM_MAX 11
103 #define ATH11K_EXT_IRQ_NUM_MAX	16
104 
105 extern const u8 ath11k_reo_status_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX];
106 extern const u8 ath11k_tx_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX];
107 extern const u8 ath11k_rx_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX];
108 extern const u8 ath11k_rx_err_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX];
109 extern const u8 ath11k_rx_wbm_rel_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX];
110 extern const u8 ath11k_rxdma2host_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX];
111 extern const u8 ath11k_host2rxdma_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX];
112 extern const u8 rx_mon_status_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX];
113 
114 struct ath11k_ext_irq_grp {
115 	struct ath11k_base *ab;
116 	u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
117 	u32 num_irq;
118 	u32 grp_id;
119 	u64 timestamp;
120 	struct napi_struct napi;
121 	struct net_device napi_ndev;
122 };
123 
124 #define HEHANDLE_CAP_PHYINFO_SIZE       3
125 #define HECAP_PHYINFO_SIZE              9
126 #define HECAP_MACINFO_SIZE              5
127 #define HECAP_TXRX_MCS_NSS_SIZE         2
128 #define HECAP_PPET16_PPET8_MAX_SIZE     25
129 
130 #define HE_PPET16_PPET8_SIZE            8
131 
132 /* 802.11ax PPE (PPDU packet Extension) threshold */
133 struct he_ppe_threshold {
134 	u32 numss_m1;
135 	u32 ru_mask;
136 	u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
137 };
138 
139 struct ath11k_he {
140 	u8 hecap_macinfo[HECAP_MACINFO_SIZE];
141 	u32 hecap_rxmcsnssmap;
142 	u32 hecap_txmcsnssmap;
143 	u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
144 	struct he_ppe_threshold   hecap_ppet;
145 	u32 heop_param;
146 };
147 
148 #define MAX_RADIOS 3
149 
150 enum {
151 	WMI_HOST_TP_SCALE_MAX   = 0,
152 	WMI_HOST_TP_SCALE_50    = 1,
153 	WMI_HOST_TP_SCALE_25    = 2,
154 	WMI_HOST_TP_SCALE_12    = 3,
155 	WMI_HOST_TP_SCALE_MIN   = 4,
156 	WMI_HOST_TP_SCALE_SIZE   = 5,
157 };
158 
159 enum ath11k_scan_state {
160 	ATH11K_SCAN_IDLE,
161 	ATH11K_SCAN_STARTING,
162 	ATH11K_SCAN_RUNNING,
163 	ATH11K_SCAN_ABORTING,
164 };
165 
166 enum ath11k_dev_flags {
167 	ATH11K_CAC_RUNNING,
168 	ATH11K_FLAG_CORE_REGISTERED,
169 	ATH11K_FLAG_CRASH_FLUSH,
170 	ATH11K_FLAG_RAW_MODE,
171 	ATH11K_FLAG_HW_CRYPTO_DISABLED,
172 	ATH11K_FLAG_BTCOEX,
173 	ATH11K_FLAG_RECOVERY,
174 	ATH11K_FLAG_UNREGISTERING,
175 	ATH11K_FLAG_REGISTERED,
176 };
177 
178 enum ath11k_monitor_flags {
179 	ATH11K_FLAG_MONITOR_ENABLED,
180 };
181 
182 struct ath11k_vif {
183 	u32 vdev_id;
184 	enum wmi_vdev_type vdev_type;
185 	enum wmi_vdev_subtype vdev_subtype;
186 	u32 beacon_interval;
187 	u32 dtim_period;
188 	u16 ast_hash;
189 	u16 tcl_metadata;
190 	u8 hal_addr_search_flags;
191 	u8 search_type;
192 
193 	struct ath11k *ar;
194 	struct ieee80211_vif *vif;
195 
196 	u16 tx_seq_no;
197 	struct wmi_wmm_params_all_arg wmm_params;
198 	struct list_head list;
199 	union {
200 		struct {
201 			u32 uapsd;
202 		} sta;
203 		struct {
204 			/* 127 stations; wmi limit */
205 			u8 tim_bitmap[16];
206 			u8 tim_len;
207 			u32 ssid_len;
208 			u8 ssid[IEEE80211_MAX_SSID_LEN];
209 			bool hidden_ssid;
210 			/* P2P_IE with NoA attribute for P2P_GO case */
211 			u32 noa_len;
212 			u8 *noa_data;
213 		} ap;
214 	} u;
215 
216 	bool is_started;
217 	bool is_up;
218 	u32 aid;
219 	u8 bssid[ETH_ALEN];
220 	struct cfg80211_bitrate_mask bitrate_mask;
221 	int num_legacy_stations;
222 	int rtscts_prot_mode;
223 	int txpower;
224 };
225 
226 struct ath11k_vif_iter {
227 	u32 vdev_id;
228 	struct ath11k_vif *arvif;
229 };
230 
231 struct ath11k_rx_peer_stats {
232 	u64 num_msdu;
233 	u64 num_mpdu_fcs_ok;
234 	u64 num_mpdu_fcs_err;
235 	u64 tcp_msdu_count;
236 	u64 udp_msdu_count;
237 	u64 other_msdu_count;
238 	u64 ampdu_msdu_count;
239 	u64 non_ampdu_msdu_count;
240 	u64 stbc_count;
241 	u64 beamformed_count;
242 	u64 mcs_count[HAL_RX_MAX_MCS + 1];
243 	u64 nss_count[HAL_RX_MAX_NSS];
244 	u64 bw_count[HAL_RX_BW_MAX];
245 	u64 gi_count[HAL_RX_GI_MAX];
246 	u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
247 	u64 tid_count[IEEE80211_NUM_TIDS + 1];
248 	u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
249 	u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
250 	u64 rx_duration;
251 	u64 dcm_count;
252 	u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
253 };
254 
255 #define ATH11K_HE_MCS_NUM       12
256 #define ATH11K_VHT_MCS_NUM      10
257 #define ATH11K_BW_NUM           4
258 #define ATH11K_NSS_NUM          4
259 #define ATH11K_LEGACY_NUM       12
260 #define ATH11K_GI_NUM           4
261 #define ATH11K_HT_MCS_NUM       32
262 
263 enum ath11k_pkt_rx_err {
264 	ATH11K_PKT_RX_ERR_FCS,
265 	ATH11K_PKT_RX_ERR_TKIP,
266 	ATH11K_PKT_RX_ERR_CRYPT,
267 	ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
268 	ATH11K_PKT_RX_ERR_MAX,
269 };
270 
271 enum ath11k_ampdu_subfrm_num {
272 	ATH11K_AMPDU_SUBFRM_NUM_10,
273 	ATH11K_AMPDU_SUBFRM_NUM_20,
274 	ATH11K_AMPDU_SUBFRM_NUM_30,
275 	ATH11K_AMPDU_SUBFRM_NUM_40,
276 	ATH11K_AMPDU_SUBFRM_NUM_50,
277 	ATH11K_AMPDU_SUBFRM_NUM_60,
278 	ATH11K_AMPDU_SUBFRM_NUM_MORE,
279 	ATH11K_AMPDU_SUBFRM_NUM_MAX,
280 };
281 
282 enum ath11k_amsdu_subfrm_num {
283 	ATH11K_AMSDU_SUBFRM_NUM_1,
284 	ATH11K_AMSDU_SUBFRM_NUM_2,
285 	ATH11K_AMSDU_SUBFRM_NUM_3,
286 	ATH11K_AMSDU_SUBFRM_NUM_4,
287 	ATH11K_AMSDU_SUBFRM_NUM_MORE,
288 	ATH11K_AMSDU_SUBFRM_NUM_MAX,
289 };
290 
291 enum ath11k_counter_type {
292 	ATH11K_COUNTER_TYPE_BYTES,
293 	ATH11K_COUNTER_TYPE_PKTS,
294 	ATH11K_COUNTER_TYPE_MAX,
295 };
296 
297 enum ath11k_stats_type {
298 	ATH11K_STATS_TYPE_SUCC,
299 	ATH11K_STATS_TYPE_FAIL,
300 	ATH11K_STATS_TYPE_RETRY,
301 	ATH11K_STATS_TYPE_AMPDU,
302 	ATH11K_STATS_TYPE_MAX,
303 };
304 
305 struct ath11k_htt_data_stats {
306 	u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
307 	u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
308 	u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
309 	u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
310 	u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
311 	u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
312 	u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
313 };
314 
315 struct ath11k_htt_tx_stats {
316 	struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
317 	u64 tx_duration;
318 	u64 ba_fails;
319 	u64 ack_fails;
320 };
321 
322 struct ath11k_per_ppdu_tx_stats {
323 	u16 succ_pkts;
324 	u16 failed_pkts;
325 	u16 retry_pkts;
326 	u32 succ_bytes;
327 	u32 failed_bytes;
328 	u32 retry_bytes;
329 };
330 
331 struct ath11k_sta {
332 	struct ath11k_vif *arvif;
333 
334 	/* the following are protected by ar->data_lock */
335 	u32 changed; /* IEEE80211_RC_* */
336 	u32 bw;
337 	u32 nss;
338 	u32 smps;
339 	enum hal_pn_type pn_type;
340 
341 	struct work_struct update_wk;
342 	struct rate_info txrate;
343 	struct rate_info last_txrate;
344 	u64 rx_duration;
345 	u64 tx_duration;
346 	u8 rssi_comb;
347 	struct ath11k_htt_tx_stats *tx_stats;
348 	struct ath11k_rx_peer_stats *rx_stats;
349 
350 #ifdef CONFIG_MAC80211_DEBUGFS
351 	/* protected by conf_mutex */
352 	bool aggr_mode;
353 #endif
354 };
355 
356 #define ATH11K_NUM_CHANS 41
357 #define ATH11K_MAX_5G_CHAN 173
358 
359 enum ath11k_state {
360 	ATH11K_STATE_OFF,
361 	ATH11K_STATE_ON,
362 	ATH11K_STATE_RESTARTING,
363 	ATH11K_STATE_RESTARTED,
364 	ATH11K_STATE_WEDGED,
365 	/* Add other states as required */
366 };
367 
368 /* Antenna noise floor */
369 #define ATH11K_DEFAULT_NOISE_FLOOR -95
370 
371 struct ath11k_fw_stats {
372 	struct dentry *debugfs_fwstats;
373 	u32 pdev_id;
374 	u32 stats_id;
375 	struct list_head pdevs;
376 	struct list_head vdevs;
377 	struct list_head bcn;
378 };
379 
380 struct ath11k_dbg_htt_stats {
381 	u8 type;
382 	u8 reset;
383 	struct debug_htt_stats_req *stats_req;
384 	/* protects shared stats req buffer */
385 	spinlock_t lock;
386 };
387 
388 struct ath11k_debug {
389 	struct dentry *debugfs_pdev;
390 	struct ath11k_dbg_htt_stats htt_stats;
391 	u32 extd_tx_stats;
392 	struct ath11k_fw_stats fw_stats;
393 	struct completion fw_stats_complete;
394 	bool fw_stats_done;
395 	u32 extd_rx_stats;
396 	u32 pktlog_filter;
397 	u32 pktlog_mode;
398 	u32 pktlog_peer_valid;
399 	u8 pktlog_peer_addr[ETH_ALEN];
400 	u32 rx_filter;
401 };
402 
403 struct ath11k_per_peer_tx_stats {
404 	u32 succ_bytes;
405 	u32 retry_bytes;
406 	u32 failed_bytes;
407 	u16 succ_pkts;
408 	u16 retry_pkts;
409 	u16 failed_pkts;
410 	u32 duration;
411 	u8 ba_fails;
412 	bool is_ampdu;
413 };
414 
415 #define ATH11K_FLUSH_TIMEOUT (5 * HZ)
416 
417 struct ath11k_vdev_stop_status {
418 	bool stop_in_progress;
419 	u32  vdev_id;
420 };
421 
422 struct ath11k {
423 	struct ath11k_base *ab;
424 	struct ath11k_pdev *pdev;
425 	struct ieee80211_hw *hw;
426 	struct ieee80211_ops *ops;
427 	struct ath11k_pdev_wmi *wmi;
428 	struct ath11k_pdev_dp dp;
429 	u8 mac_addr[ETH_ALEN];
430 	u32 ht_cap_info;
431 	u32 vht_cap_info;
432 	struct ath11k_he ar_he;
433 	enum ath11k_state state;
434 	struct {
435 		struct completion started;
436 		struct completion completed;
437 		struct completion on_channel;
438 		struct delayed_work timeout;
439 		enum ath11k_scan_state state;
440 		bool is_roc;
441 		int vdev_id;
442 		int roc_freq;
443 		bool roc_notify;
444 	} scan;
445 
446 	struct {
447 		struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
448 		struct ieee80211_sband_iftype_data
449 			iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
450 	} mac;
451 	unsigned long dev_flags;
452 	unsigned int filter_flags;
453 	unsigned long monitor_flags;
454 	u32 min_tx_power;
455 	u32 max_tx_power;
456 	u32 txpower_limit_2g;
457 	u32 txpower_limit_5g;
458 	u32 txpower_scale;
459 	u32 power_scale;
460 	u32 chan_tx_pwr;
461 	u32 num_stations;
462 	u32 max_num_stations;
463 	bool monitor_present;
464 	/* To synchronize concurrent synchronous mac80211 callback operations,
465 	 * concurrent debugfs configuration and concurrent FW statistics events.
466 	 */
467 	struct mutex conf_mutex;
468 	/* protects the radio specific data like debug stats, ppdu_stats_info stats,
469 	 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
470 	 * channel context data, survey info, test mode data.
471 	 */
472 	spinlock_t data_lock;
473 
474 	struct list_head arvifs;
475 	/* should never be NULL; needed for regular htt rx */
476 	struct ieee80211_channel *rx_channel;
477 
478 	/* valid during scan; needed for mgmt rx during scan */
479 	struct ieee80211_channel *scan_channel;
480 
481 	u8 cfg_tx_chainmask;
482 	u8 cfg_rx_chainmask;
483 	u8 num_rx_chains;
484 	u8 num_tx_chains;
485 	/* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
486 	u8 pdev_idx;
487 	u8 lmac_id;
488 
489 	struct completion peer_assoc_done;
490 
491 	int install_key_status;
492 	struct completion install_key_done;
493 
494 	int last_wmi_vdev_start_status;
495 	struct ath11k_vdev_stop_status vdev_stop_status;
496 	struct completion vdev_setup_done;
497 
498 	int num_peers;
499 	int max_num_peers;
500 	u32 num_started_vdevs;
501 	u32 num_created_vdevs;
502 	unsigned long long allocated_vdev_map;
503 
504 	struct idr txmgmt_idr;
505 	/* protects txmgmt_idr data */
506 	spinlock_t txmgmt_idr_lock;
507 	atomic_t num_pending_mgmt_tx;
508 
509 	/* cycle count is reported twice for each visited channel during scan.
510 	 * access protected by data_lock
511 	 */
512 	u32 survey_last_rx_clear_count;
513 	u32 survey_last_cycle_count;
514 
515 	/* Channel info events are expected to come in pairs without and with
516 	 * COMPLETE flag set respectively for each channel visit during scan.
517 	 *
518 	 * However there are deviations from this rule. This flag is used to
519 	 * avoid reporting garbage data.
520 	 */
521 	bool ch_info_can_report_survey;
522 	struct survey_info survey[ATH11K_NUM_CHANS];
523 	struct completion bss_survey_done;
524 
525 	struct work_struct regd_update_work;
526 
527 	struct work_struct wmi_mgmt_tx_work;
528 	struct sk_buff_head wmi_mgmt_tx_queue;
529 
530 	struct ath11k_per_peer_tx_stats peer_tx_stats;
531 	struct list_head ppdu_stats_info;
532 	u32 ppdu_stat_list_depth;
533 
534 	struct ath11k_per_peer_tx_stats cached_stats;
535 	u32 last_ppdu_id;
536 	u32 cached_ppdu_id;
537 #ifdef CONFIG_ATH11K_DEBUGFS
538 	struct ath11k_debug debug;
539 #endif
540 	bool dfs_block_radar_events;
541 	struct ath11k_thermal thermal;
542 };
543 
544 struct ath11k_band_cap {
545 	u32 max_bw_supported;
546 	u32 ht_cap_info;
547 	u32 he_cap_info[2];
548 	u32 he_mcs;
549 	u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
550 	struct ath11k_ppe_threshold he_ppet;
551 };
552 
553 struct ath11k_pdev_cap {
554 	u32 supported_bands;
555 	u32 ampdu_density;
556 	u32 vht_cap;
557 	u32 vht_mcs;
558 	u32 he_mcs;
559 	u32 tx_chain_mask;
560 	u32 rx_chain_mask;
561 	u32 tx_chain_mask_shift;
562 	u32 rx_chain_mask_shift;
563 	struct ath11k_band_cap band[NUM_NL80211_BANDS];
564 };
565 
566 struct ath11k_pdev {
567 	struct ath11k *ar;
568 	u32 pdev_id;
569 	struct ath11k_pdev_cap cap;
570 	u8 mac_addr[ETH_ALEN];
571 };
572 
573 struct ath11k_board_data {
574 	const struct firmware *fw;
575 	const void *data;
576 	size_t len;
577 };
578 
579 /* IPQ8074 HW channel counters frequency value in hertz */
580 #define IPQ8074_CC_FREQ_HERTZ 320000
581 
582 struct ath11k_soc_dp_rx_stats {
583 	u32 err_ring_pkts;
584 	u32 invalid_rbm;
585 	u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
586 	u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
587 	u32 hal_reo_error[DP_REO_DST_RING_MAX];
588 };
589 
590 /* Master structure to hold the hw data which may be used in core module */
591 struct ath11k_base {
592 	enum ath11k_hw_rev hw_rev;
593 	struct platform_device *pdev;
594 	struct device *dev;
595 	struct ath11k_qmi qmi;
596 	struct ath11k_wmi_base wmi_ab;
597 	struct completion fw_ready;
598 	struct rproc *tgt_rproc;
599 	int num_radios;
600 	/* HW channel counters frequency value in hertz common to all MACs */
601 	u32 cc_freq_hz;
602 
603 	struct ath11k_htc htc;
604 
605 	struct ath11k_dp dp;
606 
607 	void __iomem *mem;
608 	unsigned long mem_len;
609 
610 	struct {
611 		const struct ath11k_hif_ops *ops;
612 	} hif;
613 
614 	struct ath11k_ce ce;
615 	struct timer_list rx_replenish_retry;
616 	struct ath11k_hal hal;
617 	/* To synchronize core_start/core_stop */
618 	struct mutex core_lock;
619 	/* Protects data like peers */
620 	spinlock_t base_lock;
621 	struct ath11k_pdev pdevs[MAX_RADIOS];
622 	struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
623 	struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
624 	unsigned long long free_vdev_map;
625 	struct list_head peers;
626 	wait_queue_head_t peer_mapping_wq;
627 	u8 mac_addr[ETH_ALEN];
628 	bool wmi_ready;
629 	u32 wlan_init_status;
630 	int irq_num[ATH11K_IRQ_NUM_MAX];
631 	struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
632 	struct napi_struct *napi;
633 	struct ath11k_targ_cap target_caps;
634 	u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
635 	bool pdevs_macaddr_valid;
636 	int bd_api;
637 	struct ath11k_hw_params hw_params;
638 	const struct firmware *cal_file;
639 
640 	/* Below regd's are protected by ab->data_lock */
641 	/* This is the regd set for every radio
642 	 * by the firmware during initializatin
643 	 */
644 	struct ieee80211_regdomain *default_regd[MAX_RADIOS];
645 	/* This regd is set during dynamic country setting
646 	 * This may or may not be used during the runtime
647 	 */
648 	struct ieee80211_regdomain *new_regd[MAX_RADIOS];
649 
650 	/* Current DFS Regulatory */
651 	enum ath11k_dfs_region dfs_region;
652 #ifdef CONFIG_ATH11K_DEBUGFS
653 	struct dentry *debugfs_soc;
654 	struct dentry *debugfs_ath11k;
655 #endif
656 	struct ath11k_soc_dp_rx_stats soc_stats;
657 
658 	unsigned long dev_flags;
659 	struct completion driver_recovery;
660 	struct workqueue_struct *workqueue;
661 	struct work_struct restart_work;
662 	struct {
663 		/* protected by data_lock */
664 		u32 fw_crash_counter;
665 	} stats;
666 	u32 pktlog_defs_checksum;
667 
668 	/* Round robbin based TCL ring selector */
669 	atomic_t tcl_ring_selector;
670 
671 	/* must be last */
672 	u8 drv_priv[0] __aligned(sizeof(void *));
673 };
674 
675 struct ath11k_fw_stats_pdev {
676 	struct list_head list;
677 
678 	/* PDEV stats */
679 	s32 ch_noise_floor;
680 	/* Cycles spent transmitting frames */
681 	u32 tx_frame_count;
682 	/* Cycles spent receiving frames */
683 	u32 rx_frame_count;
684 	/* Total channel busy time, evidently */
685 	u32 rx_clear_count;
686 	/* Total on-channel time */
687 	u32 cycle_count;
688 	u32 phy_err_count;
689 	u32 chan_tx_power;
690 	u32 ack_rx_bad;
691 	u32 rts_bad;
692 	u32 rts_good;
693 	u32 fcs_bad;
694 	u32 no_beacons;
695 	u32 mib_int_count;
696 
697 	/* PDEV TX stats */
698 	/* Num HTT cookies queued to dispatch list */
699 	s32 comp_queued;
700 	/* Num HTT cookies dispatched */
701 	s32 comp_delivered;
702 	/* Num MSDU queued to WAL */
703 	s32 msdu_enqued;
704 	/* Num MPDU queue to WAL */
705 	s32 mpdu_enqued;
706 	/* Num MSDUs dropped by WMM limit */
707 	s32 wmm_drop;
708 	/* Num Local frames queued */
709 	s32 local_enqued;
710 	/* Num Local frames done */
711 	s32 local_freed;
712 	/* Num queued to HW */
713 	s32 hw_queued;
714 	/* Num PPDU reaped from HW */
715 	s32 hw_reaped;
716 	/* Num underruns */
717 	s32 underrun;
718 	/* Num PPDUs cleaned up in TX abort */
719 	s32 tx_abort;
720 	/* Num MPDUs requed by SW */
721 	s32 mpdus_requed;
722 	/* excessive retries */
723 	u32 tx_ko;
724 	/* data hw rate code */
725 	u32 data_rc;
726 	/* Scheduler self triggers */
727 	u32 self_triggers;
728 	/* frames dropped due to excessive sw retries */
729 	u32 sw_retry_failure;
730 	/* illegal rate phy errors	*/
731 	u32 illgl_rate_phy_err;
732 	/* wal pdev continuous xretry */
733 	u32 pdev_cont_xretry;
734 	/* wal pdev tx timeouts */
735 	u32 pdev_tx_timeout;
736 	/* wal pdev resets */
737 	u32 pdev_resets;
738 	/* frames dropped due to non-availability of stateless TIDs */
739 	u32 stateless_tid_alloc_failure;
740 	/* PhY/BB underrun */
741 	u32 phy_underrun;
742 	/* MPDU is more than txop limit */
743 	u32 txop_ovf;
744 
745 	/* PDEV RX stats */
746 	/* Cnts any change in ring routing mid-ppdu */
747 	s32 mid_ppdu_route_change;
748 	/* Total number of statuses processed */
749 	s32 status_rcvd;
750 	/* Extra frags on rings 0-3 */
751 	s32 r0_frags;
752 	s32 r1_frags;
753 	s32 r2_frags;
754 	s32 r3_frags;
755 	/* MSDUs / MPDUs delivered to HTT */
756 	s32 htt_msdus;
757 	s32 htt_mpdus;
758 	/* MSDUs / MPDUs delivered to local stack */
759 	s32 loc_msdus;
760 	s32 loc_mpdus;
761 	/* AMSDUs that have more MSDUs than the status ring size */
762 	s32 oversize_amsdu;
763 	/* Number of PHY errors */
764 	s32 phy_errs;
765 	/* Number of PHY errors drops */
766 	s32 phy_err_drop;
767 	/* Number of mpdu errors - FCS, MIC, ENC etc. */
768 	s32 mpdu_errs;
769 };
770 
771 struct ath11k_fw_stats_vdev {
772 	struct list_head list;
773 
774 	u32 vdev_id;
775 	u32 beacon_snr;
776 	u32 data_snr;
777 	u32 num_tx_frames[WLAN_MAX_AC];
778 	u32 num_rx_frames;
779 	u32 num_tx_frames_retries[WLAN_MAX_AC];
780 	u32 num_tx_frames_failures[WLAN_MAX_AC];
781 	u32 num_rts_fail;
782 	u32 num_rts_success;
783 	u32 num_rx_err;
784 	u32 num_rx_discard;
785 	u32 num_tx_not_acked;
786 	u32 tx_rate_history[MAX_TX_RATE_VALUES];
787 	u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
788 };
789 
790 struct ath11k_fw_stats_bcn {
791 	struct list_head list;
792 
793 	u32 vdev_id;
794 	u32 tx_bcn_succ_cnt;
795 	u32 tx_bcn_outage_cnt;
796 };
797 
798 void ath11k_peer_unmap_event(struct ath11k_base *ab, u16 peer_id);
799 void ath11k_peer_map_event(struct ath11k_base *ab, u8 vdev_id, u16 peer_id,
800 			   u8 *mac_addr, u16 ast_hash);
801 struct ath11k_peer *ath11k_peer_find(struct ath11k_base *ab, int vdev_id,
802 				     const u8 *addr);
803 struct ath11k_peer *ath11k_peer_find_by_addr(struct ath11k_base *ab,
804 					     const u8 *addr);
805 struct ath11k_peer *ath11k_peer_find_by_id(struct ath11k_base *ab, int peer_id);
806 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
807 int ath11k_core_init(struct ath11k_base *ath11k);
808 void ath11k_core_deinit(struct ath11k_base *ath11k);
809 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
810 				      enum ath11k_bus bus);
811 void ath11k_core_free(struct ath11k_base *ath11k);
812 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
813 			  struct ath11k_board_data *bd);
814 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
815 
816 void ath11k_core_halt(struct ath11k *ar);
817 u8 ath11k_core_get_hw_mac_id(struct ath11k_base *ab, int pdev_idx);
818 
819 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
820 {
821 	switch (state) {
822 	case ATH11K_SCAN_IDLE:
823 		return "idle";
824 	case ATH11K_SCAN_STARTING:
825 		return "starting";
826 	case ATH11K_SCAN_RUNNING:
827 		return "running";
828 	case ATH11K_SCAN_ABORTING:
829 		return "aborting";
830 	}
831 
832 	return "unknown";
833 }
834 
835 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
836 {
837 	return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
838 }
839 
840 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
841 {
842 	BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
843 	return (struct ath11k_skb_rxcb *)skb->cb;
844 }
845 
846 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
847 {
848 	return (struct ath11k_vif *)vif->drv_priv;
849 }
850 
851 #endif /* _CORE_H_ */
852