1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef ATH11K_CORE_H 7 #define ATH11K_CORE_H 8 9 #include <linux/types.h> 10 #include <linux/interrupt.h> 11 #include <linux/irq.h> 12 #include <linux/bitfield.h> 13 #include "qmi.h" 14 #include "htc.h" 15 #include "wmi.h" 16 #include "hal.h" 17 #include "dp.h" 18 #include "ce.h" 19 #include "mac.h" 20 #include "hw.h" 21 #include "hal_rx.h" 22 #include "reg.h" 23 #include "thermal.h" 24 #include "dbring.h" 25 #include "spectral.h" 26 27 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 28 29 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512 30 31 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 32 33 /* Pending management packets threshold for dropping probe responses */ 34 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 35 36 #define ATH11K_INVALID_HW_MAC_ID 0xFF 37 38 extern unsigned int ath11k_frame_mode; 39 40 #define ATH11K_MON_TIMER_INTERVAL 10 41 42 enum ath11k_supported_bw { 43 ATH11K_BW_20 = 0, 44 ATH11K_BW_40 = 1, 45 ATH11K_BW_80 = 2, 46 ATH11K_BW_160 = 3, 47 }; 48 49 enum wme_ac { 50 WME_AC_BE, 51 WME_AC_BK, 52 WME_AC_VI, 53 WME_AC_VO, 54 WME_NUM_AC 55 }; 56 57 #define ATH11K_HT_MCS_MAX 7 58 #define ATH11K_VHT_MCS_MAX 9 59 #define ATH11K_HE_MCS_MAX 11 60 61 enum ath11k_crypt_mode { 62 /* Only use hardware crypto engine */ 63 ATH11K_CRYPT_MODE_HW, 64 /* Only use software crypto */ 65 ATH11K_CRYPT_MODE_SW, 66 }; 67 68 static inline enum wme_ac ath11k_tid_to_ac(u32 tid) 69 { 70 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 71 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 72 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 73 WME_AC_VO); 74 } 75 76 enum ath11k_skb_flags { 77 ATH11K_SKB_HW_80211_ENCAP = BIT(0), 78 ATH11K_SKB_CIPHER_SET = BIT(1), 79 }; 80 81 struct ath11k_skb_cb { 82 dma_addr_t paddr; 83 u8 eid; 84 u8 flags; 85 u32 cipher; 86 struct ath11k *ar; 87 struct ieee80211_vif *vif; 88 } __packed; 89 90 struct ath11k_skb_rxcb { 91 dma_addr_t paddr; 92 bool is_first_msdu; 93 bool is_last_msdu; 94 bool is_continuation; 95 struct hal_rx_desc *rx_desc; 96 u8 err_rel_src; 97 u8 err_code; 98 u8 mac_id; 99 u8 unmapped; 100 u8 is_frag; 101 u8 tid; 102 }; 103 104 enum ath11k_hw_rev { 105 ATH11K_HW_IPQ8074, 106 ATH11K_HW_QCA6390_HW20, 107 ATH11K_HW_IPQ6018_HW10, 108 }; 109 110 enum ath11k_firmware_mode { 111 /* the default mode, standard 802.11 functionality */ 112 ATH11K_FIRMWARE_MODE_NORMAL, 113 114 /* factory tests etc */ 115 ATH11K_FIRMWARE_MODE_FTM, 116 117 /* Cold boot calibration */ 118 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7, 119 }; 120 121 extern bool ath11k_cold_boot_cal; 122 123 #define ATH11K_IRQ_NUM_MAX 52 124 #define ATH11K_EXT_IRQ_NUM_MAX 16 125 126 struct ath11k_ext_irq_grp { 127 struct ath11k_base *ab; 128 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX]; 129 u32 num_irq; 130 u32 grp_id; 131 u64 timestamp; 132 struct napi_struct napi; 133 struct net_device napi_ndev; 134 }; 135 136 #define HEHANDLE_CAP_PHYINFO_SIZE 3 137 #define HECAP_PHYINFO_SIZE 9 138 #define HECAP_MACINFO_SIZE 5 139 #define HECAP_TXRX_MCS_NSS_SIZE 2 140 #define HECAP_PPET16_PPET8_MAX_SIZE 25 141 142 #define HE_PPET16_PPET8_SIZE 8 143 144 /* 802.11ax PPE (PPDU packet Extension) threshold */ 145 struct he_ppe_threshold { 146 u32 numss_m1; 147 u32 ru_mask; 148 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 149 }; 150 151 struct ath11k_he { 152 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 153 u32 hecap_rxmcsnssmap; 154 u32 hecap_txmcsnssmap; 155 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 156 struct he_ppe_threshold hecap_ppet; 157 u32 heop_param; 158 }; 159 160 #define MAX_RADIOS 3 161 162 enum { 163 WMI_HOST_TP_SCALE_MAX = 0, 164 WMI_HOST_TP_SCALE_50 = 1, 165 WMI_HOST_TP_SCALE_25 = 2, 166 WMI_HOST_TP_SCALE_12 = 3, 167 WMI_HOST_TP_SCALE_MIN = 4, 168 WMI_HOST_TP_SCALE_SIZE = 5, 169 }; 170 171 enum ath11k_scan_state { 172 ATH11K_SCAN_IDLE, 173 ATH11K_SCAN_STARTING, 174 ATH11K_SCAN_RUNNING, 175 ATH11K_SCAN_ABORTING, 176 }; 177 178 enum ath11k_dev_flags { 179 ATH11K_CAC_RUNNING, 180 ATH11K_FLAG_CORE_REGISTERED, 181 ATH11K_FLAG_CRASH_FLUSH, 182 ATH11K_FLAG_RAW_MODE, 183 ATH11K_FLAG_HW_CRYPTO_DISABLED, 184 ATH11K_FLAG_BTCOEX, 185 ATH11K_FLAG_RECOVERY, 186 ATH11K_FLAG_UNREGISTERING, 187 ATH11K_FLAG_REGISTERED, 188 ATH11K_FLAG_QMI_FAIL, 189 ATH11K_FLAG_HTC_SUSPEND_COMPLETE, 190 }; 191 192 enum ath11k_monitor_flags { 193 ATH11K_FLAG_MONITOR_ENABLED, 194 }; 195 196 struct ath11k_vif { 197 u32 vdev_id; 198 enum wmi_vdev_type vdev_type; 199 enum wmi_vdev_subtype vdev_subtype; 200 u32 beacon_interval; 201 u32 dtim_period; 202 u16 ast_hash; 203 u16 tcl_metadata; 204 u8 hal_addr_search_flags; 205 u8 search_type; 206 207 struct ath11k *ar; 208 struct ieee80211_vif *vif; 209 210 u16 tx_seq_no; 211 struct wmi_wmm_params_all_arg wmm_params; 212 struct list_head list; 213 union { 214 struct { 215 u32 uapsd; 216 } sta; 217 struct { 218 /* 127 stations; wmi limit */ 219 u8 tim_bitmap[16]; 220 u8 tim_len; 221 u32 ssid_len; 222 u8 ssid[IEEE80211_MAX_SSID_LEN]; 223 bool hidden_ssid; 224 /* P2P_IE with NoA attribute for P2P_GO case */ 225 u32 noa_len; 226 u8 *noa_data; 227 } ap; 228 } u; 229 230 bool is_started; 231 bool is_up; 232 bool spectral_enabled; 233 u32 aid; 234 u8 bssid[ETH_ALEN]; 235 struct cfg80211_bitrate_mask bitrate_mask; 236 int num_legacy_stations; 237 int rtscts_prot_mode; 238 int txpower; 239 bool rsnie_present; 240 bool wpaie_present; 241 struct ieee80211_chanctx_conf chanctx; 242 }; 243 244 struct ath11k_vif_iter { 245 u32 vdev_id; 246 struct ath11k_vif *arvif; 247 }; 248 249 struct ath11k_rx_peer_stats { 250 u64 num_msdu; 251 u64 num_mpdu_fcs_ok; 252 u64 num_mpdu_fcs_err; 253 u64 tcp_msdu_count; 254 u64 udp_msdu_count; 255 u64 other_msdu_count; 256 u64 ampdu_msdu_count; 257 u64 non_ampdu_msdu_count; 258 u64 stbc_count; 259 u64 beamformed_count; 260 u64 mcs_count[HAL_RX_MAX_MCS + 1]; 261 u64 nss_count[HAL_RX_MAX_NSS]; 262 u64 bw_count[HAL_RX_BW_MAX]; 263 u64 gi_count[HAL_RX_GI_MAX]; 264 u64 coding_count[HAL_RX_SU_MU_CODING_MAX]; 265 u64 tid_count[IEEE80211_NUM_TIDS + 1]; 266 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 267 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 268 u64 rx_duration; 269 u64 dcm_count; 270 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 271 }; 272 273 #define ATH11K_HE_MCS_NUM 12 274 #define ATH11K_VHT_MCS_NUM 10 275 #define ATH11K_BW_NUM 4 276 #define ATH11K_NSS_NUM 4 277 #define ATH11K_LEGACY_NUM 12 278 #define ATH11K_GI_NUM 4 279 #define ATH11K_HT_MCS_NUM 32 280 281 enum ath11k_pkt_rx_err { 282 ATH11K_PKT_RX_ERR_FCS, 283 ATH11K_PKT_RX_ERR_TKIP, 284 ATH11K_PKT_RX_ERR_CRYPT, 285 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL, 286 ATH11K_PKT_RX_ERR_MAX, 287 }; 288 289 enum ath11k_ampdu_subfrm_num { 290 ATH11K_AMPDU_SUBFRM_NUM_10, 291 ATH11K_AMPDU_SUBFRM_NUM_20, 292 ATH11K_AMPDU_SUBFRM_NUM_30, 293 ATH11K_AMPDU_SUBFRM_NUM_40, 294 ATH11K_AMPDU_SUBFRM_NUM_50, 295 ATH11K_AMPDU_SUBFRM_NUM_60, 296 ATH11K_AMPDU_SUBFRM_NUM_MORE, 297 ATH11K_AMPDU_SUBFRM_NUM_MAX, 298 }; 299 300 enum ath11k_amsdu_subfrm_num { 301 ATH11K_AMSDU_SUBFRM_NUM_1, 302 ATH11K_AMSDU_SUBFRM_NUM_2, 303 ATH11K_AMSDU_SUBFRM_NUM_3, 304 ATH11K_AMSDU_SUBFRM_NUM_4, 305 ATH11K_AMSDU_SUBFRM_NUM_MORE, 306 ATH11K_AMSDU_SUBFRM_NUM_MAX, 307 }; 308 309 enum ath11k_counter_type { 310 ATH11K_COUNTER_TYPE_BYTES, 311 ATH11K_COUNTER_TYPE_PKTS, 312 ATH11K_COUNTER_TYPE_MAX, 313 }; 314 315 enum ath11k_stats_type { 316 ATH11K_STATS_TYPE_SUCC, 317 ATH11K_STATS_TYPE_FAIL, 318 ATH11K_STATS_TYPE_RETRY, 319 ATH11K_STATS_TYPE_AMPDU, 320 ATH11K_STATS_TYPE_MAX, 321 }; 322 323 struct ath11k_htt_data_stats { 324 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM]; 325 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM]; 326 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM]; 327 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM]; 328 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM]; 329 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM]; 330 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM]; 331 }; 332 333 struct ath11k_htt_tx_stats { 334 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX]; 335 u64 tx_duration; 336 u64 ba_fails; 337 u64 ack_fails; 338 }; 339 340 struct ath11k_per_ppdu_tx_stats { 341 u16 succ_pkts; 342 u16 failed_pkts; 343 u16 retry_pkts; 344 u32 succ_bytes; 345 u32 failed_bytes; 346 u32 retry_bytes; 347 }; 348 349 struct ath11k_sta { 350 struct ath11k_vif *arvif; 351 352 /* the following are protected by ar->data_lock */ 353 u32 changed; /* IEEE80211_RC_* */ 354 u32 bw; 355 u32 nss; 356 u32 smps; 357 enum hal_pn_type pn_type; 358 359 struct work_struct update_wk; 360 struct rate_info txrate; 361 struct rate_info last_txrate; 362 u64 rx_duration; 363 u64 tx_duration; 364 u8 rssi_comb; 365 struct ath11k_htt_tx_stats *tx_stats; 366 struct ath11k_rx_peer_stats *rx_stats; 367 368 #ifdef CONFIG_MAC80211_DEBUGFS 369 /* protected by conf_mutex */ 370 bool aggr_mode; 371 #endif 372 }; 373 374 #define ATH11K_MIN_5G_FREQ 4150 375 #define ATH11K_MIN_6G_FREQ 5945 376 #define ATH11K_MAX_6G_FREQ 7115 377 #define ATH11K_NUM_CHANS 100 378 #define ATH11K_MAX_5G_CHAN 173 379 380 enum ath11k_state { 381 ATH11K_STATE_OFF, 382 ATH11K_STATE_ON, 383 ATH11K_STATE_RESTARTING, 384 ATH11K_STATE_RESTARTED, 385 ATH11K_STATE_WEDGED, 386 /* Add other states as required */ 387 }; 388 389 /* Antenna noise floor */ 390 #define ATH11K_DEFAULT_NOISE_FLOOR -95 391 392 struct ath11k_fw_stats { 393 struct dentry *debugfs_fwstats; 394 u32 pdev_id; 395 u32 stats_id; 396 struct list_head pdevs; 397 struct list_head vdevs; 398 struct list_head bcn; 399 }; 400 401 struct ath11k_dbg_htt_stats { 402 u8 type; 403 u8 reset; 404 struct debug_htt_stats_req *stats_req; 405 /* protects shared stats req buffer */ 406 spinlock_t lock; 407 }; 408 409 struct ath11k_debug { 410 struct dentry *debugfs_pdev; 411 struct ath11k_dbg_htt_stats htt_stats; 412 u32 extd_tx_stats; 413 struct ath11k_fw_stats fw_stats; 414 struct completion fw_stats_complete; 415 bool fw_stats_done; 416 u32 extd_rx_stats; 417 u32 pktlog_filter; 418 u32 pktlog_mode; 419 u32 pktlog_peer_valid; 420 u8 pktlog_peer_addr[ETH_ALEN]; 421 u32 rx_filter; 422 }; 423 424 struct ath11k_per_peer_tx_stats { 425 u32 succ_bytes; 426 u32 retry_bytes; 427 u32 failed_bytes; 428 u16 succ_pkts; 429 u16 retry_pkts; 430 u16 failed_pkts; 431 u32 duration; 432 u8 ba_fails; 433 bool is_ampdu; 434 }; 435 436 #define ATH11K_FLUSH_TIMEOUT (5 * HZ) 437 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 438 439 struct ath11k { 440 struct ath11k_base *ab; 441 struct ath11k_pdev *pdev; 442 struct ieee80211_hw *hw; 443 struct ieee80211_ops *ops; 444 struct ath11k_pdev_wmi *wmi; 445 struct ath11k_pdev_dp dp; 446 u8 mac_addr[ETH_ALEN]; 447 u32 ht_cap_info; 448 u32 vht_cap_info; 449 struct ath11k_he ar_he; 450 enum ath11k_state state; 451 bool supports_6ghz; 452 struct { 453 struct completion started; 454 struct completion completed; 455 struct completion on_channel; 456 struct delayed_work timeout; 457 enum ath11k_scan_state state; 458 bool is_roc; 459 int vdev_id; 460 int roc_freq; 461 bool roc_notify; 462 } scan; 463 464 struct { 465 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 466 struct ieee80211_sband_iftype_data 467 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 468 } mac; 469 470 unsigned long dev_flags; 471 unsigned int filter_flags; 472 unsigned long monitor_flags; 473 u32 min_tx_power; 474 u32 max_tx_power; 475 u32 txpower_limit_2g; 476 u32 txpower_limit_5g; 477 u32 txpower_scale; 478 u32 power_scale; 479 u32 chan_tx_pwr; 480 u32 num_stations; 481 u32 max_num_stations; 482 bool monitor_present; 483 /* To synchronize concurrent synchronous mac80211 callback operations, 484 * concurrent debugfs configuration and concurrent FW statistics events. 485 */ 486 struct mutex conf_mutex; 487 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 488 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info, 489 * channel context data, survey info, test mode data. 490 */ 491 spinlock_t data_lock; 492 493 struct list_head arvifs; 494 /* should never be NULL; needed for regular htt rx */ 495 struct ieee80211_channel *rx_channel; 496 497 /* valid during scan; needed for mgmt rx during scan */ 498 struct ieee80211_channel *scan_channel; 499 500 u8 cfg_tx_chainmask; 501 u8 cfg_rx_chainmask; 502 u8 num_rx_chains; 503 u8 num_tx_chains; 504 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 505 u8 pdev_idx; 506 u8 lmac_id; 507 508 struct completion peer_assoc_done; 509 struct completion peer_delete_done; 510 511 int install_key_status; 512 struct completion install_key_done; 513 514 int last_wmi_vdev_start_status; 515 struct completion vdev_setup_done; 516 struct completion vdev_delete_done; 517 518 int num_peers; 519 int max_num_peers; 520 u32 num_started_vdevs; 521 u32 num_created_vdevs; 522 unsigned long long allocated_vdev_map; 523 524 struct idr txmgmt_idr; 525 /* protects txmgmt_idr data */ 526 spinlock_t txmgmt_idr_lock; 527 atomic_t num_pending_mgmt_tx; 528 529 /* cycle count is reported twice for each visited channel during scan. 530 * access protected by data_lock 531 */ 532 u32 survey_last_rx_clear_count; 533 u32 survey_last_cycle_count; 534 535 /* Channel info events are expected to come in pairs without and with 536 * COMPLETE flag set respectively for each channel visit during scan. 537 * 538 * However there are deviations from this rule. This flag is used to 539 * avoid reporting garbage data. 540 */ 541 bool ch_info_can_report_survey; 542 struct survey_info survey[ATH11K_NUM_CHANS]; 543 struct completion bss_survey_done; 544 545 struct work_struct regd_update_work; 546 547 struct work_struct wmi_mgmt_tx_work; 548 struct sk_buff_head wmi_mgmt_tx_queue; 549 550 struct ath11k_per_peer_tx_stats peer_tx_stats; 551 struct list_head ppdu_stats_info; 552 u32 ppdu_stat_list_depth; 553 554 struct ath11k_per_peer_tx_stats cached_stats; 555 u32 last_ppdu_id; 556 u32 cached_ppdu_id; 557 #ifdef CONFIG_ATH11K_DEBUGFS 558 struct ath11k_debug debug; 559 #endif 560 #ifdef CONFIG_ATH11K_SPECTRAL 561 struct ath11k_spectral spectral; 562 #endif 563 bool dfs_block_radar_events; 564 struct ath11k_thermal thermal; 565 }; 566 567 struct ath11k_band_cap { 568 u32 phy_id; 569 u32 max_bw_supported; 570 u32 ht_cap_info; 571 u32 he_cap_info[2]; 572 u32 he_mcs; 573 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 574 struct ath11k_ppe_threshold he_ppet; 575 u16 he_6ghz_capa; 576 }; 577 578 struct ath11k_pdev_cap { 579 u32 supported_bands; 580 u32 ampdu_density; 581 u32 vht_cap; 582 u32 vht_mcs; 583 u32 he_mcs; 584 u32 tx_chain_mask; 585 u32 rx_chain_mask; 586 u32 tx_chain_mask_shift; 587 u32 rx_chain_mask_shift; 588 struct ath11k_band_cap band[NUM_NL80211_BANDS]; 589 }; 590 591 struct ath11k_pdev { 592 struct ath11k *ar; 593 u32 pdev_id; 594 struct ath11k_pdev_cap cap; 595 u8 mac_addr[ETH_ALEN]; 596 }; 597 598 struct ath11k_board_data { 599 const struct firmware *fw; 600 const void *data; 601 size_t len; 602 }; 603 604 struct ath11k_bus_params { 605 bool mhi_support; 606 bool m3_fw_support; 607 bool fixed_bdf_addr; 608 bool fixed_mem_region; 609 }; 610 611 /* IPQ8074 HW channel counters frequency value in hertz */ 612 #define IPQ8074_CC_FREQ_HERTZ 320000 613 614 struct ath11k_bp_stats { 615 /* Head Pointer reported by the last HTT Backpressure event for the ring */ 616 u16 hp; 617 618 /* Tail Pointer reported by the last HTT Backpressure event for the ring */ 619 u16 tp; 620 621 /* Number of Backpressure events received for the ring */ 622 u32 count; 623 624 /* Last recorded event timestamp */ 625 unsigned long jiffies; 626 }; 627 628 struct ath11k_dp_ring_bp_stats { 629 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX]; 630 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS]; 631 }; 632 633 struct ath11k_soc_dp_tx_err_stats { 634 /* TCL Ring Descriptor unavailable */ 635 u32 desc_na[DP_TCL_NUM_RING_MAX]; 636 /* Other failures during dp_tx due to mem allocation failure 637 * idr unavailable etc. 638 */ 639 atomic_t misc_fail; 640 }; 641 642 struct ath11k_soc_dp_stats { 643 u32 err_ring_pkts; 644 u32 invalid_rbm; 645 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; 646 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; 647 u32 hal_reo_error[DP_REO_DST_RING_MAX]; 648 struct ath11k_soc_dp_tx_err_stats tx_err; 649 struct ath11k_dp_ring_bp_stats bp_stats; 650 }; 651 652 /* Master structure to hold the hw data which may be used in core module */ 653 struct ath11k_base { 654 enum ath11k_hw_rev hw_rev; 655 struct platform_device *pdev; 656 struct device *dev; 657 struct ath11k_qmi qmi; 658 struct ath11k_wmi_base wmi_ab; 659 struct completion fw_ready; 660 int num_radios; 661 /* HW channel counters frequency value in hertz common to all MACs */ 662 u32 cc_freq_hz; 663 664 struct ath11k_htc htc; 665 666 struct ath11k_dp dp; 667 668 void __iomem *mem; 669 unsigned long mem_len; 670 671 struct { 672 enum ath11k_bus bus; 673 const struct ath11k_hif_ops *ops; 674 } hif; 675 676 struct { 677 struct completion wakeup_completed; 678 } wow; 679 680 struct ath11k_ce ce; 681 struct timer_list rx_replenish_retry; 682 struct ath11k_hal hal; 683 /* To synchronize core_start/core_stop */ 684 struct mutex core_lock; 685 /* Protects data like peers */ 686 spinlock_t base_lock; 687 struct ath11k_pdev pdevs[MAX_RADIOS]; 688 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS]; 689 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS]; 690 unsigned long long free_vdev_map; 691 struct list_head peers; 692 wait_queue_head_t peer_mapping_wq; 693 u8 mac_addr[ETH_ALEN]; 694 bool wmi_ready; 695 u32 wlan_init_status; 696 int irq_num[ATH11K_IRQ_NUM_MAX]; 697 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 698 struct napi_struct *napi; 699 struct ath11k_targ_cap target_caps; 700 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 701 bool pdevs_macaddr_valid; 702 int bd_api; 703 704 struct ath11k_hw_params hw_params; 705 struct ath11k_bus_params bus_params; 706 707 const struct firmware *cal_file; 708 709 /* Below regd's are protected by ab->data_lock */ 710 /* This is the regd set for every radio 711 * by the firmware during initializatin 712 */ 713 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 714 /* This regd is set during dynamic country setting 715 * This may or may not be used during the runtime 716 */ 717 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 718 719 /* Current DFS Regulatory */ 720 enum ath11k_dfs_region dfs_region; 721 #ifdef CONFIG_ATH11K_DEBUGFS 722 struct dentry *debugfs_soc; 723 struct dentry *debugfs_ath11k; 724 #endif 725 struct ath11k_soc_dp_stats soc_stats; 726 727 unsigned long dev_flags; 728 struct completion driver_recovery; 729 struct workqueue_struct *workqueue; 730 struct work_struct restart_work; 731 struct { 732 /* protected by data_lock */ 733 u32 fw_crash_counter; 734 } stats; 735 u32 pktlog_defs_checksum; 736 737 struct ath11k_dbring_cap *db_caps; 738 u32 num_db_cap; 739 740 struct timer_list mon_reap_timer; 741 742 struct completion htc_suspend; 743 744 /* must be last */ 745 u8 drv_priv[0] __aligned(sizeof(void *)); 746 }; 747 748 struct ath11k_fw_stats_pdev { 749 struct list_head list; 750 751 /* PDEV stats */ 752 s32 ch_noise_floor; 753 /* Cycles spent transmitting frames */ 754 u32 tx_frame_count; 755 /* Cycles spent receiving frames */ 756 u32 rx_frame_count; 757 /* Total channel busy time, evidently */ 758 u32 rx_clear_count; 759 /* Total on-channel time */ 760 u32 cycle_count; 761 u32 phy_err_count; 762 u32 chan_tx_power; 763 u32 ack_rx_bad; 764 u32 rts_bad; 765 u32 rts_good; 766 u32 fcs_bad; 767 u32 no_beacons; 768 u32 mib_int_count; 769 770 /* PDEV TX stats */ 771 /* Num HTT cookies queued to dispatch list */ 772 s32 comp_queued; 773 /* Num HTT cookies dispatched */ 774 s32 comp_delivered; 775 /* Num MSDU queued to WAL */ 776 s32 msdu_enqued; 777 /* Num MPDU queue to WAL */ 778 s32 mpdu_enqued; 779 /* Num MSDUs dropped by WMM limit */ 780 s32 wmm_drop; 781 /* Num Local frames queued */ 782 s32 local_enqued; 783 /* Num Local frames done */ 784 s32 local_freed; 785 /* Num queued to HW */ 786 s32 hw_queued; 787 /* Num PPDU reaped from HW */ 788 s32 hw_reaped; 789 /* Num underruns */ 790 s32 underrun; 791 /* Num PPDUs cleaned up in TX abort */ 792 s32 tx_abort; 793 /* Num MPDUs requed by SW */ 794 s32 mpdus_requed; 795 /* excessive retries */ 796 u32 tx_ko; 797 /* data hw rate code */ 798 u32 data_rc; 799 /* Scheduler self triggers */ 800 u32 self_triggers; 801 /* frames dropped due to excessive sw retries */ 802 u32 sw_retry_failure; 803 /* illegal rate phy errors */ 804 u32 illgl_rate_phy_err; 805 /* wal pdev continuous xretry */ 806 u32 pdev_cont_xretry; 807 /* wal pdev tx timeouts */ 808 u32 pdev_tx_timeout; 809 /* wal pdev resets */ 810 u32 pdev_resets; 811 /* frames dropped due to non-availability of stateless TIDs */ 812 u32 stateless_tid_alloc_failure; 813 /* PhY/BB underrun */ 814 u32 phy_underrun; 815 /* MPDU is more than txop limit */ 816 u32 txop_ovf; 817 818 /* PDEV RX stats */ 819 /* Cnts any change in ring routing mid-ppdu */ 820 s32 mid_ppdu_route_change; 821 /* Total number of statuses processed */ 822 s32 status_rcvd; 823 /* Extra frags on rings 0-3 */ 824 s32 r0_frags; 825 s32 r1_frags; 826 s32 r2_frags; 827 s32 r3_frags; 828 /* MSDUs / MPDUs delivered to HTT */ 829 s32 htt_msdus; 830 s32 htt_mpdus; 831 /* MSDUs / MPDUs delivered to local stack */ 832 s32 loc_msdus; 833 s32 loc_mpdus; 834 /* AMSDUs that have more MSDUs than the status ring size */ 835 s32 oversize_amsdu; 836 /* Number of PHY errors */ 837 s32 phy_errs; 838 /* Number of PHY errors drops */ 839 s32 phy_err_drop; 840 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 841 s32 mpdu_errs; 842 }; 843 844 struct ath11k_fw_stats_vdev { 845 struct list_head list; 846 847 u32 vdev_id; 848 u32 beacon_snr; 849 u32 data_snr; 850 u32 num_tx_frames[WLAN_MAX_AC]; 851 u32 num_rx_frames; 852 u32 num_tx_frames_retries[WLAN_MAX_AC]; 853 u32 num_tx_frames_failures[WLAN_MAX_AC]; 854 u32 num_rts_fail; 855 u32 num_rts_success; 856 u32 num_rx_err; 857 u32 num_rx_discard; 858 u32 num_tx_not_acked; 859 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 860 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 861 }; 862 863 struct ath11k_fw_stats_bcn { 864 struct list_head list; 865 866 u32 vdev_id; 867 u32 tx_bcn_succ_cnt; 868 u32 tx_bcn_outage_cnt; 869 }; 870 871 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[]; 872 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[]; 873 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[]; 874 875 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[]; 876 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[]; 877 878 void ath11k_peer_unmap_event(struct ath11k_base *ab, u16 peer_id); 879 void ath11k_peer_map_event(struct ath11k_base *ab, u8 vdev_id, u16 peer_id, 880 u8 *mac_addr, u16 ast_hash); 881 struct ath11k_peer *ath11k_peer_find(struct ath11k_base *ab, int vdev_id, 882 const u8 *addr); 883 struct ath11k_peer *ath11k_peer_find_by_addr(struct ath11k_base *ab, 884 const u8 *addr); 885 struct ath11k_peer *ath11k_peer_find_by_id(struct ath11k_base *ab, int peer_id); 886 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab); 887 int ath11k_core_pre_init(struct ath11k_base *ab); 888 int ath11k_core_init(struct ath11k_base *ath11k); 889 void ath11k_core_deinit(struct ath11k_base *ath11k); 890 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size, 891 enum ath11k_bus bus, 892 const struct ath11k_bus_params *bus_params); 893 void ath11k_core_free(struct ath11k_base *ath11k); 894 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k, 895 struct ath11k_board_data *bd); 896 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd); 897 int ath11k_core_check_dt(struct ath11k_base *ath11k); 898 899 void ath11k_core_halt(struct ath11k *ar); 900 int ath11k_core_resume(struct ath11k_base *ab); 901 int ath11k_core_suspend(struct ath11k_base *ab); 902 903 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab, 904 const char *filename); 905 906 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state) 907 { 908 switch (state) { 909 case ATH11K_SCAN_IDLE: 910 return "idle"; 911 case ATH11K_SCAN_STARTING: 912 return "starting"; 913 case ATH11K_SCAN_RUNNING: 914 return "running"; 915 case ATH11K_SCAN_ABORTING: 916 return "aborting"; 917 } 918 919 return "unknown"; 920 } 921 922 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb) 923 { 924 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) > 925 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 926 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 927 } 928 929 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb) 930 { 931 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb)); 932 return (struct ath11k_skb_rxcb *)skb->cb; 933 } 934 935 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif) 936 { 937 return (struct ath11k_vif *)vif->drv_priv; 938 } 939 940 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab, 941 int mac_id) 942 { 943 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar; 944 } 945 946 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab, 947 const char *filename, 948 void *buf, size_t buf_len) 949 { 950 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR, 951 ab->hw_params.fw.dir, filename); 952 } 953 954 static inline const char *ath11k_bus_str(enum ath11k_bus bus) 955 { 956 switch (bus) { 957 case ATH11K_BUS_PCI: 958 return "pci"; 959 case ATH11K_BUS_AHB: 960 return "ahb"; 961 } 962 963 return "unknown"; 964 } 965 966 #endif /* _CORE_H_ */ 967