1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #ifndef ATH11K_CORE_H 8 #define ATH11K_CORE_H 9 10 #include <linux/types.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/bitfield.h> 14 #include <linux/dmi.h> 15 #include <linux/ctype.h> 16 #include <linux/rhashtable.h> 17 #include <linux/average.h> 18 #include "qmi.h" 19 #include "htc.h" 20 #include "wmi.h" 21 #include "hal.h" 22 #include "dp.h" 23 #include "ce.h" 24 #include "mac.h" 25 #include "hw.h" 26 #include "hal_rx.h" 27 #include "reg.h" 28 #include "thermal.h" 29 #include "dbring.h" 30 #include "spectral.h" 31 #include "wow.h" 32 33 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 34 35 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512 36 37 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 38 39 /* Pending management packets threshold for dropping probe responses */ 40 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 41 42 #define ATH11K_INVALID_HW_MAC_ID 0xFF 43 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ) 44 45 /* SMBIOS type containing Board Data File Name Extension */ 46 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8 47 48 /* SMBIOS type structure length (excluding strings-set) */ 49 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9 50 51 /* The magic used by QCA spec */ 52 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_" 53 54 extern unsigned int ath11k_frame_mode; 55 56 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ) 57 58 #define ATH11K_MON_TIMER_INTERVAL 10 59 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ) 60 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3 61 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5 62 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ) 63 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ) 64 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ) 65 66 enum ath11k_supported_bw { 67 ATH11K_BW_20 = 0, 68 ATH11K_BW_40 = 1, 69 ATH11K_BW_80 = 2, 70 ATH11K_BW_160 = 3, 71 }; 72 73 enum ath11k_bdf_search { 74 ATH11K_BDF_SEARCH_DEFAULT, 75 ATH11K_BDF_SEARCH_BUS_AND_BOARD, 76 }; 77 78 enum wme_ac { 79 WME_AC_BE, 80 WME_AC_BK, 81 WME_AC_VI, 82 WME_AC_VO, 83 WME_NUM_AC 84 }; 85 86 #define ATH11K_HT_MCS_MAX 7 87 #define ATH11K_VHT_MCS_MAX 9 88 #define ATH11K_HE_MCS_MAX 11 89 90 enum ath11k_crypt_mode { 91 /* Only use hardware crypto engine */ 92 ATH11K_CRYPT_MODE_HW, 93 /* Only use software crypto */ 94 ATH11K_CRYPT_MODE_SW, 95 }; 96 97 static inline enum wme_ac ath11k_tid_to_ac(u32 tid) 98 { 99 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 100 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 101 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 102 WME_AC_VO); 103 } 104 105 enum ath11k_skb_flags { 106 ATH11K_SKB_HW_80211_ENCAP = BIT(0), 107 ATH11K_SKB_CIPHER_SET = BIT(1), 108 }; 109 110 struct ath11k_skb_cb { 111 dma_addr_t paddr; 112 u8 eid; 113 u8 flags; 114 u32 cipher; 115 struct ath11k *ar; 116 struct ieee80211_vif *vif; 117 } __packed; 118 119 struct ath11k_skb_rxcb { 120 dma_addr_t paddr; 121 bool is_first_msdu; 122 bool is_last_msdu; 123 bool is_continuation; 124 bool is_mcbc; 125 bool is_eapol; 126 struct hal_rx_desc *rx_desc; 127 u8 err_rel_src; 128 u8 err_code; 129 u8 mac_id; 130 u8 unmapped; 131 u8 is_frag; 132 u8 tid; 133 u16 peer_id; 134 u16 seq_no; 135 }; 136 137 enum ath11k_hw_rev { 138 ATH11K_HW_IPQ8074, 139 ATH11K_HW_QCA6390_HW20, 140 ATH11K_HW_IPQ6018_HW10, 141 ATH11K_HW_QCN9074_HW10, 142 ATH11K_HW_WCN6855_HW20, 143 ATH11K_HW_WCN6855_HW21, 144 ATH11K_HW_WCN6750_HW10, 145 ATH11K_HW_IPQ5018_HW10, 146 }; 147 148 enum ath11k_firmware_mode { 149 /* the default mode, standard 802.11 functionality */ 150 ATH11K_FIRMWARE_MODE_NORMAL, 151 152 /* factory tests etc */ 153 ATH11K_FIRMWARE_MODE_FTM, 154 155 /* Cold boot calibration */ 156 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7, 157 }; 158 159 extern bool ath11k_cold_boot_cal; 160 161 #define ATH11K_IRQ_NUM_MAX 52 162 #define ATH11K_EXT_IRQ_NUM_MAX 16 163 164 struct ath11k_ext_irq_grp { 165 struct ath11k_base *ab; 166 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX]; 167 u32 num_irq; 168 u32 grp_id; 169 u64 timestamp; 170 bool napi_enabled; 171 struct napi_struct napi; 172 struct net_device napi_ndev; 173 }; 174 175 enum ath11k_smbios_cc_type { 176 /* disable country code setting from SMBIOS */ 177 ATH11K_SMBIOS_CC_DISABLE = 0, 178 179 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */ 180 ATH11K_SMBIOS_CC_ISO = 1, 181 182 /* worldwide regdomain */ 183 ATH11K_SMBIOS_CC_WW = 2, 184 }; 185 186 struct ath11k_smbios_bdf { 187 struct dmi_header hdr; 188 189 u8 features_disabled; 190 191 /* enum ath11k_smbios_cc_type */ 192 u8 country_code_flag; 193 194 /* To set specific country, you need to set country code 195 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United 196 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'= 197 * 0x53). To set country to INDONESIA, then country code value = 198 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag = 199 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory 200 * setting. 201 */ 202 u16 cc_code; 203 204 u8 bdf_enabled; 205 u8 bdf_ext[]; 206 } __packed; 207 208 #define HEHANDLE_CAP_PHYINFO_SIZE 3 209 #define HECAP_PHYINFO_SIZE 9 210 #define HECAP_MACINFO_SIZE 5 211 #define HECAP_TXRX_MCS_NSS_SIZE 2 212 #define HECAP_PPET16_PPET8_MAX_SIZE 25 213 214 #define HE_PPET16_PPET8_SIZE 8 215 216 /* 802.11ax PPE (PPDU packet Extension) threshold */ 217 struct he_ppe_threshold { 218 u32 numss_m1; 219 u32 ru_mask; 220 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 221 }; 222 223 struct ath11k_he { 224 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 225 u32 hecap_rxmcsnssmap; 226 u32 hecap_txmcsnssmap; 227 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 228 struct he_ppe_threshold hecap_ppet; 229 u32 heop_param; 230 }; 231 232 #define MAX_RADIOS 3 233 234 /* ipq5018 hw param macros */ 235 #define MAX_RADIOS_5018 1 236 #define CE_CNT_5018 6 237 #define TARGET_CE_CNT_5018 9 238 #define SVC_CE_MAP_LEN_5018 17 239 #define RXDMA_PER_PDEV_5018 1 240 241 enum { 242 WMI_HOST_TP_SCALE_MAX = 0, 243 WMI_HOST_TP_SCALE_50 = 1, 244 WMI_HOST_TP_SCALE_25 = 2, 245 WMI_HOST_TP_SCALE_12 = 3, 246 WMI_HOST_TP_SCALE_MIN = 4, 247 WMI_HOST_TP_SCALE_SIZE = 5, 248 }; 249 250 enum ath11k_scan_state { 251 ATH11K_SCAN_IDLE, 252 ATH11K_SCAN_STARTING, 253 ATH11K_SCAN_RUNNING, 254 ATH11K_SCAN_ABORTING, 255 }; 256 257 enum ath11k_11d_state { 258 ATH11K_11D_IDLE, 259 ATH11K_11D_PREPARING, 260 ATH11K_11D_RUNNING, 261 }; 262 263 enum ath11k_dev_flags { 264 ATH11K_CAC_RUNNING, 265 ATH11K_FLAG_CORE_REGISTERED, 266 ATH11K_FLAG_CRASH_FLUSH, 267 ATH11K_FLAG_RAW_MODE, 268 ATH11K_FLAG_HW_CRYPTO_DISABLED, 269 ATH11K_FLAG_BTCOEX, 270 ATH11K_FLAG_RECOVERY, 271 ATH11K_FLAG_UNREGISTERING, 272 ATH11K_FLAG_REGISTERED, 273 ATH11K_FLAG_QMI_FAIL, 274 ATH11K_FLAG_HTC_SUSPEND_COMPLETE, 275 ATH11K_FLAG_CE_IRQ_ENABLED, 276 ATH11K_FLAG_EXT_IRQ_ENABLED, 277 ATH11K_FLAG_FIXED_MEM_RGN, 278 ATH11K_FLAG_DEVICE_INIT_DONE, 279 ATH11K_FLAG_MULTI_MSI_VECTORS, 280 }; 281 282 enum ath11k_monitor_flags { 283 ATH11K_FLAG_MONITOR_CONF_ENABLED, 284 ATH11K_FLAG_MONITOR_STARTED, 285 ATH11K_FLAG_MONITOR_VDEV_CREATED, 286 }; 287 288 #define ATH11K_IPV6_UC_TYPE 0 289 #define ATH11K_IPV6_AC_TYPE 1 290 291 #define ATH11K_IPV6_MAX_COUNT 16 292 #define ATH11K_IPV4_MAX_COUNT 2 293 294 struct ath11k_arp_ns_offload { 295 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4]; 296 u32 ipv4_count; 297 u32 ipv6_count; 298 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16]; 299 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16]; 300 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT]; 301 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT]; 302 u8 mac_addr[ETH_ALEN]; 303 }; 304 305 struct ath11k_rekey_data { 306 u8 kck[NL80211_KCK_LEN]; 307 u8 kek[NL80211_KCK_LEN]; 308 u64 replay_ctr; 309 bool enable_offload; 310 }; 311 312 struct ath11k_vif { 313 u32 vdev_id; 314 enum wmi_vdev_type vdev_type; 315 enum wmi_vdev_subtype vdev_subtype; 316 u32 beacon_interval; 317 u32 dtim_period; 318 u16 ast_hash; 319 u16 ast_idx; 320 u16 tcl_metadata; 321 u8 hal_addr_search_flags; 322 u8 search_type; 323 324 struct ath11k *ar; 325 struct ieee80211_vif *vif; 326 327 u16 tx_seq_no; 328 struct wmi_wmm_params_all_arg wmm_params; 329 struct list_head list; 330 union { 331 struct { 332 u32 uapsd; 333 } sta; 334 struct { 335 /* 127 stations; wmi limit */ 336 u8 tim_bitmap[16]; 337 u8 tim_len; 338 u32 ssid_len; 339 u8 ssid[IEEE80211_MAX_SSID_LEN]; 340 bool hidden_ssid; 341 /* P2P_IE with NoA attribute for P2P_GO case */ 342 u32 noa_len; 343 u8 *noa_data; 344 } ap; 345 } u; 346 347 bool is_started; 348 bool is_up; 349 bool ftm_responder; 350 bool spectral_enabled; 351 bool ps; 352 u32 aid; 353 u8 bssid[ETH_ALEN]; 354 struct cfg80211_bitrate_mask bitrate_mask; 355 struct delayed_work connection_loss_work; 356 int num_legacy_stations; 357 int rtscts_prot_mode; 358 int txpower; 359 bool rsnie_present; 360 bool wpaie_present; 361 bool bcca_zero_sent; 362 bool do_not_send_tmpl; 363 struct ieee80211_chanctx_conf chanctx; 364 struct ath11k_arp_ns_offload arp_ns_offload; 365 struct ath11k_rekey_data rekey_data; 366 367 #ifdef CONFIG_ATH11K_DEBUGFS 368 struct dentry *debugfs_twt; 369 #endif /* CONFIG_ATH11K_DEBUGFS */ 370 }; 371 372 struct ath11k_vif_iter { 373 u32 vdev_id; 374 struct ath11k_vif *arvif; 375 }; 376 377 struct ath11k_rx_peer_stats { 378 u64 num_msdu; 379 u64 num_mpdu_fcs_ok; 380 u64 num_mpdu_fcs_err; 381 u64 tcp_msdu_count; 382 u64 udp_msdu_count; 383 u64 other_msdu_count; 384 u64 ampdu_msdu_count; 385 u64 non_ampdu_msdu_count; 386 u64 stbc_count; 387 u64 beamformed_count; 388 u64 mcs_count[HAL_RX_MAX_MCS + 1]; 389 u64 nss_count[HAL_RX_MAX_NSS]; 390 u64 bw_count[HAL_RX_BW_MAX]; 391 u64 gi_count[HAL_RX_GI_MAX]; 392 u64 coding_count[HAL_RX_SU_MU_CODING_MAX]; 393 u64 tid_count[IEEE80211_NUM_TIDS + 1]; 394 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 395 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 396 u64 rx_duration; 397 u64 dcm_count; 398 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 399 }; 400 401 #define ATH11K_HE_MCS_NUM 12 402 #define ATH11K_VHT_MCS_NUM 10 403 #define ATH11K_BW_NUM 4 404 #define ATH11K_NSS_NUM 4 405 #define ATH11K_LEGACY_NUM 12 406 #define ATH11K_GI_NUM 4 407 #define ATH11K_HT_MCS_NUM 32 408 409 enum ath11k_pkt_rx_err { 410 ATH11K_PKT_RX_ERR_FCS, 411 ATH11K_PKT_RX_ERR_TKIP, 412 ATH11K_PKT_RX_ERR_CRYPT, 413 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL, 414 ATH11K_PKT_RX_ERR_MAX, 415 }; 416 417 enum ath11k_ampdu_subfrm_num { 418 ATH11K_AMPDU_SUBFRM_NUM_10, 419 ATH11K_AMPDU_SUBFRM_NUM_20, 420 ATH11K_AMPDU_SUBFRM_NUM_30, 421 ATH11K_AMPDU_SUBFRM_NUM_40, 422 ATH11K_AMPDU_SUBFRM_NUM_50, 423 ATH11K_AMPDU_SUBFRM_NUM_60, 424 ATH11K_AMPDU_SUBFRM_NUM_MORE, 425 ATH11K_AMPDU_SUBFRM_NUM_MAX, 426 }; 427 428 enum ath11k_amsdu_subfrm_num { 429 ATH11K_AMSDU_SUBFRM_NUM_1, 430 ATH11K_AMSDU_SUBFRM_NUM_2, 431 ATH11K_AMSDU_SUBFRM_NUM_3, 432 ATH11K_AMSDU_SUBFRM_NUM_4, 433 ATH11K_AMSDU_SUBFRM_NUM_MORE, 434 ATH11K_AMSDU_SUBFRM_NUM_MAX, 435 }; 436 437 enum ath11k_counter_type { 438 ATH11K_COUNTER_TYPE_BYTES, 439 ATH11K_COUNTER_TYPE_PKTS, 440 ATH11K_COUNTER_TYPE_MAX, 441 }; 442 443 enum ath11k_stats_type { 444 ATH11K_STATS_TYPE_SUCC, 445 ATH11K_STATS_TYPE_FAIL, 446 ATH11K_STATS_TYPE_RETRY, 447 ATH11K_STATS_TYPE_AMPDU, 448 ATH11K_STATS_TYPE_MAX, 449 }; 450 451 struct ath11k_htt_data_stats { 452 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM]; 453 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM]; 454 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM]; 455 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM]; 456 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM]; 457 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM]; 458 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM]; 459 }; 460 461 struct ath11k_htt_tx_stats { 462 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX]; 463 u64 tx_duration; 464 u64 ba_fails; 465 u64 ack_fails; 466 }; 467 468 struct ath11k_per_ppdu_tx_stats { 469 u16 succ_pkts; 470 u16 failed_pkts; 471 u16 retry_pkts; 472 u32 succ_bytes; 473 u32 failed_bytes; 474 u32 retry_bytes; 475 }; 476 477 DECLARE_EWMA(avg_rssi, 10, 8) 478 479 struct ath11k_sta { 480 struct ath11k_vif *arvif; 481 482 /* the following are protected by ar->data_lock */ 483 u32 changed; /* IEEE80211_RC_* */ 484 u32 bw; 485 u32 nss; 486 u32 smps; 487 enum hal_pn_type pn_type; 488 489 struct work_struct update_wk; 490 struct work_struct set_4addr_wk; 491 struct rate_info txrate; 492 u32 peer_nss; 493 struct rate_info last_txrate; 494 u64 rx_duration; 495 u64 tx_duration; 496 u8 rssi_comb; 497 struct ewma_avg_rssi avg_rssi; 498 s8 rssi_beacon; 499 s8 chain_signal[IEEE80211_MAX_CHAINS]; 500 struct ath11k_htt_tx_stats *tx_stats; 501 struct ath11k_rx_peer_stats *rx_stats; 502 503 #ifdef CONFIG_MAC80211_DEBUGFS 504 /* protected by conf_mutex */ 505 bool aggr_mode; 506 #endif 507 508 bool use_4addr_set; 509 u16 tcl_metadata; 510 511 /* Protected with ar->data_lock */ 512 enum ath11k_wmi_peer_ps_state peer_ps_state; 513 u64 ps_start_time; 514 u64 ps_start_jiffies; 515 u64 ps_total_duration; 516 bool peer_current_ps_valid; 517 518 u32 bw_prev; 519 }; 520 521 #define ATH11K_MIN_5G_FREQ 4150 522 #define ATH11K_MIN_6G_FREQ 5925 523 #define ATH11K_MAX_6G_FREQ 7115 524 #define ATH11K_NUM_CHANS 102 525 #define ATH11K_MAX_5G_CHAN 177 526 527 enum ath11k_state { 528 ATH11K_STATE_OFF, 529 ATH11K_STATE_ON, 530 ATH11K_STATE_RESTARTING, 531 ATH11K_STATE_RESTARTED, 532 ATH11K_STATE_WEDGED, 533 /* Add other states as required */ 534 }; 535 536 /* Antenna noise floor */ 537 #define ATH11K_DEFAULT_NOISE_FLOOR -95 538 539 #define ATH11K_INVALID_RSSI_FULL -1 540 541 #define ATH11K_INVALID_RSSI_EMPTY -128 542 543 struct ath11k_fw_stats { 544 struct dentry *debugfs_fwstats; 545 u32 pdev_id; 546 u32 stats_id; 547 struct list_head pdevs; 548 struct list_head vdevs; 549 struct list_head bcn; 550 }; 551 552 struct ath11k_dbg_htt_stats { 553 u8 type; 554 u8 reset; 555 struct debug_htt_stats_req *stats_req; 556 /* protects shared stats req buffer */ 557 spinlock_t lock; 558 }; 559 560 #define MAX_MODULE_ID_BITMAP_WORDS 16 561 562 struct ath11k_debug { 563 struct dentry *debugfs_pdev; 564 struct ath11k_dbg_htt_stats htt_stats; 565 u32 extd_tx_stats; 566 u32 extd_rx_stats; 567 u32 pktlog_filter; 568 u32 pktlog_mode; 569 u32 pktlog_peer_valid; 570 u8 pktlog_peer_addr[ETH_ALEN]; 571 u32 rx_filter; 572 u32 mem_offset; 573 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS]; 574 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX]; 575 }; 576 577 struct ath11k_per_peer_tx_stats { 578 u32 succ_bytes; 579 u32 retry_bytes; 580 u32 failed_bytes; 581 u16 succ_pkts; 582 u16 retry_pkts; 583 u16 failed_pkts; 584 u32 duration; 585 u8 ba_fails; 586 bool is_ampdu; 587 }; 588 589 #define ATH11K_FLUSH_TIMEOUT (5 * HZ) 590 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 591 592 struct ath11k { 593 struct ath11k_base *ab; 594 struct ath11k_pdev *pdev; 595 struct ieee80211_hw *hw; 596 struct ieee80211_ops *ops; 597 struct ath11k_pdev_wmi *wmi; 598 struct ath11k_pdev_dp dp; 599 u8 mac_addr[ETH_ALEN]; 600 struct ath11k_he ar_he; 601 enum ath11k_state state; 602 bool supports_6ghz; 603 struct { 604 struct completion started; 605 struct completion completed; 606 struct completion on_channel; 607 struct delayed_work timeout; 608 enum ath11k_scan_state state; 609 bool is_roc; 610 int vdev_id; 611 int roc_freq; 612 bool roc_notify; 613 } scan; 614 615 struct { 616 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 617 struct ieee80211_sband_iftype_data 618 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 619 } mac; 620 621 unsigned long dev_flags; 622 unsigned int filter_flags; 623 unsigned long monitor_flags; 624 u32 min_tx_power; 625 u32 max_tx_power; 626 u32 txpower_limit_2g; 627 u32 txpower_limit_5g; 628 u32 txpower_scale; 629 u32 power_scale; 630 u32 chan_tx_pwr; 631 u32 num_stations; 632 u32 max_num_stations; 633 /* To synchronize concurrent synchronous mac80211 callback operations, 634 * concurrent debugfs configuration and concurrent FW statistics events. 635 */ 636 struct mutex conf_mutex; 637 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 638 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info, 639 * channel context data, survey info, test mode data. 640 */ 641 spinlock_t data_lock; 642 643 struct list_head arvifs; 644 /* should never be NULL; needed for regular htt rx */ 645 struct ieee80211_channel *rx_channel; 646 647 /* valid during scan; needed for mgmt rx during scan */ 648 struct ieee80211_channel *scan_channel; 649 650 u8 cfg_tx_chainmask; 651 u8 cfg_rx_chainmask; 652 u8 num_rx_chains; 653 u8 num_tx_chains; 654 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 655 u8 pdev_idx; 656 u8 lmac_id; 657 658 struct completion peer_assoc_done; 659 struct completion peer_delete_done; 660 661 int install_key_status; 662 struct completion install_key_done; 663 664 int last_wmi_vdev_start_status; 665 struct completion vdev_setup_done; 666 struct completion vdev_delete_done; 667 668 int num_peers; 669 int max_num_peers; 670 u32 num_started_vdevs; 671 u32 num_created_vdevs; 672 unsigned long long allocated_vdev_map; 673 674 struct idr txmgmt_idr; 675 /* protects txmgmt_idr data */ 676 spinlock_t txmgmt_idr_lock; 677 atomic_t num_pending_mgmt_tx; 678 wait_queue_head_t txmgmt_empty_waitq; 679 680 /* cycle count is reported twice for each visited channel during scan. 681 * access protected by data_lock 682 */ 683 u32 survey_last_rx_clear_count; 684 u32 survey_last_cycle_count; 685 686 /* Channel info events are expected to come in pairs without and with 687 * COMPLETE flag set respectively for each channel visit during scan. 688 * 689 * However there are deviations from this rule. This flag is used to 690 * avoid reporting garbage data. 691 */ 692 bool ch_info_can_report_survey; 693 struct survey_info survey[ATH11K_NUM_CHANS]; 694 struct completion bss_survey_done; 695 696 struct work_struct regd_update_work; 697 698 struct work_struct wmi_mgmt_tx_work; 699 struct sk_buff_head wmi_mgmt_tx_queue; 700 701 struct ath11k_wow wow; 702 struct completion target_suspend; 703 bool target_suspend_ack; 704 struct ath11k_per_peer_tx_stats peer_tx_stats; 705 struct list_head ppdu_stats_info; 706 u32 ppdu_stat_list_depth; 707 708 struct ath11k_per_peer_tx_stats cached_stats; 709 u32 last_ppdu_id; 710 u32 cached_ppdu_id; 711 int monitor_vdev_id; 712 #ifdef CONFIG_ATH11K_DEBUGFS 713 struct ath11k_debug debug; 714 #endif 715 #ifdef CONFIG_ATH11K_SPECTRAL 716 struct ath11k_spectral spectral; 717 #endif 718 bool dfs_block_radar_events; 719 struct ath11k_thermal thermal; 720 u32 vdev_id_11d_scan; 721 struct completion completed_11d_scan; 722 enum ath11k_11d_state state_11d; 723 bool regdom_set_by_user; 724 int hw_rate_code; 725 u8 twt_enabled; 726 bool nlo_enabled; 727 u8 alpha2[REG_ALPHA2_LEN + 1]; 728 struct ath11k_fw_stats fw_stats; 729 struct completion fw_stats_complete; 730 bool fw_stats_done; 731 732 /* protected by conf_mutex */ 733 bool ps_state_enable; 734 bool ps_timekeeper_enable; 735 }; 736 737 struct ath11k_band_cap { 738 u32 phy_id; 739 u32 max_bw_supported; 740 u32 ht_cap_info; 741 u32 he_cap_info[2]; 742 u32 he_mcs; 743 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 744 struct ath11k_ppe_threshold he_ppet; 745 u16 he_6ghz_capa; 746 }; 747 748 struct ath11k_pdev_cap { 749 u32 supported_bands; 750 u32 ampdu_density; 751 u32 vht_cap; 752 u32 vht_mcs; 753 u32 he_mcs; 754 u32 tx_chain_mask; 755 u32 rx_chain_mask; 756 u32 tx_chain_mask_shift; 757 u32 rx_chain_mask_shift; 758 struct ath11k_band_cap band[NUM_NL80211_BANDS]; 759 bool nss_ratio_enabled; 760 u8 nss_ratio_info; 761 }; 762 763 struct ath11k_pdev { 764 struct ath11k *ar; 765 u32 pdev_id; 766 struct ath11k_pdev_cap cap; 767 u8 mac_addr[ETH_ALEN]; 768 }; 769 770 struct ath11k_board_data { 771 const struct firmware *fw; 772 const void *data; 773 size_t len; 774 }; 775 776 struct ath11k_pci_ops { 777 int (*wakeup)(struct ath11k_base *ab); 778 void (*release)(struct ath11k_base *ab); 779 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector); 780 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value); 781 u32 (*window_read32)(struct ath11k_base *ab, u32 offset); 782 }; 783 784 /* IPQ8074 HW channel counters frequency value in hertz */ 785 #define IPQ8074_CC_FREQ_HERTZ 320000 786 787 struct ath11k_bp_stats { 788 /* Head Pointer reported by the last HTT Backpressure event for the ring */ 789 u16 hp; 790 791 /* Tail Pointer reported by the last HTT Backpressure event for the ring */ 792 u16 tp; 793 794 /* Number of Backpressure events received for the ring */ 795 u32 count; 796 797 /* Last recorded event timestamp */ 798 unsigned long jiffies; 799 }; 800 801 struct ath11k_dp_ring_bp_stats { 802 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX]; 803 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS]; 804 }; 805 806 struct ath11k_soc_dp_tx_err_stats { 807 /* TCL Ring Descriptor unavailable */ 808 u32 desc_na[DP_TCL_NUM_RING_MAX]; 809 /* Other failures during dp_tx due to mem allocation failure 810 * idr unavailable etc. 811 */ 812 atomic_t misc_fail; 813 }; 814 815 struct ath11k_soc_dp_stats { 816 u32 err_ring_pkts; 817 u32 invalid_rbm; 818 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; 819 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; 820 u32 hal_reo_error[DP_REO_DST_RING_MAX]; 821 struct ath11k_soc_dp_tx_err_stats tx_err; 822 struct ath11k_dp_ring_bp_stats bp_stats; 823 }; 824 825 struct ath11k_msi_user { 826 char *name; 827 int num_vectors; 828 u32 base_vector; 829 }; 830 831 struct ath11k_msi_config { 832 int total_vectors; 833 int total_users; 834 struct ath11k_msi_user *users; 835 u16 hw_rev; 836 }; 837 838 /* Master structure to hold the hw data which may be used in core module */ 839 struct ath11k_base { 840 enum ath11k_hw_rev hw_rev; 841 struct platform_device *pdev; 842 struct device *dev; 843 struct ath11k_qmi qmi; 844 struct ath11k_wmi_base wmi_ab; 845 struct completion fw_ready; 846 int num_radios; 847 /* HW channel counters frequency value in hertz common to all MACs */ 848 u32 cc_freq_hz; 849 850 struct ath11k_htc htc; 851 852 struct ath11k_dp dp; 853 854 void __iomem *mem; 855 void __iomem *mem_ce; 856 unsigned long mem_len; 857 858 struct { 859 enum ath11k_bus bus; 860 const struct ath11k_hif_ops *ops; 861 } hif; 862 863 struct { 864 struct completion wakeup_completed; 865 } wow; 866 867 struct ath11k_ce ce; 868 struct timer_list rx_replenish_retry; 869 struct ath11k_hal hal; 870 /* To synchronize core_start/core_stop */ 871 struct mutex core_lock; 872 /* Protects data like peers */ 873 spinlock_t base_lock; 874 struct ath11k_pdev pdevs[MAX_RADIOS]; 875 struct { 876 enum WMI_HOST_WLAN_BAND supported_bands; 877 u32 pdev_id; 878 } target_pdev_ids[MAX_RADIOS]; 879 u8 target_pdev_count; 880 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS]; 881 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS]; 882 unsigned long long free_vdev_map; 883 884 /* To synchronize rhash tbl write operation */ 885 struct mutex tbl_mtx_lock; 886 887 /* The rhashtable containing struct ath11k_peer keyed by mac addr */ 888 struct rhashtable *rhead_peer_addr; 889 struct rhashtable_params rhash_peer_addr_param; 890 891 /* The rhashtable containing struct ath11k_peer keyed by id */ 892 struct rhashtable *rhead_peer_id; 893 struct rhashtable_params rhash_peer_id_param; 894 895 struct list_head peers; 896 wait_queue_head_t peer_mapping_wq; 897 u8 mac_addr[ETH_ALEN]; 898 bool wmi_ready; 899 u32 wlan_init_status; 900 int irq_num[ATH11K_IRQ_NUM_MAX]; 901 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 902 struct ath11k_targ_cap target_caps; 903 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 904 bool pdevs_macaddr_valid; 905 int bd_api; 906 907 struct ath11k_hw_params hw_params; 908 909 const struct firmware *cal_file; 910 911 /* Below regd's are protected by ab->data_lock */ 912 /* This is the regd set for every radio 913 * by the firmware during initialization 914 */ 915 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 916 /* This regd is set during dynamic country setting 917 * This may or may not be used during the runtime 918 */ 919 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 920 921 /* Current DFS Regulatory */ 922 enum ath11k_dfs_region dfs_region; 923 #ifdef CONFIG_ATH11K_DEBUGFS 924 struct dentry *debugfs_soc; 925 #endif 926 struct ath11k_soc_dp_stats soc_stats; 927 928 unsigned long dev_flags; 929 struct completion driver_recovery; 930 struct workqueue_struct *workqueue; 931 struct work_struct restart_work; 932 struct work_struct update_11d_work; 933 u8 new_alpha2[3]; 934 struct workqueue_struct *workqueue_aux; 935 struct work_struct reset_work; 936 atomic_t reset_count; 937 atomic_t recovery_count; 938 atomic_t recovery_start_count; 939 bool is_reset; 940 struct completion reset_complete; 941 struct completion reconfigure_complete; 942 struct completion recovery_start; 943 /* continuous recovery fail count */ 944 atomic_t fail_cont_count; 945 unsigned long reset_fail_timeout; 946 struct { 947 /* protected by data_lock */ 948 u32 fw_crash_counter; 949 } stats; 950 u32 pktlog_defs_checksum; 951 952 struct ath11k_dbring_cap *db_caps; 953 u32 num_db_cap; 954 955 /* To synchronize 11d scan vdev id */ 956 struct mutex vdev_id_11d_lock; 957 struct timer_list mon_reap_timer; 958 959 struct completion htc_suspend; 960 961 struct { 962 enum ath11k_bdf_search bdf_search; 963 u32 vendor; 964 u32 device; 965 u32 subsystem_vendor; 966 u32 subsystem_device; 967 } id; 968 969 struct { 970 struct { 971 const struct ath11k_msi_config *config; 972 u32 ep_base_data; 973 u32 irqs[32]; 974 u32 addr_lo; 975 u32 addr_hi; 976 } msi; 977 978 const struct ath11k_pci_ops *ops; 979 } pci; 980 981 /* must be last */ 982 u8 drv_priv[] __aligned(sizeof(void *)); 983 }; 984 985 struct ath11k_fw_stats_pdev { 986 struct list_head list; 987 988 /* PDEV stats */ 989 s32 ch_noise_floor; 990 /* Cycles spent transmitting frames */ 991 u32 tx_frame_count; 992 /* Cycles spent receiving frames */ 993 u32 rx_frame_count; 994 /* Total channel busy time, evidently */ 995 u32 rx_clear_count; 996 /* Total on-channel time */ 997 u32 cycle_count; 998 u32 phy_err_count; 999 u32 chan_tx_power; 1000 u32 ack_rx_bad; 1001 u32 rts_bad; 1002 u32 rts_good; 1003 u32 fcs_bad; 1004 u32 no_beacons; 1005 u32 mib_int_count; 1006 1007 /* PDEV TX stats */ 1008 /* Num HTT cookies queued to dispatch list */ 1009 s32 comp_queued; 1010 /* Num HTT cookies dispatched */ 1011 s32 comp_delivered; 1012 /* Num MSDU queued to WAL */ 1013 s32 msdu_enqued; 1014 /* Num MPDU queue to WAL */ 1015 s32 mpdu_enqued; 1016 /* Num MSDUs dropped by WMM limit */ 1017 s32 wmm_drop; 1018 /* Num Local frames queued */ 1019 s32 local_enqued; 1020 /* Num Local frames done */ 1021 s32 local_freed; 1022 /* Num queued to HW */ 1023 s32 hw_queued; 1024 /* Num PPDU reaped from HW */ 1025 s32 hw_reaped; 1026 /* Num underruns */ 1027 s32 underrun; 1028 /* Num hw paused */ 1029 u32 hw_paused; 1030 /* Num PPDUs cleaned up in TX abort */ 1031 s32 tx_abort; 1032 /* Num MPDUs requeued by SW */ 1033 s32 mpdus_requeued; 1034 /* excessive retries */ 1035 u32 tx_ko; 1036 u32 tx_xretry; 1037 /* data hw rate code */ 1038 u32 data_rc; 1039 /* Scheduler self triggers */ 1040 u32 self_triggers; 1041 /* frames dropped due to excessive sw retries */ 1042 u32 sw_retry_failure; 1043 /* illegal rate phy errors */ 1044 u32 illgl_rate_phy_err; 1045 /* wal pdev continuous xretry */ 1046 u32 pdev_cont_xretry; 1047 /* wal pdev tx timeouts */ 1048 u32 pdev_tx_timeout; 1049 /* wal pdev resets */ 1050 u32 pdev_resets; 1051 /* frames dropped due to non-availability of stateless TIDs */ 1052 u32 stateless_tid_alloc_failure; 1053 /* PhY/BB underrun */ 1054 u32 phy_underrun; 1055 /* MPDU is more than txop limit */ 1056 u32 txop_ovf; 1057 /* Num sequences posted */ 1058 u32 seq_posted; 1059 /* Num sequences failed in queueing */ 1060 u32 seq_failed_queueing; 1061 /* Num sequences completed */ 1062 u32 seq_completed; 1063 /* Num sequences restarted */ 1064 u32 seq_restarted; 1065 /* Num of MU sequences posted */ 1066 u32 mu_seq_posted; 1067 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT 1068 * (Reset,channel change) 1069 */ 1070 s32 mpdus_sw_flush; 1071 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 1072 s32 mpdus_hw_filter; 1073 /* Num MPDUs truncated by PDG (TXOP, TBTT, 1074 * PPDU_duration based on rate, dyn_bw) 1075 */ 1076 s32 mpdus_truncated; 1077 /* Num MPDUs that was tried but didn't receive ACK or BA */ 1078 s32 mpdus_ack_failed; 1079 /* Num MPDUs that was dropped du to expiry. */ 1080 s32 mpdus_expired; 1081 1082 /* PDEV RX stats */ 1083 /* Cnts any change in ring routing mid-ppdu */ 1084 s32 mid_ppdu_route_change; 1085 /* Total number of statuses processed */ 1086 s32 status_rcvd; 1087 /* Extra frags on rings 0-3 */ 1088 s32 r0_frags; 1089 s32 r1_frags; 1090 s32 r2_frags; 1091 s32 r3_frags; 1092 /* MSDUs / MPDUs delivered to HTT */ 1093 s32 htt_msdus; 1094 s32 htt_mpdus; 1095 /* MSDUs / MPDUs delivered to local stack */ 1096 s32 loc_msdus; 1097 s32 loc_mpdus; 1098 /* AMSDUs that have more MSDUs than the status ring size */ 1099 s32 oversize_amsdu; 1100 /* Number of PHY errors */ 1101 s32 phy_errs; 1102 /* Number of PHY errors drops */ 1103 s32 phy_err_drop; 1104 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 1105 s32 mpdu_errs; 1106 /* Num overflow errors */ 1107 s32 rx_ovfl_errs; 1108 }; 1109 1110 struct ath11k_fw_stats_vdev { 1111 struct list_head list; 1112 1113 u32 vdev_id; 1114 u32 beacon_snr; 1115 u32 data_snr; 1116 u32 num_tx_frames[WLAN_MAX_AC]; 1117 u32 num_rx_frames; 1118 u32 num_tx_frames_retries[WLAN_MAX_AC]; 1119 u32 num_tx_frames_failures[WLAN_MAX_AC]; 1120 u32 num_rts_fail; 1121 u32 num_rts_success; 1122 u32 num_rx_err; 1123 u32 num_rx_discard; 1124 u32 num_tx_not_acked; 1125 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 1126 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 1127 }; 1128 1129 struct ath11k_fw_stats_bcn { 1130 struct list_head list; 1131 1132 u32 vdev_id; 1133 u32 tx_bcn_succ_cnt; 1134 u32 tx_bcn_outage_cnt; 1135 }; 1136 1137 void ath11k_fw_stats_init(struct ath11k *ar); 1138 void ath11k_fw_stats_pdevs_free(struct list_head *head); 1139 void ath11k_fw_stats_vdevs_free(struct list_head *head); 1140 void ath11k_fw_stats_bcn_free(struct list_head *head); 1141 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats); 1142 1143 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[]; 1144 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[]; 1145 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[]; 1146 1147 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[]; 1148 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[]; 1149 1150 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[]; 1151 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[]; 1152 1153 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[]; 1154 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[]; 1155 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab); 1156 int ath11k_core_pre_init(struct ath11k_base *ab); 1157 int ath11k_core_init(struct ath11k_base *ath11k); 1158 void ath11k_core_deinit(struct ath11k_base *ath11k); 1159 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size, 1160 enum ath11k_bus bus); 1161 void ath11k_core_free(struct ath11k_base *ath11k); 1162 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k, 1163 struct ath11k_board_data *bd); 1164 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd); 1165 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab, 1166 struct ath11k_board_data *bd, 1167 const char *name); 1168 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd); 1169 int ath11k_core_check_dt(struct ath11k_base *ath11k); 1170 int ath11k_core_check_smbios(struct ath11k_base *ab); 1171 void ath11k_core_halt(struct ath11k *ar); 1172 int ath11k_core_resume(struct ath11k_base *ab); 1173 int ath11k_core_suspend(struct ath11k_base *ab); 1174 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab); 1175 1176 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab, 1177 const char *filename); 1178 1179 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state) 1180 { 1181 switch (state) { 1182 case ATH11K_SCAN_IDLE: 1183 return "idle"; 1184 case ATH11K_SCAN_STARTING: 1185 return "starting"; 1186 case ATH11K_SCAN_RUNNING: 1187 return "running"; 1188 case ATH11K_SCAN_ABORTING: 1189 return "aborting"; 1190 } 1191 1192 return "unknown"; 1193 } 1194 1195 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb) 1196 { 1197 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) > 1198 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 1199 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 1200 } 1201 1202 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb) 1203 { 1204 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb)); 1205 return (struct ath11k_skb_rxcb *)skb->cb; 1206 } 1207 1208 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif) 1209 { 1210 return (struct ath11k_vif *)vif->drv_priv; 1211 } 1212 1213 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab, 1214 int mac_id) 1215 { 1216 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar; 1217 } 1218 1219 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab, 1220 const char *filename, 1221 void *buf, size_t buf_len) 1222 { 1223 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR, 1224 ab->hw_params.fw.dir, filename); 1225 } 1226 1227 static inline const char *ath11k_bus_str(enum ath11k_bus bus) 1228 { 1229 switch (bus) { 1230 case ATH11K_BUS_PCI: 1231 return "pci"; 1232 case ATH11K_BUS_AHB: 1233 return "ahb"; 1234 } 1235 1236 return "unknown"; 1237 } 1238 1239 #endif /* _CORE_H_ */ 1240