1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef ATH11K_CORE_H 7 #define ATH11K_CORE_H 8 9 #include <linux/types.h> 10 #include <linux/interrupt.h> 11 #include <linux/irq.h> 12 #include <linux/bitfield.h> 13 #include "qmi.h" 14 #include "htc.h" 15 #include "wmi.h" 16 #include "hal.h" 17 #include "dp.h" 18 #include "ce.h" 19 #include "mac.h" 20 #include "hw.h" 21 #include "hal_rx.h" 22 #include "reg.h" 23 #include "thermal.h" 24 #include "dbring.h" 25 #include "spectral.h" 26 27 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 28 29 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512 30 31 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 32 33 /* Pending management packets threshold for dropping probe responses */ 34 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 35 36 #define ATH11K_INVALID_HW_MAC_ID 0xFF 37 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ) 38 39 extern unsigned int ath11k_frame_mode; 40 41 #define ATH11K_MON_TIMER_INTERVAL 10 42 43 enum ath11k_supported_bw { 44 ATH11K_BW_20 = 0, 45 ATH11K_BW_40 = 1, 46 ATH11K_BW_80 = 2, 47 ATH11K_BW_160 = 3, 48 }; 49 50 enum wme_ac { 51 WME_AC_BE, 52 WME_AC_BK, 53 WME_AC_VI, 54 WME_AC_VO, 55 WME_NUM_AC 56 }; 57 58 #define ATH11K_HT_MCS_MAX 7 59 #define ATH11K_VHT_MCS_MAX 9 60 #define ATH11K_HE_MCS_MAX 11 61 62 enum ath11k_crypt_mode { 63 /* Only use hardware crypto engine */ 64 ATH11K_CRYPT_MODE_HW, 65 /* Only use software crypto */ 66 ATH11K_CRYPT_MODE_SW, 67 }; 68 69 static inline enum wme_ac ath11k_tid_to_ac(u32 tid) 70 { 71 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 72 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 73 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 74 WME_AC_VO); 75 } 76 77 enum ath11k_skb_flags { 78 ATH11K_SKB_HW_80211_ENCAP = BIT(0), 79 ATH11K_SKB_CIPHER_SET = BIT(1), 80 }; 81 82 struct ath11k_skb_cb { 83 dma_addr_t paddr; 84 u8 eid; 85 u8 flags; 86 u32 cipher; 87 struct ath11k *ar; 88 struct ieee80211_vif *vif; 89 } __packed; 90 91 struct ath11k_skb_rxcb { 92 dma_addr_t paddr; 93 bool is_first_msdu; 94 bool is_last_msdu; 95 bool is_continuation; 96 struct hal_rx_desc *rx_desc; 97 u8 err_rel_src; 98 u8 err_code; 99 u8 mac_id; 100 u8 unmapped; 101 u8 is_frag; 102 u8 tid; 103 }; 104 105 enum ath11k_hw_rev { 106 ATH11K_HW_IPQ8074, 107 ATH11K_HW_QCA6390_HW20, 108 ATH11K_HW_IPQ6018_HW10, 109 ATH11K_HW_QCN9074_HW10, 110 }; 111 112 enum ath11k_firmware_mode { 113 /* the default mode, standard 802.11 functionality */ 114 ATH11K_FIRMWARE_MODE_NORMAL, 115 116 /* factory tests etc */ 117 ATH11K_FIRMWARE_MODE_FTM, 118 119 /* Cold boot calibration */ 120 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7, 121 }; 122 123 extern bool ath11k_cold_boot_cal; 124 125 #define ATH11K_IRQ_NUM_MAX 52 126 #define ATH11K_EXT_IRQ_NUM_MAX 16 127 128 struct ath11k_ext_irq_grp { 129 struct ath11k_base *ab; 130 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX]; 131 u32 num_irq; 132 u32 grp_id; 133 u64 timestamp; 134 struct napi_struct napi; 135 struct net_device napi_ndev; 136 }; 137 138 #define HEHANDLE_CAP_PHYINFO_SIZE 3 139 #define HECAP_PHYINFO_SIZE 9 140 #define HECAP_MACINFO_SIZE 5 141 #define HECAP_TXRX_MCS_NSS_SIZE 2 142 #define HECAP_PPET16_PPET8_MAX_SIZE 25 143 144 #define HE_PPET16_PPET8_SIZE 8 145 146 /* 802.11ax PPE (PPDU packet Extension) threshold */ 147 struct he_ppe_threshold { 148 u32 numss_m1; 149 u32 ru_mask; 150 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 151 }; 152 153 struct ath11k_he { 154 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 155 u32 hecap_rxmcsnssmap; 156 u32 hecap_txmcsnssmap; 157 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 158 struct he_ppe_threshold hecap_ppet; 159 u32 heop_param; 160 }; 161 162 #define MAX_RADIOS 3 163 164 enum { 165 WMI_HOST_TP_SCALE_MAX = 0, 166 WMI_HOST_TP_SCALE_50 = 1, 167 WMI_HOST_TP_SCALE_25 = 2, 168 WMI_HOST_TP_SCALE_12 = 3, 169 WMI_HOST_TP_SCALE_MIN = 4, 170 WMI_HOST_TP_SCALE_SIZE = 5, 171 }; 172 173 enum ath11k_scan_state { 174 ATH11K_SCAN_IDLE, 175 ATH11K_SCAN_STARTING, 176 ATH11K_SCAN_RUNNING, 177 ATH11K_SCAN_ABORTING, 178 }; 179 180 enum ath11k_dev_flags { 181 ATH11K_CAC_RUNNING, 182 ATH11K_FLAG_CORE_REGISTERED, 183 ATH11K_FLAG_CRASH_FLUSH, 184 ATH11K_FLAG_RAW_MODE, 185 ATH11K_FLAG_HW_CRYPTO_DISABLED, 186 ATH11K_FLAG_BTCOEX, 187 ATH11K_FLAG_RECOVERY, 188 ATH11K_FLAG_UNREGISTERING, 189 ATH11K_FLAG_REGISTERED, 190 ATH11K_FLAG_QMI_FAIL, 191 ATH11K_FLAG_HTC_SUSPEND_COMPLETE, 192 }; 193 194 enum ath11k_monitor_flags { 195 ATH11K_FLAG_MONITOR_ENABLED, 196 }; 197 198 struct ath11k_vif { 199 u32 vdev_id; 200 enum wmi_vdev_type vdev_type; 201 enum wmi_vdev_subtype vdev_subtype; 202 u32 beacon_interval; 203 u32 dtim_period; 204 u16 ast_hash; 205 u16 ast_idx; 206 u16 tcl_metadata; 207 u8 hal_addr_search_flags; 208 u8 search_type; 209 210 struct ath11k *ar; 211 struct ieee80211_vif *vif; 212 213 u16 tx_seq_no; 214 struct wmi_wmm_params_all_arg wmm_params; 215 struct list_head list; 216 union { 217 struct { 218 u32 uapsd; 219 } sta; 220 struct { 221 /* 127 stations; wmi limit */ 222 u8 tim_bitmap[16]; 223 u8 tim_len; 224 u32 ssid_len; 225 u8 ssid[IEEE80211_MAX_SSID_LEN]; 226 bool hidden_ssid; 227 /* P2P_IE with NoA attribute for P2P_GO case */ 228 u32 noa_len; 229 u8 *noa_data; 230 } ap; 231 } u; 232 233 bool is_started; 234 bool is_up; 235 bool spectral_enabled; 236 u32 aid; 237 u8 bssid[ETH_ALEN]; 238 struct cfg80211_bitrate_mask bitrate_mask; 239 struct delayed_work connection_loss_work; 240 int num_legacy_stations; 241 int rtscts_prot_mode; 242 int txpower; 243 bool rsnie_present; 244 bool wpaie_present; 245 struct ieee80211_chanctx_conf chanctx; 246 }; 247 248 struct ath11k_vif_iter { 249 u32 vdev_id; 250 struct ath11k_vif *arvif; 251 }; 252 253 struct ath11k_rx_peer_stats { 254 u64 num_msdu; 255 u64 num_mpdu_fcs_ok; 256 u64 num_mpdu_fcs_err; 257 u64 tcp_msdu_count; 258 u64 udp_msdu_count; 259 u64 other_msdu_count; 260 u64 ampdu_msdu_count; 261 u64 non_ampdu_msdu_count; 262 u64 stbc_count; 263 u64 beamformed_count; 264 u64 mcs_count[HAL_RX_MAX_MCS + 1]; 265 u64 nss_count[HAL_RX_MAX_NSS]; 266 u64 bw_count[HAL_RX_BW_MAX]; 267 u64 gi_count[HAL_RX_GI_MAX]; 268 u64 coding_count[HAL_RX_SU_MU_CODING_MAX]; 269 u64 tid_count[IEEE80211_NUM_TIDS + 1]; 270 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 271 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 272 u64 rx_duration; 273 u64 dcm_count; 274 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 275 }; 276 277 #define ATH11K_HE_MCS_NUM 12 278 #define ATH11K_VHT_MCS_NUM 10 279 #define ATH11K_BW_NUM 4 280 #define ATH11K_NSS_NUM 4 281 #define ATH11K_LEGACY_NUM 12 282 #define ATH11K_GI_NUM 4 283 #define ATH11K_HT_MCS_NUM 32 284 285 enum ath11k_pkt_rx_err { 286 ATH11K_PKT_RX_ERR_FCS, 287 ATH11K_PKT_RX_ERR_TKIP, 288 ATH11K_PKT_RX_ERR_CRYPT, 289 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL, 290 ATH11K_PKT_RX_ERR_MAX, 291 }; 292 293 enum ath11k_ampdu_subfrm_num { 294 ATH11K_AMPDU_SUBFRM_NUM_10, 295 ATH11K_AMPDU_SUBFRM_NUM_20, 296 ATH11K_AMPDU_SUBFRM_NUM_30, 297 ATH11K_AMPDU_SUBFRM_NUM_40, 298 ATH11K_AMPDU_SUBFRM_NUM_50, 299 ATH11K_AMPDU_SUBFRM_NUM_60, 300 ATH11K_AMPDU_SUBFRM_NUM_MORE, 301 ATH11K_AMPDU_SUBFRM_NUM_MAX, 302 }; 303 304 enum ath11k_amsdu_subfrm_num { 305 ATH11K_AMSDU_SUBFRM_NUM_1, 306 ATH11K_AMSDU_SUBFRM_NUM_2, 307 ATH11K_AMSDU_SUBFRM_NUM_3, 308 ATH11K_AMSDU_SUBFRM_NUM_4, 309 ATH11K_AMSDU_SUBFRM_NUM_MORE, 310 ATH11K_AMSDU_SUBFRM_NUM_MAX, 311 }; 312 313 enum ath11k_counter_type { 314 ATH11K_COUNTER_TYPE_BYTES, 315 ATH11K_COUNTER_TYPE_PKTS, 316 ATH11K_COUNTER_TYPE_MAX, 317 }; 318 319 enum ath11k_stats_type { 320 ATH11K_STATS_TYPE_SUCC, 321 ATH11K_STATS_TYPE_FAIL, 322 ATH11K_STATS_TYPE_RETRY, 323 ATH11K_STATS_TYPE_AMPDU, 324 ATH11K_STATS_TYPE_MAX, 325 }; 326 327 struct ath11k_htt_data_stats { 328 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM]; 329 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM]; 330 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM]; 331 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM]; 332 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM]; 333 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM]; 334 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM]; 335 }; 336 337 struct ath11k_htt_tx_stats { 338 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX]; 339 u64 tx_duration; 340 u64 ba_fails; 341 u64 ack_fails; 342 }; 343 344 struct ath11k_per_ppdu_tx_stats { 345 u16 succ_pkts; 346 u16 failed_pkts; 347 u16 retry_pkts; 348 u32 succ_bytes; 349 u32 failed_bytes; 350 u32 retry_bytes; 351 }; 352 353 struct ath11k_sta { 354 struct ath11k_vif *arvif; 355 356 /* the following are protected by ar->data_lock */ 357 u32 changed; /* IEEE80211_RC_* */ 358 u32 bw; 359 u32 nss; 360 u32 smps; 361 enum hal_pn_type pn_type; 362 363 struct work_struct update_wk; 364 struct rate_info txrate; 365 struct rate_info last_txrate; 366 u64 rx_duration; 367 u64 tx_duration; 368 u8 rssi_comb; 369 struct ath11k_htt_tx_stats *tx_stats; 370 struct ath11k_rx_peer_stats *rx_stats; 371 372 #ifdef CONFIG_MAC80211_DEBUGFS 373 /* protected by conf_mutex */ 374 bool aggr_mode; 375 #endif 376 }; 377 378 #define ATH11K_MIN_5G_FREQ 4150 379 #define ATH11K_MIN_6G_FREQ 5945 380 #define ATH11K_MAX_6G_FREQ 7115 381 #define ATH11K_NUM_CHANS 100 382 #define ATH11K_MAX_5G_CHAN 173 383 384 enum ath11k_state { 385 ATH11K_STATE_OFF, 386 ATH11K_STATE_ON, 387 ATH11K_STATE_RESTARTING, 388 ATH11K_STATE_RESTARTED, 389 ATH11K_STATE_WEDGED, 390 /* Add other states as required */ 391 }; 392 393 /* Antenna noise floor */ 394 #define ATH11K_DEFAULT_NOISE_FLOOR -95 395 396 struct ath11k_fw_stats { 397 struct dentry *debugfs_fwstats; 398 u32 pdev_id; 399 u32 stats_id; 400 struct list_head pdevs; 401 struct list_head vdevs; 402 struct list_head bcn; 403 }; 404 405 struct ath11k_dbg_htt_stats { 406 u8 type; 407 u8 reset; 408 struct debug_htt_stats_req *stats_req; 409 /* protects shared stats req buffer */ 410 spinlock_t lock; 411 }; 412 413 struct ath11k_debug { 414 struct dentry *debugfs_pdev; 415 struct ath11k_dbg_htt_stats htt_stats; 416 u32 extd_tx_stats; 417 struct ath11k_fw_stats fw_stats; 418 struct completion fw_stats_complete; 419 bool fw_stats_done; 420 u32 extd_rx_stats; 421 u32 pktlog_filter; 422 u32 pktlog_mode; 423 u32 pktlog_peer_valid; 424 u8 pktlog_peer_addr[ETH_ALEN]; 425 u32 rx_filter; 426 }; 427 428 struct ath11k_per_peer_tx_stats { 429 u32 succ_bytes; 430 u32 retry_bytes; 431 u32 failed_bytes; 432 u16 succ_pkts; 433 u16 retry_pkts; 434 u16 failed_pkts; 435 u32 duration; 436 u8 ba_fails; 437 bool is_ampdu; 438 }; 439 440 #define ATH11K_FLUSH_TIMEOUT (5 * HZ) 441 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 442 443 struct ath11k { 444 struct ath11k_base *ab; 445 struct ath11k_pdev *pdev; 446 struct ieee80211_hw *hw; 447 struct ieee80211_ops *ops; 448 struct ath11k_pdev_wmi *wmi; 449 struct ath11k_pdev_dp dp; 450 u8 mac_addr[ETH_ALEN]; 451 u32 ht_cap_info; 452 u32 vht_cap_info; 453 struct ath11k_he ar_he; 454 enum ath11k_state state; 455 bool supports_6ghz; 456 struct { 457 struct completion started; 458 struct completion completed; 459 struct completion on_channel; 460 struct delayed_work timeout; 461 enum ath11k_scan_state state; 462 bool is_roc; 463 int vdev_id; 464 int roc_freq; 465 bool roc_notify; 466 } scan; 467 468 struct { 469 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 470 struct ieee80211_sband_iftype_data 471 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 472 } mac; 473 474 unsigned long dev_flags; 475 unsigned int filter_flags; 476 unsigned long monitor_flags; 477 u32 min_tx_power; 478 u32 max_tx_power; 479 u32 txpower_limit_2g; 480 u32 txpower_limit_5g; 481 u32 txpower_scale; 482 u32 power_scale; 483 u32 chan_tx_pwr; 484 u32 num_stations; 485 u32 max_num_stations; 486 bool monitor_present; 487 /* To synchronize concurrent synchronous mac80211 callback operations, 488 * concurrent debugfs configuration and concurrent FW statistics events. 489 */ 490 struct mutex conf_mutex; 491 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 492 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info, 493 * channel context data, survey info, test mode data. 494 */ 495 spinlock_t data_lock; 496 497 struct list_head arvifs; 498 /* should never be NULL; needed for regular htt rx */ 499 struct ieee80211_channel *rx_channel; 500 501 /* valid during scan; needed for mgmt rx during scan */ 502 struct ieee80211_channel *scan_channel; 503 504 u8 cfg_tx_chainmask; 505 u8 cfg_rx_chainmask; 506 u8 num_rx_chains; 507 u8 num_tx_chains; 508 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 509 u8 pdev_idx; 510 u8 lmac_id; 511 512 struct completion peer_assoc_done; 513 struct completion peer_delete_done; 514 515 int install_key_status; 516 struct completion install_key_done; 517 518 int last_wmi_vdev_start_status; 519 struct completion vdev_setup_done; 520 struct completion vdev_delete_done; 521 522 int num_peers; 523 int max_num_peers; 524 u32 num_started_vdevs; 525 u32 num_created_vdevs; 526 unsigned long long allocated_vdev_map; 527 528 struct idr txmgmt_idr; 529 /* protects txmgmt_idr data */ 530 spinlock_t txmgmt_idr_lock; 531 atomic_t num_pending_mgmt_tx; 532 533 /* cycle count is reported twice for each visited channel during scan. 534 * access protected by data_lock 535 */ 536 u32 survey_last_rx_clear_count; 537 u32 survey_last_cycle_count; 538 539 /* Channel info events are expected to come in pairs without and with 540 * COMPLETE flag set respectively for each channel visit during scan. 541 * 542 * However there are deviations from this rule. This flag is used to 543 * avoid reporting garbage data. 544 */ 545 bool ch_info_can_report_survey; 546 struct survey_info survey[ATH11K_NUM_CHANS]; 547 struct completion bss_survey_done; 548 549 struct work_struct regd_update_work; 550 551 struct work_struct wmi_mgmt_tx_work; 552 struct sk_buff_head wmi_mgmt_tx_queue; 553 554 struct ath11k_per_peer_tx_stats peer_tx_stats; 555 struct list_head ppdu_stats_info; 556 u32 ppdu_stat_list_depth; 557 558 struct ath11k_per_peer_tx_stats cached_stats; 559 u32 last_ppdu_id; 560 u32 cached_ppdu_id; 561 #ifdef CONFIG_ATH11K_DEBUGFS 562 struct ath11k_debug debug; 563 #endif 564 #ifdef CONFIG_ATH11K_SPECTRAL 565 struct ath11k_spectral spectral; 566 #endif 567 bool dfs_block_radar_events; 568 struct ath11k_thermal thermal; 569 }; 570 571 struct ath11k_band_cap { 572 u32 phy_id; 573 u32 max_bw_supported; 574 u32 ht_cap_info; 575 u32 he_cap_info[2]; 576 u32 he_mcs; 577 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 578 struct ath11k_ppe_threshold he_ppet; 579 u16 he_6ghz_capa; 580 }; 581 582 struct ath11k_pdev_cap { 583 u32 supported_bands; 584 u32 ampdu_density; 585 u32 vht_cap; 586 u32 vht_mcs; 587 u32 he_mcs; 588 u32 tx_chain_mask; 589 u32 rx_chain_mask; 590 u32 tx_chain_mask_shift; 591 u32 rx_chain_mask_shift; 592 struct ath11k_band_cap band[NUM_NL80211_BANDS]; 593 }; 594 595 struct ath11k_pdev { 596 struct ath11k *ar; 597 u32 pdev_id; 598 struct ath11k_pdev_cap cap; 599 u8 mac_addr[ETH_ALEN]; 600 }; 601 602 struct ath11k_board_data { 603 const struct firmware *fw; 604 const void *data; 605 size_t len; 606 }; 607 608 struct ath11k_bus_params { 609 bool mhi_support; 610 bool m3_fw_support; 611 bool fixed_bdf_addr; 612 bool fixed_mem_region; 613 bool static_window_map; 614 }; 615 616 /* IPQ8074 HW channel counters frequency value in hertz */ 617 #define IPQ8074_CC_FREQ_HERTZ 320000 618 619 struct ath11k_bp_stats { 620 /* Head Pointer reported by the last HTT Backpressure event for the ring */ 621 u16 hp; 622 623 /* Tail Pointer reported by the last HTT Backpressure event for the ring */ 624 u16 tp; 625 626 /* Number of Backpressure events received for the ring */ 627 u32 count; 628 629 /* Last recorded event timestamp */ 630 unsigned long jiffies; 631 }; 632 633 struct ath11k_dp_ring_bp_stats { 634 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX]; 635 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS]; 636 }; 637 638 struct ath11k_soc_dp_tx_err_stats { 639 /* TCL Ring Descriptor unavailable */ 640 u32 desc_na[DP_TCL_NUM_RING_MAX]; 641 /* Other failures during dp_tx due to mem allocation failure 642 * idr unavailable etc. 643 */ 644 atomic_t misc_fail; 645 }; 646 647 struct ath11k_soc_dp_stats { 648 u32 err_ring_pkts; 649 u32 invalid_rbm; 650 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; 651 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; 652 u32 hal_reo_error[DP_REO_DST_RING_MAX]; 653 struct ath11k_soc_dp_tx_err_stats tx_err; 654 struct ath11k_dp_ring_bp_stats bp_stats; 655 }; 656 657 /* Master structure to hold the hw data which may be used in core module */ 658 struct ath11k_base { 659 enum ath11k_hw_rev hw_rev; 660 struct platform_device *pdev; 661 struct device *dev; 662 struct ath11k_qmi qmi; 663 struct ath11k_wmi_base wmi_ab; 664 struct completion fw_ready; 665 int num_radios; 666 /* HW channel counters frequency value in hertz common to all MACs */ 667 u32 cc_freq_hz; 668 669 struct ath11k_htc htc; 670 671 struct ath11k_dp dp; 672 673 void __iomem *mem; 674 unsigned long mem_len; 675 676 struct { 677 enum ath11k_bus bus; 678 const struct ath11k_hif_ops *ops; 679 } hif; 680 681 struct { 682 struct completion wakeup_completed; 683 } wow; 684 685 struct ath11k_ce ce; 686 struct timer_list rx_replenish_retry; 687 struct ath11k_hal hal; 688 /* To synchronize core_start/core_stop */ 689 struct mutex core_lock; 690 /* Protects data like peers */ 691 spinlock_t base_lock; 692 struct ath11k_pdev pdevs[MAX_RADIOS]; 693 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS]; 694 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS]; 695 unsigned long long free_vdev_map; 696 struct list_head peers; 697 wait_queue_head_t peer_mapping_wq; 698 u8 mac_addr[ETH_ALEN]; 699 bool wmi_ready; 700 u32 wlan_init_status; 701 int irq_num[ATH11K_IRQ_NUM_MAX]; 702 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 703 struct napi_struct *napi; 704 struct ath11k_targ_cap target_caps; 705 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 706 bool pdevs_macaddr_valid; 707 int bd_api; 708 709 struct ath11k_hw_params hw_params; 710 struct ath11k_bus_params bus_params; 711 712 const struct firmware *cal_file; 713 714 /* Below regd's are protected by ab->data_lock */ 715 /* This is the regd set for every radio 716 * by the firmware during initializatin 717 */ 718 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 719 /* This regd is set during dynamic country setting 720 * This may or may not be used during the runtime 721 */ 722 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 723 724 /* Current DFS Regulatory */ 725 enum ath11k_dfs_region dfs_region; 726 #ifdef CONFIG_ATH11K_DEBUGFS 727 struct dentry *debugfs_soc; 728 struct dentry *debugfs_ath11k; 729 #endif 730 struct ath11k_soc_dp_stats soc_stats; 731 732 unsigned long dev_flags; 733 struct completion driver_recovery; 734 struct workqueue_struct *workqueue; 735 struct work_struct restart_work; 736 struct { 737 /* protected by data_lock */ 738 u32 fw_crash_counter; 739 } stats; 740 u32 pktlog_defs_checksum; 741 742 struct ath11k_dbring_cap *db_caps; 743 u32 num_db_cap; 744 745 struct timer_list mon_reap_timer; 746 747 struct completion htc_suspend; 748 749 /* must be last */ 750 u8 drv_priv[0] __aligned(sizeof(void *)); 751 }; 752 753 struct ath11k_fw_stats_pdev { 754 struct list_head list; 755 756 /* PDEV stats */ 757 s32 ch_noise_floor; 758 /* Cycles spent transmitting frames */ 759 u32 tx_frame_count; 760 /* Cycles spent receiving frames */ 761 u32 rx_frame_count; 762 /* Total channel busy time, evidently */ 763 u32 rx_clear_count; 764 /* Total on-channel time */ 765 u32 cycle_count; 766 u32 phy_err_count; 767 u32 chan_tx_power; 768 u32 ack_rx_bad; 769 u32 rts_bad; 770 u32 rts_good; 771 u32 fcs_bad; 772 u32 no_beacons; 773 u32 mib_int_count; 774 775 /* PDEV TX stats */ 776 /* Num HTT cookies queued to dispatch list */ 777 s32 comp_queued; 778 /* Num HTT cookies dispatched */ 779 s32 comp_delivered; 780 /* Num MSDU queued to WAL */ 781 s32 msdu_enqued; 782 /* Num MPDU queue to WAL */ 783 s32 mpdu_enqued; 784 /* Num MSDUs dropped by WMM limit */ 785 s32 wmm_drop; 786 /* Num Local frames queued */ 787 s32 local_enqued; 788 /* Num Local frames done */ 789 s32 local_freed; 790 /* Num queued to HW */ 791 s32 hw_queued; 792 /* Num PPDU reaped from HW */ 793 s32 hw_reaped; 794 /* Num underruns */ 795 s32 underrun; 796 /* Num PPDUs cleaned up in TX abort */ 797 s32 tx_abort; 798 /* Num MPDUs requed by SW */ 799 s32 mpdus_requed; 800 /* excessive retries */ 801 u32 tx_ko; 802 /* data hw rate code */ 803 u32 data_rc; 804 /* Scheduler self triggers */ 805 u32 self_triggers; 806 /* frames dropped due to excessive sw retries */ 807 u32 sw_retry_failure; 808 /* illegal rate phy errors */ 809 u32 illgl_rate_phy_err; 810 /* wal pdev continuous xretry */ 811 u32 pdev_cont_xretry; 812 /* wal pdev tx timeouts */ 813 u32 pdev_tx_timeout; 814 /* wal pdev resets */ 815 u32 pdev_resets; 816 /* frames dropped due to non-availability of stateless TIDs */ 817 u32 stateless_tid_alloc_failure; 818 /* PhY/BB underrun */ 819 u32 phy_underrun; 820 /* MPDU is more than txop limit */ 821 u32 txop_ovf; 822 823 /* PDEV RX stats */ 824 /* Cnts any change in ring routing mid-ppdu */ 825 s32 mid_ppdu_route_change; 826 /* Total number of statuses processed */ 827 s32 status_rcvd; 828 /* Extra frags on rings 0-3 */ 829 s32 r0_frags; 830 s32 r1_frags; 831 s32 r2_frags; 832 s32 r3_frags; 833 /* MSDUs / MPDUs delivered to HTT */ 834 s32 htt_msdus; 835 s32 htt_mpdus; 836 /* MSDUs / MPDUs delivered to local stack */ 837 s32 loc_msdus; 838 s32 loc_mpdus; 839 /* AMSDUs that have more MSDUs than the status ring size */ 840 s32 oversize_amsdu; 841 /* Number of PHY errors */ 842 s32 phy_errs; 843 /* Number of PHY errors drops */ 844 s32 phy_err_drop; 845 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 846 s32 mpdu_errs; 847 }; 848 849 struct ath11k_fw_stats_vdev { 850 struct list_head list; 851 852 u32 vdev_id; 853 u32 beacon_snr; 854 u32 data_snr; 855 u32 num_tx_frames[WLAN_MAX_AC]; 856 u32 num_rx_frames; 857 u32 num_tx_frames_retries[WLAN_MAX_AC]; 858 u32 num_tx_frames_failures[WLAN_MAX_AC]; 859 u32 num_rts_fail; 860 u32 num_rts_success; 861 u32 num_rx_err; 862 u32 num_rx_discard; 863 u32 num_tx_not_acked; 864 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 865 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 866 }; 867 868 struct ath11k_fw_stats_bcn { 869 struct list_head list; 870 871 u32 vdev_id; 872 u32 tx_bcn_succ_cnt; 873 u32 tx_bcn_outage_cnt; 874 }; 875 876 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[]; 877 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[]; 878 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[]; 879 880 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[]; 881 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[]; 882 883 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[]; 884 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[]; 885 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab); 886 int ath11k_core_pre_init(struct ath11k_base *ab); 887 int ath11k_core_init(struct ath11k_base *ath11k); 888 void ath11k_core_deinit(struct ath11k_base *ath11k); 889 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size, 890 enum ath11k_bus bus, 891 const struct ath11k_bus_params *bus_params); 892 void ath11k_core_free(struct ath11k_base *ath11k); 893 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k, 894 struct ath11k_board_data *bd); 895 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd); 896 int ath11k_core_check_dt(struct ath11k_base *ath11k); 897 898 void ath11k_core_halt(struct ath11k *ar); 899 int ath11k_core_resume(struct ath11k_base *ab); 900 int ath11k_core_suspend(struct ath11k_base *ab); 901 902 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab, 903 const char *filename); 904 905 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state) 906 { 907 switch (state) { 908 case ATH11K_SCAN_IDLE: 909 return "idle"; 910 case ATH11K_SCAN_STARTING: 911 return "starting"; 912 case ATH11K_SCAN_RUNNING: 913 return "running"; 914 case ATH11K_SCAN_ABORTING: 915 return "aborting"; 916 } 917 918 return "unknown"; 919 } 920 921 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb) 922 { 923 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) > 924 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 925 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 926 } 927 928 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb) 929 { 930 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb)); 931 return (struct ath11k_skb_rxcb *)skb->cb; 932 } 933 934 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif) 935 { 936 return (struct ath11k_vif *)vif->drv_priv; 937 } 938 939 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab, 940 int mac_id) 941 { 942 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar; 943 } 944 945 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab, 946 const char *filename, 947 void *buf, size_t buf_len) 948 { 949 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR, 950 ab->hw_params.fw.dir, filename); 951 } 952 953 static inline const char *ath11k_bus_str(enum ath11k_bus bus) 954 { 955 switch (bus) { 956 case ATH11K_BUS_PCI: 957 return "pci"; 958 case ATH11K_BUS_AHB: 959 return "ahb"; 960 } 961 962 return "unknown"; 963 } 964 965 #endif /* _CORE_H_ */ 966