1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef ATH11K_CORE_H 7 #define ATH11K_CORE_H 8 9 #include <linux/types.h> 10 #include <linux/interrupt.h> 11 #include <linux/irq.h> 12 #include <linux/bitfield.h> 13 #include "qmi.h" 14 #include "htc.h" 15 #include "wmi.h" 16 #include "hal.h" 17 #include "dp.h" 18 #include "ce.h" 19 #include "mac.h" 20 #include "hw.h" 21 #include "hal_rx.h" 22 #include "reg.h" 23 #include "thermal.h" 24 #include "dbring.h" 25 #include "spectral.h" 26 27 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 28 29 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512 30 31 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 32 33 /* Pending management packets threshold for dropping probe responses */ 34 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 35 36 #define ATH11K_INVALID_HW_MAC_ID 0xFF 37 38 enum ath11k_supported_bw { 39 ATH11K_BW_20 = 0, 40 ATH11K_BW_40 = 1, 41 ATH11K_BW_80 = 2, 42 ATH11K_BW_160 = 3, 43 }; 44 45 enum wme_ac { 46 WME_AC_BE, 47 WME_AC_BK, 48 WME_AC_VI, 49 WME_AC_VO, 50 WME_NUM_AC 51 }; 52 53 #define ATH11K_HT_MCS_MAX 7 54 #define ATH11K_VHT_MCS_MAX 9 55 #define ATH11K_HE_MCS_MAX 11 56 57 static inline enum wme_ac ath11k_tid_to_ac(u32 tid) 58 { 59 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 60 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 61 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 62 WME_AC_VO); 63 } 64 65 enum ath11k_skb_flags { 66 ATH11K_SKB_HW_80211_ENCAP = BIT(0), 67 }; 68 69 struct ath11k_skb_cb { 70 dma_addr_t paddr; 71 u8 eid; 72 u8 flags; 73 struct ath11k *ar; 74 struct ieee80211_vif *vif; 75 } __packed; 76 77 struct ath11k_skb_rxcb { 78 dma_addr_t paddr; 79 bool is_first_msdu; 80 bool is_last_msdu; 81 bool is_continuation; 82 struct hal_rx_desc *rx_desc; 83 u8 err_rel_src; 84 u8 err_code; 85 u8 mac_id; 86 u8 unmapped; 87 u8 is_frag; 88 u8 tid; 89 }; 90 91 enum ath11k_hw_rev { 92 ATH11K_HW_IPQ8074, 93 }; 94 95 enum ath11k_firmware_mode { 96 /* the default mode, standard 802.11 functionality */ 97 ATH11K_FIRMWARE_MODE_NORMAL, 98 99 /* factory tests etc */ 100 ATH11K_FIRMWARE_MODE_FTM, 101 }; 102 103 #define ATH11K_IRQ_NUM_MAX 52 104 #define ATH11K_EXT_IRQ_GRP_NUM_MAX 11 105 #define ATH11K_EXT_IRQ_NUM_MAX 16 106 107 extern const u8 ath11k_reo_status_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 108 extern const u8 ath11k_tx_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 109 extern const u8 ath11k_rx_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 110 extern const u8 ath11k_rx_err_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 111 extern const u8 ath11k_rx_wbm_rel_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 112 extern const u8 ath11k_rxdma2host_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 113 extern const u8 ath11k_host2rxdma_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 114 extern const u8 rx_mon_status_ring_mask[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 115 116 struct ath11k_ext_irq_grp { 117 struct ath11k_base *ab; 118 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX]; 119 u32 num_irq; 120 u32 grp_id; 121 u64 timestamp; 122 struct napi_struct napi; 123 struct net_device napi_ndev; 124 }; 125 126 #define HEHANDLE_CAP_PHYINFO_SIZE 3 127 #define HECAP_PHYINFO_SIZE 9 128 #define HECAP_MACINFO_SIZE 5 129 #define HECAP_TXRX_MCS_NSS_SIZE 2 130 #define HECAP_PPET16_PPET8_MAX_SIZE 25 131 132 #define HE_PPET16_PPET8_SIZE 8 133 134 /* 802.11ax PPE (PPDU packet Extension) threshold */ 135 struct he_ppe_threshold { 136 u32 numss_m1; 137 u32 ru_mask; 138 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 139 }; 140 141 struct ath11k_he { 142 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 143 u32 hecap_rxmcsnssmap; 144 u32 hecap_txmcsnssmap; 145 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 146 struct he_ppe_threshold hecap_ppet; 147 u32 heop_param; 148 }; 149 150 #define MAX_RADIOS 3 151 152 enum { 153 WMI_HOST_TP_SCALE_MAX = 0, 154 WMI_HOST_TP_SCALE_50 = 1, 155 WMI_HOST_TP_SCALE_25 = 2, 156 WMI_HOST_TP_SCALE_12 = 3, 157 WMI_HOST_TP_SCALE_MIN = 4, 158 WMI_HOST_TP_SCALE_SIZE = 5, 159 }; 160 161 enum ath11k_scan_state { 162 ATH11K_SCAN_IDLE, 163 ATH11K_SCAN_STARTING, 164 ATH11K_SCAN_RUNNING, 165 ATH11K_SCAN_ABORTING, 166 }; 167 168 enum ath11k_dev_flags { 169 ATH11K_CAC_RUNNING, 170 ATH11K_FLAG_CORE_REGISTERED, 171 ATH11K_FLAG_CRASH_FLUSH, 172 ATH11K_FLAG_RAW_MODE, 173 ATH11K_FLAG_HW_CRYPTO_DISABLED, 174 ATH11K_FLAG_BTCOEX, 175 ATH11K_FLAG_RECOVERY, 176 ATH11K_FLAG_UNREGISTERING, 177 ATH11K_FLAG_REGISTERED, 178 }; 179 180 enum ath11k_monitor_flags { 181 ATH11K_FLAG_MONITOR_ENABLED, 182 }; 183 184 struct ath11k_vif { 185 u32 vdev_id; 186 enum wmi_vdev_type vdev_type; 187 enum wmi_vdev_subtype vdev_subtype; 188 u32 beacon_interval; 189 u32 dtim_period; 190 u16 ast_hash; 191 u16 tcl_metadata; 192 u8 hal_addr_search_flags; 193 u8 search_type; 194 195 struct ath11k *ar; 196 struct ieee80211_vif *vif; 197 198 u16 tx_seq_no; 199 struct wmi_wmm_params_all_arg wmm_params; 200 struct list_head list; 201 union { 202 struct { 203 u32 uapsd; 204 } sta; 205 struct { 206 /* 127 stations; wmi limit */ 207 u8 tim_bitmap[16]; 208 u8 tim_len; 209 u32 ssid_len; 210 u8 ssid[IEEE80211_MAX_SSID_LEN]; 211 bool hidden_ssid; 212 /* P2P_IE with NoA attribute for P2P_GO case */ 213 u32 noa_len; 214 u8 *noa_data; 215 } ap; 216 } u; 217 218 bool is_started; 219 bool is_up; 220 bool spectral_enabled; 221 u32 aid; 222 u8 bssid[ETH_ALEN]; 223 struct cfg80211_bitrate_mask bitrate_mask; 224 int num_legacy_stations; 225 int rtscts_prot_mode; 226 int txpower; 227 bool rsnie_present; 228 bool wpaie_present; 229 }; 230 231 struct ath11k_vif_iter { 232 u32 vdev_id; 233 struct ath11k_vif *arvif; 234 }; 235 236 struct ath11k_rx_peer_stats { 237 u64 num_msdu; 238 u64 num_mpdu_fcs_ok; 239 u64 num_mpdu_fcs_err; 240 u64 tcp_msdu_count; 241 u64 udp_msdu_count; 242 u64 other_msdu_count; 243 u64 ampdu_msdu_count; 244 u64 non_ampdu_msdu_count; 245 u64 stbc_count; 246 u64 beamformed_count; 247 u64 mcs_count[HAL_RX_MAX_MCS + 1]; 248 u64 nss_count[HAL_RX_MAX_NSS]; 249 u64 bw_count[HAL_RX_BW_MAX]; 250 u64 gi_count[HAL_RX_GI_MAX]; 251 u64 coding_count[HAL_RX_SU_MU_CODING_MAX]; 252 u64 tid_count[IEEE80211_NUM_TIDS + 1]; 253 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 254 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 255 u64 rx_duration; 256 u64 dcm_count; 257 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 258 }; 259 260 #define ATH11K_HE_MCS_NUM 12 261 #define ATH11K_VHT_MCS_NUM 10 262 #define ATH11K_BW_NUM 4 263 #define ATH11K_NSS_NUM 4 264 #define ATH11K_LEGACY_NUM 12 265 #define ATH11K_GI_NUM 4 266 #define ATH11K_HT_MCS_NUM 32 267 268 enum ath11k_pkt_rx_err { 269 ATH11K_PKT_RX_ERR_FCS, 270 ATH11K_PKT_RX_ERR_TKIP, 271 ATH11K_PKT_RX_ERR_CRYPT, 272 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL, 273 ATH11K_PKT_RX_ERR_MAX, 274 }; 275 276 enum ath11k_ampdu_subfrm_num { 277 ATH11K_AMPDU_SUBFRM_NUM_10, 278 ATH11K_AMPDU_SUBFRM_NUM_20, 279 ATH11K_AMPDU_SUBFRM_NUM_30, 280 ATH11K_AMPDU_SUBFRM_NUM_40, 281 ATH11K_AMPDU_SUBFRM_NUM_50, 282 ATH11K_AMPDU_SUBFRM_NUM_60, 283 ATH11K_AMPDU_SUBFRM_NUM_MORE, 284 ATH11K_AMPDU_SUBFRM_NUM_MAX, 285 }; 286 287 enum ath11k_amsdu_subfrm_num { 288 ATH11K_AMSDU_SUBFRM_NUM_1, 289 ATH11K_AMSDU_SUBFRM_NUM_2, 290 ATH11K_AMSDU_SUBFRM_NUM_3, 291 ATH11K_AMSDU_SUBFRM_NUM_4, 292 ATH11K_AMSDU_SUBFRM_NUM_MORE, 293 ATH11K_AMSDU_SUBFRM_NUM_MAX, 294 }; 295 296 enum ath11k_counter_type { 297 ATH11K_COUNTER_TYPE_BYTES, 298 ATH11K_COUNTER_TYPE_PKTS, 299 ATH11K_COUNTER_TYPE_MAX, 300 }; 301 302 enum ath11k_stats_type { 303 ATH11K_STATS_TYPE_SUCC, 304 ATH11K_STATS_TYPE_FAIL, 305 ATH11K_STATS_TYPE_RETRY, 306 ATH11K_STATS_TYPE_AMPDU, 307 ATH11K_STATS_TYPE_MAX, 308 }; 309 310 struct ath11k_htt_data_stats { 311 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM]; 312 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM]; 313 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM]; 314 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM]; 315 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM]; 316 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM]; 317 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM]; 318 }; 319 320 struct ath11k_htt_tx_stats { 321 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX]; 322 u64 tx_duration; 323 u64 ba_fails; 324 u64 ack_fails; 325 }; 326 327 struct ath11k_per_ppdu_tx_stats { 328 u16 succ_pkts; 329 u16 failed_pkts; 330 u16 retry_pkts; 331 u32 succ_bytes; 332 u32 failed_bytes; 333 u32 retry_bytes; 334 }; 335 336 struct ath11k_sta { 337 struct ath11k_vif *arvif; 338 339 /* the following are protected by ar->data_lock */ 340 u32 changed; /* IEEE80211_RC_* */ 341 u32 bw; 342 u32 nss; 343 u32 smps; 344 enum hal_pn_type pn_type; 345 346 struct work_struct update_wk; 347 struct rate_info txrate; 348 struct rate_info last_txrate; 349 u64 rx_duration; 350 u64 tx_duration; 351 u8 rssi_comb; 352 struct ath11k_htt_tx_stats *tx_stats; 353 struct ath11k_rx_peer_stats *rx_stats; 354 355 #ifdef CONFIG_MAC80211_DEBUGFS 356 /* protected by conf_mutex */ 357 bool aggr_mode; 358 #endif 359 }; 360 361 #define ATH11K_MIN_5G_FREQ 4150 362 #define ATH11K_MIN_6G_FREQ 5945 363 #define ATH11K_MAX_6G_FREQ 7115 364 #define ATH11K_NUM_CHANS 100 365 #define ATH11K_MAX_5G_CHAN 173 366 367 enum ath11k_state { 368 ATH11K_STATE_OFF, 369 ATH11K_STATE_ON, 370 ATH11K_STATE_RESTARTING, 371 ATH11K_STATE_RESTARTED, 372 ATH11K_STATE_WEDGED, 373 /* Add other states as required */ 374 }; 375 376 /* Antenna noise floor */ 377 #define ATH11K_DEFAULT_NOISE_FLOOR -95 378 379 struct ath11k_fw_stats { 380 struct dentry *debugfs_fwstats; 381 u32 pdev_id; 382 u32 stats_id; 383 struct list_head pdevs; 384 struct list_head vdevs; 385 struct list_head bcn; 386 }; 387 388 struct ath11k_dbg_htt_stats { 389 u8 type; 390 u8 reset; 391 struct debug_htt_stats_req *stats_req; 392 /* protects shared stats req buffer */ 393 spinlock_t lock; 394 }; 395 396 struct ath11k_debug { 397 struct dentry *debugfs_pdev; 398 struct ath11k_dbg_htt_stats htt_stats; 399 u32 extd_tx_stats; 400 struct ath11k_fw_stats fw_stats; 401 struct completion fw_stats_complete; 402 bool fw_stats_done; 403 u32 extd_rx_stats; 404 u32 pktlog_filter; 405 u32 pktlog_mode; 406 u32 pktlog_peer_valid; 407 u8 pktlog_peer_addr[ETH_ALEN]; 408 u32 rx_filter; 409 }; 410 411 struct ath11k_per_peer_tx_stats { 412 u32 succ_bytes; 413 u32 retry_bytes; 414 u32 failed_bytes; 415 u16 succ_pkts; 416 u16 retry_pkts; 417 u16 failed_pkts; 418 u32 duration; 419 u8 ba_fails; 420 bool is_ampdu; 421 }; 422 423 #define ATH11K_FLUSH_TIMEOUT (5 * HZ) 424 425 struct ath11k_vdev_stop_status { 426 bool stop_in_progress; 427 u32 vdev_id; 428 }; 429 430 struct ath11k { 431 struct ath11k_base *ab; 432 struct ath11k_pdev *pdev; 433 struct ieee80211_hw *hw; 434 struct ieee80211_ops *ops; 435 struct ath11k_pdev_wmi *wmi; 436 struct ath11k_pdev_dp dp; 437 u8 mac_addr[ETH_ALEN]; 438 u32 ht_cap_info; 439 u32 vht_cap_info; 440 struct ath11k_he ar_he; 441 enum ath11k_state state; 442 bool supports_6ghz; 443 struct { 444 struct completion started; 445 struct completion completed; 446 struct completion on_channel; 447 struct delayed_work timeout; 448 enum ath11k_scan_state state; 449 bool is_roc; 450 int vdev_id; 451 int roc_freq; 452 bool roc_notify; 453 } scan; 454 455 struct { 456 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 457 struct ieee80211_sband_iftype_data 458 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 459 } mac; 460 unsigned long dev_flags; 461 unsigned int filter_flags; 462 unsigned long monitor_flags; 463 u32 min_tx_power; 464 u32 max_tx_power; 465 u32 txpower_limit_2g; 466 u32 txpower_limit_5g; 467 u32 txpower_scale; 468 u32 power_scale; 469 u32 chan_tx_pwr; 470 u32 num_stations; 471 u32 max_num_stations; 472 bool monitor_present; 473 /* To synchronize concurrent synchronous mac80211 callback operations, 474 * concurrent debugfs configuration and concurrent FW statistics events. 475 */ 476 struct mutex conf_mutex; 477 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 478 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info, 479 * channel context data, survey info, test mode data. 480 */ 481 spinlock_t data_lock; 482 483 struct list_head arvifs; 484 /* should never be NULL; needed for regular htt rx */ 485 struct ieee80211_channel *rx_channel; 486 487 /* valid during scan; needed for mgmt rx during scan */ 488 struct ieee80211_channel *scan_channel; 489 490 u8 cfg_tx_chainmask; 491 u8 cfg_rx_chainmask; 492 u8 num_rx_chains; 493 u8 num_tx_chains; 494 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 495 u8 pdev_idx; 496 u8 lmac_id; 497 498 struct completion peer_assoc_done; 499 500 int install_key_status; 501 struct completion install_key_done; 502 503 int last_wmi_vdev_start_status; 504 struct ath11k_vdev_stop_status vdev_stop_status; 505 struct completion vdev_setup_done; 506 507 int num_peers; 508 int max_num_peers; 509 u32 num_started_vdevs; 510 u32 num_created_vdevs; 511 unsigned long long allocated_vdev_map; 512 513 struct idr txmgmt_idr; 514 /* protects txmgmt_idr data */ 515 spinlock_t txmgmt_idr_lock; 516 atomic_t num_pending_mgmt_tx; 517 518 /* cycle count is reported twice for each visited channel during scan. 519 * access protected by data_lock 520 */ 521 u32 survey_last_rx_clear_count; 522 u32 survey_last_cycle_count; 523 524 /* Channel info events are expected to come in pairs without and with 525 * COMPLETE flag set respectively for each channel visit during scan. 526 * 527 * However there are deviations from this rule. This flag is used to 528 * avoid reporting garbage data. 529 */ 530 bool ch_info_can_report_survey; 531 struct survey_info survey[ATH11K_NUM_CHANS]; 532 struct completion bss_survey_done; 533 534 struct work_struct regd_update_work; 535 536 struct work_struct wmi_mgmt_tx_work; 537 struct sk_buff_head wmi_mgmt_tx_queue; 538 539 struct ath11k_per_peer_tx_stats peer_tx_stats; 540 struct list_head ppdu_stats_info; 541 u32 ppdu_stat_list_depth; 542 543 struct ath11k_per_peer_tx_stats cached_stats; 544 u32 last_ppdu_id; 545 u32 cached_ppdu_id; 546 #ifdef CONFIG_ATH11K_DEBUGFS 547 struct ath11k_debug debug; 548 #endif 549 #ifdef CONFIG_ATH11K_SPECTRAL 550 struct ath11k_spectral spectral; 551 #endif 552 bool dfs_block_radar_events; 553 struct ath11k_thermal thermal; 554 }; 555 556 struct ath11k_band_cap { 557 u32 max_bw_supported; 558 u32 ht_cap_info; 559 u32 he_cap_info[2]; 560 u32 he_mcs; 561 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 562 struct ath11k_ppe_threshold he_ppet; 563 u16 he_6ghz_capa; 564 }; 565 566 struct ath11k_pdev_cap { 567 u32 supported_bands; 568 u32 ampdu_density; 569 u32 vht_cap; 570 u32 vht_mcs; 571 u32 he_mcs; 572 u32 tx_chain_mask; 573 u32 rx_chain_mask; 574 u32 tx_chain_mask_shift; 575 u32 rx_chain_mask_shift; 576 struct ath11k_band_cap band[NUM_NL80211_BANDS]; 577 }; 578 579 struct ath11k_pdev { 580 struct ath11k *ar; 581 u32 pdev_id; 582 struct ath11k_pdev_cap cap; 583 u8 mac_addr[ETH_ALEN]; 584 }; 585 586 struct ath11k_board_data { 587 const struct firmware *fw; 588 const void *data; 589 size_t len; 590 }; 591 592 /* IPQ8074 HW channel counters frequency value in hertz */ 593 #define IPQ8074_CC_FREQ_HERTZ 320000 594 595 struct ath11k_bp_stats { 596 /* Head Pointer reported by the last HTT Backpressure event for the ring */ 597 u16 hp; 598 599 /* Tail Pointer reported by the last HTT Backpressure event for the ring */ 600 u16 tp; 601 602 /* Number of Backpressure events received for the ring */ 603 u32 count; 604 605 /* Last recorded event timestamp */ 606 unsigned long jiffies; 607 }; 608 609 struct ath11k_dp_ring_bp_stats { 610 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX]; 611 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS]; 612 }; 613 614 struct ath11k_soc_dp_tx_err_stats { 615 /* TCL Ring Descriptor unavailable */ 616 u32 desc_na[DP_TCL_NUM_RING_MAX]; 617 /* Other failures during dp_tx due to mem allocation failure 618 * idr unavailable etc. 619 */ 620 atomic_t misc_fail; 621 }; 622 623 struct ath11k_soc_dp_stats { 624 u32 err_ring_pkts; 625 u32 invalid_rbm; 626 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; 627 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; 628 u32 hal_reo_error[DP_REO_DST_RING_MAX]; 629 struct ath11k_soc_dp_tx_err_stats tx_err; 630 struct ath11k_dp_ring_bp_stats bp_stats; 631 }; 632 633 /* Master structure to hold the hw data which may be used in core module */ 634 struct ath11k_base { 635 enum ath11k_hw_rev hw_rev; 636 struct platform_device *pdev; 637 struct device *dev; 638 struct ath11k_qmi qmi; 639 struct ath11k_wmi_base wmi_ab; 640 struct completion fw_ready; 641 struct rproc *tgt_rproc; 642 int num_radios; 643 /* HW channel counters frequency value in hertz common to all MACs */ 644 u32 cc_freq_hz; 645 646 struct ath11k_htc htc; 647 648 struct ath11k_dp dp; 649 650 void __iomem *mem; 651 unsigned long mem_len; 652 653 struct { 654 const struct ath11k_hif_ops *ops; 655 } hif; 656 657 struct ath11k_ce ce; 658 struct timer_list rx_replenish_retry; 659 struct ath11k_hal hal; 660 /* To synchronize core_start/core_stop */ 661 struct mutex core_lock; 662 /* Protects data like peers */ 663 spinlock_t base_lock; 664 struct ath11k_pdev pdevs[MAX_RADIOS]; 665 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS]; 666 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS]; 667 unsigned long long free_vdev_map; 668 struct list_head peers; 669 wait_queue_head_t peer_mapping_wq; 670 u8 mac_addr[ETH_ALEN]; 671 bool wmi_ready; 672 u32 wlan_init_status; 673 int irq_num[ATH11K_IRQ_NUM_MAX]; 674 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 675 struct napi_struct *napi; 676 struct ath11k_targ_cap target_caps; 677 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 678 bool pdevs_macaddr_valid; 679 int bd_api; 680 struct ath11k_hw_params hw_params; 681 const struct firmware *cal_file; 682 683 /* Below regd's are protected by ab->data_lock */ 684 /* This is the regd set for every radio 685 * by the firmware during initializatin 686 */ 687 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 688 /* This regd is set during dynamic country setting 689 * This may or may not be used during the runtime 690 */ 691 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 692 693 /* Current DFS Regulatory */ 694 enum ath11k_dfs_region dfs_region; 695 #ifdef CONFIG_ATH11K_DEBUGFS 696 struct dentry *debugfs_soc; 697 struct dentry *debugfs_ath11k; 698 #endif 699 struct ath11k_soc_dp_stats soc_stats; 700 701 unsigned long dev_flags; 702 struct completion driver_recovery; 703 struct workqueue_struct *workqueue; 704 struct work_struct restart_work; 705 struct { 706 /* protected by data_lock */ 707 u32 fw_crash_counter; 708 } stats; 709 u32 pktlog_defs_checksum; 710 711 /* Round robbin based TCL ring selector */ 712 atomic_t tcl_ring_selector; 713 714 struct ath11k_dbring_cap *db_caps; 715 u32 num_db_cap; 716 717 /* must be last */ 718 u8 drv_priv[0] __aligned(sizeof(void *)); 719 }; 720 721 struct ath11k_fw_stats_pdev { 722 struct list_head list; 723 724 /* PDEV stats */ 725 s32 ch_noise_floor; 726 /* Cycles spent transmitting frames */ 727 u32 tx_frame_count; 728 /* Cycles spent receiving frames */ 729 u32 rx_frame_count; 730 /* Total channel busy time, evidently */ 731 u32 rx_clear_count; 732 /* Total on-channel time */ 733 u32 cycle_count; 734 u32 phy_err_count; 735 u32 chan_tx_power; 736 u32 ack_rx_bad; 737 u32 rts_bad; 738 u32 rts_good; 739 u32 fcs_bad; 740 u32 no_beacons; 741 u32 mib_int_count; 742 743 /* PDEV TX stats */ 744 /* Num HTT cookies queued to dispatch list */ 745 s32 comp_queued; 746 /* Num HTT cookies dispatched */ 747 s32 comp_delivered; 748 /* Num MSDU queued to WAL */ 749 s32 msdu_enqued; 750 /* Num MPDU queue to WAL */ 751 s32 mpdu_enqued; 752 /* Num MSDUs dropped by WMM limit */ 753 s32 wmm_drop; 754 /* Num Local frames queued */ 755 s32 local_enqued; 756 /* Num Local frames done */ 757 s32 local_freed; 758 /* Num queued to HW */ 759 s32 hw_queued; 760 /* Num PPDU reaped from HW */ 761 s32 hw_reaped; 762 /* Num underruns */ 763 s32 underrun; 764 /* Num PPDUs cleaned up in TX abort */ 765 s32 tx_abort; 766 /* Num MPDUs requed by SW */ 767 s32 mpdus_requed; 768 /* excessive retries */ 769 u32 tx_ko; 770 /* data hw rate code */ 771 u32 data_rc; 772 /* Scheduler self triggers */ 773 u32 self_triggers; 774 /* frames dropped due to excessive sw retries */ 775 u32 sw_retry_failure; 776 /* illegal rate phy errors */ 777 u32 illgl_rate_phy_err; 778 /* wal pdev continuous xretry */ 779 u32 pdev_cont_xretry; 780 /* wal pdev tx timeouts */ 781 u32 pdev_tx_timeout; 782 /* wal pdev resets */ 783 u32 pdev_resets; 784 /* frames dropped due to non-availability of stateless TIDs */ 785 u32 stateless_tid_alloc_failure; 786 /* PhY/BB underrun */ 787 u32 phy_underrun; 788 /* MPDU is more than txop limit */ 789 u32 txop_ovf; 790 791 /* PDEV RX stats */ 792 /* Cnts any change in ring routing mid-ppdu */ 793 s32 mid_ppdu_route_change; 794 /* Total number of statuses processed */ 795 s32 status_rcvd; 796 /* Extra frags on rings 0-3 */ 797 s32 r0_frags; 798 s32 r1_frags; 799 s32 r2_frags; 800 s32 r3_frags; 801 /* MSDUs / MPDUs delivered to HTT */ 802 s32 htt_msdus; 803 s32 htt_mpdus; 804 /* MSDUs / MPDUs delivered to local stack */ 805 s32 loc_msdus; 806 s32 loc_mpdus; 807 /* AMSDUs that have more MSDUs than the status ring size */ 808 s32 oversize_amsdu; 809 /* Number of PHY errors */ 810 s32 phy_errs; 811 /* Number of PHY errors drops */ 812 s32 phy_err_drop; 813 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 814 s32 mpdu_errs; 815 }; 816 817 struct ath11k_fw_stats_vdev { 818 struct list_head list; 819 820 u32 vdev_id; 821 u32 beacon_snr; 822 u32 data_snr; 823 u32 num_tx_frames[WLAN_MAX_AC]; 824 u32 num_rx_frames; 825 u32 num_tx_frames_retries[WLAN_MAX_AC]; 826 u32 num_tx_frames_failures[WLAN_MAX_AC]; 827 u32 num_rts_fail; 828 u32 num_rts_success; 829 u32 num_rx_err; 830 u32 num_rx_discard; 831 u32 num_tx_not_acked; 832 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 833 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 834 }; 835 836 struct ath11k_fw_stats_bcn { 837 struct list_head list; 838 839 u32 vdev_id; 840 u32 tx_bcn_succ_cnt; 841 u32 tx_bcn_outage_cnt; 842 }; 843 844 void ath11k_peer_unmap_event(struct ath11k_base *ab, u16 peer_id); 845 void ath11k_peer_map_event(struct ath11k_base *ab, u8 vdev_id, u16 peer_id, 846 u8 *mac_addr, u16 ast_hash); 847 struct ath11k_peer *ath11k_peer_find(struct ath11k_base *ab, int vdev_id, 848 const u8 *addr); 849 struct ath11k_peer *ath11k_peer_find_by_addr(struct ath11k_base *ab, 850 const u8 *addr); 851 struct ath11k_peer *ath11k_peer_find_by_id(struct ath11k_base *ab, int peer_id); 852 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab); 853 int ath11k_core_init(struct ath11k_base *ath11k); 854 void ath11k_core_deinit(struct ath11k_base *ath11k); 855 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size, 856 enum ath11k_bus bus); 857 void ath11k_core_free(struct ath11k_base *ath11k); 858 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k, 859 struct ath11k_board_data *bd); 860 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd); 861 862 void ath11k_core_halt(struct ath11k *ar); 863 u8 ath11k_core_get_hw_mac_id(struct ath11k_base *ab, int pdev_idx); 864 865 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state) 866 { 867 switch (state) { 868 case ATH11K_SCAN_IDLE: 869 return "idle"; 870 case ATH11K_SCAN_STARTING: 871 return "starting"; 872 case ATH11K_SCAN_RUNNING: 873 return "running"; 874 case ATH11K_SCAN_ABORTING: 875 return "aborting"; 876 } 877 878 return "unknown"; 879 } 880 881 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb) 882 { 883 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 884 } 885 886 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb) 887 { 888 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb)); 889 return (struct ath11k_skb_rxcb *)skb->cb; 890 } 891 892 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif) 893 { 894 return (struct ath11k_vif *)vif->drv_priv; 895 } 896 897 #endif /* _CORE_H_ */ 898