1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef ATH11K_CORE_H
7 #define ATH11K_CORE_H
8 
9 #include <linux/types.h>
10 #include <linux/interrupt.h>
11 #include <linux/irq.h>
12 #include <linux/bitfield.h>
13 #include "qmi.h"
14 #include "htc.h"
15 #include "wmi.h"
16 #include "hal.h"
17 #include "dp.h"
18 #include "ce.h"
19 #include "mac.h"
20 #include "hw.h"
21 #include "hal_rx.h"
22 #include "reg.h"
23 #include "thermal.h"
24 #include "dbring.h"
25 #include "spectral.h"
26 
27 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
28 
29 #define ATH11K_TX_MGMT_NUM_PENDING_MAX	512
30 
31 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
32 
33 /* Pending management packets threshold for dropping probe responses */
34 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
35 
36 #define ATH11K_INVALID_HW_MAC_ID	0xFF
37 
38 extern unsigned int ath11k_frame_mode;
39 
40 #define ATH11K_MON_TIMER_INTERVAL  10
41 
42 enum ath11k_supported_bw {
43 	ATH11K_BW_20	= 0,
44 	ATH11K_BW_40	= 1,
45 	ATH11K_BW_80	= 2,
46 	ATH11K_BW_160	= 3,
47 };
48 
49 enum wme_ac {
50 	WME_AC_BE,
51 	WME_AC_BK,
52 	WME_AC_VI,
53 	WME_AC_VO,
54 	WME_NUM_AC
55 };
56 
57 #define ATH11K_HT_MCS_MAX	7
58 #define ATH11K_VHT_MCS_MAX	9
59 #define ATH11K_HE_MCS_MAX	11
60 
61 enum ath11k_crypt_mode {
62 	/* Only use hardware crypto engine */
63 	ATH11K_CRYPT_MODE_HW,
64 	/* Only use software crypto */
65 	ATH11K_CRYPT_MODE_SW,
66 };
67 
68 static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
69 {
70 	return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
71 		((tid == 1) || (tid == 2)) ? WME_AC_BK :
72 		((tid == 4) || (tid == 5)) ? WME_AC_VI :
73 		WME_AC_VO);
74 }
75 
76 enum ath11k_skb_flags {
77 	ATH11K_SKB_HW_80211_ENCAP = BIT(0),
78 	ATH11K_SKB_CIPHER_SET = BIT(1),
79 };
80 
81 struct ath11k_skb_cb {
82 	dma_addr_t paddr;
83 	u8 eid;
84 	u8 flags;
85 	u32 cipher;
86 	struct ath11k *ar;
87 	struct ieee80211_vif *vif;
88 } __packed;
89 
90 struct ath11k_skb_rxcb {
91 	dma_addr_t paddr;
92 	bool is_first_msdu;
93 	bool is_last_msdu;
94 	bool is_continuation;
95 	struct hal_rx_desc *rx_desc;
96 	u8 err_rel_src;
97 	u8 err_code;
98 	u8 mac_id;
99 	u8 unmapped;
100 	u8 is_frag;
101 	u8 tid;
102 };
103 
104 enum ath11k_hw_rev {
105 	ATH11K_HW_IPQ8074,
106 	ATH11K_HW_QCA6390_HW20,
107 	ATH11K_HW_IPQ6018_HW10,
108 };
109 
110 enum ath11k_firmware_mode {
111 	/* the default mode, standard 802.11 functionality */
112 	ATH11K_FIRMWARE_MODE_NORMAL,
113 
114 	/* factory tests etc */
115 	ATH11K_FIRMWARE_MODE_FTM,
116 
117 	/* Cold boot calibration */
118 	ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
119 };
120 
121 extern bool ath11k_cold_boot_cal;
122 
123 #define ATH11K_IRQ_NUM_MAX 52
124 #define ATH11K_EXT_IRQ_NUM_MAX	16
125 
126 struct ath11k_ext_irq_grp {
127 	struct ath11k_base *ab;
128 	u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
129 	u32 num_irq;
130 	u32 grp_id;
131 	u64 timestamp;
132 	struct napi_struct napi;
133 	struct net_device napi_ndev;
134 };
135 
136 #define HEHANDLE_CAP_PHYINFO_SIZE       3
137 #define HECAP_PHYINFO_SIZE              9
138 #define HECAP_MACINFO_SIZE              5
139 #define HECAP_TXRX_MCS_NSS_SIZE         2
140 #define HECAP_PPET16_PPET8_MAX_SIZE     25
141 
142 #define HE_PPET16_PPET8_SIZE            8
143 
144 /* 802.11ax PPE (PPDU packet Extension) threshold */
145 struct he_ppe_threshold {
146 	u32 numss_m1;
147 	u32 ru_mask;
148 	u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
149 };
150 
151 struct ath11k_he {
152 	u8 hecap_macinfo[HECAP_MACINFO_SIZE];
153 	u32 hecap_rxmcsnssmap;
154 	u32 hecap_txmcsnssmap;
155 	u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
156 	struct he_ppe_threshold   hecap_ppet;
157 	u32 heop_param;
158 };
159 
160 #define MAX_RADIOS 3
161 
162 enum {
163 	WMI_HOST_TP_SCALE_MAX   = 0,
164 	WMI_HOST_TP_SCALE_50    = 1,
165 	WMI_HOST_TP_SCALE_25    = 2,
166 	WMI_HOST_TP_SCALE_12    = 3,
167 	WMI_HOST_TP_SCALE_MIN   = 4,
168 	WMI_HOST_TP_SCALE_SIZE   = 5,
169 };
170 
171 enum ath11k_scan_state {
172 	ATH11K_SCAN_IDLE,
173 	ATH11K_SCAN_STARTING,
174 	ATH11K_SCAN_RUNNING,
175 	ATH11K_SCAN_ABORTING,
176 };
177 
178 enum ath11k_dev_flags {
179 	ATH11K_CAC_RUNNING,
180 	ATH11K_FLAG_CORE_REGISTERED,
181 	ATH11K_FLAG_CRASH_FLUSH,
182 	ATH11K_FLAG_RAW_MODE,
183 	ATH11K_FLAG_HW_CRYPTO_DISABLED,
184 	ATH11K_FLAG_BTCOEX,
185 	ATH11K_FLAG_RECOVERY,
186 	ATH11K_FLAG_UNREGISTERING,
187 	ATH11K_FLAG_REGISTERED,
188 	ATH11K_FLAG_QMI_FAIL,
189 	ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
190 };
191 
192 enum ath11k_monitor_flags {
193 	ATH11K_FLAG_MONITOR_ENABLED,
194 };
195 
196 struct ath11k_vif {
197 	u32 vdev_id;
198 	enum wmi_vdev_type vdev_type;
199 	enum wmi_vdev_subtype vdev_subtype;
200 	u32 beacon_interval;
201 	u32 dtim_period;
202 	u16 ast_hash;
203 	u16 ast_idx;
204 	u16 tcl_metadata;
205 	u8 hal_addr_search_flags;
206 	u8 search_type;
207 
208 	struct ath11k *ar;
209 	struct ieee80211_vif *vif;
210 
211 	u16 tx_seq_no;
212 	struct wmi_wmm_params_all_arg wmm_params;
213 	struct list_head list;
214 	union {
215 		struct {
216 			u32 uapsd;
217 		} sta;
218 		struct {
219 			/* 127 stations; wmi limit */
220 			u8 tim_bitmap[16];
221 			u8 tim_len;
222 			u32 ssid_len;
223 			u8 ssid[IEEE80211_MAX_SSID_LEN];
224 			bool hidden_ssid;
225 			/* P2P_IE with NoA attribute for P2P_GO case */
226 			u32 noa_len;
227 			u8 *noa_data;
228 		} ap;
229 	} u;
230 
231 	bool is_started;
232 	bool is_up;
233 	bool spectral_enabled;
234 	u32 aid;
235 	u8 bssid[ETH_ALEN];
236 	struct cfg80211_bitrate_mask bitrate_mask;
237 	int num_legacy_stations;
238 	int rtscts_prot_mode;
239 	int txpower;
240 	bool rsnie_present;
241 	bool wpaie_present;
242 	struct ieee80211_chanctx_conf chanctx;
243 };
244 
245 struct ath11k_vif_iter {
246 	u32 vdev_id;
247 	struct ath11k_vif *arvif;
248 };
249 
250 struct ath11k_rx_peer_stats {
251 	u64 num_msdu;
252 	u64 num_mpdu_fcs_ok;
253 	u64 num_mpdu_fcs_err;
254 	u64 tcp_msdu_count;
255 	u64 udp_msdu_count;
256 	u64 other_msdu_count;
257 	u64 ampdu_msdu_count;
258 	u64 non_ampdu_msdu_count;
259 	u64 stbc_count;
260 	u64 beamformed_count;
261 	u64 mcs_count[HAL_RX_MAX_MCS + 1];
262 	u64 nss_count[HAL_RX_MAX_NSS];
263 	u64 bw_count[HAL_RX_BW_MAX];
264 	u64 gi_count[HAL_RX_GI_MAX];
265 	u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
266 	u64 tid_count[IEEE80211_NUM_TIDS + 1];
267 	u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
268 	u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
269 	u64 rx_duration;
270 	u64 dcm_count;
271 	u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
272 };
273 
274 #define ATH11K_HE_MCS_NUM       12
275 #define ATH11K_VHT_MCS_NUM      10
276 #define ATH11K_BW_NUM           4
277 #define ATH11K_NSS_NUM          4
278 #define ATH11K_LEGACY_NUM       12
279 #define ATH11K_GI_NUM           4
280 #define ATH11K_HT_MCS_NUM       32
281 
282 enum ath11k_pkt_rx_err {
283 	ATH11K_PKT_RX_ERR_FCS,
284 	ATH11K_PKT_RX_ERR_TKIP,
285 	ATH11K_PKT_RX_ERR_CRYPT,
286 	ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
287 	ATH11K_PKT_RX_ERR_MAX,
288 };
289 
290 enum ath11k_ampdu_subfrm_num {
291 	ATH11K_AMPDU_SUBFRM_NUM_10,
292 	ATH11K_AMPDU_SUBFRM_NUM_20,
293 	ATH11K_AMPDU_SUBFRM_NUM_30,
294 	ATH11K_AMPDU_SUBFRM_NUM_40,
295 	ATH11K_AMPDU_SUBFRM_NUM_50,
296 	ATH11K_AMPDU_SUBFRM_NUM_60,
297 	ATH11K_AMPDU_SUBFRM_NUM_MORE,
298 	ATH11K_AMPDU_SUBFRM_NUM_MAX,
299 };
300 
301 enum ath11k_amsdu_subfrm_num {
302 	ATH11K_AMSDU_SUBFRM_NUM_1,
303 	ATH11K_AMSDU_SUBFRM_NUM_2,
304 	ATH11K_AMSDU_SUBFRM_NUM_3,
305 	ATH11K_AMSDU_SUBFRM_NUM_4,
306 	ATH11K_AMSDU_SUBFRM_NUM_MORE,
307 	ATH11K_AMSDU_SUBFRM_NUM_MAX,
308 };
309 
310 enum ath11k_counter_type {
311 	ATH11K_COUNTER_TYPE_BYTES,
312 	ATH11K_COUNTER_TYPE_PKTS,
313 	ATH11K_COUNTER_TYPE_MAX,
314 };
315 
316 enum ath11k_stats_type {
317 	ATH11K_STATS_TYPE_SUCC,
318 	ATH11K_STATS_TYPE_FAIL,
319 	ATH11K_STATS_TYPE_RETRY,
320 	ATH11K_STATS_TYPE_AMPDU,
321 	ATH11K_STATS_TYPE_MAX,
322 };
323 
324 struct ath11k_htt_data_stats {
325 	u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
326 	u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
327 	u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
328 	u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
329 	u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
330 	u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
331 	u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
332 };
333 
334 struct ath11k_htt_tx_stats {
335 	struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
336 	u64 tx_duration;
337 	u64 ba_fails;
338 	u64 ack_fails;
339 };
340 
341 struct ath11k_per_ppdu_tx_stats {
342 	u16 succ_pkts;
343 	u16 failed_pkts;
344 	u16 retry_pkts;
345 	u32 succ_bytes;
346 	u32 failed_bytes;
347 	u32 retry_bytes;
348 };
349 
350 struct ath11k_sta {
351 	struct ath11k_vif *arvif;
352 
353 	/* the following are protected by ar->data_lock */
354 	u32 changed; /* IEEE80211_RC_* */
355 	u32 bw;
356 	u32 nss;
357 	u32 smps;
358 	enum hal_pn_type pn_type;
359 
360 	struct work_struct update_wk;
361 	struct rate_info txrate;
362 	struct rate_info last_txrate;
363 	u64 rx_duration;
364 	u64 tx_duration;
365 	u8 rssi_comb;
366 	struct ath11k_htt_tx_stats *tx_stats;
367 	struct ath11k_rx_peer_stats *rx_stats;
368 
369 #ifdef CONFIG_MAC80211_DEBUGFS
370 	/* protected by conf_mutex */
371 	bool aggr_mode;
372 #endif
373 };
374 
375 #define ATH11K_MIN_5G_FREQ 4150
376 #define ATH11K_MIN_6G_FREQ 5945
377 #define ATH11K_MAX_6G_FREQ 7115
378 #define ATH11K_NUM_CHANS 100
379 #define ATH11K_MAX_5G_CHAN 173
380 
381 enum ath11k_state {
382 	ATH11K_STATE_OFF,
383 	ATH11K_STATE_ON,
384 	ATH11K_STATE_RESTARTING,
385 	ATH11K_STATE_RESTARTED,
386 	ATH11K_STATE_WEDGED,
387 	/* Add other states as required */
388 };
389 
390 /* Antenna noise floor */
391 #define ATH11K_DEFAULT_NOISE_FLOOR -95
392 
393 struct ath11k_fw_stats {
394 	struct dentry *debugfs_fwstats;
395 	u32 pdev_id;
396 	u32 stats_id;
397 	struct list_head pdevs;
398 	struct list_head vdevs;
399 	struct list_head bcn;
400 };
401 
402 struct ath11k_dbg_htt_stats {
403 	u8 type;
404 	u8 reset;
405 	struct debug_htt_stats_req *stats_req;
406 	/* protects shared stats req buffer */
407 	spinlock_t lock;
408 };
409 
410 struct ath11k_debug {
411 	struct dentry *debugfs_pdev;
412 	struct ath11k_dbg_htt_stats htt_stats;
413 	u32 extd_tx_stats;
414 	struct ath11k_fw_stats fw_stats;
415 	struct completion fw_stats_complete;
416 	bool fw_stats_done;
417 	u32 extd_rx_stats;
418 	u32 pktlog_filter;
419 	u32 pktlog_mode;
420 	u32 pktlog_peer_valid;
421 	u8 pktlog_peer_addr[ETH_ALEN];
422 	u32 rx_filter;
423 };
424 
425 struct ath11k_per_peer_tx_stats {
426 	u32 succ_bytes;
427 	u32 retry_bytes;
428 	u32 failed_bytes;
429 	u16 succ_pkts;
430 	u16 retry_pkts;
431 	u16 failed_pkts;
432 	u32 duration;
433 	u8 ba_fails;
434 	bool is_ampdu;
435 };
436 
437 #define ATH11K_FLUSH_TIMEOUT (5 * HZ)
438 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
439 
440 struct ath11k {
441 	struct ath11k_base *ab;
442 	struct ath11k_pdev *pdev;
443 	struct ieee80211_hw *hw;
444 	struct ieee80211_ops *ops;
445 	struct ath11k_pdev_wmi *wmi;
446 	struct ath11k_pdev_dp dp;
447 	u8 mac_addr[ETH_ALEN];
448 	u32 ht_cap_info;
449 	u32 vht_cap_info;
450 	struct ath11k_he ar_he;
451 	enum ath11k_state state;
452 	bool supports_6ghz;
453 	struct {
454 		struct completion started;
455 		struct completion completed;
456 		struct completion on_channel;
457 		struct delayed_work timeout;
458 		enum ath11k_scan_state state;
459 		bool is_roc;
460 		int vdev_id;
461 		int roc_freq;
462 		bool roc_notify;
463 	} scan;
464 
465 	struct {
466 		struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
467 		struct ieee80211_sband_iftype_data
468 			iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
469 	} mac;
470 
471 	unsigned long dev_flags;
472 	unsigned int filter_flags;
473 	unsigned long monitor_flags;
474 	u32 min_tx_power;
475 	u32 max_tx_power;
476 	u32 txpower_limit_2g;
477 	u32 txpower_limit_5g;
478 	u32 txpower_scale;
479 	u32 power_scale;
480 	u32 chan_tx_pwr;
481 	u32 num_stations;
482 	u32 max_num_stations;
483 	bool monitor_present;
484 	/* To synchronize concurrent synchronous mac80211 callback operations,
485 	 * concurrent debugfs configuration and concurrent FW statistics events.
486 	 */
487 	struct mutex conf_mutex;
488 	/* protects the radio specific data like debug stats, ppdu_stats_info stats,
489 	 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
490 	 * channel context data, survey info, test mode data.
491 	 */
492 	spinlock_t data_lock;
493 
494 	struct list_head arvifs;
495 	/* should never be NULL; needed for regular htt rx */
496 	struct ieee80211_channel *rx_channel;
497 
498 	/* valid during scan; needed for mgmt rx during scan */
499 	struct ieee80211_channel *scan_channel;
500 
501 	u8 cfg_tx_chainmask;
502 	u8 cfg_rx_chainmask;
503 	u8 num_rx_chains;
504 	u8 num_tx_chains;
505 	/* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
506 	u8 pdev_idx;
507 	u8 lmac_id;
508 
509 	struct completion peer_assoc_done;
510 	struct completion peer_delete_done;
511 
512 	int install_key_status;
513 	struct completion install_key_done;
514 
515 	int last_wmi_vdev_start_status;
516 	struct completion vdev_setup_done;
517 	struct completion vdev_delete_done;
518 
519 	int num_peers;
520 	int max_num_peers;
521 	u32 num_started_vdevs;
522 	u32 num_created_vdevs;
523 	unsigned long long allocated_vdev_map;
524 
525 	struct idr txmgmt_idr;
526 	/* protects txmgmt_idr data */
527 	spinlock_t txmgmt_idr_lock;
528 	atomic_t num_pending_mgmt_tx;
529 
530 	/* cycle count is reported twice for each visited channel during scan.
531 	 * access protected by data_lock
532 	 */
533 	u32 survey_last_rx_clear_count;
534 	u32 survey_last_cycle_count;
535 
536 	/* Channel info events are expected to come in pairs without and with
537 	 * COMPLETE flag set respectively for each channel visit during scan.
538 	 *
539 	 * However there are deviations from this rule. This flag is used to
540 	 * avoid reporting garbage data.
541 	 */
542 	bool ch_info_can_report_survey;
543 	struct survey_info survey[ATH11K_NUM_CHANS];
544 	struct completion bss_survey_done;
545 
546 	struct work_struct regd_update_work;
547 
548 	struct work_struct wmi_mgmt_tx_work;
549 	struct sk_buff_head wmi_mgmt_tx_queue;
550 
551 	struct ath11k_per_peer_tx_stats peer_tx_stats;
552 	struct list_head ppdu_stats_info;
553 	u32 ppdu_stat_list_depth;
554 
555 	struct ath11k_per_peer_tx_stats cached_stats;
556 	u32 last_ppdu_id;
557 	u32 cached_ppdu_id;
558 #ifdef CONFIG_ATH11K_DEBUGFS
559 	struct ath11k_debug debug;
560 #endif
561 #ifdef CONFIG_ATH11K_SPECTRAL
562 	struct ath11k_spectral spectral;
563 #endif
564 	bool dfs_block_radar_events;
565 	struct ath11k_thermal thermal;
566 };
567 
568 struct ath11k_band_cap {
569 	u32 phy_id;
570 	u32 max_bw_supported;
571 	u32 ht_cap_info;
572 	u32 he_cap_info[2];
573 	u32 he_mcs;
574 	u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
575 	struct ath11k_ppe_threshold he_ppet;
576 	u16 he_6ghz_capa;
577 };
578 
579 struct ath11k_pdev_cap {
580 	u32 supported_bands;
581 	u32 ampdu_density;
582 	u32 vht_cap;
583 	u32 vht_mcs;
584 	u32 he_mcs;
585 	u32 tx_chain_mask;
586 	u32 rx_chain_mask;
587 	u32 tx_chain_mask_shift;
588 	u32 rx_chain_mask_shift;
589 	struct ath11k_band_cap band[NUM_NL80211_BANDS];
590 };
591 
592 struct ath11k_pdev {
593 	struct ath11k *ar;
594 	u32 pdev_id;
595 	struct ath11k_pdev_cap cap;
596 	u8 mac_addr[ETH_ALEN];
597 };
598 
599 struct ath11k_board_data {
600 	const struct firmware *fw;
601 	const void *data;
602 	size_t len;
603 };
604 
605 struct ath11k_bus_params {
606 	bool mhi_support;
607 	bool m3_fw_support;
608 	bool fixed_bdf_addr;
609 	bool fixed_mem_region;
610 };
611 
612 /* IPQ8074 HW channel counters frequency value in hertz */
613 #define IPQ8074_CC_FREQ_HERTZ 320000
614 
615 struct ath11k_bp_stats {
616 	/* Head Pointer reported by the last HTT Backpressure event for the ring */
617 	u16 hp;
618 
619 	/* Tail Pointer reported by the last HTT Backpressure event for the ring */
620 	u16 tp;
621 
622 	/* Number of Backpressure events received for the ring */
623 	u32 count;
624 
625 	/* Last recorded event timestamp */
626 	unsigned long jiffies;
627 };
628 
629 struct ath11k_dp_ring_bp_stats {
630 	struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
631 	struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
632 };
633 
634 struct ath11k_soc_dp_tx_err_stats {
635 	/* TCL Ring Descriptor unavailable */
636 	u32 desc_na[DP_TCL_NUM_RING_MAX];
637 	/* Other failures during dp_tx due to mem allocation failure
638 	 * idr unavailable etc.
639 	 */
640 	atomic_t misc_fail;
641 };
642 
643 struct ath11k_soc_dp_stats {
644 	u32 err_ring_pkts;
645 	u32 invalid_rbm;
646 	u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
647 	u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
648 	u32 hal_reo_error[DP_REO_DST_RING_MAX];
649 	struct ath11k_soc_dp_tx_err_stats tx_err;
650 	struct ath11k_dp_ring_bp_stats bp_stats;
651 };
652 
653 /* Master structure to hold the hw data which may be used in core module */
654 struct ath11k_base {
655 	enum ath11k_hw_rev hw_rev;
656 	struct platform_device *pdev;
657 	struct device *dev;
658 	struct ath11k_qmi qmi;
659 	struct ath11k_wmi_base wmi_ab;
660 	struct completion fw_ready;
661 	int num_radios;
662 	/* HW channel counters frequency value in hertz common to all MACs */
663 	u32 cc_freq_hz;
664 
665 	struct ath11k_htc htc;
666 
667 	struct ath11k_dp dp;
668 
669 	void __iomem *mem;
670 	unsigned long mem_len;
671 
672 	struct {
673 		enum ath11k_bus bus;
674 		const struct ath11k_hif_ops *ops;
675 	} hif;
676 
677 	struct {
678 		struct completion wakeup_completed;
679 	} wow;
680 
681 	struct ath11k_ce ce;
682 	struct timer_list rx_replenish_retry;
683 	struct ath11k_hal hal;
684 	/* To synchronize core_start/core_stop */
685 	struct mutex core_lock;
686 	/* Protects data like peers */
687 	spinlock_t base_lock;
688 	struct ath11k_pdev pdevs[MAX_RADIOS];
689 	struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
690 	struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
691 	unsigned long long free_vdev_map;
692 	struct list_head peers;
693 	wait_queue_head_t peer_mapping_wq;
694 	u8 mac_addr[ETH_ALEN];
695 	bool wmi_ready;
696 	u32 wlan_init_status;
697 	int irq_num[ATH11K_IRQ_NUM_MAX];
698 	struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
699 	struct napi_struct *napi;
700 	struct ath11k_targ_cap target_caps;
701 	u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
702 	bool pdevs_macaddr_valid;
703 	int bd_api;
704 
705 	struct ath11k_hw_params hw_params;
706 	struct ath11k_bus_params bus_params;
707 
708 	const struct firmware *cal_file;
709 
710 	/* Below regd's are protected by ab->data_lock */
711 	/* This is the regd set for every radio
712 	 * by the firmware during initializatin
713 	 */
714 	struct ieee80211_regdomain *default_regd[MAX_RADIOS];
715 	/* This regd is set during dynamic country setting
716 	 * This may or may not be used during the runtime
717 	 */
718 	struct ieee80211_regdomain *new_regd[MAX_RADIOS];
719 
720 	/* Current DFS Regulatory */
721 	enum ath11k_dfs_region dfs_region;
722 #ifdef CONFIG_ATH11K_DEBUGFS
723 	struct dentry *debugfs_soc;
724 	struct dentry *debugfs_ath11k;
725 #endif
726 	struct ath11k_soc_dp_stats soc_stats;
727 
728 	unsigned long dev_flags;
729 	struct completion driver_recovery;
730 	struct workqueue_struct *workqueue;
731 	struct work_struct restart_work;
732 	struct {
733 		/* protected by data_lock */
734 		u32 fw_crash_counter;
735 	} stats;
736 	u32 pktlog_defs_checksum;
737 
738 	struct ath11k_dbring_cap *db_caps;
739 	u32 num_db_cap;
740 
741 	struct timer_list mon_reap_timer;
742 
743 	struct completion htc_suspend;
744 
745 	/* must be last */
746 	u8 drv_priv[0] __aligned(sizeof(void *));
747 };
748 
749 struct ath11k_fw_stats_pdev {
750 	struct list_head list;
751 
752 	/* PDEV stats */
753 	s32 ch_noise_floor;
754 	/* Cycles spent transmitting frames */
755 	u32 tx_frame_count;
756 	/* Cycles spent receiving frames */
757 	u32 rx_frame_count;
758 	/* Total channel busy time, evidently */
759 	u32 rx_clear_count;
760 	/* Total on-channel time */
761 	u32 cycle_count;
762 	u32 phy_err_count;
763 	u32 chan_tx_power;
764 	u32 ack_rx_bad;
765 	u32 rts_bad;
766 	u32 rts_good;
767 	u32 fcs_bad;
768 	u32 no_beacons;
769 	u32 mib_int_count;
770 
771 	/* PDEV TX stats */
772 	/* Num HTT cookies queued to dispatch list */
773 	s32 comp_queued;
774 	/* Num HTT cookies dispatched */
775 	s32 comp_delivered;
776 	/* Num MSDU queued to WAL */
777 	s32 msdu_enqued;
778 	/* Num MPDU queue to WAL */
779 	s32 mpdu_enqued;
780 	/* Num MSDUs dropped by WMM limit */
781 	s32 wmm_drop;
782 	/* Num Local frames queued */
783 	s32 local_enqued;
784 	/* Num Local frames done */
785 	s32 local_freed;
786 	/* Num queued to HW */
787 	s32 hw_queued;
788 	/* Num PPDU reaped from HW */
789 	s32 hw_reaped;
790 	/* Num underruns */
791 	s32 underrun;
792 	/* Num PPDUs cleaned up in TX abort */
793 	s32 tx_abort;
794 	/* Num MPDUs requed by SW */
795 	s32 mpdus_requed;
796 	/* excessive retries */
797 	u32 tx_ko;
798 	/* data hw rate code */
799 	u32 data_rc;
800 	/* Scheduler self triggers */
801 	u32 self_triggers;
802 	/* frames dropped due to excessive sw retries */
803 	u32 sw_retry_failure;
804 	/* illegal rate phy errors	*/
805 	u32 illgl_rate_phy_err;
806 	/* wal pdev continuous xretry */
807 	u32 pdev_cont_xretry;
808 	/* wal pdev tx timeouts */
809 	u32 pdev_tx_timeout;
810 	/* wal pdev resets */
811 	u32 pdev_resets;
812 	/* frames dropped due to non-availability of stateless TIDs */
813 	u32 stateless_tid_alloc_failure;
814 	/* PhY/BB underrun */
815 	u32 phy_underrun;
816 	/* MPDU is more than txop limit */
817 	u32 txop_ovf;
818 
819 	/* PDEV RX stats */
820 	/* Cnts any change in ring routing mid-ppdu */
821 	s32 mid_ppdu_route_change;
822 	/* Total number of statuses processed */
823 	s32 status_rcvd;
824 	/* Extra frags on rings 0-3 */
825 	s32 r0_frags;
826 	s32 r1_frags;
827 	s32 r2_frags;
828 	s32 r3_frags;
829 	/* MSDUs / MPDUs delivered to HTT */
830 	s32 htt_msdus;
831 	s32 htt_mpdus;
832 	/* MSDUs / MPDUs delivered to local stack */
833 	s32 loc_msdus;
834 	s32 loc_mpdus;
835 	/* AMSDUs that have more MSDUs than the status ring size */
836 	s32 oversize_amsdu;
837 	/* Number of PHY errors */
838 	s32 phy_errs;
839 	/* Number of PHY errors drops */
840 	s32 phy_err_drop;
841 	/* Number of mpdu errors - FCS, MIC, ENC etc. */
842 	s32 mpdu_errs;
843 };
844 
845 struct ath11k_fw_stats_vdev {
846 	struct list_head list;
847 
848 	u32 vdev_id;
849 	u32 beacon_snr;
850 	u32 data_snr;
851 	u32 num_tx_frames[WLAN_MAX_AC];
852 	u32 num_rx_frames;
853 	u32 num_tx_frames_retries[WLAN_MAX_AC];
854 	u32 num_tx_frames_failures[WLAN_MAX_AC];
855 	u32 num_rts_fail;
856 	u32 num_rts_success;
857 	u32 num_rx_err;
858 	u32 num_rx_discard;
859 	u32 num_tx_not_acked;
860 	u32 tx_rate_history[MAX_TX_RATE_VALUES];
861 	u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
862 };
863 
864 struct ath11k_fw_stats_bcn {
865 	struct list_head list;
866 
867 	u32 vdev_id;
868 	u32 tx_bcn_succ_cnt;
869 	u32 tx_bcn_outage_cnt;
870 };
871 
872 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
873 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
874 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
875 
876 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
877 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
878 
879 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
880 int ath11k_core_pre_init(struct ath11k_base *ab);
881 int ath11k_core_init(struct ath11k_base *ath11k);
882 void ath11k_core_deinit(struct ath11k_base *ath11k);
883 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
884 				      enum ath11k_bus bus,
885 				      const struct ath11k_bus_params *bus_params);
886 void ath11k_core_free(struct ath11k_base *ath11k);
887 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
888 			  struct ath11k_board_data *bd);
889 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
890 int ath11k_core_check_dt(struct ath11k_base *ath11k);
891 
892 void ath11k_core_halt(struct ath11k *ar);
893 int ath11k_core_resume(struct ath11k_base *ab);
894 int ath11k_core_suspend(struct ath11k_base *ab);
895 
896 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
897 						    const char *filename);
898 
899 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
900 {
901 	switch (state) {
902 	case ATH11K_SCAN_IDLE:
903 		return "idle";
904 	case ATH11K_SCAN_STARTING:
905 		return "starting";
906 	case ATH11K_SCAN_RUNNING:
907 		return "running";
908 	case ATH11K_SCAN_ABORTING:
909 		return "aborting";
910 	}
911 
912 	return "unknown";
913 }
914 
915 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
916 {
917 	BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
918 		     IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
919 	return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
920 }
921 
922 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
923 {
924 	BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
925 	return (struct ath11k_skb_rxcb *)skb->cb;
926 }
927 
928 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
929 {
930 	return (struct ath11k_vif *)vif->drv_priv;
931 }
932 
933 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
934 					     int mac_id)
935 {
936 	return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
937 }
938 
939 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
940 						    const char *filename,
941 						    void *buf, size_t buf_len)
942 {
943 	snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
944 		 ab->hw_params.fw.dir, filename);
945 }
946 
947 static inline const char *ath11k_bus_str(enum ath11k_bus bus)
948 {
949 	switch (bus) {
950 	case ATH11K_BUS_PCI:
951 		return "pci";
952 	case ATH11K_BUS_AHB:
953 		return "ahb";
954 	}
955 
956 	return "unknown";
957 }
958 
959 #endif /* _CORE_H_ */
960