1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef ATH11K_CORE_H 7 #define ATH11K_CORE_H 8 9 #include <linux/types.h> 10 #include <linux/interrupt.h> 11 #include <linux/irq.h> 12 #include <linux/bitfield.h> 13 #include "qmi.h" 14 #include "htc.h" 15 #include "wmi.h" 16 #include "hal.h" 17 #include "dp.h" 18 #include "ce.h" 19 #include "mac.h" 20 #include "hw.h" 21 #include "hal_rx.h" 22 #include "reg.h" 23 #include "thermal.h" 24 #include "dbring.h" 25 #include "spectral.h" 26 27 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 28 29 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512 30 31 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 32 33 /* Pending management packets threshold for dropping probe responses */ 34 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 35 36 #define ATH11K_INVALID_HW_MAC_ID 0xFF 37 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ) 38 39 extern unsigned int ath11k_frame_mode; 40 41 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ) 42 43 #define ATH11K_MON_TIMER_INTERVAL 10 44 45 enum ath11k_supported_bw { 46 ATH11K_BW_20 = 0, 47 ATH11K_BW_40 = 1, 48 ATH11K_BW_80 = 2, 49 ATH11K_BW_160 = 3, 50 }; 51 52 enum ath11k_bdf_search { 53 ATH11K_BDF_SEARCH_DEFAULT, 54 ATH11K_BDF_SEARCH_BUS_AND_BOARD, 55 }; 56 57 enum wme_ac { 58 WME_AC_BE, 59 WME_AC_BK, 60 WME_AC_VI, 61 WME_AC_VO, 62 WME_NUM_AC 63 }; 64 65 #define ATH11K_HT_MCS_MAX 7 66 #define ATH11K_VHT_MCS_MAX 9 67 #define ATH11K_HE_MCS_MAX 11 68 69 enum ath11k_crypt_mode { 70 /* Only use hardware crypto engine */ 71 ATH11K_CRYPT_MODE_HW, 72 /* Only use software crypto */ 73 ATH11K_CRYPT_MODE_SW, 74 }; 75 76 static inline enum wme_ac ath11k_tid_to_ac(u32 tid) 77 { 78 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 79 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 80 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 81 WME_AC_VO); 82 } 83 84 enum ath11k_skb_flags { 85 ATH11K_SKB_HW_80211_ENCAP = BIT(0), 86 ATH11K_SKB_CIPHER_SET = BIT(1), 87 }; 88 89 struct ath11k_skb_cb { 90 dma_addr_t paddr; 91 u8 eid; 92 u8 flags; 93 u32 cipher; 94 struct ath11k *ar; 95 struct ieee80211_vif *vif; 96 } __packed; 97 98 struct ath11k_skb_rxcb { 99 dma_addr_t paddr; 100 bool is_first_msdu; 101 bool is_last_msdu; 102 bool is_continuation; 103 bool is_mcbc; 104 bool is_eapol; 105 struct hal_rx_desc *rx_desc; 106 u8 err_rel_src; 107 u8 err_code; 108 u8 mac_id; 109 u8 unmapped; 110 u8 is_frag; 111 u8 tid; 112 u16 peer_id; 113 u16 seq_no; 114 }; 115 116 enum ath11k_hw_rev { 117 ATH11K_HW_IPQ8074, 118 ATH11K_HW_QCA6390_HW20, 119 ATH11K_HW_IPQ6018_HW10, 120 ATH11K_HW_QCN9074_HW10, 121 ATH11K_HW_WCN6855_HW20, 122 ATH11K_HW_WCN6855_HW21, 123 }; 124 125 enum ath11k_firmware_mode { 126 /* the default mode, standard 802.11 functionality */ 127 ATH11K_FIRMWARE_MODE_NORMAL, 128 129 /* factory tests etc */ 130 ATH11K_FIRMWARE_MODE_FTM, 131 132 /* Cold boot calibration */ 133 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7, 134 }; 135 136 extern bool ath11k_cold_boot_cal; 137 138 #define ATH11K_IRQ_NUM_MAX 52 139 #define ATH11K_EXT_IRQ_NUM_MAX 16 140 141 struct ath11k_ext_irq_grp { 142 struct ath11k_base *ab; 143 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX]; 144 u32 num_irq; 145 u32 grp_id; 146 u64 timestamp; 147 bool napi_enabled; 148 struct napi_struct napi; 149 struct net_device napi_ndev; 150 }; 151 152 #define HEHANDLE_CAP_PHYINFO_SIZE 3 153 #define HECAP_PHYINFO_SIZE 9 154 #define HECAP_MACINFO_SIZE 5 155 #define HECAP_TXRX_MCS_NSS_SIZE 2 156 #define HECAP_PPET16_PPET8_MAX_SIZE 25 157 158 #define HE_PPET16_PPET8_SIZE 8 159 160 /* 802.11ax PPE (PPDU packet Extension) threshold */ 161 struct he_ppe_threshold { 162 u32 numss_m1; 163 u32 ru_mask; 164 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 165 }; 166 167 struct ath11k_he { 168 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 169 u32 hecap_rxmcsnssmap; 170 u32 hecap_txmcsnssmap; 171 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 172 struct he_ppe_threshold hecap_ppet; 173 u32 heop_param; 174 }; 175 176 #define MAX_RADIOS 3 177 178 enum { 179 WMI_HOST_TP_SCALE_MAX = 0, 180 WMI_HOST_TP_SCALE_50 = 1, 181 WMI_HOST_TP_SCALE_25 = 2, 182 WMI_HOST_TP_SCALE_12 = 3, 183 WMI_HOST_TP_SCALE_MIN = 4, 184 WMI_HOST_TP_SCALE_SIZE = 5, 185 }; 186 187 enum ath11k_scan_state { 188 ATH11K_SCAN_IDLE, 189 ATH11K_SCAN_STARTING, 190 ATH11K_SCAN_RUNNING, 191 ATH11K_SCAN_ABORTING, 192 }; 193 194 enum ath11k_11d_state { 195 ATH11K_11D_IDLE, 196 ATH11K_11D_PREPARING, 197 ATH11K_11D_RUNNING, 198 }; 199 200 enum ath11k_dev_flags { 201 ATH11K_CAC_RUNNING, 202 ATH11K_FLAG_CORE_REGISTERED, 203 ATH11K_FLAG_CRASH_FLUSH, 204 ATH11K_FLAG_RAW_MODE, 205 ATH11K_FLAG_HW_CRYPTO_DISABLED, 206 ATH11K_FLAG_BTCOEX, 207 ATH11K_FLAG_RECOVERY, 208 ATH11K_FLAG_UNREGISTERING, 209 ATH11K_FLAG_REGISTERED, 210 ATH11K_FLAG_QMI_FAIL, 211 ATH11K_FLAG_HTC_SUSPEND_COMPLETE, 212 ATH11K_FLAG_CE_IRQ_ENABLED, 213 ATH11K_FLAG_EXT_IRQ_ENABLED, 214 ATH11K_FLAG_FIXED_MEM_RGN, 215 }; 216 217 enum ath11k_monitor_flags { 218 ATH11K_FLAG_MONITOR_CONF_ENABLED, 219 ATH11K_FLAG_MONITOR_STARTED, 220 ATH11K_FLAG_MONITOR_VDEV_CREATED, 221 }; 222 223 struct ath11k_vif { 224 u32 vdev_id; 225 enum wmi_vdev_type vdev_type; 226 enum wmi_vdev_subtype vdev_subtype; 227 u32 beacon_interval; 228 u32 dtim_period; 229 u16 ast_hash; 230 u16 ast_idx; 231 u16 tcl_metadata; 232 u8 hal_addr_search_flags; 233 u8 search_type; 234 235 struct ath11k *ar; 236 struct ieee80211_vif *vif; 237 238 u16 tx_seq_no; 239 struct wmi_wmm_params_all_arg wmm_params; 240 struct list_head list; 241 union { 242 struct { 243 u32 uapsd; 244 } sta; 245 struct { 246 /* 127 stations; wmi limit */ 247 u8 tim_bitmap[16]; 248 u8 tim_len; 249 u32 ssid_len; 250 u8 ssid[IEEE80211_MAX_SSID_LEN]; 251 bool hidden_ssid; 252 /* P2P_IE with NoA attribute for P2P_GO case */ 253 u32 noa_len; 254 u8 *noa_data; 255 } ap; 256 } u; 257 258 bool is_started; 259 bool is_up; 260 bool spectral_enabled; 261 bool ps; 262 u32 aid; 263 u8 bssid[ETH_ALEN]; 264 struct cfg80211_bitrate_mask bitrate_mask; 265 struct delayed_work connection_loss_work; 266 int num_legacy_stations; 267 int rtscts_prot_mode; 268 int txpower; 269 bool rsnie_present; 270 bool wpaie_present; 271 bool bcca_zero_sent; 272 bool do_not_send_tmpl; 273 struct ieee80211_chanctx_conf chanctx; 274 #ifdef CONFIG_ATH11K_DEBUGFS 275 struct dentry *debugfs_twt; 276 #endif /* CONFIG_ATH11K_DEBUGFS */ 277 }; 278 279 struct ath11k_vif_iter { 280 u32 vdev_id; 281 struct ath11k_vif *arvif; 282 }; 283 284 struct ath11k_rx_peer_stats { 285 u64 num_msdu; 286 u64 num_mpdu_fcs_ok; 287 u64 num_mpdu_fcs_err; 288 u64 tcp_msdu_count; 289 u64 udp_msdu_count; 290 u64 other_msdu_count; 291 u64 ampdu_msdu_count; 292 u64 non_ampdu_msdu_count; 293 u64 stbc_count; 294 u64 beamformed_count; 295 u64 mcs_count[HAL_RX_MAX_MCS + 1]; 296 u64 nss_count[HAL_RX_MAX_NSS]; 297 u64 bw_count[HAL_RX_BW_MAX]; 298 u64 gi_count[HAL_RX_GI_MAX]; 299 u64 coding_count[HAL_RX_SU_MU_CODING_MAX]; 300 u64 tid_count[IEEE80211_NUM_TIDS + 1]; 301 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 302 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 303 u64 rx_duration; 304 u64 dcm_count; 305 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 306 }; 307 308 #define ATH11K_HE_MCS_NUM 12 309 #define ATH11K_VHT_MCS_NUM 10 310 #define ATH11K_BW_NUM 4 311 #define ATH11K_NSS_NUM 4 312 #define ATH11K_LEGACY_NUM 12 313 #define ATH11K_GI_NUM 4 314 #define ATH11K_HT_MCS_NUM 32 315 316 enum ath11k_pkt_rx_err { 317 ATH11K_PKT_RX_ERR_FCS, 318 ATH11K_PKT_RX_ERR_TKIP, 319 ATH11K_PKT_RX_ERR_CRYPT, 320 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL, 321 ATH11K_PKT_RX_ERR_MAX, 322 }; 323 324 enum ath11k_ampdu_subfrm_num { 325 ATH11K_AMPDU_SUBFRM_NUM_10, 326 ATH11K_AMPDU_SUBFRM_NUM_20, 327 ATH11K_AMPDU_SUBFRM_NUM_30, 328 ATH11K_AMPDU_SUBFRM_NUM_40, 329 ATH11K_AMPDU_SUBFRM_NUM_50, 330 ATH11K_AMPDU_SUBFRM_NUM_60, 331 ATH11K_AMPDU_SUBFRM_NUM_MORE, 332 ATH11K_AMPDU_SUBFRM_NUM_MAX, 333 }; 334 335 enum ath11k_amsdu_subfrm_num { 336 ATH11K_AMSDU_SUBFRM_NUM_1, 337 ATH11K_AMSDU_SUBFRM_NUM_2, 338 ATH11K_AMSDU_SUBFRM_NUM_3, 339 ATH11K_AMSDU_SUBFRM_NUM_4, 340 ATH11K_AMSDU_SUBFRM_NUM_MORE, 341 ATH11K_AMSDU_SUBFRM_NUM_MAX, 342 }; 343 344 enum ath11k_counter_type { 345 ATH11K_COUNTER_TYPE_BYTES, 346 ATH11K_COUNTER_TYPE_PKTS, 347 ATH11K_COUNTER_TYPE_MAX, 348 }; 349 350 enum ath11k_stats_type { 351 ATH11K_STATS_TYPE_SUCC, 352 ATH11K_STATS_TYPE_FAIL, 353 ATH11K_STATS_TYPE_RETRY, 354 ATH11K_STATS_TYPE_AMPDU, 355 ATH11K_STATS_TYPE_MAX, 356 }; 357 358 struct ath11k_htt_data_stats { 359 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM]; 360 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM]; 361 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM]; 362 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM]; 363 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM]; 364 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM]; 365 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM]; 366 }; 367 368 struct ath11k_htt_tx_stats { 369 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX]; 370 u64 tx_duration; 371 u64 ba_fails; 372 u64 ack_fails; 373 }; 374 375 struct ath11k_per_ppdu_tx_stats { 376 u16 succ_pkts; 377 u16 failed_pkts; 378 u16 retry_pkts; 379 u32 succ_bytes; 380 u32 failed_bytes; 381 u32 retry_bytes; 382 }; 383 384 struct ath11k_sta { 385 struct ath11k_vif *arvif; 386 387 /* the following are protected by ar->data_lock */ 388 u32 changed; /* IEEE80211_RC_* */ 389 u32 bw; 390 u32 nss; 391 u32 smps; 392 enum hal_pn_type pn_type; 393 394 struct work_struct update_wk; 395 struct work_struct set_4addr_wk; 396 struct rate_info txrate; 397 u32 peer_nss; 398 struct rate_info last_txrate; 399 u64 rx_duration; 400 u64 tx_duration; 401 u8 rssi_comb; 402 s8 rssi_beacon; 403 s8 chain_signal[IEEE80211_MAX_CHAINS]; 404 struct ath11k_htt_tx_stats *tx_stats; 405 struct ath11k_rx_peer_stats *rx_stats; 406 407 #ifdef CONFIG_MAC80211_DEBUGFS 408 /* protected by conf_mutex */ 409 bool aggr_mode; 410 #endif 411 412 bool use_4addr_set; 413 u16 tcl_metadata; 414 }; 415 416 #define ATH11K_MIN_5G_FREQ 4150 417 #define ATH11K_MIN_6G_FREQ 5925 418 #define ATH11K_MAX_6G_FREQ 7115 419 #define ATH11K_NUM_CHANS 101 420 #define ATH11K_MAX_5G_CHAN 173 421 422 enum ath11k_state { 423 ATH11K_STATE_OFF, 424 ATH11K_STATE_ON, 425 ATH11K_STATE_RESTARTING, 426 ATH11K_STATE_RESTARTED, 427 ATH11K_STATE_WEDGED, 428 /* Add other states as required */ 429 }; 430 431 /* Antenna noise floor */ 432 #define ATH11K_DEFAULT_NOISE_FLOOR -95 433 434 #define ATH11K_INVALID_RSSI_FULL -1 435 436 #define ATH11K_INVALID_RSSI_EMPTY -128 437 438 struct ath11k_fw_stats { 439 struct dentry *debugfs_fwstats; 440 u32 pdev_id; 441 u32 stats_id; 442 struct list_head pdevs; 443 struct list_head vdevs; 444 struct list_head bcn; 445 }; 446 447 struct ath11k_dbg_htt_stats { 448 u8 type; 449 u8 reset; 450 struct debug_htt_stats_req *stats_req; 451 /* protects shared stats req buffer */ 452 spinlock_t lock; 453 }; 454 455 #define MAX_MODULE_ID_BITMAP_WORDS 16 456 457 struct ath11k_debug { 458 struct dentry *debugfs_pdev; 459 struct ath11k_dbg_htt_stats htt_stats; 460 u32 extd_tx_stats; 461 struct ath11k_fw_stats fw_stats; 462 struct completion fw_stats_complete; 463 bool fw_stats_done; 464 u32 extd_rx_stats; 465 u32 pktlog_filter; 466 u32 pktlog_mode; 467 u32 pktlog_peer_valid; 468 u8 pktlog_peer_addr[ETH_ALEN]; 469 u32 rx_filter; 470 u32 mem_offset; 471 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS]; 472 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX]; 473 }; 474 475 struct ath11k_per_peer_tx_stats { 476 u32 succ_bytes; 477 u32 retry_bytes; 478 u32 failed_bytes; 479 u16 succ_pkts; 480 u16 retry_pkts; 481 u16 failed_pkts; 482 u32 duration; 483 u8 ba_fails; 484 bool is_ampdu; 485 }; 486 487 #define ATH11K_FLUSH_TIMEOUT (5 * HZ) 488 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 489 490 struct ath11k { 491 struct ath11k_base *ab; 492 struct ath11k_pdev *pdev; 493 struct ieee80211_hw *hw; 494 struct ieee80211_ops *ops; 495 struct ath11k_pdev_wmi *wmi; 496 struct ath11k_pdev_dp dp; 497 u8 mac_addr[ETH_ALEN]; 498 u32 ht_cap_info; 499 u32 vht_cap_info; 500 struct ath11k_he ar_he; 501 enum ath11k_state state; 502 bool supports_6ghz; 503 struct { 504 struct completion started; 505 struct completion completed; 506 struct completion on_channel; 507 struct delayed_work timeout; 508 enum ath11k_scan_state state; 509 bool is_roc; 510 int vdev_id; 511 int roc_freq; 512 bool roc_notify; 513 } scan; 514 515 struct { 516 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 517 struct ieee80211_sband_iftype_data 518 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 519 } mac; 520 521 unsigned long dev_flags; 522 unsigned int filter_flags; 523 unsigned long monitor_flags; 524 u32 min_tx_power; 525 u32 max_tx_power; 526 u32 txpower_limit_2g; 527 u32 txpower_limit_5g; 528 u32 txpower_scale; 529 u32 power_scale; 530 u32 chan_tx_pwr; 531 u32 num_stations; 532 u32 max_num_stations; 533 /* To synchronize concurrent synchronous mac80211 callback operations, 534 * concurrent debugfs configuration and concurrent FW statistics events. 535 */ 536 struct mutex conf_mutex; 537 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 538 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info, 539 * channel context data, survey info, test mode data. 540 */ 541 spinlock_t data_lock; 542 543 struct list_head arvifs; 544 /* should never be NULL; needed for regular htt rx */ 545 struct ieee80211_channel *rx_channel; 546 547 /* valid during scan; needed for mgmt rx during scan */ 548 struct ieee80211_channel *scan_channel; 549 550 u8 cfg_tx_chainmask; 551 u8 cfg_rx_chainmask; 552 u8 num_rx_chains; 553 u8 num_tx_chains; 554 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 555 u8 pdev_idx; 556 u8 lmac_id; 557 558 struct completion peer_assoc_done; 559 struct completion peer_delete_done; 560 561 int install_key_status; 562 struct completion install_key_done; 563 564 int last_wmi_vdev_start_status; 565 struct completion vdev_setup_done; 566 struct completion vdev_delete_done; 567 568 int num_peers; 569 int max_num_peers; 570 u32 num_started_vdevs; 571 u32 num_created_vdevs; 572 unsigned long long allocated_vdev_map; 573 574 struct idr txmgmt_idr; 575 /* protects txmgmt_idr data */ 576 spinlock_t txmgmt_idr_lock; 577 atomic_t num_pending_mgmt_tx; 578 wait_queue_head_t txmgmt_empty_waitq; 579 580 /* cycle count is reported twice for each visited channel during scan. 581 * access protected by data_lock 582 */ 583 u32 survey_last_rx_clear_count; 584 u32 survey_last_cycle_count; 585 586 /* Channel info events are expected to come in pairs without and with 587 * COMPLETE flag set respectively for each channel visit during scan. 588 * 589 * However there are deviations from this rule. This flag is used to 590 * avoid reporting garbage data. 591 */ 592 bool ch_info_can_report_survey; 593 struct survey_info survey[ATH11K_NUM_CHANS]; 594 struct completion bss_survey_done; 595 596 struct work_struct regd_update_work; 597 598 struct work_struct wmi_mgmt_tx_work; 599 struct sk_buff_head wmi_mgmt_tx_queue; 600 601 struct ath11k_per_peer_tx_stats peer_tx_stats; 602 struct list_head ppdu_stats_info; 603 u32 ppdu_stat_list_depth; 604 605 struct ath11k_per_peer_tx_stats cached_stats; 606 u32 last_ppdu_id; 607 u32 cached_ppdu_id; 608 int monitor_vdev_id; 609 #ifdef CONFIG_ATH11K_DEBUGFS 610 struct ath11k_debug debug; 611 #endif 612 #ifdef CONFIG_ATH11K_SPECTRAL 613 struct ath11k_spectral spectral; 614 #endif 615 bool dfs_block_radar_events; 616 struct ath11k_thermal thermal; 617 u32 vdev_id_11d_scan; 618 struct completion completed_11d_scan; 619 enum ath11k_11d_state state_11d; 620 bool regdom_set_by_user; 621 int hw_rate_code; 622 u8 twt_enabled; 623 }; 624 625 struct ath11k_band_cap { 626 u32 phy_id; 627 u32 max_bw_supported; 628 u32 ht_cap_info; 629 u32 he_cap_info[2]; 630 u32 he_mcs; 631 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 632 struct ath11k_ppe_threshold he_ppet; 633 u16 he_6ghz_capa; 634 }; 635 636 struct ath11k_pdev_cap { 637 u32 supported_bands; 638 u32 ampdu_density; 639 u32 vht_cap; 640 u32 vht_mcs; 641 u32 he_mcs; 642 u32 tx_chain_mask; 643 u32 rx_chain_mask; 644 u32 tx_chain_mask_shift; 645 u32 rx_chain_mask_shift; 646 struct ath11k_band_cap band[NUM_NL80211_BANDS]; 647 bool nss_ratio_enabled; 648 u8 nss_ratio_info; 649 }; 650 651 struct ath11k_pdev { 652 struct ath11k *ar; 653 u32 pdev_id; 654 struct ath11k_pdev_cap cap; 655 u8 mac_addr[ETH_ALEN]; 656 }; 657 658 struct ath11k_board_data { 659 const struct firmware *fw; 660 const void *data; 661 size_t len; 662 }; 663 664 struct ath11k_bus_params { 665 bool mhi_support; 666 bool m3_fw_support; 667 bool fixed_bdf_addr; 668 bool fixed_mem_region; 669 bool static_window_map; 670 }; 671 672 /* IPQ8074 HW channel counters frequency value in hertz */ 673 #define IPQ8074_CC_FREQ_HERTZ 320000 674 675 struct ath11k_bp_stats { 676 /* Head Pointer reported by the last HTT Backpressure event for the ring */ 677 u16 hp; 678 679 /* Tail Pointer reported by the last HTT Backpressure event for the ring */ 680 u16 tp; 681 682 /* Number of Backpressure events received for the ring */ 683 u32 count; 684 685 /* Last recorded event timestamp */ 686 unsigned long jiffies; 687 }; 688 689 struct ath11k_dp_ring_bp_stats { 690 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX]; 691 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS]; 692 }; 693 694 struct ath11k_soc_dp_tx_err_stats { 695 /* TCL Ring Descriptor unavailable */ 696 u32 desc_na[DP_TCL_NUM_RING_MAX]; 697 /* Other failures during dp_tx due to mem allocation failure 698 * idr unavailable etc. 699 */ 700 atomic_t misc_fail; 701 }; 702 703 struct ath11k_soc_dp_stats { 704 u32 err_ring_pkts; 705 u32 invalid_rbm; 706 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; 707 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; 708 u32 hal_reo_error[DP_REO_DST_RING_MAX]; 709 struct ath11k_soc_dp_tx_err_stats tx_err; 710 struct ath11k_dp_ring_bp_stats bp_stats; 711 }; 712 713 /* Master structure to hold the hw data which may be used in core module */ 714 struct ath11k_base { 715 enum ath11k_hw_rev hw_rev; 716 struct platform_device *pdev; 717 struct device *dev; 718 struct ath11k_qmi qmi; 719 struct ath11k_wmi_base wmi_ab; 720 struct completion fw_ready; 721 int num_radios; 722 /* HW channel counters frequency value in hertz common to all MACs */ 723 u32 cc_freq_hz; 724 725 struct ath11k_htc htc; 726 727 struct ath11k_dp dp; 728 729 void __iomem *mem; 730 unsigned long mem_len; 731 732 struct { 733 enum ath11k_bus bus; 734 const struct ath11k_hif_ops *ops; 735 } hif; 736 737 struct { 738 struct completion wakeup_completed; 739 } wow; 740 741 struct ath11k_ce ce; 742 struct timer_list rx_replenish_retry; 743 struct ath11k_hal hal; 744 /* To synchronize core_start/core_stop */ 745 struct mutex core_lock; 746 /* Protects data like peers */ 747 spinlock_t base_lock; 748 struct ath11k_pdev pdevs[MAX_RADIOS]; 749 struct { 750 enum WMI_HOST_WLAN_BAND supported_bands; 751 u32 pdev_id; 752 } target_pdev_ids[MAX_RADIOS]; 753 u8 target_pdev_count; 754 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS]; 755 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS]; 756 unsigned long long free_vdev_map; 757 struct list_head peers; 758 wait_queue_head_t peer_mapping_wq; 759 u8 mac_addr[ETH_ALEN]; 760 bool wmi_ready; 761 u32 wlan_init_status; 762 int irq_num[ATH11K_IRQ_NUM_MAX]; 763 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 764 struct ath11k_targ_cap target_caps; 765 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 766 bool pdevs_macaddr_valid; 767 int bd_api; 768 769 struct ath11k_hw_params hw_params; 770 struct ath11k_bus_params bus_params; 771 772 const struct firmware *cal_file; 773 774 /* Below regd's are protected by ab->data_lock */ 775 /* This is the regd set for every radio 776 * by the firmware during initializatin 777 */ 778 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 779 /* This regd is set during dynamic country setting 780 * This may or may not be used during the runtime 781 */ 782 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 783 784 /* Current DFS Regulatory */ 785 enum ath11k_dfs_region dfs_region; 786 #ifdef CONFIG_ATH11K_DEBUGFS 787 struct dentry *debugfs_soc; 788 struct dentry *debugfs_ath11k; 789 #endif 790 struct ath11k_soc_dp_stats soc_stats; 791 792 unsigned long dev_flags; 793 struct completion driver_recovery; 794 struct workqueue_struct *workqueue; 795 struct work_struct restart_work; 796 struct work_struct update_11d_work; 797 u8 new_alpha2[3]; 798 struct { 799 /* protected by data_lock */ 800 u32 fw_crash_counter; 801 } stats; 802 u32 pktlog_defs_checksum; 803 804 struct ath11k_dbring_cap *db_caps; 805 u32 num_db_cap; 806 struct work_struct rfkill_work; 807 808 /* true means radio is on */ 809 bool rfkill_radio_on; 810 811 /* To synchronize 11d scan vdev id */ 812 struct mutex vdev_id_11d_lock; 813 struct timer_list mon_reap_timer; 814 815 struct completion htc_suspend; 816 817 struct { 818 enum ath11k_bdf_search bdf_search; 819 u32 vendor; 820 u32 device; 821 u32 subsystem_vendor; 822 u32 subsystem_device; 823 } id; 824 825 /* must be last */ 826 u8 drv_priv[] __aligned(sizeof(void *)); 827 }; 828 829 struct ath11k_fw_stats_pdev { 830 struct list_head list; 831 832 /* PDEV stats */ 833 s32 ch_noise_floor; 834 /* Cycles spent transmitting frames */ 835 u32 tx_frame_count; 836 /* Cycles spent receiving frames */ 837 u32 rx_frame_count; 838 /* Total channel busy time, evidently */ 839 u32 rx_clear_count; 840 /* Total on-channel time */ 841 u32 cycle_count; 842 u32 phy_err_count; 843 u32 chan_tx_power; 844 u32 ack_rx_bad; 845 u32 rts_bad; 846 u32 rts_good; 847 u32 fcs_bad; 848 u32 no_beacons; 849 u32 mib_int_count; 850 851 /* PDEV TX stats */ 852 /* Num HTT cookies queued to dispatch list */ 853 s32 comp_queued; 854 /* Num HTT cookies dispatched */ 855 s32 comp_delivered; 856 /* Num MSDU queued to WAL */ 857 s32 msdu_enqued; 858 /* Num MPDU queue to WAL */ 859 s32 mpdu_enqued; 860 /* Num MSDUs dropped by WMM limit */ 861 s32 wmm_drop; 862 /* Num Local frames queued */ 863 s32 local_enqued; 864 /* Num Local frames done */ 865 s32 local_freed; 866 /* Num queued to HW */ 867 s32 hw_queued; 868 /* Num PPDU reaped from HW */ 869 s32 hw_reaped; 870 /* Num underruns */ 871 s32 underrun; 872 /* Num hw paused */ 873 u32 hw_paused; 874 /* Num PPDUs cleaned up in TX abort */ 875 s32 tx_abort; 876 /* Num MPDUs requeued by SW */ 877 s32 mpdus_requeued; 878 /* excessive retries */ 879 u32 tx_ko; 880 u32 tx_xretry; 881 /* data hw rate code */ 882 u32 data_rc; 883 /* Scheduler self triggers */ 884 u32 self_triggers; 885 /* frames dropped due to excessive sw retries */ 886 u32 sw_retry_failure; 887 /* illegal rate phy errors */ 888 u32 illgl_rate_phy_err; 889 /* wal pdev continuous xretry */ 890 u32 pdev_cont_xretry; 891 /* wal pdev tx timeouts */ 892 u32 pdev_tx_timeout; 893 /* wal pdev resets */ 894 u32 pdev_resets; 895 /* frames dropped due to non-availability of stateless TIDs */ 896 u32 stateless_tid_alloc_failure; 897 /* PhY/BB underrun */ 898 u32 phy_underrun; 899 /* MPDU is more than txop limit */ 900 u32 txop_ovf; 901 /* Num sequences posted */ 902 u32 seq_posted; 903 /* Num sequences failed in queueing */ 904 u32 seq_failed_queueing; 905 /* Num sequences completed */ 906 u32 seq_completed; 907 /* Num sequences restarted */ 908 u32 seq_restarted; 909 /* Num of MU sequences posted */ 910 u32 mu_seq_posted; 911 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT 912 * (Reset,channel change) 913 */ 914 s32 mpdus_sw_flush; 915 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 916 s32 mpdus_hw_filter; 917 /* Num MPDUs truncated by PDG (TXOP, TBTT, 918 * PPDU_duration based on rate, dyn_bw) 919 */ 920 s32 mpdus_truncated; 921 /* Num MPDUs that was tried but didn't receive ACK or BA */ 922 s32 mpdus_ack_failed; 923 /* Num MPDUs that was dropped du to expiry. */ 924 s32 mpdus_expired; 925 926 /* PDEV RX stats */ 927 /* Cnts any change in ring routing mid-ppdu */ 928 s32 mid_ppdu_route_change; 929 /* Total number of statuses processed */ 930 s32 status_rcvd; 931 /* Extra frags on rings 0-3 */ 932 s32 r0_frags; 933 s32 r1_frags; 934 s32 r2_frags; 935 s32 r3_frags; 936 /* MSDUs / MPDUs delivered to HTT */ 937 s32 htt_msdus; 938 s32 htt_mpdus; 939 /* MSDUs / MPDUs delivered to local stack */ 940 s32 loc_msdus; 941 s32 loc_mpdus; 942 /* AMSDUs that have more MSDUs than the status ring size */ 943 s32 oversize_amsdu; 944 /* Number of PHY errors */ 945 s32 phy_errs; 946 /* Number of PHY errors drops */ 947 s32 phy_err_drop; 948 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 949 s32 mpdu_errs; 950 /* Num overflow errors */ 951 s32 rx_ovfl_errs; 952 }; 953 954 struct ath11k_fw_stats_vdev { 955 struct list_head list; 956 957 u32 vdev_id; 958 u32 beacon_snr; 959 u32 data_snr; 960 u32 num_tx_frames[WLAN_MAX_AC]; 961 u32 num_rx_frames; 962 u32 num_tx_frames_retries[WLAN_MAX_AC]; 963 u32 num_tx_frames_failures[WLAN_MAX_AC]; 964 u32 num_rts_fail; 965 u32 num_rts_success; 966 u32 num_rx_err; 967 u32 num_rx_discard; 968 u32 num_tx_not_acked; 969 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 970 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 971 }; 972 973 struct ath11k_fw_stats_bcn { 974 struct list_head list; 975 976 u32 vdev_id; 977 u32 tx_bcn_succ_cnt; 978 u32 tx_bcn_outage_cnt; 979 }; 980 981 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[]; 982 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[]; 983 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[]; 984 985 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[]; 986 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[]; 987 988 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[]; 989 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[]; 990 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab); 991 int ath11k_core_pre_init(struct ath11k_base *ab); 992 int ath11k_core_init(struct ath11k_base *ath11k); 993 void ath11k_core_deinit(struct ath11k_base *ath11k); 994 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size, 995 enum ath11k_bus bus, 996 const struct ath11k_bus_params *bus_params); 997 void ath11k_core_free(struct ath11k_base *ath11k); 998 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k, 999 struct ath11k_board_data *bd); 1000 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd); 1001 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab, 1002 struct ath11k_board_data *bd, 1003 const char *name); 1004 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd); 1005 int ath11k_core_check_dt(struct ath11k_base *ath11k); 1006 1007 void ath11k_core_halt(struct ath11k *ar); 1008 int ath11k_core_resume(struct ath11k_base *ab); 1009 int ath11k_core_suspend(struct ath11k_base *ab); 1010 1011 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab, 1012 const char *filename); 1013 1014 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state) 1015 { 1016 switch (state) { 1017 case ATH11K_SCAN_IDLE: 1018 return "idle"; 1019 case ATH11K_SCAN_STARTING: 1020 return "starting"; 1021 case ATH11K_SCAN_RUNNING: 1022 return "running"; 1023 case ATH11K_SCAN_ABORTING: 1024 return "aborting"; 1025 } 1026 1027 return "unknown"; 1028 } 1029 1030 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb) 1031 { 1032 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) > 1033 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 1034 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 1035 } 1036 1037 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb) 1038 { 1039 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb)); 1040 return (struct ath11k_skb_rxcb *)skb->cb; 1041 } 1042 1043 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif) 1044 { 1045 return (struct ath11k_vif *)vif->drv_priv; 1046 } 1047 1048 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab, 1049 int mac_id) 1050 { 1051 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar; 1052 } 1053 1054 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab, 1055 const char *filename, 1056 void *buf, size_t buf_len) 1057 { 1058 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR, 1059 ab->hw_params.fw.dir, filename); 1060 } 1061 1062 static inline const char *ath11k_bus_str(enum ath11k_bus bus) 1063 { 1064 switch (bus) { 1065 case ATH11K_BUS_PCI: 1066 return "pci"; 1067 case ATH11K_BUS_AHB: 1068 return "ahb"; 1069 } 1070 1071 return "unknown"; 1072 } 1073 1074 #endif /* _CORE_H_ */ 1075