1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #include <linux/module.h> 8 #include <linux/slab.h> 9 #include <linux/remoteproc.h> 10 #include <linux/firmware.h> 11 #include <linux/of.h> 12 #include "core.h" 13 #include "dp_tx.h" 14 #include "dp_rx.h" 15 #include "debug.h" 16 #include "hif.h" 17 #include "wow.h" 18 19 unsigned int ath11k_debug_mask; 20 EXPORT_SYMBOL(ath11k_debug_mask); 21 module_param_named(debug_mask, ath11k_debug_mask, uint, 0644); 22 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 23 24 static unsigned int ath11k_crypto_mode; 25 module_param_named(crypto_mode, ath11k_crypto_mode, uint, 0644); 26 MODULE_PARM_DESC(crypto_mode, "crypto mode: 0-hardware, 1-software"); 27 28 /* frame mode values are mapped as per enum ath11k_hw_txrx_mode */ 29 unsigned int ath11k_frame_mode = ATH11K_HW_TXRX_NATIVE_WIFI; 30 module_param_named(frame_mode, ath11k_frame_mode, uint, 0644); 31 MODULE_PARM_DESC(frame_mode, 32 "Datapath frame mode (0: raw, 1: native wifi (default), 2: ethernet)"); 33 34 static const struct ath11k_hw_params ath11k_hw_params[] = { 35 { 36 .hw_rev = ATH11K_HW_IPQ8074, 37 .name = "ipq8074 hw2.0", 38 .fw = { 39 .dir = "IPQ8074/hw2.0", 40 .board_size = 256 * 1024, 41 .cal_offset = 128 * 1024, 42 }, 43 .max_radios = 3, 44 .bdf_addr = 0x4B0C0000, 45 .hw_ops = &ipq8074_ops, 46 .ring_mask = &ath11k_hw_ring_mask_ipq8074, 47 .internal_sleep_clock = false, 48 .regs = &ipq8074_regs, 49 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074, 50 .host_ce_config = ath11k_host_ce_config_ipq8074, 51 .ce_count = 12, 52 .target_ce_config = ath11k_target_ce_config_wlan_ipq8074, 53 .target_ce_count = 11, 54 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq8074, 55 .svc_to_ce_map_len = 21, 56 .rfkill_pin = 0, 57 .rfkill_cfg = 0, 58 .rfkill_on_level = 0, 59 .single_pdev_only = false, 60 .rxdma1_enable = true, 61 .num_rxmda_per_pdev = 1, 62 .rx_mac_buf_ring = false, 63 .vdev_start_delay = false, 64 .htt_peer_map_v2 = true, 65 66 .spectral = { 67 .fft_sz = 2, 68 /* HW bug, expected BIN size is 2 bytes but HW report as 4 bytes. 69 * so added pad size as 2 bytes to compensate the BIN size 70 */ 71 .fft_pad_sz = 2, 72 .summary_pad_sz = 0, 73 .fft_hdr_len = 16, 74 .max_fft_bins = 512, 75 }, 76 77 .interface_modes = BIT(NL80211_IFTYPE_STATION) | 78 BIT(NL80211_IFTYPE_AP) | 79 BIT(NL80211_IFTYPE_MESH_POINT), 80 .supports_monitor = true, 81 .full_monitor_mode = false, 82 .supports_shadow_regs = false, 83 .idle_ps = false, 84 .supports_sta_ps = false, 85 .cold_boot_calib = true, 86 .fw_mem_mode = 0, 87 .num_vdevs = 16 + 1, 88 .num_peers = 512, 89 .supports_suspend = false, 90 .hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074), 91 .supports_regdb = false, 92 .fix_l1ss = true, 93 .credit_flow = false, 94 .max_tx_ring = DP_TCL_NUM_RING_MAX, 95 .hal_params = &ath11k_hw_hal_params_ipq8074, 96 .supports_dynamic_smps_6ghz = false, 97 .alloc_cacheable_memory = true, 98 .wakeup_mhi = false, 99 .supports_rssi_stats = false, 100 .fw_wmi_diag_event = false, 101 .current_cc_support = false, 102 .dbr_debug_support = true, 103 }, 104 { 105 .hw_rev = ATH11K_HW_IPQ6018_HW10, 106 .name = "ipq6018 hw1.0", 107 .fw = { 108 .dir = "IPQ6018/hw1.0", 109 .board_size = 256 * 1024, 110 .cal_offset = 128 * 1024, 111 }, 112 .max_radios = 2, 113 .bdf_addr = 0x4ABC0000, 114 .hw_ops = &ipq6018_ops, 115 .ring_mask = &ath11k_hw_ring_mask_ipq8074, 116 .internal_sleep_clock = false, 117 .regs = &ipq8074_regs, 118 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074, 119 .host_ce_config = ath11k_host_ce_config_ipq8074, 120 .ce_count = 12, 121 .target_ce_config = ath11k_target_ce_config_wlan_ipq8074, 122 .target_ce_count = 11, 123 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_ipq6018, 124 .svc_to_ce_map_len = 19, 125 .rfkill_pin = 0, 126 .rfkill_cfg = 0, 127 .rfkill_on_level = 0, 128 .single_pdev_only = false, 129 .rxdma1_enable = true, 130 .num_rxmda_per_pdev = 1, 131 .rx_mac_buf_ring = false, 132 .vdev_start_delay = false, 133 .htt_peer_map_v2 = true, 134 135 .spectral = { 136 .fft_sz = 4, 137 .fft_pad_sz = 0, 138 .summary_pad_sz = 0, 139 .fft_hdr_len = 16, 140 .max_fft_bins = 512, 141 }, 142 143 .interface_modes = BIT(NL80211_IFTYPE_STATION) | 144 BIT(NL80211_IFTYPE_AP) | 145 BIT(NL80211_IFTYPE_MESH_POINT), 146 .supports_monitor = true, 147 .full_monitor_mode = false, 148 .supports_shadow_regs = false, 149 .idle_ps = false, 150 .supports_sta_ps = false, 151 .cold_boot_calib = true, 152 .fw_mem_mode = 0, 153 .num_vdevs = 16 + 1, 154 .num_peers = 512, 155 .supports_suspend = false, 156 .hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074), 157 .supports_regdb = false, 158 .fix_l1ss = true, 159 .credit_flow = false, 160 .max_tx_ring = DP_TCL_NUM_RING_MAX, 161 .hal_params = &ath11k_hw_hal_params_ipq8074, 162 .supports_dynamic_smps_6ghz = false, 163 .alloc_cacheable_memory = true, 164 .wakeup_mhi = false, 165 .supports_rssi_stats = false, 166 .fw_wmi_diag_event = false, 167 .current_cc_support = false, 168 .dbr_debug_support = true, 169 }, 170 { 171 .name = "qca6390 hw2.0", 172 .hw_rev = ATH11K_HW_QCA6390_HW20, 173 .fw = { 174 .dir = "QCA6390/hw2.0", 175 .board_size = 256 * 1024, 176 .cal_offset = 128 * 1024, 177 }, 178 .max_radios = 3, 179 .bdf_addr = 0x4B0C0000, 180 .hw_ops = &qca6390_ops, 181 .ring_mask = &ath11k_hw_ring_mask_qca6390, 182 .internal_sleep_clock = true, 183 .regs = &qca6390_regs, 184 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390, 185 .host_ce_config = ath11k_host_ce_config_qca6390, 186 .ce_count = 9, 187 .target_ce_config = ath11k_target_ce_config_wlan_qca6390, 188 .target_ce_count = 9, 189 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390, 190 .svc_to_ce_map_len = 14, 191 .rfkill_pin = 48, 192 .rfkill_cfg = 0, 193 .rfkill_on_level = 1, 194 .single_pdev_only = true, 195 .rxdma1_enable = false, 196 .num_rxmda_per_pdev = 2, 197 .rx_mac_buf_ring = true, 198 .vdev_start_delay = true, 199 .htt_peer_map_v2 = false, 200 201 .spectral = { 202 .fft_sz = 0, 203 .fft_pad_sz = 0, 204 .summary_pad_sz = 0, 205 .fft_hdr_len = 0, 206 .max_fft_bins = 0, 207 }, 208 209 .interface_modes = BIT(NL80211_IFTYPE_STATION) | 210 BIT(NL80211_IFTYPE_AP), 211 .supports_monitor = false, 212 .full_monitor_mode = false, 213 .supports_shadow_regs = true, 214 .idle_ps = true, 215 .supports_sta_ps = true, 216 .cold_boot_calib = false, 217 .fw_mem_mode = 0, 218 .num_vdevs = 16 + 1, 219 .num_peers = 512, 220 .supports_suspend = true, 221 .hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074), 222 .supports_regdb = true, 223 .fix_l1ss = true, 224 .credit_flow = true, 225 .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390, 226 .hal_params = &ath11k_hw_hal_params_qca6390, 227 .supports_dynamic_smps_6ghz = false, 228 .alloc_cacheable_memory = false, 229 .wakeup_mhi = true, 230 .supports_rssi_stats = true, 231 .fw_wmi_diag_event = true, 232 .current_cc_support = true, 233 .dbr_debug_support = false, 234 }, 235 { 236 .name = "qcn9074 hw1.0", 237 .hw_rev = ATH11K_HW_QCN9074_HW10, 238 .fw = { 239 .dir = "QCN9074/hw1.0", 240 .board_size = 256 * 1024, 241 .cal_offset = 128 * 1024, 242 }, 243 .max_radios = 1, 244 .single_pdev_only = false, 245 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9074, 246 .hw_ops = &qcn9074_ops, 247 .ring_mask = &ath11k_hw_ring_mask_qcn9074, 248 .internal_sleep_clock = false, 249 .regs = &qcn9074_regs, 250 .host_ce_config = ath11k_host_ce_config_qcn9074, 251 .ce_count = 6, 252 .target_ce_config = ath11k_target_ce_config_wlan_qcn9074, 253 .target_ce_count = 9, 254 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qcn9074, 255 .svc_to_ce_map_len = 18, 256 .rfkill_pin = 0, 257 .rfkill_cfg = 0, 258 .rfkill_on_level = 0, 259 .rxdma1_enable = true, 260 .num_rxmda_per_pdev = 1, 261 .rx_mac_buf_ring = false, 262 .vdev_start_delay = false, 263 .htt_peer_map_v2 = true, 264 265 .spectral = { 266 .fft_sz = 2, 267 .fft_pad_sz = 0, 268 .summary_pad_sz = 16, 269 .fft_hdr_len = 24, 270 .max_fft_bins = 1024, 271 }, 272 273 .interface_modes = BIT(NL80211_IFTYPE_STATION) | 274 BIT(NL80211_IFTYPE_AP) | 275 BIT(NL80211_IFTYPE_MESH_POINT), 276 .supports_monitor = true, 277 .full_monitor_mode = true, 278 .supports_shadow_regs = false, 279 .idle_ps = false, 280 .supports_sta_ps = false, 281 .cold_boot_calib = false, 282 .fw_mem_mode = 2, 283 .num_vdevs = 8, 284 .num_peers = 128, 285 .supports_suspend = false, 286 .hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074), 287 .supports_regdb = false, 288 .fix_l1ss = true, 289 .credit_flow = false, 290 .max_tx_ring = DP_TCL_NUM_RING_MAX, 291 .hal_params = &ath11k_hw_hal_params_ipq8074, 292 .supports_dynamic_smps_6ghz = true, 293 .alloc_cacheable_memory = true, 294 .wakeup_mhi = false, 295 .supports_rssi_stats = false, 296 .fw_wmi_diag_event = false, 297 .current_cc_support = false, 298 .dbr_debug_support = true, 299 }, 300 { 301 .name = "wcn6855 hw2.0", 302 .hw_rev = ATH11K_HW_WCN6855_HW20, 303 .fw = { 304 .dir = "WCN6855/hw2.0", 305 .board_size = 256 * 1024, 306 .cal_offset = 128 * 1024, 307 }, 308 .max_radios = 3, 309 .bdf_addr = 0x4B0C0000, 310 .hw_ops = &wcn6855_ops, 311 .ring_mask = &ath11k_hw_ring_mask_qca6390, 312 .internal_sleep_clock = true, 313 .regs = &wcn6855_regs, 314 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390, 315 .host_ce_config = ath11k_host_ce_config_qca6390, 316 .ce_count = 9, 317 .target_ce_config = ath11k_target_ce_config_wlan_qca6390, 318 .target_ce_count = 9, 319 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390, 320 .svc_to_ce_map_len = 14, 321 .rfkill_pin = 0, 322 .rfkill_cfg = 0, 323 .rfkill_on_level = 0, 324 .single_pdev_only = true, 325 .rxdma1_enable = false, 326 .num_rxmda_per_pdev = 2, 327 .rx_mac_buf_ring = true, 328 .vdev_start_delay = true, 329 .htt_peer_map_v2 = false, 330 331 .spectral = { 332 .fft_sz = 0, 333 .fft_pad_sz = 0, 334 .summary_pad_sz = 0, 335 .fft_hdr_len = 0, 336 .max_fft_bins = 0, 337 }, 338 339 .interface_modes = BIT(NL80211_IFTYPE_STATION) | 340 BIT(NL80211_IFTYPE_AP), 341 .supports_monitor = false, 342 .full_monitor_mode = false, 343 .supports_shadow_regs = true, 344 .idle_ps = true, 345 .supports_sta_ps = true, 346 .cold_boot_calib = false, 347 .fw_mem_mode = 0, 348 .num_vdevs = 16 + 1, 349 .num_peers = 512, 350 .supports_suspend = true, 351 .hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855), 352 .supports_regdb = true, 353 .fix_l1ss = false, 354 .credit_flow = true, 355 .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390, 356 .hal_params = &ath11k_hw_hal_params_qca6390, 357 .supports_dynamic_smps_6ghz = false, 358 .alloc_cacheable_memory = false, 359 .wakeup_mhi = true, 360 .supports_rssi_stats = true, 361 .fw_wmi_diag_event = true, 362 .current_cc_support = true, 363 .dbr_debug_support = false, 364 }, 365 { 366 .name = "wcn6855 hw2.1", 367 .hw_rev = ATH11K_HW_WCN6855_HW21, 368 .fw = { 369 .dir = "WCN6855/hw2.1", 370 .board_size = 256 * 1024, 371 .cal_offset = 128 * 1024, 372 }, 373 .max_radios = 3, 374 .bdf_addr = 0x4B0C0000, 375 .hw_ops = &wcn6855_ops, 376 .ring_mask = &ath11k_hw_ring_mask_qca6390, 377 .internal_sleep_clock = true, 378 .regs = &wcn6855_regs, 379 .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390, 380 .host_ce_config = ath11k_host_ce_config_qca6390, 381 .ce_count = 9, 382 .target_ce_config = ath11k_target_ce_config_wlan_qca6390, 383 .target_ce_count = 9, 384 .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390, 385 .svc_to_ce_map_len = 14, 386 .rfkill_pin = 0, 387 .rfkill_cfg = 0, 388 .rfkill_on_level = 0, 389 .single_pdev_only = true, 390 .rxdma1_enable = false, 391 .num_rxmda_per_pdev = 2, 392 .rx_mac_buf_ring = true, 393 .vdev_start_delay = true, 394 .htt_peer_map_v2 = false, 395 396 .spectral = { 397 .fft_sz = 0, 398 .fft_pad_sz = 0, 399 .summary_pad_sz = 0, 400 .fft_hdr_len = 0, 401 .max_fft_bins = 0, 402 }, 403 404 .interface_modes = BIT(NL80211_IFTYPE_STATION) | 405 BIT(NL80211_IFTYPE_AP), 406 .supports_monitor = false, 407 .supports_shadow_regs = true, 408 .idle_ps = true, 409 .supports_sta_ps = true, 410 .cold_boot_calib = false, 411 .fw_mem_mode = 0, 412 .num_vdevs = 16 + 1, 413 .num_peers = 512, 414 .supports_suspend = true, 415 .hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855), 416 .supports_regdb = true, 417 .fix_l1ss = false, 418 .credit_flow = true, 419 .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390, 420 .hal_params = &ath11k_hw_hal_params_qca6390, 421 .supports_dynamic_smps_6ghz = false, 422 .alloc_cacheable_memory = false, 423 .wakeup_mhi = true, 424 .supports_rssi_stats = true, 425 .fw_wmi_diag_event = true, 426 .current_cc_support = true, 427 .dbr_debug_support = false, 428 }, 429 }; 430 431 int ath11k_core_suspend(struct ath11k_base *ab) 432 { 433 int ret; 434 435 if (!ab->hw_params.supports_suspend) 436 return -EOPNOTSUPP; 437 438 /* TODO: there can frames in queues so for now add delay as a hack. 439 * Need to implement to handle and remove this delay. 440 */ 441 msleep(500); 442 443 ret = ath11k_dp_rx_pktlog_stop(ab, true); 444 if (ret) { 445 ath11k_warn(ab, "failed to stop dp rx (and timer) pktlog during suspend: %d\n", 446 ret); 447 return ret; 448 } 449 450 ret = ath11k_wow_enable(ab); 451 if (ret) { 452 ath11k_warn(ab, "failed to enable wow during suspend: %d\n", ret); 453 return ret; 454 } 455 456 ret = ath11k_dp_rx_pktlog_stop(ab, false); 457 if (ret) { 458 ath11k_warn(ab, "failed to stop dp rx pktlog during suspend: %d\n", 459 ret); 460 return ret; 461 } 462 463 ath11k_ce_stop_shadow_timers(ab); 464 ath11k_dp_stop_shadow_timers(ab); 465 466 ath11k_hif_irq_disable(ab); 467 ath11k_hif_ce_irq_disable(ab); 468 469 ret = ath11k_hif_suspend(ab); 470 if (ret) { 471 ath11k_warn(ab, "failed to suspend hif: %d\n", ret); 472 return ret; 473 } 474 475 return 0; 476 } 477 EXPORT_SYMBOL(ath11k_core_suspend); 478 479 int ath11k_core_resume(struct ath11k_base *ab) 480 { 481 int ret; 482 483 if (!ab->hw_params.supports_suspend) 484 return -EOPNOTSUPP; 485 486 ret = ath11k_hif_resume(ab); 487 if (ret) { 488 ath11k_warn(ab, "failed to resume hif during resume: %d\n", ret); 489 return ret; 490 } 491 492 ath11k_hif_ce_irq_enable(ab); 493 ath11k_hif_irq_enable(ab); 494 495 ret = ath11k_dp_rx_pktlog_start(ab); 496 if (ret) { 497 ath11k_warn(ab, "failed to start rx pktlog during resume: %d\n", 498 ret); 499 return ret; 500 } 501 502 ret = ath11k_wow_wakeup(ab); 503 if (ret) { 504 ath11k_warn(ab, "failed to wakeup wow during resume: %d\n", ret); 505 return ret; 506 } 507 508 return 0; 509 } 510 EXPORT_SYMBOL(ath11k_core_resume); 511 512 int ath11k_core_check_dt(struct ath11k_base *ab) 513 { 514 size_t max_len = sizeof(ab->qmi.target.bdf_ext); 515 const char *variant = NULL; 516 struct device_node *node; 517 518 node = ab->dev->of_node; 519 if (!node) 520 return -ENOENT; 521 522 of_property_read_string(node, "qcom,ath11k-calibration-variant", 523 &variant); 524 if (!variant) 525 return -ENODATA; 526 527 if (strscpy(ab->qmi.target.bdf_ext, variant, max_len) < 0) 528 ath11k_dbg(ab, ATH11K_DBG_BOOT, 529 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 530 variant); 531 532 return 0; 533 } 534 535 static int ath11k_core_create_board_name(struct ath11k_base *ab, char *name, 536 size_t name_len) 537 { 538 /* strlen(',variant=') + strlen(ab->qmi.target.bdf_ext) */ 539 char variant[9 + ATH11K_QMI_BDF_EXT_STR_LENGTH] = { 0 }; 540 541 if (ab->qmi.target.bdf_ext[0] != '\0') 542 scnprintf(variant, sizeof(variant), ",variant=%s", 543 ab->qmi.target.bdf_ext); 544 545 switch (ab->id.bdf_search) { 546 case ATH11K_BDF_SEARCH_BUS_AND_BOARD: 547 scnprintf(name, name_len, 548 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x,qmi-chip-id=%d,qmi-board-id=%d%s", 549 ath11k_bus_str(ab->hif.bus), 550 ab->id.vendor, ab->id.device, 551 ab->id.subsystem_vendor, 552 ab->id.subsystem_device, 553 ab->qmi.target.chip_id, 554 ab->qmi.target.board_id, 555 variant); 556 break; 557 default: 558 scnprintf(name, name_len, 559 "bus=%s,qmi-chip-id=%d,qmi-board-id=%d%s", 560 ath11k_bus_str(ab->hif.bus), 561 ab->qmi.target.chip_id, 562 ab->qmi.target.board_id, variant); 563 break; 564 } 565 566 ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot using board name '%s'\n", name); 567 568 return 0; 569 } 570 571 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab, 572 const char *file) 573 { 574 const struct firmware *fw; 575 char path[100]; 576 int ret; 577 578 if (file == NULL) 579 return ERR_PTR(-ENOENT); 580 581 ath11k_core_create_firmware_path(ab, file, path, sizeof(path)); 582 583 ret = firmware_request_nowarn(&fw, path, ab->dev); 584 if (ret) 585 return ERR_PTR(ret); 586 587 ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot firmware request %s size %zu\n", 588 path, fw->size); 589 590 return fw; 591 } 592 593 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd) 594 { 595 if (!IS_ERR(bd->fw)) 596 release_firmware(bd->fw); 597 598 memset(bd, 0, sizeof(*bd)); 599 } 600 601 static int ath11k_core_parse_bd_ie_board(struct ath11k_base *ab, 602 struct ath11k_board_data *bd, 603 const void *buf, size_t buf_len, 604 const char *boardname, 605 int bd_ie_type) 606 { 607 const struct ath11k_fw_ie *hdr; 608 bool name_match_found; 609 int ret, board_ie_id; 610 size_t board_ie_len; 611 const void *board_ie_data; 612 613 name_match_found = false; 614 615 /* go through ATH11K_BD_IE_BOARD_ elements */ 616 while (buf_len > sizeof(struct ath11k_fw_ie)) { 617 hdr = buf; 618 board_ie_id = le32_to_cpu(hdr->id); 619 board_ie_len = le32_to_cpu(hdr->len); 620 board_ie_data = hdr->data; 621 622 buf_len -= sizeof(*hdr); 623 buf += sizeof(*hdr); 624 625 if (buf_len < ALIGN(board_ie_len, 4)) { 626 ath11k_err(ab, "invalid ATH11K_BD_IE_BOARD length: %zu < %zu\n", 627 buf_len, ALIGN(board_ie_len, 4)); 628 ret = -EINVAL; 629 goto out; 630 } 631 632 switch (board_ie_id) { 633 case ATH11K_BD_IE_BOARD_NAME: 634 ath11k_dbg_dump(ab, ATH11K_DBG_BOOT, "board name", "", 635 board_ie_data, board_ie_len); 636 637 if (board_ie_len != strlen(boardname)) 638 break; 639 640 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 641 if (ret) 642 break; 643 644 name_match_found = true; 645 ath11k_dbg(ab, ATH11K_DBG_BOOT, 646 "boot found match for name '%s'", 647 boardname); 648 break; 649 case ATH11K_BD_IE_BOARD_DATA: 650 if (!name_match_found) 651 /* no match found */ 652 break; 653 654 ath11k_dbg(ab, ATH11K_DBG_BOOT, 655 "boot found board data for '%s'", boardname); 656 657 bd->data = board_ie_data; 658 bd->len = board_ie_len; 659 660 ret = 0; 661 goto out; 662 default: 663 ath11k_warn(ab, "unknown ATH11K_BD_IE_BOARD found: %d\n", 664 board_ie_id); 665 break; 666 } 667 668 /* jump over the padding */ 669 board_ie_len = ALIGN(board_ie_len, 4); 670 671 buf_len -= board_ie_len; 672 buf += board_ie_len; 673 } 674 675 /* no match found */ 676 ret = -ENOENT; 677 678 out: 679 return ret; 680 } 681 682 static int ath11k_core_fetch_board_data_api_n(struct ath11k_base *ab, 683 struct ath11k_board_data *bd, 684 const char *boardname) 685 { 686 size_t len, magic_len; 687 const u8 *data; 688 char *filename, filepath[100]; 689 size_t ie_len; 690 struct ath11k_fw_ie *hdr; 691 int ret, ie_id; 692 693 filename = ATH11K_BOARD_API2_FILE; 694 695 if (!bd->fw) 696 bd->fw = ath11k_core_firmware_request(ab, filename); 697 698 if (IS_ERR(bd->fw)) 699 return PTR_ERR(bd->fw); 700 701 data = bd->fw->data; 702 len = bd->fw->size; 703 704 ath11k_core_create_firmware_path(ab, filename, 705 filepath, sizeof(filepath)); 706 707 /* magic has extra null byte padded */ 708 magic_len = strlen(ATH11K_BOARD_MAGIC) + 1; 709 if (len < magic_len) { 710 ath11k_err(ab, "failed to find magic value in %s, file too short: %zu\n", 711 filepath, len); 712 ret = -EINVAL; 713 goto err; 714 } 715 716 if (memcmp(data, ATH11K_BOARD_MAGIC, magic_len)) { 717 ath11k_err(ab, "found invalid board magic\n"); 718 ret = -EINVAL; 719 goto err; 720 } 721 722 /* magic is padded to 4 bytes */ 723 magic_len = ALIGN(magic_len, 4); 724 if (len < magic_len) { 725 ath11k_err(ab, "failed: %s too small to contain board data, len: %zu\n", 726 filepath, len); 727 ret = -EINVAL; 728 goto err; 729 } 730 731 data += magic_len; 732 len -= magic_len; 733 734 while (len > sizeof(struct ath11k_fw_ie)) { 735 hdr = (struct ath11k_fw_ie *)data; 736 ie_id = le32_to_cpu(hdr->id); 737 ie_len = le32_to_cpu(hdr->len); 738 739 len -= sizeof(*hdr); 740 data = hdr->data; 741 742 if (len < ALIGN(ie_len, 4)) { 743 ath11k_err(ab, "invalid length for board ie_id %d ie_len %zu len %zu\n", 744 ie_id, ie_len, len); 745 ret = -EINVAL; 746 goto err; 747 } 748 749 switch (ie_id) { 750 case ATH11K_BD_IE_BOARD: 751 ret = ath11k_core_parse_bd_ie_board(ab, bd, data, 752 ie_len, 753 boardname, 754 ATH11K_BD_IE_BOARD); 755 if (ret == -ENOENT) 756 /* no match found, continue */ 757 break; 758 else if (ret) 759 /* there was an error, bail out */ 760 goto err; 761 /* either found or error, so stop searching */ 762 goto out; 763 } 764 765 /* jump over the padding */ 766 ie_len = ALIGN(ie_len, 4); 767 768 len -= ie_len; 769 data += ie_len; 770 } 771 772 out: 773 if (!bd->data || !bd->len) { 774 ath11k_err(ab, 775 "failed to fetch board data for %s from %s\n", 776 boardname, filepath); 777 ret = -ENODATA; 778 goto err; 779 } 780 781 return 0; 782 783 err: 784 ath11k_core_free_bdf(ab, bd); 785 return ret; 786 } 787 788 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab, 789 struct ath11k_board_data *bd, 790 const char *name) 791 { 792 bd->fw = ath11k_core_firmware_request(ab, name); 793 794 if (IS_ERR(bd->fw)) 795 return PTR_ERR(bd->fw); 796 797 bd->data = bd->fw->data; 798 bd->len = bd->fw->size; 799 800 return 0; 801 } 802 803 #define BOARD_NAME_SIZE 200 804 int ath11k_core_fetch_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd) 805 { 806 char boardname[BOARD_NAME_SIZE]; 807 int ret; 808 809 ret = ath11k_core_create_board_name(ab, boardname, BOARD_NAME_SIZE); 810 if (ret) { 811 ath11k_err(ab, "failed to create board name: %d", ret); 812 return ret; 813 } 814 815 ab->bd_api = 2; 816 ret = ath11k_core_fetch_board_data_api_n(ab, bd, boardname); 817 if (!ret) 818 goto success; 819 820 ab->bd_api = 1; 821 ret = ath11k_core_fetch_board_data_api_1(ab, bd, ATH11K_DEFAULT_BOARD_FILE); 822 if (ret) { 823 ath11k_err(ab, "failed to fetch board-2.bin or board.bin from %s\n", 824 ab->hw_params.fw.dir); 825 return ret; 826 } 827 828 success: 829 ath11k_dbg(ab, ATH11K_DBG_BOOT, "using board api %d\n", ab->bd_api); 830 return 0; 831 } 832 833 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd) 834 { 835 int ret; 836 837 ret = ath11k_core_fetch_board_data_api_1(ab, bd, ATH11K_REGDB_FILE_NAME); 838 if (ret) 839 ath11k_dbg(ab, ATH11K_DBG_BOOT, "failed to fetch %s from %s\n", 840 ATH11K_REGDB_FILE_NAME, ab->hw_params.fw.dir); 841 842 return ret; 843 } 844 845 static void ath11k_core_stop(struct ath11k_base *ab) 846 { 847 if (!test_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags)) 848 ath11k_qmi_firmware_stop(ab); 849 850 ath11k_hif_stop(ab); 851 ath11k_wmi_detach(ab); 852 ath11k_dp_pdev_reo_cleanup(ab); 853 854 /* De-Init of components as needed */ 855 } 856 857 static int ath11k_core_soc_create(struct ath11k_base *ab) 858 { 859 int ret; 860 861 ret = ath11k_qmi_init_service(ab); 862 if (ret) { 863 ath11k_err(ab, "failed to initialize qmi :%d\n", ret); 864 return ret; 865 } 866 867 ret = ath11k_debugfs_soc_create(ab); 868 if (ret) { 869 ath11k_err(ab, "failed to create ath11k debugfs\n"); 870 goto err_qmi_deinit; 871 } 872 873 ret = ath11k_hif_power_up(ab); 874 if (ret) { 875 ath11k_err(ab, "failed to power up :%d\n", ret); 876 goto err_debugfs_reg; 877 } 878 879 return 0; 880 881 err_debugfs_reg: 882 ath11k_debugfs_soc_destroy(ab); 883 err_qmi_deinit: 884 ath11k_qmi_deinit_service(ab); 885 return ret; 886 } 887 888 static void ath11k_core_soc_destroy(struct ath11k_base *ab) 889 { 890 ath11k_debugfs_soc_destroy(ab); 891 ath11k_dp_free(ab); 892 ath11k_reg_free(ab); 893 ath11k_qmi_deinit_service(ab); 894 } 895 896 static int ath11k_core_pdev_create(struct ath11k_base *ab) 897 { 898 int ret; 899 900 ret = ath11k_debugfs_pdev_create(ab); 901 if (ret) { 902 ath11k_err(ab, "failed to create core pdev debugfs: %d\n", ret); 903 return ret; 904 } 905 906 ret = ath11k_mac_register(ab); 907 if (ret) { 908 ath11k_err(ab, "failed register the radio with mac80211: %d\n", ret); 909 goto err_pdev_debug; 910 } 911 912 ret = ath11k_dp_pdev_alloc(ab); 913 if (ret) { 914 ath11k_err(ab, "failed to attach DP pdev: %d\n", ret); 915 goto err_mac_unregister; 916 } 917 918 ret = ath11k_thermal_register(ab); 919 if (ret) { 920 ath11k_err(ab, "could not register thermal device: %d\n", 921 ret); 922 goto err_dp_pdev_free; 923 } 924 925 ret = ath11k_spectral_init(ab); 926 if (ret) { 927 ath11k_err(ab, "failed to init spectral %d\n", ret); 928 goto err_thermal_unregister; 929 } 930 931 return 0; 932 933 err_thermal_unregister: 934 ath11k_thermal_unregister(ab); 935 err_dp_pdev_free: 936 ath11k_dp_pdev_free(ab); 937 err_mac_unregister: 938 ath11k_mac_unregister(ab); 939 err_pdev_debug: 940 ath11k_debugfs_pdev_destroy(ab); 941 942 return ret; 943 } 944 945 static void ath11k_core_pdev_destroy(struct ath11k_base *ab) 946 { 947 ath11k_spectral_deinit(ab); 948 ath11k_thermal_unregister(ab); 949 ath11k_mac_unregister(ab); 950 ath11k_hif_irq_disable(ab); 951 ath11k_dp_pdev_free(ab); 952 ath11k_debugfs_pdev_destroy(ab); 953 } 954 955 static int ath11k_core_start(struct ath11k_base *ab, 956 enum ath11k_firmware_mode mode) 957 { 958 int ret; 959 960 ret = ath11k_qmi_firmware_start(ab, mode); 961 if (ret) { 962 ath11k_err(ab, "failed to attach wmi: %d\n", ret); 963 return ret; 964 } 965 966 ret = ath11k_wmi_attach(ab); 967 if (ret) { 968 ath11k_err(ab, "failed to attach wmi: %d\n", ret); 969 goto err_firmware_stop; 970 } 971 972 ret = ath11k_htc_init(ab); 973 if (ret) { 974 ath11k_err(ab, "failed to init htc: %d\n", ret); 975 goto err_wmi_detach; 976 } 977 978 ret = ath11k_hif_start(ab); 979 if (ret) { 980 ath11k_err(ab, "failed to start HIF: %d\n", ret); 981 goto err_wmi_detach; 982 } 983 984 ret = ath11k_htc_wait_target(&ab->htc); 985 if (ret) { 986 ath11k_err(ab, "failed to connect to HTC: %d\n", ret); 987 goto err_hif_stop; 988 } 989 990 ret = ath11k_dp_htt_connect(&ab->dp); 991 if (ret) { 992 ath11k_err(ab, "failed to connect to HTT: %d\n", ret); 993 goto err_hif_stop; 994 } 995 996 ret = ath11k_wmi_connect(ab); 997 if (ret) { 998 ath11k_err(ab, "failed to connect wmi: %d\n", ret); 999 goto err_hif_stop; 1000 } 1001 1002 ret = ath11k_htc_start(&ab->htc); 1003 if (ret) { 1004 ath11k_err(ab, "failed to start HTC: %d\n", ret); 1005 goto err_hif_stop; 1006 } 1007 1008 ret = ath11k_wmi_wait_for_service_ready(ab); 1009 if (ret) { 1010 ath11k_err(ab, "failed to receive wmi service ready event: %d\n", 1011 ret); 1012 goto err_hif_stop; 1013 } 1014 1015 ret = ath11k_mac_allocate(ab); 1016 if (ret) { 1017 ath11k_err(ab, "failed to create new hw device with mac80211 :%d\n", 1018 ret); 1019 goto err_hif_stop; 1020 } 1021 1022 ath11k_dp_pdev_pre_alloc(ab); 1023 1024 ret = ath11k_dp_pdev_reo_setup(ab); 1025 if (ret) { 1026 ath11k_err(ab, "failed to initialize reo destination rings: %d\n", ret); 1027 goto err_mac_destroy; 1028 } 1029 1030 ret = ath11k_wmi_cmd_init(ab); 1031 if (ret) { 1032 ath11k_err(ab, "failed to send wmi init cmd: %d\n", ret); 1033 goto err_reo_cleanup; 1034 } 1035 1036 ret = ath11k_wmi_wait_for_unified_ready(ab); 1037 if (ret) { 1038 ath11k_err(ab, "failed to receive wmi unified ready event: %d\n", 1039 ret); 1040 goto err_reo_cleanup; 1041 } 1042 1043 /* put hardware to DBS mode */ 1044 if (ab->hw_params.single_pdev_only) { 1045 ret = ath11k_wmi_set_hw_mode(ab, WMI_HOST_HW_MODE_DBS); 1046 if (ret) { 1047 ath11k_err(ab, "failed to send dbs mode: %d\n", ret); 1048 goto err_hif_stop; 1049 } 1050 } 1051 1052 ret = ath11k_dp_tx_htt_h2t_ver_req_msg(ab); 1053 if (ret) { 1054 ath11k_err(ab, "failed to send htt version request message: %d\n", 1055 ret); 1056 goto err_reo_cleanup; 1057 } 1058 1059 return 0; 1060 1061 err_reo_cleanup: 1062 ath11k_dp_pdev_reo_cleanup(ab); 1063 err_mac_destroy: 1064 ath11k_mac_destroy(ab); 1065 err_hif_stop: 1066 ath11k_hif_stop(ab); 1067 err_wmi_detach: 1068 ath11k_wmi_detach(ab); 1069 err_firmware_stop: 1070 ath11k_qmi_firmware_stop(ab); 1071 1072 return ret; 1073 } 1074 1075 static int ath11k_core_rfkill_config(struct ath11k_base *ab) 1076 { 1077 struct ath11k *ar; 1078 int ret = 0, i; 1079 1080 if (!(ab->target_caps.sys_cap_info & WMI_SYS_CAP_INFO_RFKILL)) 1081 return 0; 1082 1083 for (i = 0; i < ab->num_radios; i++) { 1084 ar = ab->pdevs[i].ar; 1085 1086 ret = ath11k_mac_rfkill_config(ar); 1087 if (ret && ret != -EOPNOTSUPP) { 1088 ath11k_warn(ab, "failed to configure rfkill: %d", ret); 1089 return ret; 1090 } 1091 } 1092 1093 return ret; 1094 } 1095 1096 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab) 1097 { 1098 int ret; 1099 1100 ret = ath11k_ce_init_pipes(ab); 1101 if (ret) { 1102 ath11k_err(ab, "failed to initialize CE: %d\n", ret); 1103 return ret; 1104 } 1105 1106 ret = ath11k_dp_alloc(ab); 1107 if (ret) { 1108 ath11k_err(ab, "failed to init DP: %d\n", ret); 1109 return ret; 1110 } 1111 1112 switch (ath11k_crypto_mode) { 1113 case ATH11K_CRYPT_MODE_SW: 1114 set_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &ab->dev_flags); 1115 set_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags); 1116 break; 1117 case ATH11K_CRYPT_MODE_HW: 1118 clear_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &ab->dev_flags); 1119 clear_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags); 1120 break; 1121 default: 1122 ath11k_info(ab, "invalid crypto_mode: %d\n", ath11k_crypto_mode); 1123 return -EINVAL; 1124 } 1125 1126 if (ath11k_frame_mode == ATH11K_HW_TXRX_RAW) 1127 set_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags); 1128 1129 mutex_lock(&ab->core_lock); 1130 ret = ath11k_core_start(ab, ATH11K_FIRMWARE_MODE_NORMAL); 1131 if (ret) { 1132 ath11k_err(ab, "failed to start core: %d\n", ret); 1133 goto err_dp_free; 1134 } 1135 1136 ret = ath11k_core_pdev_create(ab); 1137 if (ret) { 1138 ath11k_err(ab, "failed to create pdev core: %d\n", ret); 1139 goto err_core_stop; 1140 } 1141 ath11k_hif_irq_enable(ab); 1142 1143 ret = ath11k_core_rfkill_config(ab); 1144 if (ret && ret != -EOPNOTSUPP) { 1145 ath11k_err(ab, "failed to config rfkill: %d\n", ret); 1146 goto err_core_stop; 1147 } 1148 1149 mutex_unlock(&ab->core_lock); 1150 1151 return 0; 1152 1153 err_core_stop: 1154 ath11k_core_stop(ab); 1155 ath11k_mac_destroy(ab); 1156 err_dp_free: 1157 ath11k_dp_free(ab); 1158 mutex_unlock(&ab->core_lock); 1159 return ret; 1160 } 1161 1162 static int ath11k_core_reconfigure_on_crash(struct ath11k_base *ab) 1163 { 1164 int ret; 1165 1166 mutex_lock(&ab->core_lock); 1167 ath11k_thermal_unregister(ab); 1168 ath11k_hif_irq_disable(ab); 1169 ath11k_dp_pdev_free(ab); 1170 ath11k_spectral_deinit(ab); 1171 ath11k_hif_stop(ab); 1172 ath11k_wmi_detach(ab); 1173 ath11k_dp_pdev_reo_cleanup(ab); 1174 mutex_unlock(&ab->core_lock); 1175 1176 ath11k_dp_free(ab); 1177 ath11k_hal_srng_deinit(ab); 1178 1179 ab->free_vdev_map = (1LL << (ab->num_radios * TARGET_NUM_VDEVS(ab))) - 1; 1180 1181 ret = ath11k_hal_srng_init(ab); 1182 if (ret) 1183 return ret; 1184 1185 clear_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags); 1186 1187 ret = ath11k_core_qmi_firmware_ready(ab); 1188 if (ret) 1189 goto err_hal_srng_deinit; 1190 1191 clear_bit(ATH11K_FLAG_RECOVERY, &ab->dev_flags); 1192 1193 return 0; 1194 1195 err_hal_srng_deinit: 1196 ath11k_hal_srng_deinit(ab); 1197 return ret; 1198 } 1199 1200 void ath11k_core_halt(struct ath11k *ar) 1201 { 1202 struct ath11k_base *ab = ar->ab; 1203 1204 lockdep_assert_held(&ar->conf_mutex); 1205 1206 ar->num_created_vdevs = 0; 1207 ar->allocated_vdev_map = 0; 1208 1209 ath11k_mac_scan_finish(ar); 1210 ath11k_mac_peer_cleanup_all(ar); 1211 cancel_delayed_work_sync(&ar->scan.timeout); 1212 cancel_work_sync(&ar->regd_update_work); 1213 cancel_work_sync(&ab->update_11d_work); 1214 cancel_work_sync(&ab->rfkill_work); 1215 1216 rcu_assign_pointer(ab->pdevs_active[ar->pdev_idx], NULL); 1217 synchronize_rcu(); 1218 INIT_LIST_HEAD(&ar->arvifs); 1219 idr_init(&ar->txmgmt_idr); 1220 } 1221 1222 static void ath11k_rfkill_work(struct work_struct *work) 1223 { 1224 struct ath11k_base *ab = container_of(work, struct ath11k_base, rfkill_work); 1225 struct ath11k *ar; 1226 bool rfkill_radio_on; 1227 int i; 1228 1229 spin_lock_bh(&ab->base_lock); 1230 rfkill_radio_on = ab->rfkill_radio_on; 1231 spin_unlock_bh(&ab->base_lock); 1232 1233 for (i = 0; i < ab->num_radios; i++) { 1234 ar = ab->pdevs[i].ar; 1235 if (!ar) 1236 continue; 1237 1238 /* notify cfg80211 radio state change */ 1239 ath11k_mac_rfkill_enable_radio(ar, rfkill_radio_on); 1240 wiphy_rfkill_set_hw_state(ar->hw->wiphy, !rfkill_radio_on); 1241 } 1242 } 1243 1244 static void ath11k_update_11d(struct work_struct *work) 1245 { 1246 struct ath11k_base *ab = container_of(work, struct ath11k_base, update_11d_work); 1247 struct ath11k *ar; 1248 struct ath11k_pdev *pdev; 1249 struct wmi_set_current_country_params set_current_param = {}; 1250 int ret, i; 1251 1252 spin_lock_bh(&ab->base_lock); 1253 memcpy(&set_current_param.alpha2, &ab->new_alpha2, 2); 1254 spin_unlock_bh(&ab->base_lock); 1255 1256 ath11k_dbg(ab, ATH11K_DBG_WMI, "update 11d new cc %c%c\n", 1257 set_current_param.alpha2[0], 1258 set_current_param.alpha2[1]); 1259 1260 for (i = 0; i < ab->num_radios; i++) { 1261 pdev = &ab->pdevs[i]; 1262 ar = pdev->ar; 1263 1264 ret = ath11k_wmi_send_set_current_country_cmd(ar, &set_current_param); 1265 if (ret) 1266 ath11k_warn(ar->ab, 1267 "pdev id %d failed set current country code: %d\n", 1268 i, ret); 1269 } 1270 } 1271 1272 static void ath11k_core_restart(struct work_struct *work) 1273 { 1274 struct ath11k_base *ab = container_of(work, struct ath11k_base, restart_work); 1275 struct ath11k *ar; 1276 struct ath11k_pdev *pdev; 1277 int i, ret = 0; 1278 1279 spin_lock_bh(&ab->base_lock); 1280 ab->stats.fw_crash_counter++; 1281 spin_unlock_bh(&ab->base_lock); 1282 1283 for (i = 0; i < ab->num_radios; i++) { 1284 pdev = &ab->pdevs[i]; 1285 ar = pdev->ar; 1286 if (!ar || ar->state == ATH11K_STATE_OFF) 1287 continue; 1288 1289 ieee80211_stop_queues(ar->hw); 1290 ath11k_mac_drain_tx(ar); 1291 complete(&ar->scan.started); 1292 complete(&ar->scan.completed); 1293 complete(&ar->peer_assoc_done); 1294 complete(&ar->peer_delete_done); 1295 complete(&ar->install_key_done); 1296 complete(&ar->vdev_setup_done); 1297 complete(&ar->vdev_delete_done); 1298 complete(&ar->bss_survey_done); 1299 complete(&ar->thermal.wmi_sync); 1300 1301 wake_up(&ar->dp.tx_empty_waitq); 1302 idr_for_each(&ar->txmgmt_idr, 1303 ath11k_mac_tx_mgmt_pending_free, ar); 1304 idr_destroy(&ar->txmgmt_idr); 1305 wake_up(&ar->txmgmt_empty_waitq); 1306 } 1307 1308 wake_up(&ab->wmi_ab.tx_credits_wq); 1309 wake_up(&ab->peer_mapping_wq); 1310 1311 ret = ath11k_core_reconfigure_on_crash(ab); 1312 if (ret) { 1313 ath11k_err(ab, "failed to reconfigure driver on crash recovery\n"); 1314 return; 1315 } 1316 1317 for (i = 0; i < ab->num_radios; i++) { 1318 pdev = &ab->pdevs[i]; 1319 ar = pdev->ar; 1320 if (!ar || ar->state == ATH11K_STATE_OFF) 1321 continue; 1322 1323 mutex_lock(&ar->conf_mutex); 1324 1325 switch (ar->state) { 1326 case ATH11K_STATE_ON: 1327 ar->state = ATH11K_STATE_RESTARTING; 1328 ath11k_core_halt(ar); 1329 ieee80211_restart_hw(ar->hw); 1330 break; 1331 case ATH11K_STATE_OFF: 1332 ath11k_warn(ab, 1333 "cannot restart radio %d that hasn't been started\n", 1334 i); 1335 break; 1336 case ATH11K_STATE_RESTARTING: 1337 break; 1338 case ATH11K_STATE_RESTARTED: 1339 ar->state = ATH11K_STATE_WEDGED; 1340 fallthrough; 1341 case ATH11K_STATE_WEDGED: 1342 ath11k_warn(ab, 1343 "device is wedged, will not restart radio %d\n", i); 1344 break; 1345 } 1346 mutex_unlock(&ar->conf_mutex); 1347 } 1348 complete(&ab->driver_recovery); 1349 } 1350 1351 static int ath11k_init_hw_params(struct ath11k_base *ab) 1352 { 1353 const struct ath11k_hw_params *hw_params = NULL; 1354 int i; 1355 1356 for (i = 0; i < ARRAY_SIZE(ath11k_hw_params); i++) { 1357 hw_params = &ath11k_hw_params[i]; 1358 1359 if (hw_params->hw_rev == ab->hw_rev) 1360 break; 1361 } 1362 1363 if (i == ARRAY_SIZE(ath11k_hw_params)) { 1364 ath11k_err(ab, "Unsupported hardware version: 0x%x\n", ab->hw_rev); 1365 return -EINVAL; 1366 } 1367 1368 ab->hw_params = *hw_params; 1369 1370 ath11k_info(ab, "%s\n", ab->hw_params.name); 1371 1372 return 0; 1373 } 1374 1375 int ath11k_core_pre_init(struct ath11k_base *ab) 1376 { 1377 int ret; 1378 1379 ret = ath11k_init_hw_params(ab); 1380 if (ret) { 1381 ath11k_err(ab, "failed to get hw params: %d\n", ret); 1382 return ret; 1383 } 1384 1385 return 0; 1386 } 1387 EXPORT_SYMBOL(ath11k_core_pre_init); 1388 1389 int ath11k_core_init(struct ath11k_base *ab) 1390 { 1391 int ret; 1392 1393 ret = ath11k_core_soc_create(ab); 1394 if (ret) { 1395 ath11k_err(ab, "failed to create soc core: %d\n", ret); 1396 return ret; 1397 } 1398 1399 return 0; 1400 } 1401 EXPORT_SYMBOL(ath11k_core_init); 1402 1403 void ath11k_core_deinit(struct ath11k_base *ab) 1404 { 1405 mutex_lock(&ab->core_lock); 1406 1407 ath11k_core_pdev_destroy(ab); 1408 ath11k_core_stop(ab); 1409 1410 mutex_unlock(&ab->core_lock); 1411 1412 ath11k_hif_power_down(ab); 1413 ath11k_mac_destroy(ab); 1414 ath11k_core_soc_destroy(ab); 1415 } 1416 EXPORT_SYMBOL(ath11k_core_deinit); 1417 1418 void ath11k_core_free(struct ath11k_base *ab) 1419 { 1420 destroy_workqueue(ab->workqueue); 1421 1422 kfree(ab); 1423 } 1424 EXPORT_SYMBOL(ath11k_core_free); 1425 1426 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size, 1427 enum ath11k_bus bus, 1428 const struct ath11k_bus_params *bus_params) 1429 { 1430 struct ath11k_base *ab; 1431 1432 ab = kzalloc(sizeof(*ab) + priv_size, GFP_KERNEL); 1433 if (!ab) 1434 return NULL; 1435 1436 init_completion(&ab->driver_recovery); 1437 1438 ab->workqueue = create_singlethread_workqueue("ath11k_wq"); 1439 if (!ab->workqueue) 1440 goto err_sc_free; 1441 1442 mutex_init(&ab->core_lock); 1443 spin_lock_init(&ab->base_lock); 1444 mutex_init(&ab->vdev_id_11d_lock); 1445 1446 INIT_LIST_HEAD(&ab->peers); 1447 init_waitqueue_head(&ab->peer_mapping_wq); 1448 init_waitqueue_head(&ab->wmi_ab.tx_credits_wq); 1449 init_waitqueue_head(&ab->qmi.cold_boot_waitq); 1450 INIT_WORK(&ab->restart_work, ath11k_core_restart); 1451 INIT_WORK(&ab->update_11d_work, ath11k_update_11d); 1452 INIT_WORK(&ab->rfkill_work, ath11k_rfkill_work); 1453 timer_setup(&ab->rx_replenish_retry, ath11k_ce_rx_replenish_retry, 0); 1454 init_completion(&ab->htc_suspend); 1455 init_completion(&ab->wow.wakeup_completed); 1456 1457 ab->dev = dev; 1458 ab->bus_params = *bus_params; 1459 ab->hif.bus = bus; 1460 1461 return ab; 1462 1463 err_sc_free: 1464 kfree(ab); 1465 return NULL; 1466 } 1467 EXPORT_SYMBOL(ath11k_core_alloc); 1468 1469 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ax wireless LAN cards."); 1470 MODULE_LICENSE("Dual BSD/GPL"); 1471