xref: /openbmc/linux/drivers/net/wireless/ath/ath10k/wmi.h (revision f40a307e)
1f0553ca9SKalle Valo /* SPDX-License-Identifier: ISC */
25e3dd157SKalle Valo /*
35e3dd157SKalle Valo  * Copyright (c) 2005-2011 Atheros Communications Inc.
48b1083d6SKalle Valo  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5bc64d052SMaharaja Kennadyrajan  * Copyright (c) 2018, The Linux Foundation. All rights reserved.
65e3dd157SKalle Valo  */
75e3dd157SKalle Valo 
85e3dd157SKalle Valo #ifndef _WMI_H_
95e3dd157SKalle Valo #define _WMI_H_
105e3dd157SKalle Valo 
115e3dd157SKalle Valo #include <linux/types.h>
12db3b6280SKalle Valo #include <linux/ieee80211.h>
135e3dd157SKalle Valo 
145e3dd157SKalle Valo /*
155e3dd157SKalle Valo  * This file specifies the WMI interface for the Unified Software
165e3dd157SKalle Valo  * Architecture.
175e3dd157SKalle Valo  *
185e3dd157SKalle Valo  * It includes definitions of all the commands and events. Commands are
195e3dd157SKalle Valo  * messages from the host to the target. Events and Replies are messages
205e3dd157SKalle Valo  * from the target to the host.
215e3dd157SKalle Valo  *
225e3dd157SKalle Valo  * Ownership of correctness in regards to WMI commands belongs to the host
235e3dd157SKalle Valo  * driver and the target is not required to validate parameters for value,
245e3dd157SKalle Valo  * proper range, or any other checking.
255e3dd157SKalle Valo  *
265e3dd157SKalle Valo  * Guidelines for extending this interface are below.
275e3dd157SKalle Valo  *
285e3dd157SKalle Valo  * 1. Add new WMI commands ONLY within the specified range - 0x9000 - 0x9fff
295e3dd157SKalle Valo  *
305e3dd157SKalle Valo  * 2. Use ONLY u32 type for defining member variables within WMI
315e3dd157SKalle Valo  *    command/event structures. Do not use u8, u16, bool or
325e3dd157SKalle Valo  *    enum types within these structures.
335e3dd157SKalle Valo  *
345e3dd157SKalle Valo  * 3. DO NOT define bit fields within structures. Implement bit fields
355e3dd157SKalle Valo  *    using masks if necessary. Do not use the programming language's bit
365e3dd157SKalle Valo  *    field definition.
375e3dd157SKalle Valo  *
385e3dd157SKalle Valo  * 4. Define macros for encode/decode of u8, u16 fields within
395e3dd157SKalle Valo  *    the u32 variables. Use these macros for set/get of these fields.
405e3dd157SKalle Valo  *    Try to use this to optimize the structure without bloating it with
415e3dd157SKalle Valo  *    u32 variables for every lower sized field.
425e3dd157SKalle Valo  *
435e3dd157SKalle Valo  * 5. Do not use PACK/UNPACK attributes for the structures as each member
445e3dd157SKalle Valo  *    variable is already 4-byte aligned by virtue of being a u32
455e3dd157SKalle Valo  *    type.
465e3dd157SKalle Valo  *
475e3dd157SKalle Valo  * 6. Comment each parameter part of the WMI command/event structure by
48e13dbeadSJoe Perches  *    using the 2 stars at the beginning of C comment instead of one star to
495e3dd157SKalle Valo  *    enable HTML document generation using Doxygen.
505e3dd157SKalle Valo  *
515e3dd157SKalle Valo  */
525e3dd157SKalle Valo 
535e3dd157SKalle Valo /* Control Path */
545e3dd157SKalle Valo struct wmi_cmd_hdr {
555e3dd157SKalle Valo 	__le32 cmd_id;
565e3dd157SKalle Valo } __packed;
575e3dd157SKalle Valo 
585e3dd157SKalle Valo #define WMI_CMD_HDR_CMD_ID_MASK   0x00FFFFFF
595e3dd157SKalle Valo #define WMI_CMD_HDR_CMD_ID_LSB    0
605e3dd157SKalle Valo #define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000
615e3dd157SKalle Valo #define WMI_CMD_HDR_PLT_PRIV_LSB  24
625e3dd157SKalle Valo 
635e3dd157SKalle Valo #define HTC_PROTOCOL_VERSION    0x0002
645e3dd157SKalle Valo #define WMI_PROTOCOL_VERSION    0x0002
655e3dd157SKalle Valo 
663b8fc902SKalle Valo /*
673b8fc902SKalle Valo  * There is no signed version of __le32, so for a temporary solution come
686d219113SAmadeusz Sławiński  * up with our own version. The idea is from fs/ntfs/endian.h.
693b8fc902SKalle Valo  *
703b8fc902SKalle Valo  * Use a_ prefix so that it doesn't conflict if we get proper support to
713b8fc902SKalle Valo  * linux/types.h.
723b8fc902SKalle Valo  */
733b8fc902SKalle Valo typedef __s32 __bitwise a_sle32;
743b8fc902SKalle Valo 
753b8fc902SKalle Valo static inline a_sle32 a_cpu_to_sle32(s32 val)
763b8fc902SKalle Valo {
773b8fc902SKalle Valo 	return (__force a_sle32)cpu_to_le32(val);
783b8fc902SKalle Valo }
793b8fc902SKalle Valo 
803b8fc902SKalle Valo static inline s32 a_sle32_to_cpu(a_sle32 val)
813b8fc902SKalle Valo {
823b8fc902SKalle Valo 	return le32_to_cpu((__force __le32)val);
833b8fc902SKalle Valo }
843b8fc902SKalle Valo 
85cff990ceSMichal Kazior enum wmi_service {
86cff990ceSMichal Kazior 	WMI_SERVICE_BEACON_OFFLOAD = 0,
87cff990ceSMichal Kazior 	WMI_SERVICE_SCAN_OFFLOAD,
88cff990ceSMichal Kazior 	WMI_SERVICE_ROAM_OFFLOAD,
89cff990ceSMichal Kazior 	WMI_SERVICE_BCN_MISS_OFFLOAD,
90cff990ceSMichal Kazior 	WMI_SERVICE_STA_PWRSAVE,
91cff990ceSMichal Kazior 	WMI_SERVICE_STA_ADVANCED_PWRSAVE,
92cff990ceSMichal Kazior 	WMI_SERVICE_AP_UAPSD,
93cff990ceSMichal Kazior 	WMI_SERVICE_AP_DFS,
94cff990ceSMichal Kazior 	WMI_SERVICE_11AC,
95cff990ceSMichal Kazior 	WMI_SERVICE_BLOCKACK,
96cff990ceSMichal Kazior 	WMI_SERVICE_PHYERR,
97cff990ceSMichal Kazior 	WMI_SERVICE_BCN_FILTER,
98cff990ceSMichal Kazior 	WMI_SERVICE_RTT,
99cff990ceSMichal Kazior 	WMI_SERVICE_RATECTRL,
100cff990ceSMichal Kazior 	WMI_SERVICE_WOW,
101cff990ceSMichal Kazior 	WMI_SERVICE_RATECTRL_CACHE,
102cff990ceSMichal Kazior 	WMI_SERVICE_IRAM_TIDS,
103cff990ceSMichal Kazior 	WMI_SERVICE_ARPNS_OFFLOAD,
104cff990ceSMichal Kazior 	WMI_SERVICE_NLO,
105cff990ceSMichal Kazior 	WMI_SERVICE_GTK_OFFLOAD,
106cff990ceSMichal Kazior 	WMI_SERVICE_SCAN_SCH,
107cff990ceSMichal Kazior 	WMI_SERVICE_CSA_OFFLOAD,
108cff990ceSMichal Kazior 	WMI_SERVICE_CHATTER,
109cff990ceSMichal Kazior 	WMI_SERVICE_COEX_FREQAVOID,
110cff990ceSMichal Kazior 	WMI_SERVICE_PACKET_POWER_SAVE,
111cff990ceSMichal Kazior 	WMI_SERVICE_FORCE_FW_HANG,
112cff990ceSMichal Kazior 	WMI_SERVICE_GPIO,
113cff990ceSMichal Kazior 	WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
114cff990ceSMichal Kazior 	WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
115cff990ceSMichal Kazior 	WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
116cff990ceSMichal Kazior 	WMI_SERVICE_STA_KEEP_ALIVE,
117cff990ceSMichal Kazior 	WMI_SERVICE_TX_ENCAP,
118cff990ceSMichal Kazior 	WMI_SERVICE_BURST,
119cff990ceSMichal Kazior 	WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT,
120cff990ceSMichal Kazior 	WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT,
121ca996ec5SMichal Kazior 	WMI_SERVICE_ROAM_SCAN_OFFLOAD,
122ca996ec5SMichal Kazior 	WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
123ca996ec5SMichal Kazior 	WMI_SERVICE_EARLY_RX,
124ca996ec5SMichal Kazior 	WMI_SERVICE_STA_SMPS,
125ca996ec5SMichal Kazior 	WMI_SERVICE_FWTEST,
126ca996ec5SMichal Kazior 	WMI_SERVICE_STA_WMMAC,
127ca996ec5SMichal Kazior 	WMI_SERVICE_TDLS,
128ca996ec5SMichal Kazior 	WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,
129ca996ec5SMichal Kazior 	WMI_SERVICE_ADAPTIVE_OCS,
130ca996ec5SMichal Kazior 	WMI_SERVICE_BA_SSN_SUPPORT,
131ca996ec5SMichal Kazior 	WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
132ca996ec5SMichal Kazior 	WMI_SERVICE_WLAN_HB,
133ca996ec5SMichal Kazior 	WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,
134ca996ec5SMichal Kazior 	WMI_SERVICE_BATCH_SCAN,
135ca996ec5SMichal Kazior 	WMI_SERVICE_QPOWER,
136ca996ec5SMichal Kazior 	WMI_SERVICE_PLMREQ,
137ca996ec5SMichal Kazior 	WMI_SERVICE_THERMAL_MGMT,
138ca996ec5SMichal Kazior 	WMI_SERVICE_RMC,
139ca996ec5SMichal Kazior 	WMI_SERVICE_MHF_OFFLOAD,
140ca996ec5SMichal Kazior 	WMI_SERVICE_COEX_SAR,
141ca996ec5SMichal Kazior 	WMI_SERVICE_BCN_TXRATE_OVERRIDE,
142ca996ec5SMichal Kazior 	WMI_SERVICE_NAN,
143ca996ec5SMichal Kazior 	WMI_SERVICE_L1SS_STAT,
144ca996ec5SMichal Kazior 	WMI_SERVICE_ESTIMATE_LINKSPEED,
145ca996ec5SMichal Kazior 	WMI_SERVICE_OBSS_SCAN,
146ca996ec5SMichal Kazior 	WMI_SERVICE_TDLS_OFFCHAN,
147ca996ec5SMichal Kazior 	WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
148ca996ec5SMichal Kazior 	WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,
149ca996ec5SMichal Kazior 	WMI_SERVICE_IBSS_PWRSAVE,
150ca996ec5SMichal Kazior 	WMI_SERVICE_LPASS,
151ca996ec5SMichal Kazior 	WMI_SERVICE_EXTSCAN,
152ca996ec5SMichal Kazior 	WMI_SERVICE_D0WOW,
153ca996ec5SMichal Kazior 	WMI_SERVICE_HSOFFLOAD,
154ca996ec5SMichal Kazior 	WMI_SERVICE_ROAM_HO_OFFLOAD,
155ca996ec5SMichal Kazior 	WMI_SERVICE_RX_FULL_REORDER,
156ca996ec5SMichal Kazior 	WMI_SERVICE_DHCP_OFFLOAD,
157ca996ec5SMichal Kazior 	WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,
158ca996ec5SMichal Kazior 	WMI_SERVICE_MDNS_OFFLOAD,
159ca996ec5SMichal Kazior 	WMI_SERVICE_SAP_AUTH_OFFLOAD,
16052c22a63SYanbo Li 	WMI_SERVICE_ATF,
161de0c789bSYanbo Li 	WMI_SERVICE_COEX_GPIO,
162840357ccSRaja Mani 	WMI_SERVICE_ENHANCED_PROXY_STA,
163840357ccSRaja Mani 	WMI_SERVICE_TT,
164840357ccSRaja Mani 	WMI_SERVICE_PEER_CACHING,
165840357ccSRaja Mani 	WMI_SERVICE_AUX_SPECTRAL_INTF,
166840357ccSRaja Mani 	WMI_SERVICE_AUX_CHAN_LOAD_INTF,
167840357ccSRaja Mani 	WMI_SERVICE_BSS_CHANNEL_INFO_64,
168e3c6225dSVasanthakumar Thiagarajan 	WMI_SERVICE_EXT_RES_CFG_SUPPORT,
1690b3d76e9SPeter Oh 	WMI_SERVICE_MESH_11S,
1700b3d76e9SPeter Oh 	WMI_SERVICE_MESH_NON_11S,
171de46c015SMohammed Shafi Shajakhan 	WMI_SERVICE_PEER_STATS,
172e70e9ba9SPeter Oh 	WMI_SERVICE_RESTRT_CHNL_SUPPORT,
17364ed5771STamizh chelvam 	WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
1747e247a9eSRaja Mani 	WMI_SERVICE_TX_MODE_PUSH_ONLY,
1757e247a9eSRaja Mani 	WMI_SERVICE_TX_MODE_PUSH_PULL,
1767e247a9eSRaja Mani 	WMI_SERVICE_TX_MODE_DYNAMIC,
177add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_VDEV_RX_FILTER,
178add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_BTCOEX,
179add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_CHECK_CAL_VERSION,
180add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_DBGLOG_WARN2,
181add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_BTCOEX_DUTY_CYCLE,
182add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_4_WIRE_COEX_SUPPORT,
183add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_EXTENDED_NSS_SUPPORT,
184add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_PROG_GPIO_BAND_SELECT,
185add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_SMART_LOGGING_SUPPORT,
186add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
187add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
188229329ffSRakesh Pillai 	WMI_SERVICE_MGMT_TX_WMI,
18914d65775SBalaji Pothunoori 	WMI_SERVICE_TDLS_WIDER_BANDWIDTH,
190bc64d052SMaharaja Kennadyrajan 	WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
191bc64d052SMaharaja Kennadyrajan 	WMI_SERVICE_HOST_DFS_CHECK_SUPPORT,
192bc64d052SMaharaja Kennadyrajan 	WMI_SERVICE_TPC_STATS_FINAL,
193235b9c42SVenkateswara Naralasetty 	WMI_SERVICE_RESET_CHIP,
194cea19a6cSCarl Huang 	WMI_SERVICE_SPOOF_MAC_SUPPORT,
195c7fd8d23SBalaji Pothunoori 	WMI_SERVICE_TX_DATA_ACK_RSSI,
1964600563fSMaharaja Kennadyrajan 	WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
19768c295f2SSathishkumar Muruganandam 	WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
19884758d4dSBhagavathi Perumal S 	WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT,
19953884577SRakesh Pillai 	WMI_SERVICE_THERM_THROT,
200059104bfSPradeep Kumar Chitrapu 	WMI_SERVICE_RTT_RESPONDER_ROLE,
2014920ce3bSManikanta Pubbisetty 	WMI_SERVICE_PER_PACKET_SW_ENCRYPT,
202bb31b7cbSManikanta Pubbisetty 	WMI_SERVICE_REPORT_AIRTIME,
203c4f8c836SMichal Kazior 
20495cccf4dSKalle Valo 	/* Remember to add the new value to wmi_service_name()! */
20595cccf4dSKalle Valo 
206c4f8c836SMichal Kazior 	/* keep last */
207c4f8c836SMichal Kazior 	WMI_SERVICE_MAX,
208cff990ceSMichal Kazior };
2095e3dd157SKalle Valo 
210cff990ceSMichal Kazior enum wmi_10x_service {
211cff990ceSMichal Kazior 	WMI_10X_SERVICE_BEACON_OFFLOAD = 0,
212cff990ceSMichal Kazior 	WMI_10X_SERVICE_SCAN_OFFLOAD,
213cff990ceSMichal Kazior 	WMI_10X_SERVICE_ROAM_OFFLOAD,
214cff990ceSMichal Kazior 	WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
215cff990ceSMichal Kazior 	WMI_10X_SERVICE_STA_PWRSAVE,
216cff990ceSMichal Kazior 	WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
217cff990ceSMichal Kazior 	WMI_10X_SERVICE_AP_UAPSD,
218cff990ceSMichal Kazior 	WMI_10X_SERVICE_AP_DFS,
219cff990ceSMichal Kazior 	WMI_10X_SERVICE_11AC,
220cff990ceSMichal Kazior 	WMI_10X_SERVICE_BLOCKACK,
221cff990ceSMichal Kazior 	WMI_10X_SERVICE_PHYERR,
222cff990ceSMichal Kazior 	WMI_10X_SERVICE_BCN_FILTER,
223cff990ceSMichal Kazior 	WMI_10X_SERVICE_RTT,
224cff990ceSMichal Kazior 	WMI_10X_SERVICE_RATECTRL,
225cff990ceSMichal Kazior 	WMI_10X_SERVICE_WOW,
226cff990ceSMichal Kazior 	WMI_10X_SERVICE_RATECTRL_CACHE,
227cff990ceSMichal Kazior 	WMI_10X_SERVICE_IRAM_TIDS,
228cff990ceSMichal Kazior 	WMI_10X_SERVICE_BURST,
229cff990ceSMichal Kazior 
230cff990ceSMichal Kazior 	/* introduced in 10.2 */
231cff990ceSMichal Kazior 	WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
232cff990ceSMichal Kazior 	WMI_10X_SERVICE_FORCE_FW_HANG,
233cff990ceSMichal Kazior 	WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
23452c22a63SYanbo Li 	WMI_10X_SERVICE_ATF,
235de0c789bSYanbo Li 	WMI_10X_SERVICE_COEX_GPIO,
23620fa2f7fSPeter Oh 	WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
23720fa2f7fSPeter Oh 	WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
23820fa2f7fSPeter Oh 	WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
23920fa2f7fSPeter Oh 	WMI_10X_SERVICE_MESH,
24020fa2f7fSPeter Oh 	WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
241de46c015SMohammed Shafi Shajakhan 	WMI_10X_SERVICE_PEER_STATS,
242235b9c42SVenkateswara Naralasetty 	WMI_10X_SERVICE_RESET_CHIP,
243235b9c42SVenkateswara Naralasetty 	WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
24484758d4dSBhagavathi Perumal S 	WMI_10X_SERVICE_VDEV_BCN_RATE_CONTROL,
24584758d4dSBhagavathi Perumal S 	WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT,
24684758d4dSBhagavathi Perumal S 	WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT,
247cff990ceSMichal Kazior };
248cff990ceSMichal Kazior 
249cff990ceSMichal Kazior enum wmi_main_service {
250cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0,
251cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_SCAN_OFFLOAD,
252cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_ROAM_OFFLOAD,
253cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
254cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_PWRSAVE,
255cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
256cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_AP_UAPSD,
257cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_AP_DFS,
258cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_11AC,
259cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_BLOCKACK,
260cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_PHYERR,
261cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_BCN_FILTER,
262cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_RTT,
263cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_RATECTRL,
264cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_WOW,
265cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_RATECTRL_CACHE,
266cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_IRAM_TIDS,
267cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
268cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_NLO,
269cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_GTK_OFFLOAD,
270cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_SCAN_SCH,
271cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_CSA_OFFLOAD,
272cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_CHATTER,
273cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_COEX_FREQAVOID,
274cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
275cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_FORCE_FW_HANG,
276cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_GPIO,
277cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
278cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
279cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
280cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
281cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_TX_ENCAP,
2825e3dd157SKalle Valo };
2835e3dd157SKalle Valo 
284840357ccSRaja Mani enum wmi_10_4_service {
285840357ccSRaja Mani 	WMI_10_4_SERVICE_BEACON_OFFLOAD = 0,
286840357ccSRaja Mani 	WMI_10_4_SERVICE_SCAN_OFFLOAD,
287840357ccSRaja Mani 	WMI_10_4_SERVICE_ROAM_OFFLOAD,
288840357ccSRaja Mani 	WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
289840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_PWRSAVE,
290840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
291840357ccSRaja Mani 	WMI_10_4_SERVICE_AP_UAPSD,
292840357ccSRaja Mani 	WMI_10_4_SERVICE_AP_DFS,
293840357ccSRaja Mani 	WMI_10_4_SERVICE_11AC,
294840357ccSRaja Mani 	WMI_10_4_SERVICE_BLOCKACK,
295840357ccSRaja Mani 	WMI_10_4_SERVICE_PHYERR,
296840357ccSRaja Mani 	WMI_10_4_SERVICE_BCN_FILTER,
297840357ccSRaja Mani 	WMI_10_4_SERVICE_RTT,
298840357ccSRaja Mani 	WMI_10_4_SERVICE_RATECTRL,
299840357ccSRaja Mani 	WMI_10_4_SERVICE_WOW,
300840357ccSRaja Mani 	WMI_10_4_SERVICE_RATECTRL_CACHE,
301840357ccSRaja Mani 	WMI_10_4_SERVICE_IRAM_TIDS,
302840357ccSRaja Mani 	WMI_10_4_SERVICE_BURST,
303840357ccSRaja Mani 	WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
304840357ccSRaja Mani 	WMI_10_4_SERVICE_GTK_OFFLOAD,
305840357ccSRaja Mani 	WMI_10_4_SERVICE_SCAN_SCH,
306840357ccSRaja Mani 	WMI_10_4_SERVICE_CSA_OFFLOAD,
307840357ccSRaja Mani 	WMI_10_4_SERVICE_CHATTER,
308840357ccSRaja Mani 	WMI_10_4_SERVICE_COEX_FREQAVOID,
309840357ccSRaja Mani 	WMI_10_4_SERVICE_PACKET_POWER_SAVE,
310840357ccSRaja Mani 	WMI_10_4_SERVICE_FORCE_FW_HANG,
311840357ccSRaja Mani 	WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
312840357ccSRaja Mani 	WMI_10_4_SERVICE_GPIO,
313840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
314840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
315840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_KEEP_ALIVE,
316840357ccSRaja Mani 	WMI_10_4_SERVICE_TX_ENCAP,
317840357ccSRaja Mani 	WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
318840357ccSRaja Mani 	WMI_10_4_SERVICE_EARLY_RX,
319840357ccSRaja Mani 	WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
320840357ccSRaja Mani 	WMI_10_4_SERVICE_TT,
321840357ccSRaja Mani 	WMI_10_4_SERVICE_ATF,
322840357ccSRaja Mani 	WMI_10_4_SERVICE_PEER_CACHING,
323840357ccSRaja Mani 	WMI_10_4_SERVICE_COEX_GPIO,
324840357ccSRaja Mani 	WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
325840357ccSRaja Mani 	WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
326840357ccSRaja Mani 	WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
327e3c6225dSVasanthakumar Thiagarajan 	WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
3280b3d76e9SPeter Oh 	WMI_10_4_SERVICE_MESH_NON_11S,
329e70e9ba9SPeter Oh 	WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
330e70e9ba9SPeter Oh 	WMI_10_4_SERVICE_PEER_STATS,
331e70e9ba9SPeter Oh 	WMI_10_4_SERVICE_MESH_11S,
33264ed5771STamizh chelvam 	WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
3337e247a9eSRaja Mani 	WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
3347e247a9eSRaja Mani 	WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
3357e247a9eSRaja Mani 	WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
336add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_VDEV_RX_FILTER,
337add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_BTCOEX,
338add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_CHECK_CAL_VERSION,
339add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_DBGLOG_WARN2,
340add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
341add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
342add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
343add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
344add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
345add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS,
346add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_OFFCHAN,
347add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
348add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
349add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
350add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
35114d65775SBalaji Pothunoori 	WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
352bc64d052SMaharaja Kennadyrajan 	WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
353bc64d052SMaharaja Kennadyrajan 	WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
354bc64d052SMaharaja Kennadyrajan 	WMI_10_4_SERVICE_TPC_STATS_FINAL,
355c7fd8d23SBalaji Pothunoori 	WMI_10_4_SERVICE_CFR_CAPTURE_SUPPORT,
356c7fd8d23SBalaji Pothunoori 	WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
3574600563fSMaharaja Kennadyrajan 	WMI_10_4_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_LEGACY,
3584600563fSMaharaja Kennadyrajan 	WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT,
3594600563fSMaharaja Kennadyrajan 	WMI_10_4_SERVICE_PEER_TID_CONFIGS_SUPPORT,
3604600563fSMaharaja Kennadyrajan 	WMI_10_4_SERVICE_VDEV_BCN_RATE_CONTROL,
3614600563fSMaharaja Kennadyrajan 	WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
36268c295f2SSathishkumar Muruganandam 	WMI_10_4_SERVICE_HTT_ASSERT_TRIGGER_SUPPORT,
36368c295f2SSathishkumar Muruganandam 	WMI_10_4_SERVICE_VDEV_FILTER_NEIGHBOR_RX_PACKETS,
36468c295f2SSathishkumar Muruganandam 	WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
365059104bfSPradeep Kumar Chitrapu 	WMI_10_4_SERVICE_PEER_CHWIDTH_CHANGE,
366059104bfSPradeep Kumar Chitrapu 	WMI_10_4_SERVICE_RX_FILTER_OUT_COUNT,
367059104bfSPradeep Kumar Chitrapu 	WMI_10_4_SERVICE_RTT_RESPONDER_ROLE,
368059104bfSPradeep Kumar Chitrapu 	WMI_10_4_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
369bb31b7cbSManikanta Pubbisetty 	WMI_10_4_SERVICE_REPORT_AIRTIME,
370840357ccSRaja Mani };
371840357ccSRaja Mani 
37295cccf4dSKalle Valo static inline char *wmi_service_name(enum wmi_service service_id)
3735e3dd157SKalle Valo {
374cff990ceSMichal Kazior #define SVCSTR(x) case x: return #x
375cff990ceSMichal Kazior 
3765e3dd157SKalle Valo 	switch (service_id) {
377cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BEACON_OFFLOAD);
378cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_SCAN_OFFLOAD);
379cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_ROAM_OFFLOAD);
380cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD);
381cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_PWRSAVE);
382cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE);
383cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_AP_UAPSD);
384cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_AP_DFS);
385cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_11AC);
386cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BLOCKACK);
387cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_PHYERR);
388cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BCN_FILTER);
389cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_RTT);
390cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_RATECTRL);
391cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_WOW);
392cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_RATECTRL_CACHE);
393cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_IRAM_TIDS);
394cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD);
395cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_NLO);
396cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_GTK_OFFLOAD);
397cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_SCAN_SCH);
398cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_CSA_OFFLOAD);
399cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_CHATTER);
400cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_COEX_FREQAVOID);
401cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE);
402cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_FORCE_FW_HANG);
403cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_GPIO);
404cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM);
405cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG);
406cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG);
407cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE);
408cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_TX_ENCAP);
409cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BURST);
410cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT);
411cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT);
412ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD);
413ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC);
414ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_EARLY_RX);
415ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_STA_SMPS);
416ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_FWTEST);
417ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_STA_WMMAC);
418ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_TDLS);
419ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE);
420ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_ADAPTIVE_OCS);
421ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT);
422ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE);
423ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_WLAN_HB);
424ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT);
425ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_BATCH_SCAN);
426ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_QPOWER);
427ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_PLMREQ);
428ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_THERMAL_MGMT);
429ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_RMC);
430ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_MHF_OFFLOAD);
431ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_COEX_SAR);
432ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE);
433ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_NAN);
434ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_L1SS_STAT);
435ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED);
436ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_OBSS_SCAN);
437ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_TDLS_OFFCHAN);
438ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA);
439ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA);
440ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_IBSS_PWRSAVE);
441ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_LPASS);
442ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_EXTSCAN);
443ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_D0WOW);
444ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_HSOFFLOAD);
445ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD);
446ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_RX_FULL_REORDER);
447ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_DHCP_OFFLOAD);
448ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT);
449ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_MDNS_OFFLOAD);
450ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD);
45152c22a63SYanbo Li 	SVCSTR(WMI_SERVICE_ATF);
452de0c789bSYanbo Li 	SVCSTR(WMI_SERVICE_COEX_GPIO);
453840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA);
454840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_TT);
455840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_PEER_CACHING);
456840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF);
457840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF);
458840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64);
459e3c6225dSVasanthakumar Thiagarajan 	SVCSTR(WMI_SERVICE_EXT_RES_CFG_SUPPORT);
4600b3d76e9SPeter Oh 	SVCSTR(WMI_SERVICE_MESH_11S);
4610b3d76e9SPeter Oh 	SVCSTR(WMI_SERVICE_MESH_NON_11S);
462de46c015SMohammed Shafi Shajakhan 	SVCSTR(WMI_SERVICE_PEER_STATS);
463e70e9ba9SPeter Oh 	SVCSTR(WMI_SERVICE_RESTRT_CHNL_SUPPORT);
46464ed5771STamizh chelvam 	SVCSTR(WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT);
4657e247a9eSRaja Mani 	SVCSTR(WMI_SERVICE_TX_MODE_PUSH_ONLY);
4667e247a9eSRaja Mani 	SVCSTR(WMI_SERVICE_TX_MODE_PUSH_PULL);
4677e247a9eSRaja Mani 	SVCSTR(WMI_SERVICE_TX_MODE_DYNAMIC);
468add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_VDEV_RX_FILTER);
4692321dd5dSKalle Valo 	SVCSTR(WMI_SERVICE_BTCOEX);
470add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_CHECK_CAL_VERSION);
471add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_DBGLOG_WARN2);
472add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_BTCOEX_DUTY_CYCLE);
473add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_4_WIRE_COEX_SUPPORT);
474add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_EXTENDED_NSS_SUPPORT);
475add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_PROG_GPIO_BAND_SELECT);
476add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_SMART_LOGGING_SUPPORT);
477add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE);
478add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY);
4792321dd5dSKalle Valo 	SVCSTR(WMI_SERVICE_MGMT_TX_WMI);
48014d65775SBalaji Pothunoori 	SVCSTR(WMI_SERVICE_TDLS_WIDER_BANDWIDTH);
481bc64d052SMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS);
482bc64d052SMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT);
483bc64d052SMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_TPC_STATS_FINAL);
484db251d7dSMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_RESET_CHIP);
4852321dd5dSKalle Valo 	SVCSTR(WMI_SERVICE_SPOOF_MAC_SUPPORT);
486c7fd8d23SBalaji Pothunoori 	SVCSTR(WMI_SERVICE_TX_DATA_ACK_RSSI);
4874600563fSMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT);
4882321dd5dSKalle Valo 	SVCSTR(WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT);
4892321dd5dSKalle Valo 	SVCSTR(WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT);
4902321dd5dSKalle Valo 	SVCSTR(WMI_SERVICE_THERM_THROT);
491059104bfSPradeep Kumar Chitrapu 	SVCSTR(WMI_SERVICE_RTT_RESPONDER_ROLE);
4924920ce3bSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_PER_PACKET_SW_ENCRYPT);
493bb31b7cbSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_REPORT_AIRTIME);
494059104bfSPradeep Kumar Chitrapu 
49595cccf4dSKalle Valo 	case WMI_SERVICE_MAX:
496cff990ceSMichal Kazior 		return NULL;
4975e3dd157SKalle Valo 	}
4985e3dd157SKalle Valo 
499cff990ceSMichal Kazior #undef SVCSTR
50095cccf4dSKalle Valo 
50195cccf4dSKalle Valo 	return NULL;
502cff990ceSMichal Kazior }
503cff990ceSMichal Kazior 
50437b9f933SMichal Kazior #define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
50537b9f933SMichal Kazior 	((svc_id) < (len) && \
50637b9f933SMichal Kazior 	 __le32_to_cpu((wmi_svc_bmap)[(svc_id) / (sizeof(u32))]) & \
507cff990ceSMichal Kazior 	 BIT((svc_id) % (sizeof(u32))))
508cff990ceSMichal Kazior 
509810fe818SManikanta Pubbisetty /* This extension is required to accommodate new services, current limit
510810fe818SManikanta Pubbisetty  * for wmi_services is 64 as target is using only 4-bits of each 32-bit
511810fe818SManikanta Pubbisetty  * wmi_service word. Extending this to make use of remaining unused bits
512810fe818SManikanta Pubbisetty  * for new services.
513810fe818SManikanta Pubbisetty  */
514810fe818SManikanta Pubbisetty #define WMI_EXT_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
515810fe818SManikanta Pubbisetty 	((svc_id) >= (len) && \
516810fe818SManikanta Pubbisetty 	__le32_to_cpu((wmi_svc_bmap)[((svc_id) - (len)) / 28]) & \
517810fe818SManikanta Pubbisetty 	BIT(((((svc_id) - (len)) % 28) & 0x1f) + 4))
518810fe818SManikanta Pubbisetty 
51937b9f933SMichal Kazior #define SVCMAP(x, y, len) \
520cff990ceSMichal Kazior 	do { \
521810fe818SManikanta Pubbisetty 		if ((WMI_SERVICE_IS_ENABLED((in), (x), (len))) || \
522810fe818SManikanta Pubbisetty 		    (WMI_EXT_SERVICE_IS_ENABLED((in), (x), (len)))) \
523cff990ceSMichal Kazior 			__set_bit(y, out); \
524cff990ceSMichal Kazior 	} while (0)
525cff990ceSMichal Kazior 
52637b9f933SMichal Kazior static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out,
52737b9f933SMichal Kazior 				   size_t len)
528cff990ceSMichal Kazior {
529cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD,
53037b9f933SMichal Kazior 	       WMI_SERVICE_BEACON_OFFLOAD, len);
531cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD,
53237b9f933SMichal Kazior 	       WMI_SERVICE_SCAN_OFFLOAD, len);
533cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD,
53437b9f933SMichal Kazior 	       WMI_SERVICE_ROAM_OFFLOAD, len);
535cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
53637b9f933SMichal Kazior 	       WMI_SERVICE_BCN_MISS_OFFLOAD, len);
537cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE,
53837b9f933SMichal Kazior 	       WMI_SERVICE_STA_PWRSAVE, len);
539cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
54037b9f933SMichal Kazior 	       WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
541cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_AP_UAPSD,
54237b9f933SMichal Kazior 	       WMI_SERVICE_AP_UAPSD, len);
543cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_AP_DFS,
54437b9f933SMichal Kazior 	       WMI_SERVICE_AP_DFS, len);
545cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_11AC,
54637b9f933SMichal Kazior 	       WMI_SERVICE_11AC, len);
547cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BLOCKACK,
54837b9f933SMichal Kazior 	       WMI_SERVICE_BLOCKACK, len);
549cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_PHYERR,
55037b9f933SMichal Kazior 	       WMI_SERVICE_PHYERR, len);
551cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BCN_FILTER,
55237b9f933SMichal Kazior 	       WMI_SERVICE_BCN_FILTER, len);
553cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_RTT,
55437b9f933SMichal Kazior 	       WMI_SERVICE_RTT, len);
555cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_RATECTRL,
55637b9f933SMichal Kazior 	       WMI_SERVICE_RATECTRL, len);
557cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_WOW,
55837b9f933SMichal Kazior 	       WMI_SERVICE_WOW, len);
559cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE,
56037b9f933SMichal Kazior 	       WMI_SERVICE_RATECTRL_CACHE, len);
561cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_IRAM_TIDS,
56237b9f933SMichal Kazior 	       WMI_SERVICE_IRAM_TIDS, len);
563cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BURST,
56437b9f933SMichal Kazior 	       WMI_SERVICE_BURST, len);
565cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
56637b9f933SMichal Kazior 	       WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
567cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG,
56837b9f933SMichal Kazior 	       WMI_SERVICE_FORCE_FW_HANG, len);
569cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
57037b9f933SMichal Kazior 	       WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
57152c22a63SYanbo Li 	SVCMAP(WMI_10X_SERVICE_ATF,
57252c22a63SYanbo Li 	       WMI_SERVICE_ATF, len);
573de0c789bSYanbo Li 	SVCMAP(WMI_10X_SERVICE_COEX_GPIO,
574de0c789bSYanbo Li 	       WMI_SERVICE_COEX_GPIO, len);
57520fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
57620fa2f7fSPeter Oh 	       WMI_SERVICE_AUX_SPECTRAL_INTF, len);
57720fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
57820fa2f7fSPeter Oh 	       WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
57920fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
58020fa2f7fSPeter Oh 	       WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
58120fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_MESH,
5820b3d76e9SPeter Oh 	       WMI_SERVICE_MESH_11S, len);
58320fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
58420fa2f7fSPeter Oh 	       WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
585de46c015SMohammed Shafi Shajakhan 	SVCMAP(WMI_10X_SERVICE_PEER_STATS,
586de46c015SMohammed Shafi Shajakhan 	       WMI_SERVICE_PEER_STATS, len);
587235b9c42SVenkateswara Naralasetty 	SVCMAP(WMI_10X_SERVICE_RESET_CHIP,
588235b9c42SVenkateswara Naralasetty 	       WMI_SERVICE_RESET_CHIP, len);
589235b9c42SVenkateswara Naralasetty 	SVCMAP(WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
590235b9c42SVenkateswara Naralasetty 	       WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
59184758d4dSBhagavathi Perumal S 	SVCMAP(WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT,
59284758d4dSBhagavathi Perumal S 	       WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT, len);
5934920ce3bSManikanta Pubbisetty 	SVCMAP(WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT,
5944920ce3bSManikanta Pubbisetty 	       WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len);
595cff990ceSMichal Kazior }
596cff990ceSMichal Kazior 
59737b9f933SMichal Kazior static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out,
59837b9f933SMichal Kazior 				    size_t len)
599cff990ceSMichal Kazior {
600cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD,
60137b9f933SMichal Kazior 	       WMI_SERVICE_BEACON_OFFLOAD, len);
602cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD,
60337b9f933SMichal Kazior 	       WMI_SERVICE_SCAN_OFFLOAD, len);
604cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD,
60537b9f933SMichal Kazior 	       WMI_SERVICE_ROAM_OFFLOAD, len);
606cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
60737b9f933SMichal Kazior 	       WMI_SERVICE_BCN_MISS_OFFLOAD, len);
608cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE,
60937b9f933SMichal Kazior 	       WMI_SERVICE_STA_PWRSAVE, len);
610cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
61137b9f933SMichal Kazior 	       WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
612cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD,
61337b9f933SMichal Kazior 	       WMI_SERVICE_AP_UAPSD, len);
614cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_AP_DFS,
61537b9f933SMichal Kazior 	       WMI_SERVICE_AP_DFS, len);
616cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_11AC,
61737b9f933SMichal Kazior 	       WMI_SERVICE_11AC, len);
618cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_BLOCKACK,
61937b9f933SMichal Kazior 	       WMI_SERVICE_BLOCKACK, len);
620cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_PHYERR,
62137b9f933SMichal Kazior 	       WMI_SERVICE_PHYERR, len);
622cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER,
62337b9f933SMichal Kazior 	       WMI_SERVICE_BCN_FILTER, len);
624cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_RTT,
62537b9f933SMichal Kazior 	       WMI_SERVICE_RTT, len);
626cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_RATECTRL,
62737b9f933SMichal Kazior 	       WMI_SERVICE_RATECTRL, len);
628cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_WOW,
62937b9f933SMichal Kazior 	       WMI_SERVICE_WOW, len);
630cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE,
63137b9f933SMichal Kazior 	       WMI_SERVICE_RATECTRL_CACHE, len);
632cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS,
63337b9f933SMichal Kazior 	       WMI_SERVICE_IRAM_TIDS, len);
634cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
63537b9f933SMichal Kazior 	       WMI_SERVICE_ARPNS_OFFLOAD, len);
636cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_NLO,
63737b9f933SMichal Kazior 	       WMI_SERVICE_NLO, len);
638cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD,
63937b9f933SMichal Kazior 	       WMI_SERVICE_GTK_OFFLOAD, len);
640cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH,
64137b9f933SMichal Kazior 	       WMI_SERVICE_SCAN_SCH, len);
642cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD,
64337b9f933SMichal Kazior 	       WMI_SERVICE_CSA_OFFLOAD, len);
644cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_CHATTER,
64537b9f933SMichal Kazior 	       WMI_SERVICE_CHATTER, len);
646cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID,
64737b9f933SMichal Kazior 	       WMI_SERVICE_COEX_FREQAVOID, len);
648cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
64937b9f933SMichal Kazior 	       WMI_SERVICE_PACKET_POWER_SAVE, len);
650cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG,
65137b9f933SMichal Kazior 	       WMI_SERVICE_FORCE_FW_HANG, len);
652cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_GPIO,
65337b9f933SMichal Kazior 	       WMI_SERVICE_GPIO, len);
654cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
65537b9f933SMichal Kazior 	       WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len);
656cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
65737b9f933SMichal Kazior 	       WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
658cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
65937b9f933SMichal Kazior 	       WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
660cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
66137b9f933SMichal Kazior 	       WMI_SERVICE_STA_KEEP_ALIVE, len);
662cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP,
66337b9f933SMichal Kazior 	       WMI_SERVICE_TX_ENCAP, len);
664cff990ceSMichal Kazior }
665cff990ceSMichal Kazior 
666840357ccSRaja Mani static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out,
667840357ccSRaja Mani 				    size_t len)
668840357ccSRaja Mani {
669840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD,
670840357ccSRaja Mani 	       WMI_SERVICE_BEACON_OFFLOAD, len);
671840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD,
672840357ccSRaja Mani 	       WMI_SERVICE_SCAN_OFFLOAD, len);
673840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD,
674840357ccSRaja Mani 	       WMI_SERVICE_ROAM_OFFLOAD, len);
675840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
676840357ccSRaja Mani 	       WMI_SERVICE_BCN_MISS_OFFLOAD, len);
677840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE,
678840357ccSRaja Mani 	       WMI_SERVICE_STA_PWRSAVE, len);
679840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
680840357ccSRaja Mani 	       WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
681840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AP_UAPSD,
682840357ccSRaja Mani 	       WMI_SERVICE_AP_UAPSD, len);
683840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AP_DFS,
684840357ccSRaja Mani 	       WMI_SERVICE_AP_DFS, len);
685840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_11AC,
686840357ccSRaja Mani 	       WMI_SERVICE_11AC, len);
687840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BLOCKACK,
688840357ccSRaja Mani 	       WMI_SERVICE_BLOCKACK, len);
689840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_PHYERR,
690840357ccSRaja Mani 	       WMI_SERVICE_PHYERR, len);
691840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BCN_FILTER,
692840357ccSRaja Mani 	       WMI_SERVICE_BCN_FILTER, len);
693840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_RTT,
694840357ccSRaja Mani 	       WMI_SERVICE_RTT, len);
695840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_RATECTRL,
696840357ccSRaja Mani 	       WMI_SERVICE_RATECTRL, len);
697840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_WOW,
698840357ccSRaja Mani 	       WMI_SERVICE_WOW, len);
699840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE,
700840357ccSRaja Mani 	       WMI_SERVICE_RATECTRL_CACHE, len);
701840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS,
702840357ccSRaja Mani 	       WMI_SERVICE_IRAM_TIDS, len);
703840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BURST,
704840357ccSRaja Mani 	       WMI_SERVICE_BURST, len);
705840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
706840357ccSRaja Mani 	       WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
707840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD,
708840357ccSRaja Mani 	       WMI_SERVICE_GTK_OFFLOAD, len);
709840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_SCAN_SCH,
710840357ccSRaja Mani 	       WMI_SERVICE_SCAN_SCH, len);
711840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD,
712840357ccSRaja Mani 	       WMI_SERVICE_CSA_OFFLOAD, len);
713840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_CHATTER,
714840357ccSRaja Mani 	       WMI_SERVICE_CHATTER, len);
715840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID,
716840357ccSRaja Mani 	       WMI_SERVICE_COEX_FREQAVOID, len);
717840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE,
718840357ccSRaja Mani 	       WMI_SERVICE_PACKET_POWER_SAVE, len);
719840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG,
720840357ccSRaja Mani 	       WMI_SERVICE_FORCE_FW_HANG, len);
721840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
722840357ccSRaja Mani 	       WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
723840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_GPIO,
724840357ccSRaja Mani 	       WMI_SERVICE_GPIO, len);
725840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
726840357ccSRaja Mani 	       WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
727840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
728840357ccSRaja Mani 	       WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
729840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE,
730840357ccSRaja Mani 	       WMI_SERVICE_STA_KEEP_ALIVE, len);
731840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TX_ENCAP,
732840357ccSRaja Mani 	       WMI_SERVICE_TX_ENCAP, len);
733840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
734840357ccSRaja Mani 	       WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len);
735840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_EARLY_RX,
736840357ccSRaja Mani 	       WMI_SERVICE_EARLY_RX, len);
737840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
738840357ccSRaja Mani 	       WMI_SERVICE_ENHANCED_PROXY_STA, len);
739840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TT,
740840357ccSRaja Mani 	       WMI_SERVICE_TT, len);
741840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_ATF,
742840357ccSRaja Mani 	       WMI_SERVICE_ATF, len);
743840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_PEER_CACHING,
744840357ccSRaja Mani 	       WMI_SERVICE_PEER_CACHING, len);
745840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_COEX_GPIO,
746840357ccSRaja Mani 	       WMI_SERVICE_COEX_GPIO, len);
747840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
748840357ccSRaja Mani 	       WMI_SERVICE_AUX_SPECTRAL_INTF, len);
749840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
750840357ccSRaja Mani 	       WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
751840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
752840357ccSRaja Mani 	       WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
753e3c6225dSVasanthakumar Thiagarajan 	SVCMAP(WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
754e3c6225dSVasanthakumar Thiagarajan 	       WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
7550b3d76e9SPeter Oh 	SVCMAP(WMI_10_4_SERVICE_MESH_NON_11S,
7560b3d76e9SPeter Oh 	       WMI_SERVICE_MESH_NON_11S, len);
757e70e9ba9SPeter Oh 	SVCMAP(WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
758e70e9ba9SPeter Oh 	       WMI_SERVICE_RESTRT_CHNL_SUPPORT, len);
759e70e9ba9SPeter Oh 	SVCMAP(WMI_10_4_SERVICE_PEER_STATS,
760e70e9ba9SPeter Oh 	       WMI_SERVICE_PEER_STATS, len);
761e70e9ba9SPeter Oh 	SVCMAP(WMI_10_4_SERVICE_MESH_11S,
762e70e9ba9SPeter Oh 	       WMI_SERVICE_MESH_11S, len);
76364ed5771STamizh chelvam 	SVCMAP(WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
76464ed5771STamizh chelvam 	       WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, len);
7657e247a9eSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
7667e247a9eSRaja Mani 	       WMI_SERVICE_TX_MODE_PUSH_ONLY, len);
7677e247a9eSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
7687e247a9eSRaja Mani 	       WMI_SERVICE_TX_MODE_PUSH_PULL, len);
7697e247a9eSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
7707e247a9eSRaja Mani 	       WMI_SERVICE_TX_MODE_DYNAMIC, len);
771add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_VDEV_RX_FILTER,
772add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_VDEV_RX_FILTER, len);
773add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_BTCOEX,
774add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_BTCOEX, len);
775add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_CHECK_CAL_VERSION,
776add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_CHECK_CAL_VERSION, len);
777add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_DBGLOG_WARN2,
778add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_DBGLOG_WARN2, len);
779add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
780add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_BTCOEX_DUTY_CYCLE, len);
781add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
782add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_4_WIRE_COEX_SUPPORT, len);
783add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
784add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_EXTENDED_NSS_SUPPORT, len);
785add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
786add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_PROG_GPIO_BAND_SELECT, len);
787add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
788add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_SMART_LOGGING_SUPPORT, len);
789add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS,
790add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS, len);
791add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_OFFCHAN,
792add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_OFFCHAN, len);
793add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
794add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, len);
795add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
796add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, len);
797add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
798add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE, len);
799add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
800add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, len);
80114d65775SBalaji Pothunoori 	SVCMAP(WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
80214d65775SBalaji Pothunoori 	       WMI_SERVICE_TDLS_WIDER_BANDWIDTH, len);
803bc64d052SMaharaja Kennadyrajan 	SVCMAP(WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
804bc64d052SMaharaja Kennadyrajan 	       WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
805bc64d052SMaharaja Kennadyrajan 	SVCMAP(WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
806bc64d052SMaharaja Kennadyrajan 	       WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, len);
807bc64d052SMaharaja Kennadyrajan 	SVCMAP(WMI_10_4_SERVICE_TPC_STATS_FINAL,
808bc64d052SMaharaja Kennadyrajan 	       WMI_SERVICE_TPC_STATS_FINAL, len);
809c7fd8d23SBalaji Pothunoori 	SVCMAP(WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
810c7fd8d23SBalaji Pothunoori 	       WMI_SERVICE_TX_DATA_ACK_RSSI, len);
8114600563fSMaharaja Kennadyrajan 	SVCMAP(WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
8124600563fSMaharaja Kennadyrajan 	       WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT, len);
81368c295f2SSathishkumar Muruganandam 	SVCMAP(WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
81468c295f2SSathishkumar Muruganandam 	       WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT, len);
815059104bfSPradeep Kumar Chitrapu 	SVCMAP(WMI_10_4_SERVICE_RTT_RESPONDER_ROLE,
816059104bfSPradeep Kumar Chitrapu 	       WMI_SERVICE_RTT_RESPONDER_ROLE, len);
8174920ce3bSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT,
8184920ce3bSManikanta Pubbisetty 	       WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len);
819bb31b7cbSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_REPORT_AIRTIME,
820bb31b7cbSManikanta Pubbisetty 	       WMI_SERVICE_REPORT_AIRTIME, len);
821840357ccSRaja Mani }
822840357ccSRaja Mani 
823cff990ceSMichal Kazior #undef SVCMAP
8245e3dd157SKalle Valo 
8255e3dd157SKalle Valo /* 2 word representation of MAC addr */
8265e3dd157SKalle Valo struct wmi_mac_addr {
8275e3dd157SKalle Valo 	union {
8285e3dd157SKalle Valo 		u8 addr[6];
8295e3dd157SKalle Valo 		struct {
8305e3dd157SKalle Valo 			u32 word0;
8315e3dd157SKalle Valo 			u32 word1;
8325e3dd157SKalle Valo 		} __packed;
8335e3dd157SKalle Valo 	} __packed;
8345e3dd157SKalle Valo } __packed;
8355e3dd157SKalle Valo 
836ce42870eSBartosz Markowski struct wmi_cmd_map {
837ce42870eSBartosz Markowski 	u32 init_cmdid;
838ce42870eSBartosz Markowski 	u32 start_scan_cmdid;
839ce42870eSBartosz Markowski 	u32 stop_scan_cmdid;
840ce42870eSBartosz Markowski 	u32 scan_chan_list_cmdid;
841ce42870eSBartosz Markowski 	u32 scan_sch_prio_tbl_cmdid;
84260e1d0fbSCarl Huang 	u32 scan_prob_req_oui_cmdid;
843ce42870eSBartosz Markowski 	u32 pdev_set_regdomain_cmdid;
844ce42870eSBartosz Markowski 	u32 pdev_set_channel_cmdid;
845ce42870eSBartosz Markowski 	u32 pdev_set_param_cmdid;
846ce42870eSBartosz Markowski 	u32 pdev_pktlog_enable_cmdid;
847ce42870eSBartosz Markowski 	u32 pdev_pktlog_disable_cmdid;
848ce42870eSBartosz Markowski 	u32 pdev_set_wmm_params_cmdid;
849ce42870eSBartosz Markowski 	u32 pdev_set_ht_cap_ie_cmdid;
850ce42870eSBartosz Markowski 	u32 pdev_set_vht_cap_ie_cmdid;
851ce42870eSBartosz Markowski 	u32 pdev_set_dscp_tid_map_cmdid;
852ce42870eSBartosz Markowski 	u32 pdev_set_quiet_mode_cmdid;
853ce42870eSBartosz Markowski 	u32 pdev_green_ap_ps_enable_cmdid;
854ce42870eSBartosz Markowski 	u32 pdev_get_tpc_config_cmdid;
855ce42870eSBartosz Markowski 	u32 pdev_set_base_macaddr_cmdid;
856ce42870eSBartosz Markowski 	u32 vdev_create_cmdid;
857ce42870eSBartosz Markowski 	u32 vdev_delete_cmdid;
858ce42870eSBartosz Markowski 	u32 vdev_start_request_cmdid;
859ce42870eSBartosz Markowski 	u32 vdev_restart_request_cmdid;
860ce42870eSBartosz Markowski 	u32 vdev_up_cmdid;
861ce42870eSBartosz Markowski 	u32 vdev_stop_cmdid;
862ce42870eSBartosz Markowski 	u32 vdev_down_cmdid;
863ce42870eSBartosz Markowski 	u32 vdev_set_param_cmdid;
864ce42870eSBartosz Markowski 	u32 vdev_install_key_cmdid;
865ce42870eSBartosz Markowski 	u32 peer_create_cmdid;
866ce42870eSBartosz Markowski 	u32 peer_delete_cmdid;
867ce42870eSBartosz Markowski 	u32 peer_flush_tids_cmdid;
868ce42870eSBartosz Markowski 	u32 peer_set_param_cmdid;
869ce42870eSBartosz Markowski 	u32 peer_assoc_cmdid;
870ce42870eSBartosz Markowski 	u32 peer_add_wds_entry_cmdid;
871ce42870eSBartosz Markowski 	u32 peer_remove_wds_entry_cmdid;
872ce42870eSBartosz Markowski 	u32 peer_mcast_group_cmdid;
873ce42870eSBartosz Markowski 	u32 bcn_tx_cmdid;
874ce42870eSBartosz Markowski 	u32 pdev_send_bcn_cmdid;
875ce42870eSBartosz Markowski 	u32 bcn_tmpl_cmdid;
876ce42870eSBartosz Markowski 	u32 bcn_filter_rx_cmdid;
877ce42870eSBartosz Markowski 	u32 prb_req_filter_rx_cmdid;
878ce42870eSBartosz Markowski 	u32 mgmt_tx_cmdid;
8791807da49SRakesh Pillai 	u32 mgmt_tx_send_cmdid;
880ce42870eSBartosz Markowski 	u32 prb_tmpl_cmdid;
881ce42870eSBartosz Markowski 	u32 addba_clear_resp_cmdid;
882ce42870eSBartosz Markowski 	u32 addba_send_cmdid;
883ce42870eSBartosz Markowski 	u32 addba_status_cmdid;
884ce42870eSBartosz Markowski 	u32 delba_send_cmdid;
885ce42870eSBartosz Markowski 	u32 addba_set_resp_cmdid;
886ce42870eSBartosz Markowski 	u32 send_singleamsdu_cmdid;
887ce42870eSBartosz Markowski 	u32 sta_powersave_mode_cmdid;
888ce42870eSBartosz Markowski 	u32 sta_powersave_param_cmdid;
889ce42870eSBartosz Markowski 	u32 sta_mimo_ps_mode_cmdid;
890ce42870eSBartosz Markowski 	u32 pdev_dfs_enable_cmdid;
891ce42870eSBartosz Markowski 	u32 pdev_dfs_disable_cmdid;
892ce42870eSBartosz Markowski 	u32 roam_scan_mode;
893ce42870eSBartosz Markowski 	u32 roam_scan_rssi_threshold;
894ce42870eSBartosz Markowski 	u32 roam_scan_period;
895ce42870eSBartosz Markowski 	u32 roam_scan_rssi_change_threshold;
896ce42870eSBartosz Markowski 	u32 roam_ap_profile;
897ce42870eSBartosz Markowski 	u32 ofl_scan_add_ap_profile;
898ce42870eSBartosz Markowski 	u32 ofl_scan_remove_ap_profile;
899ce42870eSBartosz Markowski 	u32 ofl_scan_period;
900ce42870eSBartosz Markowski 	u32 p2p_dev_set_device_info;
901ce42870eSBartosz Markowski 	u32 p2p_dev_set_discoverability;
902ce42870eSBartosz Markowski 	u32 p2p_go_set_beacon_ie;
903ce42870eSBartosz Markowski 	u32 p2p_go_set_probe_resp_ie;
904ce42870eSBartosz Markowski 	u32 p2p_set_vendor_ie_data_cmdid;
905ce42870eSBartosz Markowski 	u32 ap_ps_peer_param_cmdid;
906ce42870eSBartosz Markowski 	u32 ap_ps_peer_uapsd_coex_cmdid;
907ce42870eSBartosz Markowski 	u32 peer_rate_retry_sched_cmdid;
908ce42870eSBartosz Markowski 	u32 wlan_profile_trigger_cmdid;
909ce42870eSBartosz Markowski 	u32 wlan_profile_set_hist_intvl_cmdid;
910ce42870eSBartosz Markowski 	u32 wlan_profile_get_profile_data_cmdid;
911ce42870eSBartosz Markowski 	u32 wlan_profile_enable_profile_id_cmdid;
912ce42870eSBartosz Markowski 	u32 wlan_profile_list_profile_id_cmdid;
913ce42870eSBartosz Markowski 	u32 pdev_suspend_cmdid;
914ce42870eSBartosz Markowski 	u32 pdev_resume_cmdid;
915ce42870eSBartosz Markowski 	u32 add_bcn_filter_cmdid;
916ce42870eSBartosz Markowski 	u32 rmv_bcn_filter_cmdid;
917ce42870eSBartosz Markowski 	u32 wow_add_wake_pattern_cmdid;
918ce42870eSBartosz Markowski 	u32 wow_del_wake_pattern_cmdid;
919ce42870eSBartosz Markowski 	u32 wow_enable_disable_wake_event_cmdid;
920ce42870eSBartosz Markowski 	u32 wow_enable_cmdid;
921ce42870eSBartosz Markowski 	u32 wow_hostwakeup_from_sleep_cmdid;
922ce42870eSBartosz Markowski 	u32 rtt_measreq_cmdid;
923ce42870eSBartosz Markowski 	u32 rtt_tsf_cmdid;
924ce42870eSBartosz Markowski 	u32 vdev_spectral_scan_configure_cmdid;
925ce42870eSBartosz Markowski 	u32 vdev_spectral_scan_enable_cmdid;
926ce42870eSBartosz Markowski 	u32 request_stats_cmdid;
927ce42870eSBartosz Markowski 	u32 set_arp_ns_offload_cmdid;
928ce42870eSBartosz Markowski 	u32 network_list_offload_config_cmdid;
929ce42870eSBartosz Markowski 	u32 gtk_offload_cmdid;
930ce42870eSBartosz Markowski 	u32 csa_offload_enable_cmdid;
931ce42870eSBartosz Markowski 	u32 csa_offload_chanswitch_cmdid;
932ce42870eSBartosz Markowski 	u32 chatter_set_mode_cmdid;
933ce42870eSBartosz Markowski 	u32 peer_tid_addba_cmdid;
934ce42870eSBartosz Markowski 	u32 peer_tid_delba_cmdid;
935ce42870eSBartosz Markowski 	u32 sta_dtim_ps_method_cmdid;
936ce42870eSBartosz Markowski 	u32 sta_uapsd_auto_trig_cmdid;
937ce42870eSBartosz Markowski 	u32 sta_keepalive_cmd;
938ce42870eSBartosz Markowski 	u32 echo_cmdid;
939ce42870eSBartosz Markowski 	u32 pdev_utf_cmdid;
940ce42870eSBartosz Markowski 	u32 dbglog_cfg_cmdid;
941ce42870eSBartosz Markowski 	u32 pdev_qvit_cmdid;
942ce42870eSBartosz Markowski 	u32 pdev_ftm_intg_cmdid;
943ce42870eSBartosz Markowski 	u32 vdev_set_keepalive_cmdid;
944ce42870eSBartosz Markowski 	u32 vdev_get_keepalive_cmdid;
945ce42870eSBartosz Markowski 	u32 force_fw_hang_cmdid;
946ce42870eSBartosz Markowski 	u32 gpio_config_cmdid;
947ce42870eSBartosz Markowski 	u32 gpio_output_cmdid;
948a57a6a27SRajkumar Manoharan 	u32 pdev_get_temperature_cmdid;
9496d492fe2SMichal Kazior 	u32 vdev_set_wmm_params_cmdid;
950ad45c888SMarek Puzyniak 	u32 tdls_set_state_cmdid;
951ad45c888SMarek Puzyniak 	u32 tdls_peer_update_cmdid;
9525b272e30SMichal Kazior 	u32 adaptive_qcs_cmdid;
9532d491e69SRaja Mani 	u32 scan_update_request_cmdid;
9542d491e69SRaja Mani 	u32 vdev_standby_response_cmdid;
9552d491e69SRaja Mani 	u32 vdev_resume_response_cmdid;
9562d491e69SRaja Mani 	u32 wlan_peer_caching_add_peer_cmdid;
9572d491e69SRaja Mani 	u32 wlan_peer_caching_evict_peer_cmdid;
9582d491e69SRaja Mani 	u32 wlan_peer_caching_restore_peer_cmdid;
9592d491e69SRaja Mani 	u32 wlan_peer_caching_print_all_peers_info_cmdid;
9602d491e69SRaja Mani 	u32 peer_update_wds_entry_cmdid;
9612d491e69SRaja Mani 	u32 peer_add_proxy_sta_entry_cmdid;
9622d491e69SRaja Mani 	u32 rtt_keepalive_cmdid;
9632d491e69SRaja Mani 	u32 oem_req_cmdid;
9642d491e69SRaja Mani 	u32 nan_cmdid;
9652d491e69SRaja Mani 	u32 vdev_ratemask_cmdid;
9662d491e69SRaja Mani 	u32 qboost_cfg_cmdid;
9672d491e69SRaja Mani 	u32 pdev_smart_ant_enable_cmdid;
9682d491e69SRaja Mani 	u32 pdev_smart_ant_set_rx_antenna_cmdid;
9692d491e69SRaja Mani 	u32 peer_smart_ant_set_tx_antenna_cmdid;
9702d491e69SRaja Mani 	u32 peer_smart_ant_set_train_info_cmdid;
9712d491e69SRaja Mani 	u32 peer_smart_ant_set_node_config_ops_cmdid;
9722d491e69SRaja Mani 	u32 pdev_set_antenna_switch_table_cmdid;
9732d491e69SRaja Mani 	u32 pdev_set_ctl_table_cmdid;
9742d491e69SRaja Mani 	u32 pdev_set_mimogain_table_cmdid;
9752d491e69SRaja Mani 	u32 pdev_ratepwr_table_cmdid;
9762d491e69SRaja Mani 	u32 pdev_ratepwr_chainmsk_table_cmdid;
9772d491e69SRaja Mani 	u32 pdev_fips_cmdid;
9782d491e69SRaja Mani 	u32 tt_set_conf_cmdid;
9792d491e69SRaja Mani 	u32 fwtest_cmdid;
9802d491e69SRaja Mani 	u32 vdev_atf_request_cmdid;
9812d491e69SRaja Mani 	u32 peer_atf_request_cmdid;
9822d491e69SRaja Mani 	u32 pdev_get_ani_cck_config_cmdid;
9832d491e69SRaja Mani 	u32 pdev_get_ani_ofdm_config_cmdid;
9842d491e69SRaja Mani 	u32 pdev_reserve_ast_entry_cmdid;
9852d491e69SRaja Mani 	u32 pdev_get_nfcal_power_cmdid;
9862d491e69SRaja Mani 	u32 pdev_get_tpc_cmdid;
9872d491e69SRaja Mani 	u32 pdev_get_ast_info_cmdid;
9882d491e69SRaja Mani 	u32 vdev_set_dscp_tid_map_cmdid;
9892d491e69SRaja Mani 	u32 pdev_get_info_cmdid;
9902d491e69SRaja Mani 	u32 vdev_get_info_cmdid;
9912d491e69SRaja Mani 	u32 vdev_filter_neighbor_rx_packets_cmdid;
9922d491e69SRaja Mani 	u32 mu_cal_start_cmdid;
9932d491e69SRaja Mani 	u32 set_cca_params_cmdid;
9942d491e69SRaja Mani 	u32 pdev_bss_chan_info_request_cmdid;
99562f77f09SMaharaja 	u32 pdev_enable_adaptive_cca_cmdid;
99647771902SRaja Mani 	u32 ext_resource_cfg_cmdid;
997add6cd8dSManikanta Pubbisetty 	u32 vdev_set_ie_cmdid;
998add6cd8dSManikanta Pubbisetty 	u32 set_lteu_config_cmdid;
999add6cd8dSManikanta Pubbisetty 	u32 atf_ssid_grouping_request_cmdid;
1000add6cd8dSManikanta Pubbisetty 	u32 peer_atf_ext_request_cmdid;
1001add6cd8dSManikanta Pubbisetty 	u32 set_periodic_channel_stats_cfg_cmdid;
1002add6cd8dSManikanta Pubbisetty 	u32 peer_bwf_request_cmdid;
1003add6cd8dSManikanta Pubbisetty 	u32 btcoex_cfg_cmdid;
1004add6cd8dSManikanta Pubbisetty 	u32 peer_tx_mu_txmit_count_cmdid;
1005add6cd8dSManikanta Pubbisetty 	u32 peer_tx_mu_txmit_rstcnt_cmdid;
1006add6cd8dSManikanta Pubbisetty 	u32 peer_gid_userpos_list_cmdid;
1007add6cd8dSManikanta Pubbisetty 	u32 pdev_check_cal_version_cmdid;
1008add6cd8dSManikanta Pubbisetty 	u32 coex_version_cfg_cmid;
1009add6cd8dSManikanta Pubbisetty 	u32 pdev_get_rx_filter_cmdid;
1010add6cd8dSManikanta Pubbisetty 	u32 pdev_extended_nss_cfg_cmdid;
1011add6cd8dSManikanta Pubbisetty 	u32 vdev_set_scan_nac_rssi_cmdid;
1012add6cd8dSManikanta Pubbisetty 	u32 prog_gpio_band_select_cmdid;
1013add6cd8dSManikanta Pubbisetty 	u32 config_smart_logging_cmdid;
1014add6cd8dSManikanta Pubbisetty 	u32 debug_fatal_condition_cmdid;
1015add6cd8dSManikanta Pubbisetty 	u32 get_tsf_timer_cmdid;
1016add6cd8dSManikanta Pubbisetty 	u32 pdev_get_tpc_table_cmdid;
1017add6cd8dSManikanta Pubbisetty 	u32 vdev_sifs_trigger_time_cmdid;
1018add6cd8dSManikanta Pubbisetty 	u32 pdev_wds_entry_list_cmdid;
1019add6cd8dSManikanta Pubbisetty 	u32 tdls_set_offchan_mode_cmdid;
10206f6eb1bcSSriram R 	u32 radar_found_cmdid;
102184758d4dSBhagavathi Perumal S 	u32 set_bb_timing_cmdid;
1022ce42870eSBartosz Markowski };
1023ce42870eSBartosz Markowski 
10245e3dd157SKalle Valo /*
10255e3dd157SKalle Valo  * wmi command groups.
10265e3dd157SKalle Valo  */
10275e3dd157SKalle Valo enum wmi_cmd_group {
10285e3dd157SKalle Valo 	/* 0 to 2 are reserved */
10295e3dd157SKalle Valo 	WMI_GRP_START = 0x3,
10305e3dd157SKalle Valo 	WMI_GRP_SCAN = WMI_GRP_START,
10315e3dd157SKalle Valo 	WMI_GRP_PDEV,
10325e3dd157SKalle Valo 	WMI_GRP_VDEV,
10335e3dd157SKalle Valo 	WMI_GRP_PEER,
10345e3dd157SKalle Valo 	WMI_GRP_MGMT,
10355e3dd157SKalle Valo 	WMI_GRP_BA_NEG,
10365e3dd157SKalle Valo 	WMI_GRP_STA_PS,
10375e3dd157SKalle Valo 	WMI_GRP_DFS,
10385e3dd157SKalle Valo 	WMI_GRP_ROAM,
10395e3dd157SKalle Valo 	WMI_GRP_OFL_SCAN,
10405e3dd157SKalle Valo 	WMI_GRP_P2P,
10415e3dd157SKalle Valo 	WMI_GRP_AP_PS,
10425e3dd157SKalle Valo 	WMI_GRP_RATE_CTRL,
10435e3dd157SKalle Valo 	WMI_GRP_PROFILE,
10445e3dd157SKalle Valo 	WMI_GRP_SUSPEND,
10455e3dd157SKalle Valo 	WMI_GRP_BCN_FILTER,
10465e3dd157SKalle Valo 	WMI_GRP_WOW,
10475e3dd157SKalle Valo 	WMI_GRP_RTT,
10485e3dd157SKalle Valo 	WMI_GRP_SPECTRAL,
10495e3dd157SKalle Valo 	WMI_GRP_STATS,
10505e3dd157SKalle Valo 	WMI_GRP_ARP_NS_OFL,
10515e3dd157SKalle Valo 	WMI_GRP_NLO_OFL,
10525e3dd157SKalle Valo 	WMI_GRP_GTK_OFL,
10535e3dd157SKalle Valo 	WMI_GRP_CSA_OFL,
10545e3dd157SKalle Valo 	WMI_GRP_CHATTER,
10555e3dd157SKalle Valo 	WMI_GRP_TID_ADDBA,
10565e3dd157SKalle Valo 	WMI_GRP_MISC,
10575e3dd157SKalle Valo 	WMI_GRP_GPIO,
10585e3dd157SKalle Valo };
10595e3dd157SKalle Valo 
10605e3dd157SKalle Valo #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
10615e3dd157SKalle Valo #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
10625e3dd157SKalle Valo 
106334957b25SBartosz Markowski #define WMI_CMD_UNSUPPORTED 0
1064b7e3adf9SBartosz Markowski 
1065b7e3adf9SBartosz Markowski /* Command IDs and command events for MAIN FW. */
10665e3dd157SKalle Valo enum wmi_cmd_id {
10675e3dd157SKalle Valo 	WMI_INIT_CMDID = 0x1,
10685e3dd157SKalle Valo 
10695e3dd157SKalle Valo 	/* Scan specific commands */
10705e3dd157SKalle Valo 	WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN),
10715e3dd157SKalle Valo 	WMI_STOP_SCAN_CMDID,
10725e3dd157SKalle Valo 	WMI_SCAN_CHAN_LIST_CMDID,
10735e3dd157SKalle Valo 	WMI_SCAN_SCH_PRIO_TBL_CMDID,
10745e3dd157SKalle Valo 
10755e3dd157SKalle Valo 	/* PDEV (physical device) specific commands */
10765e3dd157SKalle Valo 	WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV),
10775e3dd157SKalle Valo 	WMI_PDEV_SET_CHANNEL_CMDID,
10785e3dd157SKalle Valo 	WMI_PDEV_SET_PARAM_CMDID,
10795e3dd157SKalle Valo 	WMI_PDEV_PKTLOG_ENABLE_CMDID,
10805e3dd157SKalle Valo 	WMI_PDEV_PKTLOG_DISABLE_CMDID,
10815e3dd157SKalle Valo 	WMI_PDEV_SET_WMM_PARAMS_CMDID,
10825e3dd157SKalle Valo 	WMI_PDEV_SET_HT_CAP_IE_CMDID,
10835e3dd157SKalle Valo 	WMI_PDEV_SET_VHT_CAP_IE_CMDID,
10845e3dd157SKalle Valo 	WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
10855e3dd157SKalle Valo 	WMI_PDEV_SET_QUIET_MODE_CMDID,
10865e3dd157SKalle Valo 	WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
10875e3dd157SKalle Valo 	WMI_PDEV_GET_TPC_CONFIG_CMDID,
10885e3dd157SKalle Valo 	WMI_PDEV_SET_BASE_MACADDR_CMDID,
10895e3dd157SKalle Valo 
10905e3dd157SKalle Valo 	/* VDEV (virtual device) specific commands */
10915e3dd157SKalle Valo 	WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV),
10925e3dd157SKalle Valo 	WMI_VDEV_DELETE_CMDID,
10935e3dd157SKalle Valo 	WMI_VDEV_START_REQUEST_CMDID,
10945e3dd157SKalle Valo 	WMI_VDEV_RESTART_REQUEST_CMDID,
10955e3dd157SKalle Valo 	WMI_VDEV_UP_CMDID,
10965e3dd157SKalle Valo 	WMI_VDEV_STOP_CMDID,
10975e3dd157SKalle Valo 	WMI_VDEV_DOWN_CMDID,
10985e3dd157SKalle Valo 	WMI_VDEV_SET_PARAM_CMDID,
10995e3dd157SKalle Valo 	WMI_VDEV_INSTALL_KEY_CMDID,
11005e3dd157SKalle Valo 
11015e3dd157SKalle Valo 	/* peer specific commands */
11025e3dd157SKalle Valo 	WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER),
11035e3dd157SKalle Valo 	WMI_PEER_DELETE_CMDID,
11045e3dd157SKalle Valo 	WMI_PEER_FLUSH_TIDS_CMDID,
11055e3dd157SKalle Valo 	WMI_PEER_SET_PARAM_CMDID,
11065e3dd157SKalle Valo 	WMI_PEER_ASSOC_CMDID,
11075e3dd157SKalle Valo 	WMI_PEER_ADD_WDS_ENTRY_CMDID,
11085e3dd157SKalle Valo 	WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
11095e3dd157SKalle Valo 	WMI_PEER_MCAST_GROUP_CMDID,
11105e3dd157SKalle Valo 
11115e3dd157SKalle Valo 	/* beacon/management specific commands */
11125e3dd157SKalle Valo 	WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT),
11135e3dd157SKalle Valo 	WMI_PDEV_SEND_BCN_CMDID,
11145e3dd157SKalle Valo 	WMI_BCN_TMPL_CMDID,
11155e3dd157SKalle Valo 	WMI_BCN_FILTER_RX_CMDID,
11165e3dd157SKalle Valo 	WMI_PRB_REQ_FILTER_RX_CMDID,
11175e3dd157SKalle Valo 	WMI_MGMT_TX_CMDID,
11185e3dd157SKalle Valo 	WMI_PRB_TMPL_CMDID,
11195e3dd157SKalle Valo 
11205e3dd157SKalle Valo 	/* commands to directly control BA negotiation directly from host. */
11215e3dd157SKalle Valo 	WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG),
11225e3dd157SKalle Valo 	WMI_ADDBA_SEND_CMDID,
11235e3dd157SKalle Valo 	WMI_ADDBA_STATUS_CMDID,
11245e3dd157SKalle Valo 	WMI_DELBA_SEND_CMDID,
11255e3dd157SKalle Valo 	WMI_ADDBA_SET_RESP_CMDID,
11265e3dd157SKalle Valo 	WMI_SEND_SINGLEAMSDU_CMDID,
11275e3dd157SKalle Valo 
11285e3dd157SKalle Valo 	/* Station power save specific config */
11295e3dd157SKalle Valo 	WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS),
11305e3dd157SKalle Valo 	WMI_STA_POWERSAVE_PARAM_CMDID,
11315e3dd157SKalle Valo 	WMI_STA_MIMO_PS_MODE_CMDID,
11325e3dd157SKalle Valo 
11335e3dd157SKalle Valo 	/** DFS-specific commands */
11345e3dd157SKalle Valo 	WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS),
11355e3dd157SKalle Valo 	WMI_PDEV_DFS_DISABLE_CMDID,
11365e3dd157SKalle Valo 
11375e3dd157SKalle Valo 	/* Roaming specific  commands */
11385e3dd157SKalle Valo 	WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM),
11395e3dd157SKalle Valo 	WMI_ROAM_SCAN_RSSI_THRESHOLD,
11405e3dd157SKalle Valo 	WMI_ROAM_SCAN_PERIOD,
11415e3dd157SKalle Valo 	WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
11425e3dd157SKalle Valo 	WMI_ROAM_AP_PROFILE,
11435e3dd157SKalle Valo 
11445e3dd157SKalle Valo 	/* offload scan specific commands */
11455e3dd157SKalle Valo 	WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN),
11465e3dd157SKalle Valo 	WMI_OFL_SCAN_REMOVE_AP_PROFILE,
11475e3dd157SKalle Valo 	WMI_OFL_SCAN_PERIOD,
11485e3dd157SKalle Valo 
11495e3dd157SKalle Valo 	/* P2P specific commands */
11505e3dd157SKalle Valo 	WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P),
11515e3dd157SKalle Valo 	WMI_P2P_DEV_SET_DISCOVERABILITY,
11525e3dd157SKalle Valo 	WMI_P2P_GO_SET_BEACON_IE,
11535e3dd157SKalle Valo 	WMI_P2P_GO_SET_PROBE_RESP_IE,
11545e3dd157SKalle Valo 	WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
11555e3dd157SKalle Valo 
11565e3dd157SKalle Valo 	/* AP power save specific config */
11575e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS),
11585e3dd157SKalle Valo 	WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
11595e3dd157SKalle Valo 
11605e3dd157SKalle Valo 	/* Rate-control specific commands */
11615e3dd157SKalle Valo 	WMI_PEER_RATE_RETRY_SCHED_CMDID =
11625e3dd157SKalle Valo 	WMI_CMD_GRP(WMI_GRP_RATE_CTRL),
11635e3dd157SKalle Valo 
11645e3dd157SKalle Valo 	/* WLAN Profiling commands. */
11655e3dd157SKalle Valo 	WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE),
11665e3dd157SKalle Valo 	WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
11675e3dd157SKalle Valo 	WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
11685e3dd157SKalle Valo 	WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
11695e3dd157SKalle Valo 	WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
11705e3dd157SKalle Valo 
11715e3dd157SKalle Valo 	/* Suspend resume command Ids */
11725e3dd157SKalle Valo 	WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND),
11735e3dd157SKalle Valo 	WMI_PDEV_RESUME_CMDID,
11745e3dd157SKalle Valo 
11755e3dd157SKalle Valo 	/* Beacon filter commands */
11765e3dd157SKalle Valo 	WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER),
11775e3dd157SKalle Valo 	WMI_RMV_BCN_FILTER_CMDID,
11785e3dd157SKalle Valo 
11795e3dd157SKalle Valo 	/* WOW Specific WMI commands*/
11805e3dd157SKalle Valo 	WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW),
11815e3dd157SKalle Valo 	WMI_WOW_DEL_WAKE_PATTERN_CMDID,
11825e3dd157SKalle Valo 	WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
11835e3dd157SKalle Valo 	WMI_WOW_ENABLE_CMDID,
11845e3dd157SKalle Valo 	WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
11855e3dd157SKalle Valo 
11865e3dd157SKalle Valo 	/* RTT measurement related cmd */
11875e3dd157SKalle Valo 	WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT),
11885e3dd157SKalle Valo 	WMI_RTT_TSF_CMDID,
11895e3dd157SKalle Valo 
11905e3dd157SKalle Valo 	/* spectral scan commands */
11915e3dd157SKalle Valo 	WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL),
11925e3dd157SKalle Valo 	WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
11935e3dd157SKalle Valo 
11945e3dd157SKalle Valo 	/* F/W stats */
11955e3dd157SKalle Valo 	WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS),
11965e3dd157SKalle Valo 
11975e3dd157SKalle Valo 	/* ARP OFFLOAD REQUEST*/
11985e3dd157SKalle Valo 	WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL),
11995e3dd157SKalle Valo 
12005e3dd157SKalle Valo 	/* NS offload confid*/
12015e3dd157SKalle Valo 	WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL),
12025e3dd157SKalle Valo 
12035e3dd157SKalle Valo 	/* GTK offload Specific WMI commands*/
12045e3dd157SKalle Valo 	WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL),
12055e3dd157SKalle Valo 
12065e3dd157SKalle Valo 	/* CSA offload Specific WMI commands*/
12075e3dd157SKalle Valo 	WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL),
12085e3dd157SKalle Valo 	WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
12095e3dd157SKalle Valo 
12105e3dd157SKalle Valo 	/* Chatter commands*/
12115e3dd157SKalle Valo 	WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER),
12125e3dd157SKalle Valo 
12135e3dd157SKalle Valo 	/* addba specific commands */
12145e3dd157SKalle Valo 	WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA),
12155e3dd157SKalle Valo 	WMI_PEER_TID_DELBA_CMDID,
12165e3dd157SKalle Valo 
12175e3dd157SKalle Valo 	/* set station mimo powersave method */
12185e3dd157SKalle Valo 	WMI_STA_DTIM_PS_METHOD_CMDID,
12195e3dd157SKalle Valo 	/* Configure the Station UAPSD AC Auto Trigger Parameters */
12205e3dd157SKalle Valo 	WMI_STA_UAPSD_AUTO_TRIG_CMDID,
12215e3dd157SKalle Valo 
12225e3dd157SKalle Valo 	/* STA Keep alive parameter configuration,
122337ff1b0dSMarcin Rokicki 	 * Requires WMI_SERVICE_STA_KEEP_ALIVE
122437ff1b0dSMarcin Rokicki 	 */
12255e3dd157SKalle Valo 	WMI_STA_KEEPALIVE_CMD,
12265e3dd157SKalle Valo 
12275e3dd157SKalle Valo 	/* misc command group */
12285e3dd157SKalle Valo 	WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC),
12295e3dd157SKalle Valo 	WMI_PDEV_UTF_CMDID,
12305e3dd157SKalle Valo 	WMI_DBGLOG_CFG_CMDID,
12315e3dd157SKalle Valo 	WMI_PDEV_QVIT_CMDID,
12325e3dd157SKalle Valo 	WMI_PDEV_FTM_INTG_CMDID,
12335e3dd157SKalle Valo 	WMI_VDEV_SET_KEEPALIVE_CMDID,
12345e3dd157SKalle Valo 	WMI_VDEV_GET_KEEPALIVE_CMDID,
12359cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_CMDID,
12365e3dd157SKalle Valo 
12375e3dd157SKalle Valo 	/* GPIO Configuration */
12385e3dd157SKalle Valo 	WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO),
12395e3dd157SKalle Valo 	WMI_GPIO_OUTPUT_CMDID,
12405e3dd157SKalle Valo };
12415e3dd157SKalle Valo 
12425e3dd157SKalle Valo enum wmi_event_id {
12435e3dd157SKalle Valo 	WMI_SERVICE_READY_EVENTID = 0x1,
12445e3dd157SKalle Valo 	WMI_READY_EVENTID,
1245cea19a6cSCarl Huang 	WMI_SERVICE_AVAILABLE_EVENTID,
12465e3dd157SKalle Valo 
12475e3dd157SKalle Valo 	/* Scan specific events */
12485e3dd157SKalle Valo 	WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
12495e3dd157SKalle Valo 
12505e3dd157SKalle Valo 	/* PDEV specific events */
12515e3dd157SKalle Valo 	WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
12525e3dd157SKalle Valo 	WMI_CHAN_INFO_EVENTID,
12535e3dd157SKalle Valo 	WMI_PHYERR_EVENTID,
12545e3dd157SKalle Valo 
12555e3dd157SKalle Valo 	/* VDEV specific events */
12565e3dd157SKalle Valo 	WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
12575e3dd157SKalle Valo 	WMI_VDEV_STOPPED_EVENTID,
12585e3dd157SKalle Valo 	WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
12595e3dd157SKalle Valo 
12605e3dd157SKalle Valo 	/* peer specific events */
12615e3dd157SKalle Valo 	WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
12625e3dd157SKalle Valo 
12635e3dd157SKalle Valo 	/* beacon/mgmt specific events */
12645e3dd157SKalle Valo 	WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
12655e3dd157SKalle Valo 	WMI_HOST_SWBA_EVENTID,
12665e3dd157SKalle Valo 	WMI_TBTTOFFSET_UPDATE_EVENTID,
12675e3dd157SKalle Valo 
12685e3dd157SKalle Valo 	/* ADDBA Related WMI Events*/
12695e3dd157SKalle Valo 	WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
12705e3dd157SKalle Valo 	WMI_TX_ADDBA_COMPLETE_EVENTID,
12715e3dd157SKalle Valo 
12725e3dd157SKalle Valo 	/* Roam event to trigger roaming on host */
12735e3dd157SKalle Valo 	WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
12745e3dd157SKalle Valo 	WMI_PROFILE_MATCH,
12755e3dd157SKalle Valo 
12765e3dd157SKalle Valo 	/* WoW */
12775e3dd157SKalle Valo 	WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
12785e3dd157SKalle Valo 
12795e3dd157SKalle Valo 	/* RTT */
12805e3dd157SKalle Valo 	WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
12815e3dd157SKalle Valo 	WMI_TSF_MEASUREMENT_REPORT_EVENTID,
12825e3dd157SKalle Valo 	WMI_RTT_ERROR_REPORT_EVENTID,
12835e3dd157SKalle Valo 
12845e3dd157SKalle Valo 	/* GTK offload */
12855e3dd157SKalle Valo 	WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
12865e3dd157SKalle Valo 	WMI_GTK_REKEY_FAIL_EVENTID,
12875e3dd157SKalle Valo 
12885e3dd157SKalle Valo 	/* CSA IE received event */
12895e3dd157SKalle Valo 	WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
12905e3dd157SKalle Valo 
12915e3dd157SKalle Valo 	/* Misc events */
12925e3dd157SKalle Valo 	WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
12935e3dd157SKalle Valo 	WMI_PDEV_UTF_EVENTID,
12945e3dd157SKalle Valo 	WMI_DEBUG_MESG_EVENTID,
12955e3dd157SKalle Valo 	WMI_UPDATE_STATS_EVENTID,
12965e3dd157SKalle Valo 	WMI_DEBUG_PRINT_EVENTID,
12975e3dd157SKalle Valo 	WMI_DCS_INTERFERENCE_EVENTID,
12985e3dd157SKalle Valo 	WMI_PDEV_QVIT_EVENTID,
12995e3dd157SKalle Valo 	WMI_WLAN_PROFILE_DATA_EVENTID,
13005e3dd157SKalle Valo 	WMI_PDEV_FTM_INTG_EVENTID,
13015e3dd157SKalle Valo 	WMI_WLAN_FREQ_AVOID_EVENTID,
13025e3dd157SKalle Valo 	WMI_VDEV_GET_KEEPALIVE_EVENTID,
13035e3dd157SKalle Valo 
13045e3dd157SKalle Valo 	/* GPIO Event */
13055e3dd157SKalle Valo 	WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
13065e3dd157SKalle Valo };
13075e3dd157SKalle Valo 
1308b7e3adf9SBartosz Markowski /* Command IDs and command events for 10.X firmware */
1309b7e3adf9SBartosz Markowski enum wmi_10x_cmd_id {
1310b7e3adf9SBartosz Markowski 	WMI_10X_START_CMDID = 0x9000,
1311b7e3adf9SBartosz Markowski 	WMI_10X_END_CMDID = 0x9FFF,
1312b7e3adf9SBartosz Markowski 
1313b7e3adf9SBartosz Markowski 	/* initialize the wlan sub system */
1314b7e3adf9SBartosz Markowski 	WMI_10X_INIT_CMDID,
1315b7e3adf9SBartosz Markowski 
1316b7e3adf9SBartosz Markowski 	/* Scan specific commands */
1317b7e3adf9SBartosz Markowski 
1318b7e3adf9SBartosz Markowski 	WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID,
1319b7e3adf9SBartosz Markowski 	WMI_10X_STOP_SCAN_CMDID,
1320b7e3adf9SBartosz Markowski 	WMI_10X_SCAN_CHAN_LIST_CMDID,
1321b7e3adf9SBartosz Markowski 	WMI_10X_ECHO_CMDID,
1322b7e3adf9SBartosz Markowski 
1323b7e3adf9SBartosz Markowski 	/* PDEV(physical device) specific commands */
1324b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
1325b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_CHANNEL_CMDID,
1326b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_PARAM_CMDID,
1327b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
1328b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
1329b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
1330b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
1331b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
1332b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
1333b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
1334b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
1335b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1336b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
1337b7e3adf9SBartosz Markowski 
1338b7e3adf9SBartosz Markowski 	/* VDEV(virtual device) specific commands */
1339b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_CREATE_CMDID,
1340b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_DELETE_CMDID,
1341b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_START_REQUEST_CMDID,
1342b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_RESTART_REQUEST_CMDID,
1343b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_UP_CMDID,
1344b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_STOP_CMDID,
1345b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_DOWN_CMDID,
1346b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_STANDBY_RESPONSE_CMDID,
1347b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_RESUME_RESPONSE_CMDID,
1348b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_SET_PARAM_CMDID,
1349b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_INSTALL_KEY_CMDID,
1350b7e3adf9SBartosz Markowski 
1351b7e3adf9SBartosz Markowski 	/* peer specific commands */
1352b7e3adf9SBartosz Markowski 	WMI_10X_PEER_CREATE_CMDID,
1353b7e3adf9SBartosz Markowski 	WMI_10X_PEER_DELETE_CMDID,
1354b7e3adf9SBartosz Markowski 	WMI_10X_PEER_FLUSH_TIDS_CMDID,
1355b7e3adf9SBartosz Markowski 	WMI_10X_PEER_SET_PARAM_CMDID,
1356b7e3adf9SBartosz Markowski 	WMI_10X_PEER_ASSOC_CMDID,
1357b7e3adf9SBartosz Markowski 	WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
1358b7e3adf9SBartosz Markowski 	WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
1359b7e3adf9SBartosz Markowski 	WMI_10X_PEER_MCAST_GROUP_CMDID,
1360b7e3adf9SBartosz Markowski 
1361b7e3adf9SBartosz Markowski 	/* beacon/management specific commands */
1362b7e3adf9SBartosz Markowski 
1363b7e3adf9SBartosz Markowski 	WMI_10X_BCN_TX_CMDID,
1364b7e3adf9SBartosz Markowski 	WMI_10X_BCN_PRB_TMPL_CMDID,
1365b7e3adf9SBartosz Markowski 	WMI_10X_BCN_FILTER_RX_CMDID,
1366b7e3adf9SBartosz Markowski 	WMI_10X_PRB_REQ_FILTER_RX_CMDID,
1367b7e3adf9SBartosz Markowski 	WMI_10X_MGMT_TX_CMDID,
1368b7e3adf9SBartosz Markowski 
1369b7e3adf9SBartosz Markowski 	/* commands to directly control ba negotiation directly from host. */
1370b7e3adf9SBartosz Markowski 	WMI_10X_ADDBA_CLEAR_RESP_CMDID,
1371b7e3adf9SBartosz Markowski 	WMI_10X_ADDBA_SEND_CMDID,
1372b7e3adf9SBartosz Markowski 	WMI_10X_ADDBA_STATUS_CMDID,
1373b7e3adf9SBartosz Markowski 	WMI_10X_DELBA_SEND_CMDID,
1374b7e3adf9SBartosz Markowski 	WMI_10X_ADDBA_SET_RESP_CMDID,
1375b7e3adf9SBartosz Markowski 	WMI_10X_SEND_SINGLEAMSDU_CMDID,
1376b7e3adf9SBartosz Markowski 
1377b7e3adf9SBartosz Markowski 	/* Station power save specific config */
1378b7e3adf9SBartosz Markowski 	WMI_10X_STA_POWERSAVE_MODE_CMDID,
1379b7e3adf9SBartosz Markowski 	WMI_10X_STA_POWERSAVE_PARAM_CMDID,
1380b7e3adf9SBartosz Markowski 	WMI_10X_STA_MIMO_PS_MODE_CMDID,
1381b7e3adf9SBartosz Markowski 
1382b7e3adf9SBartosz Markowski 	/* set debug log config */
1383b7e3adf9SBartosz Markowski 	WMI_10X_DBGLOG_CFG_CMDID,
1384b7e3adf9SBartosz Markowski 
1385b7e3adf9SBartosz Markowski 	/* DFS-specific commands */
1386b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_DFS_ENABLE_CMDID,
1387b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_DFS_DISABLE_CMDID,
1388b7e3adf9SBartosz Markowski 
1389b7e3adf9SBartosz Markowski 	/* QVIT specific command id */
1390b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_QVIT_CMDID,
1391b7e3adf9SBartosz Markowski 
1392b7e3adf9SBartosz Markowski 	/* Offload Scan and Roaming related  commands */
1393b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_SCAN_MODE,
1394b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
1395b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_SCAN_PERIOD,
1396b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1397b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_AP_PROFILE,
1398b7e3adf9SBartosz Markowski 	WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
1399b7e3adf9SBartosz Markowski 	WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
1400b7e3adf9SBartosz Markowski 	WMI_10X_OFL_SCAN_PERIOD,
1401b7e3adf9SBartosz Markowski 
1402b7e3adf9SBartosz Markowski 	/* P2P specific commands */
1403b7e3adf9SBartosz Markowski 	WMI_10X_P2P_DEV_SET_DEVICE_INFO,
1404b7e3adf9SBartosz Markowski 	WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
1405b7e3adf9SBartosz Markowski 	WMI_10X_P2P_GO_SET_BEACON_IE,
1406b7e3adf9SBartosz Markowski 	WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
1407b7e3adf9SBartosz Markowski 
1408b7e3adf9SBartosz Markowski 	/* AP power save specific config */
1409b7e3adf9SBartosz Markowski 	WMI_10X_AP_PS_PEER_PARAM_CMDID,
1410b7e3adf9SBartosz Markowski 	WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID,
1411b7e3adf9SBartosz Markowski 
1412b7e3adf9SBartosz Markowski 	/* Rate-control specific commands */
1413b7e3adf9SBartosz Markowski 	WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
1414b7e3adf9SBartosz Markowski 
1415b7e3adf9SBartosz Markowski 	/* WLAN Profiling commands. */
1416b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
1417b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1418b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1419b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1420b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1421b7e3adf9SBartosz Markowski 
1422b7e3adf9SBartosz Markowski 	/* Suspend resume command Ids */
1423b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SUSPEND_CMDID,
1424b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_RESUME_CMDID,
1425b7e3adf9SBartosz Markowski 
1426b7e3adf9SBartosz Markowski 	/* Beacon filter commands */
1427b7e3adf9SBartosz Markowski 	WMI_10X_ADD_BCN_FILTER_CMDID,
1428b7e3adf9SBartosz Markowski 	WMI_10X_RMV_BCN_FILTER_CMDID,
1429b7e3adf9SBartosz Markowski 
1430b7e3adf9SBartosz Markowski 	/* WOW Specific WMI commands*/
1431b7e3adf9SBartosz Markowski 	WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
1432b7e3adf9SBartosz Markowski 	WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
1433b7e3adf9SBartosz Markowski 	WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1434b7e3adf9SBartosz Markowski 	WMI_10X_WOW_ENABLE_CMDID,
1435b7e3adf9SBartosz Markowski 	WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1436b7e3adf9SBartosz Markowski 
1437b7e3adf9SBartosz Markowski 	/* RTT measurement related cmd */
1438b7e3adf9SBartosz Markowski 	WMI_10X_RTT_MEASREQ_CMDID,
1439b7e3adf9SBartosz Markowski 	WMI_10X_RTT_TSF_CMDID,
1440b7e3adf9SBartosz Markowski 
1441b7e3adf9SBartosz Markowski 	/* transmit beacon by value */
1442b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SEND_BCN_CMDID,
1443b7e3adf9SBartosz Markowski 
1444b7e3adf9SBartosz Markowski 	/* F/W stats */
1445b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1446b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1447b7e3adf9SBartosz Markowski 	WMI_10X_REQUEST_STATS_CMDID,
1448b7e3adf9SBartosz Markowski 
1449b7e3adf9SBartosz Markowski 	/* GPIO Configuration */
1450b7e3adf9SBartosz Markowski 	WMI_10X_GPIO_CONFIG_CMDID,
1451b7e3adf9SBartosz Markowski 	WMI_10X_GPIO_OUTPUT_CMDID,
1452b7e3adf9SBartosz Markowski 
1453b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1,
1454b7e3adf9SBartosz Markowski };
1455b7e3adf9SBartosz Markowski 
1456b7e3adf9SBartosz Markowski enum wmi_10x_event_id {
1457b7e3adf9SBartosz Markowski 	WMI_10X_SERVICE_READY_EVENTID = 0x8000,
1458b7e3adf9SBartosz Markowski 	WMI_10X_READY_EVENTID,
1459b7e3adf9SBartosz Markowski 	WMI_10X_START_EVENTID = 0x9000,
1460b7e3adf9SBartosz Markowski 	WMI_10X_END_EVENTID = 0x9FFF,
1461b7e3adf9SBartosz Markowski 
1462b7e3adf9SBartosz Markowski 	/* Scan specific events */
1463b7e3adf9SBartosz Markowski 	WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID,
1464b7e3adf9SBartosz Markowski 	WMI_10X_ECHO_EVENTID,
1465b7e3adf9SBartosz Markowski 	WMI_10X_DEBUG_MESG_EVENTID,
1466b7e3adf9SBartosz Markowski 	WMI_10X_UPDATE_STATS_EVENTID,
1467b7e3adf9SBartosz Markowski 
1468b7e3adf9SBartosz Markowski 	/* Instantaneous RSSI event */
1469b7e3adf9SBartosz Markowski 	WMI_10X_INST_RSSI_STATS_EVENTID,
1470b7e3adf9SBartosz Markowski 
1471b7e3adf9SBartosz Markowski 	/* VDEV specific events */
1472b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_START_RESP_EVENTID,
1473b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_STANDBY_REQ_EVENTID,
1474b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_RESUME_REQ_EVENTID,
1475b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_STOPPED_EVENTID,
1476b7e3adf9SBartosz Markowski 
1477b7e3adf9SBartosz Markowski 	/* peer  specific events */
1478b7e3adf9SBartosz Markowski 	WMI_10X_PEER_STA_KICKOUT_EVENTID,
1479b7e3adf9SBartosz Markowski 
1480b7e3adf9SBartosz Markowski 	/* beacon/mgmt specific events */
1481b7e3adf9SBartosz Markowski 	WMI_10X_HOST_SWBA_EVENTID,
1482b7e3adf9SBartosz Markowski 	WMI_10X_TBTTOFFSET_UPDATE_EVENTID,
1483b7e3adf9SBartosz Markowski 	WMI_10X_MGMT_RX_EVENTID,
1484b7e3adf9SBartosz Markowski 
1485b7e3adf9SBartosz Markowski 	/* Channel stats event */
1486b7e3adf9SBartosz Markowski 	WMI_10X_CHAN_INFO_EVENTID,
1487b7e3adf9SBartosz Markowski 
1488b7e3adf9SBartosz Markowski 	/* PHY Error specific WMI event */
1489b7e3adf9SBartosz Markowski 	WMI_10X_PHYERR_EVENTID,
1490b7e3adf9SBartosz Markowski 
1491b7e3adf9SBartosz Markowski 	/* Roam event to trigger roaming on host */
1492b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_EVENTID,
1493b7e3adf9SBartosz Markowski 
1494b7e3adf9SBartosz Markowski 	/* matching AP found from list of profiles */
1495b7e3adf9SBartosz Markowski 	WMI_10X_PROFILE_MATCH,
1496b7e3adf9SBartosz Markowski 
1497b7e3adf9SBartosz Markowski 	/* debug print message used for tracing FW code while debugging */
1498b7e3adf9SBartosz Markowski 	WMI_10X_DEBUG_PRINT_EVENTID,
1499b7e3adf9SBartosz Markowski 	/* VI spoecific event */
1500b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_QVIT_EVENTID,
1501b7e3adf9SBartosz Markowski 	/* FW code profile data in response to profile request */
1502b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_DATA_EVENTID,
1503b7e3adf9SBartosz Markowski 
1504b7e3adf9SBartosz Markowski 	/*RTT related event ID*/
1505b7e3adf9SBartosz Markowski 	WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID,
1506b7e3adf9SBartosz Markowski 	WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID,
1507b7e3adf9SBartosz Markowski 	WMI_10X_RTT_ERROR_REPORT_EVENTID,
1508b7e3adf9SBartosz Markowski 
1509b7e3adf9SBartosz Markowski 	WMI_10X_WOW_WAKEUP_HOST_EVENTID,
1510b7e3adf9SBartosz Markowski 	WMI_10X_DCS_INTERFERENCE_EVENTID,
1511b7e3adf9SBartosz Markowski 
1512b7e3adf9SBartosz Markowski 	/* TPC config for the current operating channel */
1513b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_TPC_CONFIG_EVENTID,
1514b7e3adf9SBartosz Markowski 
1515b7e3adf9SBartosz Markowski 	WMI_10X_GPIO_INPUT_EVENTID,
1516b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID - 1,
1517b7e3adf9SBartosz Markowski };
1518b7e3adf9SBartosz Markowski 
151924c88f78SMichal Kazior enum wmi_10_2_cmd_id {
152024c88f78SMichal Kazior 	WMI_10_2_START_CMDID = 0x9000,
152124c88f78SMichal Kazior 	WMI_10_2_END_CMDID = 0x9FFF,
152224c88f78SMichal Kazior 	WMI_10_2_INIT_CMDID,
152324c88f78SMichal Kazior 	WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID,
152424c88f78SMichal Kazior 	WMI_10_2_STOP_SCAN_CMDID,
152524c88f78SMichal Kazior 	WMI_10_2_SCAN_CHAN_LIST_CMDID,
152624c88f78SMichal Kazior 	WMI_10_2_ECHO_CMDID,
152724c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
152824c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_CHANNEL_CMDID,
152924c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_PARAM_CMDID,
153024c88f78SMichal Kazior 	WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
153124c88f78SMichal Kazior 	WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
153224c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
153324c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
153424c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
153524c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
153624c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
153724c88f78SMichal Kazior 	WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
153824c88f78SMichal Kazior 	WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
153924c88f78SMichal Kazior 	WMI_10_2_VDEV_CREATE_CMDID,
154024c88f78SMichal Kazior 	WMI_10_2_VDEV_DELETE_CMDID,
154124c88f78SMichal Kazior 	WMI_10_2_VDEV_START_REQUEST_CMDID,
154224c88f78SMichal Kazior 	WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
154324c88f78SMichal Kazior 	WMI_10_2_VDEV_UP_CMDID,
154424c88f78SMichal Kazior 	WMI_10_2_VDEV_STOP_CMDID,
154524c88f78SMichal Kazior 	WMI_10_2_VDEV_DOWN_CMDID,
154624c88f78SMichal Kazior 	WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID,
154724c88f78SMichal Kazior 	WMI_10_2_VDEV_RESUME_RESPONSE_CMDID,
154824c88f78SMichal Kazior 	WMI_10_2_VDEV_SET_PARAM_CMDID,
154924c88f78SMichal Kazior 	WMI_10_2_VDEV_INSTALL_KEY_CMDID,
155024c88f78SMichal Kazior 	WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID,
155124c88f78SMichal Kazior 	WMI_10_2_PEER_CREATE_CMDID,
155224c88f78SMichal Kazior 	WMI_10_2_PEER_DELETE_CMDID,
155324c88f78SMichal Kazior 	WMI_10_2_PEER_FLUSH_TIDS_CMDID,
155424c88f78SMichal Kazior 	WMI_10_2_PEER_SET_PARAM_CMDID,
155524c88f78SMichal Kazior 	WMI_10_2_PEER_ASSOC_CMDID,
155624c88f78SMichal Kazior 	WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
155724c88f78SMichal Kazior 	WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID,
155824c88f78SMichal Kazior 	WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
155924c88f78SMichal Kazior 	WMI_10_2_PEER_MCAST_GROUP_CMDID,
156024c88f78SMichal Kazior 	WMI_10_2_BCN_TX_CMDID,
156124c88f78SMichal Kazior 	WMI_10_2_BCN_PRB_TMPL_CMDID,
156224c88f78SMichal Kazior 	WMI_10_2_BCN_FILTER_RX_CMDID,
156324c88f78SMichal Kazior 	WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
156424c88f78SMichal Kazior 	WMI_10_2_MGMT_TX_CMDID,
156524c88f78SMichal Kazior 	WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
156624c88f78SMichal Kazior 	WMI_10_2_ADDBA_SEND_CMDID,
156724c88f78SMichal Kazior 	WMI_10_2_ADDBA_STATUS_CMDID,
156824c88f78SMichal Kazior 	WMI_10_2_DELBA_SEND_CMDID,
156924c88f78SMichal Kazior 	WMI_10_2_ADDBA_SET_RESP_CMDID,
157024c88f78SMichal Kazior 	WMI_10_2_SEND_SINGLEAMSDU_CMDID,
157124c88f78SMichal Kazior 	WMI_10_2_STA_POWERSAVE_MODE_CMDID,
157224c88f78SMichal Kazior 	WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
157324c88f78SMichal Kazior 	WMI_10_2_STA_MIMO_PS_MODE_CMDID,
157424c88f78SMichal Kazior 	WMI_10_2_DBGLOG_CFG_CMDID,
157524c88f78SMichal Kazior 	WMI_10_2_PDEV_DFS_ENABLE_CMDID,
157624c88f78SMichal Kazior 	WMI_10_2_PDEV_DFS_DISABLE_CMDID,
157724c88f78SMichal Kazior 	WMI_10_2_PDEV_QVIT_CMDID,
157824c88f78SMichal Kazior 	WMI_10_2_ROAM_SCAN_MODE,
157924c88f78SMichal Kazior 	WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
158024c88f78SMichal Kazior 	WMI_10_2_ROAM_SCAN_PERIOD,
158124c88f78SMichal Kazior 	WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
158224c88f78SMichal Kazior 	WMI_10_2_ROAM_AP_PROFILE,
158324c88f78SMichal Kazior 	WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
158424c88f78SMichal Kazior 	WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
158524c88f78SMichal Kazior 	WMI_10_2_OFL_SCAN_PERIOD,
158624c88f78SMichal Kazior 	WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
158724c88f78SMichal Kazior 	WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
158824c88f78SMichal Kazior 	WMI_10_2_P2P_GO_SET_BEACON_IE,
158924c88f78SMichal Kazior 	WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
159024c88f78SMichal Kazior 	WMI_10_2_AP_PS_PEER_PARAM_CMDID,
159124c88f78SMichal Kazior 	WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID,
159224c88f78SMichal Kazior 	WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
159324c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
159424c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
159524c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
159624c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
159724c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
159824c88f78SMichal Kazior 	WMI_10_2_PDEV_SUSPEND_CMDID,
159924c88f78SMichal Kazior 	WMI_10_2_PDEV_RESUME_CMDID,
160024c88f78SMichal Kazior 	WMI_10_2_ADD_BCN_FILTER_CMDID,
160124c88f78SMichal Kazior 	WMI_10_2_RMV_BCN_FILTER_CMDID,
160224c88f78SMichal Kazior 	WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
160324c88f78SMichal Kazior 	WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
160424c88f78SMichal Kazior 	WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
160524c88f78SMichal Kazior 	WMI_10_2_WOW_ENABLE_CMDID,
160624c88f78SMichal Kazior 	WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
160724c88f78SMichal Kazior 	WMI_10_2_RTT_MEASREQ_CMDID,
160824c88f78SMichal Kazior 	WMI_10_2_RTT_TSF_CMDID,
160924c88f78SMichal Kazior 	WMI_10_2_RTT_KEEPALIVE_CMDID,
161024c88f78SMichal Kazior 	WMI_10_2_PDEV_SEND_BCN_CMDID,
161124c88f78SMichal Kazior 	WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
161224c88f78SMichal Kazior 	WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
161324c88f78SMichal Kazior 	WMI_10_2_REQUEST_STATS_CMDID,
161424c88f78SMichal Kazior 	WMI_10_2_GPIO_CONFIG_CMDID,
161524c88f78SMichal Kazior 	WMI_10_2_GPIO_OUTPUT_CMDID,
161624c88f78SMichal Kazior 	WMI_10_2_VDEV_RATEMASK_CMDID,
161724c88f78SMichal Kazior 	WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID,
161824c88f78SMichal Kazior 	WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
161924c88f78SMichal Kazior 	WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
162024c88f78SMichal Kazior 	WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
162124c88f78SMichal Kazior 	WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
162224c88f78SMichal Kazior 	WMI_10_2_FORCE_FW_HANG_CMDID,
162324c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
162424c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_CTL_TABLE_CMDID,
162524c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID,
162624c88f78SMichal Kazior 	WMI_10_2_PDEV_RATEPWR_TABLE_CMDID,
162724c88f78SMichal Kazior 	WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1628a57a6a27SRajkumar Manoharan 	WMI_10_2_PDEV_GET_INFO,
1629a57a6a27SRajkumar Manoharan 	WMI_10_2_VDEV_GET_INFO,
1630a57a6a27SRajkumar Manoharan 	WMI_10_2_VDEV_ATF_REQUEST_CMDID,
1631a57a6a27SRajkumar Manoharan 	WMI_10_2_PEER_ATF_REQUEST_CMDID,
1632a57a6a27SRajkumar Manoharan 	WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
163362f77f09SMaharaja 	WMI_10_2_MU_CAL_START_CMDID,
163462f77f09SMaharaja 	WMI_10_2_SET_LTEU_CONFIG_CMDID,
163562f77f09SMaharaja 	WMI_10_2_SET_CCA_PARAMS,
1636dd2c5fcbSRajkumar Manoharan 	WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
163784758d4dSBhagavathi Perumal S 	WMI_10_2_FWTEST_CMDID,
163884758d4dSBhagavathi Perumal S 	WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID,
163924c88f78SMichal Kazior 	WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1,
164024c88f78SMichal Kazior };
164124c88f78SMichal Kazior 
164224c88f78SMichal Kazior enum wmi_10_2_event_id {
164324c88f78SMichal Kazior 	WMI_10_2_SERVICE_READY_EVENTID = 0x8000,
164424c88f78SMichal Kazior 	WMI_10_2_READY_EVENTID,
164524c88f78SMichal Kazior 	WMI_10_2_DEBUG_MESG_EVENTID,
164624c88f78SMichal Kazior 	WMI_10_2_START_EVENTID = 0x9000,
164724c88f78SMichal Kazior 	WMI_10_2_END_EVENTID = 0x9FFF,
164824c88f78SMichal Kazior 	WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID,
164924c88f78SMichal Kazior 	WMI_10_2_ECHO_EVENTID,
165024c88f78SMichal Kazior 	WMI_10_2_UPDATE_STATS_EVENTID,
165124c88f78SMichal Kazior 	WMI_10_2_INST_RSSI_STATS_EVENTID,
165224c88f78SMichal Kazior 	WMI_10_2_VDEV_START_RESP_EVENTID,
165324c88f78SMichal Kazior 	WMI_10_2_VDEV_STANDBY_REQ_EVENTID,
165424c88f78SMichal Kazior 	WMI_10_2_VDEV_RESUME_REQ_EVENTID,
165524c88f78SMichal Kazior 	WMI_10_2_VDEV_STOPPED_EVENTID,
165624c88f78SMichal Kazior 	WMI_10_2_PEER_STA_KICKOUT_EVENTID,
165724c88f78SMichal Kazior 	WMI_10_2_HOST_SWBA_EVENTID,
165824c88f78SMichal Kazior 	WMI_10_2_TBTTOFFSET_UPDATE_EVENTID,
165924c88f78SMichal Kazior 	WMI_10_2_MGMT_RX_EVENTID,
166024c88f78SMichal Kazior 	WMI_10_2_CHAN_INFO_EVENTID,
166124c88f78SMichal Kazior 	WMI_10_2_PHYERR_EVENTID,
166224c88f78SMichal Kazior 	WMI_10_2_ROAM_EVENTID,
166324c88f78SMichal Kazior 	WMI_10_2_PROFILE_MATCH,
166424c88f78SMichal Kazior 	WMI_10_2_DEBUG_PRINT_EVENTID,
166524c88f78SMichal Kazior 	WMI_10_2_PDEV_QVIT_EVENTID,
166624c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_DATA_EVENTID,
166724c88f78SMichal Kazior 	WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID,
166824c88f78SMichal Kazior 	WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID,
166924c88f78SMichal Kazior 	WMI_10_2_RTT_ERROR_REPORT_EVENTID,
167024c88f78SMichal Kazior 	WMI_10_2_RTT_KEEPALIVE_EVENTID,
167124c88f78SMichal Kazior 	WMI_10_2_WOW_WAKEUP_HOST_EVENTID,
167224c88f78SMichal Kazior 	WMI_10_2_DCS_INTERFERENCE_EVENTID,
167324c88f78SMichal Kazior 	WMI_10_2_PDEV_TPC_CONFIG_EVENTID,
167424c88f78SMichal Kazior 	WMI_10_2_GPIO_INPUT_EVENTID,
167524c88f78SMichal Kazior 	WMI_10_2_PEER_RATECODE_LIST_EVENTID,
167624c88f78SMichal Kazior 	WMI_10_2_GENERIC_BUFFER_EVENTID,
167724c88f78SMichal Kazior 	WMI_10_2_MCAST_BUF_RELEASE_EVENTID,
167824c88f78SMichal Kazior 	WMI_10_2_MCAST_LIST_AGEOUT_EVENTID,
167924c88f78SMichal Kazior 	WMI_10_2_WDS_PEER_EVENTID,
1680a57a6a27SRajkumar Manoharan 	WMI_10_2_PEER_STA_PS_STATECHG_EVENTID,
1681a57a6a27SRajkumar Manoharan 	WMI_10_2_PDEV_TEMPERATURE_EVENTID,
1682dd2c5fcbSRajkumar Manoharan 	WMI_10_2_MU_REPORT_EVENTID,
1683dd2c5fcbSRajkumar Manoharan 	WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID,
168424c88f78SMichal Kazior 	WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1,
168524c88f78SMichal Kazior };
168624c88f78SMichal Kazior 
16872d491e69SRaja Mani enum wmi_10_4_cmd_id {
16882d491e69SRaja Mani 	WMI_10_4_START_CMDID = 0x9000,
16892d491e69SRaja Mani 	WMI_10_4_END_CMDID = 0x9FFF,
16902d491e69SRaja Mani 	WMI_10_4_INIT_CMDID,
16912d491e69SRaja Mani 	WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID,
16922d491e69SRaja Mani 	WMI_10_4_STOP_SCAN_CMDID,
16932d491e69SRaja Mani 	WMI_10_4_SCAN_CHAN_LIST_CMDID,
16942d491e69SRaja Mani 	WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
16952d491e69SRaja Mani 	WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
16962d491e69SRaja Mani 	WMI_10_4_ECHO_CMDID,
16972d491e69SRaja Mani 	WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
16982d491e69SRaja Mani 	WMI_10_4_PDEV_SET_CHANNEL_CMDID,
16992d491e69SRaja Mani 	WMI_10_4_PDEV_SET_PARAM_CMDID,
17002d491e69SRaja Mani 	WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
17012d491e69SRaja Mani 	WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
17022d491e69SRaja Mani 	WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
17032d491e69SRaja Mani 	WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
17042d491e69SRaja Mani 	WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
17052d491e69SRaja Mani 	WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
17062d491e69SRaja Mani 	WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
17072d491e69SRaja Mani 	WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
17082d491e69SRaja Mani 	WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
17092d491e69SRaja Mani 	WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
17102d491e69SRaja Mani 	WMI_10_4_VDEV_CREATE_CMDID,
17112d491e69SRaja Mani 	WMI_10_4_VDEV_DELETE_CMDID,
17122d491e69SRaja Mani 	WMI_10_4_VDEV_START_REQUEST_CMDID,
17132d491e69SRaja Mani 	WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
17142d491e69SRaja Mani 	WMI_10_4_VDEV_UP_CMDID,
17152d491e69SRaja Mani 	WMI_10_4_VDEV_STOP_CMDID,
17162d491e69SRaja Mani 	WMI_10_4_VDEV_DOWN_CMDID,
17172d491e69SRaja Mani 	WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
17182d491e69SRaja Mani 	WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
17192d491e69SRaja Mani 	WMI_10_4_VDEV_SET_PARAM_CMDID,
17202d491e69SRaja Mani 	WMI_10_4_VDEV_INSTALL_KEY_CMDID,
17212d491e69SRaja Mani 	WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
17222d491e69SRaja Mani 	WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
17232d491e69SRaja Mani 	WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
17242d491e69SRaja Mani 	WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
17252d491e69SRaja Mani 	WMI_10_4_PEER_CREATE_CMDID,
17262d491e69SRaja Mani 	WMI_10_4_PEER_DELETE_CMDID,
17272d491e69SRaja Mani 	WMI_10_4_PEER_FLUSH_TIDS_CMDID,
17282d491e69SRaja Mani 	WMI_10_4_PEER_SET_PARAM_CMDID,
17292d491e69SRaja Mani 	WMI_10_4_PEER_ASSOC_CMDID,
17302d491e69SRaja Mani 	WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
17312d491e69SRaja Mani 	WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
17322d491e69SRaja Mani 	WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
17332d491e69SRaja Mani 	WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
17342d491e69SRaja Mani 	WMI_10_4_PEER_MCAST_GROUP_CMDID,
17352d491e69SRaja Mani 	WMI_10_4_BCN_TX_CMDID,
17362d491e69SRaja Mani 	WMI_10_4_PDEV_SEND_BCN_CMDID,
17372d491e69SRaja Mani 	WMI_10_4_BCN_PRB_TMPL_CMDID,
17382d491e69SRaja Mani 	WMI_10_4_BCN_FILTER_RX_CMDID,
17392d491e69SRaja Mani 	WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
17402d491e69SRaja Mani 	WMI_10_4_MGMT_TX_CMDID,
17412d491e69SRaja Mani 	WMI_10_4_PRB_TMPL_CMDID,
17422d491e69SRaja Mani 	WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
17432d491e69SRaja Mani 	WMI_10_4_ADDBA_SEND_CMDID,
17442d491e69SRaja Mani 	WMI_10_4_ADDBA_STATUS_CMDID,
17452d491e69SRaja Mani 	WMI_10_4_DELBA_SEND_CMDID,
17462d491e69SRaja Mani 	WMI_10_4_ADDBA_SET_RESP_CMDID,
17472d491e69SRaja Mani 	WMI_10_4_SEND_SINGLEAMSDU_CMDID,
17482d491e69SRaja Mani 	WMI_10_4_STA_POWERSAVE_MODE_CMDID,
17492d491e69SRaja Mani 	WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
17502d491e69SRaja Mani 	WMI_10_4_STA_MIMO_PS_MODE_CMDID,
17512d491e69SRaja Mani 	WMI_10_4_DBGLOG_CFG_CMDID,
17522d491e69SRaja Mani 	WMI_10_4_PDEV_DFS_ENABLE_CMDID,
17532d491e69SRaja Mani 	WMI_10_4_PDEV_DFS_DISABLE_CMDID,
17542d491e69SRaja Mani 	WMI_10_4_PDEV_QVIT_CMDID,
17552d491e69SRaja Mani 	WMI_10_4_ROAM_SCAN_MODE,
17562d491e69SRaja Mani 	WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
17572d491e69SRaja Mani 	WMI_10_4_ROAM_SCAN_PERIOD,
17582d491e69SRaja Mani 	WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
17592d491e69SRaja Mani 	WMI_10_4_ROAM_AP_PROFILE,
17602d491e69SRaja Mani 	WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
17612d491e69SRaja Mani 	WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
17622d491e69SRaja Mani 	WMI_10_4_OFL_SCAN_PERIOD,
17632d491e69SRaja Mani 	WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
17642d491e69SRaja Mani 	WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
17652d491e69SRaja Mani 	WMI_10_4_P2P_GO_SET_BEACON_IE,
17662d491e69SRaja Mani 	WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
17672d491e69SRaja Mani 	WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
17682d491e69SRaja Mani 	WMI_10_4_AP_PS_PEER_PARAM_CMDID,
17692d491e69SRaja Mani 	WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
17702d491e69SRaja Mani 	WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
17712d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
17722d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
17732d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
17742d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
17752d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
17762d491e69SRaja Mani 	WMI_10_4_PDEV_SUSPEND_CMDID,
17772d491e69SRaja Mani 	WMI_10_4_PDEV_RESUME_CMDID,
17782d491e69SRaja Mani 	WMI_10_4_ADD_BCN_FILTER_CMDID,
17792d491e69SRaja Mani 	WMI_10_4_RMV_BCN_FILTER_CMDID,
17802d491e69SRaja Mani 	WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
17812d491e69SRaja Mani 	WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
17822d491e69SRaja Mani 	WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
17832d491e69SRaja Mani 	WMI_10_4_WOW_ENABLE_CMDID,
17842d491e69SRaja Mani 	WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
17852d491e69SRaja Mani 	WMI_10_4_RTT_MEASREQ_CMDID,
17862d491e69SRaja Mani 	WMI_10_4_RTT_TSF_CMDID,
17872d491e69SRaja Mani 	WMI_10_4_RTT_KEEPALIVE_CMDID,
17882d491e69SRaja Mani 	WMI_10_4_OEM_REQ_CMDID,
17892d491e69SRaja Mani 	WMI_10_4_NAN_CMDID,
17902d491e69SRaja Mani 	WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
17912d491e69SRaja Mani 	WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
17922d491e69SRaja Mani 	WMI_10_4_REQUEST_STATS_CMDID,
17932d491e69SRaja Mani 	WMI_10_4_GPIO_CONFIG_CMDID,
17942d491e69SRaja Mani 	WMI_10_4_GPIO_OUTPUT_CMDID,
17952d491e69SRaja Mani 	WMI_10_4_VDEV_RATEMASK_CMDID,
17962d491e69SRaja Mani 	WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
17972d491e69SRaja Mani 	WMI_10_4_GTK_OFFLOAD_CMDID,
17982d491e69SRaja Mani 	WMI_10_4_QBOOST_CFG_CMDID,
17992d491e69SRaja Mani 	WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
18002d491e69SRaja Mani 	WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
18012d491e69SRaja Mani 	WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
18022d491e69SRaja Mani 	WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
18032d491e69SRaja Mani 	WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
18042d491e69SRaja Mani 	WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
18052d491e69SRaja Mani 	WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
18062d491e69SRaja Mani 	WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
18072d491e69SRaja Mani 	WMI_10_4_FORCE_FW_HANG_CMDID,
18082d491e69SRaja Mani 	WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
18092d491e69SRaja Mani 	WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
18102d491e69SRaja Mani 	WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
18112d491e69SRaja Mani 	WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
18122d491e69SRaja Mani 	WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
18132d491e69SRaja Mani 	WMI_10_4_PDEV_FIPS_CMDID,
18142d491e69SRaja Mani 	WMI_10_4_TT_SET_CONF_CMDID,
18152d491e69SRaja Mani 	WMI_10_4_FWTEST_CMDID,
18162d491e69SRaja Mani 	WMI_10_4_VDEV_ATF_REQUEST_CMDID,
18172d491e69SRaja Mani 	WMI_10_4_PEER_ATF_REQUEST_CMDID,
18182d491e69SRaja Mani 	WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
18192d491e69SRaja Mani 	WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
18202d491e69SRaja Mani 	WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
18212d491e69SRaja Mani 	WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
18222d491e69SRaja Mani 	WMI_10_4_PDEV_GET_TPC_CMDID,
18232d491e69SRaja Mani 	WMI_10_4_PDEV_GET_AST_INFO_CMDID,
18242d491e69SRaja Mani 	WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
18252d491e69SRaja Mani 	WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
18262d491e69SRaja Mani 	WMI_10_4_PDEV_GET_INFO_CMDID,
18272d491e69SRaja Mani 	WMI_10_4_VDEV_GET_INFO_CMDID,
18282d491e69SRaja Mani 	WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
18292d491e69SRaja Mani 	WMI_10_4_MU_CAL_START_CMDID,
18302d491e69SRaja Mani 	WMI_10_4_SET_CCA_PARAMS_CMDID,
18312d491e69SRaja Mani 	WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
183269d4315cSVasanthakumar Thiagarajan 	WMI_10_4_EXT_RESOURCE_CFG_CMDID,
183369d4315cSVasanthakumar Thiagarajan 	WMI_10_4_VDEV_SET_IE_CMDID,
183469d4315cSVasanthakumar Thiagarajan 	WMI_10_4_SET_LTEU_CONFIG_CMDID,
1835add6cd8dSManikanta Pubbisetty 	WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
1836add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
1837add6cd8dSManikanta Pubbisetty 	WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1838add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_BWF_REQUEST_CMDID,
1839add6cd8dSManikanta Pubbisetty 	WMI_10_4_BTCOEX_CFG_CMDID,
1840add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
1841add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
1842add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
1843add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
1844add6cd8dSManikanta Pubbisetty 	WMI_10_4_COEX_VERSION_CFG_CMID,
1845add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
1846add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
1847add6cd8dSManikanta Pubbisetty 	WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
1848add6cd8dSManikanta Pubbisetty 	WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
1849add6cd8dSManikanta Pubbisetty 	WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
1850add6cd8dSManikanta Pubbisetty 	WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
1851add6cd8dSManikanta Pubbisetty 	WMI_10_4_GET_TSF_TIMER_CMDID,
1852add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
1853add6cd8dSManikanta Pubbisetty 	WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
1854add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
1855add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_SET_STATE_CMDID,
1856add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_PEER_UPDATE_CMDID,
1857add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
18586f6eb1bcSSriram R 	WMI_10_4_PDEV_SEND_FD_CMDID,
18596f6eb1bcSSriram R 	WMI_10_4_ENABLE_FILS_CMDID,
18606f6eb1bcSSriram R 	WMI_10_4_PDEV_SET_BRIDGE_MACADDR_CMDID,
18616f6eb1bcSSriram R 	WMI_10_4_ATF_GROUP_WMM_AC_CONFIG_REQUEST_CMDID,
18626f6eb1bcSSriram R 	WMI_10_4_RADAR_FOUND_CMDID,
18632d491e69SRaja Mani 	WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1,
18642d491e69SRaja Mani };
18652d491e69SRaja Mani 
18662d491e69SRaja Mani enum wmi_10_4_event_id {
18672d491e69SRaja Mani 	WMI_10_4_SERVICE_READY_EVENTID = 0x8000,
18682d491e69SRaja Mani 	WMI_10_4_READY_EVENTID,
18692d491e69SRaja Mani 	WMI_10_4_DEBUG_MESG_EVENTID,
18702d491e69SRaja Mani 	WMI_10_4_START_EVENTID = 0x9000,
18712d491e69SRaja Mani 	WMI_10_4_END_EVENTID = 0x9FFF,
18722d491e69SRaja Mani 	WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID,
18732d491e69SRaja Mani 	WMI_10_4_ECHO_EVENTID,
18742d491e69SRaja Mani 	WMI_10_4_UPDATE_STATS_EVENTID,
18752d491e69SRaja Mani 	WMI_10_4_INST_RSSI_STATS_EVENTID,
18762d491e69SRaja Mani 	WMI_10_4_VDEV_START_RESP_EVENTID,
18772d491e69SRaja Mani 	WMI_10_4_VDEV_STANDBY_REQ_EVENTID,
18782d491e69SRaja Mani 	WMI_10_4_VDEV_RESUME_REQ_EVENTID,
18792d491e69SRaja Mani 	WMI_10_4_VDEV_STOPPED_EVENTID,
18802d491e69SRaja Mani 	WMI_10_4_PEER_STA_KICKOUT_EVENTID,
18812d491e69SRaja Mani 	WMI_10_4_HOST_SWBA_EVENTID,
18822d491e69SRaja Mani 	WMI_10_4_TBTTOFFSET_UPDATE_EVENTID,
18832d491e69SRaja Mani 	WMI_10_4_MGMT_RX_EVENTID,
18842d491e69SRaja Mani 	WMI_10_4_CHAN_INFO_EVENTID,
18852d491e69SRaja Mani 	WMI_10_4_PHYERR_EVENTID,
18862d491e69SRaja Mani 	WMI_10_4_ROAM_EVENTID,
18872d491e69SRaja Mani 	WMI_10_4_PROFILE_MATCH,
18882d491e69SRaja Mani 	WMI_10_4_DEBUG_PRINT_EVENTID,
18892d491e69SRaja Mani 	WMI_10_4_PDEV_QVIT_EVENTID,
18902d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_DATA_EVENTID,
18912d491e69SRaja Mani 	WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID,
18922d491e69SRaja Mani 	WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID,
18932d491e69SRaja Mani 	WMI_10_4_RTT_ERROR_REPORT_EVENTID,
18942d491e69SRaja Mani 	WMI_10_4_RTT_KEEPALIVE_EVENTID,
18952d491e69SRaja Mani 	WMI_10_4_OEM_CAPABILITY_EVENTID,
18962d491e69SRaja Mani 	WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID,
18972d491e69SRaja Mani 	WMI_10_4_OEM_ERROR_REPORT_EVENTID,
18982d491e69SRaja Mani 	WMI_10_4_NAN_EVENTID,
18992d491e69SRaja Mani 	WMI_10_4_WOW_WAKEUP_HOST_EVENTID,
19002d491e69SRaja Mani 	WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID,
19012d491e69SRaja Mani 	WMI_10_4_GTK_REKEY_FAIL_EVENTID,
19022d491e69SRaja Mani 	WMI_10_4_DCS_INTERFERENCE_EVENTID,
19032d491e69SRaja Mani 	WMI_10_4_PDEV_TPC_CONFIG_EVENTID,
19042d491e69SRaja Mani 	WMI_10_4_CSA_HANDLING_EVENTID,
19052d491e69SRaja Mani 	WMI_10_4_GPIO_INPUT_EVENTID,
19062d491e69SRaja Mani 	WMI_10_4_PEER_RATECODE_LIST_EVENTID,
19072d491e69SRaja Mani 	WMI_10_4_GENERIC_BUFFER_EVENTID,
19082d491e69SRaja Mani 	WMI_10_4_MCAST_BUF_RELEASE_EVENTID,
19092d491e69SRaja Mani 	WMI_10_4_MCAST_LIST_AGEOUT_EVENTID,
19102d491e69SRaja Mani 	WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID,
19112d491e69SRaja Mani 	WMI_10_4_WDS_PEER_EVENTID,
19122d491e69SRaja Mani 	WMI_10_4_PEER_STA_PS_STATECHG_EVENTID,
19132d491e69SRaja Mani 	WMI_10_4_PDEV_FIPS_EVENTID,
19142d491e69SRaja Mani 	WMI_10_4_TT_STATS_EVENTID,
19152d491e69SRaja Mani 	WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID,
19162d491e69SRaja Mani 	WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID,
19172d491e69SRaja Mani 	WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID,
19182d491e69SRaja Mani 	WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID,
19192d491e69SRaja Mani 	WMI_10_4_PDEV_NFCAL_POWER_EVENTID,
19202d491e69SRaja Mani 	WMI_10_4_PDEV_TPC_EVENTID,
19212d491e69SRaja Mani 	WMI_10_4_PDEV_GET_AST_INFO_EVENTID,
19222d491e69SRaja Mani 	WMI_10_4_PDEV_TEMPERATURE_EVENTID,
19232d491e69SRaja Mani 	WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
19242d491e69SRaja Mani 	WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID,
192569d4315cSVasanthakumar Thiagarajan 	WMI_10_4_MU_REPORT_EVENTID,
1926add6cd8dSManikanta Pubbisetty 	WMI_10_4_TX_DATA_TRAFFIC_CTRL_EVENTID,
1927add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_TX_MU_TXMIT_COUNT_EVENTID,
1928add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_GID_USERPOS_LIST_EVENTID,
1929add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_CHECK_CAL_VERSION_EVENTID,
1930add6cd8dSManikanta Pubbisetty 	WMI_10_4_ATF_PEER_STATS_EVENTID,
1931add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_GET_RX_FILTER_EVENTID,
1932add6cd8dSManikanta Pubbisetty 	WMI_10_4_NAC_RSSI_EVENTID,
1933add6cd8dSManikanta Pubbisetty 	WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID,
1934add6cd8dSManikanta Pubbisetty 	WMI_10_4_GET_TSF_TIMER_RESP_EVENTID,
1935add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_TPC_TABLE_EVENTID,
1936add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_WDS_ENTRY_LIST_EVENTID,
1937add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_PEER_EVENTID,
19386f6eb1bcSSriram R 	WMI_10_4_HOST_SWFDA_EVENTID,
19396f6eb1bcSSriram R 	WMI_10_4_ESP_ESTIMATE_EVENTID,
19406f6eb1bcSSriram R 	WMI_10_4_DFS_STATUS_CHECK_EVENTID,
19412d491e69SRaja Mani 	WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1,
19422d491e69SRaja Mani };
19432d491e69SRaja Mani 
19445e3dd157SKalle Valo enum wmi_phy_mode {
19455e3dd157SKalle Valo 	MODE_11A        = 0,   /* 11a Mode */
19465e3dd157SKalle Valo 	MODE_11G        = 1,   /* 11b/g Mode */
19475e3dd157SKalle Valo 	MODE_11B        = 2,   /* 11b Mode */
19485e3dd157SKalle Valo 	MODE_11GONLY    = 3,   /* 11g only Mode */
19495e3dd157SKalle Valo 	MODE_11NA_HT20   = 4,  /* 11a HT20 mode */
19505e3dd157SKalle Valo 	MODE_11NG_HT20   = 5,  /* 11g HT20 mode */
19515e3dd157SKalle Valo 	MODE_11NA_HT40   = 6,  /* 11a HT40 mode */
19525e3dd157SKalle Valo 	MODE_11NG_HT40   = 7,  /* 11g HT40 mode */
19535e3dd157SKalle Valo 	MODE_11AC_VHT20 = 8,
19545e3dd157SKalle Valo 	MODE_11AC_VHT40 = 9,
19555e3dd157SKalle Valo 	MODE_11AC_VHT80 = 10,
19565e3dd157SKalle Valo 	/*    MODE_11AC_VHT160 = 11, */
19575e3dd157SKalle Valo 	MODE_11AC_VHT20_2G = 11,
19585e3dd157SKalle Valo 	MODE_11AC_VHT40_2G = 12,
19595e3dd157SKalle Valo 	MODE_11AC_VHT80_2G = 13,
1960bc1efd73SSebastian Gottschall 	MODE_11AC_VHT80_80 = 14,
1961bc1efd73SSebastian Gottschall 	MODE_11AC_VHT160 = 15,
1962bc1efd73SSebastian Gottschall 	MODE_UNKNOWN    = 16,
1963bc1efd73SSebastian Gottschall 	MODE_MAX        = 16
19645e3dd157SKalle Valo };
19655e3dd157SKalle Valo 
196638a1d47eSKalle Valo static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode)
196738a1d47eSKalle Valo {
196838a1d47eSKalle Valo 	switch (mode) {
196938a1d47eSKalle Valo 	case MODE_11A:
197038a1d47eSKalle Valo 		return "11a";
197138a1d47eSKalle Valo 	case MODE_11G:
197238a1d47eSKalle Valo 		return "11g";
197338a1d47eSKalle Valo 	case MODE_11B:
197438a1d47eSKalle Valo 		return "11b";
197538a1d47eSKalle Valo 	case MODE_11GONLY:
197638a1d47eSKalle Valo 		return "11gonly";
197738a1d47eSKalle Valo 	case MODE_11NA_HT20:
197838a1d47eSKalle Valo 		return "11na-ht20";
197938a1d47eSKalle Valo 	case MODE_11NG_HT20:
198038a1d47eSKalle Valo 		return "11ng-ht20";
198138a1d47eSKalle Valo 	case MODE_11NA_HT40:
198238a1d47eSKalle Valo 		return "11na-ht40";
198338a1d47eSKalle Valo 	case MODE_11NG_HT40:
198438a1d47eSKalle Valo 		return "11ng-ht40";
198538a1d47eSKalle Valo 	case MODE_11AC_VHT20:
198638a1d47eSKalle Valo 		return "11ac-vht20";
198738a1d47eSKalle Valo 	case MODE_11AC_VHT40:
198838a1d47eSKalle Valo 		return "11ac-vht40";
198938a1d47eSKalle Valo 	case MODE_11AC_VHT80:
199038a1d47eSKalle Valo 		return "11ac-vht80";
1991bc1efd73SSebastian Gottschall 	case MODE_11AC_VHT160:
1992bc1efd73SSebastian Gottschall 		return "11ac-vht160";
1993bc1efd73SSebastian Gottschall 	case MODE_11AC_VHT80_80:
1994bc1efd73SSebastian Gottschall 		return "11ac-vht80+80";
199538a1d47eSKalle Valo 	case MODE_11AC_VHT20_2G:
199638a1d47eSKalle Valo 		return "11ac-vht20-2g";
199738a1d47eSKalle Valo 	case MODE_11AC_VHT40_2G:
199838a1d47eSKalle Valo 		return "11ac-vht40-2g";
199938a1d47eSKalle Valo 	case MODE_11AC_VHT80_2G:
200038a1d47eSKalle Valo 		return "11ac-vht80-2g";
200138a1d47eSKalle Valo 	case MODE_UNKNOWN:
200238a1d47eSKalle Valo 		/* skip */
200338a1d47eSKalle Valo 		break;
200438a1d47eSKalle Valo 
200538a1d47eSKalle Valo 		/* no default handler to allow compiler to check that the
200637ff1b0dSMarcin Rokicki 		 * enum is fully handled
200737ff1b0dSMarcin Rokicki 		 */
2008999eb686SYueHaibing 	}
200938a1d47eSKalle Valo 
201038a1d47eSKalle Valo 	return "<unknown>";
201138a1d47eSKalle Valo }
201238a1d47eSKalle Valo 
20135e3dd157SKalle Valo #define WMI_CHAN_LIST_TAG	0x1
20145e3dd157SKalle Valo #define WMI_SSID_LIST_TAG	0x2
20155e3dd157SKalle Valo #define WMI_BSSID_LIST_TAG	0x3
20165e3dd157SKalle Valo #define WMI_IE_TAG		0x4
20175e3dd157SKalle Valo 
20185e3dd157SKalle Valo struct wmi_channel {
20195e3dd157SKalle Valo 	__le32 mhz;
20205e3dd157SKalle Valo 	__le32 band_center_freq1;
20215e3dd157SKalle Valo 	__le32 band_center_freq2; /* valid for 11ac, 80plus80 */
20225e3dd157SKalle Valo 	union {
20235e3dd157SKalle Valo 		__le32 flags; /* WMI_CHAN_FLAG_ */
20245e3dd157SKalle Valo 		struct {
20255e3dd157SKalle Valo 			u8 mode; /* only 6 LSBs */
20265e3dd157SKalle Valo 		} __packed;
20275e3dd157SKalle Valo 	} __packed;
20285e3dd157SKalle Valo 	union {
20295e3dd157SKalle Valo 		__le32 reginfo0;
20305e3dd157SKalle Valo 		struct {
203102256930SMichal Kazior 			/* note: power unit is 0.5 dBm */
20325e3dd157SKalle Valo 			u8 min_power;
20335e3dd157SKalle Valo 			u8 max_power;
20345e3dd157SKalle Valo 			u8 reg_power;
20355e3dd157SKalle Valo 			u8 reg_classid;
20365e3dd157SKalle Valo 		} __packed;
20375e3dd157SKalle Valo 	} __packed;
20385e3dd157SKalle Valo 	union {
20395e3dd157SKalle Valo 		__le32 reginfo1;
20405e3dd157SKalle Valo 		struct {
20415e3dd157SKalle Valo 			u8 antenna_max;
2042513527c8SAlan Liu 			u8 max_tx_power;
20435e3dd157SKalle Valo 		} __packed;
20445e3dd157SKalle Valo 	} __packed;
20455e3dd157SKalle Valo } __packed;
20465e3dd157SKalle Valo 
20475e3dd157SKalle Valo struct wmi_channel_arg {
20485e3dd157SKalle Valo 	u32 freq;
20495e3dd157SKalle Valo 	u32 band_center_freq1;
2050bc1efd73SSebastian Gottschall 	u32 band_center_freq2;
20515e3dd157SKalle Valo 	bool passive;
20525e3dd157SKalle Valo 	bool allow_ibss;
20535e3dd157SKalle Valo 	bool allow_ht;
20545e3dd157SKalle Valo 	bool allow_vht;
20555e3dd157SKalle Valo 	bool ht40plus;
2056e8a50f8bSMarek Puzyniak 	bool chan_radar;
205702256930SMichal Kazior 	/* note: power unit is 0.5 dBm */
20585e3dd157SKalle Valo 	u32 min_power;
20595e3dd157SKalle Valo 	u32 max_power;
20605e3dd157SKalle Valo 	u32 max_reg_power;
20615e3dd157SKalle Valo 	u32 max_antenna_gain;
20625e3dd157SKalle Valo 	u32 reg_class_id;
20635e3dd157SKalle Valo 	enum wmi_phy_mode mode;
20645e3dd157SKalle Valo };
20655e3dd157SKalle Valo 
20665e3dd157SKalle Valo enum wmi_channel_change_cause {
20675e3dd157SKalle Valo 	WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
20685e3dd157SKalle Valo 	WMI_CHANNEL_CHANGE_CAUSE_CSA,
20695e3dd157SKalle Valo };
20705e3dd157SKalle Valo 
20715e3dd157SKalle Valo #define WMI_CHAN_FLAG_HT40_PLUS      (1 << 6)
20725e3dd157SKalle Valo #define WMI_CHAN_FLAG_PASSIVE        (1 << 7)
20735e3dd157SKalle Valo #define WMI_CHAN_FLAG_ADHOC_ALLOWED  (1 << 8)
20745e3dd157SKalle Valo #define WMI_CHAN_FLAG_AP_DISABLED    (1 << 9)
20755e3dd157SKalle Valo #define WMI_CHAN_FLAG_DFS            (1 << 10)
20765e3dd157SKalle Valo #define WMI_CHAN_FLAG_ALLOW_HT       (1 << 11)
20775e3dd157SKalle Valo #define WMI_CHAN_FLAG_ALLOW_VHT      (1 << 12)
20785e3dd157SKalle Valo 
20795e3dd157SKalle Valo /* Indicate reason for channel switch */
20805e3dd157SKalle Valo #define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13)
20815e3dd157SKalle Valo 
20825c8726ecSRaja Mani #define WMI_MAX_SPATIAL_STREAM        3 /* default max ss */
20835e3dd157SKalle Valo 
20845e3dd157SKalle Valo /* HT Capabilities*/
20855e3dd157SKalle Valo #define WMI_HT_CAP_ENABLED                0x0001   /* HT Enabled/ disabled */
20865e3dd157SKalle Valo #define WMI_HT_CAP_HT20_SGI       0x0002   /* Short Guard Interval with HT20 */
20875e3dd157SKalle Valo #define WMI_HT_CAP_DYNAMIC_SMPS           0x0004   /* Dynamic MIMO powersave */
20885e3dd157SKalle Valo #define WMI_HT_CAP_TX_STBC                0x0008   /* B3 TX STBC */
20895e3dd157SKalle Valo #define WMI_HT_CAP_TX_STBC_MASK_SHIFT     3
20905e3dd157SKalle Valo #define WMI_HT_CAP_RX_STBC                0x0030   /* B4-B5 RX STBC */
20915e3dd157SKalle Valo #define WMI_HT_CAP_RX_STBC_MASK_SHIFT     4
20925e3dd157SKalle Valo #define WMI_HT_CAP_LDPC                   0x0040   /* LDPC supported */
20935e3dd157SKalle Valo #define WMI_HT_CAP_L_SIG_TXOP_PROT        0x0080   /* L-SIG TXOP Protection */
20945e3dd157SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY           0x0700   /* MPDU Density */
20955e3dd157SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
20965e3dd157SKalle Valo #define WMI_HT_CAP_HT40_SGI               0x0800
2097ff488d0eSSurabhi Vishnoi #define WMI_HT_CAP_RX_LDPC                0x1000   /* LDPC RX support */
2098ff488d0eSSurabhi Vishnoi #define WMI_HT_CAP_TX_LDPC                0x2000   /* LDPC TX support */
20995e3dd157SKalle Valo 
21005e3dd157SKalle Valo #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED       | \
21015e3dd157SKalle Valo 				WMI_HT_CAP_HT20_SGI      | \
21025e3dd157SKalle Valo 				WMI_HT_CAP_HT40_SGI      | \
21035e3dd157SKalle Valo 				WMI_HT_CAP_TX_STBC       | \
21045e3dd157SKalle Valo 				WMI_HT_CAP_RX_STBC       | \
21055e3dd157SKalle Valo 				WMI_HT_CAP_LDPC)
21065e3dd157SKalle Valo 
21075e3dd157SKalle Valo /*
21085e3dd157SKalle Valo  * WMI_VHT_CAP_* these maps to ieee 802.11ac vht capability information
21095e3dd157SKalle Valo  * field. The fields not defined here are not supported, or reserved.
21105e3dd157SKalle Valo  * Do not change these masks and if you have to add new one follow the
21115e3dd157SKalle Valo  * bitmask as specified by 802.11ac draft.
21125e3dd157SKalle Valo  */
21135e3dd157SKalle Valo 
21145e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK            0x00000003
21155e3dd157SKalle Valo #define WMI_VHT_CAP_RX_LDPC                      0x00000010
21165e3dd157SKalle Valo #define WMI_VHT_CAP_SGI_80MHZ                    0x00000020
2117bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_SGI_160MHZ                   0x00000040
21185e3dd157SKalle Valo #define WMI_VHT_CAP_TX_STBC                      0x00000080
21195e3dd157SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK                 0x00000300
21205e3dd157SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT           8
2121bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_SU_BFER                      0x00000800
2122bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_SU_BFEE                      0x00001000
2123bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_CS_ANT_MASK              0x0000E000
2124bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT        13
2125bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_SND_DIM_MASK             0x00070000
2126bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT       16
2127bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MU_BFER                      0x00080000
2128bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MU_BFEE                      0x00100000
21295e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP            0x03800000
21305e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT      23
21315e3dd157SKalle Valo #define WMI_VHT_CAP_RX_FIXED_ANT                 0x10000000
21325e3dd157SKalle Valo #define WMI_VHT_CAP_TX_FIXED_ANT                 0x20000000
21335e3dd157SKalle Valo 
21345e3dd157SKalle Valo /* The following also refer for max HT AMSDU */
21355e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_3839            0x00000000
21365e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_7935            0x00000001
21375e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_11454           0x00000002
21385e3dd157SKalle Valo 
21395e3dd157SKalle Valo #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454  | \
21405e3dd157SKalle Valo 				 WMI_VHT_CAP_RX_LDPC             | \
21415e3dd157SKalle Valo 				 WMI_VHT_CAP_SGI_80MHZ           | \
21425e3dd157SKalle Valo 				 WMI_VHT_CAP_TX_STBC             | \
21435e3dd157SKalle Valo 				 WMI_VHT_CAP_RX_STBC_MASK        | \
21445e3dd157SKalle Valo 				 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP   | \
21455e3dd157SKalle Valo 				 WMI_VHT_CAP_RX_FIXED_ANT        | \
21465e3dd157SKalle Valo 				 WMI_VHT_CAP_TX_FIXED_ANT)
21475e3dd157SKalle Valo 
21485e3dd157SKalle Valo /*
21495e3dd157SKalle Valo  * Interested readers refer to Rx/Tx MCS Map definition as defined in
21505e3dd157SKalle Valo  * 802.11ac
21515e3dd157SKalle Valo  */
21525e3dd157SKalle Valo #define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss)      ((3 & (r)) << (((ss) - 1) << 1))
21535e3dd157SKalle Valo #define WMI_VHT_MAX_SUPP_RATE_MASK           0x1fff0000
21545e3dd157SKalle Valo #define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT     16
21555e3dd157SKalle Valo 
21565e3dd157SKalle Valo enum {
21575e3dd157SKalle Valo 	REGDMN_MODE_11A              = 0x00001, /* 11a channels */
21585e3dd157SKalle Valo 	REGDMN_MODE_TURBO            = 0x00002, /* 11a turbo-only channels */
21595e3dd157SKalle Valo 	REGDMN_MODE_11B              = 0x00004, /* 11b channels */
21605e3dd157SKalle Valo 	REGDMN_MODE_PUREG            = 0x00008, /* 11g channels (OFDM only) */
21615e3dd157SKalle Valo 	REGDMN_MODE_11G              = 0x00008, /* XXX historical */
21625e3dd157SKalle Valo 	REGDMN_MODE_108G             = 0x00020, /* 11a+Turbo channels */
21635e3dd157SKalle Valo 	REGDMN_MODE_108A             = 0x00040, /* 11g+Turbo channels */
21645e3dd157SKalle Valo 	REGDMN_MODE_XR               = 0x00100, /* XR channels */
21655e3dd157SKalle Valo 	REGDMN_MODE_11A_HALF_RATE    = 0x00200, /* 11A half rate channels */
21665e3dd157SKalle Valo 	REGDMN_MODE_11A_QUARTER_RATE = 0x00400, /* 11A quarter rate channels */
21675e3dd157SKalle Valo 	REGDMN_MODE_11NG_HT20        = 0x00800, /* 11N-G HT20 channels */
21685e3dd157SKalle Valo 	REGDMN_MODE_11NA_HT20        = 0x01000, /* 11N-A HT20 channels */
21695e3dd157SKalle Valo 	REGDMN_MODE_11NG_HT40PLUS    = 0x02000, /* 11N-G HT40 + channels */
21705e3dd157SKalle Valo 	REGDMN_MODE_11NG_HT40MINUS   = 0x04000, /* 11N-G HT40 - channels */
21715e3dd157SKalle Valo 	REGDMN_MODE_11NA_HT40PLUS    = 0x08000, /* 11N-A HT40 + channels */
21725e3dd157SKalle Valo 	REGDMN_MODE_11NA_HT40MINUS   = 0x10000, /* 11N-A HT40 - channels */
21735e3dd157SKalle Valo 	REGDMN_MODE_11AC_VHT20       = 0x20000, /* 5Ghz, VHT20 */
21745e3dd157SKalle Valo 	REGDMN_MODE_11AC_VHT40PLUS   = 0x40000, /* 5Ghz, VHT40 + channels */
21755e3dd157SKalle Valo 	REGDMN_MODE_11AC_VHT40MINUS  = 0x80000, /* 5Ghz  VHT40 - channels */
21765e3dd157SKalle Valo 	REGDMN_MODE_11AC_VHT80       = 0x100000, /* 5Ghz, VHT80 channels */
2177bc1efd73SSebastian Gottschall 	REGDMN_MODE_11AC_VHT160      = 0x200000,     /* 5Ghz, VHT160 channels */
2178bc1efd73SSebastian Gottschall 	REGDMN_MODE_11AC_VHT80_80    = 0x400000,     /* 5Ghz, VHT80+80 channels */
21795e3dd157SKalle Valo 	REGDMN_MODE_ALL              = 0xffffffff
21805e3dd157SKalle Valo };
21815e3dd157SKalle Valo 
21825e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_HALF_RATE        0x00000001
21835e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_QUARTER_RATE     0x00000002
21845e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_HAL49GHZ         0x00000004
21855e3dd157SKalle Valo 
21865e3dd157SKalle Valo /* regulatory capabilities */
21875e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND   0x0040
21885e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN    0x0080
21895e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U2         0x0100
21905e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND    0x0200
21915e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD     0x0400
21925e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A    0x0800
21935e3dd157SKalle Valo 
21945e3dd157SKalle Valo struct hal_reg_capabilities {
21955e3dd157SKalle Valo 	/* regdomain value specified in EEPROM */
21965e3dd157SKalle Valo 	__le32 eeprom_rd;
21975e3dd157SKalle Valo 	/*regdomain */
21985e3dd157SKalle Valo 	__le32 eeprom_rd_ext;
21995e3dd157SKalle Valo 	/* CAP1 capabilities bit map. */
22005e3dd157SKalle Valo 	__le32 regcap1;
22015e3dd157SKalle Valo 	/* REGDMN EEPROM CAP. */
22025e3dd157SKalle Valo 	__le32 regcap2;
22035e3dd157SKalle Valo 	/* REGDMN MODE */
22045e3dd157SKalle Valo 	__le32 wireless_modes;
22055e3dd157SKalle Valo 	__le32 low_2ghz_chan;
22065e3dd157SKalle Valo 	__le32 high_2ghz_chan;
22075e3dd157SKalle Valo 	__le32 low_5ghz_chan;
22085e3dd157SKalle Valo 	__le32 high_5ghz_chan;
22095e3dd157SKalle Valo } __packed;
22105e3dd157SKalle Valo 
22115e3dd157SKalle Valo enum wlan_mode_capability {
22125e3dd157SKalle Valo 	WHAL_WLAN_11A_CAPABILITY   = 0x1,
22135e3dd157SKalle Valo 	WHAL_WLAN_11G_CAPABILITY   = 0x2,
22145e3dd157SKalle Valo 	WHAL_WLAN_11AG_CAPABILITY  = 0x3,
22155e3dd157SKalle Valo };
22165e3dd157SKalle Valo 
22175e3dd157SKalle Valo /* structure used by FW for requesting host memory */
22185e3dd157SKalle Valo struct wlan_host_mem_req {
22195e3dd157SKalle Valo 	/* ID of the request */
22205e3dd157SKalle Valo 	__le32 req_id;
22215e3dd157SKalle Valo 	/* size of the  of each unit */
22225e3dd157SKalle Valo 	__le32 unit_size;
22235e3dd157SKalle Valo 	/* flags to  indicate that
22245e3dd157SKalle Valo 	 * the number units is dependent
22255e3dd157SKalle Valo 	 * on number of resources(num vdevs num peers .. etc)
22265e3dd157SKalle Valo 	 */
22275e3dd157SKalle Valo 	__le32 num_unit_info;
22285e3dd157SKalle Valo 	/*
22295e3dd157SKalle Valo 	 * actual number of units to allocate . if flags in the num_unit_info
22305e3dd157SKalle Valo 	 * indicate that number of units is tied to number of a particular
22315e3dd157SKalle Valo 	 * resource to allocate then  num_units filed is set to 0 and host
22325e3dd157SKalle Valo 	 * will derive the number units from number of the resources it is
22335e3dd157SKalle Valo 	 * requesting.
22345e3dd157SKalle Valo 	 */
22355e3dd157SKalle Valo 	__le32 num_units;
22365e3dd157SKalle Valo } __packed;
22375e3dd157SKalle Valo 
22385e3dd157SKalle Valo /*
22395e3dd157SKalle Valo  * The following struct holds optional payload for
22405e3dd157SKalle Valo  * wmi_service_ready_event,e.g., 11ac pass some of the
22415e3dd157SKalle Valo  * device capability to the host.
22425e3dd157SKalle Valo  */
22435e3dd157SKalle Valo struct wmi_service_ready_event {
22445e3dd157SKalle Valo 	__le32 sw_version;
22455e3dd157SKalle Valo 	__le32 sw_version_1;
22465e3dd157SKalle Valo 	__le32 abi_version;
22475e3dd157SKalle Valo 	/* WMI_PHY_CAPABILITY */
22485e3dd157SKalle Valo 	__le32 phy_capability;
22495e3dd157SKalle Valo 	/* Maximum number of frag table entries that SW will populate less 1 */
22505e3dd157SKalle Valo 	__le32 max_frag_entry;
2251c4f8c836SMichal Kazior 	__le32 wmi_service_bitmap[16];
22525e3dd157SKalle Valo 	__le32 num_rf_chains;
22535e3dd157SKalle Valo 	/*
22545e3dd157SKalle Valo 	 * The following field is only valid for service type
22555e3dd157SKalle Valo 	 * WMI_SERVICE_11AC
22565e3dd157SKalle Valo 	 */
22575e3dd157SKalle Valo 	__le32 ht_cap_info; /* WMI HT Capability */
22585e3dd157SKalle Valo 	__le32 vht_cap_info; /* VHT capability info field of 802.11ac */
22595e3dd157SKalle Valo 	__le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */
22605e3dd157SKalle Valo 	__le32 hw_min_tx_power;
22615e3dd157SKalle Valo 	__le32 hw_max_tx_power;
22625e3dd157SKalle Valo 	struct hal_reg_capabilities hal_reg_capabilities;
22635e3dd157SKalle Valo 	__le32 sys_cap_info;
22645e3dd157SKalle Valo 	__le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */
22655e3dd157SKalle Valo 	/*
22665e3dd157SKalle Valo 	 * Max beacon and Probe Response IE offload size
22675e3dd157SKalle Valo 	 * (includes optional P2P IEs)
22685e3dd157SKalle Valo 	 */
22695e3dd157SKalle Valo 	__le32 max_bcn_ie_size;
22705e3dd157SKalle Valo 	/*
22715e3dd157SKalle Valo 	 * request to host to allocate a chuck of memory and pss it down to FW
22725e3dd157SKalle Valo 	 * via WM_INIT. FW uses this as FW extesnsion memory for saving its
22735e3dd157SKalle Valo 	 * data structures. Only valid for low latency interfaces like PCIE
22745e3dd157SKalle Valo 	 * where FW can access this memory directly (or) by DMA.
22755e3dd157SKalle Valo 	 */
22765e3dd157SKalle Valo 	__le32 num_mem_reqs;
22775c01aa3dSMichal Kazior 	struct wlan_host_mem_req mem_reqs[0];
22785e3dd157SKalle Valo } __packed;
22795e3dd157SKalle Valo 
22806f97d256SBartosz Markowski /* This is the definition from 10.X firmware branch */
22815c01aa3dSMichal Kazior struct wmi_10x_service_ready_event {
22826f97d256SBartosz Markowski 	__le32 sw_version;
22836f97d256SBartosz Markowski 	__le32 abi_version;
22846f97d256SBartosz Markowski 
22856f97d256SBartosz Markowski 	/* WMI_PHY_CAPABILITY */
22866f97d256SBartosz Markowski 	__le32 phy_capability;
22876f97d256SBartosz Markowski 
22886f97d256SBartosz Markowski 	/* Maximum number of frag table entries that SW will populate less 1 */
22896f97d256SBartosz Markowski 	__le32 max_frag_entry;
2290c4f8c836SMichal Kazior 	__le32 wmi_service_bitmap[16];
22916f97d256SBartosz Markowski 	__le32 num_rf_chains;
22926f97d256SBartosz Markowski 
22936f97d256SBartosz Markowski 	/*
22946f97d256SBartosz Markowski 	 * The following field is only valid for service type
22956f97d256SBartosz Markowski 	 * WMI_SERVICE_11AC
22966f97d256SBartosz Markowski 	 */
22976f97d256SBartosz Markowski 	__le32 ht_cap_info; /* WMI HT Capability */
22986f97d256SBartosz Markowski 	__le32 vht_cap_info; /* VHT capability info field of 802.11ac */
22996f97d256SBartosz Markowski 	__le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */
23006f97d256SBartosz Markowski 	__le32 hw_min_tx_power;
23016f97d256SBartosz Markowski 	__le32 hw_max_tx_power;
23026f97d256SBartosz Markowski 
23036f97d256SBartosz Markowski 	struct hal_reg_capabilities hal_reg_capabilities;
23046f97d256SBartosz Markowski 
23056f97d256SBartosz Markowski 	__le32 sys_cap_info;
23066f97d256SBartosz Markowski 	__le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */
23076f97d256SBartosz Markowski 
23086f97d256SBartosz Markowski 	/*
23096f97d256SBartosz Markowski 	 * request to host to allocate a chuck of memory and pss it down to FW
23106f97d256SBartosz Markowski 	 * via WM_INIT. FW uses this as FW extesnsion memory for saving its
23116f97d256SBartosz Markowski 	 * data structures. Only valid for low latency interfaces like PCIE
23126f97d256SBartosz Markowski 	 * where FW can access this memory directly (or) by DMA.
23136f97d256SBartosz Markowski 	 */
23146f97d256SBartosz Markowski 	__le32 num_mem_reqs;
23156f97d256SBartosz Markowski 
23165c01aa3dSMichal Kazior 	struct wlan_host_mem_req mem_reqs[0];
23176f97d256SBartosz Markowski } __packed;
23186f97d256SBartosz Markowski 
23195e3dd157SKalle Valo #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
23205e3dd157SKalle Valo #define WMI_UNIFIED_READY_TIMEOUT_HZ (5 * HZ)
23215e3dd157SKalle Valo 
23225e3dd157SKalle Valo struct wmi_ready_event {
23235e3dd157SKalle Valo 	__le32 sw_version;
23245e3dd157SKalle Valo 	__le32 abi_version;
23255e3dd157SKalle Valo 	struct wmi_mac_addr mac_addr;
23265e3dd157SKalle Valo 	__le32 status;
23275e3dd157SKalle Valo } __packed;
23285e3dd157SKalle Valo 
23295e3dd157SKalle Valo struct wmi_resource_config {
23305e3dd157SKalle Valo 	/* number of virtual devices (VAPs) to support */
23315e3dd157SKalle Valo 	__le32 num_vdevs;
23325e3dd157SKalle Valo 
23335e3dd157SKalle Valo 	/* number of peer nodes to support */
23345e3dd157SKalle Valo 	__le32 num_peers;
23355e3dd157SKalle Valo 
23365e3dd157SKalle Valo 	/*
23375e3dd157SKalle Valo 	 * In offload mode target supports features like WOW, chatter and
23385e3dd157SKalle Valo 	 * other protocol offloads. In order to support them some
23395e3dd157SKalle Valo 	 * functionalities like reorder buffering, PN checking need to be
2340e13dbeadSJoe Perches 	 * done in target. This determines maximum number of peers supported
23415e3dd157SKalle Valo 	 * by target in offload mode
23425e3dd157SKalle Valo 	 */
23435e3dd157SKalle Valo 	__le32 num_offload_peers;
23445e3dd157SKalle Valo 
23455e3dd157SKalle Valo 	/* For target-based RX reordering */
23465e3dd157SKalle Valo 	__le32 num_offload_reorder_bufs;
23475e3dd157SKalle Valo 
23485e3dd157SKalle Valo 	/* number of keys per peer */
23495e3dd157SKalle Valo 	__le32 num_peer_keys;
23505e3dd157SKalle Valo 
23515e3dd157SKalle Valo 	/* total number of TX/RX data TIDs */
23525e3dd157SKalle Valo 	__le32 num_tids;
23535e3dd157SKalle Valo 
23545e3dd157SKalle Valo 	/*
23555e3dd157SKalle Valo 	 * max skid for resolving hash collisions
23565e3dd157SKalle Valo 	 *
23575e3dd157SKalle Valo 	 *   The address search table is sparse, so that if two MAC addresses
23585e3dd157SKalle Valo 	 *   result in the same hash value, the second of these conflicting
23595e3dd157SKalle Valo 	 *   entries can slide to the next index in the address search table,
23605e3dd157SKalle Valo 	 *   and use it, if it is unoccupied.  This ast_skid_limit parameter
23615e3dd157SKalle Valo 	 *   specifies the upper bound on how many subsequent indices to search
23625e3dd157SKalle Valo 	 *   over to find an unoccupied space.
23635e3dd157SKalle Valo 	 */
23645e3dd157SKalle Valo 	__le32 ast_skid_limit;
23655e3dd157SKalle Valo 
23665e3dd157SKalle Valo 	/*
23675e3dd157SKalle Valo 	 * the nominal chain mask for transmit
23685e3dd157SKalle Valo 	 *
23695e3dd157SKalle Valo 	 *   The chain mask may be modified dynamically, e.g. to operate AP
23705e3dd157SKalle Valo 	 *   tx with a reduced number of chains if no clients are associated.
23715e3dd157SKalle Valo 	 *   This configuration parameter specifies the nominal chain-mask that
23725e3dd157SKalle Valo 	 *   should be used when not operating with a reduced set of tx chains.
23735e3dd157SKalle Valo 	 */
23745e3dd157SKalle Valo 	__le32 tx_chain_mask;
23755e3dd157SKalle Valo 
23765e3dd157SKalle Valo 	/*
23775e3dd157SKalle Valo 	 * the nominal chain mask for receive
23785e3dd157SKalle Valo 	 *
23795e3dd157SKalle Valo 	 *   The chain mask may be modified dynamically, e.g. for a client
23805e3dd157SKalle Valo 	 *   to use a reduced number of chains for receive if the traffic to
23815e3dd157SKalle Valo 	 *   the client is low enough that it doesn't require downlink MIMO
23825e3dd157SKalle Valo 	 *   or antenna diversity.
23835e3dd157SKalle Valo 	 *   This configuration parameter specifies the nominal chain-mask that
23845e3dd157SKalle Valo 	 *   should be used when not operating with a reduced set of rx chains.
23855e3dd157SKalle Valo 	 */
23865e3dd157SKalle Valo 	__le32 rx_chain_mask;
23875e3dd157SKalle Valo 
23885e3dd157SKalle Valo 	/*
23895e3dd157SKalle Valo 	 * what rx reorder timeout (ms) to use for the AC
23905e3dd157SKalle Valo 	 *
23915e3dd157SKalle Valo 	 *   Each WMM access class (voice, video, best-effort, background) will
23925e3dd157SKalle Valo 	 *   have its own timeout value to dictate how long to wait for missing
23935e3dd157SKalle Valo 	 *   rx MPDUs to arrive before flushing subsequent MPDUs that have
23945e3dd157SKalle Valo 	 *   already been received.
23955e3dd157SKalle Valo 	 *   This parameter specifies the timeout in milliseconds for each
23965e3dd157SKalle Valo 	 *   class.
23975e3dd157SKalle Valo 	 */
23985e3dd157SKalle Valo 	__le32 rx_timeout_pri_vi;
23995e3dd157SKalle Valo 	__le32 rx_timeout_pri_vo;
24005e3dd157SKalle Valo 	__le32 rx_timeout_pri_be;
24015e3dd157SKalle Valo 	__le32 rx_timeout_pri_bk;
24025e3dd157SKalle Valo 
24035e3dd157SKalle Valo 	/*
24045e3dd157SKalle Valo 	 * what mode the rx should decap packets to
24055e3dd157SKalle Valo 	 *
24065e3dd157SKalle Valo 	 *   MAC can decap to RAW (no decap), native wifi or Ethernet types
24075e3dd157SKalle Valo 	 *   THis setting also determines the default TX behavior, however TX
24085e3dd157SKalle Valo 	 *   behavior can be modified on a per VAP basis during VAP init
24095e3dd157SKalle Valo 	 */
24105e3dd157SKalle Valo 	__le32 rx_decap_mode;
24115e3dd157SKalle Valo 
24128e4a4f5dSGeert Uytterhoeven 	/* what is the maximum number of scan requests that can be queued */
24135e3dd157SKalle Valo 	__le32 scan_max_pending_reqs;
24145e3dd157SKalle Valo 
24155e3dd157SKalle Valo 	/* maximum VDEV that could use BMISS offload */
24165e3dd157SKalle Valo 	__le32 bmiss_offload_max_vdev;
24175e3dd157SKalle Valo 
24185e3dd157SKalle Valo 	/* maximum VDEV that could use offload roaming */
24195e3dd157SKalle Valo 	__le32 roam_offload_max_vdev;
24205e3dd157SKalle Valo 
24215e3dd157SKalle Valo 	/* maximum AP profiles that would push to offload roaming */
24225e3dd157SKalle Valo 	__le32 roam_offload_max_ap_profiles;
24235e3dd157SKalle Valo 
24245e3dd157SKalle Valo 	/*
24255e3dd157SKalle Valo 	 * how many groups to use for mcast->ucast conversion
24265e3dd157SKalle Valo 	 *
24275e3dd157SKalle Valo 	 *   The target's WAL maintains a table to hold information regarding
24285e3dd157SKalle Valo 	 *   which peers belong to a given multicast group, so that if
24295e3dd157SKalle Valo 	 *   multicast->unicast conversion is enabled, the target can convert
24305e3dd157SKalle Valo 	 *   multicast tx frames to a series of unicast tx frames, to each
24315e3dd157SKalle Valo 	 *   peer within the multicast group.
24325e3dd157SKalle Valo 	     This num_mcast_groups configuration parameter tells the target how
24335e3dd157SKalle Valo 	 *   many multicast groups to provide storage for within its multicast
24345e3dd157SKalle Valo 	 *   group membership table.
24355e3dd157SKalle Valo 	 */
24365e3dd157SKalle Valo 	__le32 num_mcast_groups;
24375e3dd157SKalle Valo 
24385e3dd157SKalle Valo 	/*
24395e3dd157SKalle Valo 	 * size to alloc for the mcast membership table
24405e3dd157SKalle Valo 	 *
24415e3dd157SKalle Valo 	 *   This num_mcast_table_elems configuration parameter tells the
24425e3dd157SKalle Valo 	 *   target how many peer elements it needs to provide storage for in
24435e3dd157SKalle Valo 	 *   its multicast group membership table.
24445e3dd157SKalle Valo 	 *   These multicast group membership table elements are shared by the
24455e3dd157SKalle Valo 	 *   multicast groups stored within the table.
24465e3dd157SKalle Valo 	 */
24475e3dd157SKalle Valo 	__le32 num_mcast_table_elems;
24485e3dd157SKalle Valo 
24495e3dd157SKalle Valo 	/*
24505e3dd157SKalle Valo 	 * whether/how to do multicast->unicast conversion
24515e3dd157SKalle Valo 	 *
24525e3dd157SKalle Valo 	 *   This configuration parameter specifies whether the target should
24535e3dd157SKalle Valo 	 *   perform multicast --> unicast conversion on transmit, and if so,
24545e3dd157SKalle Valo 	 *   what to do if it finds no entries in its multicast group
24555e3dd157SKalle Valo 	 *   membership table for the multicast IP address in the tx frame.
24565e3dd157SKalle Valo 	 *   Configuration value:
24575e3dd157SKalle Valo 	 *   0 -> Do not perform multicast to unicast conversion.
24585e3dd157SKalle Valo 	 *   1 -> Convert multicast frames to unicast, if the IP multicast
24595e3dd157SKalle Valo 	 *        address from the tx frame is found in the multicast group
24605e3dd157SKalle Valo 	 *        membership table.  If the IP multicast address is not found,
24615e3dd157SKalle Valo 	 *        drop the frame.
24625e3dd157SKalle Valo 	 *   2 -> Convert multicast frames to unicast, if the IP multicast
24635e3dd157SKalle Valo 	 *        address from the tx frame is found in the multicast group
24645e3dd157SKalle Valo 	 *        membership table.  If the IP multicast address is not found,
24655e3dd157SKalle Valo 	 *        transmit the frame as multicast.
24665e3dd157SKalle Valo 	 */
24675e3dd157SKalle Valo 	__le32 mcast2ucast_mode;
24685e3dd157SKalle Valo 
24695e3dd157SKalle Valo 	/*
24705e3dd157SKalle Valo 	 * how much memory to allocate for a tx PPDU dbg log
24715e3dd157SKalle Valo 	 *
24725e3dd157SKalle Valo 	 *   This parameter controls how much memory the target will allocate
24735e3dd157SKalle Valo 	 *   to store a log of tx PPDU meta-information (how large the PPDU
24745e3dd157SKalle Valo 	 *   was, when it was sent, whether it was successful, etc.)
24755e3dd157SKalle Valo 	 */
24765e3dd157SKalle Valo 	__le32 tx_dbg_log_size;
24775e3dd157SKalle Valo 
24785e3dd157SKalle Valo 	/* how many AST entries to be allocated for WDS */
24795e3dd157SKalle Valo 	__le32 num_wds_entries;
24805e3dd157SKalle Valo 
24815e3dd157SKalle Valo 	/*
24825e3dd157SKalle Valo 	 * MAC DMA burst size, e.g., For target PCI limit can be
24835e3dd157SKalle Valo 	 * 0 -default, 1 256B
24845e3dd157SKalle Valo 	 */
24855e3dd157SKalle Valo 	__le32 dma_burst_size;
24865e3dd157SKalle Valo 
24875e3dd157SKalle Valo 	/*
24885e3dd157SKalle Valo 	 * Fixed delimiters to be inserted after every MPDU to
24895e3dd157SKalle Valo 	 * account for interface latency to avoid underrun.
24905e3dd157SKalle Valo 	 */
24915e3dd157SKalle Valo 	__le32 mac_aggr_delim;
24925e3dd157SKalle Valo 
24935e3dd157SKalle Valo 	/*
24945e3dd157SKalle Valo 	 *   determine whether target is responsible for detecting duplicate
24955e3dd157SKalle Valo 	 *   non-aggregate MPDU and timing out stale fragments.
24965e3dd157SKalle Valo 	 *
24975e3dd157SKalle Valo 	 *   A-MPDU reordering is always performed on the target.
24985e3dd157SKalle Valo 	 *
24995e3dd157SKalle Valo 	 *   0: target responsible for frag timeout and dup checking
25005e3dd157SKalle Valo 	 *   1: host responsible for frag timeout and dup checking
25015e3dd157SKalle Valo 	 */
25025e3dd157SKalle Valo 	__le32 rx_skip_defrag_timeout_dup_detection_check;
25035e3dd157SKalle Valo 
25045e3dd157SKalle Valo 	/*
25055e3dd157SKalle Valo 	 * Configuration for VoW :
25065e3dd157SKalle Valo 	 * No of Video Nodes to be supported
25075e3dd157SKalle Valo 	 * and Max no of descriptors for each Video link (node).
25085e3dd157SKalle Valo 	 */
25095e3dd157SKalle Valo 	__le32 vow_config;
25105e3dd157SKalle Valo 
25115e3dd157SKalle Valo 	/* maximum VDEV that could use GTK offload */
25125e3dd157SKalle Valo 	__le32 gtk_offload_max_vdev;
25135e3dd157SKalle Valo 
25145e3dd157SKalle Valo 	/* Number of msdu descriptors target should use */
25155e3dd157SKalle Valo 	__le32 num_msdu_desc;
25165e3dd157SKalle Valo 
25175e3dd157SKalle Valo 	/*
25185e3dd157SKalle Valo 	 * Max. number of Tx fragments per MSDU
25195e3dd157SKalle Valo 	 *  This parameter controls the max number of Tx fragments per MSDU.
25205e3dd157SKalle Valo 	 *  This is sent by the target as part of the WMI_SERVICE_READY event
2521e13dbeadSJoe Perches 	 *  and is overridden by the OS shim as required.
25225e3dd157SKalle Valo 	 */
25235e3dd157SKalle Valo 	__le32 max_frag_entries;
25245e3dd157SKalle Valo } __packed;
25255e3dd157SKalle Valo 
252612b2b9e3SBartosz Markowski struct wmi_resource_config_10x {
252712b2b9e3SBartosz Markowski 	/* number of virtual devices (VAPs) to support */
252812b2b9e3SBartosz Markowski 	__le32 num_vdevs;
252912b2b9e3SBartosz Markowski 
253012b2b9e3SBartosz Markowski 	/* number of peer nodes to support */
253112b2b9e3SBartosz Markowski 	__le32 num_peers;
253212b2b9e3SBartosz Markowski 
253312b2b9e3SBartosz Markowski 	/* number of keys per peer */
253412b2b9e3SBartosz Markowski 	__le32 num_peer_keys;
253512b2b9e3SBartosz Markowski 
253612b2b9e3SBartosz Markowski 	/* total number of TX/RX data TIDs */
253712b2b9e3SBartosz Markowski 	__le32 num_tids;
253812b2b9e3SBartosz Markowski 
253912b2b9e3SBartosz Markowski 	/*
254012b2b9e3SBartosz Markowski 	 * max skid for resolving hash collisions
254112b2b9e3SBartosz Markowski 	 *
254212b2b9e3SBartosz Markowski 	 *   The address search table is sparse, so that if two MAC addresses
254312b2b9e3SBartosz Markowski 	 *   result in the same hash value, the second of these conflicting
254412b2b9e3SBartosz Markowski 	 *   entries can slide to the next index in the address search table,
254512b2b9e3SBartosz Markowski 	 *   and use it, if it is unoccupied.  This ast_skid_limit parameter
254612b2b9e3SBartosz Markowski 	 *   specifies the upper bound on how many subsequent indices to search
254712b2b9e3SBartosz Markowski 	 *   over to find an unoccupied space.
254812b2b9e3SBartosz Markowski 	 */
254912b2b9e3SBartosz Markowski 	__le32 ast_skid_limit;
255012b2b9e3SBartosz Markowski 
255112b2b9e3SBartosz Markowski 	/*
255212b2b9e3SBartosz Markowski 	 * the nominal chain mask for transmit
255312b2b9e3SBartosz Markowski 	 *
255412b2b9e3SBartosz Markowski 	 *   The chain mask may be modified dynamically, e.g. to operate AP
255512b2b9e3SBartosz Markowski 	 *   tx with a reduced number of chains if no clients are associated.
255612b2b9e3SBartosz Markowski 	 *   This configuration parameter specifies the nominal chain-mask that
255712b2b9e3SBartosz Markowski 	 *   should be used when not operating with a reduced set of tx chains.
255812b2b9e3SBartosz Markowski 	 */
255912b2b9e3SBartosz Markowski 	__le32 tx_chain_mask;
256012b2b9e3SBartosz Markowski 
256112b2b9e3SBartosz Markowski 	/*
256212b2b9e3SBartosz Markowski 	 * the nominal chain mask for receive
256312b2b9e3SBartosz Markowski 	 *
256412b2b9e3SBartosz Markowski 	 *   The chain mask may be modified dynamically, e.g. for a client
256512b2b9e3SBartosz Markowski 	 *   to use a reduced number of chains for receive if the traffic to
256612b2b9e3SBartosz Markowski 	 *   the client is low enough that it doesn't require downlink MIMO
256712b2b9e3SBartosz Markowski 	 *   or antenna diversity.
256812b2b9e3SBartosz Markowski 	 *   This configuration parameter specifies the nominal chain-mask that
256912b2b9e3SBartosz Markowski 	 *   should be used when not operating with a reduced set of rx chains.
257012b2b9e3SBartosz Markowski 	 */
257112b2b9e3SBartosz Markowski 	__le32 rx_chain_mask;
257212b2b9e3SBartosz Markowski 
257312b2b9e3SBartosz Markowski 	/*
257412b2b9e3SBartosz Markowski 	 * what rx reorder timeout (ms) to use for the AC
257512b2b9e3SBartosz Markowski 	 *
257612b2b9e3SBartosz Markowski 	 *   Each WMM access class (voice, video, best-effort, background) will
257712b2b9e3SBartosz Markowski 	 *   have its own timeout value to dictate how long to wait for missing
257812b2b9e3SBartosz Markowski 	 *   rx MPDUs to arrive before flushing subsequent MPDUs that have
257912b2b9e3SBartosz Markowski 	 *   already been received.
258012b2b9e3SBartosz Markowski 	 *   This parameter specifies the timeout in milliseconds for each
258112b2b9e3SBartosz Markowski 	 *   class.
258212b2b9e3SBartosz Markowski 	 */
258312b2b9e3SBartosz Markowski 	__le32 rx_timeout_pri_vi;
258412b2b9e3SBartosz Markowski 	__le32 rx_timeout_pri_vo;
258512b2b9e3SBartosz Markowski 	__le32 rx_timeout_pri_be;
258612b2b9e3SBartosz Markowski 	__le32 rx_timeout_pri_bk;
258712b2b9e3SBartosz Markowski 
258812b2b9e3SBartosz Markowski 	/*
258912b2b9e3SBartosz Markowski 	 * what mode the rx should decap packets to
259012b2b9e3SBartosz Markowski 	 *
259112b2b9e3SBartosz Markowski 	 *   MAC can decap to RAW (no decap), native wifi or Ethernet types
259212b2b9e3SBartosz Markowski 	 *   THis setting also determines the default TX behavior, however TX
259312b2b9e3SBartosz Markowski 	 *   behavior can be modified on a per VAP basis during VAP init
259412b2b9e3SBartosz Markowski 	 */
259512b2b9e3SBartosz Markowski 	__le32 rx_decap_mode;
259612b2b9e3SBartosz Markowski 
25978e4a4f5dSGeert Uytterhoeven 	/* what is the maximum number of scan requests that can be queued */
259812b2b9e3SBartosz Markowski 	__le32 scan_max_pending_reqs;
259912b2b9e3SBartosz Markowski 
260012b2b9e3SBartosz Markowski 	/* maximum VDEV that could use BMISS offload */
260112b2b9e3SBartosz Markowski 	__le32 bmiss_offload_max_vdev;
260212b2b9e3SBartosz Markowski 
260312b2b9e3SBartosz Markowski 	/* maximum VDEV that could use offload roaming */
260412b2b9e3SBartosz Markowski 	__le32 roam_offload_max_vdev;
260512b2b9e3SBartosz Markowski 
260612b2b9e3SBartosz Markowski 	/* maximum AP profiles that would push to offload roaming */
260712b2b9e3SBartosz Markowski 	__le32 roam_offload_max_ap_profiles;
260812b2b9e3SBartosz Markowski 
260912b2b9e3SBartosz Markowski 	/*
261012b2b9e3SBartosz Markowski 	 * how many groups to use for mcast->ucast conversion
261112b2b9e3SBartosz Markowski 	 *
261212b2b9e3SBartosz Markowski 	 *   The target's WAL maintains a table to hold information regarding
261312b2b9e3SBartosz Markowski 	 *   which peers belong to a given multicast group, so that if
261412b2b9e3SBartosz Markowski 	 *   multicast->unicast conversion is enabled, the target can convert
261512b2b9e3SBartosz Markowski 	 *   multicast tx frames to a series of unicast tx frames, to each
261612b2b9e3SBartosz Markowski 	 *   peer within the multicast group.
261712b2b9e3SBartosz Markowski 	     This num_mcast_groups configuration parameter tells the target how
261812b2b9e3SBartosz Markowski 	 *   many multicast groups to provide storage for within its multicast
261912b2b9e3SBartosz Markowski 	 *   group membership table.
262012b2b9e3SBartosz Markowski 	 */
262112b2b9e3SBartosz Markowski 	__le32 num_mcast_groups;
262212b2b9e3SBartosz Markowski 
262312b2b9e3SBartosz Markowski 	/*
262412b2b9e3SBartosz Markowski 	 * size to alloc for the mcast membership table
262512b2b9e3SBartosz Markowski 	 *
262612b2b9e3SBartosz Markowski 	 *   This num_mcast_table_elems configuration parameter tells the
262712b2b9e3SBartosz Markowski 	 *   target how many peer elements it needs to provide storage for in
262812b2b9e3SBartosz Markowski 	 *   its multicast group membership table.
262912b2b9e3SBartosz Markowski 	 *   These multicast group membership table elements are shared by the
263012b2b9e3SBartosz Markowski 	 *   multicast groups stored within the table.
263112b2b9e3SBartosz Markowski 	 */
263212b2b9e3SBartosz Markowski 	__le32 num_mcast_table_elems;
263312b2b9e3SBartosz Markowski 
263412b2b9e3SBartosz Markowski 	/*
263512b2b9e3SBartosz Markowski 	 * whether/how to do multicast->unicast conversion
263612b2b9e3SBartosz Markowski 	 *
263712b2b9e3SBartosz Markowski 	 *   This configuration parameter specifies whether the target should
263812b2b9e3SBartosz Markowski 	 *   perform multicast --> unicast conversion on transmit, and if so,
263912b2b9e3SBartosz Markowski 	 *   what to do if it finds no entries in its multicast group
264012b2b9e3SBartosz Markowski 	 *   membership table for the multicast IP address in the tx frame.
264112b2b9e3SBartosz Markowski 	 *   Configuration value:
264212b2b9e3SBartosz Markowski 	 *   0 -> Do not perform multicast to unicast conversion.
264312b2b9e3SBartosz Markowski 	 *   1 -> Convert multicast frames to unicast, if the IP multicast
264412b2b9e3SBartosz Markowski 	 *        address from the tx frame is found in the multicast group
264512b2b9e3SBartosz Markowski 	 *        membership table.  If the IP multicast address is not found,
264612b2b9e3SBartosz Markowski 	 *        drop the frame.
264712b2b9e3SBartosz Markowski 	 *   2 -> Convert multicast frames to unicast, if the IP multicast
264812b2b9e3SBartosz Markowski 	 *        address from the tx frame is found in the multicast group
264912b2b9e3SBartosz Markowski 	 *        membership table.  If the IP multicast address is not found,
265012b2b9e3SBartosz Markowski 	 *        transmit the frame as multicast.
265112b2b9e3SBartosz Markowski 	 */
265212b2b9e3SBartosz Markowski 	__le32 mcast2ucast_mode;
265312b2b9e3SBartosz Markowski 
265412b2b9e3SBartosz Markowski 	/*
265512b2b9e3SBartosz Markowski 	 * how much memory to allocate for a tx PPDU dbg log
265612b2b9e3SBartosz Markowski 	 *
265712b2b9e3SBartosz Markowski 	 *   This parameter controls how much memory the target will allocate
265812b2b9e3SBartosz Markowski 	 *   to store a log of tx PPDU meta-information (how large the PPDU
265912b2b9e3SBartosz Markowski 	 *   was, when it was sent, whether it was successful, etc.)
266012b2b9e3SBartosz Markowski 	 */
266112b2b9e3SBartosz Markowski 	__le32 tx_dbg_log_size;
266212b2b9e3SBartosz Markowski 
266312b2b9e3SBartosz Markowski 	/* how many AST entries to be allocated for WDS */
266412b2b9e3SBartosz Markowski 	__le32 num_wds_entries;
266512b2b9e3SBartosz Markowski 
266612b2b9e3SBartosz Markowski 	/*
266712b2b9e3SBartosz Markowski 	 * MAC DMA burst size, e.g., For target PCI limit can be
266812b2b9e3SBartosz Markowski 	 * 0 -default, 1 256B
266912b2b9e3SBartosz Markowski 	 */
267012b2b9e3SBartosz Markowski 	__le32 dma_burst_size;
267112b2b9e3SBartosz Markowski 
267212b2b9e3SBartosz Markowski 	/*
267312b2b9e3SBartosz Markowski 	 * Fixed delimiters to be inserted after every MPDU to
267412b2b9e3SBartosz Markowski 	 * account for interface latency to avoid underrun.
267512b2b9e3SBartosz Markowski 	 */
267612b2b9e3SBartosz Markowski 	__le32 mac_aggr_delim;
267712b2b9e3SBartosz Markowski 
267812b2b9e3SBartosz Markowski 	/*
267912b2b9e3SBartosz Markowski 	 *   determine whether target is responsible for detecting duplicate
268012b2b9e3SBartosz Markowski 	 *   non-aggregate MPDU and timing out stale fragments.
268112b2b9e3SBartosz Markowski 	 *
268212b2b9e3SBartosz Markowski 	 *   A-MPDU reordering is always performed on the target.
268312b2b9e3SBartosz Markowski 	 *
268412b2b9e3SBartosz Markowski 	 *   0: target responsible for frag timeout and dup checking
268512b2b9e3SBartosz Markowski 	 *   1: host responsible for frag timeout and dup checking
268612b2b9e3SBartosz Markowski 	 */
268712b2b9e3SBartosz Markowski 	__le32 rx_skip_defrag_timeout_dup_detection_check;
268812b2b9e3SBartosz Markowski 
268912b2b9e3SBartosz Markowski 	/*
269012b2b9e3SBartosz Markowski 	 * Configuration for VoW :
269112b2b9e3SBartosz Markowski 	 * No of Video Nodes to be supported
269212b2b9e3SBartosz Markowski 	 * and Max no of descriptors for each Video link (node).
269312b2b9e3SBartosz Markowski 	 */
269412b2b9e3SBartosz Markowski 	__le32 vow_config;
269512b2b9e3SBartosz Markowski 
269612b2b9e3SBartosz Markowski 	/* Number of msdu descriptors target should use */
269712b2b9e3SBartosz Markowski 	__le32 num_msdu_desc;
269812b2b9e3SBartosz Markowski 
269912b2b9e3SBartosz Markowski 	/*
270012b2b9e3SBartosz Markowski 	 * Max. number of Tx fragments per MSDU
270112b2b9e3SBartosz Markowski 	 *  This parameter controls the max number of Tx fragments per MSDU.
270212b2b9e3SBartosz Markowski 	 *  This is sent by the target as part of the WMI_SERVICE_READY event
2703e13dbeadSJoe Perches 	 *  and is overridden by the OS shim as required.
270412b2b9e3SBartosz Markowski 	 */
270512b2b9e3SBartosz Markowski 	__le32 max_frag_entries;
270612b2b9e3SBartosz Markowski } __packed;
270712b2b9e3SBartosz Markowski 
27084a16fbecSRajkumar Manoharan enum wmi_10_2_feature_mask {
27094a16fbecSRajkumar Manoharan 	WMI_10_2_RX_BATCH_MODE = BIT(0),
27104a16fbecSRajkumar Manoharan 	WMI_10_2_ATF_CONFIG    = BIT(1),
2711de0c789bSYanbo Li 	WMI_10_2_COEX_GPIO     = BIT(3),
2712dd2c5fcbSRajkumar Manoharan 	WMI_10_2_BSS_CHAN_INFO = BIT(6),
2713de46c015SMohammed Shafi Shajakhan 	WMI_10_2_PEER_STATS    = BIT(7),
27144a16fbecSRajkumar Manoharan };
27154a16fbecSRajkumar Manoharan 
271624c88f78SMichal Kazior struct wmi_resource_config_10_2 {
271724c88f78SMichal Kazior 	struct wmi_resource_config_10x common;
271824c88f78SMichal Kazior 	__le32 max_peer_ext_stats;
271924c88f78SMichal Kazior 	__le32 smart_ant_cap; /* 0-disable, 1-enable */
272024c88f78SMichal Kazior 	__le32 bk_min_free;
272124c88f78SMichal Kazior 	__le32 be_min_free;
272224c88f78SMichal Kazior 	__le32 vi_min_free;
272324c88f78SMichal Kazior 	__le32 vo_min_free;
27244a16fbecSRajkumar Manoharan 	__le32 feature_mask;
272524c88f78SMichal Kazior } __packed;
272612b2b9e3SBartosz Markowski 
2727b0399417SRaja Mani #define NUM_UNITS_IS_NUM_VDEVS         BIT(0)
2728b0399417SRaja Mani #define NUM_UNITS_IS_NUM_PEERS         BIT(1)
2729b0399417SRaja Mani #define NUM_UNITS_IS_NUM_ACTIVE_PEERS  BIT(2)
2730b3effe61SBartosz Markowski 
2731d1e52a8eSRaja Mani struct wmi_resource_config_10_4 {
2732d1e52a8eSRaja Mani 	/* Number of virtual devices (VAPs) to support */
2733d1e52a8eSRaja Mani 	__le32 num_vdevs;
2734d1e52a8eSRaja Mani 
2735d1e52a8eSRaja Mani 	/* Number of peer nodes to support */
2736d1e52a8eSRaja Mani 	__le32 num_peers;
2737d1e52a8eSRaja Mani 
2738d1e52a8eSRaja Mani 	/* Number of active peer nodes to support */
2739d1e52a8eSRaja Mani 	__le32 num_active_peers;
2740d1e52a8eSRaja Mani 
2741d1e52a8eSRaja Mani 	/* In offload mode, target supports features like WOW, chatter and other
2742d1e52a8eSRaja Mani 	 * protocol offloads. In order to support them some functionalities like
2743d1e52a8eSRaja Mani 	 * reorder buffering, PN checking need to be done in target.
2744d1e52a8eSRaja Mani 	 * This determines maximum number of peers supported by target in
2745d1e52a8eSRaja Mani 	 * offload mode.
2746d1e52a8eSRaja Mani 	 */
2747d1e52a8eSRaja Mani 	__le32 num_offload_peers;
2748d1e52a8eSRaja Mani 
2749d1e52a8eSRaja Mani 	/* Number of reorder buffers available for doing target based reorder
2750d1e52a8eSRaja Mani 	 * Rx reorder buffering
2751d1e52a8eSRaja Mani 	 */
2752d1e52a8eSRaja Mani 	__le32 num_offload_reorder_buffs;
2753d1e52a8eSRaja Mani 
2754d1e52a8eSRaja Mani 	/* Number of keys per peer */
2755d1e52a8eSRaja Mani 	__le32 num_peer_keys;
2756d1e52a8eSRaja Mani 
2757d1e52a8eSRaja Mani 	/* Total number of TX/RX data TIDs */
2758d1e52a8eSRaja Mani 	__le32 num_tids;
2759d1e52a8eSRaja Mani 
2760d1e52a8eSRaja Mani 	/* Max skid for resolving hash collisions.
2761d1e52a8eSRaja Mani 	 * The address search table is sparse, so that if two MAC addresses
2762d1e52a8eSRaja Mani 	 * result in the same hash value, the second of these conflicting
2763d1e52a8eSRaja Mani 	 * entries can slide to the next index in the address search table,
2764d1e52a8eSRaja Mani 	 * and use it, if it is unoccupied.  This ast_skid_limit parameter
2765d1e52a8eSRaja Mani 	 * specifies the upper bound on how many subsequent indices to search
2766d1e52a8eSRaja Mani 	 * over to find an unoccupied space.
2767d1e52a8eSRaja Mani 	 */
2768d1e52a8eSRaja Mani 	__le32 ast_skid_limit;
2769d1e52a8eSRaja Mani 
2770d1e52a8eSRaja Mani 	/* The nominal chain mask for transmit.
2771d1e52a8eSRaja Mani 	 * The chain mask may be modified dynamically, e.g. to operate AP tx
2772d1e52a8eSRaja Mani 	 * with a reduced number of chains if no clients are associated.
2773d1e52a8eSRaja Mani 	 * This configuration parameter specifies the nominal chain-mask that
2774d1e52a8eSRaja Mani 	 * should be used when not operating with a reduced set of tx chains.
2775d1e52a8eSRaja Mani 	 */
2776d1e52a8eSRaja Mani 	__le32 tx_chain_mask;
2777d1e52a8eSRaja Mani 
2778d1e52a8eSRaja Mani 	/* The nominal chain mask for receive.
2779d1e52a8eSRaja Mani 	 * The chain mask may be modified dynamically, e.g. for a client to use
2780d1e52a8eSRaja Mani 	 * a reduced number of chains for receive if the traffic to the client
2781d1e52a8eSRaja Mani 	 * is low enough that it doesn't require downlink MIMO or antenna
2782d1e52a8eSRaja Mani 	 * diversity. This configuration parameter specifies the nominal
2783d1e52a8eSRaja Mani 	 * chain-mask that should be used when not operating with a reduced
2784d1e52a8eSRaja Mani 	 * set of rx chains.
2785d1e52a8eSRaja Mani 	 */
2786d1e52a8eSRaja Mani 	__le32 rx_chain_mask;
2787d1e52a8eSRaja Mani 
2788d1e52a8eSRaja Mani 	/* What rx reorder timeout (ms) to use for the AC.
2789d1e52a8eSRaja Mani 	 * Each WMM access class (voice, video, best-effort, background) will
2790d1e52a8eSRaja Mani 	 * have its own timeout value to dictate how long to wait for missing
2791d1e52a8eSRaja Mani 	 * rx MPDUs to arrive before flushing subsequent MPDUs that have already
2792d1e52a8eSRaja Mani 	 * been received. This parameter specifies the timeout in milliseconds
2793d1e52a8eSRaja Mani 	 * for each class.
2794d1e52a8eSRaja Mani 	 */
2795d1e52a8eSRaja Mani 	__le32 rx_timeout_pri[4];
2796d1e52a8eSRaja Mani 
2797d1e52a8eSRaja Mani 	/* What mode the rx should decap packets to.
2798d1e52a8eSRaja Mani 	 * MAC can decap to RAW (no decap), native wifi or Ethernet types.
2799d1e52a8eSRaja Mani 	 * This setting also determines the default TX behavior, however TX
2800d1e52a8eSRaja Mani 	 * behavior can be modified on a per VAP basis during VAP init
2801d1e52a8eSRaja Mani 	 */
2802d1e52a8eSRaja Mani 	__le32 rx_decap_mode;
2803d1e52a8eSRaja Mani 
2804d1e52a8eSRaja Mani 	__le32 scan_max_pending_req;
2805d1e52a8eSRaja Mani 
2806d1e52a8eSRaja Mani 	__le32 bmiss_offload_max_vdev;
2807d1e52a8eSRaja Mani 
2808d1e52a8eSRaja Mani 	__le32 roam_offload_max_vdev;
2809d1e52a8eSRaja Mani 
2810d1e52a8eSRaja Mani 	__le32 roam_offload_max_ap_profiles;
2811d1e52a8eSRaja Mani 
2812d1e52a8eSRaja Mani 	/* How many groups to use for mcast->ucast conversion.
2813d1e52a8eSRaja Mani 	 * The target's WAL maintains a table to hold information regarding
2814d1e52a8eSRaja Mani 	 * which peers belong to a given multicast group, so that if
2815d1e52a8eSRaja Mani 	 * multicast->unicast conversion is enabled, the target can convert
2816d1e52a8eSRaja Mani 	 * multicast tx frames to a series of unicast tx frames, to each peer
2817d1e52a8eSRaja Mani 	 * within the multicast group. This num_mcast_groups configuration
2818d1e52a8eSRaja Mani 	 * parameter tells the target how many multicast groups to provide
2819d1e52a8eSRaja Mani 	 * storage for within its multicast group membership table.
2820d1e52a8eSRaja Mani 	 */
2821d1e52a8eSRaja Mani 	__le32 num_mcast_groups;
2822d1e52a8eSRaja Mani 
2823d1e52a8eSRaja Mani 	/* Size to alloc for the mcast membership table.
2824d1e52a8eSRaja Mani 	 * This num_mcast_table_elems configuration parameter tells the target
2825d1e52a8eSRaja Mani 	 * how many peer elements it needs to provide storage for in its
2826d1e52a8eSRaja Mani 	 * multicast group membership table. These multicast group membership
2827d1e52a8eSRaja Mani 	 * table elements are shared by the multicast groups stored within
2828d1e52a8eSRaja Mani 	 * the table.
2829d1e52a8eSRaja Mani 	 */
2830d1e52a8eSRaja Mani 	__le32 num_mcast_table_elems;
2831d1e52a8eSRaja Mani 
2832d1e52a8eSRaja Mani 	/* Whether/how to do multicast->unicast conversion.
2833d1e52a8eSRaja Mani 	 * This configuration parameter specifies whether the target should
2834d1e52a8eSRaja Mani 	 * perform multicast --> unicast conversion on transmit, and if so,
2835d1e52a8eSRaja Mani 	 * what to do if it finds no entries in its multicast group membership
2836d1e52a8eSRaja Mani 	 * table for the multicast IP address in the tx frame.
2837d1e52a8eSRaja Mani 	 * Configuration value:
2838d1e52a8eSRaja Mani 	 * 0 -> Do not perform multicast to unicast conversion.
2839d1e52a8eSRaja Mani 	 * 1 -> Convert multicast frames to unicast, if the IP multicast address
2840d1e52a8eSRaja Mani 	 *      from the tx frame is found in the multicast group membership
2841d1e52a8eSRaja Mani 	 *      table.  If the IP multicast address is not found, drop the frame
2842d1e52a8eSRaja Mani 	 * 2 -> Convert multicast frames to unicast, if the IP multicast address
2843d1e52a8eSRaja Mani 	 *      from the tx frame is found in the multicast group membership
2844d1e52a8eSRaja Mani 	 *      table.  If the IP multicast address is not found, transmit the
2845d1e52a8eSRaja Mani 	 *      frame as multicast.
2846d1e52a8eSRaja Mani 	 */
2847d1e52a8eSRaja Mani 	__le32 mcast2ucast_mode;
2848d1e52a8eSRaja Mani 
2849d1e52a8eSRaja Mani 	/* How much memory to allocate for a tx PPDU dbg log.
2850d1e52a8eSRaja Mani 	 * This parameter controls how much memory the target will allocate to
2851d1e52a8eSRaja Mani 	 * store a log of tx PPDU meta-information (how large the PPDU was,
2852d1e52a8eSRaja Mani 	 * when it was sent, whether it was successful, etc.)
2853d1e52a8eSRaja Mani 	 */
2854d1e52a8eSRaja Mani 	__le32 tx_dbg_log_size;
2855d1e52a8eSRaja Mani 
2856d1e52a8eSRaja Mani 	/* How many AST entries to be allocated for WDS */
2857d1e52a8eSRaja Mani 	__le32 num_wds_entries;
2858d1e52a8eSRaja Mani 
2859d1e52a8eSRaja Mani 	/* MAC DMA burst size. 0 -default, 1 -256B */
2860d1e52a8eSRaja Mani 	__le32 dma_burst_size;
2861d1e52a8eSRaja Mani 
2862d1e52a8eSRaja Mani 	/* Fixed delimiters to be inserted after every MPDU to account for
2863d1e52a8eSRaja Mani 	 * interface latency to avoid underrun.
2864d1e52a8eSRaja Mani 	 */
2865d1e52a8eSRaja Mani 	__le32 mac_aggr_delim;
2866d1e52a8eSRaja Mani 
2867d1e52a8eSRaja Mani 	/* Determine whether target is responsible for detecting duplicate
2868d1e52a8eSRaja Mani 	 * non-aggregate MPDU and timing out stale fragments. A-MPDU reordering
2869d1e52a8eSRaja Mani 	 * is always performed on the target.
2870d1e52a8eSRaja Mani 	 *
2871d1e52a8eSRaja Mani 	 * 0: target responsible for frag timeout and dup checking
2872d1e52a8eSRaja Mani 	 * 1: host responsible for frag timeout and dup checking
2873d1e52a8eSRaja Mani 	 */
2874d1e52a8eSRaja Mani 	__le32 rx_skip_defrag_timeout_dup_detection_check;
2875d1e52a8eSRaja Mani 
2876d1e52a8eSRaja Mani 	/* Configuration for VoW : No of Video nodes to be supported and max
2877d1e52a8eSRaja Mani 	 * no of descriptors for each video link (node).
2878d1e52a8eSRaja Mani 	 */
2879d1e52a8eSRaja Mani 	__le32 vow_config;
2880d1e52a8eSRaja Mani 
2881d1e52a8eSRaja Mani 	/* Maximum vdev that could use gtk offload */
2882d1e52a8eSRaja Mani 	__le32 gtk_offload_max_vdev;
2883d1e52a8eSRaja Mani 
2884d1e52a8eSRaja Mani 	/* Number of msdu descriptors target should use */
2885d1e52a8eSRaja Mani 	__le32 num_msdu_desc;
2886d1e52a8eSRaja Mani 
2887d1e52a8eSRaja Mani 	/* Max number of tx fragments per MSDU.
2888d1e52a8eSRaja Mani 	 * This parameter controls the max number of tx fragments per MSDU.
2889d1e52a8eSRaja Mani 	 * This will passed by target as part of the WMI_SERVICE_READY event
2890d1e52a8eSRaja Mani 	 * and is overridden by the OS shim as required.
2891d1e52a8eSRaja Mani 	 */
2892d1e52a8eSRaja Mani 	__le32 max_frag_entries;
2893d1e52a8eSRaja Mani 
2894d1e52a8eSRaja Mani 	/* Max number of extended peer stats.
2895d1e52a8eSRaja Mani 	 * This parameter controls the max number of peers for which extended
2896d1e52a8eSRaja Mani 	 * statistics are supported by target
2897d1e52a8eSRaja Mani 	 */
2898d1e52a8eSRaja Mani 	__le32 max_peer_ext_stats;
2899d1e52a8eSRaja Mani 
2900d1e52a8eSRaja Mani 	/* Smart antenna capabilities information.
2901d1e52a8eSRaja Mani 	 * 1 - Smart antenna is enabled
2902d1e52a8eSRaja Mani 	 * 0 - Smart antenna is disabled
2903d1e52a8eSRaja Mani 	 * In future this can contain smart antenna specific capabilities.
2904d1e52a8eSRaja Mani 	 */
2905d1e52a8eSRaja Mani 	__le32 smart_ant_cap;
2906d1e52a8eSRaja Mani 
2907d1e52a8eSRaja Mani 	/* User can configure the buffers allocated for each AC (BE, BK, VI, VO)
2908d1e52a8eSRaja Mani 	 * during init.
2909d1e52a8eSRaja Mani 	 */
2910d1e52a8eSRaja Mani 	__le32 bk_minfree;
2911d1e52a8eSRaja Mani 	__le32 be_minfree;
2912d1e52a8eSRaja Mani 	__le32 vi_minfree;
2913d1e52a8eSRaja Mani 	__le32 vo_minfree;
2914d1e52a8eSRaja Mani 
2915d1e52a8eSRaja Mani 	/* Rx batch mode capability.
2916d1e52a8eSRaja Mani 	 * 1 - Rx batch mode enabled
2917d1e52a8eSRaja Mani 	 * 0 - Rx batch mode disabled
2918d1e52a8eSRaja Mani 	 */
2919d1e52a8eSRaja Mani 	__le32 rx_batchmode;
2920d1e52a8eSRaja Mani 
2921d1e52a8eSRaja Mani 	/* Thermal throttling capability.
2922d1e52a8eSRaja Mani 	 * 1 - Capable of thermal throttling
2923d1e52a8eSRaja Mani 	 * 0 - Not capable of thermal throttling
2924d1e52a8eSRaja Mani 	 */
2925d1e52a8eSRaja Mani 	__le32 tt_support;
2926d1e52a8eSRaja Mani 
2927d1e52a8eSRaja Mani 	/* ATF configuration.
2928d1e52a8eSRaja Mani 	 * 1  - Enable ATF
2929d1e52a8eSRaja Mani 	 * 0  - Disable ATF
2930d1e52a8eSRaja Mani 	 */
2931d1e52a8eSRaja Mani 	__le32 atf_config;
2932d1e52a8eSRaja Mani 
2933d1e52a8eSRaja Mani 	/* Configure padding to manage IP header un-alignment
2934d1e52a8eSRaja Mani 	 * 1  - Enable padding
2935d1e52a8eSRaja Mani 	 * 0  - Disable padding
2936d1e52a8eSRaja Mani 	 */
2937d1e52a8eSRaja Mani 	__le32 iphdr_pad_config;
2938d1e52a8eSRaja Mani 
2939169ff6dbSBen Greear 	/* qwrap configuration (bits 15-0)
2940d1e52a8eSRaja Mani 	 * 1  - This is qwrap configuration
2941d1e52a8eSRaja Mani 	 * 0  - This is not qwrap
2942169ff6dbSBen Greear 	 *
2943169ff6dbSBen Greear 	 * Bits 31-16 is alloc_frag_desc_for_data_pkt (1 enables, 0 disables)
2944169ff6dbSBen Greear 	 * In order to get ack-RSSI reporting and to specify the tx-rate for
2945169ff6dbSBen Greear 	 * individual frames, this option must be enabled.  This uses an extra
2946169ff6dbSBen Greear 	 * 4 bytes per tx-msdu descriptor, so don't enable it unless you need it.
2947d1e52a8eSRaja Mani 	 */
2948d1e52a8eSRaja Mani 	__le32 qwrap_config;
2949d1e52a8eSRaja Mani } __packed;
2950d1e52a8eSRaja Mani 
2951add6cd8dSManikanta Pubbisetty enum wmi_coex_version {
2952add6cd8dSManikanta Pubbisetty 	WMI_NO_COEX_VERSION_SUPPORT	= 0,
2953add6cd8dSManikanta Pubbisetty 	/* 3 wire coex support*/
2954add6cd8dSManikanta Pubbisetty 	WMI_COEX_VERSION_1		= 1,
2955add6cd8dSManikanta Pubbisetty 	/* 2.5 wire coex support*/
2956add6cd8dSManikanta Pubbisetty 	WMI_COEX_VERSION_2		= 2,
2957add6cd8dSManikanta Pubbisetty 	/* 2.5 wire coex with duty cycle support */
2958add6cd8dSManikanta Pubbisetty 	WMI_COEX_VERSION_3		= 3,
2959add6cd8dSManikanta Pubbisetty 	/* 4 wire coex support*/
2960add6cd8dSManikanta Pubbisetty 	WMI_COEX_VERSION_4		= 4,
2961add6cd8dSManikanta Pubbisetty };
2962add6cd8dSManikanta Pubbisetty 
296347771902SRaja Mani /**
296447771902SRaja Mani  * enum wmi_10_4_feature_mask - WMI 10.4 feature enable/disable flags
296547771902SRaja Mani  * @WMI_10_4_LTEU_SUPPORT: LTEU config
296647771902SRaja Mani  * @WMI_10_4_COEX_GPIO_SUPPORT: COEX GPIO config
296747771902SRaja Mani  * @WMI_10_4_AUX_RADIO_SPECTRAL_INTF: AUX Radio Enhancement for spectral scan
296847771902SRaja Mani  * @WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF: AUX Radio Enhancement for chan load scan
296947771902SRaja Mani  * @WMI_10_4_BSS_CHANNEL_INFO_64: BSS channel info stats
297047771902SRaja Mani  * @WMI_10_4_PEER_STATS: Per station stats
2971add6cd8dSManikanta Pubbisetty  * @WMI_10_4_VDEV_STATS: Per vdev stats
2972add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS: Implicit TDLS support in firmware enable/disable
2973add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_OFFCHAN: TDLS offchannel support enable/disable
2974add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_UAPSD_BUFFER_STA: TDLS buffer sta support enable/disable
2975add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_UAPSD_SLEEP_STA: TDLS sleep sta support enable/disable
2976add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_CONN_TRACKER_IN_HOST_MODE: TDLS connection tracker in host
2977add6cd8dSManikanta Pubbisetty  *	enable/disable
2978add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_EXPLICIT_MODE_ONLY:Explicit TDLS mode enable/disable
2979c7fd8d23SBalaji Pothunoori  * @WMI_10_4_TX_DATA_ACK_RSSI: Enable DATA ACK RSSI if firmware is capable
298047771902SRaja Mani  */
298147771902SRaja Mani enum wmi_10_4_feature_mask {
298247771902SRaja Mani 	WMI_10_4_LTEU_SUPPORT			= BIT(0),
298347771902SRaja Mani 	WMI_10_4_COEX_GPIO_SUPPORT		= BIT(1),
298447771902SRaja Mani 	WMI_10_4_AUX_RADIO_SPECTRAL_INTF	= BIT(2),
298547771902SRaja Mani 	WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF	= BIT(3),
298647771902SRaja Mani 	WMI_10_4_BSS_CHANNEL_INFO_64		= BIT(4),
298747771902SRaja Mani 	WMI_10_4_PEER_STATS			= BIT(5),
2988add6cd8dSManikanta Pubbisetty 	WMI_10_4_VDEV_STATS			= BIT(6),
2989add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS				= BIT(7),
2990add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_OFFCHAN			= BIT(8),
2991add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_UAPSD_BUFFER_STA		= BIT(9),
2992add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_UAPSD_SLEEP_STA		= BIT(10),
2993add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_CONN_TRACKER_IN_HOST_MODE = BIT(11),
2994add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_EXPLICIT_MODE_ONLY	= BIT(12),
2995c7fd8d23SBalaji Pothunoori 	WMI_10_4_TX_DATA_ACK_RSSI               = BIT(16),
2996bb31b7cbSManikanta Pubbisetty 	WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT	= BIT(17),
2997bb31b7cbSManikanta Pubbisetty 	WMI_10_4_REPORT_AIRTIME			= BIT(18),
2998add6cd8dSManikanta Pubbisetty 
299947771902SRaja Mani };
300047771902SRaja Mani 
300147771902SRaja Mani struct wmi_ext_resource_config_10_4_cmd {
300247771902SRaja Mani 	/* contains enum wmi_host_platform_type */
300347771902SRaja Mani 	__le32 host_platform_config;
300447771902SRaja Mani 	/* see enum wmi_10_4_feature_mask */
300547771902SRaja Mani 	__le32 fw_feature_bitmap;
3006add6cd8dSManikanta Pubbisetty 	/* WLAN priority GPIO number */
3007add6cd8dSManikanta Pubbisetty 	__le32 wlan_gpio_priority;
3008add6cd8dSManikanta Pubbisetty 	/* see enum wmi_coex_version */
3009add6cd8dSManikanta Pubbisetty 	__le32 coex_version;
3010add6cd8dSManikanta Pubbisetty 	/* COEX GPIO config */
3011add6cd8dSManikanta Pubbisetty 	__le32 coex_gpio_pin1;
3012add6cd8dSManikanta Pubbisetty 	__le32 coex_gpio_pin2;
3013add6cd8dSManikanta Pubbisetty 	__le32 coex_gpio_pin3;
3014add6cd8dSManikanta Pubbisetty 	/* number of vdevs allowed to perform tdls */
3015add6cd8dSManikanta Pubbisetty 	__le32 num_tdls_vdevs;
3016add6cd8dSManikanta Pubbisetty 	/* number of peers to track per TDLS vdev */
3017add6cd8dSManikanta Pubbisetty 	__le32 num_tdls_conn_table_entries;
3018add6cd8dSManikanta Pubbisetty 	/* number of tdls sleep sta supported */
3019add6cd8dSManikanta Pubbisetty 	__le32 max_tdls_concurrent_sleep_sta;
3020add6cd8dSManikanta Pubbisetty 	/* number of tdls buffer sta supported */
3021add6cd8dSManikanta Pubbisetty 	__le32 max_tdls_concurrent_buffer_sta;
302247771902SRaja Mani };
302347771902SRaja Mani 
30245c9f0713SErik Stromdahl /* structure describing host memory chunk. */
30255e3dd157SKalle Valo struct host_memory_chunk {
30265e3dd157SKalle Valo 	/* id of the request that is passed up in service ready */
30275e3dd157SKalle Valo 	__le32 req_id;
30285e3dd157SKalle Valo 	/* the physical address the memory chunk */
30295e3dd157SKalle Valo 	__le32 ptr;
30305e3dd157SKalle Valo 	/* size of the chunk */
30315e3dd157SKalle Valo 	__le32 size;
30325e3dd157SKalle Valo } __packed;
30335e3dd157SKalle Valo 
3034cf9fca8fSMichal Kazior struct wmi_host_mem_chunks {
3035cf9fca8fSMichal Kazior 	__le32 count;
3036cf9fca8fSMichal Kazior 	/* some fw revisions require at least 1 chunk regardless of count */
3037cf9fca8fSMichal Kazior 	struct host_memory_chunk items[1];
3038cf9fca8fSMichal Kazior } __packed;
3039cf9fca8fSMichal Kazior 
30405e3dd157SKalle Valo struct wmi_init_cmd {
30415e3dd157SKalle Valo 	struct wmi_resource_config resource_config;
3042cf9fca8fSMichal Kazior 	struct wmi_host_mem_chunks mem_chunks;
30435e3dd157SKalle Valo } __packed;
30445e3dd157SKalle Valo 
3045e13dbeadSJoe Perches /* _10x structure is from 10.X FW API */
304612b2b9e3SBartosz Markowski struct wmi_init_cmd_10x {
304712b2b9e3SBartosz Markowski 	struct wmi_resource_config_10x resource_config;
3048cf9fca8fSMichal Kazior 	struct wmi_host_mem_chunks mem_chunks;
304912b2b9e3SBartosz Markowski } __packed;
305012b2b9e3SBartosz Markowski 
305124c88f78SMichal Kazior struct wmi_init_cmd_10_2 {
305224c88f78SMichal Kazior 	struct wmi_resource_config_10_2 resource_config;
3053cf9fca8fSMichal Kazior 	struct wmi_host_mem_chunks mem_chunks;
305424c88f78SMichal Kazior } __packed;
305524c88f78SMichal Kazior 
3056d1e52a8eSRaja Mani struct wmi_init_cmd_10_4 {
3057d1e52a8eSRaja Mani 	struct wmi_resource_config_10_4 resource_config;
3058d1e52a8eSRaja Mani 	struct wmi_host_mem_chunks mem_chunks;
3059d1e52a8eSRaja Mani } __packed;
3060d1e52a8eSRaja Mani 
306124c88f78SMichal Kazior struct wmi_chan_list_entry {
306224c88f78SMichal Kazior 	__le16 freq;
306324c88f78SMichal Kazior 	u8 phy_mode; /* valid for 10.2 only */
306424c88f78SMichal Kazior 	u8 reserved;
306524c88f78SMichal Kazior } __packed;
306624c88f78SMichal Kazior 
30675e3dd157SKalle Valo /* TLV for channel list */
30685e3dd157SKalle Valo struct wmi_chan_list {
30695e3dd157SKalle Valo 	__le32 tag; /* WMI_CHAN_LIST_TAG */
30705e3dd157SKalle Valo 	__le32 num_chan;
307124c88f78SMichal Kazior 	struct wmi_chan_list_entry channel_list[0];
30725e3dd157SKalle Valo } __packed;
30735e3dd157SKalle Valo 
30745e3dd157SKalle Valo struct wmi_bssid_list {
30755e3dd157SKalle Valo 	__le32 tag; /* WMI_BSSID_LIST_TAG */
30765e3dd157SKalle Valo 	__le32 num_bssid;
30775e3dd157SKalle Valo 	struct wmi_mac_addr bssid_list[0];
30785e3dd157SKalle Valo } __packed;
30795e3dd157SKalle Valo 
30805e3dd157SKalle Valo struct wmi_ie_data {
30815e3dd157SKalle Valo 	__le32 tag; /* WMI_IE_TAG */
30825e3dd157SKalle Valo 	__le32 ie_len;
30835e3dd157SKalle Valo 	u8 ie_data[0];
30845e3dd157SKalle Valo } __packed;
30855e3dd157SKalle Valo 
30865e3dd157SKalle Valo struct wmi_ssid {
30875e3dd157SKalle Valo 	__le32 ssid_len;
30885e3dd157SKalle Valo 	u8 ssid[32];
30895e3dd157SKalle Valo } __packed;
30905e3dd157SKalle Valo 
30915e3dd157SKalle Valo struct wmi_ssid_list {
30925e3dd157SKalle Valo 	__le32 tag; /* WMI_SSID_LIST_TAG */
30935e3dd157SKalle Valo 	__le32 num_ssids;
30945e3dd157SKalle Valo 	struct wmi_ssid ssids[0];
30955e3dd157SKalle Valo } __packed;
30965e3dd157SKalle Valo 
30975e3dd157SKalle Valo /* prefix used by scan requestor ids on the host */
30985e3dd157SKalle Valo #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
30995e3dd157SKalle Valo 
31005e3dd157SKalle Valo /* prefix used by scan request ids generated on the host */
31015e3dd157SKalle Valo /* host cycles through the lower 12 bits to generate ids */
31025e3dd157SKalle Valo #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
31035e3dd157SKalle Valo 
31045e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_SSID    16
31055e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_BSSID   4
31065e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_IE_LEN  256
31075e3dd157SKalle Valo 
3108dcca0bdbSMichal Kazior /* Values lower than this may be refused by some firmware revisions with a scan
3109dcca0bdbSMichal Kazior  * completion with a timedout reason.
3110dcca0bdbSMichal Kazior  */
3111dcca0bdbSMichal Kazior #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3112dcca0bdbSMichal Kazior 
31135e3dd157SKalle Valo /* Scan priority numbers must be sequential, starting with 0 */
31145e3dd157SKalle Valo enum wmi_scan_priority {
31155e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_VERY_LOW = 0,
31165e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_LOW,
31175e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_MEDIUM,
31185e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_HIGH,
31195e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_VERY_HIGH,
31205e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_COUNT   /* number of priorities supported */
31215e3dd157SKalle Valo };
31225e3dd157SKalle Valo 
3123a6aa5da3SMichal Kazior struct wmi_start_scan_common {
31245e3dd157SKalle Valo 	/* Scan ID */
31255e3dd157SKalle Valo 	__le32 scan_id;
31265e3dd157SKalle Valo 	/* Scan requestor ID */
31275e3dd157SKalle Valo 	__le32 scan_req_id;
31285e3dd157SKalle Valo 	/* VDEV id(interface) that is requesting scan */
31295e3dd157SKalle Valo 	__le32 vdev_id;
31305e3dd157SKalle Valo 	/* Scan Priority, input to scan scheduler */
31315e3dd157SKalle Valo 	__le32 scan_priority;
31325e3dd157SKalle Valo 	/* Scan events subscription */
31335e3dd157SKalle Valo 	__le32 notify_scan_events;
31345e3dd157SKalle Valo 	/* dwell time in msec on active channels */
31355e3dd157SKalle Valo 	__le32 dwell_time_active;
31365e3dd157SKalle Valo 	/* dwell time in msec on passive channels */
31375e3dd157SKalle Valo 	__le32 dwell_time_passive;
31385e3dd157SKalle Valo 	/*
31395e3dd157SKalle Valo 	 * min time in msec on the BSS channel,only valid if atleast one
31405e3dd157SKalle Valo 	 * VDEV is active
31415e3dd157SKalle Valo 	 */
31425e3dd157SKalle Valo 	__le32 min_rest_time;
31435e3dd157SKalle Valo 	/*
31445e3dd157SKalle Valo 	 * max rest time in msec on the BSS channel,only valid if at least
31455e3dd157SKalle Valo 	 * one VDEV is active
31465e3dd157SKalle Valo 	 */
31475e3dd157SKalle Valo 	/*
31485e3dd157SKalle Valo 	 * the scanner will rest on the bss channel at least min_rest_time
31495e3dd157SKalle Valo 	 * after min_rest_time the scanner will start checking for tx/rx
31505e3dd157SKalle Valo 	 * activity on all VDEVs. if there is no activity the scanner will
31515e3dd157SKalle Valo 	 * switch to off channel. if there is activity the scanner will let
31525e3dd157SKalle Valo 	 * the radio on the bss channel until max_rest_time expires.at
31535e3dd157SKalle Valo 	 * max_rest_time scanner will switch to off channel irrespective of
31545e3dd157SKalle Valo 	 * activity. activity is determined by the idle_time parameter.
31555e3dd157SKalle Valo 	 */
31565e3dd157SKalle Valo 	__le32 max_rest_time;
31575e3dd157SKalle Valo 	/*
31585e3dd157SKalle Valo 	 * time before sending next set of probe requests.
31595e3dd157SKalle Valo 	 * The scanner keeps repeating probe requests transmission with
31605e3dd157SKalle Valo 	 * period specified by repeat_probe_time.
31615e3dd157SKalle Valo 	 * The number of probe requests specified depends on the ssid_list
31625e3dd157SKalle Valo 	 * and bssid_list
31635e3dd157SKalle Valo 	 */
31645e3dd157SKalle Valo 	__le32 repeat_probe_time;
31655e3dd157SKalle Valo 	/* time in msec between 2 consequetive probe requests with in a set. */
31665e3dd157SKalle Valo 	__le32 probe_spacing_time;
31675e3dd157SKalle Valo 	/*
31685e3dd157SKalle Valo 	 * data inactivity time in msec on bss channel that will be used by
31695e3dd157SKalle Valo 	 * scanner for measuring the inactivity.
31705e3dd157SKalle Valo 	 */
31715e3dd157SKalle Valo 	__le32 idle_time;
31725e3dd157SKalle Valo 	/* maximum time in msec allowed for scan  */
31735e3dd157SKalle Valo 	__le32 max_scan_time;
31745e3dd157SKalle Valo 	/*
31755e3dd157SKalle Valo 	 * delay in msec before sending first probe request after switching
31765e3dd157SKalle Valo 	 * to a channel
31775e3dd157SKalle Valo 	 */
31785e3dd157SKalle Valo 	__le32 probe_delay;
31795e3dd157SKalle Valo 	/* Scan control flags */
31805e3dd157SKalle Valo 	__le32 scan_ctrl_flags;
3181a6aa5da3SMichal Kazior } __packed;
31825e3dd157SKalle Valo 
3183a6aa5da3SMichal Kazior struct wmi_start_scan_tlvs {
3184a6aa5da3SMichal Kazior 	/* TLV parameters. These includes channel list, ssid list, bssid list,
3185a6aa5da3SMichal Kazior 	 * extra ies.
31865e3dd157SKalle Valo 	 */
3187a6aa5da3SMichal Kazior 	u8 tlvs[0];
3188a6aa5da3SMichal Kazior } __packed;
3189a6aa5da3SMichal Kazior 
3190a6aa5da3SMichal Kazior struct wmi_start_scan_cmd {
3191a6aa5da3SMichal Kazior 	struct wmi_start_scan_common common;
3192a6aa5da3SMichal Kazior 	__le32 burst_duration_ms;
3193a6aa5da3SMichal Kazior 	struct wmi_start_scan_tlvs tlvs;
31945e3dd157SKalle Valo } __packed;
31955e3dd157SKalle Valo 
319689b7e766SBartosz Markowski /* This is the definition from 10.X firmware branch */
3197a6aa5da3SMichal Kazior struct wmi_10x_start_scan_cmd {
3198a6aa5da3SMichal Kazior 	struct wmi_start_scan_common common;
3199a6aa5da3SMichal Kazior 	struct wmi_start_scan_tlvs tlvs;
320089b7e766SBartosz Markowski } __packed;
320189b7e766SBartosz Markowski 
32025e3dd157SKalle Valo struct wmi_ssid_arg {
32035e3dd157SKalle Valo 	int len;
32045e3dd157SKalle Valo 	const u8 *ssid;
32055e3dd157SKalle Valo };
32065e3dd157SKalle Valo 
32075e3dd157SKalle Valo struct wmi_bssid_arg {
32085e3dd157SKalle Valo 	const u8 *bssid;
32095e3dd157SKalle Valo };
32105e3dd157SKalle Valo 
32115e3dd157SKalle Valo struct wmi_start_scan_arg {
32125e3dd157SKalle Valo 	u32 scan_id;
32135e3dd157SKalle Valo 	u32 scan_req_id;
32145e3dd157SKalle Valo 	u32 vdev_id;
32155e3dd157SKalle Valo 	u32 scan_priority;
32165e3dd157SKalle Valo 	u32 notify_scan_events;
32175e3dd157SKalle Valo 	u32 dwell_time_active;
32185e3dd157SKalle Valo 	u32 dwell_time_passive;
32195e3dd157SKalle Valo 	u32 min_rest_time;
32205e3dd157SKalle Valo 	u32 max_rest_time;
32215e3dd157SKalle Valo 	u32 repeat_probe_time;
32225e3dd157SKalle Valo 	u32 probe_spacing_time;
32235e3dd157SKalle Valo 	u32 idle_time;
32245e3dd157SKalle Valo 	u32 max_scan_time;
32255e3dd157SKalle Valo 	u32 probe_delay;
32265e3dd157SKalle Valo 	u32 scan_ctrl_flags;
3227dbd3f9f3SMichal Kazior 	u32 burst_duration_ms;
32285e3dd157SKalle Valo 
32295e3dd157SKalle Valo 	u32 ie_len;
32305e3dd157SKalle Valo 	u32 n_channels;
32315e3dd157SKalle Valo 	u32 n_ssids;
32325e3dd157SKalle Valo 	u32 n_bssids;
32335e3dd157SKalle Valo 
32345e3dd157SKalle Valo 	u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
323524c88f78SMichal Kazior 	u16 channels[64];
32365e3dd157SKalle Valo 	struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
32375e3dd157SKalle Valo 	struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
323860e1d0fbSCarl Huang 	struct wmi_mac_addr mac_addr;
323960e1d0fbSCarl Huang 	struct wmi_mac_addr mac_mask;
32405e3dd157SKalle Valo };
32415e3dd157SKalle Valo 
32425e3dd157SKalle Valo /* scan control flags */
32435e3dd157SKalle Valo 
32445e3dd157SKalle Valo /* passively scan all channels including active channels */
32455e3dd157SKalle Valo #define WMI_SCAN_FLAG_PASSIVE        0x1
32465e3dd157SKalle Valo /* add wild card ssid probe request even though ssid_list is specified. */
32475e3dd157SKalle Valo #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
32485e3dd157SKalle Valo /* add cck rates to rates/xrate ie for the generated probe request */
32495e3dd157SKalle Valo #define WMI_SCAN_ADD_CCK_RATES 0x4
32505e3dd157SKalle Valo /* add ofdm rates to rates/xrate ie for the generated probe request */
32515e3dd157SKalle Valo #define WMI_SCAN_ADD_OFDM_RATES 0x8
32525e3dd157SKalle Valo /* To enable indication of Chan load and Noise floor to host */
32535e3dd157SKalle Valo #define WMI_SCAN_CHAN_STAT_EVENT 0x10
32545e3dd157SKalle Valo /* Filter Probe request frames  */
32555e3dd157SKalle Valo #define WMI_SCAN_FILTER_PROBE_REQ 0x20
32565e3dd157SKalle Valo /* When set, DFS channels will not be scanned */
32575e3dd157SKalle Valo #define WMI_SCAN_BYPASS_DFS_CHN 0x40
32585e3dd157SKalle Valo /* Different FW scan engine may choose to bail out on errors.
325937ff1b0dSMarcin Rokicki  * Allow the driver to have influence over that.
326037ff1b0dSMarcin Rokicki  */
32615e3dd157SKalle Valo #define WMI_SCAN_CONTINUE_ON_ERROR 0x80
32625e3dd157SKalle Valo 
326360e1d0fbSCarl Huang /* Use random MAC address for TA for Probe Request frame and add
326460e1d0fbSCarl Huang  * OUI specified by WMI_SCAN_PROB_REQ_OUI_CMDID to the Probe Request frame.
326560e1d0fbSCarl Huang  * if OUI is not set by WMI_SCAN_PROB_REQ_OUI_CMDID then the flag is ignored.
326660e1d0fbSCarl Huang  */
326760e1d0fbSCarl Huang #define WMI_SCAN_ADD_SPOOFED_MAC_IN_PROBE_REQ   0x1000
326860e1d0fbSCarl Huang 
32695e3dd157SKalle Valo /* WMI_SCAN_CLASS_MASK must be the same value as IEEE80211_SCAN_CLASS_MASK */
32705e3dd157SKalle Valo #define WMI_SCAN_CLASS_MASK 0xFF000000
32715e3dd157SKalle Valo 
32725e3dd157SKalle Valo enum wmi_stop_scan_type {
32735e3dd157SKalle Valo 	WMI_SCAN_STOP_ONE	= 0x00000000, /* stop by scan_id */
32745e3dd157SKalle Valo 	WMI_SCAN_STOP_VDEV_ALL	= 0x01000000, /* stop by vdev_id */
32755e3dd157SKalle Valo 	WMI_SCAN_STOP_ALL	= 0x04000000, /* stop all scans */
32765e3dd157SKalle Valo };
32775e3dd157SKalle Valo 
32785e3dd157SKalle Valo struct wmi_stop_scan_cmd {
32795e3dd157SKalle Valo 	__le32 scan_req_id;
32805e3dd157SKalle Valo 	__le32 scan_id;
32815e3dd157SKalle Valo 	__le32 req_type;
32825e3dd157SKalle Valo 	__le32 vdev_id;
32835e3dd157SKalle Valo } __packed;
32845e3dd157SKalle Valo 
32855e3dd157SKalle Valo struct wmi_stop_scan_arg {
32865e3dd157SKalle Valo 	u32 req_id;
32875e3dd157SKalle Valo 	enum wmi_stop_scan_type req_type;
32885e3dd157SKalle Valo 	union {
32895e3dd157SKalle Valo 		u32 scan_id;
32905e3dd157SKalle Valo 		u32 vdev_id;
32915e3dd157SKalle Valo 	} u;
32925e3dd157SKalle Valo };
32935e3dd157SKalle Valo 
32945e3dd157SKalle Valo struct wmi_scan_chan_list_cmd {
32955e3dd157SKalle Valo 	__le32 num_scan_chans;
32965e3dd157SKalle Valo 	struct wmi_channel chan_info[0];
32975e3dd157SKalle Valo } __packed;
32985e3dd157SKalle Valo 
32995e3dd157SKalle Valo struct wmi_scan_chan_list_arg {
33005e3dd157SKalle Valo 	u32 n_channels;
33015e3dd157SKalle Valo 	struct wmi_channel_arg *channels;
33025e3dd157SKalle Valo };
33035e3dd157SKalle Valo 
33045e3dd157SKalle Valo enum wmi_bss_filter {
33055e3dd157SKalle Valo 	WMI_BSS_FILTER_NONE = 0,        /* no beacons forwarded */
33065e3dd157SKalle Valo 	WMI_BSS_FILTER_ALL,             /* all beacons forwarded */
33075e3dd157SKalle Valo 	WMI_BSS_FILTER_PROFILE,         /* only beacons matching profile */
33085e3dd157SKalle Valo 	WMI_BSS_FILTER_ALL_BUT_PROFILE, /* all but beacons matching profile */
33095e3dd157SKalle Valo 	WMI_BSS_FILTER_CURRENT_BSS,     /* only beacons matching current BSS */
33105e3dd157SKalle Valo 	WMI_BSS_FILTER_ALL_BUT_BSS,     /* all but beacons matching BSS */
33115e3dd157SKalle Valo 	WMI_BSS_FILTER_PROBED_SSID,     /* beacons matching probed ssid */
33125e3dd157SKalle Valo 	WMI_BSS_FILTER_LAST_BSS,        /* marker only */
33135e3dd157SKalle Valo };
33145e3dd157SKalle Valo 
33155e3dd157SKalle Valo enum wmi_scan_event_type {
3316b2297baaSRaja Mani 	WMI_SCAN_EVENT_STARTED              = BIT(0),
3317b2297baaSRaja Mani 	WMI_SCAN_EVENT_COMPLETED            = BIT(1),
3318b2297baaSRaja Mani 	WMI_SCAN_EVENT_BSS_CHANNEL          = BIT(2),
3319b2297baaSRaja Mani 	WMI_SCAN_EVENT_FOREIGN_CHANNEL      = BIT(3),
3320b2297baaSRaja Mani 	WMI_SCAN_EVENT_DEQUEUED             = BIT(4),
3321b2297baaSRaja Mani 	/* possibly by high-prio scan */
3322b2297baaSRaja Mani 	WMI_SCAN_EVENT_PREEMPTED            = BIT(5),
3323b2297baaSRaja Mani 	WMI_SCAN_EVENT_START_FAILED         = BIT(6),
3324b2297baaSRaja Mani 	WMI_SCAN_EVENT_RESTARTED            = BIT(7),
3325b2297baaSRaja Mani 	WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8),
3326b2297baaSRaja Mani 	WMI_SCAN_EVENT_MAX                  = BIT(15),
33275e3dd157SKalle Valo };
33285e3dd157SKalle Valo 
33295e3dd157SKalle Valo enum wmi_scan_completion_reason {
33305e3dd157SKalle Valo 	WMI_SCAN_REASON_COMPLETED,
33315e3dd157SKalle Valo 	WMI_SCAN_REASON_CANCELLED,
33325e3dd157SKalle Valo 	WMI_SCAN_REASON_PREEMPTED,
33335e3dd157SKalle Valo 	WMI_SCAN_REASON_TIMEDOUT,
3334b2297baaSRaja Mani 	WMI_SCAN_REASON_INTERNAL_FAILURE,
33355e3dd157SKalle Valo 	WMI_SCAN_REASON_MAX,
33365e3dd157SKalle Valo };
33375e3dd157SKalle Valo 
33385e3dd157SKalle Valo struct wmi_scan_event {
33395e3dd157SKalle Valo 	__le32 event_type; /* %WMI_SCAN_EVENT_ */
33405e3dd157SKalle Valo 	__le32 reason; /* %WMI_SCAN_REASON_ */
33415e3dd157SKalle Valo 	__le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
33425e3dd157SKalle Valo 	__le32 scan_req_id;
33435e3dd157SKalle Valo 	__le32 scan_id;
33445e3dd157SKalle Valo 	__le32 vdev_id;
33455e3dd157SKalle Valo } __packed;
33465e3dd157SKalle Valo 
33475e3dd157SKalle Valo /*
33485e3dd157SKalle Valo  * This defines how much headroom is kept in the
33495e3dd157SKalle Valo  * receive frame between the descriptor and the
33505e3dd157SKalle Valo  * payload, in order for the WMI PHY error and
33515e3dd157SKalle Valo  * management handler to insert header contents.
33525e3dd157SKalle Valo  *
33535e3dd157SKalle Valo  * This is in bytes.
33545e3dd157SKalle Valo  */
33555e3dd157SKalle Valo #define WMI_MGMT_RX_HDR_HEADROOM    52
33565e3dd157SKalle Valo 
33575e3dd157SKalle Valo /*
33585e3dd157SKalle Valo  * This event will be used for sending scan results
33595e3dd157SKalle Valo  * as well as rx mgmt frames to the host. The rx buffer
33605e3dd157SKalle Valo  * will be sent as part of this WMI event. It would be a
33615e3dd157SKalle Valo  * good idea to pass all the fields in the RX status
33625e3dd157SKalle Valo  * descriptor up to the host.
33635e3dd157SKalle Valo  */
33640d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v1 {
33655e3dd157SKalle Valo 	__le32 channel;
33665e3dd157SKalle Valo 	__le32 snr;
33675e3dd157SKalle Valo 	__le32 rate;
33685e3dd157SKalle Valo 	__le32 phy_mode;
33695e3dd157SKalle Valo 	__le32 buf_len;
33705e3dd157SKalle Valo 	__le32 status; /* %WMI_RX_STATUS_ */
33715e3dd157SKalle Valo } __packed;
33725e3dd157SKalle Valo 
33730d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v2 {
33740d9b0438SMichal Kazior 	struct wmi_mgmt_rx_hdr_v1 v1;
33750d9b0438SMichal Kazior 	__le32 rssi_ctl[4];
33760d9b0438SMichal Kazior } __packed;
33770d9b0438SMichal Kazior 
33780d9b0438SMichal Kazior struct wmi_mgmt_rx_event_v1 {
33790d9b0438SMichal Kazior 	struct wmi_mgmt_rx_hdr_v1 hdr;
33800d9b0438SMichal Kazior 	u8 buf[0];
33810d9b0438SMichal Kazior } __packed;
33820d9b0438SMichal Kazior 
33830d9b0438SMichal Kazior struct wmi_mgmt_rx_event_v2 {
33840d9b0438SMichal Kazior 	struct wmi_mgmt_rx_hdr_v2 hdr;
33855e3dd157SKalle Valo 	u8 buf[0];
33865e3dd157SKalle Valo } __packed;
33875e3dd157SKalle Valo 
33881c092961SRaja Mani struct wmi_10_4_mgmt_rx_hdr {
33891c092961SRaja Mani 	__le32 channel;
33901c092961SRaja Mani 	__le32 snr;
33911c092961SRaja Mani 	    u8 rssi_ctl[4];
33921c092961SRaja Mani 	__le32 rate;
33931c092961SRaja Mani 	__le32 phy_mode;
33941c092961SRaja Mani 	__le32 buf_len;
33951c092961SRaja Mani 	__le32 status;
33961c092961SRaja Mani } __packed;
33971c092961SRaja Mani 
33981c092961SRaja Mani struct wmi_10_4_mgmt_rx_event {
33991c092961SRaja Mani 	struct wmi_10_4_mgmt_rx_hdr hdr;
34001c092961SRaja Mani 	u8 buf[0];
34011c092961SRaja Mani } __packed;
34021c092961SRaja Mani 
34038d130963SPeter Oh struct wmi_mgmt_rx_ext_info {
34048d130963SPeter Oh 	__le64 rx_mac_timestamp;
34058d130963SPeter Oh } __packed __aligned(4);
34068d130963SPeter Oh 
34075e3dd157SKalle Valo #define WMI_RX_STATUS_OK			0x00
34085e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_CRC			0x01
34095e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_DECRYPT		0x08
34105e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_MIC			0x10
34115e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS	0x20
34128d130963SPeter Oh /* Extension data at the end of mgmt frame */
34138d130963SPeter Oh #define WMI_RX_STATUS_EXT_INFO		0x40
34145e3dd157SKalle Valo 
3415991adf71SRaja Mani #define PHY_ERROR_GEN_SPECTRAL_SCAN		0x26
3416991adf71SRaja Mani #define PHY_ERROR_GEN_FALSE_RADAR_EXT		0x24
3417991adf71SRaja Mani #define PHY_ERROR_GEN_RADAR			0x05
3418991adf71SRaja Mani 
34192b0a2e0dSRaja Mani #define PHY_ERROR_10_4_RADAR_MASK               0x4
34202b0a2e0dSRaja Mani #define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK       0x4000000
34212b0a2e0dSRaja Mani 
3422991adf71SRaja Mani enum phy_err_type {
3423991adf71SRaja Mani 	PHY_ERROR_UNKNOWN,
3424991adf71SRaja Mani 	PHY_ERROR_SPECTRAL_SCAN,
3425991adf71SRaja Mani 	PHY_ERROR_FALSE_RADAR_EXT,
3426991adf71SRaja Mani 	PHY_ERROR_RADAR
3427991adf71SRaja Mani };
34289702c686SJanusz Dziedzic 
34292332d0aeSMichal Kazior struct wmi_phyerr {
34305e3dd157SKalle Valo 	__le32 tsf_timestamp;
34315e3dd157SKalle Valo 	__le16 freq1;
34325e3dd157SKalle Valo 	__le16 freq2;
34335e3dd157SKalle Valo 	u8 rssi_combined;
34345e3dd157SKalle Valo 	u8 chan_width_mhz;
34355e3dd157SKalle Valo 	u8 phy_err_code;
34365e3dd157SKalle Valo 	u8 rsvd0;
34372332d0aeSMichal Kazior 	__le32 rssi_chains[4];
34382332d0aeSMichal Kazior 	__le16 nf_chains[4];
34395e3dd157SKalle Valo 	__le32 buf_len;
34402332d0aeSMichal Kazior 	u8 buf[0];
34415e3dd157SKalle Valo } __packed;
34425e3dd157SKalle Valo 
34432332d0aeSMichal Kazior struct wmi_phyerr_event {
34442332d0aeSMichal Kazior 	__le32 num_phyerrs;
34455e3dd157SKalle Valo 	__le32 tsf_l32;
34465e3dd157SKalle Valo 	__le32 tsf_u32;
34472332d0aeSMichal Kazior 	struct wmi_phyerr phyerrs[0];
34485e3dd157SKalle Valo } __packed;
34495e3dd157SKalle Valo 
34502b0a2e0dSRaja Mani struct wmi_10_4_phyerr_event {
34512b0a2e0dSRaja Mani 	__le32 tsf_l32;
34522b0a2e0dSRaja Mani 	__le32 tsf_u32;
34532b0a2e0dSRaja Mani 	__le16 freq1;
34542b0a2e0dSRaja Mani 	__le16 freq2;
34552b0a2e0dSRaja Mani 	u8 rssi_combined;
34562b0a2e0dSRaja Mani 	u8 chan_width_mhz;
34572b0a2e0dSRaja Mani 	u8 phy_err_code;
34582b0a2e0dSRaja Mani 	u8 rsvd0;
34592b0a2e0dSRaja Mani 	__le32 rssi_chains[4];
34602b0a2e0dSRaja Mani 	__le16 nf_chains[4];
34612b0a2e0dSRaja Mani 	__le32 phy_err_mask[2];
34622b0a2e0dSRaja Mani 	__le32 tsf_timestamp;
34632b0a2e0dSRaja Mani 	__le32 buf_len;
34642b0a2e0dSRaja Mani 	u8 buf[0];
34652b0a2e0dSRaja Mani } __packed;
34662b0a2e0dSRaja Mani 
34676f6eb1bcSSriram R struct wmi_radar_found_info {
34686f6eb1bcSSriram R 	__le32 pri_min;
34696f6eb1bcSSriram R 	__le32 pri_max;
34706f6eb1bcSSriram R 	__le32 width_min;
34716f6eb1bcSSriram R 	__le32 width_max;
34726f6eb1bcSSriram R 	__le32 sidx_min;
34736f6eb1bcSSriram R 	__le32 sidx_max;
34746f6eb1bcSSriram R } __packed;
34756f6eb1bcSSriram R 
34766f6eb1bcSSriram R enum wmi_radar_confirmation_status {
34776f6eb1bcSSriram R 	/* Detected radar was due to SW pulses */
34786f6eb1bcSSriram R 	WMI_SW_RADAR_DETECTED    = 0,
34796f6eb1bcSSriram R 
34806f6eb1bcSSriram R 	WMI_RADAR_DETECTION_FAIL = 1,
34816f6eb1bcSSriram R 
34826f6eb1bcSSriram R 	/* Real radar detected */
34836f6eb1bcSSriram R 	WMI_HW_RADAR_DETECTED    = 2,
34846f6eb1bcSSriram R };
34856f6eb1bcSSriram R 
34869702c686SJanusz Dziedzic #define PHYERR_TLV_SIG				0xBB
34879702c686SJanusz Dziedzic #define PHYERR_TLV_TAG_SEARCH_FFT_REPORT	0xFB
34889702c686SJanusz Dziedzic #define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY	0xF8
3489855aed12SSimon Wunderlich #define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT	0xF9
34909702c686SJanusz Dziedzic 
34919702c686SJanusz Dziedzic struct phyerr_radar_report {
34929702c686SJanusz Dziedzic 	__le32 reg0; /* RADAR_REPORT_REG0_* */
34930a7d88e4SMohammed Shafi Shajakhan 	__le32 reg1; /* RADAR_REPORT_REG1_* */
34949702c686SJanusz Dziedzic } __packed;
34959702c686SJanusz Dziedzic 
34969702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK		0x80000000
34979702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB		31
34989702c686SJanusz Dziedzic 
34999702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK	0x40000000
35009702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB	30
35019702c686SJanusz Dziedzic 
35029702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK		0x3FF00000
35039702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB		20
35049702c686SJanusz Dziedzic 
35059702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK		0x000F0000
35069702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB		16
35079702c686SJanusz Dziedzic 
35089702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK		0x0000FC00
35099702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB		10
35109702c686SJanusz Dziedzic 
35119702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_SIDX_MASK		0x000003FF
35129702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_SIDX_LSB		0
35139702c686SJanusz Dziedzic 
35149702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK	0x80000000
35159702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB	31
35169702c686SJanusz Dziedzic 
35179702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK	0x7F000000
35189702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB		24
35199702c686SJanusz Dziedzic 
35209702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK	0x00FF0000
35219702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB	16
35229702c686SJanusz Dziedzic 
35239702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK		0x0000FF00
35249702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB		8
35259702c686SJanusz Dziedzic 
35269702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_DUR_MASK		0x000000FF
35279702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_DUR_LSB			0
35289702c686SJanusz Dziedzic 
35299702c686SJanusz Dziedzic struct phyerr_fft_report {
35309702c686SJanusz Dziedzic 	__le32 reg0; /* SEARCH_FFT_REPORT_REG0_ * */
35319702c686SJanusz Dziedzic 	__le32 reg1; /* SEARCH_FFT_REPORT_REG1_ * */
35329702c686SJanusz Dziedzic } __packed;
35339702c686SJanusz Dziedzic 
35349702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK	0xFF800000
35359702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB	23
35369702c686SJanusz Dziedzic 
35379702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK		0x007FC000
35389702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB		14
35399702c686SJanusz Dziedzic 
35409702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK		0x00003000
35419702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB		12
35429702c686SJanusz Dziedzic 
35439702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK		0x00000FFF
35449702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB		0
35459702c686SJanusz Dziedzic 
35469702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK		0xFC000000
35479702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB		26
35489702c686SJanusz Dziedzic 
35499702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK		0x03FC0000
35509702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB		18
35519702c686SJanusz Dziedzic 
35529702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK		0x0003FF00
35539702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB		8
35549702c686SJanusz Dziedzic 
35559702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK	0x000000FF
35569702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB	0
35579702c686SJanusz Dziedzic 
35589702c686SJanusz Dziedzic struct phyerr_tlv {
35599702c686SJanusz Dziedzic 	__le16 len;
35609702c686SJanusz Dziedzic 	u8 tag;
35619702c686SJanusz Dziedzic 	u8 sig;
35629702c686SJanusz Dziedzic } __packed;
35639702c686SJanusz Dziedzic 
35649702c686SJanusz Dziedzic #define DFS_RSSI_POSSIBLY_FALSE			50
35659702c686SJanusz Dziedzic #define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE	40
35669702c686SJanusz Dziedzic 
35675e3dd157SKalle Valo struct wmi_mgmt_tx_hdr {
35685e3dd157SKalle Valo 	__le32 vdev_id;
35695e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
35705e3dd157SKalle Valo 	__le32 tx_rate;
35715e3dd157SKalle Valo 	__le32 tx_power;
35725e3dd157SKalle Valo 	__le32 buf_len;
35735e3dd157SKalle Valo } __packed;
35745e3dd157SKalle Valo 
35755e3dd157SKalle Valo struct wmi_mgmt_tx_cmd {
35765e3dd157SKalle Valo 	struct wmi_mgmt_tx_hdr hdr;
35775e3dd157SKalle Valo 	u8 buf[0];
35785e3dd157SKalle Valo } __packed;
35795e3dd157SKalle Valo 
35805e3dd157SKalle Valo struct wmi_echo_event {
35815e3dd157SKalle Valo 	__le32 value;
35825e3dd157SKalle Valo } __packed;
35835e3dd157SKalle Valo 
35845e3dd157SKalle Valo struct wmi_echo_cmd {
35855e3dd157SKalle Valo 	__le32 value;
35865e3dd157SKalle Valo } __packed;
35875e3dd157SKalle Valo 
35885e3dd157SKalle Valo struct wmi_pdev_set_regdomain_cmd {
35895e3dd157SKalle Valo 	__le32 reg_domain;
35905e3dd157SKalle Valo 	__le32 reg_domain_2G;
35915e3dd157SKalle Valo 	__le32 reg_domain_5G;
35925e3dd157SKalle Valo 	__le32 conformance_test_limit_2G;
35935e3dd157SKalle Valo 	__le32 conformance_test_limit_5G;
35945e3dd157SKalle Valo } __packed;
35955e3dd157SKalle Valo 
3596821af6aeSMarek Puzyniak enum wmi_dfs_region {
3597821af6aeSMarek Puzyniak 	/* Uninitialized dfs domain */
3598821af6aeSMarek Puzyniak 	WMI_UNINIT_DFS_DOMAIN = 0,
3599821af6aeSMarek Puzyniak 
3600821af6aeSMarek Puzyniak 	/* FCC3 dfs domain */
3601821af6aeSMarek Puzyniak 	WMI_FCC_DFS_DOMAIN = 1,
3602821af6aeSMarek Puzyniak 
3603821af6aeSMarek Puzyniak 	/* ETSI dfs domain */
3604821af6aeSMarek Puzyniak 	WMI_ETSI_DFS_DOMAIN = 2,
3605821af6aeSMarek Puzyniak 
3606821af6aeSMarek Puzyniak 	/*Japan dfs domain */
3607821af6aeSMarek Puzyniak 	WMI_MKK4_DFS_DOMAIN = 3,
3608821af6aeSMarek Puzyniak };
3609821af6aeSMarek Puzyniak 
3610821af6aeSMarek Puzyniak struct wmi_pdev_set_regdomain_cmd_10x {
3611821af6aeSMarek Puzyniak 	__le32 reg_domain;
3612821af6aeSMarek Puzyniak 	__le32 reg_domain_2G;
3613821af6aeSMarek Puzyniak 	__le32 reg_domain_5G;
3614821af6aeSMarek Puzyniak 	__le32 conformance_test_limit_2G;
3615821af6aeSMarek Puzyniak 	__le32 conformance_test_limit_5G;
3616821af6aeSMarek Puzyniak 
3617821af6aeSMarek Puzyniak 	/* dfs domain from wmi_dfs_region */
3618821af6aeSMarek Puzyniak 	__le32 dfs_domain;
3619821af6aeSMarek Puzyniak } __packed;
3620821af6aeSMarek Puzyniak 
36215e3dd157SKalle Valo /* Command to set/unset chip in quiet mode */
36225e3dd157SKalle Valo struct wmi_pdev_set_quiet_cmd {
36235e3dd157SKalle Valo 	/* period in TUs */
36245e3dd157SKalle Valo 	__le32 period;
36255e3dd157SKalle Valo 
36265e3dd157SKalle Valo 	/* duration in TUs */
36275e3dd157SKalle Valo 	__le32 duration;
36285e3dd157SKalle Valo 
36295e3dd157SKalle Valo 	/* offset in TUs */
36305e3dd157SKalle Valo 	__le32 next_start;
36315e3dd157SKalle Valo 
36325e3dd157SKalle Valo 	/* enable/disable */
36335e3dd157SKalle Valo 	__le32 enabled;
36345e3dd157SKalle Valo } __packed;
36355e3dd157SKalle Valo 
36365e3dd157SKalle Valo /*
36375e3dd157SKalle Valo  * 802.11g protection mode.
36385e3dd157SKalle Valo  */
36395e3dd157SKalle Valo enum ath10k_protmode {
36405e3dd157SKalle Valo 	ATH10K_PROT_NONE     = 0,    /* no protection */
36415e3dd157SKalle Valo 	ATH10K_PROT_CTSONLY  = 1,    /* CTS to self */
36425e3dd157SKalle Valo 	ATH10K_PROT_RTSCTS   = 2,    /* RTS-CTS */
36435e3dd157SKalle Valo };
36445e3dd157SKalle Valo 
3645e81bd104SMarek Kwaczynski enum wmi_rtscts_profile {
3646e81bd104SMarek Kwaczynski 	WMI_RTSCTS_FOR_NO_RATESERIES = 0,
3647e81bd104SMarek Kwaczynski 	WMI_RTSCTS_FOR_SECOND_RATESERIES,
3648e81bd104SMarek Kwaczynski 	WMI_RTSCTS_ACROSS_SW_RETRIES
3649e81bd104SMarek Kwaczynski };
3650e81bd104SMarek Kwaczynski 
3651e81bd104SMarek Kwaczynski #define WMI_RTSCTS_ENABLED		1
3652e81bd104SMarek Kwaczynski #define WMI_RTSCTS_SET_MASK		0x0f
3653e81bd104SMarek Kwaczynski #define WMI_RTSCTS_SET_LSB		0
3654e81bd104SMarek Kwaczynski 
3655e81bd104SMarek Kwaczynski #define WMI_RTSCTS_PROFILE_MASK		0xf0
3656e81bd104SMarek Kwaczynski #define WMI_RTSCTS_PROFILE_LSB		4
3657e81bd104SMarek Kwaczynski 
36585e3dd157SKalle Valo enum wmi_beacon_gen_mode {
36595e3dd157SKalle Valo 	WMI_BEACON_STAGGERED_MODE = 0,
36605e3dd157SKalle Valo 	WMI_BEACON_BURST_MODE = 1
36615e3dd157SKalle Valo };
36625e3dd157SKalle Valo 
36635e3dd157SKalle Valo enum wmi_csa_event_ies_present_flag {
36645e3dd157SKalle Valo 	WMI_CSA_IE_PRESENT = 0x00000001,
36655e3dd157SKalle Valo 	WMI_XCSA_IE_PRESENT = 0x00000002,
36665e3dd157SKalle Valo 	WMI_WBW_IE_PRESENT = 0x00000004,
36675e3dd157SKalle Valo 	WMI_CSWARP_IE_PRESENT = 0x00000008,
36685e3dd157SKalle Valo };
36695e3dd157SKalle Valo 
36705e3dd157SKalle Valo /* wmi CSA receive event from beacon frame */
36715e3dd157SKalle Valo struct wmi_csa_event {
36725e3dd157SKalle Valo 	__le32 i_fc_dur;
36735e3dd157SKalle Valo 	/* Bit 0-15: FC */
36745e3dd157SKalle Valo 	/* Bit 16-31: DUR */
36755e3dd157SKalle Valo 	struct wmi_mac_addr i_addr1;
36765e3dd157SKalle Valo 	struct wmi_mac_addr i_addr2;
36775e3dd157SKalle Valo 	__le32 csa_ie[2];
36785e3dd157SKalle Valo 	__le32 xcsa_ie[2];
36795e3dd157SKalle Valo 	__le32 wb_ie[2];
36805e3dd157SKalle Valo 	__le32 cswarp_ie;
36815e3dd157SKalle Valo 	__le32 ies_present_flag; /* wmi_csa_event_ies_present_flag */
36825e3dd157SKalle Valo } __packed;
36835e3dd157SKalle Valo 
36845e3dd157SKalle Valo /* the definition of different PDEV parameters */
36855e3dd157SKalle Valo #define PDEV_DEFAULT_STATS_UPDATE_PERIOD    500
36865e3dd157SKalle Valo #define VDEV_DEFAULT_STATS_UPDATE_PERIOD    500
36875e3dd157SKalle Valo #define PEER_DEFAULT_STATS_UPDATE_PERIOD    500
36885e3dd157SKalle Valo 
3689226a339bSBartosz Markowski struct wmi_pdev_param_map {
3690226a339bSBartosz Markowski 	u32 tx_chain_mask;
3691226a339bSBartosz Markowski 	u32 rx_chain_mask;
3692226a339bSBartosz Markowski 	u32 txpower_limit2g;
3693226a339bSBartosz Markowski 	u32 txpower_limit5g;
3694226a339bSBartosz Markowski 	u32 txpower_scale;
3695226a339bSBartosz Markowski 	u32 beacon_gen_mode;
3696226a339bSBartosz Markowski 	u32 beacon_tx_mode;
3697226a339bSBartosz Markowski 	u32 resmgr_offchan_mode;
3698226a339bSBartosz Markowski 	u32 protection_mode;
3699226a339bSBartosz Markowski 	u32 dynamic_bw;
3700226a339bSBartosz Markowski 	u32 non_agg_sw_retry_th;
3701226a339bSBartosz Markowski 	u32 agg_sw_retry_th;
3702226a339bSBartosz Markowski 	u32 sta_kickout_th;
3703226a339bSBartosz Markowski 	u32 ac_aggrsize_scaling;
3704226a339bSBartosz Markowski 	u32 ltr_enable;
3705226a339bSBartosz Markowski 	u32 ltr_ac_latency_be;
3706226a339bSBartosz Markowski 	u32 ltr_ac_latency_bk;
3707226a339bSBartosz Markowski 	u32 ltr_ac_latency_vi;
3708226a339bSBartosz Markowski 	u32 ltr_ac_latency_vo;
3709226a339bSBartosz Markowski 	u32 ltr_ac_latency_timeout;
3710226a339bSBartosz Markowski 	u32 ltr_sleep_override;
3711226a339bSBartosz Markowski 	u32 ltr_rx_override;
3712226a339bSBartosz Markowski 	u32 ltr_tx_activity_timeout;
3713226a339bSBartosz Markowski 	u32 l1ss_enable;
3714226a339bSBartosz Markowski 	u32 dsleep_enable;
3715226a339bSBartosz Markowski 	u32 pcielp_txbuf_flush;
3716226a339bSBartosz Markowski 	u32 pcielp_txbuf_watermark;
3717226a339bSBartosz Markowski 	u32 pcielp_txbuf_tmo_en;
3718226a339bSBartosz Markowski 	u32 pcielp_txbuf_tmo_value;
3719226a339bSBartosz Markowski 	u32 pdev_stats_update_period;
3720226a339bSBartosz Markowski 	u32 vdev_stats_update_period;
3721226a339bSBartosz Markowski 	u32 peer_stats_update_period;
3722226a339bSBartosz Markowski 	u32 bcnflt_stats_update_period;
3723226a339bSBartosz Markowski 	u32 pmf_qos;
3724226a339bSBartosz Markowski 	u32 arp_ac_override;
3725226a339bSBartosz Markowski 	u32 dcs;
3726226a339bSBartosz Markowski 	u32 ani_enable;
3727226a339bSBartosz Markowski 	u32 ani_poll_period;
3728226a339bSBartosz Markowski 	u32 ani_listen_period;
3729226a339bSBartosz Markowski 	u32 ani_ofdm_level;
3730226a339bSBartosz Markowski 	u32 ani_cck_level;
3731226a339bSBartosz Markowski 	u32 dyntxchain;
3732226a339bSBartosz Markowski 	u32 proxy_sta;
3733226a339bSBartosz Markowski 	u32 idle_ps_config;
3734226a339bSBartosz Markowski 	u32 power_gating_sleep;
3735226a339bSBartosz Markowski 	u32 fast_channel_reset;
3736226a339bSBartosz Markowski 	u32 burst_dur;
3737226a339bSBartosz Markowski 	u32 burst_enable;
3738a7bd3e99SPeter Oh 	u32 cal_period;
3739d86561ffSRaja Mani 	u32 aggr_burst;
3740d86561ffSRaja Mani 	u32 rx_decap_mode;
3741d86561ffSRaja Mani 	u32 smart_antenna_default_antenna;
3742d86561ffSRaja Mani 	u32 igmpmld_override;
3743d86561ffSRaja Mani 	u32 igmpmld_tid;
3744d86561ffSRaja Mani 	u32 antenna_gain;
3745d86561ffSRaja Mani 	u32 rx_filter;
3746d86561ffSRaja Mani 	u32 set_mcast_to_ucast_tid;
3747d86561ffSRaja Mani 	u32 proxy_sta_mode;
3748d86561ffSRaja Mani 	u32 set_mcast2ucast_mode;
3749d86561ffSRaja Mani 	u32 set_mcast2ucast_buffer;
3750d86561ffSRaja Mani 	u32 remove_mcast2ucast_buffer;
3751d86561ffSRaja Mani 	u32 peer_sta_ps_statechg_enable;
3752d86561ffSRaja Mani 	u32 igmpmld_ac_override;
3753d86561ffSRaja Mani 	u32 block_interbss;
3754d86561ffSRaja Mani 	u32 set_disable_reset_cmdid;
3755d86561ffSRaja Mani 	u32 set_msdu_ttl_cmdid;
3756d86561ffSRaja Mani 	u32 set_ppdu_duration_cmdid;
3757d86561ffSRaja Mani 	u32 txbf_sound_period_cmdid;
3758d86561ffSRaja Mani 	u32 set_promisc_mode_cmdid;
3759d86561ffSRaja Mani 	u32 set_burst_mode_cmdid;
3760d86561ffSRaja Mani 	u32 en_stats;
3761d86561ffSRaja Mani 	u32 mu_group_policy;
3762d86561ffSRaja Mani 	u32 noise_detection;
3763d86561ffSRaja Mani 	u32 noise_threshold;
3764d86561ffSRaja Mani 	u32 dpd_enable;
3765d86561ffSRaja Mani 	u32 set_mcast_bcast_echo;
3766d86561ffSRaja Mani 	u32 atf_strict_sch;
3767d86561ffSRaja Mani 	u32 atf_sched_duration;
3768d86561ffSRaja Mani 	u32 ant_plzn;
3769d86561ffSRaja Mani 	u32 mgmt_retry_limit;
3770d86561ffSRaja Mani 	u32 sensitivity_level;
3771d86561ffSRaja Mani 	u32 signed_txpower_2g;
3772d86561ffSRaja Mani 	u32 signed_txpower_5g;
3773d86561ffSRaja Mani 	u32 enable_per_tid_amsdu;
3774d86561ffSRaja Mani 	u32 enable_per_tid_ampdu;
3775d86561ffSRaja Mani 	u32 cca_threshold;
3776d86561ffSRaja Mani 	u32 rts_fixed_rate;
3777d86561ffSRaja Mani 	u32 pdev_reset;
3778d86561ffSRaja Mani 	u32 wapi_mbssid_offset;
3779d86561ffSRaja Mani 	u32 arp_srcaddr;
3780d86561ffSRaja Mani 	u32 arp_dstaddr;
378139136248SRajkumar Manoharan 	u32 enable_btcoex;
3782226a339bSBartosz Markowski };
3783226a339bSBartosz Markowski 
3784226a339bSBartosz Markowski #define WMI_PDEV_PARAM_UNSUPPORTED 0
3785226a339bSBartosz Markowski 
37865e3dd157SKalle Valo enum wmi_pdev_param {
3787d0e0a552SBen Greear 	/* TX chain mask */
37885e3dd157SKalle Valo 	WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3789d0e0a552SBen Greear 	/* RX chain mask */
37905e3dd157SKalle Valo 	WMI_PDEV_PARAM_RX_CHAIN_MASK,
37915e3dd157SKalle Valo 	/* TX power limit for 2G Radio */
37925e3dd157SKalle Valo 	WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
37935e3dd157SKalle Valo 	/* TX power limit for 5G Radio */
37945e3dd157SKalle Valo 	WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
37955e3dd157SKalle Valo 	/* TX power scale */
37965e3dd157SKalle Valo 	WMI_PDEV_PARAM_TXPOWER_SCALE,
37975e3dd157SKalle Valo 	/* Beacon generation mode . 0: host, 1: target   */
37985e3dd157SKalle Valo 	WMI_PDEV_PARAM_BEACON_GEN_MODE,
37995e3dd157SKalle Valo 	/* Beacon generation mode . 0: staggered 1: bursted   */
38005e3dd157SKalle Valo 	WMI_PDEV_PARAM_BEACON_TX_MODE,
38015e3dd157SKalle Valo 	/*
38025e3dd157SKalle Valo 	 * Resource manager off chan mode .
38035e3dd157SKalle Valo 	 * 0: turn off off chan mode. 1: turn on offchan mode
38045e3dd157SKalle Valo 	 */
38055e3dd157SKalle Valo 	WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
38065e3dd157SKalle Valo 	/*
38075e3dd157SKalle Valo 	 * Protection mode:
38085e3dd157SKalle Valo 	 * 0: no protection 1:use CTS-to-self 2: use RTS/CTS
38095e3dd157SKalle Valo 	 */
38105e3dd157SKalle Valo 	WMI_PDEV_PARAM_PROTECTION_MODE,
3811c4dd0d01SMichal Kazior 	/*
3812c4dd0d01SMichal Kazior 	 * Dynamic bandwidth - 0: disable, 1: enable
3813c4dd0d01SMichal Kazior 	 *
3814c4dd0d01SMichal Kazior 	 * When enabled HW rate control tries different bandwidths when
3815c4dd0d01SMichal Kazior 	 * retransmitting frames.
3816c4dd0d01SMichal Kazior 	 */
38175e3dd157SKalle Valo 	WMI_PDEV_PARAM_DYNAMIC_BW,
38185e3dd157SKalle Valo 	/* Non aggregrate/ 11g sw retry threshold.0-disable */
38195e3dd157SKalle Valo 	WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
38205e3dd157SKalle Valo 	/* aggregrate sw retry threshold. 0-disable*/
38215e3dd157SKalle Valo 	WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
38225e3dd157SKalle Valo 	/* Station kickout threshold (non of consecutive failures).0-disable */
38235e3dd157SKalle Valo 	WMI_PDEV_PARAM_STA_KICKOUT_TH,
38245e3dd157SKalle Valo 	/* Aggerate size scaling configuration per AC */
38255e3dd157SKalle Valo 	WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
38265e3dd157SKalle Valo 	/* LTR enable */
38275e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_ENABLE,
38285e3dd157SKalle Valo 	/* LTR latency for BE, in us */
38295e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
38305e3dd157SKalle Valo 	/* LTR latency for BK, in us */
38315e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
38325e3dd157SKalle Valo 	/* LTR latency for VI, in us */
38335e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
38345e3dd157SKalle Valo 	/* LTR latency for VO, in us  */
38355e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
38365e3dd157SKalle Valo 	/* LTR AC latency timeout, in ms */
38375e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
38385e3dd157SKalle Valo 	/* LTR platform latency override, in us */
38395e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
38405e3dd157SKalle Valo 	/* LTR-RX override, in us */
38415e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
38425e3dd157SKalle Valo 	/* Tx activity timeout for LTR, in us */
38435e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
38445e3dd157SKalle Valo 	/* L1SS state machine enable */
38455e3dd157SKalle Valo 	WMI_PDEV_PARAM_L1SS_ENABLE,
38465e3dd157SKalle Valo 	/* Deep sleep state machine enable */
38475e3dd157SKalle Valo 	WMI_PDEV_PARAM_DSLEEP_ENABLE,
38485e3dd157SKalle Valo 	/* RX buffering flush enable */
38495e3dd157SKalle Valo 	WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
38505e3dd157SKalle Valo 	/* RX buffering matermark */
38515e3dd157SKalle Valo 	WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
38525e3dd157SKalle Valo 	/* RX buffering timeout enable */
38535e3dd157SKalle Valo 	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
38545e3dd157SKalle Valo 	/* RX buffering timeout value */
38555e3dd157SKalle Valo 	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
38565e3dd157SKalle Valo 	/* pdev level stats update period in ms */
38575e3dd157SKalle Valo 	WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
38585e3dd157SKalle Valo 	/* vdev level stats update period in ms */
38595e3dd157SKalle Valo 	WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
38605e3dd157SKalle Valo 	/* peer level stats update period in ms */
38615e3dd157SKalle Valo 	WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
38625e3dd157SKalle Valo 	/* beacon filter status update period */
38635e3dd157SKalle Valo 	WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
38645e3dd157SKalle Valo 	/* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */
38655e3dd157SKalle Valo 	WMI_PDEV_PARAM_PMF_QOS,
38665e3dd157SKalle Valo 	/* Access category on which ARP frames are sent */
38675e3dd157SKalle Valo 	WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
38685e3dd157SKalle Valo 	/* DCS configuration */
38695e3dd157SKalle Valo 	WMI_PDEV_PARAM_DCS,
38705e3dd157SKalle Valo 	/* Enable/Disable ANI on target */
38715e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_ENABLE,
38725e3dd157SKalle Valo 	/* configure the ANI polling period */
38735e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_POLL_PERIOD,
38745e3dd157SKalle Valo 	/* configure the ANI listening period */
38755e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
38765e3dd157SKalle Valo 	/* configure OFDM immunity level */
38775e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
38785e3dd157SKalle Valo 	/* configure CCK immunity level */
38795e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_CCK_LEVEL,
38805e3dd157SKalle Valo 	/* Enable/Disable CDD for 1x1 STAs in rate control module */
38815e3dd157SKalle Valo 	WMI_PDEV_PARAM_DYNTXCHAIN,
38825e3dd157SKalle Valo 	/* Enable/Disable proxy STA */
38835e3dd157SKalle Valo 	WMI_PDEV_PARAM_PROXY_STA,
38845e3dd157SKalle Valo 	/* Enable/Disable low power state when all VDEVs are inactive/idle. */
38855e3dd157SKalle Valo 	WMI_PDEV_PARAM_IDLE_PS_CONFIG,
38865e3dd157SKalle Valo 	/* Enable/Disable power gating sleep */
38875e3dd157SKalle Valo 	WMI_PDEV_PARAM_POWER_GATING_SLEEP,
38885e3dd157SKalle Valo };
38895e3dd157SKalle Valo 
3890226a339bSBartosz Markowski enum wmi_10x_pdev_param {
3891226a339bSBartosz Markowski 	/* TX chian mask */
3892226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3893226a339bSBartosz Markowski 	/* RX chian mask */
3894226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
3895226a339bSBartosz Markowski 	/* TX power limit for 2G Radio */
3896226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
3897226a339bSBartosz Markowski 	/* TX power limit for 5G Radio */
3898226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
3899226a339bSBartosz Markowski 	/* TX power scale */
3900226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
3901226a339bSBartosz Markowski 	/* Beacon generation mode . 0: host, 1: target   */
3902226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
3903226a339bSBartosz Markowski 	/* Beacon generation mode . 0: staggered 1: bursted   */
3904226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
3905226a339bSBartosz Markowski 	/*
3906226a339bSBartosz Markowski 	 * Resource manager off chan mode .
3907226a339bSBartosz Markowski 	 * 0: turn off off chan mode. 1: turn on offchan mode
3908226a339bSBartosz Markowski 	 */
3909226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3910226a339bSBartosz Markowski 	/*
3911226a339bSBartosz Markowski 	 * Protection mode:
3912226a339bSBartosz Markowski 	 * 0: no protection 1:use CTS-to-self 2: use RTS/CTS
3913226a339bSBartosz Markowski 	 */
3914226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_PROTECTION_MODE,
3915226a339bSBartosz Markowski 	/* Dynamic bandwidth 0: disable 1: enable */
3916226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_DYNAMIC_BW,
3917226a339bSBartosz Markowski 	/* Non aggregrate/ 11g sw retry threshold.0-disable */
3918226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3919226a339bSBartosz Markowski 	/* aggregrate sw retry threshold. 0-disable*/
3920226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
3921226a339bSBartosz Markowski 	/* Station kickout threshold (non of consecutive failures).0-disable */
3922226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
3923226a339bSBartosz Markowski 	/* Aggerate size scaling configuration per AC */
3924226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3925226a339bSBartosz Markowski 	/* LTR enable */
3926226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_ENABLE,
3927226a339bSBartosz Markowski 	/* LTR latency for BE, in us */
3928226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
3929226a339bSBartosz Markowski 	/* LTR latency for BK, in us */
3930226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
3931226a339bSBartosz Markowski 	/* LTR latency for VI, in us */
3932226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
3933226a339bSBartosz Markowski 	/* LTR latency for VO, in us  */
3934226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
3935226a339bSBartosz Markowski 	/* LTR AC latency timeout, in ms */
3936226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3937226a339bSBartosz Markowski 	/* LTR platform latency override, in us */
3938226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3939226a339bSBartosz Markowski 	/* LTR-RX override, in us */
3940226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
3941226a339bSBartosz Markowski 	/* Tx activity timeout for LTR, in us */
3942226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3943226a339bSBartosz Markowski 	/* L1SS state machine enable */
3944226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_L1SS_ENABLE,
3945226a339bSBartosz Markowski 	/* Deep sleep state machine enable */
3946226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
3947226a339bSBartosz Markowski 	/* pdev level stats update period in ms */
3948226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3949226a339bSBartosz Markowski 	/* vdev level stats update period in ms */
3950226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3951226a339bSBartosz Markowski 	/* peer level stats update period in ms */
3952226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3953226a339bSBartosz Markowski 	/* beacon filter status update period */
3954226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3955226a339bSBartosz Markowski 	/* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */
3956226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_PMF_QOS,
3957226a339bSBartosz Markowski 	/* Access category on which ARP and DHCP frames are sent */
3958226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
3959226a339bSBartosz Markowski 	/* DCS configuration */
3960226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_DCS,
3961226a339bSBartosz Markowski 	/* Enable/Disable ANI on target */
3962226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_ENABLE,
3963226a339bSBartosz Markowski 	/* configure the ANI polling period */
3964226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
3965226a339bSBartosz Markowski 	/* configure the ANI listening period */
3966226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
3967226a339bSBartosz Markowski 	/* configure OFDM immunity level */
3968226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
3969226a339bSBartosz Markowski 	/* configure CCK immunity level */
3970226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
3971226a339bSBartosz Markowski 	/* Enable/Disable CDD for 1x1 STAs in rate control module */
3972226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_DYNTXCHAIN,
3973226a339bSBartosz Markowski 	/* Enable/Disable Fast channel reset*/
3974226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
3975226a339bSBartosz Markowski 	/* Set Bursting DUR */
3976226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BURST_DUR,
3977226a339bSBartosz Markowski 	/* Set Bursting Enable*/
3978226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BURST_ENABLE,
397924c88f78SMichal Kazior 
398024c88f78SMichal Kazior 	/* following are available as of firmware 10.2 */
398124c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
398224c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE,
398324c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_IGMPMLD_TID,
398424c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_ANTENNA_GAIN,
398524c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_RX_DECAP_MODE,
398624c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_RX_FILTER,
398724c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID,
398824c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_PROXY_STA_MODE,
398924c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE,
399024c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
399124c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
3992b43bf97eSPeter Oh 	WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
3993b43bf97eSPeter Oh 	WMI_10X_PDEV_PARAM_RTS_FIXED_RATE,
3994db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_CAL_PERIOD,
3995db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_ATF_STRICT_SCH,
3996db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_ATF_SCHED_DURATION,
3997db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
3998db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_PDEV_RESET
3999226a339bSBartosz Markowski };
4000226a339bSBartosz Markowski 
4001d86561ffSRaja Mani enum wmi_10_4_pdev_param {
4002d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
4003d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
4004d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
4005d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
4006d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
4007d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
4008d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
4009d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
4010d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
4011d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
4012d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
4013d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
4014d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
4015d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
4016d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_ENABLE,
4017d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
4018d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
4019d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
4020d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
4021d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
4022d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
4023d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
4024d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
4025d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
4026d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
4027d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
4028d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
4029d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
4030d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
4031d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
4032d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
4033d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
4034d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
4035d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PMF_QOS,
4036d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
4037d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DCS,
4038d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_ENABLE,
4039d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
4040d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
4041d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
4042d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
4043d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
4044d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PROXY_STA,
4045d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
4046d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
4047d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_AGGR_BURST,
4048d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
4049d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
4050d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BURST_DUR,
4051d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BURST_ENABLE,
4052d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
4053d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
4054d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
4055d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
4056d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RX_FILTER,
4057d86561ffSRaja Mani 	WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
4058d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
4059d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
4060d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
4061d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
4062d86561ffSRaja Mani 	WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
4063d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
4064d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
4065d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
4066d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
4067d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
4068d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
4069d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
4070d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
4071d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_EN_STATS,
4072d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
4073d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
4074d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
4075d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DPD_ENABLE,
4076d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
4077d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
4078d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
4079d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANT_PLZN,
4080d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
4081d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
4082d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
4083d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
4084d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
4085d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
4086d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
4087d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
4088d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_CAL_PERIOD,
4089d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PDEV_RESET,
4090d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
4091d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
4092d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
409352e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_TXPOWER_DECR_DB,
409452e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_RX_BATCHMODE,
409552e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_PACKET_AGGR_DELAY,
409652e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
409752e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
409852e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_CUST_TXPOWER_SCALE,
409939136248SRajkumar Manoharan 	WMI_10_4_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
410039136248SRajkumar Manoharan 	WMI_10_4_PDEV_PARAM_ATF_SSID_GROUP_POLICY,
410139136248SRajkumar Manoharan 	WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
4102d86561ffSRaja Mani };
4103d86561ffSRaja Mani 
41045e3dd157SKalle Valo struct wmi_pdev_set_param_cmd {
41055e3dd157SKalle Valo 	__le32 param_id;
41065e3dd157SKalle Valo 	__le32 param_value;
41075e3dd157SKalle Valo } __packed;
41085e3dd157SKalle Valo 
410905e7ba24SChristian Lamparter struct wmi_pdev_set_base_macaddr_cmd {
411005e7ba24SChristian Lamparter 	struct wmi_mac_addr mac_addr;
411105e7ba24SChristian Lamparter } __packed;
411205e7ba24SChristian Lamparter 
4113a7bd3e99SPeter Oh /* valid period is 1 ~ 60000ms, unit in millisecond */
4114a7bd3e99SPeter Oh #define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000
4115a7bd3e99SPeter Oh 
41165e3dd157SKalle Valo struct wmi_pdev_get_tpc_config_cmd {
41175e3dd157SKalle Valo 	/* parameter   */
41185e3dd157SKalle Valo 	__le32 param;
41195e3dd157SKalle Valo } __packed;
41205e3dd157SKalle Valo 
412129542666SMaharaja Kennadyrajan #define WMI_TPC_CONFIG_PARAM		1
4122bc64d052SMaharaja Kennadyrajan #define WMI_TPC_FINAL_RATE_MAX		240
41235e3dd157SKalle Valo #define WMI_TPC_TX_N_CHAIN		4
41244b190675STamizh Chelvam #define WMI_TPC_RATE_MAX               (WMI_TPC_TX_N_CHAIN * 65)
412529542666SMaharaja Kennadyrajan #define WMI_TPC_PREAM_TABLE_MAX		10
412629542666SMaharaja Kennadyrajan #define WMI_TPC_FLAG			3
412729542666SMaharaja Kennadyrajan #define WMI_TPC_BUF_SIZE		10
4128bc64d052SMaharaja Kennadyrajan #define WMI_TPC_BEAMFORMING		2
412929542666SMaharaja Kennadyrajan 
413029542666SMaharaja Kennadyrajan enum wmi_tpc_table_type {
413129542666SMaharaja Kennadyrajan 	WMI_TPC_TABLE_TYPE_CDD = 0,
413229542666SMaharaja Kennadyrajan 	WMI_TPC_TABLE_TYPE_STBC = 1,
413329542666SMaharaja Kennadyrajan 	WMI_TPC_TABLE_TYPE_TXBF = 2,
413429542666SMaharaja Kennadyrajan };
41355e3dd157SKalle Valo 
41365e3dd157SKalle Valo enum wmi_tpc_config_event_flag {
41375e3dd157SKalle Valo 	WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD	= 0x1,
41385e3dd157SKalle Valo 	WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC	= 0x2,
41395e3dd157SKalle Valo 	WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF	= 0x4,
41405e3dd157SKalle Valo };
41415e3dd157SKalle Valo 
41425e3dd157SKalle Valo struct wmi_pdev_tpc_config_event {
41435e3dd157SKalle Valo 	__le32 reg_domain;
41445e3dd157SKalle Valo 	__le32 chan_freq;
41455e3dd157SKalle Valo 	__le32 phy_mode;
41465e3dd157SKalle Valo 	__le32 twice_antenna_reduction;
41475e3dd157SKalle Valo 	__le32 twice_max_rd_power;
41483b8fc902SKalle Valo 	a_sle32 twice_antenna_gain;
41495e3dd157SKalle Valo 	__le32 power_limit;
41505e3dd157SKalle Valo 	__le32 rate_max;
41515e3dd157SKalle Valo 	__le32 num_tx_chain;
41525e3dd157SKalle Valo 	__le32 ctl;
41535e3dd157SKalle Valo 	__le32 flags;
41545e3dd157SKalle Valo 	s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
41555e3dd157SKalle Valo 	s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
41565e3dd157SKalle Valo 	s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
41575e3dd157SKalle Valo 	s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
41585e3dd157SKalle Valo 	u8 rates_array[WMI_TPC_RATE_MAX];
41595e3dd157SKalle Valo } __packed;
41605e3dd157SKalle Valo 
41615e3dd157SKalle Valo /* Transmit power scale factor. */
41625e3dd157SKalle Valo enum wmi_tp_scale {
41635e3dd157SKalle Valo 	WMI_TP_SCALE_MAX    = 0,	/* no scaling (default) */
41645e3dd157SKalle Valo 	WMI_TP_SCALE_50     = 1,	/* 50% of max (-3 dBm) */
41655e3dd157SKalle Valo 	WMI_TP_SCALE_25     = 2,	/* 25% of max (-6 dBm) */
41665e3dd157SKalle Valo 	WMI_TP_SCALE_12     = 3,	/* 12% of max (-9 dBm) */
41675e3dd157SKalle Valo 	WMI_TP_SCALE_MIN    = 4,	/* min, but still on   */
41685e3dd157SKalle Valo 	WMI_TP_SCALE_SIZE   = 5,	/* max num of enum     */
41695e3dd157SKalle Valo };
41705e3dd157SKalle Valo 
4171bc64d052SMaharaja Kennadyrajan struct wmi_pdev_tpc_final_table_event {
4172bc64d052SMaharaja Kennadyrajan 	__le32 reg_domain;
4173bc64d052SMaharaja Kennadyrajan 	__le32 chan_freq;
4174bc64d052SMaharaja Kennadyrajan 	__le32 phy_mode;
4175bc64d052SMaharaja Kennadyrajan 	__le32 twice_antenna_reduction;
4176bc64d052SMaharaja Kennadyrajan 	__le32 twice_max_rd_power;
4177bc64d052SMaharaja Kennadyrajan 	a_sle32 twice_antenna_gain;
4178bc64d052SMaharaja Kennadyrajan 	__le32 power_limit;
4179bc64d052SMaharaja Kennadyrajan 	__le32 rate_max;
4180bc64d052SMaharaja Kennadyrajan 	__le32 num_tx_chain;
4181bc64d052SMaharaja Kennadyrajan 	__le32 ctl;
4182bc64d052SMaharaja Kennadyrajan 	__le32 flags;
4183bc64d052SMaharaja Kennadyrajan 	s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
4184bc64d052SMaharaja Kennadyrajan 	s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4185bc64d052SMaharaja Kennadyrajan 	s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4186bc64d052SMaharaja Kennadyrajan 	s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4187bc64d052SMaharaja Kennadyrajan 	u8 rates_array[WMI_TPC_FINAL_RATE_MAX];
4188bc64d052SMaharaja Kennadyrajan 	u8 ctl_power_table[WMI_TPC_BEAMFORMING][WMI_TPC_TX_N_CHAIN]
4189bc64d052SMaharaja Kennadyrajan 	   [WMI_TPC_TX_N_CHAIN];
4190bc64d052SMaharaja Kennadyrajan } __packed;
4191bc64d052SMaharaja Kennadyrajan 
4192bc64d052SMaharaja Kennadyrajan struct wmi_pdev_get_tpc_table_cmd {
4193bc64d052SMaharaja Kennadyrajan 	__le32 param;
4194bc64d052SMaharaja Kennadyrajan } __packed;
4195bc64d052SMaharaja Kennadyrajan 
4196bc64d052SMaharaja Kennadyrajan enum wmi_tpc_pream_2ghz {
4197bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_CCK = 0,
4198bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_OFDM,
4199bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_HT20,
4200bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_HT40,
4201bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_VHT20,
4202bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_VHT40,
4203bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_VHT80,
4204bc64d052SMaharaja Kennadyrajan };
4205bc64d052SMaharaja Kennadyrajan 
4206bc64d052SMaharaja Kennadyrajan enum wmi_tpc_pream_5ghz {
4207bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_OFDM = 1,
4208bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_HT20,
4209bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_HT40,
4210bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_VHT20,
4211bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_VHT40,
4212bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_VHT80,
4213bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_HTCUP,
4214bc64d052SMaharaja Kennadyrajan };
4215bc64d052SMaharaja Kennadyrajan 
4216d70c0d46SMaharaja Kennadyrajan #define	WMI_PEER_PS_STATE_DISABLED	2
4217d70c0d46SMaharaja Kennadyrajan 
4218d70c0d46SMaharaja Kennadyrajan struct wmi_peer_sta_ps_state_chg_event {
4219d70c0d46SMaharaja Kennadyrajan 	struct wmi_mac_addr peer_macaddr;
4220d70c0d46SMaharaja Kennadyrajan 	__le32 peer_ps_state;
4221d70c0d46SMaharaja Kennadyrajan } __packed;
4222d70c0d46SMaharaja Kennadyrajan 
42235e3dd157SKalle Valo struct wmi_pdev_chanlist_update_event {
42245e3dd157SKalle Valo 	/* number of channels */
42255e3dd157SKalle Valo 	__le32 num_chan;
42265e3dd157SKalle Valo 	/* array of channels */
42275e3dd157SKalle Valo 	struct wmi_channel channel_list[1];
42285e3dd157SKalle Valo } __packed;
42295e3dd157SKalle Valo 
42305e3dd157SKalle Valo #define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32)
42315e3dd157SKalle Valo 
42325e3dd157SKalle Valo struct wmi_debug_mesg_event {
42335e3dd157SKalle Valo 	/* message buffer, NULL terminated */
42345e3dd157SKalle Valo 	char bufp[WMI_MAX_DEBUG_MESG];
42355e3dd157SKalle Valo } __packed;
42365e3dd157SKalle Valo 
42375e3dd157SKalle Valo enum {
42385e3dd157SKalle Valo 	/* P2P device */
42395e3dd157SKalle Valo 	VDEV_SUBTYPE_P2PDEV = 0,
42405e3dd157SKalle Valo 	/* P2P client */
42415e3dd157SKalle Valo 	VDEV_SUBTYPE_P2PCLI,
42425e3dd157SKalle Valo 	/* P2P GO */
42435e3dd157SKalle Valo 	VDEV_SUBTYPE_P2PGO,
42445e3dd157SKalle Valo 	/* BT3.0 HS */
42455e3dd157SKalle Valo 	VDEV_SUBTYPE_BT,
42465e3dd157SKalle Valo };
42475e3dd157SKalle Valo 
42485e3dd157SKalle Valo struct wmi_pdev_set_channel_cmd {
42495e3dd157SKalle Valo 	/* idnore power , only use flags , mode and freq */
42505e3dd157SKalle Valo 	struct wmi_channel chan;
42515e3dd157SKalle Valo } __packed;
42525e3dd157SKalle Valo 
425390174455SRajkumar Manoharan struct wmi_pdev_pktlog_enable_cmd {
425490174455SRajkumar Manoharan 	__le32 ev_bitmap;
425590174455SRajkumar Manoharan } __packed;
425690174455SRajkumar Manoharan 
42575e3dd157SKalle Valo /* Customize the DSCP (bit) to TID (0-7) mapping for QOS */
42585e3dd157SKalle Valo #define WMI_DSCP_MAP_MAX    (64)
42595e3dd157SKalle Valo struct wmi_pdev_set_dscp_tid_map_cmd {
42605e3dd157SKalle Valo 	/* map indicating DSCP to TID conversion */
42615e3dd157SKalle Valo 	__le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
42625e3dd157SKalle Valo } __packed;
42635e3dd157SKalle Valo 
42645e3dd157SKalle Valo enum mcast_bcast_rate_id {
42655e3dd157SKalle Valo 	WMI_SET_MCAST_RATE,
42665e3dd157SKalle Valo 	WMI_SET_BCAST_RATE
42675e3dd157SKalle Valo };
42685e3dd157SKalle Valo 
42695e3dd157SKalle Valo struct mcast_bcast_rate {
42705e3dd157SKalle Valo 	enum mcast_bcast_rate_id rate_id;
42715e3dd157SKalle Valo 	__le32 rate;
42725e3dd157SKalle Valo } __packed;
42735e3dd157SKalle Valo 
42745e3dd157SKalle Valo struct wmi_wmm_params {
42755e3dd157SKalle Valo 	__le32 cwmin;
42765e3dd157SKalle Valo 	__le32 cwmax;
42775e3dd157SKalle Valo 	__le32 aifs;
42785e3dd157SKalle Valo 	__le32 txop;
42795e3dd157SKalle Valo 	__le32 acm;
42805e3dd157SKalle Valo 	__le32 no_ack;
42815e3dd157SKalle Valo } __packed;
42825e3dd157SKalle Valo 
42835e3dd157SKalle Valo struct wmi_pdev_set_wmm_params {
42845e3dd157SKalle Valo 	struct wmi_wmm_params ac_be;
42855e3dd157SKalle Valo 	struct wmi_wmm_params ac_bk;
42865e3dd157SKalle Valo 	struct wmi_wmm_params ac_vi;
42875e3dd157SKalle Valo 	struct wmi_wmm_params ac_vo;
42885e3dd157SKalle Valo } __packed;
42895e3dd157SKalle Valo 
42905e3dd157SKalle Valo struct wmi_wmm_params_arg {
42915e3dd157SKalle Valo 	u32 cwmin;
42925e3dd157SKalle Valo 	u32 cwmax;
42935e3dd157SKalle Valo 	u32 aifs;
42945e3dd157SKalle Valo 	u32 txop;
42955e3dd157SKalle Valo 	u32 acm;
42965e3dd157SKalle Valo 	u32 no_ack;
42975e3dd157SKalle Valo };
42985e3dd157SKalle Valo 
42995e752e42SMichal Kazior struct wmi_wmm_params_all_arg {
43005e3dd157SKalle Valo 	struct wmi_wmm_params_arg ac_be;
43015e3dd157SKalle Valo 	struct wmi_wmm_params_arg ac_bk;
43025e3dd157SKalle Valo 	struct wmi_wmm_params_arg ac_vi;
43035e3dd157SKalle Valo 	struct wmi_wmm_params_arg ac_vo;
43045e3dd157SKalle Valo };
43055e3dd157SKalle Valo 
4306b91251fbSMichal Kazior struct wmi_pdev_stats_tx {
43075e3dd157SKalle Valo 	/* Num HTT cookies queued to dispatch list */
43085e3dd157SKalle Valo 	__le32 comp_queued;
43095e3dd157SKalle Valo 
43105e3dd157SKalle Valo 	/* Num HTT cookies dispatched */
43115e3dd157SKalle Valo 	__le32 comp_delivered;
43125e3dd157SKalle Valo 
43135e3dd157SKalle Valo 	/* Num MSDU queued to WAL */
43145e3dd157SKalle Valo 	__le32 msdu_enqued;
43155e3dd157SKalle Valo 
43165e3dd157SKalle Valo 	/* Num MPDU queue to WAL */
43175e3dd157SKalle Valo 	__le32 mpdu_enqued;
43185e3dd157SKalle Valo 
43195e3dd157SKalle Valo 	/* Num MSDUs dropped by WMM limit */
43205e3dd157SKalle Valo 	__le32 wmm_drop;
43215e3dd157SKalle Valo 
43225e3dd157SKalle Valo 	/* Num Local frames queued */
43235e3dd157SKalle Valo 	__le32 local_enqued;
43245e3dd157SKalle Valo 
43255e3dd157SKalle Valo 	/* Num Local frames done */
43265e3dd157SKalle Valo 	__le32 local_freed;
43275e3dd157SKalle Valo 
43285e3dd157SKalle Valo 	/* Num queued to HW */
43295e3dd157SKalle Valo 	__le32 hw_queued;
43305e3dd157SKalle Valo 
43315e3dd157SKalle Valo 	/* Num PPDU reaped from HW */
43325e3dd157SKalle Valo 	__le32 hw_reaped;
43335e3dd157SKalle Valo 
43345e3dd157SKalle Valo 	/* Num underruns */
43355e3dd157SKalle Valo 	__le32 underrun;
43365e3dd157SKalle Valo 
43375e3dd157SKalle Valo 	/* Num PPDUs cleaned up in TX abort */
43385e3dd157SKalle Valo 	__le32 tx_abort;
43395e3dd157SKalle Valo 
43405e3dd157SKalle Valo 	/* Num MPDUs requed by SW */
43415e3dd157SKalle Valo 	__le32 mpdus_requed;
43425e3dd157SKalle Valo 
43435e3dd157SKalle Valo 	/* excessive retries */
43445e3dd157SKalle Valo 	__le32 tx_ko;
43455e3dd157SKalle Valo 
43465e3dd157SKalle Valo 	/* data hw rate code */
43475e3dd157SKalle Valo 	__le32 data_rc;
43485e3dd157SKalle Valo 
43495e3dd157SKalle Valo 	/* Scheduler self triggers */
43505e3dd157SKalle Valo 	__le32 self_triggers;
43515e3dd157SKalle Valo 
43525e3dd157SKalle Valo 	/* frames dropped due to excessive sw retries */
43535e3dd157SKalle Valo 	__le32 sw_retry_failure;
43545e3dd157SKalle Valo 
43555e3dd157SKalle Valo 	/* illegal rate phy errors  */
43565e3dd157SKalle Valo 	__le32 illgl_rate_phy_err;
43575e3dd157SKalle Valo 
4358e13dbeadSJoe Perches 	/* wal pdev continuous xretry */
43595e3dd157SKalle Valo 	__le32 pdev_cont_xretry;
43605e3dd157SKalle Valo 
43615e3dd157SKalle Valo 	/* wal pdev continous xretry */
43625e3dd157SKalle Valo 	__le32 pdev_tx_timeout;
43635e3dd157SKalle Valo 
43645e3dd157SKalle Valo 	/* wal pdev resets  */
43655e3dd157SKalle Valo 	__le32 pdev_resets;
43665e3dd157SKalle Valo 
436734d714e0SBartosz Markowski 	/* frames dropped due to non-availability of stateless TIDs */
436834d714e0SBartosz Markowski 	__le32 stateless_tid_alloc_failure;
436934d714e0SBartosz Markowski 
43705e3dd157SKalle Valo 	__le32 phy_underrun;
43715e3dd157SKalle Valo 
43725e3dd157SKalle Valo 	/* MPDU is more than txop limit */
43735e3dd157SKalle Valo 	__le32 txop_ovf;
43745e3dd157SKalle Valo } __packed;
43755e3dd157SKalle Valo 
437698dd2b92SManikanta Pubbisetty struct wmi_10_4_pdev_stats_tx {
437798dd2b92SManikanta Pubbisetty 	/* Num HTT cookies queued to dispatch list */
437898dd2b92SManikanta Pubbisetty 	__le32 comp_queued;
437998dd2b92SManikanta Pubbisetty 
438098dd2b92SManikanta Pubbisetty 	/* Num HTT cookies dispatched */
438198dd2b92SManikanta Pubbisetty 	__le32 comp_delivered;
438298dd2b92SManikanta Pubbisetty 
438398dd2b92SManikanta Pubbisetty 	/* Num MSDU queued to WAL */
438498dd2b92SManikanta Pubbisetty 	__le32 msdu_enqued;
438598dd2b92SManikanta Pubbisetty 
438698dd2b92SManikanta Pubbisetty 	/* Num MPDU queue to WAL */
438798dd2b92SManikanta Pubbisetty 	__le32 mpdu_enqued;
438898dd2b92SManikanta Pubbisetty 
438998dd2b92SManikanta Pubbisetty 	/* Num MSDUs dropped by WMM limit */
439098dd2b92SManikanta Pubbisetty 	__le32 wmm_drop;
439198dd2b92SManikanta Pubbisetty 
439298dd2b92SManikanta Pubbisetty 	/* Num Local frames queued */
439398dd2b92SManikanta Pubbisetty 	__le32 local_enqued;
439498dd2b92SManikanta Pubbisetty 
439598dd2b92SManikanta Pubbisetty 	/* Num Local frames done */
439698dd2b92SManikanta Pubbisetty 	__le32 local_freed;
439798dd2b92SManikanta Pubbisetty 
439898dd2b92SManikanta Pubbisetty 	/* Num queued to HW */
439998dd2b92SManikanta Pubbisetty 	__le32 hw_queued;
440098dd2b92SManikanta Pubbisetty 
440198dd2b92SManikanta Pubbisetty 	/* Num PPDU reaped from HW */
440298dd2b92SManikanta Pubbisetty 	__le32 hw_reaped;
440398dd2b92SManikanta Pubbisetty 
440498dd2b92SManikanta Pubbisetty 	/* Num underruns */
440598dd2b92SManikanta Pubbisetty 	__le32 underrun;
440698dd2b92SManikanta Pubbisetty 
440798dd2b92SManikanta Pubbisetty 	/* HW Paused. */
440898dd2b92SManikanta Pubbisetty 	__le32  hw_paused;
440998dd2b92SManikanta Pubbisetty 
441098dd2b92SManikanta Pubbisetty 	/* Num PPDUs cleaned up in TX abort */
441198dd2b92SManikanta Pubbisetty 	__le32 tx_abort;
441298dd2b92SManikanta Pubbisetty 
441398dd2b92SManikanta Pubbisetty 	/* Num MPDUs requed by SW */
441498dd2b92SManikanta Pubbisetty 	__le32 mpdus_requed;
441598dd2b92SManikanta Pubbisetty 
441698dd2b92SManikanta Pubbisetty 	/* excessive retries */
441798dd2b92SManikanta Pubbisetty 	__le32 tx_ko;
441898dd2b92SManikanta Pubbisetty 
441998dd2b92SManikanta Pubbisetty 	/* data hw rate code */
442098dd2b92SManikanta Pubbisetty 	__le32 data_rc;
442198dd2b92SManikanta Pubbisetty 
442298dd2b92SManikanta Pubbisetty 	/* Scheduler self triggers */
442398dd2b92SManikanta Pubbisetty 	__le32 self_triggers;
442498dd2b92SManikanta Pubbisetty 
442598dd2b92SManikanta Pubbisetty 	/* frames dropped due to excessive sw retries */
442698dd2b92SManikanta Pubbisetty 	__le32 sw_retry_failure;
442798dd2b92SManikanta Pubbisetty 
442898dd2b92SManikanta Pubbisetty 	/* illegal rate phy errors  */
442998dd2b92SManikanta Pubbisetty 	__le32 illgl_rate_phy_err;
443098dd2b92SManikanta Pubbisetty 
443198dd2b92SManikanta Pubbisetty 	/* wal pdev continuous xretry */
443298dd2b92SManikanta Pubbisetty 	__le32 pdev_cont_xretry;
443398dd2b92SManikanta Pubbisetty 
443498dd2b92SManikanta Pubbisetty 	/* wal pdev tx timeouts */
443598dd2b92SManikanta Pubbisetty 	__le32 pdev_tx_timeout;
443698dd2b92SManikanta Pubbisetty 
443798dd2b92SManikanta Pubbisetty 	/* wal pdev resets  */
443898dd2b92SManikanta Pubbisetty 	__le32 pdev_resets;
443998dd2b92SManikanta Pubbisetty 
444098dd2b92SManikanta Pubbisetty 	/* frames dropped due to non-availability of stateless TIDs */
444198dd2b92SManikanta Pubbisetty 	__le32 stateless_tid_alloc_failure;
444298dd2b92SManikanta Pubbisetty 
444398dd2b92SManikanta Pubbisetty 	__le32 phy_underrun;
444498dd2b92SManikanta Pubbisetty 
444598dd2b92SManikanta Pubbisetty 	/* MPDU is more than txop limit */
444698dd2b92SManikanta Pubbisetty 	__le32 txop_ovf;
444798dd2b92SManikanta Pubbisetty 
444898dd2b92SManikanta Pubbisetty 	/* Number of Sequences posted */
444998dd2b92SManikanta Pubbisetty 	__le32 seq_posted;
445098dd2b92SManikanta Pubbisetty 
445198dd2b92SManikanta Pubbisetty 	/* Number of Sequences failed queueing */
445298dd2b92SManikanta Pubbisetty 	__le32 seq_failed_queueing;
445398dd2b92SManikanta Pubbisetty 
445498dd2b92SManikanta Pubbisetty 	/* Number of Sequences completed */
445598dd2b92SManikanta Pubbisetty 	__le32 seq_completed;
445698dd2b92SManikanta Pubbisetty 
445798dd2b92SManikanta Pubbisetty 	/* Number of Sequences restarted */
445898dd2b92SManikanta Pubbisetty 	__le32 seq_restarted;
445998dd2b92SManikanta Pubbisetty 
446098dd2b92SManikanta Pubbisetty 	/* Number of MU Sequences posted */
446198dd2b92SManikanta Pubbisetty 	__le32 mu_seq_posted;
446298dd2b92SManikanta Pubbisetty 
446398dd2b92SManikanta Pubbisetty 	/* Num MPDUs flushed by SW, HWPAUSED,SW TXABORT(Reset,channel change) */
446498dd2b92SManikanta Pubbisetty 	__le32 mpdus_sw_flush;
446598dd2b92SManikanta Pubbisetty 
446698dd2b92SManikanta Pubbisetty 	/* Num MPDUs filtered by HW, all filter condition (TTL expired) */
446798dd2b92SManikanta Pubbisetty 	__le32 mpdus_hw_filter;
446898dd2b92SManikanta Pubbisetty 
446998dd2b92SManikanta Pubbisetty 	/* Num MPDUs truncated by PDG
447098dd2b92SManikanta Pubbisetty 	 * (TXOP, TBTT, PPDU_duration based on rate, dyn_bw)
447198dd2b92SManikanta Pubbisetty 	 */
447298dd2b92SManikanta Pubbisetty 	__le32 mpdus_truncated;
447398dd2b92SManikanta Pubbisetty 
447498dd2b92SManikanta Pubbisetty 	/* Num MPDUs that was tried but didn't receive ACK or BA */
447598dd2b92SManikanta Pubbisetty 	__le32 mpdus_ack_failed;
447698dd2b92SManikanta Pubbisetty 
447798dd2b92SManikanta Pubbisetty 	/* Num MPDUs that was dropped due to expiry. */
447898dd2b92SManikanta Pubbisetty 	__le32 mpdus_expired;
447998dd2b92SManikanta Pubbisetty } __packed;
448098dd2b92SManikanta Pubbisetty 
4481b91251fbSMichal Kazior struct wmi_pdev_stats_rx {
44825e3dd157SKalle Valo 	/* Cnts any change in ring routing mid-ppdu */
44835e3dd157SKalle Valo 	__le32 mid_ppdu_route_change;
44845e3dd157SKalle Valo 
44855e3dd157SKalle Valo 	/* Total number of statuses processed */
44865e3dd157SKalle Valo 	__le32 status_rcvd;
44875e3dd157SKalle Valo 
44885e3dd157SKalle Valo 	/* Extra frags on rings 0-3 */
44895e3dd157SKalle Valo 	__le32 r0_frags;
44905e3dd157SKalle Valo 	__le32 r1_frags;
44915e3dd157SKalle Valo 	__le32 r2_frags;
44925e3dd157SKalle Valo 	__le32 r3_frags;
44935e3dd157SKalle Valo 
44945e3dd157SKalle Valo 	/* MSDUs / MPDUs delivered to HTT */
44955e3dd157SKalle Valo 	__le32 htt_msdus;
44965e3dd157SKalle Valo 	__le32 htt_mpdus;
44975e3dd157SKalle Valo 
44985e3dd157SKalle Valo 	/* MSDUs / MPDUs delivered to local stack */
44995e3dd157SKalle Valo 	__le32 loc_msdus;
45005e3dd157SKalle Valo 	__le32 loc_mpdus;
45015e3dd157SKalle Valo 
45025e3dd157SKalle Valo 	/* AMSDUs that have more MSDUs than the status ring size */
45035e3dd157SKalle Valo 	__le32 oversize_amsdu;
45045e3dd157SKalle Valo 
45055e3dd157SKalle Valo 	/* Number of PHY errors */
45065e3dd157SKalle Valo 	__le32 phy_errs;
45075e3dd157SKalle Valo 
45085e3dd157SKalle Valo 	/* Number of PHY errors drops */
45095e3dd157SKalle Valo 	__le32 phy_err_drop;
45105e3dd157SKalle Valo 
45115e3dd157SKalle Valo 	/* Number of mpdu errors - FCS, MIC, ENC etc. */
45125e3dd157SKalle Valo 	__le32 mpdu_errs;
45135e3dd157SKalle Valo } __packed;
45145e3dd157SKalle Valo 
4515b91251fbSMichal Kazior struct wmi_pdev_stats_peer {
45165e3dd157SKalle Valo 	/* REMOVE THIS ONCE REAL PEER STAT COUNTERS ARE ADDED */
45175e3dd157SKalle Valo 	__le32 dummy;
45185e3dd157SKalle Valo } __packed;
45195e3dd157SKalle Valo 
45205e3dd157SKalle Valo enum wmi_stats_id {
4521eed55411SMichal Kazior 	WMI_STAT_PEER = BIT(0),
4522eed55411SMichal Kazior 	WMI_STAT_AP = BIT(1),
4523eed55411SMichal Kazior 	WMI_STAT_PDEV = BIT(2),
4524eed55411SMichal Kazior 	WMI_STAT_VDEV = BIT(3),
4525eed55411SMichal Kazior 	WMI_STAT_BCNFLT = BIT(4),
4526eed55411SMichal Kazior 	WMI_STAT_VDEV_RATE = BIT(5),
45275e3dd157SKalle Valo };
45285e3dd157SKalle Valo 
4529f9575793SMohammed Shafi Shajakhan enum wmi_10_4_stats_id {
4530f9575793SMohammed Shafi Shajakhan 	WMI_10_4_STAT_PEER		= BIT(0),
4531f9575793SMohammed Shafi Shajakhan 	WMI_10_4_STAT_AP		= BIT(1),
4532f9575793SMohammed Shafi Shajakhan 	WMI_10_4_STAT_INST		= BIT(2),
4533f9575793SMohammed Shafi Shajakhan 	WMI_10_4_STAT_PEER_EXTD		= BIT(3),
45341b3fdb50SRajkumar Manoharan 	WMI_10_4_STAT_VDEV_EXTD		= BIT(4),
4535f9575793SMohammed Shafi Shajakhan };
4536f9575793SMohammed Shafi Shajakhan 
4537f40a307eSSurabhi Vishnoi enum wmi_tlv_stats_id {
4538f40a307eSSurabhi Vishnoi 	WMI_TLV_STAT_PDEV	= BIT(0),
4539f40a307eSSurabhi Vishnoi 	WMI_TLV_STAT_VDEV	= BIT(1),
4540f40a307eSSurabhi Vishnoi 	WMI_TLV_STAT_PEER	= BIT(2),
4541f40a307eSSurabhi Vishnoi 	WMI_TLV_STAT_PEER_EXTD  = BIT(10),
4542f40a307eSSurabhi Vishnoi };
4543f40a307eSSurabhi Vishnoi 
4544db9cdda6SBen Greear struct wlan_inst_rssi_args {
4545db9cdda6SBen Greear 	__le16 cfg_retry_count;
4546db9cdda6SBen Greear 	__le16 retry_count;
4547db9cdda6SBen Greear };
4548db9cdda6SBen Greear 
45495e3dd157SKalle Valo struct wmi_request_stats_cmd {
45505e3dd157SKalle Valo 	__le32 stats_id;
45515e3dd157SKalle Valo 
4552db9cdda6SBen Greear 	__le32 vdev_id;
4553db9cdda6SBen Greear 
4554db9cdda6SBen Greear 	/* peer MAC address */
4555db9cdda6SBen Greear 	struct wmi_mac_addr peer_macaddr;
4556db9cdda6SBen Greear 
4557db9cdda6SBen Greear 	/* Instantaneous RSSI arguments */
4558db9cdda6SBen Greear 	struct wlan_inst_rssi_args inst_rssi_args;
45595e3dd157SKalle Valo } __packed;
45605e3dd157SKalle Valo 
45615e3dd157SKalle Valo /* Suspend option */
45625e3dd157SKalle Valo enum {
45635e3dd157SKalle Valo 	/* suspend */
45645e3dd157SKalle Valo 	WMI_PDEV_SUSPEND,
45655e3dd157SKalle Valo 
45665e3dd157SKalle Valo 	/* suspend and disable all interrupts */
45675e3dd157SKalle Valo 	WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
45685e3dd157SKalle Valo };
45695e3dd157SKalle Valo 
45705e3dd157SKalle Valo struct wmi_pdev_suspend_cmd {
45715e3dd157SKalle Valo 	/* suspend option sent to target */
45725e3dd157SKalle Valo 	__le32 suspend_opt;
45735e3dd157SKalle Valo } __packed;
45745e3dd157SKalle Valo 
45755e3dd157SKalle Valo struct wmi_stats_event {
4576eed55411SMichal Kazior 	__le32 stats_id; /* WMI_STAT_ */
45775e3dd157SKalle Valo 	/*
45785e3dd157SKalle Valo 	 * number of pdev stats event structures
45795e3dd157SKalle Valo 	 * (wmi_pdev_stats) 0 or 1
45805e3dd157SKalle Valo 	 */
45815e3dd157SKalle Valo 	__le32 num_pdev_stats;
45825e3dd157SKalle Valo 	/*
45835e3dd157SKalle Valo 	 * number of vdev stats event structures
45845e3dd157SKalle Valo 	 * (wmi_vdev_stats) 0 or max vdevs
45855e3dd157SKalle Valo 	 */
45865e3dd157SKalle Valo 	__le32 num_vdev_stats;
45875e3dd157SKalle Valo 	/*
45885e3dd157SKalle Valo 	 * number of peer stats event structures
45895e3dd157SKalle Valo 	 * (wmi_peer_stats) 0 or max peers
45905e3dd157SKalle Valo 	 */
45915e3dd157SKalle Valo 	__le32 num_peer_stats;
45925e3dd157SKalle Valo 	__le32 num_bcnflt_stats;
45935e3dd157SKalle Valo 	/*
45945e3dd157SKalle Valo 	 * followed by
45955e3dd157SKalle Valo 	 *   num_pdev_stats * size of(struct wmi_pdev_stats)
45965e3dd157SKalle Valo 	 *   num_vdev_stats * size of(struct wmi_vdev_stats)
45975e3dd157SKalle Valo 	 *   num_peer_stats * size of(struct wmi_peer_stats)
45985e3dd157SKalle Valo 	 *
45995e3dd157SKalle Valo 	 *  By having a zero sized array, the pointer to data area
46005e3dd157SKalle Valo 	 *  becomes available without increasing the struct size
46015e3dd157SKalle Valo 	 */
46025e3dd157SKalle Valo 	u8 data[0];
46035e3dd157SKalle Valo } __packed;
46045e3dd157SKalle Valo 
460520de2229SMichal Kazior struct wmi_10_2_stats_event {
460620de2229SMichal Kazior 	__le32 stats_id; /* %WMI_REQUEST_ */
460720de2229SMichal Kazior 	__le32 num_pdev_stats;
460820de2229SMichal Kazior 	__le32 num_pdev_ext_stats;
460920de2229SMichal Kazior 	__le32 num_vdev_stats;
461020de2229SMichal Kazior 	__le32 num_peer_stats;
461120de2229SMichal Kazior 	__le32 num_bcnflt_stats;
461220de2229SMichal Kazior 	u8 data[0];
461320de2229SMichal Kazior } __packed;
461420de2229SMichal Kazior 
46155e3dd157SKalle Valo /*
46165e3dd157SKalle Valo  * PDEV statistics
46175e3dd157SKalle Valo  * TODO: add all PDEV stats here
46185e3dd157SKalle Valo  */
4619b91251fbSMichal Kazior struct wmi_pdev_stats_base {
4620b91251fbSMichal Kazior 	__le32 chan_nf;
462115138fdfSBen Greear 	__le32 tx_frame_count; /* Cycles spent transmitting frames */
462215138fdfSBen Greear 	__le32 rx_frame_count; /* Cycles spent receiving frames */
462315138fdfSBen Greear 	__le32 rx_clear_count; /* Total channel busy time, evidently */
462415138fdfSBen Greear 	__le32 cycle_count; /* Total on-channel time */
4625b91251fbSMichal Kazior 	__le32 phy_err_count;
4626b91251fbSMichal Kazior 	__le32 chan_tx_pwr;
46275e3dd157SKalle Valo } __packed;
46285e3dd157SKalle Valo 
4629b91251fbSMichal Kazior struct wmi_pdev_stats {
4630b91251fbSMichal Kazior 	struct wmi_pdev_stats_base base;
4631b91251fbSMichal Kazior 	struct wmi_pdev_stats_tx tx;
4632b91251fbSMichal Kazior 	struct wmi_pdev_stats_rx rx;
4633b91251fbSMichal Kazior 	struct wmi_pdev_stats_peer peer;
4634b91251fbSMichal Kazior } __packed;
4635b91251fbSMichal Kazior 
4636b91251fbSMichal Kazior struct wmi_pdev_stats_extra {
463752e346d1SChun-Yeow Yeoh 	__le32 ack_rx_bad;
463852e346d1SChun-Yeow Yeoh 	__le32 rts_bad;
463952e346d1SChun-Yeow Yeoh 	__le32 rts_good;
464052e346d1SChun-Yeow Yeoh 	__le32 fcs_bad;
464152e346d1SChun-Yeow Yeoh 	__le32 no_beacons;
464252e346d1SChun-Yeow Yeoh 	__le32 mib_int_count;
464352e346d1SChun-Yeow Yeoh } __packed;
464452e346d1SChun-Yeow Yeoh 
4645b91251fbSMichal Kazior struct wmi_10x_pdev_stats {
4646b91251fbSMichal Kazior 	struct wmi_pdev_stats_base base;
4647b91251fbSMichal Kazior 	struct wmi_pdev_stats_tx tx;
4648b91251fbSMichal Kazior 	struct wmi_pdev_stats_rx rx;
4649b91251fbSMichal Kazior 	struct wmi_pdev_stats_peer peer;
4650b91251fbSMichal Kazior 	struct wmi_pdev_stats_extra extra;
4651b91251fbSMichal Kazior } __packed;
4652b91251fbSMichal Kazior 
465320de2229SMichal Kazior struct wmi_pdev_stats_mem {
465420de2229SMichal Kazior 	__le32 dram_free;
465520de2229SMichal Kazior 	__le32 iram_free;
465620de2229SMichal Kazior } __packed;
465720de2229SMichal Kazior 
465820de2229SMichal Kazior struct wmi_10_2_pdev_stats {
465920de2229SMichal Kazior 	struct wmi_pdev_stats_base base;
466020de2229SMichal Kazior 	struct wmi_pdev_stats_tx tx;
466120de2229SMichal Kazior 	__le32 mc_drop;
466220de2229SMichal Kazior 	struct wmi_pdev_stats_rx rx;
466320de2229SMichal Kazior 	__le32 pdev_rx_timeout;
466420de2229SMichal Kazior 	struct wmi_pdev_stats_mem mem;
466520de2229SMichal Kazior 	struct wmi_pdev_stats_peer peer;
466620de2229SMichal Kazior 	struct wmi_pdev_stats_extra extra;
466720de2229SMichal Kazior } __packed;
466820de2229SMichal Kazior 
466998dd2b92SManikanta Pubbisetty struct wmi_10_4_pdev_stats {
467098dd2b92SManikanta Pubbisetty 	struct wmi_pdev_stats_base base;
467198dd2b92SManikanta Pubbisetty 	struct wmi_10_4_pdev_stats_tx tx;
467298dd2b92SManikanta Pubbisetty 	struct wmi_pdev_stats_rx rx;
467398dd2b92SManikanta Pubbisetty 	__le32 rx_ovfl_errs;
467498dd2b92SManikanta Pubbisetty 	struct wmi_pdev_stats_mem mem;
467598dd2b92SManikanta Pubbisetty 	__le32 sram_free_size;
467698dd2b92SManikanta Pubbisetty 	struct wmi_pdev_stats_extra extra;
467798dd2b92SManikanta Pubbisetty } __packed;
467898dd2b92SManikanta Pubbisetty 
46795e3dd157SKalle Valo /*
46805e3dd157SKalle Valo  * VDEV statistics
46815e3dd157SKalle Valo  */
46821b3fdb50SRajkumar Manoharan 
46831b3fdb50SRajkumar Manoharan #define WMI_VDEV_STATS_FTM_COUNT_VALID	BIT(31)
46841b3fdb50SRajkumar Manoharan #define WMI_VDEV_STATS_FTM_COUNT_LSB	0
46851b3fdb50SRajkumar Manoharan #define WMI_VDEV_STATS_FTM_COUNT_MASK	0x7fffffff
46861b3fdb50SRajkumar Manoharan 
46875e3dd157SKalle Valo struct wmi_vdev_stats {
46885e3dd157SKalle Valo 	__le32 vdev_id;
46895e3dd157SKalle Valo } __packed;
46905e3dd157SKalle Valo 
46911b3fdb50SRajkumar Manoharan struct wmi_vdev_stats_extd {
46921b3fdb50SRajkumar Manoharan 	__le32 vdev_id;
46931b3fdb50SRajkumar Manoharan 	__le32 ppdu_aggr_cnt;
46941b3fdb50SRajkumar Manoharan 	__le32 ppdu_noack;
46951b3fdb50SRajkumar Manoharan 	__le32 mpdu_queued;
46961b3fdb50SRajkumar Manoharan 	__le32 ppdu_nonaggr_cnt;
46971b3fdb50SRajkumar Manoharan 	__le32 mpdu_sw_requeued;
46981b3fdb50SRajkumar Manoharan 	__le32 mpdu_suc_retry;
46991b3fdb50SRajkumar Manoharan 	__le32 mpdu_suc_multitry;
47001b3fdb50SRajkumar Manoharan 	__le32 mpdu_fail_retry;
47011b3fdb50SRajkumar Manoharan 	__le32 tx_ftm_suc;
47021b3fdb50SRajkumar Manoharan 	__le32 tx_ftm_suc_retry;
47031b3fdb50SRajkumar Manoharan 	__le32 tx_ftm_fail;
47041b3fdb50SRajkumar Manoharan 	__le32 rx_ftmr_cnt;
47051b3fdb50SRajkumar Manoharan 	__le32 rx_ftmr_dup_cnt;
47061b3fdb50SRajkumar Manoharan 	__le32 rx_iftmr_cnt;
47071b3fdb50SRajkumar Manoharan 	__le32 rx_iftmr_dup_cnt;
47081b3fdb50SRajkumar Manoharan 	__le32 reserved[6];
47091b3fdb50SRajkumar Manoharan } __packed;
47101b3fdb50SRajkumar Manoharan 
47115e3dd157SKalle Valo /*
47125e3dd157SKalle Valo  * peer statistics.
47135e3dd157SKalle Valo  * TODO: add more stats
47145e3dd157SKalle Valo  */
4715d15fb520SMichal Kazior struct wmi_peer_stats {
47165e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
47175e3dd157SKalle Valo 	__le32 peer_rssi;
47185e3dd157SKalle Valo 	__le32 peer_tx_rate;
47195e3dd157SKalle Valo } __packed;
47205e3dd157SKalle Valo 
4721d15fb520SMichal Kazior struct wmi_10x_peer_stats {
4722d15fb520SMichal Kazior 	struct wmi_peer_stats old;
472323c3aae4SBen Greear 	__le32 peer_rx_rate;
472423c3aae4SBen Greear } __packed;
472523c3aae4SBen Greear 
472620de2229SMichal Kazior struct wmi_10_2_peer_stats {
472720de2229SMichal Kazior 	struct wmi_peer_stats old;
472820de2229SMichal Kazior 	__le32 peer_rx_rate;
472920de2229SMichal Kazior 	__le32 current_per;
473020de2229SMichal Kazior 	__le32 retries;
473120de2229SMichal Kazior 	__le32 tx_rate_count;
473220de2229SMichal Kazior 	__le32 max_4ms_frame_len;
473320de2229SMichal Kazior 	__le32 total_sub_frames;
473420de2229SMichal Kazior 	__le32 tx_bytes;
473520de2229SMichal Kazior 	__le32 num_pkt_loss_overflow[4];
473620de2229SMichal Kazior 	__le32 num_pkt_loss_excess_retry[4];
473720de2229SMichal Kazior } __packed;
473820de2229SMichal Kazior 
473920de2229SMichal Kazior struct wmi_10_2_4_peer_stats {
474020de2229SMichal Kazior 	struct wmi_10_2_peer_stats common;
4741774e656eSMohammed Shafi Shajakhan 	__le32 peer_rssi_changed;
474220de2229SMichal Kazior } __packed;
474320de2229SMichal Kazior 
4744de46c015SMohammed Shafi Shajakhan struct wmi_10_2_4_ext_peer_stats {
4745de46c015SMohammed Shafi Shajakhan 	struct wmi_10_2_peer_stats common;
4746de46c015SMohammed Shafi Shajakhan 	__le32 peer_rssi_changed;
4747de46c015SMohammed Shafi Shajakhan 	__le32 rx_duration;
4748de46c015SMohammed Shafi Shajakhan } __packed;
4749de46c015SMohammed Shafi Shajakhan 
475098dd2b92SManikanta Pubbisetty struct wmi_10_4_peer_stats {
475198dd2b92SManikanta Pubbisetty 	struct wmi_mac_addr peer_macaddr;
475298dd2b92SManikanta Pubbisetty 	__le32 peer_rssi;
475398dd2b92SManikanta Pubbisetty 	__le32 peer_rssi_seq_num;
475498dd2b92SManikanta Pubbisetty 	__le32 peer_tx_rate;
475598dd2b92SManikanta Pubbisetty 	__le32 peer_rx_rate;
475698dd2b92SManikanta Pubbisetty 	__le32 current_per;
475798dd2b92SManikanta Pubbisetty 	__le32 retries;
475898dd2b92SManikanta Pubbisetty 	__le32 tx_rate_count;
475998dd2b92SManikanta Pubbisetty 	__le32 max_4ms_frame_len;
476098dd2b92SManikanta Pubbisetty 	__le32 total_sub_frames;
476198dd2b92SManikanta Pubbisetty 	__le32 tx_bytes;
476298dd2b92SManikanta Pubbisetty 	__le32 num_pkt_loss_overflow[4];
476398dd2b92SManikanta Pubbisetty 	__le32 num_pkt_loss_excess_retry[4];
476498dd2b92SManikanta Pubbisetty 	__le32 peer_rssi_changed;
476598dd2b92SManikanta Pubbisetty } __packed;
476698dd2b92SManikanta Pubbisetty 
4767f9575793SMohammed Shafi Shajakhan struct wmi_10_4_peer_extd_stats {
4768f9575793SMohammed Shafi Shajakhan 	struct wmi_mac_addr peer_macaddr;
4769f9575793SMohammed Shafi Shajakhan 	__le32 inactive_time;
4770f9575793SMohammed Shafi Shajakhan 	__le32 peer_chain_rssi;
4771f9575793SMohammed Shafi Shajakhan 	__le32 rx_duration;
4772f9575793SMohammed Shafi Shajakhan 	__le32 reserved[10];
4773f9575793SMohammed Shafi Shajakhan } __packed;
4774f9575793SMohammed Shafi Shajakhan 
47754a49ae94SMohammed Shafi Shajakhan struct wmi_10_4_bss_bcn_stats {
47764a49ae94SMohammed Shafi Shajakhan 	__le32 vdev_id;
47774a49ae94SMohammed Shafi Shajakhan 	__le32 bss_bcns_dropped;
47784a49ae94SMohammed Shafi Shajakhan 	__le32 bss_bcn_delivered;
47794a49ae94SMohammed Shafi Shajakhan } __packed;
47804a49ae94SMohammed Shafi Shajakhan 
47814a49ae94SMohammed Shafi Shajakhan struct wmi_10_4_bss_bcn_filter_stats {
47824a49ae94SMohammed Shafi Shajakhan 	__le32 bcns_dropped;
47834a49ae94SMohammed Shafi Shajakhan 	__le32 bcns_delivered;
47844a49ae94SMohammed Shafi Shajakhan 	__le32 active_filters;
47854a49ae94SMohammed Shafi Shajakhan 	struct wmi_10_4_bss_bcn_stats bss_stats;
47864a49ae94SMohammed Shafi Shajakhan } __packed;
47874a49ae94SMohammed Shafi Shajakhan 
478820de2229SMichal Kazior struct wmi_10_2_pdev_ext_stats {
478920de2229SMichal Kazior 	__le32 rx_rssi_comb;
479020de2229SMichal Kazior 	__le32 rx_rssi[4];
479120de2229SMichal Kazior 	__le32 rx_mcs[10];
479220de2229SMichal Kazior 	__le32 tx_mcs[10];
479320de2229SMichal Kazior 	__le32 ack_rssi;
479420de2229SMichal Kazior } __packed;
479520de2229SMichal Kazior 
47965e3dd157SKalle Valo struct wmi_vdev_create_cmd {
47975e3dd157SKalle Valo 	__le32 vdev_id;
47985e3dd157SKalle Valo 	__le32 vdev_type;
47995e3dd157SKalle Valo 	__le32 vdev_subtype;
48005e3dd157SKalle Valo 	struct wmi_mac_addr vdev_macaddr;
48015e3dd157SKalle Valo } __packed;
48025e3dd157SKalle Valo 
48035e3dd157SKalle Valo enum wmi_vdev_type {
48045e3dd157SKalle Valo 	WMI_VDEV_TYPE_AP      = 1,
48055e3dd157SKalle Valo 	WMI_VDEV_TYPE_STA     = 2,
48065e3dd157SKalle Valo 	WMI_VDEV_TYPE_IBSS    = 3,
48075e3dd157SKalle Valo 	WMI_VDEV_TYPE_MONITOR = 4,
48085e3dd157SKalle Valo };
48095e3dd157SKalle Valo 
48105e3dd157SKalle Valo enum wmi_vdev_subtype {
48116e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_NONE,
48126e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_P2P_DEVICE,
48136e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_P2P_CLIENT,
48146e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_P2P_GO,
48156e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_PROXY_STA,
48166e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_MESH_11S,
48176e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_MESH_NON_11S,
48186e4de1a4SPeter Oh };
48196e4de1a4SPeter Oh 
48206e4de1a4SPeter Oh enum wmi_vdev_subtype_legacy {
48216e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_NONE      = 0,
48226e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV   = 1,
48236e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI   = 2,
48246e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_P2P_GO    = 3,
48256e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA = 4,
48266e4de1a4SPeter Oh };
48276e4de1a4SPeter Oh 
48286e4de1a4SPeter Oh enum wmi_vdev_subtype_10_2_4 {
48296e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_NONE      = 0,
48306e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV   = 1,
48316e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI   = 2,
48326e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_P2P_GO    = 3,
48336e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA = 4,
48346e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_MESH_11S  = 5,
48356e4de1a4SPeter Oh };
48366e4de1a4SPeter Oh 
48376e4de1a4SPeter Oh enum wmi_vdev_subtype_10_4 {
48386e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_NONE         = 0,
48396e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_P2P_DEV      = 1,
48406e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_P2P_CLI      = 2,
48416e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_P2P_GO       = 3,
48426e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_PROXY_STA    = 4,
48436e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S = 5,
48446e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_MESH_11S     = 6,
48455e3dd157SKalle Valo };
48465e3dd157SKalle Valo 
48475e3dd157SKalle Valo /* values for vdev_subtype */
48485e3dd157SKalle Valo 
48495e3dd157SKalle Valo /* values for vdev_start_request flags */
48505e3dd157SKalle Valo /*
48515e3dd157SKalle Valo  * Indicates that AP VDEV uses hidden ssid. only valid for
485237ff1b0dSMarcin Rokicki  *  AP/GO
485337ff1b0dSMarcin Rokicki  */
48545e3dd157SKalle Valo #define WMI_VDEV_START_HIDDEN_SSID  (1 << 0)
48555e3dd157SKalle Valo /*
48565e3dd157SKalle Valo  * Indicates if robust management frame/management frame
48575e3dd157SKalle Valo  *  protection is enabled. For GO/AP vdevs, it indicates that
48585e3dd157SKalle Valo  *  it may support station/client associations with RMF enabled.
48595e3dd157SKalle Valo  *  For STA/client vdevs, it indicates that sta will
486037ff1b0dSMarcin Rokicki  *  associate with AP with RMF enabled.
486137ff1b0dSMarcin Rokicki  */
48625e3dd157SKalle Valo #define WMI_VDEV_START_PMF_ENABLED  (1 << 1)
48635e3dd157SKalle Valo 
48645e3dd157SKalle Valo struct wmi_p2p_noa_descriptor {
48655e3dd157SKalle Valo 	__le32 type_count; /* 255: continuous schedule, 0: reserved */
48665e3dd157SKalle Valo 	__le32 duration;  /* Absent period duration in micro seconds */
48675e3dd157SKalle Valo 	__le32 interval;   /* Absent period interval in micro seconds */
48685e3dd157SKalle Valo 	__le32 start_time; /* 32 bit tsf time when in starts */
48695e3dd157SKalle Valo } __packed;
48705e3dd157SKalle Valo 
48715e3dd157SKalle Valo struct wmi_vdev_start_request_cmd {
48725e3dd157SKalle Valo 	/* WMI channel */
48735e3dd157SKalle Valo 	struct wmi_channel chan;
48745e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
48755e3dd157SKalle Valo 	__le32 vdev_id;
48765e3dd157SKalle Valo 	/* requestor id identifying the caller module */
48775e3dd157SKalle Valo 	__le32 requestor_id;
48785e3dd157SKalle Valo 	/* beacon interval from received beacon */
48795e3dd157SKalle Valo 	__le32 beacon_interval;
48805e3dd157SKalle Valo 	/* DTIM Period from the received beacon */
48815e3dd157SKalle Valo 	__le32 dtim_period;
48825e3dd157SKalle Valo 	/* Flags */
48835e3dd157SKalle Valo 	__le32 flags;
48845e3dd157SKalle Valo 	/* ssid field. Only valid for AP/GO/IBSS/BTAmp VDEV type. */
48855e3dd157SKalle Valo 	struct wmi_ssid ssid;
4886e13dbeadSJoe Perches 	/* beacon/probe response xmit rate. Applicable for SoftAP. */
48875e3dd157SKalle Valo 	__le32 bcn_tx_rate;
4888e13dbeadSJoe Perches 	/* beacon/probe response xmit power. Applicable for SoftAP. */
48895e3dd157SKalle Valo 	__le32 bcn_tx_power;
48905e3dd157SKalle Valo 	/* number of p2p NOA descriptor(s) from scan entry */
48915e3dd157SKalle Valo 	__le32 num_noa_descriptors;
48925e3dd157SKalle Valo 	/*
48935e3dd157SKalle Valo 	 * Disable H/W ack. This used by WMI_VDEV_RESTART_REQUEST_CMDID.
48945e3dd157SKalle Valo 	 * During CAC, Our HW shouldn't ack ditected frames
48955e3dd157SKalle Valo 	 */
48965e3dd157SKalle Valo 	__le32 disable_hw_ack;
48975e3dd157SKalle Valo 	/* actual p2p NOA descriptor from scan entry */
48985e3dd157SKalle Valo 	struct wmi_p2p_noa_descriptor noa_descriptors[2];
48995e3dd157SKalle Valo } __packed;
49005e3dd157SKalle Valo 
49015e3dd157SKalle Valo struct wmi_vdev_restart_request_cmd {
49025e3dd157SKalle Valo 	struct wmi_vdev_start_request_cmd vdev_start_request_cmd;
49035e3dd157SKalle Valo } __packed;
49045e3dd157SKalle Valo 
49055e3dd157SKalle Valo struct wmi_vdev_start_request_arg {
49065e3dd157SKalle Valo 	u32 vdev_id;
49075e3dd157SKalle Valo 	struct wmi_channel_arg channel;
49085e3dd157SKalle Valo 	u32 bcn_intval;
49095e3dd157SKalle Valo 	u32 dtim_period;
49105e3dd157SKalle Valo 	u8 *ssid;
49115e3dd157SKalle Valo 	u32 ssid_len;
49125e3dd157SKalle Valo 	u32 bcn_tx_rate;
49135e3dd157SKalle Valo 	u32 bcn_tx_power;
49145e3dd157SKalle Valo 	bool disable_hw_ack;
49155e3dd157SKalle Valo 	bool hidden_ssid;
49165e3dd157SKalle Valo 	bool pmf_enabled;
49175e3dd157SKalle Valo };
49185e3dd157SKalle Valo 
49195e3dd157SKalle Valo struct wmi_vdev_delete_cmd {
49205e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
49215e3dd157SKalle Valo 	__le32 vdev_id;
49225e3dd157SKalle Valo } __packed;
49235e3dd157SKalle Valo 
49245e3dd157SKalle Valo struct wmi_vdev_up_cmd {
49255e3dd157SKalle Valo 	__le32 vdev_id;
49265e3dd157SKalle Valo 	__le32 vdev_assoc_id;
49275e3dd157SKalle Valo 	struct wmi_mac_addr vdev_bssid;
49285e3dd157SKalle Valo } __packed;
49295e3dd157SKalle Valo 
49305e3dd157SKalle Valo struct wmi_vdev_stop_cmd {
49315e3dd157SKalle Valo 	__le32 vdev_id;
49325e3dd157SKalle Valo } __packed;
49335e3dd157SKalle Valo 
49345e3dd157SKalle Valo struct wmi_vdev_down_cmd {
49355e3dd157SKalle Valo 	__le32 vdev_id;
49365e3dd157SKalle Valo } __packed;
49375e3dd157SKalle Valo 
49385e3dd157SKalle Valo struct wmi_vdev_standby_response_cmd {
49395e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
49405e3dd157SKalle Valo 	__le32 vdev_id;
49415e3dd157SKalle Valo } __packed;
49425e3dd157SKalle Valo 
49435e3dd157SKalle Valo struct wmi_vdev_resume_response_cmd {
49445e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
49455e3dd157SKalle Valo 	__le32 vdev_id;
49465e3dd157SKalle Valo } __packed;
49475e3dd157SKalle Valo 
49485e3dd157SKalle Valo struct wmi_vdev_set_param_cmd {
49495e3dd157SKalle Valo 	__le32 vdev_id;
49505e3dd157SKalle Valo 	__le32 param_id;
49515e3dd157SKalle Valo 	__le32 param_value;
49525e3dd157SKalle Valo } __packed;
49535e3dd157SKalle Valo 
49545e3dd157SKalle Valo #define WMI_MAX_KEY_INDEX   3
49555e3dd157SKalle Valo #define WMI_MAX_KEY_LEN     32
49565e3dd157SKalle Valo 
49575e3dd157SKalle Valo #define WMI_KEY_PAIRWISE 0x00
49585e3dd157SKalle Valo #define WMI_KEY_GROUP    0x01
49595e3dd157SKalle Valo #define WMI_KEY_TX_USAGE 0x02 /* default tx key - static wep */
49605e3dd157SKalle Valo 
49615e3dd157SKalle Valo struct wmi_key_seq_counter {
49625e3dd157SKalle Valo 	__le32 key_seq_counter_l;
49635e3dd157SKalle Valo 	__le32 key_seq_counter_h;
49645e3dd157SKalle Valo } __packed;
49655e3dd157SKalle Valo 
49667d94f862SAbhishek Ambure enum wmi_cipher_suites {
49677d94f862SAbhishek Ambure 	WMI_CIPHER_NONE,
49687d94f862SAbhishek Ambure 	WMI_CIPHER_WEP,
49697d94f862SAbhishek Ambure 	WMI_CIPHER_TKIP,
49707d94f862SAbhishek Ambure 	WMI_CIPHER_AES_OCB,
49717d94f862SAbhishek Ambure 	WMI_CIPHER_AES_CCM,
49727d94f862SAbhishek Ambure 	WMI_CIPHER_WAPI,
49737d94f862SAbhishek Ambure 	WMI_CIPHER_CKIP,
49747d94f862SAbhishek Ambure 	WMI_CIPHER_AES_CMAC,
49757d94f862SAbhishek Ambure 	WMI_CIPHER_AES_GCM,
49767d94f862SAbhishek Ambure };
49777d94f862SAbhishek Ambure 
49787d94f862SAbhishek Ambure enum wmi_tlv_cipher_suites {
49797d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_NONE,
49807d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_WEP,
49817d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_TKIP,
49827d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_AES_OCB,
49837d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_AES_CCM,
49847d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_WAPI,
49857d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_CKIP,
49867d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_AES_CMAC,
49877d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_ANY,
49887d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_AES_GCM,
49897d94f862SAbhishek Ambure };
49905e3dd157SKalle Valo 
49915e3dd157SKalle Valo struct wmi_vdev_install_key_cmd {
49925e3dd157SKalle Valo 	__le32 vdev_id;
49935e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
49945e3dd157SKalle Valo 	__le32 key_idx;
49955e3dd157SKalle Valo 	__le32 key_flags;
49965e3dd157SKalle Valo 	__le32 key_cipher; /* %WMI_CIPHER_ */
49975e3dd157SKalle Valo 	struct wmi_key_seq_counter key_rsc_counter;
49985e3dd157SKalle Valo 	struct wmi_key_seq_counter key_global_rsc_counter;
49995e3dd157SKalle Valo 	struct wmi_key_seq_counter key_tsc_counter;
50005e3dd157SKalle Valo 	u8 wpi_key_rsc_counter[16];
50015e3dd157SKalle Valo 	u8 wpi_key_tsc_counter[16];
50025e3dd157SKalle Valo 	__le32 key_len;
50035e3dd157SKalle Valo 	__le32 key_txmic_len;
50045e3dd157SKalle Valo 	__le32 key_rxmic_len;
50055e3dd157SKalle Valo 
50065e3dd157SKalle Valo 	/* contains key followed by tx mic followed by rx mic */
50075e3dd157SKalle Valo 	u8 key_data[0];
50085e3dd157SKalle Valo } __packed;
50095e3dd157SKalle Valo 
50105e3dd157SKalle Valo struct wmi_vdev_install_key_arg {
50115e3dd157SKalle Valo 	u32 vdev_id;
50125e3dd157SKalle Valo 	const u8 *macaddr;
50135e3dd157SKalle Valo 	u32 key_idx;
50145e3dd157SKalle Valo 	u32 key_flags;
50155e3dd157SKalle Valo 	u32 key_cipher;
50165e3dd157SKalle Valo 	u32 key_len;
50175e3dd157SKalle Valo 	u32 key_txmic_len;
50185e3dd157SKalle Valo 	u32 key_rxmic_len;
50195e3dd157SKalle Valo 	const void *key_data;
50205e3dd157SKalle Valo };
50215e3dd157SKalle Valo 
502251ab1a0aSJanusz Dziedzic /*
502351ab1a0aSJanusz Dziedzic  * vdev fixed rate format:
502451ab1a0aSJanusz Dziedzic  * - preamble - b7:b6 - see WMI_RATE_PREMABLE_
502551ab1a0aSJanusz Dziedzic  * - nss      - b5:b4 - ss number (0 mean 1ss)
502651ab1a0aSJanusz Dziedzic  * - rate_mcs - b3:b0 - as below
502751ab1a0aSJanusz Dziedzic  *    CCK:  0 - 11Mbps, 1 - 5,5Mbps, 2 - 2Mbps, 3 - 1Mbps,
502851ab1a0aSJanusz Dziedzic  *          4 - 11Mbps (s), 5 - 5,5Mbps (s), 6 - 2Mbps (s)
502951ab1a0aSJanusz Dziedzic  *    OFDM: 0 - 48Mbps, 1 - 24Mbps, 2 - 12Mbps, 3 - 6Mbps,
503051ab1a0aSJanusz Dziedzic  *          4 - 54Mbps, 5 - 36Mbps, 6 - 18Mbps, 7 - 9Mbps
503151ab1a0aSJanusz Dziedzic  *    HT/VHT: MCS index
503251ab1a0aSJanusz Dziedzic  */
503351ab1a0aSJanusz Dziedzic 
50345e3dd157SKalle Valo /* Preamble types to be used with VDEV fixed rate configuration */
50355e3dd157SKalle Valo enum wmi_rate_preamble {
50365e3dd157SKalle Valo 	WMI_RATE_PREAMBLE_OFDM,
50375e3dd157SKalle Valo 	WMI_RATE_PREAMBLE_CCK,
50385e3dd157SKalle Valo 	WMI_RATE_PREAMBLE_HT,
50395e3dd157SKalle Valo 	WMI_RATE_PREAMBLE_VHT,
50405e3dd157SKalle Valo };
50415e3dd157SKalle Valo 
504229542666SMaharaja Kennadyrajan #define ATH10K_HW_NSS(rate)		(1 + (((rate) >> 4) & 0x3))
504329542666SMaharaja Kennadyrajan #define ATH10K_HW_PREAMBLE(rate)	(((rate) >> 6) & 0x3)
5044cec17c38SAnilkumar Kolli #define ATH10K_HW_MCS_RATE(rate)	((rate) & 0xf)
5045cec17c38SAnilkumar Kolli #define ATH10K_HW_LEGACY_RATE(rate)	((rate) & 0x3f)
5046cec17c38SAnilkumar Kolli #define ATH10K_HW_BW(flags)		(((flags) >> 3) & 0x3)
5047cec17c38SAnilkumar Kolli #define ATH10K_HW_GI(flags)		(((flags) >> 5) & 0x1)
504829542666SMaharaja Kennadyrajan #define ATH10K_HW_RATECODE(rate, nss, preamble) \
504929542666SMaharaja Kennadyrajan 	(((preamble) << 6) | ((nss) << 4) | (rate))
5050a904417fSAnilkumar Kolli #define ATH10K_HW_AMPDU(flags)		((flags) & 0x1)
5051a904417fSAnilkumar Kolli #define ATH10K_HW_BA_FAIL(flags)	(((flags) >> 1) & 0x3)
50529a9cf0e6SAnilkumar Kolli #define ATH10K_FW_SKIPPED_RATE_CTRL(flags)	(((flags) >> 6) & 0x1)
505329542666SMaharaja Kennadyrajan 
5054a904417fSAnilkumar Kolli #define ATH10K_VHT_MCS_NUM	10
5055ef9051c7SSurabhi Vishnoi #define ATH10K_BW_NUM		6
5056a904417fSAnilkumar Kolli #define ATH10K_NSS_NUM		4
5057a904417fSAnilkumar Kolli #define ATH10K_LEGACY_NUM	12
5058a904417fSAnilkumar Kolli #define ATH10K_GI_NUM		2
5059a904417fSAnilkumar Kolli #define ATH10K_HT_MCS_NUM	32
5060e88975caSAnilkumar Kolli #define ATH10K_RATE_TABLE_NUM	320
50618e55fdaaSSurabhi Vishnoi #define ATH10K_RATE_INFO_FLAGS_SGI_BIT	2
5062cec17c38SAnilkumar Kolli 
50635e3dd157SKalle Valo /* Value to disable fixed rate setting */
50645e3dd157SKalle Valo #define WMI_FIXED_RATE_NONE    (0xff)
50655e3dd157SKalle Valo 
50666d1506e7SBartosz Markowski struct wmi_vdev_param_map {
50676d1506e7SBartosz Markowski 	u32 rts_threshold;
50686d1506e7SBartosz Markowski 	u32 fragmentation_threshold;
50696d1506e7SBartosz Markowski 	u32 beacon_interval;
50706d1506e7SBartosz Markowski 	u32 listen_interval;
50716d1506e7SBartosz Markowski 	u32 multicast_rate;
50726d1506e7SBartosz Markowski 	u32 mgmt_tx_rate;
50736d1506e7SBartosz Markowski 	u32 slot_time;
50746d1506e7SBartosz Markowski 	u32 preamble;
50756d1506e7SBartosz Markowski 	u32 swba_time;
50766d1506e7SBartosz Markowski 	u32 wmi_vdev_stats_update_period;
50776d1506e7SBartosz Markowski 	u32 wmi_vdev_pwrsave_ageout_time;
50786d1506e7SBartosz Markowski 	u32 wmi_vdev_host_swba_interval;
50796d1506e7SBartosz Markowski 	u32 dtim_period;
50806d1506e7SBartosz Markowski 	u32 wmi_vdev_oc_scheduler_air_time_limit;
50816d1506e7SBartosz Markowski 	u32 wds;
50826d1506e7SBartosz Markowski 	u32 atim_window;
50836d1506e7SBartosz Markowski 	u32 bmiss_count_max;
50846d1506e7SBartosz Markowski 	u32 bmiss_first_bcnt;
50856d1506e7SBartosz Markowski 	u32 bmiss_final_bcnt;
50866d1506e7SBartosz Markowski 	u32 feature_wmm;
50876d1506e7SBartosz Markowski 	u32 chwidth;
50886d1506e7SBartosz Markowski 	u32 chextoffset;
50896d1506e7SBartosz Markowski 	u32 disable_htprotection;
50906d1506e7SBartosz Markowski 	u32 sta_quickkickout;
50916d1506e7SBartosz Markowski 	u32 mgmt_rate;
50926d1506e7SBartosz Markowski 	u32 protection_mode;
50936d1506e7SBartosz Markowski 	u32 fixed_rate;
50946d1506e7SBartosz Markowski 	u32 sgi;
50956d1506e7SBartosz Markowski 	u32 ldpc;
50966d1506e7SBartosz Markowski 	u32 tx_stbc;
50976d1506e7SBartosz Markowski 	u32 rx_stbc;
50986d1506e7SBartosz Markowski 	u32 intra_bss_fwd;
50996d1506e7SBartosz Markowski 	u32 def_keyid;
51006d1506e7SBartosz Markowski 	u32 nss;
51016d1506e7SBartosz Markowski 	u32 bcast_data_rate;
51026d1506e7SBartosz Markowski 	u32 mcast_data_rate;
51036d1506e7SBartosz Markowski 	u32 mcast_indicate;
51046d1506e7SBartosz Markowski 	u32 dhcp_indicate;
51056d1506e7SBartosz Markowski 	u32 unknown_dest_indicate;
51066d1506e7SBartosz Markowski 	u32 ap_keepalive_min_idle_inactive_time_secs;
51076d1506e7SBartosz Markowski 	u32 ap_keepalive_max_idle_inactive_time_secs;
51086d1506e7SBartosz Markowski 	u32 ap_keepalive_max_unresponsive_time_secs;
51096d1506e7SBartosz Markowski 	u32 ap_enable_nawds;
51106d1506e7SBartosz Markowski 	u32 mcast2ucast_set;
51116d1506e7SBartosz Markowski 	u32 enable_rtscts;
51126d1506e7SBartosz Markowski 	u32 txbf;
51136d1506e7SBartosz Markowski 	u32 packet_powersave;
51146d1506e7SBartosz Markowski 	u32 drop_unencry;
51156d1506e7SBartosz Markowski 	u32 tx_encap_type;
51166d1506e7SBartosz Markowski 	u32 ap_detect_out_of_sync_sleeping_sta_time_secs;
511793841a15SRaja Mani 	u32 rc_num_retries;
511893841a15SRaja Mani 	u32 cabq_maxdur;
511993841a15SRaja Mani 	u32 mfptest_set;
512093841a15SRaja Mani 	u32 rts_fixed_rate;
512193841a15SRaja Mani 	u32 vht_sgimask;
512293841a15SRaja Mani 	u32 vht80_ratemask;
512393841a15SRaja Mani 	u32 early_rx_adjust_enable;
512493841a15SRaja Mani 	u32 early_rx_tgt_bmiss_num;
512593841a15SRaja Mani 	u32 early_rx_bmiss_sample_cycle;
512693841a15SRaja Mani 	u32 early_rx_slop_step;
512793841a15SRaja Mani 	u32 early_rx_init_slop;
512893841a15SRaja Mani 	u32 early_rx_adjust_pause;
512993841a15SRaja Mani 	u32 proxy_sta;
513093841a15SRaja Mani 	u32 meru_vc;
513193841a15SRaja Mani 	u32 rx_decap_type;
513293841a15SRaja Mani 	u32 bw_nss_ratemask;
5133973324ffSPedersen, Thomas 	u32 inc_tsf;
5134973324ffSPedersen, Thomas 	u32 dec_tsf;
513568c295f2SSathishkumar Muruganandam 	u32 disable_4addr_src_lrn;
5136059104bfSPradeep Kumar Chitrapu 	u32 rtt_responder_role;
51376d1506e7SBartosz Markowski };
51386d1506e7SBartosz Markowski 
51396d1506e7SBartosz Markowski #define WMI_VDEV_PARAM_UNSUPPORTED 0
51406d1506e7SBartosz Markowski 
51415e3dd157SKalle Valo /* the definition of different VDEV parameters */
51425e3dd157SKalle Valo enum wmi_vdev_param {
51435e3dd157SKalle Valo 	/* RTS Threshold */
51445e3dd157SKalle Valo 	WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
51455e3dd157SKalle Valo 	/* Fragmentation threshold */
51465e3dd157SKalle Valo 	WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
51475e3dd157SKalle Valo 	/* beacon interval in TUs */
51485e3dd157SKalle Valo 	WMI_VDEV_PARAM_BEACON_INTERVAL,
51495e3dd157SKalle Valo 	/* Listen interval in TUs */
51505e3dd157SKalle Valo 	WMI_VDEV_PARAM_LISTEN_INTERVAL,
5151e13dbeadSJoe Perches 	/* multicast rate in Mbps */
51525e3dd157SKalle Valo 	WMI_VDEV_PARAM_MULTICAST_RATE,
51535e3dd157SKalle Valo 	/* management frame rate in Mbps */
51545e3dd157SKalle Valo 	WMI_VDEV_PARAM_MGMT_TX_RATE,
51555e3dd157SKalle Valo 	/* slot time (long vs short) */
51565e3dd157SKalle Valo 	WMI_VDEV_PARAM_SLOT_TIME,
51575e3dd157SKalle Valo 	/* preamble (long vs short) */
51585e3dd157SKalle Valo 	WMI_VDEV_PARAM_PREAMBLE,
51595e3dd157SKalle Valo 	/* SWBA time (time before tbtt in msec) */
51605e3dd157SKalle Valo 	WMI_VDEV_PARAM_SWBA_TIME,
51615e3dd157SKalle Valo 	/* time period for updating VDEV stats */
51625e3dd157SKalle Valo 	WMI_VDEV_STATS_UPDATE_PERIOD,
51635e3dd157SKalle Valo 	/* age out time in msec for frames queued for station in power save */
51645e3dd157SKalle Valo 	WMI_VDEV_PWRSAVE_AGEOUT_TIME,
51655e3dd157SKalle Valo 	/*
51665e3dd157SKalle Valo 	 * Host SWBA interval (time in msec before tbtt for SWBA event
51675e3dd157SKalle Valo 	 * generation).
51685e3dd157SKalle Valo 	 */
51695e3dd157SKalle Valo 	WMI_VDEV_HOST_SWBA_INTERVAL,
51705e3dd157SKalle Valo 	/* DTIM period (specified in units of num beacon intervals) */
51715e3dd157SKalle Valo 	WMI_VDEV_PARAM_DTIM_PERIOD,
51725e3dd157SKalle Valo 	/*
51735e3dd157SKalle Valo 	 * scheduler air time limit for this VDEV. used by off chan
51745e3dd157SKalle Valo 	 * scheduler.
51755e3dd157SKalle Valo 	 */
51765e3dd157SKalle Valo 	WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
51775e3dd157SKalle Valo 	/* enable/dsiable WDS for this VDEV  */
51785e3dd157SKalle Valo 	WMI_VDEV_PARAM_WDS,
51795e3dd157SKalle Valo 	/* ATIM Window */
51805e3dd157SKalle Valo 	WMI_VDEV_PARAM_ATIM_WINDOW,
51815e3dd157SKalle Valo 	/* BMISS max */
51825e3dd157SKalle Valo 	WMI_VDEV_PARAM_BMISS_COUNT_MAX,
51835e3dd157SKalle Valo 	/* BMISS first time */
51845e3dd157SKalle Valo 	WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
51855e3dd157SKalle Valo 	/* BMISS final time */
51865e3dd157SKalle Valo 	WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
51875e3dd157SKalle Valo 	/* WMM enables/disabled */
51885e3dd157SKalle Valo 	WMI_VDEV_PARAM_FEATURE_WMM,
51895e3dd157SKalle Valo 	/* Channel width */
51905e3dd157SKalle Valo 	WMI_VDEV_PARAM_CHWIDTH,
51915e3dd157SKalle Valo 	/* Channel Offset */
51925e3dd157SKalle Valo 	WMI_VDEV_PARAM_CHEXTOFFSET,
51935e3dd157SKalle Valo 	/* Disable HT Protection */
51945e3dd157SKalle Valo 	WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
51955e3dd157SKalle Valo 	/* Quick STA Kickout */
51965e3dd157SKalle Valo 	WMI_VDEV_PARAM_STA_QUICKKICKOUT,
51975e3dd157SKalle Valo 	/* Rate to be used with Management frames */
51985e3dd157SKalle Valo 	WMI_VDEV_PARAM_MGMT_RATE,
51995e3dd157SKalle Valo 	/* Protection Mode */
52005e3dd157SKalle Valo 	WMI_VDEV_PARAM_PROTECTION_MODE,
52015e3dd157SKalle Valo 	/* Fixed rate setting */
52025e3dd157SKalle Valo 	WMI_VDEV_PARAM_FIXED_RATE,
52035e3dd157SKalle Valo 	/* Short GI Enable/Disable */
52045e3dd157SKalle Valo 	WMI_VDEV_PARAM_SGI,
52055e3dd157SKalle Valo 	/* Enable LDPC */
52065e3dd157SKalle Valo 	WMI_VDEV_PARAM_LDPC,
52075e3dd157SKalle Valo 	/* Enable Tx STBC */
52085e3dd157SKalle Valo 	WMI_VDEV_PARAM_TX_STBC,
52095e3dd157SKalle Valo 	/* Enable Rx STBC */
52105e3dd157SKalle Valo 	WMI_VDEV_PARAM_RX_STBC,
52115e3dd157SKalle Valo 	/* Intra BSS forwarding  */
52125e3dd157SKalle Valo 	WMI_VDEV_PARAM_INTRA_BSS_FWD,
52135e3dd157SKalle Valo 	/* Setting Default xmit key for Vdev */
52145e3dd157SKalle Valo 	WMI_VDEV_PARAM_DEF_KEYID,
52155e3dd157SKalle Valo 	/* NSS width */
52165e3dd157SKalle Valo 	WMI_VDEV_PARAM_NSS,
52175e3dd157SKalle Valo 	/* Set the custom rate for the broadcast data frames */
52185e3dd157SKalle Valo 	WMI_VDEV_PARAM_BCAST_DATA_RATE,
52195e3dd157SKalle Valo 	/* Set the custom rate (rate-code) for multicast data frames */
52205e3dd157SKalle Valo 	WMI_VDEV_PARAM_MCAST_DATA_RATE,
52215e3dd157SKalle Valo 	/* Tx multicast packet indicate Enable/Disable */
52225e3dd157SKalle Valo 	WMI_VDEV_PARAM_MCAST_INDICATE,
52235e3dd157SKalle Valo 	/* Tx DHCP packet indicate Enable/Disable */
52245e3dd157SKalle Valo 	WMI_VDEV_PARAM_DHCP_INDICATE,
52255e3dd157SKalle Valo 	/* Enable host inspection of Tx unicast packet to unknown destination */
52265e3dd157SKalle Valo 	WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
52275e3dd157SKalle Valo 
52285e3dd157SKalle Valo 	/* The minimum amount of time AP begins to consider STA inactive */
52295e3dd157SKalle Valo 	WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
52305e3dd157SKalle Valo 
52315e3dd157SKalle Valo 	/*
52325e3dd157SKalle Valo 	 * An associated STA is considered inactive when there is no recent
52335e3dd157SKalle Valo 	 * TX/RX activity and no downlink frames are buffered for it. Once a
52345e3dd157SKalle Valo 	 * STA exceeds the maximum idle inactive time, the AP will send an
52355e3dd157SKalle Valo 	 * 802.11 data-null as a keep alive to verify the STA is still
52365e3dd157SKalle Valo 	 * associated. If the STA does ACK the data-null, or if the data-null
52375e3dd157SKalle Valo 	 * is buffered and the STA does not retrieve it, the STA will be
52385e3dd157SKalle Valo 	 * considered unresponsive
52395e3dd157SKalle Valo 	 * (see WMI_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS).
52405e3dd157SKalle Valo 	 */
52415e3dd157SKalle Valo 	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
52425e3dd157SKalle Valo 
52435e3dd157SKalle Valo 	/*
52445e3dd157SKalle Valo 	 * An associated STA is considered unresponsive if there is no recent
52455e3dd157SKalle Valo 	 * TX/RX activity and downlink frames are buffered for it. Once a STA
52465e3dd157SKalle Valo 	 * exceeds the maximum unresponsive time, the AP will send a
524737ff1b0dSMarcin Rokicki 	 * WMI_STA_KICKOUT event to the host so the STA can be deleted.
524837ff1b0dSMarcin Rokicki 	 */
52495e3dd157SKalle Valo 	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
52505e3dd157SKalle Valo 
52515e3dd157SKalle Valo 	/* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */
52525e3dd157SKalle Valo 	WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
52535e3dd157SKalle Valo 	/* Enable/Disable RTS-CTS */
52545e3dd157SKalle Valo 	WMI_VDEV_PARAM_ENABLE_RTSCTS,
52555e3dd157SKalle Valo 	/* Enable TXBFee/er */
52565e3dd157SKalle Valo 	WMI_VDEV_PARAM_TXBF,
52575e3dd157SKalle Valo 
52585e3dd157SKalle Valo 	/* Set packet power save */
52595e3dd157SKalle Valo 	WMI_VDEV_PARAM_PACKET_POWERSAVE,
52605e3dd157SKalle Valo 
52615e3dd157SKalle Valo 	/*
52625e3dd157SKalle Valo 	 * Drops un-encrypted packets if eceived in an encrypted connection
52635e3dd157SKalle Valo 	 * otherwise forwards to host.
52645e3dd157SKalle Valo 	 */
52655e3dd157SKalle Valo 	WMI_VDEV_PARAM_DROP_UNENCRY,
52665e3dd157SKalle Valo 
52675e3dd157SKalle Valo 	/*
52685e3dd157SKalle Valo 	 * Set the encapsulation type for frames.
52695e3dd157SKalle Valo 	 */
52705e3dd157SKalle Valo 	WMI_VDEV_PARAM_TX_ENCAP_TYPE,
52715e3dd157SKalle Valo };
52725e3dd157SKalle Valo 
52736d1506e7SBartosz Markowski /* the definition of different VDEV parameters */
52746d1506e7SBartosz Markowski enum wmi_10x_vdev_param {
52756d1506e7SBartosz Markowski 	/* RTS Threshold */
52766d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1,
52776d1506e7SBartosz Markowski 	/* Fragmentation threshold */
52786d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
52796d1506e7SBartosz Markowski 	/* beacon interval in TUs */
52806d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
52816d1506e7SBartosz Markowski 	/* Listen interval in TUs */
52826d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
5283e13dbeadSJoe Perches 	/* multicast rate in Mbps */
52846d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MULTICAST_RATE,
52856d1506e7SBartosz Markowski 	/* management frame rate in Mbps */
52866d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
52876d1506e7SBartosz Markowski 	/* slot time (long vs short) */
52886d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_SLOT_TIME,
52896d1506e7SBartosz Markowski 	/* preamble (long vs short) */
52906d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_PREAMBLE,
52916d1506e7SBartosz Markowski 	/* SWBA time (time before tbtt in msec) */
52926d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_SWBA_TIME,
52936d1506e7SBartosz Markowski 	/* time period for updating VDEV stats */
52946d1506e7SBartosz Markowski 	WMI_10X_VDEV_STATS_UPDATE_PERIOD,
52956d1506e7SBartosz Markowski 	/* age out time in msec for frames queued for station in power save */
52966d1506e7SBartosz Markowski 	WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
52976d1506e7SBartosz Markowski 	/*
52986d1506e7SBartosz Markowski 	 * Host SWBA interval (time in msec before tbtt for SWBA event
52996d1506e7SBartosz Markowski 	 * generation).
53006d1506e7SBartosz Markowski 	 */
53016d1506e7SBartosz Markowski 	WMI_10X_VDEV_HOST_SWBA_INTERVAL,
53026d1506e7SBartosz Markowski 	/* DTIM period (specified in units of num beacon intervals) */
53036d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_DTIM_PERIOD,
53046d1506e7SBartosz Markowski 	/*
53056d1506e7SBartosz Markowski 	 * scheduler air time limit for this VDEV. used by off chan
53066d1506e7SBartosz Markowski 	 * scheduler.
53076d1506e7SBartosz Markowski 	 */
53086d1506e7SBartosz Markowski 	WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
53096d1506e7SBartosz Markowski 	/* enable/dsiable WDS for this VDEV  */
53106d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_WDS,
53116d1506e7SBartosz Markowski 	/* ATIM Window */
53126d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_ATIM_WINDOW,
53136d1506e7SBartosz Markowski 	/* BMISS max */
53146d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
53156d1506e7SBartosz Markowski 	/* WMM enables/disabled */
53166d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_FEATURE_WMM,
53176d1506e7SBartosz Markowski 	/* Channel width */
53186d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_CHWIDTH,
53196d1506e7SBartosz Markowski 	/* Channel Offset */
53206d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_CHEXTOFFSET,
53216d1506e7SBartosz Markowski 	/* Disable HT Protection */
53226d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
53236d1506e7SBartosz Markowski 	/* Quick STA Kickout */
53246d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
53256d1506e7SBartosz Markowski 	/* Rate to be used with Management frames */
53266d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MGMT_RATE,
53276d1506e7SBartosz Markowski 	/* Protection Mode */
53286d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_PROTECTION_MODE,
53296d1506e7SBartosz Markowski 	/* Fixed rate setting */
53306d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_FIXED_RATE,
53316d1506e7SBartosz Markowski 	/* Short GI Enable/Disable */
53326d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_SGI,
53336d1506e7SBartosz Markowski 	/* Enable LDPC */
53346d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_LDPC,
53356d1506e7SBartosz Markowski 	/* Enable Tx STBC */
53366d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_TX_STBC,
53376d1506e7SBartosz Markowski 	/* Enable Rx STBC */
53386d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_RX_STBC,
53396d1506e7SBartosz Markowski 	/* Intra BSS forwarding  */
53406d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
53416d1506e7SBartosz Markowski 	/* Setting Default xmit key for Vdev */
53426d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_DEF_KEYID,
53436d1506e7SBartosz Markowski 	/* NSS width */
53446d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_NSS,
53456d1506e7SBartosz Markowski 	/* Set the custom rate for the broadcast data frames */
53466d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
53476d1506e7SBartosz Markowski 	/* Set the custom rate (rate-code) for multicast data frames */
53486d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
53496d1506e7SBartosz Markowski 	/* Tx multicast packet indicate Enable/Disable */
53506d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MCAST_INDICATE,
53516d1506e7SBartosz Markowski 	/* Tx DHCP packet indicate Enable/Disable */
53526d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_DHCP_INDICATE,
53536d1506e7SBartosz Markowski 	/* Enable host inspection of Tx unicast packet to unknown destination */
53546d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
53556d1506e7SBartosz Markowski 
53566d1506e7SBartosz Markowski 	/* The minimum amount of time AP begins to consider STA inactive */
53576d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
53586d1506e7SBartosz Markowski 
53596d1506e7SBartosz Markowski 	/*
53606d1506e7SBartosz Markowski 	 * An associated STA is considered inactive when there is no recent
53616d1506e7SBartosz Markowski 	 * TX/RX activity and no downlink frames are buffered for it. Once a
53626d1506e7SBartosz Markowski 	 * STA exceeds the maximum idle inactive time, the AP will send an
53636d1506e7SBartosz Markowski 	 * 802.11 data-null as a keep alive to verify the STA is still
53646d1506e7SBartosz Markowski 	 * associated. If the STA does ACK the data-null, or if the data-null
53656d1506e7SBartosz Markowski 	 * is buffered and the STA does not retrieve it, the STA will be
53666d1506e7SBartosz Markowski 	 * considered unresponsive
53676d1506e7SBartosz Markowski 	 * (see WMI_10X_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS).
53686d1506e7SBartosz Markowski 	 */
53696d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
53706d1506e7SBartosz Markowski 
53716d1506e7SBartosz Markowski 	/*
53726d1506e7SBartosz Markowski 	 * An associated STA is considered unresponsive if there is no recent
53736d1506e7SBartosz Markowski 	 * TX/RX activity and downlink frames are buffered for it. Once a STA
53746d1506e7SBartosz Markowski 	 * exceeds the maximum unresponsive time, the AP will send a
537537ff1b0dSMarcin Rokicki 	 * WMI_10X_STA_KICKOUT event to the host so the STA can be deleted.
537637ff1b0dSMarcin Rokicki 	 */
53776d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
53786d1506e7SBartosz Markowski 
53796d1506e7SBartosz Markowski 	/* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */
53806d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
53816d1506e7SBartosz Markowski 
53826d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
53836d1506e7SBartosz Markowski 	/* Enable/Disable RTS-CTS */
53846d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
53856d1506e7SBartosz Markowski 
53866d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
538724c88f78SMichal Kazior 
538824c88f78SMichal Kazior 	/* following are available as of firmware 10.2 */
538924c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE,
539024c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_CABQ_MAXDUR,
539124c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_MFPTEST_SET,
539224c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_RTS_FIXED_RATE,
539324c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_VHT_SGIMASK,
539424c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_VHT80_RATEMASK,
53959f0b7e7dSPeter Oh 	WMI_10X_VDEV_PARAM_TSF_INCREMENT,
53966d1506e7SBartosz Markowski };
53976d1506e7SBartosz Markowski 
539893841a15SRaja Mani enum wmi_10_4_vdev_param {
539993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1,
540093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
540193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
540293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
540393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
540493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
540593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_SLOT_TIME,
540693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_PREAMBLE,
540793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_SWBA_TIME,
540893841a15SRaja Mani 	WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
540993841a15SRaja Mani 	WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
541093841a15SRaja Mani 	WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
541193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
541293841a15SRaja Mani 	WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
541393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_WDS,
541493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
541593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
541693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
541793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
541893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_FEATURE_WMM,
541993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_CHWIDTH,
542093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
542193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
542293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
542393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MGMT_RATE,
542493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
542593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_FIXED_RATE,
542693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_SGI,
542793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_LDPC,
542893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_TX_STBC,
542993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RX_STBC,
543093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
543193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DEF_KEYID,
543293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_NSS,
543393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
543493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
543593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
543693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
543793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
543893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
543993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
544093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
544193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
544293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
544393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
544493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
544593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_TXBF,
544693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
544793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
544893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
544993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
545093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
545193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MFPTEST_SET,
545293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
545393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
545493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
545593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
545693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
545793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
545893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
545993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
546093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
546193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_PROXY_STA,
546293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MERU_VC,
546393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
546493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
54654857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_SENSOR_AP,
54664857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_BEACON_RATE,
54674857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_DTIM_ENABLE_CTS,
54684857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_STA_KICKOUT,
54694857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_CAPABILITIES,
54704857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
5471973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_RX_FILTER,
5472973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_MGMT_TX_POWER,
5473973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
5474973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_DISABLE_DYN_BW_RTS,
5475973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
547668c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_SELFGEN_FIXED_RATE,
547768c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_AMPDU_SUBFRAME_SIZE_PER_AC,
547868c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_NSS_VHT160,
547968c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_NSS_VHT80_80,
548068c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_AMSDU_SUBFRAME_SIZE_PER_AC,
548168c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_DISABLE_CABQ,
548268c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_SIFS_TRIGGER_RATE,
548368c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_TX_POWER,
548468c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE,
548568c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN,
548693841a15SRaja Mani };
548793841a15SRaja Mani 
548868c295f2SSathishkumar Muruganandam #define WMI_VDEV_DISABLE_4_ADDR_SRC_LRN 1
548968c295f2SSathishkumar Muruganandam 
5490139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
5491139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
5492139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
5493139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
5494139e170dSMichal Kazior 
5495a48e2cc8SVivek Natarajan #define WMI_TXBF_STS_CAP_OFFSET_LSB	4
54968cec57f5SBen Greear #define WMI_TXBF_STS_CAP_OFFSET_MASK	0x70
54978cec57f5SBen Greear #define WMI_TXBF_CONF_IMPLICIT_BF       BIT(7)
5498a48e2cc8SVivek Natarajan #define WMI_BF_SOUND_DIM_OFFSET_LSB	8
5499a48e2cc8SVivek Natarajan #define WMI_BF_SOUND_DIM_OFFSET_MASK	0xf00
5500a48e2cc8SVivek Natarajan 
55015e3dd157SKalle Valo /* slot time long */
55025e3dd157SKalle Valo #define WMI_VDEV_SLOT_TIME_LONG		0x1
55035e3dd157SKalle Valo /* slot time short */
55045e3dd157SKalle Valo #define WMI_VDEV_SLOT_TIME_SHORT	0x2
55055e3dd157SKalle Valo /* preablbe long */
55065e3dd157SKalle Valo #define WMI_VDEV_PREAMBLE_LONG		0x1
55075e3dd157SKalle Valo /* preablbe short */
55085e3dd157SKalle Valo #define WMI_VDEV_PREAMBLE_SHORT		0x2
55095e3dd157SKalle Valo 
55105e3dd157SKalle Valo enum wmi_start_event_param {
55115e3dd157SKalle Valo 	WMI_VDEV_RESP_START_EVENT = 0,
55125e3dd157SKalle Valo 	WMI_VDEV_RESP_RESTART_EVENT,
55135e3dd157SKalle Valo };
55145e3dd157SKalle Valo 
55155e3dd157SKalle Valo struct wmi_vdev_start_response_event {
55165e3dd157SKalle Valo 	__le32 vdev_id;
55175e3dd157SKalle Valo 	__le32 req_id;
55185e3dd157SKalle Valo 	__le32 resp_type; /* %WMI_VDEV_RESP_ */
55195e3dd157SKalle Valo 	__le32 status;
55205e3dd157SKalle Valo } __packed;
55215e3dd157SKalle Valo 
55225e3dd157SKalle Valo struct wmi_vdev_standby_req_event {
55235e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
55245e3dd157SKalle Valo 	__le32 vdev_id;
55255e3dd157SKalle Valo } __packed;
55265e3dd157SKalle Valo 
55275e3dd157SKalle Valo struct wmi_vdev_resume_req_event {
55285e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
55295e3dd157SKalle Valo 	__le32 vdev_id;
55305e3dd157SKalle Valo } __packed;
55315e3dd157SKalle Valo 
55325e3dd157SKalle Valo struct wmi_vdev_stopped_event {
55335e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
55345e3dd157SKalle Valo 	__le32 vdev_id;
55355e3dd157SKalle Valo } __packed;
55365e3dd157SKalle Valo 
55375e3dd157SKalle Valo /*
55385e3dd157SKalle Valo  * common structure used for simple events
55395e3dd157SKalle Valo  * (stopped, resume_req, standby response)
55405e3dd157SKalle Valo  */
55415e3dd157SKalle Valo struct wmi_vdev_simple_event {
55425e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
55435e3dd157SKalle Valo 	__le32 vdev_id;
55445e3dd157SKalle Valo } __packed;
55455e3dd157SKalle Valo 
55465e3dd157SKalle Valo /* VDEV start response status codes */
5547e13dbeadSJoe Perches /* VDEV successfully started */
55485e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS	0x0
55495e3dd157SKalle Valo 
55505e3dd157SKalle Valo /* requested VDEV not found */
55515e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID	0x1
55525e3dd157SKalle Valo 
55535e3dd157SKalle Valo /* unsupported VDEV combination */
55545e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED	0x2
55555e3dd157SKalle Valo 
5556855aed12SSimon Wunderlich /* TODO: please add more comments if you have in-depth information */
5557855aed12SSimon Wunderlich struct wmi_vdev_spectral_conf_cmd {
5558855aed12SSimon Wunderlich 	__le32 vdev_id;
5559855aed12SSimon Wunderlich 
5560855aed12SSimon Wunderlich 	/* number of fft samples to send (0 for infinite) */
5561855aed12SSimon Wunderlich 	__le32 scan_count;
5562855aed12SSimon Wunderlich 	__le32 scan_period;
5563855aed12SSimon Wunderlich 	__le32 scan_priority;
5564855aed12SSimon Wunderlich 
5565855aed12SSimon Wunderlich 	/* number of bins in the FFT: 2^(fft_size - bin_scale) */
5566855aed12SSimon Wunderlich 	__le32 scan_fft_size;
5567855aed12SSimon Wunderlich 	__le32 scan_gc_ena;
5568855aed12SSimon Wunderlich 	__le32 scan_restart_ena;
5569855aed12SSimon Wunderlich 	__le32 scan_noise_floor_ref;
5570855aed12SSimon Wunderlich 	__le32 scan_init_delay;
5571855aed12SSimon Wunderlich 	__le32 scan_nb_tone_thr;
5572855aed12SSimon Wunderlich 	__le32 scan_str_bin_thr;
5573855aed12SSimon Wunderlich 	__le32 scan_wb_rpt_mode;
5574855aed12SSimon Wunderlich 	__le32 scan_rssi_rpt_mode;
5575855aed12SSimon Wunderlich 	__le32 scan_rssi_thr;
5576855aed12SSimon Wunderlich 	__le32 scan_pwr_format;
5577855aed12SSimon Wunderlich 
5578855aed12SSimon Wunderlich 	/* rpt_mode: Format of FFT report to software for spectral scan
5579855aed12SSimon Wunderlich 	 * triggered FFTs:
5580855aed12SSimon Wunderlich 	 *	0: No FFT report (only spectral scan summary report)
5581855aed12SSimon Wunderlich 	 *	1: 2-dword summary of metrics for each completed FFT + spectral
5582855aed12SSimon Wunderlich 	 *	   scan	summary report
5583855aed12SSimon Wunderlich 	 *	2: 2-dword summary of metrics for each completed FFT +
5584855aed12SSimon Wunderlich 	 *	   1x- oversampled bins(in-band) per FFT + spectral scan summary
5585855aed12SSimon Wunderlich 	 *	   report
5586855aed12SSimon Wunderlich 	 *	3: 2-dword summary of metrics for each completed FFT +
5587855aed12SSimon Wunderlich 	 *	   2x- oversampled bins	(all) per FFT + spectral scan summary
5588855aed12SSimon Wunderlich 	 */
5589855aed12SSimon Wunderlich 	__le32 scan_rpt_mode;
5590855aed12SSimon Wunderlich 	__le32 scan_bin_scale;
5591855aed12SSimon Wunderlich 	__le32 scan_dbm_adj;
5592855aed12SSimon Wunderlich 	__le32 scan_chn_mask;
5593855aed12SSimon Wunderlich } __packed;
5594855aed12SSimon Wunderlich 
5595855aed12SSimon Wunderlich struct wmi_vdev_spectral_conf_arg {
5596855aed12SSimon Wunderlich 	u32 vdev_id;
5597855aed12SSimon Wunderlich 	u32 scan_count;
5598855aed12SSimon Wunderlich 	u32 scan_period;
5599855aed12SSimon Wunderlich 	u32 scan_priority;
5600855aed12SSimon Wunderlich 	u32 scan_fft_size;
5601855aed12SSimon Wunderlich 	u32 scan_gc_ena;
5602855aed12SSimon Wunderlich 	u32 scan_restart_ena;
5603855aed12SSimon Wunderlich 	u32 scan_noise_floor_ref;
5604855aed12SSimon Wunderlich 	u32 scan_init_delay;
5605855aed12SSimon Wunderlich 	u32 scan_nb_tone_thr;
5606855aed12SSimon Wunderlich 	u32 scan_str_bin_thr;
5607855aed12SSimon Wunderlich 	u32 scan_wb_rpt_mode;
5608855aed12SSimon Wunderlich 	u32 scan_rssi_rpt_mode;
5609855aed12SSimon Wunderlich 	u32 scan_rssi_thr;
5610855aed12SSimon Wunderlich 	u32 scan_pwr_format;
5611855aed12SSimon Wunderlich 	u32 scan_rpt_mode;
5612855aed12SSimon Wunderlich 	u32 scan_bin_scale;
5613855aed12SSimon Wunderlich 	u32 scan_dbm_adj;
5614855aed12SSimon Wunderlich 	u32 scan_chn_mask;
5615855aed12SSimon Wunderlich };
5616855aed12SSimon Wunderlich 
5617855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_DEFAULT              0
5618855aed12SSimon Wunderlich #define WMI_SPECTRAL_COUNT_DEFAULT               0
5619855aed12SSimon Wunderlich #define WMI_SPECTRAL_PERIOD_DEFAULT             35
5620855aed12SSimon Wunderlich #define WMI_SPECTRAL_PRIORITY_DEFAULT            1
5621855aed12SSimon Wunderlich #define WMI_SPECTRAL_FFT_SIZE_DEFAULT            7
5622855aed12SSimon Wunderlich #define WMI_SPECTRAL_GC_ENA_DEFAULT              1
5623855aed12SSimon Wunderlich #define WMI_SPECTRAL_RESTART_ENA_DEFAULT         0
5624855aed12SSimon Wunderlich #define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT   -96
5625855aed12SSimon Wunderlich #define WMI_SPECTRAL_INIT_DELAY_DEFAULT         80
5626855aed12SSimon Wunderlich #define WMI_SPECTRAL_NB_TONE_THR_DEFAULT        12
5627855aed12SSimon Wunderlich #define WMI_SPECTRAL_STR_BIN_THR_DEFAULT         8
5628855aed12SSimon Wunderlich #define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT         0
5629855aed12SSimon Wunderlich #define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT       0
5630855aed12SSimon Wunderlich #define WMI_SPECTRAL_RSSI_THR_DEFAULT         0xf0
5631855aed12SSimon Wunderlich #define WMI_SPECTRAL_PWR_FORMAT_DEFAULT          0
5632855aed12SSimon Wunderlich #define WMI_SPECTRAL_RPT_MODE_DEFAULT            2
5633855aed12SSimon Wunderlich #define WMI_SPECTRAL_BIN_SCALE_DEFAULT           1
5634855aed12SSimon Wunderlich #define WMI_SPECTRAL_DBM_ADJ_DEFAULT             1
5635855aed12SSimon Wunderlich #define WMI_SPECTRAL_CHN_MASK_DEFAULT            1
5636855aed12SSimon Wunderlich 
5637855aed12SSimon Wunderlich struct wmi_vdev_spectral_enable_cmd {
5638855aed12SSimon Wunderlich 	__le32 vdev_id;
5639855aed12SSimon Wunderlich 	__le32 trigger_cmd;
5640855aed12SSimon Wunderlich 	__le32 enable_cmd;
5641855aed12SSimon Wunderlich } __packed;
5642855aed12SSimon Wunderlich 
5643855aed12SSimon Wunderlich #define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER  1
5644855aed12SSimon Wunderlich #define WMI_SPECTRAL_TRIGGER_CMD_CLEAR    2
5645855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_CMD_ENABLE    1
5646855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_CMD_DISABLE   2
5647855aed12SSimon Wunderlich 
56485e3dd157SKalle Valo /* Beacon processing related command and event structures */
56495e3dd157SKalle Valo struct wmi_bcn_tx_hdr {
56505e3dd157SKalle Valo 	__le32 vdev_id;
56515e3dd157SKalle Valo 	__le32 tx_rate;
56525e3dd157SKalle Valo 	__le32 tx_power;
56535e3dd157SKalle Valo 	__le32 bcn_len;
56545e3dd157SKalle Valo } __packed;
56555e3dd157SKalle Valo 
56565e3dd157SKalle Valo struct wmi_bcn_tx_cmd {
56575e3dd157SKalle Valo 	struct wmi_bcn_tx_hdr hdr;
56585e3dd157SKalle Valo 	u8 *bcn[0];
56595e3dd157SKalle Valo } __packed;
56605e3dd157SKalle Valo 
56615e3dd157SKalle Valo struct wmi_bcn_tx_arg {
56625e3dd157SKalle Valo 	u32 vdev_id;
56635e3dd157SKalle Valo 	u32 tx_rate;
56645e3dd157SKalle Valo 	u32 tx_power;
56655e3dd157SKalle Valo 	u32 bcn_len;
56665e3dd157SKalle Valo 	const void *bcn;
56675e3dd157SKalle Valo };
56685e3dd157SKalle Valo 
5669748afc47SMichal Kazior enum wmi_bcn_tx_ref_flags {
5670748afc47SMichal Kazior 	WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1,
5671748afc47SMichal Kazior 	WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2,
5672748afc47SMichal Kazior };
5673748afc47SMichal Kazior 
567424c88f78SMichal Kazior /* TODO: It is unclear why "no antenna" works while any other seemingly valid
567524c88f78SMichal Kazior  * chainmask yields no beacons on the air at all.
567624c88f78SMichal Kazior  */
567724c88f78SMichal Kazior #define WMI_BCN_TX_REF_DEF_ANTENNA 0
567824c88f78SMichal Kazior 
5679748afc47SMichal Kazior struct wmi_bcn_tx_ref_cmd {
5680748afc47SMichal Kazior 	__le32 vdev_id;
5681748afc47SMichal Kazior 	__le32 data_len;
5682748afc47SMichal Kazior 	/* physical address of the frame - dma pointer */
5683748afc47SMichal Kazior 	__le32 data_ptr;
5684748afc47SMichal Kazior 	/* id for host to track */
5685748afc47SMichal Kazior 	__le32 msdu_id;
5686748afc47SMichal Kazior 	/* frame ctrl to setup PPDU desc */
5687748afc47SMichal Kazior 	__le32 frame_control;
5688748afc47SMichal Kazior 	/* to control CABQ traffic: WMI_BCN_TX_REF_FLAG_ */
5689748afc47SMichal Kazior 	__le32 flags;
569024c88f78SMichal Kazior 	/* introduced in 10.2 */
569124c88f78SMichal Kazior 	__le32 antenna_mask;
5692748afc47SMichal Kazior } __packed;
5693748afc47SMichal Kazior 
56945e3dd157SKalle Valo /* Beacon filter */
56955e3dd157SKalle Valo #define WMI_BCN_FILTER_ALL   0 /* Filter all beacons */
56965e3dd157SKalle Valo #define WMI_BCN_FILTER_NONE  1 /* Pass all beacons */
56975e3dd157SKalle Valo #define WMI_BCN_FILTER_RSSI  2 /* Pass Beacons RSSI >= RSSI threshold */
56985e3dd157SKalle Valo #define WMI_BCN_FILTER_BSSID 3 /* Pass Beacons with matching BSSID */
56995e3dd157SKalle Valo #define WMI_BCN_FILTER_SSID  4 /* Pass Beacons with matching SSID */
57005e3dd157SKalle Valo 
57015e3dd157SKalle Valo struct wmi_bcn_filter_rx_cmd {
57025e3dd157SKalle Valo 	/* Filter ID */
57035e3dd157SKalle Valo 	__le32 bcn_filter_id;
57045e3dd157SKalle Valo 	/* Filter type - wmi_bcn_filter */
57055e3dd157SKalle Valo 	__le32 bcn_filter;
57065e3dd157SKalle Valo 	/* Buffer len */
57075e3dd157SKalle Valo 	__le32 bcn_filter_len;
57085e3dd157SKalle Valo 	/* Filter info (threshold, BSSID, RSSI) */
57095e3dd157SKalle Valo 	u8 *bcn_filter_buf;
57105e3dd157SKalle Valo } __packed;
57115e3dd157SKalle Valo 
57125e3dd157SKalle Valo /* Capabilities and IEs to be passed to firmware */
57135e3dd157SKalle Valo struct wmi_bcn_prb_info {
57145e3dd157SKalle Valo 	/* Capabilities */
57155e3dd157SKalle Valo 	__le32 caps;
57165e3dd157SKalle Valo 	/* ERP info */
57175e3dd157SKalle Valo 	__le32 erp;
57185e3dd157SKalle Valo 	/* Advanced capabilities */
57195e3dd157SKalle Valo 	/* HT capabilities */
57205e3dd157SKalle Valo 	/* HT Info */
57215e3dd157SKalle Valo 	/* ibss_dfs */
57225e3dd157SKalle Valo 	/* wpa Info */
57235e3dd157SKalle Valo 	/* rsn Info */
57245e3dd157SKalle Valo 	/* rrm info */
57255e3dd157SKalle Valo 	/* ath_ext */
57265e3dd157SKalle Valo 	/* app IE */
57275e3dd157SKalle Valo } __packed;
57285e3dd157SKalle Valo 
57295e3dd157SKalle Valo struct wmi_bcn_tmpl_cmd {
57305e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
57315e3dd157SKalle Valo 	__le32 vdev_id;
57325e3dd157SKalle Valo 	/* TIM IE offset from the beginning of the template. */
57335e3dd157SKalle Valo 	__le32 tim_ie_offset;
57345e3dd157SKalle Valo 	/* beacon probe capabilities and IEs */
57355e3dd157SKalle Valo 	struct wmi_bcn_prb_info bcn_prb_info;
57365e3dd157SKalle Valo 	/* beacon buffer length */
57375e3dd157SKalle Valo 	__le32 buf_len;
57385e3dd157SKalle Valo 	/* variable length data */
57395e3dd157SKalle Valo 	u8 data[1];
57405e3dd157SKalle Valo } __packed;
57415e3dd157SKalle Valo 
57425e3dd157SKalle Valo struct wmi_prb_tmpl_cmd {
57435e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
57445e3dd157SKalle Valo 	__le32 vdev_id;
57455e3dd157SKalle Valo 	/* beacon probe capabilities and IEs */
57465e3dd157SKalle Valo 	struct wmi_bcn_prb_info bcn_prb_info;
57475e3dd157SKalle Valo 	/* beacon buffer length */
57485e3dd157SKalle Valo 	__le32 buf_len;
57495e3dd157SKalle Valo 	/* Variable length data */
57505e3dd157SKalle Valo 	u8 data[1];
57515e3dd157SKalle Valo } __packed;
57525e3dd157SKalle Valo 
57535e3dd157SKalle Valo enum wmi_sta_ps_mode {
57545e3dd157SKalle Valo 	/* enable power save for the given STA VDEV */
57555e3dd157SKalle Valo 	WMI_STA_PS_MODE_DISABLED = 0,
57565e3dd157SKalle Valo 	/* disable power save  for a given STA VDEV */
57575e3dd157SKalle Valo 	WMI_STA_PS_MODE_ENABLED = 1,
57585e3dd157SKalle Valo };
57595e3dd157SKalle Valo 
57605e3dd157SKalle Valo struct wmi_sta_powersave_mode_cmd {
57615e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
57625e3dd157SKalle Valo 	__le32 vdev_id;
57635e3dd157SKalle Valo 
57645e3dd157SKalle Valo 	/*
57655e3dd157SKalle Valo 	 * Power save mode
57665e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_mode)
57675e3dd157SKalle Valo 	 */
57685e3dd157SKalle Valo 	__le32 sta_ps_mode;
57695e3dd157SKalle Valo } __packed;
57705e3dd157SKalle Valo 
57715e3dd157SKalle Valo enum wmi_csa_offload_en {
57725e3dd157SKalle Valo 	WMI_CSA_OFFLOAD_DISABLE = 0,
57735e3dd157SKalle Valo 	WMI_CSA_OFFLOAD_ENABLE = 1,
57745e3dd157SKalle Valo };
57755e3dd157SKalle Valo 
57765e3dd157SKalle Valo struct wmi_csa_offload_enable_cmd {
57775e3dd157SKalle Valo 	__le32 vdev_id;
57785e3dd157SKalle Valo 	__le32 csa_offload_enable;
57795e3dd157SKalle Valo } __packed;
57805e3dd157SKalle Valo 
57815e3dd157SKalle Valo struct wmi_csa_offload_chanswitch_cmd {
57825e3dd157SKalle Valo 	__le32 vdev_id;
57835e3dd157SKalle Valo 	struct wmi_channel chan;
57845e3dd157SKalle Valo } __packed;
57855e3dd157SKalle Valo 
57865e3dd157SKalle Valo /*
57875e3dd157SKalle Valo  * This parameter controls the policy for retrieving frames from AP while the
57885e3dd157SKalle Valo  * STA is in sleep state.
57895e3dd157SKalle Valo  *
57905e3dd157SKalle Valo  * Only takes affect if the sta_ps_mode is enabled
57915e3dd157SKalle Valo  */
57925e3dd157SKalle Valo enum wmi_sta_ps_param_rx_wake_policy {
57935e3dd157SKalle Valo 	/*
57945e3dd157SKalle Valo 	 * Wake up when ever there is an  RX activity on the VDEV. In this mode
57955e3dd157SKalle Valo 	 * the Power save SM(state machine) will come out of sleep by either
57965e3dd157SKalle Valo 	 * sending null frame (or) a data frame (with PS==0) in response to TIM
57975e3dd157SKalle Valo 	 * bit set in the received beacon frame from AP.
57985e3dd157SKalle Valo 	 */
57995e3dd157SKalle Valo 	WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
58005e3dd157SKalle Valo 
58015e3dd157SKalle Valo 	/*
58025e3dd157SKalle Valo 	 * Here the power save state machine will not wakeup in response to TIM
58035e3dd157SKalle Valo 	 * bit, instead it will send a PSPOLL (or) UASPD trigger based on UAPSD
58045e3dd157SKalle Valo 	 * configuration setup by WMISET_PS_SET_UAPSD  WMI command.  When all
58055e3dd157SKalle Valo 	 * access categories are delivery-enabled, the station will send a
58065e3dd157SKalle Valo 	 * UAPSD trigger frame, otherwise it will send a PS-Poll.
58075e3dd157SKalle Valo 	 */
58085e3dd157SKalle Valo 	WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
58095e3dd157SKalle Valo };
58105e3dd157SKalle Valo 
58115e3dd157SKalle Valo /*
58125e3dd157SKalle Valo  * Number of tx frames/beacon  that cause the power save SM to wake up.
58135e3dd157SKalle Valo  *
58145e3dd157SKalle Valo  * Value 1 causes the SM to wake up for every TX. Value 0 has a special
58155e3dd157SKalle Valo  * meaning, It will cause the SM to never wake up. This is useful if you want
58165e3dd157SKalle Valo  * to keep the system to sleep all the time for some kind of test mode . host
58175e3dd157SKalle Valo  * can change this parameter any time.  It will affect at the next tx frame.
58185e3dd157SKalle Valo  */
58195e3dd157SKalle Valo enum wmi_sta_ps_param_tx_wake_threshold {
58205e3dd157SKalle Valo 	WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
58215e3dd157SKalle Valo 	WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
58225e3dd157SKalle Valo 
58235e3dd157SKalle Valo 	/*
58245e3dd157SKalle Valo 	 * Values greater than one indicate that many TX attempts per beacon
58255e3dd157SKalle Valo 	 * interval before the STA will wake up
58265e3dd157SKalle Valo 	 */
58275e3dd157SKalle Valo };
58285e3dd157SKalle Valo 
58295e3dd157SKalle Valo /*
58305e3dd157SKalle Valo  * The maximum number of PS-Poll frames the FW will send in response to
58315e3dd157SKalle Valo  * traffic advertised in TIM before waking up (by sending a null frame with PS
58325e3dd157SKalle Valo  * = 0). Value 0 has a special meaning: there is no maximum count and the FW
58335e3dd157SKalle Valo  * will send as many PS-Poll as are necessary to retrieve buffered BU. This
58345e3dd157SKalle Valo  * parameter is used when the RX wake policy is
58355e3dd157SKalle Valo  * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
58365e3dd157SKalle Valo  * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
58375e3dd157SKalle Valo  */
58385e3dd157SKalle Valo enum wmi_sta_ps_param_pspoll_count {
58395e3dd157SKalle Valo 	WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
58405e3dd157SKalle Valo 	/*
58415e3dd157SKalle Valo 	 * Values greater than 0 indicate the maximum numer of PS-Poll frames
58425e3dd157SKalle Valo 	 * FW will send before waking up.
58435e3dd157SKalle Valo 	 */
58449f9b5746SMichal Kazior 
58459f9b5746SMichal Kazior 	/* When u-APSD is enabled the firmware will be very reluctant to exit
58469f9b5746SMichal Kazior 	 * STA PS. This could result in very poor Rx performance with STA doing
58479f9b5746SMichal Kazior 	 * PS-Poll for each and every buffered frame. This value is a bit
58489f9b5746SMichal Kazior 	 * arbitrary.
58499f9b5746SMichal Kazior 	 */
58509f9b5746SMichal Kazior 	WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3,
58515e3dd157SKalle Valo };
58525e3dd157SKalle Valo 
58535e3dd157SKalle Valo /*
58545e3dd157SKalle Valo  * This will include the delivery and trigger enabled state for every AC.
58555e3dd157SKalle Valo  * This is the negotiated state with AP. The host MLME needs to set this based
58565e3dd157SKalle Valo  * on AP capability and the state Set in the association request by the
58575e3dd157SKalle Valo  * station MLME.Lower 8 bits of the value specify the UAPSD configuration.
58585e3dd157SKalle Valo  */
58595e3dd157SKalle Valo #define WMI_UAPSD_AC_TYPE_DELI 0
58605e3dd157SKalle Valo #define WMI_UAPSD_AC_TYPE_TRIG 1
58615e3dd157SKalle Valo 
58625e3dd157SKalle Valo #define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5863e13dbeadSJoe Perches 	(type == WMI_UAPSD_AC_TYPE_DELI ? 1 << (ac << 1) : 1 << ((ac << 1) + 1))
58645e3dd157SKalle Valo 
58655e3dd157SKalle Valo enum wmi_sta_ps_param_uapsd {
58665e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
58675e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
58685e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
58695e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
58705e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
58715e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
58725e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
58735e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
58745e3dd157SKalle Valo };
58755e3dd157SKalle Valo 
58760c7e477cSJanusz Dziedzic #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
58770c7e477cSJanusz Dziedzic 
58780c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_param {
58790c7e477cSJanusz Dziedzic 	__le32 wmm_ac;
58800c7e477cSJanusz Dziedzic 	__le32 user_priority;
58810c7e477cSJanusz Dziedzic 	__le32 service_interval;
58820c7e477cSJanusz Dziedzic 	__le32 suspend_interval;
58830c7e477cSJanusz Dziedzic 	__le32 delay_interval;
58840c7e477cSJanusz Dziedzic };
58850c7e477cSJanusz Dziedzic 
58860c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
58870c7e477cSJanusz Dziedzic 	__le32 vdev_id;
58880c7e477cSJanusz Dziedzic 	struct wmi_mac_addr peer_macaddr;
58890c7e477cSJanusz Dziedzic 	__le32 num_ac;
58900c7e477cSJanusz Dziedzic };
58910c7e477cSJanusz Dziedzic 
58920c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_arg {
58930c7e477cSJanusz Dziedzic 	u32 wmm_ac;
58940c7e477cSJanusz Dziedzic 	u32 user_priority;
58950c7e477cSJanusz Dziedzic 	u32 service_interval;
58960c7e477cSJanusz Dziedzic 	u32 suspend_interval;
58970c7e477cSJanusz Dziedzic 	u32 delay_interval;
58980c7e477cSJanusz Dziedzic };
58990c7e477cSJanusz Dziedzic 
59005e3dd157SKalle Valo enum wmi_sta_powersave_param {
59015e3dd157SKalle Valo 	/*
59025e3dd157SKalle Valo 	 * Controls how frames are retrievd from AP while STA is sleeping
59035e3dd157SKalle Valo 	 *
59045e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_param_rx_wake_policy)
59055e3dd157SKalle Valo 	 */
59065e3dd157SKalle Valo 	WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
59075e3dd157SKalle Valo 
59085e3dd157SKalle Valo 	/*
59095e3dd157SKalle Valo 	 * The STA will go active after this many TX
59105e3dd157SKalle Valo 	 *
59115e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_param_tx_wake_threshold)
59125e3dd157SKalle Valo 	 */
59135e3dd157SKalle Valo 	WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
59145e3dd157SKalle Valo 
59155e3dd157SKalle Valo 	/*
59165e3dd157SKalle Valo 	 * Number of PS-Poll to send before STA wakes up
59175e3dd157SKalle Valo 	 *
59185e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_param_pspoll_count)
59195e3dd157SKalle Valo 	 *
59205e3dd157SKalle Valo 	 */
59215e3dd157SKalle Valo 	WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
59225e3dd157SKalle Valo 
59235e3dd157SKalle Valo 	/*
59245e3dd157SKalle Valo 	 * TX/RX inactivity time in msec before going to sleep.
59255e3dd157SKalle Valo 	 *
59265e3dd157SKalle Valo 	 * The power save SM will monitor tx/rx activity on the VDEV, if no
59275e3dd157SKalle Valo 	 * activity for the specified msec of the parameter the Power save
59285e3dd157SKalle Valo 	 * SM will go to sleep.
59295e3dd157SKalle Valo 	 */
59305e3dd157SKalle Valo 	WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
59315e3dd157SKalle Valo 
59325e3dd157SKalle Valo 	/*
59335e3dd157SKalle Valo 	 * Set uapsd configuration.
59345e3dd157SKalle Valo 	 *
59355e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_param_uapsd)
59365e3dd157SKalle Valo 	 */
59375e3dd157SKalle Valo 	WMI_STA_PS_PARAM_UAPSD = 4,
59385e3dd157SKalle Valo };
59395e3dd157SKalle Valo 
59405e3dd157SKalle Valo struct wmi_sta_powersave_param_cmd {
59415e3dd157SKalle Valo 	__le32 vdev_id;
59425e3dd157SKalle Valo 	__le32 param_id; /* %WMI_STA_PS_PARAM_ */
59435e3dd157SKalle Valo 	__le32 param_value;
59445e3dd157SKalle Valo } __packed;
59455e3dd157SKalle Valo 
59465e3dd157SKalle Valo /* No MIMO power save */
59475e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_DISABLE
59485e3dd157SKalle Valo /* mimo powersave mode static*/
59495e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_STATIC
59505e3dd157SKalle Valo /* mimo powersave mode dynamic */
59515e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_DYNAMIC
59525e3dd157SKalle Valo 
59535e3dd157SKalle Valo struct wmi_sta_mimo_ps_mode_cmd {
59545e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
59555e3dd157SKalle Valo 	__le32 vdev_id;
59565e3dd157SKalle Valo 	/* mimo powersave mode as defined above */
59575e3dd157SKalle Valo 	__le32 mimo_pwrsave_mode;
59585e3dd157SKalle Valo } __packed;
59595e3dd157SKalle Valo 
59605e3dd157SKalle Valo /* U-APSD configuration of peer station from (re)assoc request and TSPECs */
59615e3dd157SKalle Valo enum wmi_ap_ps_param_uapsd {
59625e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
59635e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
59645e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
59655e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
59665e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
59675e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
59685e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
59695e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
59705e3dd157SKalle Valo };
59715e3dd157SKalle Valo 
59725e3dd157SKalle Valo /* U-APSD maximum service period of peer station */
59735e3dd157SKalle Valo enum wmi_ap_ps_peer_param_max_sp {
59745e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
59755e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
59765e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
59775e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
59785e3dd157SKalle Valo 	MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
59795e3dd157SKalle Valo };
59805e3dd157SKalle Valo 
59815e3dd157SKalle Valo /*
59825e3dd157SKalle Valo  * AP power save parameter
59835e3dd157SKalle Valo  * Set a power save specific parameter for a peer station
59845e3dd157SKalle Valo  */
59855e3dd157SKalle Valo enum wmi_ap_ps_peer_param {
59865e3dd157SKalle Valo 	/* Set uapsd configuration for a given peer.
59875e3dd157SKalle Valo 	 *
59885e3dd157SKalle Valo 	 * Include the delivery and trigger enabled state for every AC.
59895e3dd157SKalle Valo 	 * The host  MLME needs to set this based on AP capability and stations
59905e3dd157SKalle Valo 	 * request Set in the association request  received from the station.
59915e3dd157SKalle Valo 	 *
59925e3dd157SKalle Valo 	 * Lower 8 bits of the value specify the UAPSD configuration.
59935e3dd157SKalle Valo 	 *
59945e3dd157SKalle Valo 	 * (see enum wmi_ap_ps_param_uapsd)
59955e3dd157SKalle Valo 	 * The default value is 0.
59965e3dd157SKalle Valo 	 */
59975e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_UAPSD = 0,
59985e3dd157SKalle Valo 
59995e3dd157SKalle Valo 	/*
60005e3dd157SKalle Valo 	 * Set the service period for a UAPSD capable station
60015e3dd157SKalle Valo 	 *
60025e3dd157SKalle Valo 	 * The service period from wme ie in the (re)assoc request frame.
60035e3dd157SKalle Valo 	 *
60045e3dd157SKalle Valo 	 * (see enum wmi_ap_ps_peer_param_max_sp)
60055e3dd157SKalle Valo 	 */
60065e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
60075e3dd157SKalle Valo 
60085e3dd157SKalle Valo 	/* Time in seconds for aging out buffered frames for STA in PS */
60095e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
60105e3dd157SKalle Valo };
60115e3dd157SKalle Valo 
60125e3dd157SKalle Valo struct wmi_ap_ps_peer_cmd {
60135e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
60145e3dd157SKalle Valo 	__le32 vdev_id;
60155e3dd157SKalle Valo 
60165e3dd157SKalle Valo 	/* peer MAC address */
60175e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
60185e3dd157SKalle Valo 
60195e3dd157SKalle Valo 	/* AP powersave param (see enum wmi_ap_ps_peer_param) */
60205e3dd157SKalle Valo 	__le32 param_id;
60215e3dd157SKalle Valo 
60225e3dd157SKalle Valo 	/* AP powersave param value */
60235e3dd157SKalle Valo 	__le32 param_value;
60245e3dd157SKalle Valo } __packed;
60255e3dd157SKalle Valo 
60265e3dd157SKalle Valo /* 128 clients = 4 words */
60275e3dd157SKalle Valo #define WMI_TIM_BITMAP_ARRAY_SIZE 4
60285e3dd157SKalle Valo 
60295e3dd157SKalle Valo struct wmi_tim_info {
60305e3dd157SKalle Valo 	__le32 tim_len;
60315e3dd157SKalle Valo 	__le32 tim_mcast;
60325e3dd157SKalle Valo 	__le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
60335e3dd157SKalle Valo 	__le32 tim_changed;
60345e3dd157SKalle Valo 	__le32 tim_num_ps_pending;
60355e3dd157SKalle Valo } __packed;
60365e3dd157SKalle Valo 
6037a03fee34SRaja Mani struct wmi_tim_info_arg {
6038a03fee34SRaja Mani 	__le32 tim_len;
6039a03fee34SRaja Mani 	__le32 tim_mcast;
6040a03fee34SRaja Mani 	const __le32 *tim_bitmap;
6041a03fee34SRaja Mani 	__le32 tim_changed;
6042a03fee34SRaja Mani 	__le32 tim_num_ps_pending;
6043a03fee34SRaja Mani } __packed;
6044a03fee34SRaja Mani 
60455e3dd157SKalle Valo /* Maximum number of NOA Descriptors supported */
60465e3dd157SKalle Valo #define WMI_P2P_MAX_NOA_DESCRIPTORS 4
60475e3dd157SKalle Valo #define WMI_P2P_OPPPS_ENABLE_BIT	BIT(0)
60485e3dd157SKalle Valo #define WMI_P2P_OPPPS_CTWINDOW_OFFSET	1
60495e3dd157SKalle Valo #define WMI_P2P_NOA_CHANGED_BIT	BIT(0)
60505e3dd157SKalle Valo 
60515e3dd157SKalle Valo struct wmi_p2p_noa_info {
60525e3dd157SKalle Valo 	/* Bit 0 - Flag to indicate an update in NOA schedule
605337ff1b0dSMarcin Rokicki 	 * Bits 7-1 - Reserved
605437ff1b0dSMarcin Rokicki 	 */
60555e3dd157SKalle Valo 	u8 changed;
60565e3dd157SKalle Valo 	/* NOA index */
60575e3dd157SKalle Valo 	u8 index;
60585e3dd157SKalle Valo 	/* Bit 0 - Opp PS state of the AP
605937ff1b0dSMarcin Rokicki 	 * Bits 1-7 - Ctwindow in TUs
606037ff1b0dSMarcin Rokicki 	 */
60615e3dd157SKalle Valo 	u8 ctwindow_oppps;
60625e3dd157SKalle Valo 	/* Number of NOA descriptors */
60635e3dd157SKalle Valo 	u8 num_descriptors;
60645e3dd157SKalle Valo 
60655e3dd157SKalle Valo 	struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
60665e3dd157SKalle Valo } __packed;
60675e3dd157SKalle Valo 
60685e3dd157SKalle Valo struct wmi_bcn_info {
60695e3dd157SKalle Valo 	struct wmi_tim_info tim_info;
60705e3dd157SKalle Valo 	struct wmi_p2p_noa_info p2p_noa_info;
60715e3dd157SKalle Valo } __packed;
60725e3dd157SKalle Valo 
60735e3dd157SKalle Valo struct wmi_host_swba_event {
60745e3dd157SKalle Valo 	__le32 vdev_map;
607532653cf1SMichal Kazior 	struct wmi_bcn_info bcn_info[0];
60765e3dd157SKalle Valo } __packed;
60775e3dd157SKalle Valo 
60788b019fb0SYanbo Li struct wmi_10_2_4_bcn_info {
60798b019fb0SYanbo Li 	struct wmi_tim_info tim_info;
60808b019fb0SYanbo Li 	/* The 10.2.4 FW doesn't have p2p NOA info */
60818b019fb0SYanbo Li } __packed;
60828b019fb0SYanbo Li 
60838b019fb0SYanbo Li struct wmi_10_2_4_host_swba_event {
60848b019fb0SYanbo Li 	__le32 vdev_map;
60858b019fb0SYanbo Li 	struct wmi_10_2_4_bcn_info bcn_info[0];
60868b019fb0SYanbo Li } __packed;
60878b019fb0SYanbo Li 
60883cec3be3SRaja Mani /* 16 words = 512 client + 1 word = for guard */
60893cec3be3SRaja Mani #define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17
60903cec3be3SRaja Mani 
60913cec3be3SRaja Mani struct wmi_10_4_tim_info {
60923cec3be3SRaja Mani 	__le32 tim_len;
60933cec3be3SRaja Mani 	__le32 tim_mcast;
60943cec3be3SRaja Mani 	__le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE];
60953cec3be3SRaja Mani 	__le32 tim_changed;
60963cec3be3SRaja Mani 	__le32 tim_num_ps_pending;
60973cec3be3SRaja Mani } __packed;
60983cec3be3SRaja Mani 
60993cec3be3SRaja Mani #define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1
61003cec3be3SRaja Mani 
61013cec3be3SRaja Mani struct wmi_10_4_p2p_noa_info {
61023cec3be3SRaja Mani 	/* Bit 0 - Flag to indicate an update in NOA schedule
61033cec3be3SRaja Mani 	 * Bits 7-1 - Reserved
61043cec3be3SRaja Mani 	 */
61053cec3be3SRaja Mani 	u8 changed;
61063cec3be3SRaja Mani 	/* NOA index */
61073cec3be3SRaja Mani 	u8 index;
61083cec3be3SRaja Mani 	/* Bit 0 - Opp PS state of the AP
61093cec3be3SRaja Mani 	 * Bits 1-7 - Ctwindow in TUs
61103cec3be3SRaja Mani 	 */
61113cec3be3SRaja Mani 	u8 ctwindow_oppps;
61123cec3be3SRaja Mani 	/* Number of NOA descriptors */
61133cec3be3SRaja Mani 	u8 num_descriptors;
61143cec3be3SRaja Mani 
61153cec3be3SRaja Mani 	struct wmi_p2p_noa_descriptor
61163cec3be3SRaja Mani 		noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS];
61173cec3be3SRaja Mani } __packed;
61183cec3be3SRaja Mani 
61193cec3be3SRaja Mani struct wmi_10_4_bcn_info {
61203cec3be3SRaja Mani 	struct wmi_10_4_tim_info tim_info;
61213cec3be3SRaja Mani 	struct wmi_10_4_p2p_noa_info p2p_noa_info;
61223cec3be3SRaja Mani } __packed;
61233cec3be3SRaja Mani 
61243cec3be3SRaja Mani struct wmi_10_4_host_swba_event {
61253cec3be3SRaja Mani 	__le32 vdev_map;
61263cec3be3SRaja Mani 	struct wmi_10_4_bcn_info bcn_info[0];
61273cec3be3SRaja Mani } __packed;
61283cec3be3SRaja Mani 
61295e3dd157SKalle Valo #define WMI_MAX_AP_VDEV 16
61305e3dd157SKalle Valo 
61315e3dd157SKalle Valo struct wmi_tbtt_offset_event {
61325e3dd157SKalle Valo 	__le32 vdev_map;
61335e3dd157SKalle Valo 	__le32 tbttoffset_list[WMI_MAX_AP_VDEV];
61345e3dd157SKalle Valo } __packed;
61355e3dd157SKalle Valo 
61365e3dd157SKalle Valo struct wmi_peer_create_cmd {
61375e3dd157SKalle Valo 	__le32 vdev_id;
61385e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
6139be5b4f40SManikanta Pubbisetty 	__le32 peer_type;
61405e3dd157SKalle Valo } __packed;
61415e3dd157SKalle Valo 
61427390ed34SMarek Puzyniak enum wmi_peer_type {
61437390ed34SMarek Puzyniak 	WMI_PEER_TYPE_DEFAULT = 0,
61447390ed34SMarek Puzyniak 	WMI_PEER_TYPE_BSS = 1,
61457390ed34SMarek Puzyniak 	WMI_PEER_TYPE_TDLS = 2,
61467390ed34SMarek Puzyniak };
61477390ed34SMarek Puzyniak 
61485e3dd157SKalle Valo struct wmi_peer_delete_cmd {
61495e3dd157SKalle Valo 	__le32 vdev_id;
61505e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
61515e3dd157SKalle Valo } __packed;
61525e3dd157SKalle Valo 
61535e3dd157SKalle Valo struct wmi_peer_flush_tids_cmd {
61545e3dd157SKalle Valo 	__le32 vdev_id;
61555e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
61565e3dd157SKalle Valo 	__le32 peer_tid_bitmap;
61575e3dd157SKalle Valo } __packed;
61585e3dd157SKalle Valo 
61595e3dd157SKalle Valo struct wmi_fixed_rate {
61605e3dd157SKalle Valo 	/*
61615e3dd157SKalle Valo 	 * rate mode . 0: disable fixed rate (auto rate)
61625e3dd157SKalle Valo 	 *   1: legacy (non 11n) rate  specified as ieee rate 2*Mbps
61635e3dd157SKalle Valo 	 *   2: ht20 11n rate  specified as mcs index
61645e3dd157SKalle Valo 	 *   3: ht40 11n rate  specified as mcs index
61655e3dd157SKalle Valo 	 */
61665e3dd157SKalle Valo 	__le32  rate_mode;
61675e3dd157SKalle Valo 	/*
61685e3dd157SKalle Valo 	 * 4 rate values for 4 rate series. series 0 is stored in byte 0 (LSB)
61695e3dd157SKalle Valo 	 * and series 3 is stored at byte 3 (MSB)
61705e3dd157SKalle Valo 	 */
61715e3dd157SKalle Valo 	__le32  rate_series;
61725e3dd157SKalle Valo 	/*
61735e3dd157SKalle Valo 	 * 4 retry counts for 4 rate series. retry count for rate 0 is stored
61745e3dd157SKalle Valo 	 * in byte 0 (LSB) and retry count for rate 3 is stored at byte 3
61755e3dd157SKalle Valo 	 * (MSB)
61765e3dd157SKalle Valo 	 */
61775e3dd157SKalle Valo 	__le32  rate_retries;
61785e3dd157SKalle Valo } __packed;
61795e3dd157SKalle Valo 
61805e3dd157SKalle Valo struct wmi_peer_fixed_rate_cmd {
61815e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
61825e3dd157SKalle Valo 	__le32 vdev_id;
61835e3dd157SKalle Valo 	/* peer MAC address */
61845e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
61855e3dd157SKalle Valo 	/* fixed rate */
61865e3dd157SKalle Valo 	struct wmi_fixed_rate peer_fixed_rate;
61875e3dd157SKalle Valo } __packed;
61885e3dd157SKalle Valo 
61895e3dd157SKalle Valo #define WMI_MGMT_TID    17
61905e3dd157SKalle Valo 
61915e3dd157SKalle Valo struct wmi_addba_clear_resp_cmd {
61925e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
61935e3dd157SKalle Valo 	__le32 vdev_id;
61945e3dd157SKalle Valo 	/* peer MAC address */
61955e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
61965e3dd157SKalle Valo } __packed;
61975e3dd157SKalle Valo 
61985e3dd157SKalle Valo struct wmi_addba_send_cmd {
61995e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
62005e3dd157SKalle Valo 	__le32 vdev_id;
62015e3dd157SKalle Valo 	/* peer MAC address */
62025e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62035e3dd157SKalle Valo 	/* Tid number */
62045e3dd157SKalle Valo 	__le32 tid;
62055e3dd157SKalle Valo 	/* Buffer/Window size*/
62065e3dd157SKalle Valo 	__le32 buffersize;
62075e3dd157SKalle Valo } __packed;
62085e3dd157SKalle Valo 
62095e3dd157SKalle Valo struct wmi_delba_send_cmd {
62105e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
62115e3dd157SKalle Valo 	__le32 vdev_id;
62125e3dd157SKalle Valo 	/* peer MAC address */
62135e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62145e3dd157SKalle Valo 	/* Tid number */
62155e3dd157SKalle Valo 	__le32 tid;
62165e3dd157SKalle Valo 	/* Is Initiator */
62175e3dd157SKalle Valo 	__le32 initiator;
62185e3dd157SKalle Valo 	/* Reason code */
62195e3dd157SKalle Valo 	__le32 reasoncode;
62205e3dd157SKalle Valo } __packed;
62215e3dd157SKalle Valo 
62225e3dd157SKalle Valo struct wmi_addba_setresponse_cmd {
62235e3dd157SKalle Valo 	/* unique id identifying the vdev, generated by the caller */
62245e3dd157SKalle Valo 	__le32 vdev_id;
62255e3dd157SKalle Valo 	/* peer mac address */
62265e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62275e3dd157SKalle Valo 	/* Tid number */
62285e3dd157SKalle Valo 	__le32 tid;
62295e3dd157SKalle Valo 	/* status code */
62305e3dd157SKalle Valo 	__le32 statuscode;
62315e3dd157SKalle Valo } __packed;
62325e3dd157SKalle Valo 
62335e3dd157SKalle Valo struct wmi_send_singleamsdu_cmd {
62345e3dd157SKalle Valo 	/* unique id identifying the vdev, generated by the caller */
62355e3dd157SKalle Valo 	__le32 vdev_id;
62365e3dd157SKalle Valo 	/* peer mac address */
62375e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62385e3dd157SKalle Valo 	/* Tid number */
62395e3dd157SKalle Valo 	__le32 tid;
62405e3dd157SKalle Valo } __packed;
62415e3dd157SKalle Valo 
62425e3dd157SKalle Valo enum wmi_peer_smps_state {
62435e3dd157SKalle Valo 	WMI_PEER_SMPS_PS_NONE = 0x0,
62445e3dd157SKalle Valo 	WMI_PEER_SMPS_STATIC  = 0x1,
62455e3dd157SKalle Valo 	WMI_PEER_SMPS_DYNAMIC = 0x2
62465e3dd157SKalle Valo };
62475e3dd157SKalle Valo 
62489797febcSMichal Kazior enum wmi_peer_chwidth {
62499797febcSMichal Kazior 	WMI_PEER_CHWIDTH_20MHZ = 0,
62509797febcSMichal Kazior 	WMI_PEER_CHWIDTH_40MHZ = 1,
62519797febcSMichal Kazior 	WMI_PEER_CHWIDTH_80MHZ = 2,
6252bc1efd73SSebastian Gottschall 	WMI_PEER_CHWIDTH_160MHZ = 3,
62539797febcSMichal Kazior };
62549797febcSMichal Kazior 
62555e3dd157SKalle Valo enum wmi_peer_param {
62565e3dd157SKalle Valo 	WMI_PEER_SMPS_STATE = 0x1, /* see %wmi_peer_smps_state */
62575e3dd157SKalle Valo 	WMI_PEER_AMPDU      = 0x2,
62585e3dd157SKalle Valo 	WMI_PEER_AUTHORIZE  = 0x3,
62595e3dd157SKalle Valo 	WMI_PEER_CHAN_WIDTH = 0x4,
62605e3dd157SKalle Valo 	WMI_PEER_NSS        = 0x5,
62610a987fb0SMichal Kazior 	WMI_PEER_USE_4ADDR  = 0x6,
6262ee8b08a1SMaharaja Kennadyrajan 	WMI_PEER_DEBUG      = 0xa,
62639191fc2aSRyan Hsu 	WMI_PEER_PHYMODE    = 0xd,
62640a987fb0SMichal Kazior 	WMI_PEER_DUMMY_VAR  = 0xff, /* dummy parameter for STA PS workaround */
62655e3dd157SKalle Valo };
62665e3dd157SKalle Valo 
62675e3dd157SKalle Valo struct wmi_peer_set_param_cmd {
62685e3dd157SKalle Valo 	__le32 vdev_id;
62695e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62705e3dd157SKalle Valo 	__le32 param_id;
62715e3dd157SKalle Valo 	__le32 param_value;
62725e3dd157SKalle Valo } __packed;
62735e3dd157SKalle Valo 
62745e3dd157SKalle Valo #define MAX_SUPPORTED_RATES 128
62755e3dd157SKalle Valo 
62765e3dd157SKalle Valo struct wmi_rate_set {
62775e3dd157SKalle Valo 	/* total number of rates */
62785e3dd157SKalle Valo 	__le32 num_rates;
62795e3dd157SKalle Valo 	/*
62805e3dd157SKalle Valo 	 * rates (each 8bit value) packed into a 32 bit word.
62815e3dd157SKalle Valo 	 * the rates are filled from least significant byte to most
62825e3dd157SKalle Valo 	 * significant byte.
62835e3dd157SKalle Valo 	 */
62845e3dd157SKalle Valo 	__le32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
62855e3dd157SKalle Valo } __packed;
62865e3dd157SKalle Valo 
62875e3dd157SKalle Valo struct wmi_rate_set_arg {
62885e3dd157SKalle Valo 	unsigned int num_rates;
62895e3dd157SKalle Valo 	u8 rates[MAX_SUPPORTED_RATES];
62905e3dd157SKalle Valo };
62915e3dd157SKalle Valo 
62925e3dd157SKalle Valo /*
62935e3dd157SKalle Valo  * NOTE: It would bea good idea to represent the Tx MCS
62945e3dd157SKalle Valo  * info in one word and Rx in another word. This is split
62955e3dd157SKalle Valo  * into multiple words for convenience
62965e3dd157SKalle Valo  */
62975e3dd157SKalle Valo struct wmi_vht_rate_set {
62985e3dd157SKalle Valo 	__le32 rx_max_rate; /* Max Rx data rate */
62995e3dd157SKalle Valo 	__le32 rx_mcs_set;  /* Negotiated RX VHT rates */
63005e3dd157SKalle Valo 	__le32 tx_max_rate; /* Max Tx data rate */
63015e3dd157SKalle Valo 	__le32 tx_mcs_set;  /* Negotiated TX VHT rates */
63025e3dd157SKalle Valo } __packed;
63035e3dd157SKalle Valo 
63045e3dd157SKalle Valo struct wmi_vht_rate_set_arg {
63055e3dd157SKalle Valo 	u32 rx_max_rate;
63065e3dd157SKalle Valo 	u32 rx_mcs_set;
63075e3dd157SKalle Valo 	u32 tx_max_rate;
63085e3dd157SKalle Valo 	u32 tx_mcs_set;
63095e3dd157SKalle Valo };
63105e3dd157SKalle Valo 
63115e3dd157SKalle Valo struct wmi_peer_set_rates_cmd {
63125e3dd157SKalle Valo 	/* peer MAC address */
63135e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
63145e3dd157SKalle Valo 	/* legacy rate set */
63155e3dd157SKalle Valo 	struct wmi_rate_set peer_legacy_rates;
63165e3dd157SKalle Valo 	/* ht rate set */
63175e3dd157SKalle Valo 	struct wmi_rate_set peer_ht_rates;
63185e3dd157SKalle Valo } __packed;
63195e3dd157SKalle Valo 
63205e3dd157SKalle Valo struct wmi_peer_set_q_empty_callback_cmd {
63215e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
63225e3dd157SKalle Valo 	__le32 vdev_id;
63235e3dd157SKalle Valo 	/* peer MAC address */
63245e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
63255e3dd157SKalle Valo 	__le32 callback_enable;
63265e3dd157SKalle Valo } __packed;
63275e3dd157SKalle Valo 
63283fab30f7STamizh chelvam struct wmi_peer_flags_map {
63293fab30f7STamizh chelvam 	u32 auth;
63303fab30f7STamizh chelvam 	u32 qos;
63313fab30f7STamizh chelvam 	u32 need_ptk_4_way;
63323fab30f7STamizh chelvam 	u32 need_gtk_2_way;
63333fab30f7STamizh chelvam 	u32 apsd;
63343fab30f7STamizh chelvam 	u32 ht;
63353fab30f7STamizh chelvam 	u32 bw40;
63363fab30f7STamizh chelvam 	u32 stbc;
63373fab30f7STamizh chelvam 	u32 ldbc;
63383fab30f7STamizh chelvam 	u32 dyn_mimops;
63393fab30f7STamizh chelvam 	u32 static_mimops;
63403fab30f7STamizh chelvam 	u32 spatial_mux;
63413fab30f7STamizh chelvam 	u32 vht;
63423fab30f7STamizh chelvam 	u32 bw80;
63433fab30f7STamizh chelvam 	u32 vht_2g;
63443fab30f7STamizh chelvam 	u32 pmf;
6345bc1efd73SSebastian Gottschall 	u32 bw160;
63463fab30f7STamizh chelvam };
63473fab30f7STamizh chelvam 
63483fab30f7STamizh chelvam enum wmi_peer_flags {
63493fab30f7STamizh chelvam 	WMI_PEER_AUTH = 0x00000001,
63503fab30f7STamizh chelvam 	WMI_PEER_QOS = 0x00000002,
63513fab30f7STamizh chelvam 	WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
63523fab30f7STamizh chelvam 	WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
63533fab30f7STamizh chelvam 	WMI_PEER_APSD = 0x00000800,
63543fab30f7STamizh chelvam 	WMI_PEER_HT = 0x00001000,
63553fab30f7STamizh chelvam 	WMI_PEER_40MHZ = 0x00002000,
63563fab30f7STamizh chelvam 	WMI_PEER_STBC = 0x00008000,
63573fab30f7STamizh chelvam 	WMI_PEER_LDPC = 0x00010000,
63583fab30f7STamizh chelvam 	WMI_PEER_DYN_MIMOPS = 0x00020000,
63593fab30f7STamizh chelvam 	WMI_PEER_STATIC_MIMOPS = 0x00040000,
63603fab30f7STamizh chelvam 	WMI_PEER_SPATIAL_MUX = 0x00200000,
63613fab30f7STamizh chelvam 	WMI_PEER_VHT = 0x02000000,
63623fab30f7STamizh chelvam 	WMI_PEER_80MHZ = 0x04000000,
63633fab30f7STamizh chelvam 	WMI_PEER_VHT_2G = 0x08000000,
63643fab30f7STamizh chelvam 	WMI_PEER_PMF = 0x10000000,
6365bc1efd73SSebastian Gottschall 	WMI_PEER_160MHZ = 0x20000000
63663fab30f7STamizh chelvam };
63673fab30f7STamizh chelvam 
63683fab30f7STamizh chelvam enum wmi_10x_peer_flags {
63693fab30f7STamizh chelvam 	WMI_10X_PEER_AUTH = 0x00000001,
63703fab30f7STamizh chelvam 	WMI_10X_PEER_QOS = 0x00000002,
63713fab30f7STamizh chelvam 	WMI_10X_PEER_NEED_PTK_4_WAY = 0x00000004,
63723fab30f7STamizh chelvam 	WMI_10X_PEER_NEED_GTK_2_WAY = 0x00000010,
63733fab30f7STamizh chelvam 	WMI_10X_PEER_APSD = 0x00000800,
63743fab30f7STamizh chelvam 	WMI_10X_PEER_HT = 0x00001000,
63753fab30f7STamizh chelvam 	WMI_10X_PEER_40MHZ = 0x00002000,
63763fab30f7STamizh chelvam 	WMI_10X_PEER_STBC = 0x00008000,
63773fab30f7STamizh chelvam 	WMI_10X_PEER_LDPC = 0x00010000,
63783fab30f7STamizh chelvam 	WMI_10X_PEER_DYN_MIMOPS = 0x00020000,
63793fab30f7STamizh chelvam 	WMI_10X_PEER_STATIC_MIMOPS = 0x00040000,
63803fab30f7STamizh chelvam 	WMI_10X_PEER_SPATIAL_MUX = 0x00200000,
63813fab30f7STamizh chelvam 	WMI_10X_PEER_VHT = 0x02000000,
63823fab30f7STamizh chelvam 	WMI_10X_PEER_80MHZ = 0x04000000,
6383bc1efd73SSebastian Gottschall 	WMI_10X_PEER_160MHZ = 0x20000000
63843fab30f7STamizh chelvam };
63853fab30f7STamizh chelvam 
63863fab30f7STamizh chelvam enum wmi_10_2_peer_flags {
63873fab30f7STamizh chelvam 	WMI_10_2_PEER_AUTH = 0x00000001,
63883fab30f7STamizh chelvam 	WMI_10_2_PEER_QOS = 0x00000002,
63893fab30f7STamizh chelvam 	WMI_10_2_PEER_NEED_PTK_4_WAY = 0x00000004,
63903fab30f7STamizh chelvam 	WMI_10_2_PEER_NEED_GTK_2_WAY = 0x00000010,
63913fab30f7STamizh chelvam 	WMI_10_2_PEER_APSD = 0x00000800,
63923fab30f7STamizh chelvam 	WMI_10_2_PEER_HT = 0x00001000,
63933fab30f7STamizh chelvam 	WMI_10_2_PEER_40MHZ = 0x00002000,
63943fab30f7STamizh chelvam 	WMI_10_2_PEER_STBC = 0x00008000,
63953fab30f7STamizh chelvam 	WMI_10_2_PEER_LDPC = 0x00010000,
63963fab30f7STamizh chelvam 	WMI_10_2_PEER_DYN_MIMOPS = 0x00020000,
63973fab30f7STamizh chelvam 	WMI_10_2_PEER_STATIC_MIMOPS = 0x00040000,
63983fab30f7STamizh chelvam 	WMI_10_2_PEER_SPATIAL_MUX = 0x00200000,
63993fab30f7STamizh chelvam 	WMI_10_2_PEER_VHT = 0x02000000,
64003fab30f7STamizh chelvam 	WMI_10_2_PEER_80MHZ = 0x04000000,
64013fab30f7STamizh chelvam 	WMI_10_2_PEER_VHT_2G = 0x08000000,
64023fab30f7STamizh chelvam 	WMI_10_2_PEER_PMF = 0x10000000,
6403bc1efd73SSebastian Gottschall 	WMI_10_2_PEER_160MHZ = 0x20000000
64043fab30f7STamizh chelvam };
64055e3dd157SKalle Valo 
64065e3dd157SKalle Valo /*
64075e3dd157SKalle Valo  * Peer rate capabilities.
64085e3dd157SKalle Valo  *
64095e3dd157SKalle Valo  * This is of interest to the ratecontrol
64105e3dd157SKalle Valo  * module which resides in the firmware. The bit definitions are
64115e3dd157SKalle Valo  * consistent with that defined in if_athrate.c.
64125e3dd157SKalle Valo  */
64135e3dd157SKalle Valo #define WMI_RC_DS_FLAG          0x01
64145e3dd157SKalle Valo #define WMI_RC_CW40_FLAG        0x02
64155e3dd157SKalle Valo #define WMI_RC_SGI_FLAG         0x04
64165e3dd157SKalle Valo #define WMI_RC_HT_FLAG          0x08
64175e3dd157SKalle Valo #define WMI_RC_RTSCTS_FLAG      0x10
64185e3dd157SKalle Valo #define WMI_RC_TX_STBC_FLAG     0x20
64195e3dd157SKalle Valo #define WMI_RC_RX_STBC_FLAG     0xC0
64205e3dd157SKalle Valo #define WMI_RC_RX_STBC_FLAG_S   6
64215e3dd157SKalle Valo #define WMI_RC_WEP_TKIP_FLAG    0x100
64225e3dd157SKalle Valo #define WMI_RC_TS_FLAG          0x200
64235e3dd157SKalle Valo #define WMI_RC_UAPSD_FLAG       0x400
64245e3dd157SKalle Valo 
64255e3dd157SKalle Valo /* Maximum listen interval supported by hw in units of beacon interval */
64265e3dd157SKalle Valo #define ATH10K_MAX_HW_LISTEN_INTERVAL 5
64275e3dd157SKalle Valo 
642824c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd {
64295e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
64305e3dd157SKalle Valo 	__le32 vdev_id;
64315e3dd157SKalle Valo 	__le32 peer_new_assoc; /* 1=assoc, 0=reassoc */
64325e3dd157SKalle Valo 	__le32 peer_associd; /* 16 LSBs */
64335e3dd157SKalle Valo 	__le32 peer_flags;
64345e3dd157SKalle Valo 	__le32 peer_caps; /* 16 LSBs */
64355e3dd157SKalle Valo 	__le32 peer_listen_intval;
64365e3dd157SKalle Valo 	__le32 peer_ht_caps;
64375e3dd157SKalle Valo 	__le32 peer_max_mpdu;
64385e3dd157SKalle Valo 	__le32 peer_mpdu_density; /* 0..16 */
64395e3dd157SKalle Valo 	__le32 peer_rate_caps;
64405e3dd157SKalle Valo 	struct wmi_rate_set peer_legacy_rates;
64415e3dd157SKalle Valo 	struct wmi_rate_set peer_ht_rates;
64425e3dd157SKalle Valo 	__le32 peer_nss; /* num of spatial streams */
64435e3dd157SKalle Valo 	__le32 peer_vht_caps;
64445e3dd157SKalle Valo 	__le32 peer_phymode;
64455e3dd157SKalle Valo 	struct wmi_vht_rate_set peer_vht_rates;
644624c88f78SMichal Kazior };
644724c88f78SMichal Kazior 
644824c88f78SMichal Kazior struct wmi_main_peer_assoc_complete_cmd {
644924c88f78SMichal Kazior 	struct wmi_common_peer_assoc_complete_cmd cmd;
645024c88f78SMichal Kazior 
64515e3dd157SKalle Valo 	/* HT Operation Element of the peer. Five bytes packed in 2
645237ff1b0dSMarcin Rokicki 	 *  INT32 array and filled from lsb to msb.
645337ff1b0dSMarcin Rokicki 	 */
64545e3dd157SKalle Valo 	__le32 peer_ht_info[2];
64555e3dd157SKalle Valo } __packed;
64565e3dd157SKalle Valo 
645724c88f78SMichal Kazior struct wmi_10_1_peer_assoc_complete_cmd {
645824c88f78SMichal Kazior 	struct wmi_common_peer_assoc_complete_cmd cmd;
645924c88f78SMichal Kazior } __packed;
646024c88f78SMichal Kazior 
646124c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0
646224c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f
646324c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4
646424c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0
646524c88f78SMichal Kazior 
646624c88f78SMichal Kazior struct wmi_10_2_peer_assoc_complete_cmd {
646724c88f78SMichal Kazior 	struct wmi_common_peer_assoc_complete_cmd cmd;
646824c88f78SMichal Kazior 	__le32 info0; /* WMI_PEER_ASSOC_INFO0_ */
646924c88f78SMichal Kazior } __packed;
647024c88f78SMichal Kazior 
6471cc914a55SBen Greear #define PEER_BW_RXNSS_OVERRIDE_OFFSET  31
6472cc914a55SBen Greear 
6473b54e16f1SVasanthakumar Thiagarajan struct wmi_10_4_peer_assoc_complete_cmd {
6474b54e16f1SVasanthakumar Thiagarajan 	struct wmi_10_2_peer_assoc_complete_cmd cmd;
6475b54e16f1SVasanthakumar Thiagarajan 	__le32 peer_bw_rxnss_override;
6476b54e16f1SVasanthakumar Thiagarajan } __packed;
6477b54e16f1SVasanthakumar Thiagarajan 
64785e3dd157SKalle Valo struct wmi_peer_assoc_complete_arg {
64795e3dd157SKalle Valo 	u8 addr[ETH_ALEN];
64805e3dd157SKalle Valo 	u32 vdev_id;
64815e3dd157SKalle Valo 	bool peer_reassoc;
64825e3dd157SKalle Valo 	u16 peer_aid;
64835e3dd157SKalle Valo 	u32 peer_flags; /* see %WMI_PEER_ */
64845e3dd157SKalle Valo 	u16 peer_caps;
64855e3dd157SKalle Valo 	u32 peer_listen_intval;
64865e3dd157SKalle Valo 	u32 peer_ht_caps;
64875e3dd157SKalle Valo 	u32 peer_max_mpdu;
64885e3dd157SKalle Valo 	u32 peer_mpdu_density; /* 0..16 */
64895e3dd157SKalle Valo 	u32 peer_rate_caps; /* see %WMI_RC_ */
64905e3dd157SKalle Valo 	struct wmi_rate_set_arg peer_legacy_rates;
64915e3dd157SKalle Valo 	struct wmi_rate_set_arg peer_ht_rates;
64925e3dd157SKalle Valo 	u32 peer_num_spatial_streams;
64935e3dd157SKalle Valo 	u32 peer_vht_caps;
64945e3dd157SKalle Valo 	enum wmi_phy_mode peer_phymode;
64955e3dd157SKalle Valo 	struct wmi_vht_rate_set_arg peer_vht_rates;
6496cc914a55SBen Greear 	u32 peer_bw_rxnss_override;
64975e3dd157SKalle Valo };
64985e3dd157SKalle Valo 
64995e3dd157SKalle Valo struct wmi_peer_add_wds_entry_cmd {
65005e3dd157SKalle Valo 	/* peer MAC address */
65015e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
65025e3dd157SKalle Valo 	/* wds MAC addr */
65035e3dd157SKalle Valo 	struct wmi_mac_addr wds_macaddr;
65045e3dd157SKalle Valo } __packed;
65055e3dd157SKalle Valo 
65065e3dd157SKalle Valo struct wmi_peer_remove_wds_entry_cmd {
65075e3dd157SKalle Valo 	/* wds MAC addr */
65085e3dd157SKalle Valo 	struct wmi_mac_addr wds_macaddr;
65095e3dd157SKalle Valo } __packed;
65105e3dd157SKalle Valo 
65115e3dd157SKalle Valo struct wmi_peer_q_empty_callback_event {
65125e3dd157SKalle Valo 	/* peer MAC address */
65135e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
65145e3dd157SKalle Valo } __packed;
65155e3dd157SKalle Valo 
65165e3dd157SKalle Valo /*
65175e3dd157SKalle Valo  * Channel info WMI event
65185e3dd157SKalle Valo  */
65195e3dd157SKalle Valo struct wmi_chan_info_event {
65205e3dd157SKalle Valo 	__le32 err_code;
65215e3dd157SKalle Valo 	__le32 freq;
65225e3dd157SKalle Valo 	__le32 cmd_flags;
65235e3dd157SKalle Valo 	__le32 noise_floor;
65245e3dd157SKalle Valo 	__le32 rx_clear_count;
65255e3dd157SKalle Valo 	__le32 cycle_count;
652613104929SRakesh Pillai 	__le32 chan_tx_pwr_range;
652713104929SRakesh Pillai 	__le32 chan_tx_pwr_tp;
652813104929SRakesh Pillai 	__le32 rx_frame_count;
652913104929SRakesh Pillai 	__le32 my_bss_rx_cycle_count;
653013104929SRakesh Pillai 	__le32 rx_11b_mode_data_duration;
653113104929SRakesh Pillai 	__le32 tx_frame_cnt;
653213104929SRakesh Pillai 	__le32 mac_clk_mhz;
653313104929SRakesh Pillai 
65345e3dd157SKalle Valo } __packed;
65355e3dd157SKalle Valo 
6536b2297baaSRaja Mani struct wmi_10_4_chan_info_event {
6537b2297baaSRaja Mani 	__le32 err_code;
6538b2297baaSRaja Mani 	__le32 freq;
6539b2297baaSRaja Mani 	__le32 cmd_flags;
6540b2297baaSRaja Mani 	__le32 noise_floor;
6541b2297baaSRaja Mani 	__le32 rx_clear_count;
6542b2297baaSRaja Mani 	__le32 cycle_count;
6543b2297baaSRaja Mani 	__le32 chan_tx_pwr_range;
6544b2297baaSRaja Mani 	__le32 chan_tx_pwr_tp;
6545b2297baaSRaja Mani 	__le32 rx_frame_count;
6546b2297baaSRaja Mani } __packed;
6547b2297baaSRaja Mani 
65485a13e76eSKalle Valo struct wmi_peer_sta_kickout_event {
65495a13e76eSKalle Valo 	struct wmi_mac_addr peer_macaddr;
65505a13e76eSKalle Valo } __packed;
65515a13e76eSKalle Valo 
65522e1dea40SMichal Kazior #define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
65533d2a2e29SVasanthakumar Thiagarajan #define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1)
65542e1dea40SMichal Kazior 
65555e3dd157SKalle Valo /* Beacon filter wmi command info */
65565e3dd157SKalle Valo #define BCN_FLT_MAX_SUPPORTED_IES	256
65575e3dd157SKalle Valo #define BCN_FLT_MAX_ELEMS_IE_LIST	(BCN_FLT_MAX_SUPPORTED_IES / 32)
65585e3dd157SKalle Valo 
65595e3dd157SKalle Valo struct bss_bcn_stats {
65605e3dd157SKalle Valo 	__le32 vdev_id;
65615e3dd157SKalle Valo 	__le32 bss_bcnsdropped;
65625e3dd157SKalle Valo 	__le32 bss_bcnsdelivered;
65635e3dd157SKalle Valo } __packed;
65645e3dd157SKalle Valo 
65655e3dd157SKalle Valo struct bcn_filter_stats {
65665e3dd157SKalle Valo 	__le32 bcns_dropped;
65675e3dd157SKalle Valo 	__le32 bcns_delivered;
65685e3dd157SKalle Valo 	__le32 activefilters;
65695e3dd157SKalle Valo 	struct bss_bcn_stats bss_stats;
65705e3dd157SKalle Valo } __packed;
65715e3dd157SKalle Valo 
65725e3dd157SKalle Valo struct wmi_add_bcn_filter_cmd {
65735e3dd157SKalle Valo 	u32 vdev_id;
65745e3dd157SKalle Valo 	u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
65755e3dd157SKalle Valo } __packed;
65765e3dd157SKalle Valo 
65775e3dd157SKalle Valo enum wmi_sta_keepalive_method {
65785e3dd157SKalle Valo 	WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
65795e3dd157SKalle Valo 	WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2,
65805e3dd157SKalle Valo };
65815e3dd157SKalle Valo 
658246725b15SMichal Kazior #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
658346725b15SMichal Kazior 
658446725b15SMichal Kazior /* Firmware crashes if keepalive interval exceeds this limit */
658546725b15SMichal Kazior #define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff
658646725b15SMichal Kazior 
65875e3dd157SKalle Valo /* note: ip4 addresses are in network byte order, i.e. big endian */
65885e3dd157SKalle Valo struct wmi_sta_keepalive_arp_resp {
65895e3dd157SKalle Valo 	__be32 src_ip4_addr;
65905e3dd157SKalle Valo 	__be32 dest_ip4_addr;
65915e3dd157SKalle Valo 	struct wmi_mac_addr dest_mac_addr;
65925e3dd157SKalle Valo } __packed;
65935e3dd157SKalle Valo 
65945e3dd157SKalle Valo struct wmi_sta_keepalive_cmd {
65955e3dd157SKalle Valo 	__le32 vdev_id;
65965e3dd157SKalle Valo 	__le32 enabled;
65975e3dd157SKalle Valo 	__le32 method; /* WMI_STA_KEEPALIVE_METHOD_ */
65985e3dd157SKalle Valo 	__le32 interval; /* in seconds */
65995e3dd157SKalle Valo 	struct wmi_sta_keepalive_arp_resp arp_resp;
66005e3dd157SKalle Valo } __packed;
66015e3dd157SKalle Valo 
66026e8b188bSJanusz Dziedzic struct wmi_sta_keepalive_arg {
66036e8b188bSJanusz Dziedzic 	u32 vdev_id;
66046e8b188bSJanusz Dziedzic 	u32 enabled;
66056e8b188bSJanusz Dziedzic 	u32 method;
66066e8b188bSJanusz Dziedzic 	u32 interval;
66076e8b188bSJanusz Dziedzic 	__be32 src_ip4_addr;
66086e8b188bSJanusz Dziedzic 	__be32 dest_ip4_addr;
66096e8b188bSJanusz Dziedzic 	const u8 dest_mac_addr[ETH_ALEN];
66106e8b188bSJanusz Dziedzic };
66116e8b188bSJanusz Dziedzic 
66129cfbce75SMichal Kazior enum wmi_force_fw_hang_type {
66139cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_ASSERT = 1,
66149cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_NO_DETECT,
66159cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_CTRL_EP_FULL,
66169cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_EMPTY_POINT,
66179cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_STACK_OVERFLOW,
66189cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_INFINITE_LOOP,
66199cfbce75SMichal Kazior };
66209cfbce75SMichal Kazior 
66219cfbce75SMichal Kazior #define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF
66229cfbce75SMichal Kazior 
66239cfbce75SMichal Kazior struct wmi_force_fw_hang_cmd {
66249cfbce75SMichal Kazior 	__le32 type;
66259cfbce75SMichal Kazior 	__le32 delay_ms;
66269cfbce75SMichal Kazior } __packed;
66279cfbce75SMichal Kazior 
6628db251d7dSMaharaja Kennadyrajan enum wmi_pdev_reset_mode_type {
6629db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_TX_FLUSH = 1,
6630db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_WARM_RESET,
6631db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_COLD_RESET,
6632db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_WARM_RESET_RESTORE_CAL,
6633db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_COLD_RESET_RESTORE_CAL,
6634db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_MAX,
6635db251d7dSMaharaja Kennadyrajan };
6636db251d7dSMaharaja Kennadyrajan 
6637f118a3e5SKalle Valo enum ath10k_dbglog_level {
6638f118a3e5SKalle Valo 	ATH10K_DBGLOG_LEVEL_VERBOSE = 0,
6639f118a3e5SKalle Valo 	ATH10K_DBGLOG_LEVEL_INFO = 1,
6640f118a3e5SKalle Valo 	ATH10K_DBGLOG_LEVEL_WARN = 2,
6641f118a3e5SKalle Valo 	ATH10K_DBGLOG_LEVEL_ERR = 3,
6642f118a3e5SKalle Valo };
6643f118a3e5SKalle Valo 
6644f118a3e5SKalle Valo /* VAP ids to enable dbglog */
6645f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_VAP_LOG_LSB		0
6646f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_VAP_LOG_MASK		0x0000ffff
6647f118a3e5SKalle Valo 
6648f118a3e5SKalle Valo /* to enable dbglog in the firmware */
6649f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB	16
6650f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK	0x00010000
6651f118a3e5SKalle Valo 
6652f118a3e5SKalle Valo /* timestamp resolution */
6653f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_RESOLUTION_LSB	17
6654f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_RESOLUTION_MASK	0x000E0000
6655f118a3e5SKalle Valo 
6656f118a3e5SKalle Valo /* number of queued messages before sending them to the host */
6657f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB	20
6658f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK	0x0ff00000
6659f118a3e5SKalle Valo 
6660f118a3e5SKalle Valo /*
6661f118a3e5SKalle Valo  * Log levels to enable. This defines the minimum level to enable, this is
6662f118a3e5SKalle Valo  * not a bitmask. See enum ath10k_dbglog_level for the values.
6663f118a3e5SKalle Valo  */
6664f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_LOG_LVL_LSB		28
6665f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_LOG_LVL_MASK		0x70000000
6666f118a3e5SKalle Valo 
6667f118a3e5SKalle Valo /*
6668f118a3e5SKalle Valo  * Note: this is a cleaned up version of a struct firmware uses. For
6669f118a3e5SKalle Valo  * example, config_valid was hidden inside an array.
6670f118a3e5SKalle Valo  */
6671f118a3e5SKalle Valo struct wmi_dbglog_cfg_cmd {
6672f118a3e5SKalle Valo 	/* bitmask to hold mod id config*/
6673f118a3e5SKalle Valo 	__le32 module_enable;
6674f118a3e5SKalle Valo 
6675f118a3e5SKalle Valo 	/* see ATH10K_DBGLOG_CFG_ */
6676f118a3e5SKalle Valo 	__le32 config_enable;
6677f118a3e5SKalle Valo 
6678f118a3e5SKalle Valo 	/* mask of module id bits to be changed */
6679f118a3e5SKalle Valo 	__le32 module_valid;
6680f118a3e5SKalle Valo 
6681f118a3e5SKalle Valo 	/* mask of config bits to be changed, see ATH10K_DBGLOG_CFG_ */
6682f118a3e5SKalle Valo 	__le32 config_valid;
6683f118a3e5SKalle Valo } __packed;
6684f118a3e5SKalle Valo 
6685afcbc82cSMaharaja Kennadyrajan struct wmi_10_4_dbglog_cfg_cmd {
6686afcbc82cSMaharaja Kennadyrajan 	/* bitmask to hold mod id config*/
6687afcbc82cSMaharaja Kennadyrajan 	__le64 module_enable;
6688afcbc82cSMaharaja Kennadyrajan 
6689afcbc82cSMaharaja Kennadyrajan 	/* see ATH10K_DBGLOG_CFG_ */
6690afcbc82cSMaharaja Kennadyrajan 	__le32 config_enable;
6691afcbc82cSMaharaja Kennadyrajan 
6692afcbc82cSMaharaja Kennadyrajan 	/* mask of module id bits to be changed */
6693afcbc82cSMaharaja Kennadyrajan 	__le64 module_valid;
6694afcbc82cSMaharaja Kennadyrajan 
6695afcbc82cSMaharaja Kennadyrajan 	/* mask of config bits to be changed, see ATH10K_DBGLOG_CFG_ */
6696afcbc82cSMaharaja Kennadyrajan 	__le32 config_valid;
6697afcbc82cSMaharaja Kennadyrajan } __packed;
6698afcbc82cSMaharaja Kennadyrajan 
6699c1a4654aSMichal Kazior enum wmi_roam_reason {
6700c1a4654aSMichal Kazior 	WMI_ROAM_REASON_BETTER_AP = 1,
6701c1a4654aSMichal Kazior 	WMI_ROAM_REASON_BEACON_MISS = 2,
6702c1a4654aSMichal Kazior 	WMI_ROAM_REASON_LOW_RSSI = 3,
6703c1a4654aSMichal Kazior 	WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
6704c1a4654aSMichal Kazior 	WMI_ROAM_REASON_HO_FAILED = 5,
6705c1a4654aSMichal Kazior 
6706c1a4654aSMichal Kazior 	/* keep last */
6707c1a4654aSMichal Kazior 	WMI_ROAM_REASON_MAX,
6708c1a4654aSMichal Kazior };
6709c1a4654aSMichal Kazior 
6710c1a4654aSMichal Kazior struct wmi_roam_ev {
6711c1a4654aSMichal Kazior 	__le32 vdev_id;
6712c1a4654aSMichal Kazior 	__le32 reason;
6713c1a4654aSMichal Kazior } __packed;
6714c1a4654aSMichal Kazior 
67155e3dd157SKalle Valo #define ATH10K_FRAGMT_THRESHOLD_MIN	540
67165e3dd157SKalle Valo #define ATH10K_FRAGMT_THRESHOLD_MAX	2346
67175e3dd157SKalle Valo 
67185e3dd157SKalle Valo #define WMI_MAX_EVENT 0x1000
67195e3dd157SKalle Valo /* Maximum number of pending TXed WMI packets */
67205e3dd157SKalle Valo #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
67215e3dd157SKalle Valo 
67225e3dd157SKalle Valo /* By default disable power save for IBSS */
67235e3dd157SKalle Valo #define ATH10K_DEFAULT_ATIM 0
67245e3dd157SKalle Valo 
67255c01aa3dSMichal Kazior #define WMI_MAX_MEM_REQS 16
67265c01aa3dSMichal Kazior 
672732653cf1SMichal Kazior struct wmi_scan_ev_arg {
672832653cf1SMichal Kazior 	__le32 event_type; /* %WMI_SCAN_EVENT_ */
672932653cf1SMichal Kazior 	__le32 reason; /* %WMI_SCAN_REASON_ */
673032653cf1SMichal Kazior 	__le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
673132653cf1SMichal Kazior 	__le32 scan_req_id;
673232653cf1SMichal Kazior 	__le32 scan_id;
673332653cf1SMichal Kazior 	__le32 vdev_id;
673432653cf1SMichal Kazior };
673532653cf1SMichal Kazior 
67364b816f17SAbhishek Ambure struct mgmt_tx_compl_params {
67374b816f17SAbhishek Ambure 	u32 desc_id;
67384b816f17SAbhishek Ambure 	u32 status;
67394b816f17SAbhishek Ambure 	u32 ppdu_id;
67404b816f17SAbhishek Ambure 	int ack_rssi;
67414b816f17SAbhishek Ambure };
67424b816f17SAbhishek Ambure 
6743dc405152SRakesh Pillai struct wmi_tlv_mgmt_tx_compl_ev_arg {
6744dc405152SRakesh Pillai 	__le32 desc_id;
6745dc405152SRakesh Pillai 	__le32 status;
6746dc405152SRakesh Pillai 	__le32 pdev_id;
67474b816f17SAbhishek Ambure 	__le32 ppdu_id;
67484b816f17SAbhishek Ambure 	__le32 ack_rssi;
6749dc405152SRakesh Pillai };
6750dc405152SRakesh Pillai 
6751cc123facSRakesh Pillai struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg {
6752cc123facSRakesh Pillai 	__le32 num_reports;
6753cc123facSRakesh Pillai 	const __le32 *desc_ids;
6754cc123facSRakesh Pillai 	const __le32 *status;
67554b816f17SAbhishek Ambure 	const __le32 *ppdu_ids;
67564b816f17SAbhishek Ambure 	const __le32 *ack_rssi;
6757cc123facSRakesh Pillai };
6758cc123facSRakesh Pillai 
675932653cf1SMichal Kazior struct wmi_mgmt_rx_ev_arg {
676032653cf1SMichal Kazior 	__le32 channel;
676132653cf1SMichal Kazior 	__le32 snr;
676232653cf1SMichal Kazior 	__le32 rate;
676332653cf1SMichal Kazior 	__le32 phy_mode;
676432653cf1SMichal Kazior 	__le32 buf_len;
676532653cf1SMichal Kazior 	__le32 status; /* %WMI_RX_STATUS_ */
67668d130963SPeter Oh 	struct wmi_mgmt_rx_ext_info ext_info;
676732653cf1SMichal Kazior };
676832653cf1SMichal Kazior 
676932653cf1SMichal Kazior struct wmi_ch_info_ev_arg {
677032653cf1SMichal Kazior 	__le32 err_code;
677132653cf1SMichal Kazior 	__le32 freq;
677232653cf1SMichal Kazior 	__le32 cmd_flags;
677332653cf1SMichal Kazior 	__le32 noise_floor;
677432653cf1SMichal Kazior 	__le32 rx_clear_count;
677532653cf1SMichal Kazior 	__le32 cycle_count;
6776b2297baaSRaja Mani 	__le32 chan_tx_pwr_range;
6777b2297baaSRaja Mani 	__le32 chan_tx_pwr_tp;
6778b2297baaSRaja Mani 	__le32 rx_frame_count;
677913104929SRakesh Pillai 	__le32 my_bss_rx_cycle_count;
678013104929SRakesh Pillai 	__le32 rx_11b_mode_data_duration;
678113104929SRakesh Pillai 	__le32 tx_frame_cnt;
678213104929SRakesh Pillai 	__le32 mac_clk_mhz;
678332653cf1SMichal Kazior };
678432653cf1SMichal Kazior 
6785833fd34dSBen Greear /* From 10.4 firmware, not sure all have the same values. */
6786833fd34dSBen Greear enum wmi_vdev_start_status {
6787833fd34dSBen Greear 	WMI_VDEV_START_OK = 0,
6788833fd34dSBen Greear 	WMI_VDEV_START_CHAN_INVALID,
6789833fd34dSBen Greear };
6790833fd34dSBen Greear 
679132653cf1SMichal Kazior struct wmi_vdev_start_ev_arg {
679232653cf1SMichal Kazior 	__le32 vdev_id;
679332653cf1SMichal Kazior 	__le32 req_id;
679432653cf1SMichal Kazior 	__le32 resp_type; /* %WMI_VDEV_RESP_ */
6795833fd34dSBen Greear 	__le32 status; /* See wmi_vdev_start_status enum above */
679632653cf1SMichal Kazior };
679732653cf1SMichal Kazior 
679832653cf1SMichal Kazior struct wmi_peer_kick_ev_arg {
679932653cf1SMichal Kazior 	const u8 *mac_addr;
680032653cf1SMichal Kazior };
680132653cf1SMichal Kazior 
680232653cf1SMichal Kazior struct wmi_swba_ev_arg {
680332653cf1SMichal Kazior 	__le32 vdev_map;
6804a03fee34SRaja Mani 	struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV];
680532653cf1SMichal Kazior 	const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV];
680632653cf1SMichal Kazior };
680732653cf1SMichal Kazior 
680832653cf1SMichal Kazior struct wmi_phyerr_ev_arg {
6809991adf71SRaja Mani 	u32 tsf_timestamp;
6810991adf71SRaja Mani 	u16 freq1;
6811991adf71SRaja Mani 	u16 freq2;
6812991adf71SRaja Mani 	u8 rssi_combined;
6813991adf71SRaja Mani 	u8 chan_width_mhz;
6814991adf71SRaja Mani 	u8 phy_err_code;
6815991adf71SRaja Mani 	u16 nf_chains[4];
6816991adf71SRaja Mani 	u32 buf_len;
6817991adf71SRaja Mani 	const u8 *buf;
6818991adf71SRaja Mani 	u8 hdr_len;
6819991adf71SRaja Mani };
6820991adf71SRaja Mani 
6821991adf71SRaja Mani struct wmi_phyerr_hdr_arg {
6822991adf71SRaja Mani 	u32 num_phyerrs;
6823991adf71SRaja Mani 	u32 tsf_l32;
6824991adf71SRaja Mani 	u32 tsf_u32;
6825991adf71SRaja Mani 	u32 buf_len;
6826991adf71SRaja Mani 	const void *phyerrs;
682732653cf1SMichal Kazior };
682832653cf1SMichal Kazior 
68296f6eb1bcSSriram R struct wmi_dfs_status_ev_arg {
68306f6eb1bcSSriram R 	u32 status;
68316f6eb1bcSSriram R };
68326f6eb1bcSSriram R 
68335c01aa3dSMichal Kazior struct wmi_svc_rdy_ev_arg {
68345c01aa3dSMichal Kazior 	__le32 min_tx_power;
68355c01aa3dSMichal Kazior 	__le32 max_tx_power;
68365c01aa3dSMichal Kazior 	__le32 ht_cap;
68375c01aa3dSMichal Kazior 	__le32 vht_cap;
68385c01aa3dSMichal Kazior 	__le32 sw_ver0;
68395c01aa3dSMichal Kazior 	__le32 sw_ver1;
6840ca996ec5SMichal Kazior 	__le32 fw_build;
68415c01aa3dSMichal Kazior 	__le32 phy_capab;
68425c01aa3dSMichal Kazior 	__le32 num_rf_chains;
68435c01aa3dSMichal Kazior 	__le32 eeprom_rd;
68445c01aa3dSMichal Kazior 	__le32 num_mem_reqs;
6845523f6701STamizh chelvam 	__le32 low_5ghz_chan;
6846523f6701STamizh chelvam 	__le32 high_5ghz_chan;
68475c01aa3dSMichal Kazior 	const __le32 *service_map;
68482a3e60d3SMichal Kazior 	size_t service_map_len;
68495c01aa3dSMichal Kazior 	const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
68505c01aa3dSMichal Kazior };
68515c01aa3dSMichal Kazior 
6852cea19a6cSCarl Huang struct wmi_svc_avail_ev_arg {
6853cea19a6cSCarl Huang 	__le32 service_map_ext_len;
6854cea19a6cSCarl Huang 	const __le32 *service_map_ext;
6855cea19a6cSCarl Huang };
6856cea19a6cSCarl Huang 
685732653cf1SMichal Kazior struct wmi_rdy_ev_arg {
685832653cf1SMichal Kazior 	__le32 sw_version;
685932653cf1SMichal Kazior 	__le32 abi_version;
686032653cf1SMichal Kazior 	__le32 status;
686132653cf1SMichal Kazior 	const u8 *mac_addr;
686232653cf1SMichal Kazior };
686332653cf1SMichal Kazior 
6864c1a4654aSMichal Kazior struct wmi_roam_ev_arg {
6865c1a4654aSMichal Kazior 	__le32 vdev_id;
6866c1a4654aSMichal Kazior 	__le32 reason;
6867c1a4654aSMichal Kazior 	__le32 rssi;
6868c1a4654aSMichal Kazior };
6869c1a4654aSMichal Kazior 
687084d4911bSMichal Kazior struct wmi_echo_ev_arg {
687184d4911bSMichal Kazior 	__le32 value;
687284d4911bSMichal Kazior };
687384d4911bSMichal Kazior 
6874a57a6a27SRajkumar Manoharan struct wmi_pdev_temperature_event {
6875a57a6a27SRajkumar Manoharan 	/* temperature value in Celcius degree */
6876a57a6a27SRajkumar Manoharan 	__le32 temperature;
6877a57a6a27SRajkumar Manoharan } __packed;
6878a57a6a27SRajkumar Manoharan 
687989d2d183SRajkumar Manoharan struct wmi_pdev_bss_chan_info_event {
688089d2d183SRajkumar Manoharan 	__le32 freq;
688189d2d183SRajkumar Manoharan 	__le32 noise_floor;
688289d2d183SRajkumar Manoharan 	__le64 cycle_busy;
688389d2d183SRajkumar Manoharan 	__le64 cycle_total;
688489d2d183SRajkumar Manoharan 	__le64 cycle_tx;
688589d2d183SRajkumar Manoharan 	__le64 cycle_rx;
688689d2d183SRajkumar Manoharan 	__le64 cycle_rx_bss;
688789d2d183SRajkumar Manoharan 	__le32 reserved;
688889d2d183SRajkumar Manoharan } __packed;
688989d2d183SRajkumar Manoharan 
6890f5431e87SJanusz Dziedzic /* WOW structures */
6891f5431e87SJanusz Dziedzic enum wmi_wow_wakeup_event {
6892f5431e87SJanusz Dziedzic 	WOW_BMISS_EVENT = 0,
6893f5431e87SJanusz Dziedzic 	WOW_BETTER_AP_EVENT,
6894f5431e87SJanusz Dziedzic 	WOW_DEAUTH_RECVD_EVENT,
6895f5431e87SJanusz Dziedzic 	WOW_MAGIC_PKT_RECVD_EVENT,
6896f5431e87SJanusz Dziedzic 	WOW_GTK_ERR_EVENT,
6897f5431e87SJanusz Dziedzic 	WOW_FOURWAY_HSHAKE_EVENT,
6898f5431e87SJanusz Dziedzic 	WOW_EAPOL_RECVD_EVENT,
6899f5431e87SJanusz Dziedzic 	WOW_NLO_DETECTED_EVENT,
6900f5431e87SJanusz Dziedzic 	WOW_DISASSOC_RECVD_EVENT,
6901f5431e87SJanusz Dziedzic 	WOW_PATTERN_MATCH_EVENT,
6902f5431e87SJanusz Dziedzic 	WOW_CSA_IE_EVENT,
6903f5431e87SJanusz Dziedzic 	WOW_PROBE_REQ_WPS_IE_EVENT,
6904f5431e87SJanusz Dziedzic 	WOW_AUTH_REQ_EVENT,
6905f5431e87SJanusz Dziedzic 	WOW_ASSOC_REQ_EVENT,
6906f5431e87SJanusz Dziedzic 	WOW_HTT_EVENT,
6907f5431e87SJanusz Dziedzic 	WOW_RA_MATCH_EVENT,
6908f5431e87SJanusz Dziedzic 	WOW_HOST_AUTO_SHUTDOWN_EVENT,
6909f5431e87SJanusz Dziedzic 	WOW_IOAC_MAGIC_EVENT,
6910f5431e87SJanusz Dziedzic 	WOW_IOAC_SHORT_EVENT,
6911f5431e87SJanusz Dziedzic 	WOW_IOAC_EXTEND_EVENT,
6912f5431e87SJanusz Dziedzic 	WOW_IOAC_TIMER_EVENT,
6913f5431e87SJanusz Dziedzic 	WOW_DFS_PHYERR_RADAR_EVENT,
6914f5431e87SJanusz Dziedzic 	WOW_BEACON_EVENT,
6915f5431e87SJanusz Dziedzic 	WOW_CLIENT_KICKOUT_EVENT,
6916f5431e87SJanusz Dziedzic 	WOW_EVENT_MAX,
6917f5431e87SJanusz Dziedzic };
6918f5431e87SJanusz Dziedzic 
6919f5431e87SJanusz Dziedzic #define C2S(x) case x: return #x
6920f5431e87SJanusz Dziedzic 
6921f5431e87SJanusz Dziedzic static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
6922f5431e87SJanusz Dziedzic {
6923f5431e87SJanusz Dziedzic 	switch (ev) {
6924f5431e87SJanusz Dziedzic 	C2S(WOW_BMISS_EVENT);
6925f5431e87SJanusz Dziedzic 	C2S(WOW_BETTER_AP_EVENT);
6926f5431e87SJanusz Dziedzic 	C2S(WOW_DEAUTH_RECVD_EVENT);
6927f5431e87SJanusz Dziedzic 	C2S(WOW_MAGIC_PKT_RECVD_EVENT);
6928f5431e87SJanusz Dziedzic 	C2S(WOW_GTK_ERR_EVENT);
6929f5431e87SJanusz Dziedzic 	C2S(WOW_FOURWAY_HSHAKE_EVENT);
6930f5431e87SJanusz Dziedzic 	C2S(WOW_EAPOL_RECVD_EVENT);
6931f5431e87SJanusz Dziedzic 	C2S(WOW_NLO_DETECTED_EVENT);
6932f5431e87SJanusz Dziedzic 	C2S(WOW_DISASSOC_RECVD_EVENT);
6933f5431e87SJanusz Dziedzic 	C2S(WOW_PATTERN_MATCH_EVENT);
6934f5431e87SJanusz Dziedzic 	C2S(WOW_CSA_IE_EVENT);
6935f5431e87SJanusz Dziedzic 	C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
6936f5431e87SJanusz Dziedzic 	C2S(WOW_AUTH_REQ_EVENT);
6937f5431e87SJanusz Dziedzic 	C2S(WOW_ASSOC_REQ_EVENT);
6938f5431e87SJanusz Dziedzic 	C2S(WOW_HTT_EVENT);
6939f5431e87SJanusz Dziedzic 	C2S(WOW_RA_MATCH_EVENT);
6940f5431e87SJanusz Dziedzic 	C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
6941f5431e87SJanusz Dziedzic 	C2S(WOW_IOAC_MAGIC_EVENT);
6942f5431e87SJanusz Dziedzic 	C2S(WOW_IOAC_SHORT_EVENT);
6943f5431e87SJanusz Dziedzic 	C2S(WOW_IOAC_EXTEND_EVENT);
6944f5431e87SJanusz Dziedzic 	C2S(WOW_IOAC_TIMER_EVENT);
6945f5431e87SJanusz Dziedzic 	C2S(WOW_DFS_PHYERR_RADAR_EVENT);
6946f5431e87SJanusz Dziedzic 	C2S(WOW_BEACON_EVENT);
6947f5431e87SJanusz Dziedzic 	C2S(WOW_CLIENT_KICKOUT_EVENT);
6948f5431e87SJanusz Dziedzic 	C2S(WOW_EVENT_MAX);
6949f5431e87SJanusz Dziedzic 	default:
6950f5431e87SJanusz Dziedzic 		return NULL;
6951f5431e87SJanusz Dziedzic 	}
6952f5431e87SJanusz Dziedzic }
6953f5431e87SJanusz Dziedzic 
6954f5431e87SJanusz Dziedzic enum wmi_wow_wake_reason {
6955f5431e87SJanusz Dziedzic 	WOW_REASON_UNSPECIFIED = -1,
6956f5431e87SJanusz Dziedzic 	WOW_REASON_NLOD = 0,
6957f5431e87SJanusz Dziedzic 	WOW_REASON_AP_ASSOC_LOST,
6958f5431e87SJanusz Dziedzic 	WOW_REASON_LOW_RSSI,
6959f5431e87SJanusz Dziedzic 	WOW_REASON_DEAUTH_RECVD,
6960f5431e87SJanusz Dziedzic 	WOW_REASON_DISASSOC_RECVD,
6961f5431e87SJanusz Dziedzic 	WOW_REASON_GTK_HS_ERR,
6962f5431e87SJanusz Dziedzic 	WOW_REASON_EAP_REQ,
6963f5431e87SJanusz Dziedzic 	WOW_REASON_FOURWAY_HS_RECV,
6964f5431e87SJanusz Dziedzic 	WOW_REASON_TIMER_INTR_RECV,
6965f5431e87SJanusz Dziedzic 	WOW_REASON_PATTERN_MATCH_FOUND,
6966f5431e87SJanusz Dziedzic 	WOW_REASON_RECV_MAGIC_PATTERN,
6967f5431e87SJanusz Dziedzic 	WOW_REASON_P2P_DISC,
6968f5431e87SJanusz Dziedzic 	WOW_REASON_WLAN_HB,
6969f5431e87SJanusz Dziedzic 	WOW_REASON_CSA_EVENT,
6970f5431e87SJanusz Dziedzic 	WOW_REASON_PROBE_REQ_WPS_IE_RECV,
6971f5431e87SJanusz Dziedzic 	WOW_REASON_AUTH_REQ_RECV,
6972f5431e87SJanusz Dziedzic 	WOW_REASON_ASSOC_REQ_RECV,
6973f5431e87SJanusz Dziedzic 	WOW_REASON_HTT_EVENT,
6974f5431e87SJanusz Dziedzic 	WOW_REASON_RA_MATCH,
6975f5431e87SJanusz Dziedzic 	WOW_REASON_HOST_AUTO_SHUTDOWN,
6976f5431e87SJanusz Dziedzic 	WOW_REASON_IOAC_MAGIC_EVENT,
6977f5431e87SJanusz Dziedzic 	WOW_REASON_IOAC_SHORT_EVENT,
6978f5431e87SJanusz Dziedzic 	WOW_REASON_IOAC_EXTEND_EVENT,
6979f5431e87SJanusz Dziedzic 	WOW_REASON_IOAC_TIMER_EVENT,
6980f5431e87SJanusz Dziedzic 	WOW_REASON_ROAM_HO,
6981f5431e87SJanusz Dziedzic 	WOW_REASON_DFS_PHYERR_RADADR_EVENT,
6982f5431e87SJanusz Dziedzic 	WOW_REASON_BEACON_RECV,
6983f5431e87SJanusz Dziedzic 	WOW_REASON_CLIENT_KICKOUT_EVENT,
6984f5431e87SJanusz Dziedzic 	WOW_REASON_DEBUG_TEST = 0xFF,
6985f5431e87SJanusz Dziedzic };
6986f5431e87SJanusz Dziedzic 
6987f5431e87SJanusz Dziedzic static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
6988f5431e87SJanusz Dziedzic {
6989f5431e87SJanusz Dziedzic 	switch (reason) {
6990f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_UNSPECIFIED);
6991f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_NLOD);
6992f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_AP_ASSOC_LOST);
6993f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_LOW_RSSI);
6994f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_DEAUTH_RECVD);
6995f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_DISASSOC_RECVD);
6996f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_GTK_HS_ERR);
6997f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_EAP_REQ);
6998f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_FOURWAY_HS_RECV);
6999f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_TIMER_INTR_RECV);
7000f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_PATTERN_MATCH_FOUND);
7001f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_RECV_MAGIC_PATTERN);
7002f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_P2P_DISC);
7003f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_WLAN_HB);
7004f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_CSA_EVENT);
7005f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
7006f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_AUTH_REQ_RECV);
7007f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_ASSOC_REQ_RECV);
7008f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_HTT_EVENT);
7009f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_RA_MATCH);
7010f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
7011f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_IOAC_MAGIC_EVENT);
7012f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_IOAC_SHORT_EVENT);
7013f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_IOAC_EXTEND_EVENT);
7014f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_IOAC_TIMER_EVENT);
7015f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_ROAM_HO);
7016f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
7017f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_BEACON_RECV);
7018f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
7019f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_DEBUG_TEST);
7020f5431e87SJanusz Dziedzic 	default:
7021f5431e87SJanusz Dziedzic 		return NULL;
7022f5431e87SJanusz Dziedzic 	}
7023f5431e87SJanusz Dziedzic }
7024f5431e87SJanusz Dziedzic 
7025f5431e87SJanusz Dziedzic #undef C2S
7026f5431e87SJanusz Dziedzic 
7027f5431e87SJanusz Dziedzic struct wmi_wow_ev_arg {
7028f5431e87SJanusz Dziedzic 	u32 vdev_id;
7029f5431e87SJanusz Dziedzic 	u32 flag;
7030f5431e87SJanusz Dziedzic 	enum wmi_wow_wake_reason wake_reason;
7031f5431e87SJanusz Dziedzic 	u32 data_len;
7032f5431e87SJanusz Dziedzic };
7033f5431e87SJanusz Dziedzic 
703425c86619SJanusz Dziedzic #define WOW_MIN_PATTERN_SIZE	1
703525c86619SJanusz Dziedzic #define WOW_MAX_PATTERN_SIZE	148
703625c86619SJanusz Dziedzic #define WOW_MAX_PKT_OFFSET	128
7037fa3440faSWen Gong #define WOW_HDR_LEN	(sizeof(struct ieee80211_hdr_3addr) + \
7038fa3440faSWen Gong 	sizeof(struct rfc1042_hdr))
7039fa3440faSWen Gong #define WOW_MAX_REDUCE	(WOW_HDR_LEN - sizeof(struct ethhdr) - \
7040fa3440faSWen Gong 	offsetof(struct ieee80211_hdr_3addr, addr1))
704125c86619SJanusz Dziedzic 
7042ad45c888SMarek Puzyniak enum wmi_tdls_state {
7043ad45c888SMarek Puzyniak 	WMI_TDLS_DISABLE,
7044ad45c888SMarek Puzyniak 	WMI_TDLS_ENABLE_PASSIVE,
7045ad45c888SMarek Puzyniak 	WMI_TDLS_ENABLE_ACTIVE,
70464c9f8d11SYingying Tang 	WMI_TDLS_ENABLE_ACTIVE_EXTERNAL_CONTROL,
7047ad45c888SMarek Puzyniak };
7048ad45c888SMarek Puzyniak 
7049ad45c888SMarek Puzyniak enum wmi_tdls_peer_state {
7050ad45c888SMarek Puzyniak 	WMI_TDLS_PEER_STATE_PEERING,
7051ad45c888SMarek Puzyniak 	WMI_TDLS_PEER_STATE_CONNECTED,
7052ad45c888SMarek Puzyniak 	WMI_TDLS_PEER_STATE_TEARDOWN,
7053ad45c888SMarek Puzyniak };
7054ad45c888SMarek Puzyniak 
7055ad45c888SMarek Puzyniak struct wmi_tdls_peer_update_cmd_arg {
7056ad45c888SMarek Puzyniak 	u32 vdev_id;
7057ad45c888SMarek Puzyniak 	enum wmi_tdls_peer_state peer_state;
7058ad45c888SMarek Puzyniak 	u8 addr[ETH_ALEN];
7059ad45c888SMarek Puzyniak };
7060ad45c888SMarek Puzyniak 
7061ad45c888SMarek Puzyniak #define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32
7062ad45c888SMarek Puzyniak 
7063add6cd8dSManikanta Pubbisetty #define WMI_TDLS_PEER_SP_MASK	0x60
7064add6cd8dSManikanta Pubbisetty #define WMI_TDLS_PEER_SP_LSB	5
7065add6cd8dSManikanta Pubbisetty 
7066add6cd8dSManikanta Pubbisetty enum wmi_tdls_options {
7067add6cd8dSManikanta Pubbisetty 	WMI_TDLS_OFFCHAN_EN = BIT(0),
7068add6cd8dSManikanta Pubbisetty 	WMI_TDLS_BUFFER_STA_EN = BIT(1),
7069add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SLEEP_STA_EN = BIT(2),
7070add6cd8dSManikanta Pubbisetty };
7071add6cd8dSManikanta Pubbisetty 
7072add6cd8dSManikanta Pubbisetty enum {
7073add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_QOS_AC_VO = BIT(0),
7074add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_QOS_AC_VI = BIT(1),
7075add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_QOS_AC_BK = BIT(2),
7076add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_QOS_AC_BE = BIT(3),
7077add6cd8dSManikanta Pubbisetty };
7078add6cd8dSManikanta Pubbisetty 
7079ad45c888SMarek Puzyniak struct wmi_tdls_peer_capab_arg {
7080ad45c888SMarek Puzyniak 	u8 peer_uapsd_queues;
7081ad45c888SMarek Puzyniak 	u8 peer_max_sp;
7082ad45c888SMarek Puzyniak 	u32 buff_sta_support;
7083ad45c888SMarek Puzyniak 	u32 off_chan_support;
7084ad45c888SMarek Puzyniak 	u32 peer_curr_operclass;
7085ad45c888SMarek Puzyniak 	u32 self_curr_operclass;
7086ad45c888SMarek Puzyniak 	u32 peer_chan_len;
7087ad45c888SMarek Puzyniak 	u32 peer_operclass_len;
7088ad45c888SMarek Puzyniak 	u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
7089ad45c888SMarek Puzyniak 	u32 is_peer_responder;
7090ad45c888SMarek Puzyniak 	u32 pref_offchan_num;
7091ad45c888SMarek Puzyniak 	u32 pref_offchan_bw;
7092ad45c888SMarek Puzyniak };
7093ad45c888SMarek Puzyniak 
7094add6cd8dSManikanta Pubbisetty struct wmi_10_4_tdls_set_state_cmd {
7095add6cd8dSManikanta Pubbisetty 	__le32 vdev_id;
7096add6cd8dSManikanta Pubbisetty 	__le32 state;
7097add6cd8dSManikanta Pubbisetty 	__le32 notification_interval_ms;
7098add6cd8dSManikanta Pubbisetty 	__le32 tx_discovery_threshold;
7099add6cd8dSManikanta Pubbisetty 	__le32 tx_teardown_threshold;
7100add6cd8dSManikanta Pubbisetty 	__le32 rssi_teardown_threshold;
7101add6cd8dSManikanta Pubbisetty 	__le32 rssi_delta;
7102add6cd8dSManikanta Pubbisetty 	__le32 tdls_options;
7103add6cd8dSManikanta Pubbisetty 	__le32 tdls_peer_traffic_ind_window;
7104add6cd8dSManikanta Pubbisetty 	__le32 tdls_peer_traffic_response_timeout_ms;
7105add6cd8dSManikanta Pubbisetty 	__le32 tdls_puapsd_mask;
7106add6cd8dSManikanta Pubbisetty 	__le32 tdls_puapsd_inactivity_time_ms;
7107add6cd8dSManikanta Pubbisetty 	__le32 tdls_puapsd_rx_frame_threshold;
7108add6cd8dSManikanta Pubbisetty 	__le32 teardown_notification_ms;
7109add6cd8dSManikanta Pubbisetty 	__le32 tdls_peer_kickout_threshold;
7110add6cd8dSManikanta Pubbisetty } __packed;
7111add6cd8dSManikanta Pubbisetty 
7112add6cd8dSManikanta Pubbisetty struct wmi_tdls_peer_capabilities {
7113add6cd8dSManikanta Pubbisetty 	__le32 peer_qos;
7114add6cd8dSManikanta Pubbisetty 	__le32 buff_sta_support;
7115add6cd8dSManikanta Pubbisetty 	__le32 off_chan_support;
7116add6cd8dSManikanta Pubbisetty 	__le32 peer_curr_operclass;
7117add6cd8dSManikanta Pubbisetty 	__le32 self_curr_operclass;
7118add6cd8dSManikanta Pubbisetty 	__le32 peer_chan_len;
7119add6cd8dSManikanta Pubbisetty 	__le32 peer_operclass_len;
7120add6cd8dSManikanta Pubbisetty 	u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
7121add6cd8dSManikanta Pubbisetty 	__le32 is_peer_responder;
7122add6cd8dSManikanta Pubbisetty 	__le32 pref_offchan_num;
7123add6cd8dSManikanta Pubbisetty 	__le32 pref_offchan_bw;
7124add6cd8dSManikanta Pubbisetty 	struct wmi_channel peer_chan_list[1];
7125add6cd8dSManikanta Pubbisetty } __packed;
7126add6cd8dSManikanta Pubbisetty 
7127add6cd8dSManikanta Pubbisetty struct wmi_10_4_tdls_peer_update_cmd {
7128add6cd8dSManikanta Pubbisetty 	__le32 vdev_id;
7129add6cd8dSManikanta Pubbisetty 	struct wmi_mac_addr peer_macaddr;
7130add6cd8dSManikanta Pubbisetty 	__le32 peer_state;
7131add6cd8dSManikanta Pubbisetty 	__le32 reserved[4];
7132add6cd8dSManikanta Pubbisetty 	struct wmi_tdls_peer_capabilities peer_capab;
7133add6cd8dSManikanta Pubbisetty } __packed;
7134add6cd8dSManikanta Pubbisetty 
7135add6cd8dSManikanta Pubbisetty enum wmi_tdls_peer_reason {
7136add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_TX,
7137add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_RSSI,
7138add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_SCAN,
7139add6cd8dSManikanta Pubbisetty 	WMI_TDLS_DISCONNECTED_REASON_PEER_DELETE,
7140add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT,
7141add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_BAD_PTR,
7142add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE,
7143add6cd8dSManikanta Pubbisetty 	WMI_TDLS_ENTER_BUF_STA,
7144add6cd8dSManikanta Pubbisetty 	WMI_TDLS_EXIT_BUF_STA,
7145add6cd8dSManikanta Pubbisetty 	WMI_TDLS_ENTER_BT_BUSY_MODE,
7146add6cd8dSManikanta Pubbisetty 	WMI_TDLS_EXIT_BT_BUSY_MODE,
7147add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SCAN_STARTED_EVENT,
7148add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SCAN_COMPLETED_EVENT,
7149add6cd8dSManikanta Pubbisetty };
7150add6cd8dSManikanta Pubbisetty 
7151add6cd8dSManikanta Pubbisetty enum wmi_tdls_peer_notification {
7152add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SHOULD_DISCOVER,
7153add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SHOULD_TEARDOWN,
7154add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_DISCONNECTED,
7155add6cd8dSManikanta Pubbisetty 	WMI_TDLS_CONNECTION_TRACKER_NOTIFICATION,
7156add6cd8dSManikanta Pubbisetty };
7157add6cd8dSManikanta Pubbisetty 
7158add6cd8dSManikanta Pubbisetty struct wmi_tdls_peer_event {
7159add6cd8dSManikanta Pubbisetty 	struct wmi_mac_addr peer_macaddr;
7160add6cd8dSManikanta Pubbisetty 	/* see enum wmi_tdls_peer_notification*/
7161add6cd8dSManikanta Pubbisetty 	__le32 peer_status;
7162add6cd8dSManikanta Pubbisetty 	/* see enum wmi_tdls_peer_reason */
7163add6cd8dSManikanta Pubbisetty 	__le32 peer_reason;
7164add6cd8dSManikanta Pubbisetty 	__le32 vdev_id;
7165add6cd8dSManikanta Pubbisetty } __packed;
7166add6cd8dSManikanta Pubbisetty 
716708e75ea8SVivek Natarajan enum wmi_txbf_conf {
716808e75ea8SVivek Natarajan 	WMI_TXBF_CONF_UNSUPPORTED,
716908e75ea8SVivek Natarajan 	WMI_TXBF_CONF_BEFORE_ASSOC,
717008e75ea8SVivek Natarajan 	WMI_TXBF_CONF_AFTER_ASSOC,
717108e75ea8SVivek Natarajan };
717208e75ea8SVivek Natarajan 
717362f77f09SMaharaja #define	WMI_CCA_DETECT_LEVEL_AUTO	0
717462f77f09SMaharaja #define	WMI_CCA_DETECT_MARGIN_AUTO	0
717562f77f09SMaharaja 
717662f77f09SMaharaja struct wmi_pdev_set_adaptive_cca_params {
717762f77f09SMaharaja 	__le32 enable;
717862f77f09SMaharaja 	__le32 cca_detect_level;
717962f77f09SMaharaja 	__le32 cca_detect_margin;
718062f77f09SMaharaja } __packed;
718162f77f09SMaharaja 
7182ce834e28SWen Gong #define WMI_PNO_MAX_SCHED_SCAN_PLANS      2
7183ce834e28SWen Gong #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT   7200
7184ce834e28SWen Gong #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100
7185ce834e28SWen Gong #define WMI_PNO_MAX_NETW_CHANNELS         26
7186ce834e28SWen Gong #define WMI_PNO_MAX_NETW_CHANNELS_EX      60
7187ce834e28SWen Gong #define WMI_PNO_MAX_SUPP_NETWORKS         WLAN_SCAN_PARAMS_MAX_SSID
7188ce834e28SWen Gong #define WMI_PNO_MAX_IE_LENGTH             WLAN_SCAN_PARAMS_MAX_IE_LEN
7189ce834e28SWen Gong 
7190ce834e28SWen Gong /*size based of dot11 declaration without extra IEs as we will not carry those for PNO*/
7191ce834e28SWen Gong #define WMI_PNO_MAX_PB_REQ_SIZE    450
7192ce834e28SWen Gong 
7193ce834e28SWen Gong #define WMI_PNO_24G_DEFAULT_CH     1
7194ce834e28SWen Gong #define WMI_PNO_5G_DEFAULT_CH      36
7195ce834e28SWen Gong 
7196ce834e28SWen Gong #define WMI_ACTIVE_MAX_CHANNEL_TIME 40
7197ce834e28SWen Gong #define WMI_PASSIVE_MAX_CHANNEL_TIME   110
7198ce834e28SWen Gong 
7199ce834e28SWen Gong /* SSID broadcast type */
7200ce834e28SWen Gong enum wmi_SSID_bcast_type {
7201ce834e28SWen Gong 	BCAST_UNKNOWN      = 0,
7202ce834e28SWen Gong 	BCAST_NORMAL       = 1,
7203ce834e28SWen Gong 	BCAST_HIDDEN       = 2,
7204ce834e28SWen Gong };
7205ce834e28SWen Gong 
7206ce834e28SWen Gong struct wmi_network_type {
7207ce834e28SWen Gong 	struct wmi_ssid ssid;
7208ce834e28SWen Gong 	u32 authentication;
7209ce834e28SWen Gong 	u32 encryption;
7210ce834e28SWen Gong 	u32 bcast_nw_type;
7211ce834e28SWen Gong 	u8 channel_count;
7212ce834e28SWen Gong 	u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX];
7213ce834e28SWen Gong 	s32 rssi_threshold;
7214ce834e28SWen Gong } __packed;
7215ce834e28SWen Gong 
7216ce834e28SWen Gong struct wmi_pno_scan_req {
7217ce834e28SWen Gong 	u8 enable;
7218ce834e28SWen Gong 	u8 vdev_id;
7219ce834e28SWen Gong 	u8 uc_networks_count;
7220ce834e28SWen Gong 	struct wmi_network_type a_networks[WMI_PNO_MAX_SUPP_NETWORKS];
7221ce834e28SWen Gong 	u32 fast_scan_period;
7222ce834e28SWen Gong 	u32 slow_scan_period;
7223ce834e28SWen Gong 	u8 fast_scan_max_cycles;
7224ce834e28SWen Gong 
7225ce834e28SWen Gong 	bool do_passive_scan;
7226ce834e28SWen Gong 
7227ce834e28SWen Gong 	u32 delay_start_time;
7228ce834e28SWen Gong 	u32 active_min_time;
7229ce834e28SWen Gong 	u32 active_max_time;
7230ce834e28SWen Gong 	u32 passive_min_time;
7231ce834e28SWen Gong 	u32 passive_max_time;
7232ce834e28SWen Gong 
7233ce834e28SWen Gong 	/* mac address randomization attributes */
7234ce834e28SWen Gong 	u32 enable_pno_scan_randomization;
7235ce834e28SWen Gong 	u8 mac_addr[ETH_ALEN];
7236ce834e28SWen Gong 	u8 mac_addr_mask[ETH_ALEN];
7237ce834e28SWen Gong } __packed;
7238ce834e28SWen Gong 
723947771902SRaja Mani enum wmi_host_platform_type {
724047771902SRaja Mani 	WMI_HOST_PLATFORM_HIGH_PERF,
724147771902SRaja Mani 	WMI_HOST_PLATFORM_LOW_PERF,
724247771902SRaja Mani };
724347771902SRaja Mani 
72448a0b459eSRajkumar Manoharan enum wmi_bss_survey_req_type {
72458a0b459eSRajkumar Manoharan 	WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
72468a0b459eSRajkumar Manoharan 	WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
72478a0b459eSRajkumar Manoharan };
72488a0b459eSRajkumar Manoharan 
72498a0b459eSRajkumar Manoharan struct wmi_pdev_chan_info_req_cmd {
72508a0b459eSRajkumar Manoharan 	__le32 type;
72518a0b459eSRajkumar Manoharan 	__le32 reserved;
72528a0b459eSRajkumar Manoharan } __packed;
72538a0b459eSRajkumar Manoharan 
725484758d4dSBhagavathi Perumal S /* bb timing register configurations */
725584758d4dSBhagavathi Perumal S struct wmi_bb_timing_cfg_arg {
725684758d4dSBhagavathi Perumal S 	/* Tx_end to pa off timing */
725784758d4dSBhagavathi Perumal S 	u32 bb_tx_timing;
725884758d4dSBhagavathi Perumal S 
725984758d4dSBhagavathi Perumal S 	/* Tx_end to external pa off timing */
726084758d4dSBhagavathi Perumal S 	u32 bb_xpa_timing;
726184758d4dSBhagavathi Perumal S };
726284758d4dSBhagavathi Perumal S 
726384758d4dSBhagavathi Perumal S struct wmi_pdev_bb_timing_cfg_cmd {
726484758d4dSBhagavathi Perumal S 	/* Tx_end to pa off timing */
726584758d4dSBhagavathi Perumal S 	__le32 bb_tx_timing;
726684758d4dSBhagavathi Perumal S 
726784758d4dSBhagavathi Perumal S 	/* Tx_end to external pa off timing */
726884758d4dSBhagavathi Perumal S 	__le32 bb_xpa_timing;
726984758d4dSBhagavathi Perumal S } __packed;
727084758d4dSBhagavathi Perumal S 
72715e3dd157SKalle Valo struct ath10k;
72725e3dd157SKalle Valo struct ath10k_vif;
72730226d602SMichal Kazior struct ath10k_fw_stats_pdev;
72740226d602SMichal Kazior struct ath10k_fw_stats_peer;
7275bc6f9ae6SManikanta Pubbisetty struct ath10k_fw_stats;
72765e3dd157SKalle Valo 
72775e3dd157SKalle Valo int ath10k_wmi_attach(struct ath10k *ar);
72785e3dd157SKalle Valo void ath10k_wmi_detach(struct ath10k *ar);
7279a925a376SVasanthakumar Thiagarajan void ath10k_wmi_free_host_mem(struct ath10k *ar);
72805e3dd157SKalle Valo int ath10k_wmi_wait_for_service_ready(struct ath10k *ar);
72815e3dd157SKalle Valo int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar);
72825e3dd157SKalle Valo 
72830226d602SMichal Kazior struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
728495bf21f9SMichal Kazior int ath10k_wmi_connect(struct ath10k *ar);
7285666a73f3SKalle Valo 
7286666a73f3SKalle Valo struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
7287666a73f3SKalle Valo int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
7288d7579d12SMichal Kazior int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
7289d7579d12SMichal Kazior 			       u32 cmd_id);
7290019e4280SKalle Valo void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *arg);
72915e3dd157SKalle Valo 
7292b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
7293b91251fbSMichal Kazior 				     struct ath10k_fw_stats_pdev *dst);
7294b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
7295b91251fbSMichal Kazior 				   struct ath10k_fw_stats_pdev *dst);
7296b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
7297b91251fbSMichal Kazior 				   struct ath10k_fw_stats_pdev *dst);
7298b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
72990226d602SMichal Kazior 				      struct ath10k_fw_stats_pdev *dst);
73000226d602SMichal Kazior void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
73010226d602SMichal Kazior 				struct ath10k_fw_stats_peer *dst);
73020226d602SMichal Kazior void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
73030226d602SMichal Kazior 				    struct wmi_host_mem_chunks *chunks);
73040226d602SMichal Kazior void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
73050226d602SMichal Kazior 				      const struct wmi_start_scan_arg *arg);
73065e752e42SMichal Kazior void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
73070226d602SMichal Kazior 			      const struct wmi_wmm_params_arg *arg);
73080226d602SMichal Kazior void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
73090226d602SMichal Kazior 				const struct wmi_channel_arg *arg);
73100226d602SMichal Kazior int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg);
73110226d602SMichal Kazior 
73120226d602SMichal Kazior int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb);
73130226d602SMichal Kazior int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb);
7314dc405152SRakesh Pillai int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb);
7315cc123facSRakesh Pillai int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb);
73160226d602SMichal Kazior void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb);
73170226d602SMichal Kazior void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb);
73180226d602SMichal Kazior int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb);
73190226d602SMichal Kazior void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb);
73200226d602SMichal Kazior void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb);
73210226d602SMichal Kazior void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb);
73220226d602SMichal Kazior void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
73230226d602SMichal Kazior void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
73240226d602SMichal Kazior void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
73250226d602SMichal Kazior void ath10k_wmi_event_dfs(struct ath10k *ar,
7326991adf71SRaja Mani 			  struct wmi_phyerr_ev_arg *phyerr, u64 tsf);
73270226d602SMichal Kazior void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
7328991adf71SRaja Mani 				    struct wmi_phyerr_ev_arg *phyerr,
73290226d602SMichal Kazior 				    u64 tsf);
73300226d602SMichal Kazior void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
73310226d602SMichal Kazior void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
73320226d602SMichal Kazior void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb);
73330226d602SMichal Kazior void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb);
73340226d602SMichal Kazior void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb);
73350226d602SMichal Kazior void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb);
73360226d602SMichal Kazior void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
73370226d602SMichal Kazior 					     struct sk_buff *skb);
73380226d602SMichal Kazior void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
73390226d602SMichal Kazior 					     struct sk_buff *skb);
73400226d602SMichal Kazior void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb);
73410226d602SMichal Kazior void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb);
73420226d602SMichal Kazior void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb);
73430226d602SMichal Kazior void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb);
73440226d602SMichal Kazior void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb);
73450226d602SMichal Kazior void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
73460226d602SMichal Kazior 					 struct sk_buff *skb);
73470226d602SMichal Kazior void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb);
73480226d602SMichal Kazior void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb);
73490226d602SMichal Kazior void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb);
73500226d602SMichal Kazior void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
73510226d602SMichal Kazior 						struct sk_buff *skb);
73520226d602SMichal Kazior void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb);
73530226d602SMichal Kazior void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
73540226d602SMichal Kazior void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
73550226d602SMichal Kazior void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
73560226d602SMichal Kazior int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
7357cea19a6cSCarl Huang void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb);
7358991adf71SRaja Mani int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf,
7359991adf71SRaja Mani 				 int left_len, struct wmi_phyerr_ev_arg *arg);
7360bc6f9ae6SManikanta Pubbisetty void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
7361bc6f9ae6SManikanta Pubbisetty 				      struct ath10k_fw_stats *fw_stats,
7362bc6f9ae6SManikanta Pubbisetty 				      char *buf);
7363bc6f9ae6SManikanta Pubbisetty void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
7364bc6f9ae6SManikanta Pubbisetty 				     struct ath10k_fw_stats *fw_stats,
7365bc6f9ae6SManikanta Pubbisetty 				     char *buf);
7366bc6f9ae6SManikanta Pubbisetty size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head);
7367bc6f9ae6SManikanta Pubbisetty size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head);
736898dd2b92SManikanta Pubbisetty void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
736998dd2b92SManikanta Pubbisetty 				      struct ath10k_fw_stats *fw_stats,
737098dd2b92SManikanta Pubbisetty 				      char *buf);
73716e4de1a4SPeter Oh int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
73726e4de1a4SPeter Oh 				   enum wmi_vdev_subtype subtype);
737320ddca21SMichal Kazior int ath10k_wmi_barrier(struct ath10k *ar);
7374bc64d052SMaharaja Kennadyrajan void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
7375bc64d052SMaharaja Kennadyrajan 					 u32 num_tx_chain);
7376bc64d052SMaharaja Kennadyrajan void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb);
7377bc6f9ae6SManikanta Pubbisetty 
73785e3dd157SKalle Valo #endif /* _WMI_H_ */
7379