xref: /openbmc/linux/drivers/net/wireless/ath/ath10k/wmi.h (revision c7fd8d23)
15e3dd157SKalle Valo /*
25e3dd157SKalle Valo  * Copyright (c) 2005-2011 Atheros Communications Inc.
38b1083d6SKalle Valo  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
4bc64d052SMaharaja Kennadyrajan  * Copyright (c) 2018, The Linux Foundation. All rights reserved.
55e3dd157SKalle Valo  *
65e3dd157SKalle Valo  * Permission to use, copy, modify, and/or distribute this software for any
75e3dd157SKalle Valo  * purpose with or without fee is hereby granted, provided that the above
85e3dd157SKalle Valo  * copyright notice and this permission notice appear in all copies.
95e3dd157SKalle Valo  *
105e3dd157SKalle Valo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
115e3dd157SKalle Valo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
125e3dd157SKalle Valo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
135e3dd157SKalle Valo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
145e3dd157SKalle Valo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
155e3dd157SKalle Valo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
165e3dd157SKalle Valo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
175e3dd157SKalle Valo  */
185e3dd157SKalle Valo 
195e3dd157SKalle Valo #ifndef _WMI_H_
205e3dd157SKalle Valo #define _WMI_H_
215e3dd157SKalle Valo 
225e3dd157SKalle Valo #include <linux/types.h>
235e3dd157SKalle Valo #include <net/mac80211.h>
245e3dd157SKalle Valo 
255e3dd157SKalle Valo /*
265e3dd157SKalle Valo  * This file specifies the WMI interface for the Unified Software
275e3dd157SKalle Valo  * Architecture.
285e3dd157SKalle Valo  *
295e3dd157SKalle Valo  * It includes definitions of all the commands and events. Commands are
305e3dd157SKalle Valo  * messages from the host to the target. Events and Replies are messages
315e3dd157SKalle Valo  * from the target to the host.
325e3dd157SKalle Valo  *
335e3dd157SKalle Valo  * Ownership of correctness in regards to WMI commands belongs to the host
345e3dd157SKalle Valo  * driver and the target is not required to validate parameters for value,
355e3dd157SKalle Valo  * proper range, or any other checking.
365e3dd157SKalle Valo  *
375e3dd157SKalle Valo  * Guidelines for extending this interface are below.
385e3dd157SKalle Valo  *
395e3dd157SKalle Valo  * 1. Add new WMI commands ONLY within the specified range - 0x9000 - 0x9fff
405e3dd157SKalle Valo  *
415e3dd157SKalle Valo  * 2. Use ONLY u32 type for defining member variables within WMI
425e3dd157SKalle Valo  *    command/event structures. Do not use u8, u16, bool or
435e3dd157SKalle Valo  *    enum types within these structures.
445e3dd157SKalle Valo  *
455e3dd157SKalle Valo  * 3. DO NOT define bit fields within structures. Implement bit fields
465e3dd157SKalle Valo  *    using masks if necessary. Do not use the programming language's bit
475e3dd157SKalle Valo  *    field definition.
485e3dd157SKalle Valo  *
495e3dd157SKalle Valo  * 4. Define macros for encode/decode of u8, u16 fields within
505e3dd157SKalle Valo  *    the u32 variables. Use these macros for set/get of these fields.
515e3dd157SKalle Valo  *    Try to use this to optimize the structure without bloating it with
525e3dd157SKalle Valo  *    u32 variables for every lower sized field.
535e3dd157SKalle Valo  *
545e3dd157SKalle Valo  * 5. Do not use PACK/UNPACK attributes for the structures as each member
555e3dd157SKalle Valo  *    variable is already 4-byte aligned by virtue of being a u32
565e3dd157SKalle Valo  *    type.
575e3dd157SKalle Valo  *
585e3dd157SKalle Valo  * 6. Comment each parameter part of the WMI command/event structure by
59e13dbeadSJoe Perches  *    using the 2 stars at the beginning of C comment instead of one star to
605e3dd157SKalle Valo  *    enable HTML document generation using Doxygen.
615e3dd157SKalle Valo  *
625e3dd157SKalle Valo  */
635e3dd157SKalle Valo 
645e3dd157SKalle Valo /* Control Path */
655e3dd157SKalle Valo struct wmi_cmd_hdr {
665e3dd157SKalle Valo 	__le32 cmd_id;
675e3dd157SKalle Valo } __packed;
685e3dd157SKalle Valo 
695e3dd157SKalle Valo #define WMI_CMD_HDR_CMD_ID_MASK   0x00FFFFFF
705e3dd157SKalle Valo #define WMI_CMD_HDR_CMD_ID_LSB    0
715e3dd157SKalle Valo #define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000
725e3dd157SKalle Valo #define WMI_CMD_HDR_PLT_PRIV_LSB  24
735e3dd157SKalle Valo 
745e3dd157SKalle Valo #define HTC_PROTOCOL_VERSION    0x0002
755e3dd157SKalle Valo #define WMI_PROTOCOL_VERSION    0x0002
765e3dd157SKalle Valo 
773b8fc902SKalle Valo /*
783b8fc902SKalle Valo  * There is no signed version of __le32, so for a temporary solution come
796d219113SAmadeusz Sławiński  * up with our own version. The idea is from fs/ntfs/endian.h.
803b8fc902SKalle Valo  *
813b8fc902SKalle Valo  * Use a_ prefix so that it doesn't conflict if we get proper support to
823b8fc902SKalle Valo  * linux/types.h.
833b8fc902SKalle Valo  */
843b8fc902SKalle Valo typedef __s32 __bitwise a_sle32;
853b8fc902SKalle Valo 
863b8fc902SKalle Valo static inline a_sle32 a_cpu_to_sle32(s32 val)
873b8fc902SKalle Valo {
883b8fc902SKalle Valo 	return (__force a_sle32)cpu_to_le32(val);
893b8fc902SKalle Valo }
903b8fc902SKalle Valo 
913b8fc902SKalle Valo static inline s32 a_sle32_to_cpu(a_sle32 val)
923b8fc902SKalle Valo {
933b8fc902SKalle Valo 	return le32_to_cpu((__force __le32)val);
943b8fc902SKalle Valo }
953b8fc902SKalle Valo 
96cff990ceSMichal Kazior enum wmi_service {
97cff990ceSMichal Kazior 	WMI_SERVICE_BEACON_OFFLOAD = 0,
98cff990ceSMichal Kazior 	WMI_SERVICE_SCAN_OFFLOAD,
99cff990ceSMichal Kazior 	WMI_SERVICE_ROAM_OFFLOAD,
100cff990ceSMichal Kazior 	WMI_SERVICE_BCN_MISS_OFFLOAD,
101cff990ceSMichal Kazior 	WMI_SERVICE_STA_PWRSAVE,
102cff990ceSMichal Kazior 	WMI_SERVICE_STA_ADVANCED_PWRSAVE,
103cff990ceSMichal Kazior 	WMI_SERVICE_AP_UAPSD,
104cff990ceSMichal Kazior 	WMI_SERVICE_AP_DFS,
105cff990ceSMichal Kazior 	WMI_SERVICE_11AC,
106cff990ceSMichal Kazior 	WMI_SERVICE_BLOCKACK,
107cff990ceSMichal Kazior 	WMI_SERVICE_PHYERR,
108cff990ceSMichal Kazior 	WMI_SERVICE_BCN_FILTER,
109cff990ceSMichal Kazior 	WMI_SERVICE_RTT,
110cff990ceSMichal Kazior 	WMI_SERVICE_RATECTRL,
111cff990ceSMichal Kazior 	WMI_SERVICE_WOW,
112cff990ceSMichal Kazior 	WMI_SERVICE_RATECTRL_CACHE,
113cff990ceSMichal Kazior 	WMI_SERVICE_IRAM_TIDS,
114cff990ceSMichal Kazior 	WMI_SERVICE_ARPNS_OFFLOAD,
115cff990ceSMichal Kazior 	WMI_SERVICE_NLO,
116cff990ceSMichal Kazior 	WMI_SERVICE_GTK_OFFLOAD,
117cff990ceSMichal Kazior 	WMI_SERVICE_SCAN_SCH,
118cff990ceSMichal Kazior 	WMI_SERVICE_CSA_OFFLOAD,
119cff990ceSMichal Kazior 	WMI_SERVICE_CHATTER,
120cff990ceSMichal Kazior 	WMI_SERVICE_COEX_FREQAVOID,
121cff990ceSMichal Kazior 	WMI_SERVICE_PACKET_POWER_SAVE,
122cff990ceSMichal Kazior 	WMI_SERVICE_FORCE_FW_HANG,
123cff990ceSMichal Kazior 	WMI_SERVICE_GPIO,
124cff990ceSMichal Kazior 	WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
125cff990ceSMichal Kazior 	WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
126cff990ceSMichal Kazior 	WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
127cff990ceSMichal Kazior 	WMI_SERVICE_STA_KEEP_ALIVE,
128cff990ceSMichal Kazior 	WMI_SERVICE_TX_ENCAP,
129cff990ceSMichal Kazior 	WMI_SERVICE_BURST,
130cff990ceSMichal Kazior 	WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT,
131cff990ceSMichal Kazior 	WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT,
132ca996ec5SMichal Kazior 	WMI_SERVICE_ROAM_SCAN_OFFLOAD,
133ca996ec5SMichal Kazior 	WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
134ca996ec5SMichal Kazior 	WMI_SERVICE_EARLY_RX,
135ca996ec5SMichal Kazior 	WMI_SERVICE_STA_SMPS,
136ca996ec5SMichal Kazior 	WMI_SERVICE_FWTEST,
137ca996ec5SMichal Kazior 	WMI_SERVICE_STA_WMMAC,
138ca996ec5SMichal Kazior 	WMI_SERVICE_TDLS,
139ca996ec5SMichal Kazior 	WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,
140ca996ec5SMichal Kazior 	WMI_SERVICE_ADAPTIVE_OCS,
141ca996ec5SMichal Kazior 	WMI_SERVICE_BA_SSN_SUPPORT,
142ca996ec5SMichal Kazior 	WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
143ca996ec5SMichal Kazior 	WMI_SERVICE_WLAN_HB,
144ca996ec5SMichal Kazior 	WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,
145ca996ec5SMichal Kazior 	WMI_SERVICE_BATCH_SCAN,
146ca996ec5SMichal Kazior 	WMI_SERVICE_QPOWER,
147ca996ec5SMichal Kazior 	WMI_SERVICE_PLMREQ,
148ca996ec5SMichal Kazior 	WMI_SERVICE_THERMAL_MGMT,
149ca996ec5SMichal Kazior 	WMI_SERVICE_RMC,
150ca996ec5SMichal Kazior 	WMI_SERVICE_MHF_OFFLOAD,
151ca996ec5SMichal Kazior 	WMI_SERVICE_COEX_SAR,
152ca996ec5SMichal Kazior 	WMI_SERVICE_BCN_TXRATE_OVERRIDE,
153ca996ec5SMichal Kazior 	WMI_SERVICE_NAN,
154ca996ec5SMichal Kazior 	WMI_SERVICE_L1SS_STAT,
155ca996ec5SMichal Kazior 	WMI_SERVICE_ESTIMATE_LINKSPEED,
156ca996ec5SMichal Kazior 	WMI_SERVICE_OBSS_SCAN,
157ca996ec5SMichal Kazior 	WMI_SERVICE_TDLS_OFFCHAN,
158ca996ec5SMichal Kazior 	WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
159ca996ec5SMichal Kazior 	WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,
160ca996ec5SMichal Kazior 	WMI_SERVICE_IBSS_PWRSAVE,
161ca996ec5SMichal Kazior 	WMI_SERVICE_LPASS,
162ca996ec5SMichal Kazior 	WMI_SERVICE_EXTSCAN,
163ca996ec5SMichal Kazior 	WMI_SERVICE_D0WOW,
164ca996ec5SMichal Kazior 	WMI_SERVICE_HSOFFLOAD,
165ca996ec5SMichal Kazior 	WMI_SERVICE_ROAM_HO_OFFLOAD,
166ca996ec5SMichal Kazior 	WMI_SERVICE_RX_FULL_REORDER,
167ca996ec5SMichal Kazior 	WMI_SERVICE_DHCP_OFFLOAD,
168ca996ec5SMichal Kazior 	WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,
169ca996ec5SMichal Kazior 	WMI_SERVICE_MDNS_OFFLOAD,
170ca996ec5SMichal Kazior 	WMI_SERVICE_SAP_AUTH_OFFLOAD,
17152c22a63SYanbo Li 	WMI_SERVICE_ATF,
172de0c789bSYanbo Li 	WMI_SERVICE_COEX_GPIO,
173840357ccSRaja Mani 	WMI_SERVICE_ENHANCED_PROXY_STA,
174840357ccSRaja Mani 	WMI_SERVICE_TT,
175840357ccSRaja Mani 	WMI_SERVICE_PEER_CACHING,
176840357ccSRaja Mani 	WMI_SERVICE_AUX_SPECTRAL_INTF,
177840357ccSRaja Mani 	WMI_SERVICE_AUX_CHAN_LOAD_INTF,
178840357ccSRaja Mani 	WMI_SERVICE_BSS_CHANNEL_INFO_64,
179e3c6225dSVasanthakumar Thiagarajan 	WMI_SERVICE_EXT_RES_CFG_SUPPORT,
1800b3d76e9SPeter Oh 	WMI_SERVICE_MESH_11S,
1810b3d76e9SPeter Oh 	WMI_SERVICE_MESH_NON_11S,
182de46c015SMohammed Shafi Shajakhan 	WMI_SERVICE_PEER_STATS,
183e70e9ba9SPeter Oh 	WMI_SERVICE_RESTRT_CHNL_SUPPORT,
18464ed5771STamizh chelvam 	WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
1857e247a9eSRaja Mani 	WMI_SERVICE_TX_MODE_PUSH_ONLY,
1867e247a9eSRaja Mani 	WMI_SERVICE_TX_MODE_PUSH_PULL,
1877e247a9eSRaja Mani 	WMI_SERVICE_TX_MODE_DYNAMIC,
188add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_VDEV_RX_FILTER,
189add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_BTCOEX,
190add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_CHECK_CAL_VERSION,
191add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_DBGLOG_WARN2,
192add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_BTCOEX_DUTY_CYCLE,
193add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_4_WIRE_COEX_SUPPORT,
194add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_EXTENDED_NSS_SUPPORT,
195add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_PROG_GPIO_BAND_SELECT,
196add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_SMART_LOGGING_SUPPORT,
197add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
198add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
199229329ffSRakesh Pillai 	WMI_SERVICE_MGMT_TX_WMI,
20014d65775SBalaji Pothunoori 	WMI_SERVICE_TDLS_WIDER_BANDWIDTH,
201bc64d052SMaharaja Kennadyrajan 	WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
202bc64d052SMaharaja Kennadyrajan 	WMI_SERVICE_HOST_DFS_CHECK_SUPPORT,
203bc64d052SMaharaja Kennadyrajan 	WMI_SERVICE_TPC_STATS_FINAL,
204235b9c42SVenkateswara Naralasetty 	WMI_SERVICE_RESET_CHIP,
205cea19a6cSCarl Huang 	WMI_SERVICE_SPOOF_MAC_SUPPORT,
206c7fd8d23SBalaji Pothunoori 	WMI_SERVICE_TX_DATA_ACK_RSSI,
207c4f8c836SMichal Kazior 
208c4f8c836SMichal Kazior 	/* keep last */
209c4f8c836SMichal Kazior 	WMI_SERVICE_MAX,
210cff990ceSMichal Kazior };
2115e3dd157SKalle Valo 
212cff990ceSMichal Kazior enum wmi_10x_service {
213cff990ceSMichal Kazior 	WMI_10X_SERVICE_BEACON_OFFLOAD = 0,
214cff990ceSMichal Kazior 	WMI_10X_SERVICE_SCAN_OFFLOAD,
215cff990ceSMichal Kazior 	WMI_10X_SERVICE_ROAM_OFFLOAD,
216cff990ceSMichal Kazior 	WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
217cff990ceSMichal Kazior 	WMI_10X_SERVICE_STA_PWRSAVE,
218cff990ceSMichal Kazior 	WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
219cff990ceSMichal Kazior 	WMI_10X_SERVICE_AP_UAPSD,
220cff990ceSMichal Kazior 	WMI_10X_SERVICE_AP_DFS,
221cff990ceSMichal Kazior 	WMI_10X_SERVICE_11AC,
222cff990ceSMichal Kazior 	WMI_10X_SERVICE_BLOCKACK,
223cff990ceSMichal Kazior 	WMI_10X_SERVICE_PHYERR,
224cff990ceSMichal Kazior 	WMI_10X_SERVICE_BCN_FILTER,
225cff990ceSMichal Kazior 	WMI_10X_SERVICE_RTT,
226cff990ceSMichal Kazior 	WMI_10X_SERVICE_RATECTRL,
227cff990ceSMichal Kazior 	WMI_10X_SERVICE_WOW,
228cff990ceSMichal Kazior 	WMI_10X_SERVICE_RATECTRL_CACHE,
229cff990ceSMichal Kazior 	WMI_10X_SERVICE_IRAM_TIDS,
230cff990ceSMichal Kazior 	WMI_10X_SERVICE_BURST,
231cff990ceSMichal Kazior 
232cff990ceSMichal Kazior 	/* introduced in 10.2 */
233cff990ceSMichal Kazior 	WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
234cff990ceSMichal Kazior 	WMI_10X_SERVICE_FORCE_FW_HANG,
235cff990ceSMichal Kazior 	WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
23652c22a63SYanbo Li 	WMI_10X_SERVICE_ATF,
237de0c789bSYanbo Li 	WMI_10X_SERVICE_COEX_GPIO,
23820fa2f7fSPeter Oh 	WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
23920fa2f7fSPeter Oh 	WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
24020fa2f7fSPeter Oh 	WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
24120fa2f7fSPeter Oh 	WMI_10X_SERVICE_MESH,
24220fa2f7fSPeter Oh 	WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
243de46c015SMohammed Shafi Shajakhan 	WMI_10X_SERVICE_PEER_STATS,
244235b9c42SVenkateswara Naralasetty 	WMI_10X_SERVICE_RESET_CHIP,
245235b9c42SVenkateswara Naralasetty 	WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
246cff990ceSMichal Kazior };
247cff990ceSMichal Kazior 
248cff990ceSMichal Kazior enum wmi_main_service {
249cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0,
250cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_SCAN_OFFLOAD,
251cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_ROAM_OFFLOAD,
252cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
253cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_PWRSAVE,
254cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
255cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_AP_UAPSD,
256cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_AP_DFS,
257cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_11AC,
258cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_BLOCKACK,
259cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_PHYERR,
260cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_BCN_FILTER,
261cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_RTT,
262cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_RATECTRL,
263cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_WOW,
264cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_RATECTRL_CACHE,
265cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_IRAM_TIDS,
266cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
267cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_NLO,
268cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_GTK_OFFLOAD,
269cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_SCAN_SCH,
270cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_CSA_OFFLOAD,
271cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_CHATTER,
272cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_COEX_FREQAVOID,
273cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
274cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_FORCE_FW_HANG,
275cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_GPIO,
276cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
277cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
278cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
279cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
280cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_TX_ENCAP,
2815e3dd157SKalle Valo };
2825e3dd157SKalle Valo 
283840357ccSRaja Mani enum wmi_10_4_service {
284840357ccSRaja Mani 	WMI_10_4_SERVICE_BEACON_OFFLOAD = 0,
285840357ccSRaja Mani 	WMI_10_4_SERVICE_SCAN_OFFLOAD,
286840357ccSRaja Mani 	WMI_10_4_SERVICE_ROAM_OFFLOAD,
287840357ccSRaja Mani 	WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
288840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_PWRSAVE,
289840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
290840357ccSRaja Mani 	WMI_10_4_SERVICE_AP_UAPSD,
291840357ccSRaja Mani 	WMI_10_4_SERVICE_AP_DFS,
292840357ccSRaja Mani 	WMI_10_4_SERVICE_11AC,
293840357ccSRaja Mani 	WMI_10_4_SERVICE_BLOCKACK,
294840357ccSRaja Mani 	WMI_10_4_SERVICE_PHYERR,
295840357ccSRaja Mani 	WMI_10_4_SERVICE_BCN_FILTER,
296840357ccSRaja Mani 	WMI_10_4_SERVICE_RTT,
297840357ccSRaja Mani 	WMI_10_4_SERVICE_RATECTRL,
298840357ccSRaja Mani 	WMI_10_4_SERVICE_WOW,
299840357ccSRaja Mani 	WMI_10_4_SERVICE_RATECTRL_CACHE,
300840357ccSRaja Mani 	WMI_10_4_SERVICE_IRAM_TIDS,
301840357ccSRaja Mani 	WMI_10_4_SERVICE_BURST,
302840357ccSRaja Mani 	WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
303840357ccSRaja Mani 	WMI_10_4_SERVICE_GTK_OFFLOAD,
304840357ccSRaja Mani 	WMI_10_4_SERVICE_SCAN_SCH,
305840357ccSRaja Mani 	WMI_10_4_SERVICE_CSA_OFFLOAD,
306840357ccSRaja Mani 	WMI_10_4_SERVICE_CHATTER,
307840357ccSRaja Mani 	WMI_10_4_SERVICE_COEX_FREQAVOID,
308840357ccSRaja Mani 	WMI_10_4_SERVICE_PACKET_POWER_SAVE,
309840357ccSRaja Mani 	WMI_10_4_SERVICE_FORCE_FW_HANG,
310840357ccSRaja Mani 	WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
311840357ccSRaja Mani 	WMI_10_4_SERVICE_GPIO,
312840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
313840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
314840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_KEEP_ALIVE,
315840357ccSRaja Mani 	WMI_10_4_SERVICE_TX_ENCAP,
316840357ccSRaja Mani 	WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
317840357ccSRaja Mani 	WMI_10_4_SERVICE_EARLY_RX,
318840357ccSRaja Mani 	WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
319840357ccSRaja Mani 	WMI_10_4_SERVICE_TT,
320840357ccSRaja Mani 	WMI_10_4_SERVICE_ATF,
321840357ccSRaja Mani 	WMI_10_4_SERVICE_PEER_CACHING,
322840357ccSRaja Mani 	WMI_10_4_SERVICE_COEX_GPIO,
323840357ccSRaja Mani 	WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
324840357ccSRaja Mani 	WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
325840357ccSRaja Mani 	WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
326e3c6225dSVasanthakumar Thiagarajan 	WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
3270b3d76e9SPeter Oh 	WMI_10_4_SERVICE_MESH_NON_11S,
328e70e9ba9SPeter Oh 	WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
329e70e9ba9SPeter Oh 	WMI_10_4_SERVICE_PEER_STATS,
330e70e9ba9SPeter Oh 	WMI_10_4_SERVICE_MESH_11S,
33164ed5771STamizh chelvam 	WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
3327e247a9eSRaja Mani 	WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
3337e247a9eSRaja Mani 	WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
3347e247a9eSRaja Mani 	WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
335add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_VDEV_RX_FILTER,
336add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_BTCOEX,
337add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_CHECK_CAL_VERSION,
338add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_DBGLOG_WARN2,
339add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
340add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
341add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
342add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
343add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
344add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS,
345add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_OFFCHAN,
346add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
347add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
348add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
349add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
35014d65775SBalaji Pothunoori 	WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
351bc64d052SMaharaja Kennadyrajan 	WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
352bc64d052SMaharaja Kennadyrajan 	WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
353bc64d052SMaharaja Kennadyrajan 	WMI_10_4_SERVICE_TPC_STATS_FINAL,
354c7fd8d23SBalaji Pothunoori 	WMI_10_4_SERVICE_CFR_CAPTURE_SUPPORT,
355c7fd8d23SBalaji Pothunoori 	WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
356840357ccSRaja Mani };
357840357ccSRaja Mani 
3585e3dd157SKalle Valo static inline char *wmi_service_name(int service_id)
3595e3dd157SKalle Valo {
360cff990ceSMichal Kazior #define SVCSTR(x) case x: return #x
361cff990ceSMichal Kazior 
3625e3dd157SKalle Valo 	switch (service_id) {
363cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BEACON_OFFLOAD);
364cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_SCAN_OFFLOAD);
365cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_ROAM_OFFLOAD);
366cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD);
367cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_PWRSAVE);
368cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE);
369cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_AP_UAPSD);
370cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_AP_DFS);
371cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_11AC);
372cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BLOCKACK);
373cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_PHYERR);
374cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BCN_FILTER);
375cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_RTT);
376cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_RATECTRL);
377cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_WOW);
378cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_RATECTRL_CACHE);
379cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_IRAM_TIDS);
380cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD);
381cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_NLO);
382cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_GTK_OFFLOAD);
383cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_SCAN_SCH);
384cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_CSA_OFFLOAD);
385cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_CHATTER);
386cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_COEX_FREQAVOID);
387cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE);
388cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_FORCE_FW_HANG);
389cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_GPIO);
390cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM);
391cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG);
392cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG);
393cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE);
394cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_TX_ENCAP);
395cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BURST);
396cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT);
397cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT);
398ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD);
399ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC);
400ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_EARLY_RX);
401ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_STA_SMPS);
402ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_FWTEST);
403ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_STA_WMMAC);
404ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_TDLS);
405ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE);
406ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_ADAPTIVE_OCS);
407ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT);
408ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE);
409ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_WLAN_HB);
410ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT);
411ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_BATCH_SCAN);
412ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_QPOWER);
413ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_PLMREQ);
414ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_THERMAL_MGMT);
415ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_RMC);
416ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_MHF_OFFLOAD);
417ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_COEX_SAR);
418ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE);
419ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_NAN);
420ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_L1SS_STAT);
421ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED);
422ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_OBSS_SCAN);
423ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_TDLS_OFFCHAN);
424ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA);
425ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA);
426ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_IBSS_PWRSAVE);
427ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_LPASS);
428ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_EXTSCAN);
429ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_D0WOW);
430ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_HSOFFLOAD);
431ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD);
432ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_RX_FULL_REORDER);
433ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_DHCP_OFFLOAD);
434ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT);
435ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_MDNS_OFFLOAD);
436ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD);
43752c22a63SYanbo Li 	SVCSTR(WMI_SERVICE_ATF);
438de0c789bSYanbo Li 	SVCSTR(WMI_SERVICE_COEX_GPIO);
439840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA);
440840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_TT);
441840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_PEER_CACHING);
442840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF);
443840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF);
444840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64);
445e3c6225dSVasanthakumar Thiagarajan 	SVCSTR(WMI_SERVICE_EXT_RES_CFG_SUPPORT);
4460b3d76e9SPeter Oh 	SVCSTR(WMI_SERVICE_MESH_11S);
4470b3d76e9SPeter Oh 	SVCSTR(WMI_SERVICE_MESH_NON_11S);
448de46c015SMohammed Shafi Shajakhan 	SVCSTR(WMI_SERVICE_PEER_STATS);
449e70e9ba9SPeter Oh 	SVCSTR(WMI_SERVICE_RESTRT_CHNL_SUPPORT);
45064ed5771STamizh chelvam 	SVCSTR(WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT);
4517e247a9eSRaja Mani 	SVCSTR(WMI_SERVICE_TX_MODE_PUSH_ONLY);
4527e247a9eSRaja Mani 	SVCSTR(WMI_SERVICE_TX_MODE_PUSH_PULL);
4537e247a9eSRaja Mani 	SVCSTR(WMI_SERVICE_TX_MODE_DYNAMIC);
454add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_VDEV_RX_FILTER);
455add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_CHECK_CAL_VERSION);
456add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_DBGLOG_WARN2);
457add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_BTCOEX_DUTY_CYCLE);
458add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_4_WIRE_COEX_SUPPORT);
459add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_EXTENDED_NSS_SUPPORT);
460add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_PROG_GPIO_BAND_SELECT);
461add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_SMART_LOGGING_SUPPORT);
462add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE);
463add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY);
46414d65775SBalaji Pothunoori 	SVCSTR(WMI_SERVICE_TDLS_WIDER_BANDWIDTH);
465bc64d052SMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS);
466bc64d052SMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT);
467bc64d052SMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_TPC_STATS_FINAL);
468db251d7dSMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_RESET_CHIP);
469c7fd8d23SBalaji Pothunoori 	SVCSTR(WMI_SERVICE_TX_DATA_ACK_RSSI);
4705e3dd157SKalle Valo 	default:
471cff990ceSMichal Kazior 		return NULL;
4725e3dd157SKalle Valo 	}
4735e3dd157SKalle Valo 
474cff990ceSMichal Kazior #undef SVCSTR
475cff990ceSMichal Kazior }
476cff990ceSMichal Kazior 
47737b9f933SMichal Kazior #define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
47837b9f933SMichal Kazior 	((svc_id) < (len) && \
47937b9f933SMichal Kazior 	 __le32_to_cpu((wmi_svc_bmap)[(svc_id) / (sizeof(u32))]) & \
480cff990ceSMichal Kazior 	 BIT((svc_id) % (sizeof(u32))))
481cff990ceSMichal Kazior 
482810fe818SManikanta Pubbisetty /* This extension is required to accommodate new services, current limit
483810fe818SManikanta Pubbisetty  * for wmi_services is 64 as target is using only 4-bits of each 32-bit
484810fe818SManikanta Pubbisetty  * wmi_service word. Extending this to make use of remaining unused bits
485810fe818SManikanta Pubbisetty  * for new services.
486810fe818SManikanta Pubbisetty  */
487810fe818SManikanta Pubbisetty #define WMI_EXT_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
488810fe818SManikanta Pubbisetty 	((svc_id) >= (len) && \
489810fe818SManikanta Pubbisetty 	__le32_to_cpu((wmi_svc_bmap)[((svc_id) - (len)) / 28]) & \
490810fe818SManikanta Pubbisetty 	BIT(((((svc_id) - (len)) % 28) & 0x1f) + 4))
491810fe818SManikanta Pubbisetty 
49237b9f933SMichal Kazior #define SVCMAP(x, y, len) \
493cff990ceSMichal Kazior 	do { \
494810fe818SManikanta Pubbisetty 		if ((WMI_SERVICE_IS_ENABLED((in), (x), (len))) || \
495810fe818SManikanta Pubbisetty 		    (WMI_EXT_SERVICE_IS_ENABLED((in), (x), (len)))) \
496cff990ceSMichal Kazior 			__set_bit(y, out); \
497cff990ceSMichal Kazior 	} while (0)
498cff990ceSMichal Kazior 
49937b9f933SMichal Kazior static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out,
50037b9f933SMichal Kazior 				   size_t len)
501cff990ceSMichal Kazior {
502cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD,
50337b9f933SMichal Kazior 	       WMI_SERVICE_BEACON_OFFLOAD, len);
504cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD,
50537b9f933SMichal Kazior 	       WMI_SERVICE_SCAN_OFFLOAD, len);
506cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD,
50737b9f933SMichal Kazior 	       WMI_SERVICE_ROAM_OFFLOAD, len);
508cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
50937b9f933SMichal Kazior 	       WMI_SERVICE_BCN_MISS_OFFLOAD, len);
510cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE,
51137b9f933SMichal Kazior 	       WMI_SERVICE_STA_PWRSAVE, len);
512cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
51337b9f933SMichal Kazior 	       WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
514cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_AP_UAPSD,
51537b9f933SMichal Kazior 	       WMI_SERVICE_AP_UAPSD, len);
516cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_AP_DFS,
51737b9f933SMichal Kazior 	       WMI_SERVICE_AP_DFS, len);
518cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_11AC,
51937b9f933SMichal Kazior 	       WMI_SERVICE_11AC, len);
520cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BLOCKACK,
52137b9f933SMichal Kazior 	       WMI_SERVICE_BLOCKACK, len);
522cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_PHYERR,
52337b9f933SMichal Kazior 	       WMI_SERVICE_PHYERR, len);
524cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BCN_FILTER,
52537b9f933SMichal Kazior 	       WMI_SERVICE_BCN_FILTER, len);
526cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_RTT,
52737b9f933SMichal Kazior 	       WMI_SERVICE_RTT, len);
528cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_RATECTRL,
52937b9f933SMichal Kazior 	       WMI_SERVICE_RATECTRL, len);
530cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_WOW,
53137b9f933SMichal Kazior 	       WMI_SERVICE_WOW, len);
532cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE,
53337b9f933SMichal Kazior 	       WMI_SERVICE_RATECTRL_CACHE, len);
534cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_IRAM_TIDS,
53537b9f933SMichal Kazior 	       WMI_SERVICE_IRAM_TIDS, len);
536cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BURST,
53737b9f933SMichal Kazior 	       WMI_SERVICE_BURST, len);
538cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
53937b9f933SMichal Kazior 	       WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
540cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG,
54137b9f933SMichal Kazior 	       WMI_SERVICE_FORCE_FW_HANG, len);
542cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
54337b9f933SMichal Kazior 	       WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
54452c22a63SYanbo Li 	SVCMAP(WMI_10X_SERVICE_ATF,
54552c22a63SYanbo Li 	       WMI_SERVICE_ATF, len);
546de0c789bSYanbo Li 	SVCMAP(WMI_10X_SERVICE_COEX_GPIO,
547de0c789bSYanbo Li 	       WMI_SERVICE_COEX_GPIO, len);
54820fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
54920fa2f7fSPeter Oh 	       WMI_SERVICE_AUX_SPECTRAL_INTF, len);
55020fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
55120fa2f7fSPeter Oh 	       WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
55220fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
55320fa2f7fSPeter Oh 	       WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
55420fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_MESH,
5550b3d76e9SPeter Oh 	       WMI_SERVICE_MESH_11S, len);
55620fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
55720fa2f7fSPeter Oh 	       WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
558de46c015SMohammed Shafi Shajakhan 	SVCMAP(WMI_10X_SERVICE_PEER_STATS,
559de46c015SMohammed Shafi Shajakhan 	       WMI_SERVICE_PEER_STATS, len);
560235b9c42SVenkateswara Naralasetty 	SVCMAP(WMI_10X_SERVICE_RESET_CHIP,
561235b9c42SVenkateswara Naralasetty 	       WMI_SERVICE_RESET_CHIP, len);
562235b9c42SVenkateswara Naralasetty 	SVCMAP(WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
563235b9c42SVenkateswara Naralasetty 	       WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
564cff990ceSMichal Kazior }
565cff990ceSMichal Kazior 
56637b9f933SMichal Kazior static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out,
56737b9f933SMichal Kazior 				    size_t len)
568cff990ceSMichal Kazior {
569cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD,
57037b9f933SMichal Kazior 	       WMI_SERVICE_BEACON_OFFLOAD, len);
571cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD,
57237b9f933SMichal Kazior 	       WMI_SERVICE_SCAN_OFFLOAD, len);
573cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD,
57437b9f933SMichal Kazior 	       WMI_SERVICE_ROAM_OFFLOAD, len);
575cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
57637b9f933SMichal Kazior 	       WMI_SERVICE_BCN_MISS_OFFLOAD, len);
577cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE,
57837b9f933SMichal Kazior 	       WMI_SERVICE_STA_PWRSAVE, len);
579cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
58037b9f933SMichal Kazior 	       WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
581cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD,
58237b9f933SMichal Kazior 	       WMI_SERVICE_AP_UAPSD, len);
583cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_AP_DFS,
58437b9f933SMichal Kazior 	       WMI_SERVICE_AP_DFS, len);
585cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_11AC,
58637b9f933SMichal Kazior 	       WMI_SERVICE_11AC, len);
587cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_BLOCKACK,
58837b9f933SMichal Kazior 	       WMI_SERVICE_BLOCKACK, len);
589cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_PHYERR,
59037b9f933SMichal Kazior 	       WMI_SERVICE_PHYERR, len);
591cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER,
59237b9f933SMichal Kazior 	       WMI_SERVICE_BCN_FILTER, len);
593cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_RTT,
59437b9f933SMichal Kazior 	       WMI_SERVICE_RTT, len);
595cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_RATECTRL,
59637b9f933SMichal Kazior 	       WMI_SERVICE_RATECTRL, len);
597cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_WOW,
59837b9f933SMichal Kazior 	       WMI_SERVICE_WOW, len);
599cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE,
60037b9f933SMichal Kazior 	       WMI_SERVICE_RATECTRL_CACHE, len);
601cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS,
60237b9f933SMichal Kazior 	       WMI_SERVICE_IRAM_TIDS, len);
603cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
60437b9f933SMichal Kazior 	       WMI_SERVICE_ARPNS_OFFLOAD, len);
605cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_NLO,
60637b9f933SMichal Kazior 	       WMI_SERVICE_NLO, len);
607cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD,
60837b9f933SMichal Kazior 	       WMI_SERVICE_GTK_OFFLOAD, len);
609cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH,
61037b9f933SMichal Kazior 	       WMI_SERVICE_SCAN_SCH, len);
611cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD,
61237b9f933SMichal Kazior 	       WMI_SERVICE_CSA_OFFLOAD, len);
613cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_CHATTER,
61437b9f933SMichal Kazior 	       WMI_SERVICE_CHATTER, len);
615cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID,
61637b9f933SMichal Kazior 	       WMI_SERVICE_COEX_FREQAVOID, len);
617cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
61837b9f933SMichal Kazior 	       WMI_SERVICE_PACKET_POWER_SAVE, len);
619cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG,
62037b9f933SMichal Kazior 	       WMI_SERVICE_FORCE_FW_HANG, len);
621cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_GPIO,
62237b9f933SMichal Kazior 	       WMI_SERVICE_GPIO, len);
623cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
62437b9f933SMichal Kazior 	       WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len);
625cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
62637b9f933SMichal Kazior 	       WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
627cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
62837b9f933SMichal Kazior 	       WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
629cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
63037b9f933SMichal Kazior 	       WMI_SERVICE_STA_KEEP_ALIVE, len);
631cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP,
63237b9f933SMichal Kazior 	       WMI_SERVICE_TX_ENCAP, len);
633cff990ceSMichal Kazior }
634cff990ceSMichal Kazior 
635840357ccSRaja Mani static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out,
636840357ccSRaja Mani 				    size_t len)
637840357ccSRaja Mani {
638840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD,
639840357ccSRaja Mani 	       WMI_SERVICE_BEACON_OFFLOAD, len);
640840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD,
641840357ccSRaja Mani 	       WMI_SERVICE_SCAN_OFFLOAD, len);
642840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD,
643840357ccSRaja Mani 	       WMI_SERVICE_ROAM_OFFLOAD, len);
644840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
645840357ccSRaja Mani 	       WMI_SERVICE_BCN_MISS_OFFLOAD, len);
646840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE,
647840357ccSRaja Mani 	       WMI_SERVICE_STA_PWRSAVE, len);
648840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
649840357ccSRaja Mani 	       WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
650840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AP_UAPSD,
651840357ccSRaja Mani 	       WMI_SERVICE_AP_UAPSD, len);
652840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AP_DFS,
653840357ccSRaja Mani 	       WMI_SERVICE_AP_DFS, len);
654840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_11AC,
655840357ccSRaja Mani 	       WMI_SERVICE_11AC, len);
656840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BLOCKACK,
657840357ccSRaja Mani 	       WMI_SERVICE_BLOCKACK, len);
658840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_PHYERR,
659840357ccSRaja Mani 	       WMI_SERVICE_PHYERR, len);
660840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BCN_FILTER,
661840357ccSRaja Mani 	       WMI_SERVICE_BCN_FILTER, len);
662840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_RTT,
663840357ccSRaja Mani 	       WMI_SERVICE_RTT, len);
664840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_RATECTRL,
665840357ccSRaja Mani 	       WMI_SERVICE_RATECTRL, len);
666840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_WOW,
667840357ccSRaja Mani 	       WMI_SERVICE_WOW, len);
668840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE,
669840357ccSRaja Mani 	       WMI_SERVICE_RATECTRL_CACHE, len);
670840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS,
671840357ccSRaja Mani 	       WMI_SERVICE_IRAM_TIDS, len);
672840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BURST,
673840357ccSRaja Mani 	       WMI_SERVICE_BURST, len);
674840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
675840357ccSRaja Mani 	       WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
676840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD,
677840357ccSRaja Mani 	       WMI_SERVICE_GTK_OFFLOAD, len);
678840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_SCAN_SCH,
679840357ccSRaja Mani 	       WMI_SERVICE_SCAN_SCH, len);
680840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD,
681840357ccSRaja Mani 	       WMI_SERVICE_CSA_OFFLOAD, len);
682840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_CHATTER,
683840357ccSRaja Mani 	       WMI_SERVICE_CHATTER, len);
684840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID,
685840357ccSRaja Mani 	       WMI_SERVICE_COEX_FREQAVOID, len);
686840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE,
687840357ccSRaja Mani 	       WMI_SERVICE_PACKET_POWER_SAVE, len);
688840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG,
689840357ccSRaja Mani 	       WMI_SERVICE_FORCE_FW_HANG, len);
690840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
691840357ccSRaja Mani 	       WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
692840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_GPIO,
693840357ccSRaja Mani 	       WMI_SERVICE_GPIO, len);
694840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
695840357ccSRaja Mani 	       WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
696840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
697840357ccSRaja Mani 	       WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
698840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE,
699840357ccSRaja Mani 	       WMI_SERVICE_STA_KEEP_ALIVE, len);
700840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TX_ENCAP,
701840357ccSRaja Mani 	       WMI_SERVICE_TX_ENCAP, len);
702840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
703840357ccSRaja Mani 	       WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len);
704840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_EARLY_RX,
705840357ccSRaja Mani 	       WMI_SERVICE_EARLY_RX, len);
706840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
707840357ccSRaja Mani 	       WMI_SERVICE_ENHANCED_PROXY_STA, len);
708840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TT,
709840357ccSRaja Mani 	       WMI_SERVICE_TT, len);
710840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_ATF,
711840357ccSRaja Mani 	       WMI_SERVICE_ATF, len);
712840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_PEER_CACHING,
713840357ccSRaja Mani 	       WMI_SERVICE_PEER_CACHING, len);
714840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_COEX_GPIO,
715840357ccSRaja Mani 	       WMI_SERVICE_COEX_GPIO, len);
716840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
717840357ccSRaja Mani 	       WMI_SERVICE_AUX_SPECTRAL_INTF, len);
718840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
719840357ccSRaja Mani 	       WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
720840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
721840357ccSRaja Mani 	       WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
722e3c6225dSVasanthakumar Thiagarajan 	SVCMAP(WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
723e3c6225dSVasanthakumar Thiagarajan 	       WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
7240b3d76e9SPeter Oh 	SVCMAP(WMI_10_4_SERVICE_MESH_NON_11S,
7250b3d76e9SPeter Oh 	       WMI_SERVICE_MESH_NON_11S, len);
726e70e9ba9SPeter Oh 	SVCMAP(WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
727e70e9ba9SPeter Oh 	       WMI_SERVICE_RESTRT_CHNL_SUPPORT, len);
728e70e9ba9SPeter Oh 	SVCMAP(WMI_10_4_SERVICE_PEER_STATS,
729e70e9ba9SPeter Oh 	       WMI_SERVICE_PEER_STATS, len);
730e70e9ba9SPeter Oh 	SVCMAP(WMI_10_4_SERVICE_MESH_11S,
731e70e9ba9SPeter Oh 	       WMI_SERVICE_MESH_11S, len);
73264ed5771STamizh chelvam 	SVCMAP(WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
73364ed5771STamizh chelvam 	       WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, len);
7347e247a9eSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
7357e247a9eSRaja Mani 	       WMI_SERVICE_TX_MODE_PUSH_ONLY, len);
7367e247a9eSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
7377e247a9eSRaja Mani 	       WMI_SERVICE_TX_MODE_PUSH_PULL, len);
7387e247a9eSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
7397e247a9eSRaja Mani 	       WMI_SERVICE_TX_MODE_DYNAMIC, len);
740add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_VDEV_RX_FILTER,
741add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_VDEV_RX_FILTER, len);
742add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_BTCOEX,
743add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_BTCOEX, len);
744add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_CHECK_CAL_VERSION,
745add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_CHECK_CAL_VERSION, len);
746add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_DBGLOG_WARN2,
747add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_DBGLOG_WARN2, len);
748add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
749add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_BTCOEX_DUTY_CYCLE, len);
750add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
751add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_4_WIRE_COEX_SUPPORT, len);
752add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
753add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_EXTENDED_NSS_SUPPORT, len);
754add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
755add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_PROG_GPIO_BAND_SELECT, len);
756add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
757add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_SMART_LOGGING_SUPPORT, len);
758add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS,
759add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS, len);
760add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_OFFCHAN,
761add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_OFFCHAN, len);
762add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
763add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, len);
764add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
765add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, len);
766add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
767add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE, len);
768add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
769add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, len);
77014d65775SBalaji Pothunoori 	SVCMAP(WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
77114d65775SBalaji Pothunoori 	       WMI_SERVICE_TDLS_WIDER_BANDWIDTH, len);
772bc64d052SMaharaja Kennadyrajan 	SVCMAP(WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
773bc64d052SMaharaja Kennadyrajan 	       WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
774bc64d052SMaharaja Kennadyrajan 	SVCMAP(WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
775bc64d052SMaharaja Kennadyrajan 	       WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, len);
776bc64d052SMaharaja Kennadyrajan 	SVCMAP(WMI_10_4_SERVICE_TPC_STATS_FINAL,
777bc64d052SMaharaja Kennadyrajan 	       WMI_SERVICE_TPC_STATS_FINAL, len);
778c7fd8d23SBalaji Pothunoori 	SVCMAP(WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
779c7fd8d23SBalaji Pothunoori 	       WMI_SERVICE_TX_DATA_ACK_RSSI, len);
780840357ccSRaja Mani }
781840357ccSRaja Mani 
782cff990ceSMichal Kazior #undef SVCMAP
7835e3dd157SKalle Valo 
7845e3dd157SKalle Valo /* 2 word representation of MAC addr */
7855e3dd157SKalle Valo struct wmi_mac_addr {
7865e3dd157SKalle Valo 	union {
7875e3dd157SKalle Valo 		u8 addr[6];
7885e3dd157SKalle Valo 		struct {
7895e3dd157SKalle Valo 			u32 word0;
7905e3dd157SKalle Valo 			u32 word1;
7915e3dd157SKalle Valo 		} __packed;
7925e3dd157SKalle Valo 	} __packed;
7935e3dd157SKalle Valo } __packed;
7945e3dd157SKalle Valo 
795ce42870eSBartosz Markowski struct wmi_cmd_map {
796ce42870eSBartosz Markowski 	u32 init_cmdid;
797ce42870eSBartosz Markowski 	u32 start_scan_cmdid;
798ce42870eSBartosz Markowski 	u32 stop_scan_cmdid;
799ce42870eSBartosz Markowski 	u32 scan_chan_list_cmdid;
800ce42870eSBartosz Markowski 	u32 scan_sch_prio_tbl_cmdid;
80160e1d0fbSCarl Huang 	u32 scan_prob_req_oui_cmdid;
802ce42870eSBartosz Markowski 	u32 pdev_set_regdomain_cmdid;
803ce42870eSBartosz Markowski 	u32 pdev_set_channel_cmdid;
804ce42870eSBartosz Markowski 	u32 pdev_set_param_cmdid;
805ce42870eSBartosz Markowski 	u32 pdev_pktlog_enable_cmdid;
806ce42870eSBartosz Markowski 	u32 pdev_pktlog_disable_cmdid;
807ce42870eSBartosz Markowski 	u32 pdev_set_wmm_params_cmdid;
808ce42870eSBartosz Markowski 	u32 pdev_set_ht_cap_ie_cmdid;
809ce42870eSBartosz Markowski 	u32 pdev_set_vht_cap_ie_cmdid;
810ce42870eSBartosz Markowski 	u32 pdev_set_dscp_tid_map_cmdid;
811ce42870eSBartosz Markowski 	u32 pdev_set_quiet_mode_cmdid;
812ce42870eSBartosz Markowski 	u32 pdev_green_ap_ps_enable_cmdid;
813ce42870eSBartosz Markowski 	u32 pdev_get_tpc_config_cmdid;
814ce42870eSBartosz Markowski 	u32 pdev_set_base_macaddr_cmdid;
815ce42870eSBartosz Markowski 	u32 vdev_create_cmdid;
816ce42870eSBartosz Markowski 	u32 vdev_delete_cmdid;
817ce42870eSBartosz Markowski 	u32 vdev_start_request_cmdid;
818ce42870eSBartosz Markowski 	u32 vdev_restart_request_cmdid;
819ce42870eSBartosz Markowski 	u32 vdev_up_cmdid;
820ce42870eSBartosz Markowski 	u32 vdev_stop_cmdid;
821ce42870eSBartosz Markowski 	u32 vdev_down_cmdid;
822ce42870eSBartosz Markowski 	u32 vdev_set_param_cmdid;
823ce42870eSBartosz Markowski 	u32 vdev_install_key_cmdid;
824ce42870eSBartosz Markowski 	u32 peer_create_cmdid;
825ce42870eSBartosz Markowski 	u32 peer_delete_cmdid;
826ce42870eSBartosz Markowski 	u32 peer_flush_tids_cmdid;
827ce42870eSBartosz Markowski 	u32 peer_set_param_cmdid;
828ce42870eSBartosz Markowski 	u32 peer_assoc_cmdid;
829ce42870eSBartosz Markowski 	u32 peer_add_wds_entry_cmdid;
830ce42870eSBartosz Markowski 	u32 peer_remove_wds_entry_cmdid;
831ce42870eSBartosz Markowski 	u32 peer_mcast_group_cmdid;
832ce42870eSBartosz Markowski 	u32 bcn_tx_cmdid;
833ce42870eSBartosz Markowski 	u32 pdev_send_bcn_cmdid;
834ce42870eSBartosz Markowski 	u32 bcn_tmpl_cmdid;
835ce42870eSBartosz Markowski 	u32 bcn_filter_rx_cmdid;
836ce42870eSBartosz Markowski 	u32 prb_req_filter_rx_cmdid;
837ce42870eSBartosz Markowski 	u32 mgmt_tx_cmdid;
8381807da49SRakesh Pillai 	u32 mgmt_tx_send_cmdid;
839ce42870eSBartosz Markowski 	u32 prb_tmpl_cmdid;
840ce42870eSBartosz Markowski 	u32 addba_clear_resp_cmdid;
841ce42870eSBartosz Markowski 	u32 addba_send_cmdid;
842ce42870eSBartosz Markowski 	u32 addba_status_cmdid;
843ce42870eSBartosz Markowski 	u32 delba_send_cmdid;
844ce42870eSBartosz Markowski 	u32 addba_set_resp_cmdid;
845ce42870eSBartosz Markowski 	u32 send_singleamsdu_cmdid;
846ce42870eSBartosz Markowski 	u32 sta_powersave_mode_cmdid;
847ce42870eSBartosz Markowski 	u32 sta_powersave_param_cmdid;
848ce42870eSBartosz Markowski 	u32 sta_mimo_ps_mode_cmdid;
849ce42870eSBartosz Markowski 	u32 pdev_dfs_enable_cmdid;
850ce42870eSBartosz Markowski 	u32 pdev_dfs_disable_cmdid;
851ce42870eSBartosz Markowski 	u32 roam_scan_mode;
852ce42870eSBartosz Markowski 	u32 roam_scan_rssi_threshold;
853ce42870eSBartosz Markowski 	u32 roam_scan_period;
854ce42870eSBartosz Markowski 	u32 roam_scan_rssi_change_threshold;
855ce42870eSBartosz Markowski 	u32 roam_ap_profile;
856ce42870eSBartosz Markowski 	u32 ofl_scan_add_ap_profile;
857ce42870eSBartosz Markowski 	u32 ofl_scan_remove_ap_profile;
858ce42870eSBartosz Markowski 	u32 ofl_scan_period;
859ce42870eSBartosz Markowski 	u32 p2p_dev_set_device_info;
860ce42870eSBartosz Markowski 	u32 p2p_dev_set_discoverability;
861ce42870eSBartosz Markowski 	u32 p2p_go_set_beacon_ie;
862ce42870eSBartosz Markowski 	u32 p2p_go_set_probe_resp_ie;
863ce42870eSBartosz Markowski 	u32 p2p_set_vendor_ie_data_cmdid;
864ce42870eSBartosz Markowski 	u32 ap_ps_peer_param_cmdid;
865ce42870eSBartosz Markowski 	u32 ap_ps_peer_uapsd_coex_cmdid;
866ce42870eSBartosz Markowski 	u32 peer_rate_retry_sched_cmdid;
867ce42870eSBartosz Markowski 	u32 wlan_profile_trigger_cmdid;
868ce42870eSBartosz Markowski 	u32 wlan_profile_set_hist_intvl_cmdid;
869ce42870eSBartosz Markowski 	u32 wlan_profile_get_profile_data_cmdid;
870ce42870eSBartosz Markowski 	u32 wlan_profile_enable_profile_id_cmdid;
871ce42870eSBartosz Markowski 	u32 wlan_profile_list_profile_id_cmdid;
872ce42870eSBartosz Markowski 	u32 pdev_suspend_cmdid;
873ce42870eSBartosz Markowski 	u32 pdev_resume_cmdid;
874ce42870eSBartosz Markowski 	u32 add_bcn_filter_cmdid;
875ce42870eSBartosz Markowski 	u32 rmv_bcn_filter_cmdid;
876ce42870eSBartosz Markowski 	u32 wow_add_wake_pattern_cmdid;
877ce42870eSBartosz Markowski 	u32 wow_del_wake_pattern_cmdid;
878ce42870eSBartosz Markowski 	u32 wow_enable_disable_wake_event_cmdid;
879ce42870eSBartosz Markowski 	u32 wow_enable_cmdid;
880ce42870eSBartosz Markowski 	u32 wow_hostwakeup_from_sleep_cmdid;
881ce42870eSBartosz Markowski 	u32 rtt_measreq_cmdid;
882ce42870eSBartosz Markowski 	u32 rtt_tsf_cmdid;
883ce42870eSBartosz Markowski 	u32 vdev_spectral_scan_configure_cmdid;
884ce42870eSBartosz Markowski 	u32 vdev_spectral_scan_enable_cmdid;
885ce42870eSBartosz Markowski 	u32 request_stats_cmdid;
886ce42870eSBartosz Markowski 	u32 set_arp_ns_offload_cmdid;
887ce42870eSBartosz Markowski 	u32 network_list_offload_config_cmdid;
888ce42870eSBartosz Markowski 	u32 gtk_offload_cmdid;
889ce42870eSBartosz Markowski 	u32 csa_offload_enable_cmdid;
890ce42870eSBartosz Markowski 	u32 csa_offload_chanswitch_cmdid;
891ce42870eSBartosz Markowski 	u32 chatter_set_mode_cmdid;
892ce42870eSBartosz Markowski 	u32 peer_tid_addba_cmdid;
893ce42870eSBartosz Markowski 	u32 peer_tid_delba_cmdid;
894ce42870eSBartosz Markowski 	u32 sta_dtim_ps_method_cmdid;
895ce42870eSBartosz Markowski 	u32 sta_uapsd_auto_trig_cmdid;
896ce42870eSBartosz Markowski 	u32 sta_keepalive_cmd;
897ce42870eSBartosz Markowski 	u32 echo_cmdid;
898ce42870eSBartosz Markowski 	u32 pdev_utf_cmdid;
899ce42870eSBartosz Markowski 	u32 dbglog_cfg_cmdid;
900ce42870eSBartosz Markowski 	u32 pdev_qvit_cmdid;
901ce42870eSBartosz Markowski 	u32 pdev_ftm_intg_cmdid;
902ce42870eSBartosz Markowski 	u32 vdev_set_keepalive_cmdid;
903ce42870eSBartosz Markowski 	u32 vdev_get_keepalive_cmdid;
904ce42870eSBartosz Markowski 	u32 force_fw_hang_cmdid;
905ce42870eSBartosz Markowski 	u32 gpio_config_cmdid;
906ce42870eSBartosz Markowski 	u32 gpio_output_cmdid;
907a57a6a27SRajkumar Manoharan 	u32 pdev_get_temperature_cmdid;
9086d492fe2SMichal Kazior 	u32 vdev_set_wmm_params_cmdid;
909ad45c888SMarek Puzyniak 	u32 tdls_set_state_cmdid;
910ad45c888SMarek Puzyniak 	u32 tdls_peer_update_cmdid;
9115b272e30SMichal Kazior 	u32 adaptive_qcs_cmdid;
9122d491e69SRaja Mani 	u32 scan_update_request_cmdid;
9132d491e69SRaja Mani 	u32 vdev_standby_response_cmdid;
9142d491e69SRaja Mani 	u32 vdev_resume_response_cmdid;
9152d491e69SRaja Mani 	u32 wlan_peer_caching_add_peer_cmdid;
9162d491e69SRaja Mani 	u32 wlan_peer_caching_evict_peer_cmdid;
9172d491e69SRaja Mani 	u32 wlan_peer_caching_restore_peer_cmdid;
9182d491e69SRaja Mani 	u32 wlan_peer_caching_print_all_peers_info_cmdid;
9192d491e69SRaja Mani 	u32 peer_update_wds_entry_cmdid;
9202d491e69SRaja Mani 	u32 peer_add_proxy_sta_entry_cmdid;
9212d491e69SRaja Mani 	u32 rtt_keepalive_cmdid;
9222d491e69SRaja Mani 	u32 oem_req_cmdid;
9232d491e69SRaja Mani 	u32 nan_cmdid;
9242d491e69SRaja Mani 	u32 vdev_ratemask_cmdid;
9252d491e69SRaja Mani 	u32 qboost_cfg_cmdid;
9262d491e69SRaja Mani 	u32 pdev_smart_ant_enable_cmdid;
9272d491e69SRaja Mani 	u32 pdev_smart_ant_set_rx_antenna_cmdid;
9282d491e69SRaja Mani 	u32 peer_smart_ant_set_tx_antenna_cmdid;
9292d491e69SRaja Mani 	u32 peer_smart_ant_set_train_info_cmdid;
9302d491e69SRaja Mani 	u32 peer_smart_ant_set_node_config_ops_cmdid;
9312d491e69SRaja Mani 	u32 pdev_set_antenna_switch_table_cmdid;
9322d491e69SRaja Mani 	u32 pdev_set_ctl_table_cmdid;
9332d491e69SRaja Mani 	u32 pdev_set_mimogain_table_cmdid;
9342d491e69SRaja Mani 	u32 pdev_ratepwr_table_cmdid;
9352d491e69SRaja Mani 	u32 pdev_ratepwr_chainmsk_table_cmdid;
9362d491e69SRaja Mani 	u32 pdev_fips_cmdid;
9372d491e69SRaja Mani 	u32 tt_set_conf_cmdid;
9382d491e69SRaja Mani 	u32 fwtest_cmdid;
9392d491e69SRaja Mani 	u32 vdev_atf_request_cmdid;
9402d491e69SRaja Mani 	u32 peer_atf_request_cmdid;
9412d491e69SRaja Mani 	u32 pdev_get_ani_cck_config_cmdid;
9422d491e69SRaja Mani 	u32 pdev_get_ani_ofdm_config_cmdid;
9432d491e69SRaja Mani 	u32 pdev_reserve_ast_entry_cmdid;
9442d491e69SRaja Mani 	u32 pdev_get_nfcal_power_cmdid;
9452d491e69SRaja Mani 	u32 pdev_get_tpc_cmdid;
9462d491e69SRaja Mani 	u32 pdev_get_ast_info_cmdid;
9472d491e69SRaja Mani 	u32 vdev_set_dscp_tid_map_cmdid;
9482d491e69SRaja Mani 	u32 pdev_get_info_cmdid;
9492d491e69SRaja Mani 	u32 vdev_get_info_cmdid;
9502d491e69SRaja Mani 	u32 vdev_filter_neighbor_rx_packets_cmdid;
9512d491e69SRaja Mani 	u32 mu_cal_start_cmdid;
9522d491e69SRaja Mani 	u32 set_cca_params_cmdid;
9532d491e69SRaja Mani 	u32 pdev_bss_chan_info_request_cmdid;
95462f77f09SMaharaja 	u32 pdev_enable_adaptive_cca_cmdid;
95547771902SRaja Mani 	u32 ext_resource_cfg_cmdid;
956add6cd8dSManikanta Pubbisetty 	u32 vdev_set_ie_cmdid;
957add6cd8dSManikanta Pubbisetty 	u32 set_lteu_config_cmdid;
958add6cd8dSManikanta Pubbisetty 	u32 atf_ssid_grouping_request_cmdid;
959add6cd8dSManikanta Pubbisetty 	u32 peer_atf_ext_request_cmdid;
960add6cd8dSManikanta Pubbisetty 	u32 set_periodic_channel_stats_cfg_cmdid;
961add6cd8dSManikanta Pubbisetty 	u32 peer_bwf_request_cmdid;
962add6cd8dSManikanta Pubbisetty 	u32 btcoex_cfg_cmdid;
963add6cd8dSManikanta Pubbisetty 	u32 peer_tx_mu_txmit_count_cmdid;
964add6cd8dSManikanta Pubbisetty 	u32 peer_tx_mu_txmit_rstcnt_cmdid;
965add6cd8dSManikanta Pubbisetty 	u32 peer_gid_userpos_list_cmdid;
966add6cd8dSManikanta Pubbisetty 	u32 pdev_check_cal_version_cmdid;
967add6cd8dSManikanta Pubbisetty 	u32 coex_version_cfg_cmid;
968add6cd8dSManikanta Pubbisetty 	u32 pdev_get_rx_filter_cmdid;
969add6cd8dSManikanta Pubbisetty 	u32 pdev_extended_nss_cfg_cmdid;
970add6cd8dSManikanta Pubbisetty 	u32 vdev_set_scan_nac_rssi_cmdid;
971add6cd8dSManikanta Pubbisetty 	u32 prog_gpio_band_select_cmdid;
972add6cd8dSManikanta Pubbisetty 	u32 config_smart_logging_cmdid;
973add6cd8dSManikanta Pubbisetty 	u32 debug_fatal_condition_cmdid;
974add6cd8dSManikanta Pubbisetty 	u32 get_tsf_timer_cmdid;
975add6cd8dSManikanta Pubbisetty 	u32 pdev_get_tpc_table_cmdid;
976add6cd8dSManikanta Pubbisetty 	u32 vdev_sifs_trigger_time_cmdid;
977add6cd8dSManikanta Pubbisetty 	u32 pdev_wds_entry_list_cmdid;
978add6cd8dSManikanta Pubbisetty 	u32 tdls_set_offchan_mode_cmdid;
9796f6eb1bcSSriram R 	u32 radar_found_cmdid;
980ce42870eSBartosz Markowski };
981ce42870eSBartosz Markowski 
9825e3dd157SKalle Valo /*
9835e3dd157SKalle Valo  * wmi command groups.
9845e3dd157SKalle Valo  */
9855e3dd157SKalle Valo enum wmi_cmd_group {
9865e3dd157SKalle Valo 	/* 0 to 2 are reserved */
9875e3dd157SKalle Valo 	WMI_GRP_START = 0x3,
9885e3dd157SKalle Valo 	WMI_GRP_SCAN = WMI_GRP_START,
9895e3dd157SKalle Valo 	WMI_GRP_PDEV,
9905e3dd157SKalle Valo 	WMI_GRP_VDEV,
9915e3dd157SKalle Valo 	WMI_GRP_PEER,
9925e3dd157SKalle Valo 	WMI_GRP_MGMT,
9935e3dd157SKalle Valo 	WMI_GRP_BA_NEG,
9945e3dd157SKalle Valo 	WMI_GRP_STA_PS,
9955e3dd157SKalle Valo 	WMI_GRP_DFS,
9965e3dd157SKalle Valo 	WMI_GRP_ROAM,
9975e3dd157SKalle Valo 	WMI_GRP_OFL_SCAN,
9985e3dd157SKalle Valo 	WMI_GRP_P2P,
9995e3dd157SKalle Valo 	WMI_GRP_AP_PS,
10005e3dd157SKalle Valo 	WMI_GRP_RATE_CTRL,
10015e3dd157SKalle Valo 	WMI_GRP_PROFILE,
10025e3dd157SKalle Valo 	WMI_GRP_SUSPEND,
10035e3dd157SKalle Valo 	WMI_GRP_BCN_FILTER,
10045e3dd157SKalle Valo 	WMI_GRP_WOW,
10055e3dd157SKalle Valo 	WMI_GRP_RTT,
10065e3dd157SKalle Valo 	WMI_GRP_SPECTRAL,
10075e3dd157SKalle Valo 	WMI_GRP_STATS,
10085e3dd157SKalle Valo 	WMI_GRP_ARP_NS_OFL,
10095e3dd157SKalle Valo 	WMI_GRP_NLO_OFL,
10105e3dd157SKalle Valo 	WMI_GRP_GTK_OFL,
10115e3dd157SKalle Valo 	WMI_GRP_CSA_OFL,
10125e3dd157SKalle Valo 	WMI_GRP_CHATTER,
10135e3dd157SKalle Valo 	WMI_GRP_TID_ADDBA,
10145e3dd157SKalle Valo 	WMI_GRP_MISC,
10155e3dd157SKalle Valo 	WMI_GRP_GPIO,
10165e3dd157SKalle Valo };
10175e3dd157SKalle Valo 
10185e3dd157SKalle Valo #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
10195e3dd157SKalle Valo #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
10205e3dd157SKalle Valo 
102134957b25SBartosz Markowski #define WMI_CMD_UNSUPPORTED 0
1022b7e3adf9SBartosz Markowski 
1023b7e3adf9SBartosz Markowski /* Command IDs and command events for MAIN FW. */
10245e3dd157SKalle Valo enum wmi_cmd_id {
10255e3dd157SKalle Valo 	WMI_INIT_CMDID = 0x1,
10265e3dd157SKalle Valo 
10275e3dd157SKalle Valo 	/* Scan specific commands */
10285e3dd157SKalle Valo 	WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN),
10295e3dd157SKalle Valo 	WMI_STOP_SCAN_CMDID,
10305e3dd157SKalle Valo 	WMI_SCAN_CHAN_LIST_CMDID,
10315e3dd157SKalle Valo 	WMI_SCAN_SCH_PRIO_TBL_CMDID,
10325e3dd157SKalle Valo 
10335e3dd157SKalle Valo 	/* PDEV (physical device) specific commands */
10345e3dd157SKalle Valo 	WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV),
10355e3dd157SKalle Valo 	WMI_PDEV_SET_CHANNEL_CMDID,
10365e3dd157SKalle Valo 	WMI_PDEV_SET_PARAM_CMDID,
10375e3dd157SKalle Valo 	WMI_PDEV_PKTLOG_ENABLE_CMDID,
10385e3dd157SKalle Valo 	WMI_PDEV_PKTLOG_DISABLE_CMDID,
10395e3dd157SKalle Valo 	WMI_PDEV_SET_WMM_PARAMS_CMDID,
10405e3dd157SKalle Valo 	WMI_PDEV_SET_HT_CAP_IE_CMDID,
10415e3dd157SKalle Valo 	WMI_PDEV_SET_VHT_CAP_IE_CMDID,
10425e3dd157SKalle Valo 	WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
10435e3dd157SKalle Valo 	WMI_PDEV_SET_QUIET_MODE_CMDID,
10445e3dd157SKalle Valo 	WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
10455e3dd157SKalle Valo 	WMI_PDEV_GET_TPC_CONFIG_CMDID,
10465e3dd157SKalle Valo 	WMI_PDEV_SET_BASE_MACADDR_CMDID,
10475e3dd157SKalle Valo 
10485e3dd157SKalle Valo 	/* VDEV (virtual device) specific commands */
10495e3dd157SKalle Valo 	WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV),
10505e3dd157SKalle Valo 	WMI_VDEV_DELETE_CMDID,
10515e3dd157SKalle Valo 	WMI_VDEV_START_REQUEST_CMDID,
10525e3dd157SKalle Valo 	WMI_VDEV_RESTART_REQUEST_CMDID,
10535e3dd157SKalle Valo 	WMI_VDEV_UP_CMDID,
10545e3dd157SKalle Valo 	WMI_VDEV_STOP_CMDID,
10555e3dd157SKalle Valo 	WMI_VDEV_DOWN_CMDID,
10565e3dd157SKalle Valo 	WMI_VDEV_SET_PARAM_CMDID,
10575e3dd157SKalle Valo 	WMI_VDEV_INSTALL_KEY_CMDID,
10585e3dd157SKalle Valo 
10595e3dd157SKalle Valo 	/* peer specific commands */
10605e3dd157SKalle Valo 	WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER),
10615e3dd157SKalle Valo 	WMI_PEER_DELETE_CMDID,
10625e3dd157SKalle Valo 	WMI_PEER_FLUSH_TIDS_CMDID,
10635e3dd157SKalle Valo 	WMI_PEER_SET_PARAM_CMDID,
10645e3dd157SKalle Valo 	WMI_PEER_ASSOC_CMDID,
10655e3dd157SKalle Valo 	WMI_PEER_ADD_WDS_ENTRY_CMDID,
10665e3dd157SKalle Valo 	WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
10675e3dd157SKalle Valo 	WMI_PEER_MCAST_GROUP_CMDID,
10685e3dd157SKalle Valo 
10695e3dd157SKalle Valo 	/* beacon/management specific commands */
10705e3dd157SKalle Valo 	WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT),
10715e3dd157SKalle Valo 	WMI_PDEV_SEND_BCN_CMDID,
10725e3dd157SKalle Valo 	WMI_BCN_TMPL_CMDID,
10735e3dd157SKalle Valo 	WMI_BCN_FILTER_RX_CMDID,
10745e3dd157SKalle Valo 	WMI_PRB_REQ_FILTER_RX_CMDID,
10755e3dd157SKalle Valo 	WMI_MGMT_TX_CMDID,
10765e3dd157SKalle Valo 	WMI_PRB_TMPL_CMDID,
10775e3dd157SKalle Valo 
10785e3dd157SKalle Valo 	/* commands to directly control BA negotiation directly from host. */
10795e3dd157SKalle Valo 	WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG),
10805e3dd157SKalle Valo 	WMI_ADDBA_SEND_CMDID,
10815e3dd157SKalle Valo 	WMI_ADDBA_STATUS_CMDID,
10825e3dd157SKalle Valo 	WMI_DELBA_SEND_CMDID,
10835e3dd157SKalle Valo 	WMI_ADDBA_SET_RESP_CMDID,
10845e3dd157SKalle Valo 	WMI_SEND_SINGLEAMSDU_CMDID,
10855e3dd157SKalle Valo 
10865e3dd157SKalle Valo 	/* Station power save specific config */
10875e3dd157SKalle Valo 	WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS),
10885e3dd157SKalle Valo 	WMI_STA_POWERSAVE_PARAM_CMDID,
10895e3dd157SKalle Valo 	WMI_STA_MIMO_PS_MODE_CMDID,
10905e3dd157SKalle Valo 
10915e3dd157SKalle Valo 	/** DFS-specific commands */
10925e3dd157SKalle Valo 	WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS),
10935e3dd157SKalle Valo 	WMI_PDEV_DFS_DISABLE_CMDID,
10945e3dd157SKalle Valo 
10955e3dd157SKalle Valo 	/* Roaming specific  commands */
10965e3dd157SKalle Valo 	WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM),
10975e3dd157SKalle Valo 	WMI_ROAM_SCAN_RSSI_THRESHOLD,
10985e3dd157SKalle Valo 	WMI_ROAM_SCAN_PERIOD,
10995e3dd157SKalle Valo 	WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
11005e3dd157SKalle Valo 	WMI_ROAM_AP_PROFILE,
11015e3dd157SKalle Valo 
11025e3dd157SKalle Valo 	/* offload scan specific commands */
11035e3dd157SKalle Valo 	WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN),
11045e3dd157SKalle Valo 	WMI_OFL_SCAN_REMOVE_AP_PROFILE,
11055e3dd157SKalle Valo 	WMI_OFL_SCAN_PERIOD,
11065e3dd157SKalle Valo 
11075e3dd157SKalle Valo 	/* P2P specific commands */
11085e3dd157SKalle Valo 	WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P),
11095e3dd157SKalle Valo 	WMI_P2P_DEV_SET_DISCOVERABILITY,
11105e3dd157SKalle Valo 	WMI_P2P_GO_SET_BEACON_IE,
11115e3dd157SKalle Valo 	WMI_P2P_GO_SET_PROBE_RESP_IE,
11125e3dd157SKalle Valo 	WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
11135e3dd157SKalle Valo 
11145e3dd157SKalle Valo 	/* AP power save specific config */
11155e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS),
11165e3dd157SKalle Valo 	WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
11175e3dd157SKalle Valo 
11185e3dd157SKalle Valo 	/* Rate-control specific commands */
11195e3dd157SKalle Valo 	WMI_PEER_RATE_RETRY_SCHED_CMDID =
11205e3dd157SKalle Valo 	WMI_CMD_GRP(WMI_GRP_RATE_CTRL),
11215e3dd157SKalle Valo 
11225e3dd157SKalle Valo 	/* WLAN Profiling commands. */
11235e3dd157SKalle Valo 	WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE),
11245e3dd157SKalle Valo 	WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
11255e3dd157SKalle Valo 	WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
11265e3dd157SKalle Valo 	WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
11275e3dd157SKalle Valo 	WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
11285e3dd157SKalle Valo 
11295e3dd157SKalle Valo 	/* Suspend resume command Ids */
11305e3dd157SKalle Valo 	WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND),
11315e3dd157SKalle Valo 	WMI_PDEV_RESUME_CMDID,
11325e3dd157SKalle Valo 
11335e3dd157SKalle Valo 	/* Beacon filter commands */
11345e3dd157SKalle Valo 	WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER),
11355e3dd157SKalle Valo 	WMI_RMV_BCN_FILTER_CMDID,
11365e3dd157SKalle Valo 
11375e3dd157SKalle Valo 	/* WOW Specific WMI commands*/
11385e3dd157SKalle Valo 	WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW),
11395e3dd157SKalle Valo 	WMI_WOW_DEL_WAKE_PATTERN_CMDID,
11405e3dd157SKalle Valo 	WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
11415e3dd157SKalle Valo 	WMI_WOW_ENABLE_CMDID,
11425e3dd157SKalle Valo 	WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
11435e3dd157SKalle Valo 
11445e3dd157SKalle Valo 	/* RTT measurement related cmd */
11455e3dd157SKalle Valo 	WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT),
11465e3dd157SKalle Valo 	WMI_RTT_TSF_CMDID,
11475e3dd157SKalle Valo 
11485e3dd157SKalle Valo 	/* spectral scan commands */
11495e3dd157SKalle Valo 	WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL),
11505e3dd157SKalle Valo 	WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
11515e3dd157SKalle Valo 
11525e3dd157SKalle Valo 	/* F/W stats */
11535e3dd157SKalle Valo 	WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS),
11545e3dd157SKalle Valo 
11555e3dd157SKalle Valo 	/* ARP OFFLOAD REQUEST*/
11565e3dd157SKalle Valo 	WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL),
11575e3dd157SKalle Valo 
11585e3dd157SKalle Valo 	/* NS offload confid*/
11595e3dd157SKalle Valo 	WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL),
11605e3dd157SKalle Valo 
11615e3dd157SKalle Valo 	/* GTK offload Specific WMI commands*/
11625e3dd157SKalle Valo 	WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL),
11635e3dd157SKalle Valo 
11645e3dd157SKalle Valo 	/* CSA offload Specific WMI commands*/
11655e3dd157SKalle Valo 	WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL),
11665e3dd157SKalle Valo 	WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
11675e3dd157SKalle Valo 
11685e3dd157SKalle Valo 	/* Chatter commands*/
11695e3dd157SKalle Valo 	WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER),
11705e3dd157SKalle Valo 
11715e3dd157SKalle Valo 	/* addba specific commands */
11725e3dd157SKalle Valo 	WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA),
11735e3dd157SKalle Valo 	WMI_PEER_TID_DELBA_CMDID,
11745e3dd157SKalle Valo 
11755e3dd157SKalle Valo 	/* set station mimo powersave method */
11765e3dd157SKalle Valo 	WMI_STA_DTIM_PS_METHOD_CMDID,
11775e3dd157SKalle Valo 	/* Configure the Station UAPSD AC Auto Trigger Parameters */
11785e3dd157SKalle Valo 	WMI_STA_UAPSD_AUTO_TRIG_CMDID,
11795e3dd157SKalle Valo 
11805e3dd157SKalle Valo 	/* STA Keep alive parameter configuration,
118137ff1b0dSMarcin Rokicki 	 * Requires WMI_SERVICE_STA_KEEP_ALIVE
118237ff1b0dSMarcin Rokicki 	 */
11835e3dd157SKalle Valo 	WMI_STA_KEEPALIVE_CMD,
11845e3dd157SKalle Valo 
11855e3dd157SKalle Valo 	/* misc command group */
11865e3dd157SKalle Valo 	WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC),
11875e3dd157SKalle Valo 	WMI_PDEV_UTF_CMDID,
11885e3dd157SKalle Valo 	WMI_DBGLOG_CFG_CMDID,
11895e3dd157SKalle Valo 	WMI_PDEV_QVIT_CMDID,
11905e3dd157SKalle Valo 	WMI_PDEV_FTM_INTG_CMDID,
11915e3dd157SKalle Valo 	WMI_VDEV_SET_KEEPALIVE_CMDID,
11925e3dd157SKalle Valo 	WMI_VDEV_GET_KEEPALIVE_CMDID,
11939cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_CMDID,
11945e3dd157SKalle Valo 
11955e3dd157SKalle Valo 	/* GPIO Configuration */
11965e3dd157SKalle Valo 	WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO),
11975e3dd157SKalle Valo 	WMI_GPIO_OUTPUT_CMDID,
11985e3dd157SKalle Valo };
11995e3dd157SKalle Valo 
12005e3dd157SKalle Valo enum wmi_event_id {
12015e3dd157SKalle Valo 	WMI_SERVICE_READY_EVENTID = 0x1,
12025e3dd157SKalle Valo 	WMI_READY_EVENTID,
1203cea19a6cSCarl Huang 	WMI_SERVICE_AVAILABLE_EVENTID,
12045e3dd157SKalle Valo 
12055e3dd157SKalle Valo 	/* Scan specific events */
12065e3dd157SKalle Valo 	WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
12075e3dd157SKalle Valo 
12085e3dd157SKalle Valo 	/* PDEV specific events */
12095e3dd157SKalle Valo 	WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
12105e3dd157SKalle Valo 	WMI_CHAN_INFO_EVENTID,
12115e3dd157SKalle Valo 	WMI_PHYERR_EVENTID,
12125e3dd157SKalle Valo 
12135e3dd157SKalle Valo 	/* VDEV specific events */
12145e3dd157SKalle Valo 	WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
12155e3dd157SKalle Valo 	WMI_VDEV_STOPPED_EVENTID,
12165e3dd157SKalle Valo 	WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
12175e3dd157SKalle Valo 
12185e3dd157SKalle Valo 	/* peer specific events */
12195e3dd157SKalle Valo 	WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
12205e3dd157SKalle Valo 
12215e3dd157SKalle Valo 	/* beacon/mgmt specific events */
12225e3dd157SKalle Valo 	WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
12235e3dd157SKalle Valo 	WMI_HOST_SWBA_EVENTID,
12245e3dd157SKalle Valo 	WMI_TBTTOFFSET_UPDATE_EVENTID,
12255e3dd157SKalle Valo 
12265e3dd157SKalle Valo 	/* ADDBA Related WMI Events*/
12275e3dd157SKalle Valo 	WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
12285e3dd157SKalle Valo 	WMI_TX_ADDBA_COMPLETE_EVENTID,
12295e3dd157SKalle Valo 
12305e3dd157SKalle Valo 	/* Roam event to trigger roaming on host */
12315e3dd157SKalle Valo 	WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
12325e3dd157SKalle Valo 	WMI_PROFILE_MATCH,
12335e3dd157SKalle Valo 
12345e3dd157SKalle Valo 	/* WoW */
12355e3dd157SKalle Valo 	WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
12365e3dd157SKalle Valo 
12375e3dd157SKalle Valo 	/* RTT */
12385e3dd157SKalle Valo 	WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
12395e3dd157SKalle Valo 	WMI_TSF_MEASUREMENT_REPORT_EVENTID,
12405e3dd157SKalle Valo 	WMI_RTT_ERROR_REPORT_EVENTID,
12415e3dd157SKalle Valo 
12425e3dd157SKalle Valo 	/* GTK offload */
12435e3dd157SKalle Valo 	WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
12445e3dd157SKalle Valo 	WMI_GTK_REKEY_FAIL_EVENTID,
12455e3dd157SKalle Valo 
12465e3dd157SKalle Valo 	/* CSA IE received event */
12475e3dd157SKalle Valo 	WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
12485e3dd157SKalle Valo 
12495e3dd157SKalle Valo 	/* Misc events */
12505e3dd157SKalle Valo 	WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
12515e3dd157SKalle Valo 	WMI_PDEV_UTF_EVENTID,
12525e3dd157SKalle Valo 	WMI_DEBUG_MESG_EVENTID,
12535e3dd157SKalle Valo 	WMI_UPDATE_STATS_EVENTID,
12545e3dd157SKalle Valo 	WMI_DEBUG_PRINT_EVENTID,
12555e3dd157SKalle Valo 	WMI_DCS_INTERFERENCE_EVENTID,
12565e3dd157SKalle Valo 	WMI_PDEV_QVIT_EVENTID,
12575e3dd157SKalle Valo 	WMI_WLAN_PROFILE_DATA_EVENTID,
12585e3dd157SKalle Valo 	WMI_PDEV_FTM_INTG_EVENTID,
12595e3dd157SKalle Valo 	WMI_WLAN_FREQ_AVOID_EVENTID,
12605e3dd157SKalle Valo 	WMI_VDEV_GET_KEEPALIVE_EVENTID,
12615e3dd157SKalle Valo 
12625e3dd157SKalle Valo 	/* GPIO Event */
12635e3dd157SKalle Valo 	WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
12645e3dd157SKalle Valo };
12655e3dd157SKalle Valo 
1266b7e3adf9SBartosz Markowski /* Command IDs and command events for 10.X firmware */
1267b7e3adf9SBartosz Markowski enum wmi_10x_cmd_id {
1268b7e3adf9SBartosz Markowski 	WMI_10X_START_CMDID = 0x9000,
1269b7e3adf9SBartosz Markowski 	WMI_10X_END_CMDID = 0x9FFF,
1270b7e3adf9SBartosz Markowski 
1271b7e3adf9SBartosz Markowski 	/* initialize the wlan sub system */
1272b7e3adf9SBartosz Markowski 	WMI_10X_INIT_CMDID,
1273b7e3adf9SBartosz Markowski 
1274b7e3adf9SBartosz Markowski 	/* Scan specific commands */
1275b7e3adf9SBartosz Markowski 
1276b7e3adf9SBartosz Markowski 	WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID,
1277b7e3adf9SBartosz Markowski 	WMI_10X_STOP_SCAN_CMDID,
1278b7e3adf9SBartosz Markowski 	WMI_10X_SCAN_CHAN_LIST_CMDID,
1279b7e3adf9SBartosz Markowski 	WMI_10X_ECHO_CMDID,
1280b7e3adf9SBartosz Markowski 
1281b7e3adf9SBartosz Markowski 	/* PDEV(physical device) specific commands */
1282b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
1283b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_CHANNEL_CMDID,
1284b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_PARAM_CMDID,
1285b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
1286b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
1287b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
1288b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
1289b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
1290b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
1291b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
1292b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
1293b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1294b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
1295b7e3adf9SBartosz Markowski 
1296b7e3adf9SBartosz Markowski 	/* VDEV(virtual device) specific commands */
1297b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_CREATE_CMDID,
1298b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_DELETE_CMDID,
1299b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_START_REQUEST_CMDID,
1300b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_RESTART_REQUEST_CMDID,
1301b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_UP_CMDID,
1302b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_STOP_CMDID,
1303b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_DOWN_CMDID,
1304b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_STANDBY_RESPONSE_CMDID,
1305b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_RESUME_RESPONSE_CMDID,
1306b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_SET_PARAM_CMDID,
1307b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_INSTALL_KEY_CMDID,
1308b7e3adf9SBartosz Markowski 
1309b7e3adf9SBartosz Markowski 	/* peer specific commands */
1310b7e3adf9SBartosz Markowski 	WMI_10X_PEER_CREATE_CMDID,
1311b7e3adf9SBartosz Markowski 	WMI_10X_PEER_DELETE_CMDID,
1312b7e3adf9SBartosz Markowski 	WMI_10X_PEER_FLUSH_TIDS_CMDID,
1313b7e3adf9SBartosz Markowski 	WMI_10X_PEER_SET_PARAM_CMDID,
1314b7e3adf9SBartosz Markowski 	WMI_10X_PEER_ASSOC_CMDID,
1315b7e3adf9SBartosz Markowski 	WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
1316b7e3adf9SBartosz Markowski 	WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
1317b7e3adf9SBartosz Markowski 	WMI_10X_PEER_MCAST_GROUP_CMDID,
1318b7e3adf9SBartosz Markowski 
1319b7e3adf9SBartosz Markowski 	/* beacon/management specific commands */
1320b7e3adf9SBartosz Markowski 
1321b7e3adf9SBartosz Markowski 	WMI_10X_BCN_TX_CMDID,
1322b7e3adf9SBartosz Markowski 	WMI_10X_BCN_PRB_TMPL_CMDID,
1323b7e3adf9SBartosz Markowski 	WMI_10X_BCN_FILTER_RX_CMDID,
1324b7e3adf9SBartosz Markowski 	WMI_10X_PRB_REQ_FILTER_RX_CMDID,
1325b7e3adf9SBartosz Markowski 	WMI_10X_MGMT_TX_CMDID,
1326b7e3adf9SBartosz Markowski 
1327b7e3adf9SBartosz Markowski 	/* commands to directly control ba negotiation directly from host. */
1328b7e3adf9SBartosz Markowski 	WMI_10X_ADDBA_CLEAR_RESP_CMDID,
1329b7e3adf9SBartosz Markowski 	WMI_10X_ADDBA_SEND_CMDID,
1330b7e3adf9SBartosz Markowski 	WMI_10X_ADDBA_STATUS_CMDID,
1331b7e3adf9SBartosz Markowski 	WMI_10X_DELBA_SEND_CMDID,
1332b7e3adf9SBartosz Markowski 	WMI_10X_ADDBA_SET_RESP_CMDID,
1333b7e3adf9SBartosz Markowski 	WMI_10X_SEND_SINGLEAMSDU_CMDID,
1334b7e3adf9SBartosz Markowski 
1335b7e3adf9SBartosz Markowski 	/* Station power save specific config */
1336b7e3adf9SBartosz Markowski 	WMI_10X_STA_POWERSAVE_MODE_CMDID,
1337b7e3adf9SBartosz Markowski 	WMI_10X_STA_POWERSAVE_PARAM_CMDID,
1338b7e3adf9SBartosz Markowski 	WMI_10X_STA_MIMO_PS_MODE_CMDID,
1339b7e3adf9SBartosz Markowski 
1340b7e3adf9SBartosz Markowski 	/* set debug log config */
1341b7e3adf9SBartosz Markowski 	WMI_10X_DBGLOG_CFG_CMDID,
1342b7e3adf9SBartosz Markowski 
1343b7e3adf9SBartosz Markowski 	/* DFS-specific commands */
1344b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_DFS_ENABLE_CMDID,
1345b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_DFS_DISABLE_CMDID,
1346b7e3adf9SBartosz Markowski 
1347b7e3adf9SBartosz Markowski 	/* QVIT specific command id */
1348b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_QVIT_CMDID,
1349b7e3adf9SBartosz Markowski 
1350b7e3adf9SBartosz Markowski 	/* Offload Scan and Roaming related  commands */
1351b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_SCAN_MODE,
1352b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
1353b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_SCAN_PERIOD,
1354b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1355b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_AP_PROFILE,
1356b7e3adf9SBartosz Markowski 	WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
1357b7e3adf9SBartosz Markowski 	WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
1358b7e3adf9SBartosz Markowski 	WMI_10X_OFL_SCAN_PERIOD,
1359b7e3adf9SBartosz Markowski 
1360b7e3adf9SBartosz Markowski 	/* P2P specific commands */
1361b7e3adf9SBartosz Markowski 	WMI_10X_P2P_DEV_SET_DEVICE_INFO,
1362b7e3adf9SBartosz Markowski 	WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
1363b7e3adf9SBartosz Markowski 	WMI_10X_P2P_GO_SET_BEACON_IE,
1364b7e3adf9SBartosz Markowski 	WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
1365b7e3adf9SBartosz Markowski 
1366b7e3adf9SBartosz Markowski 	/* AP power save specific config */
1367b7e3adf9SBartosz Markowski 	WMI_10X_AP_PS_PEER_PARAM_CMDID,
1368b7e3adf9SBartosz Markowski 	WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID,
1369b7e3adf9SBartosz Markowski 
1370b7e3adf9SBartosz Markowski 	/* Rate-control specific commands */
1371b7e3adf9SBartosz Markowski 	WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
1372b7e3adf9SBartosz Markowski 
1373b7e3adf9SBartosz Markowski 	/* WLAN Profiling commands. */
1374b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
1375b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1376b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1377b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1378b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1379b7e3adf9SBartosz Markowski 
1380b7e3adf9SBartosz Markowski 	/* Suspend resume command Ids */
1381b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SUSPEND_CMDID,
1382b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_RESUME_CMDID,
1383b7e3adf9SBartosz Markowski 
1384b7e3adf9SBartosz Markowski 	/* Beacon filter commands */
1385b7e3adf9SBartosz Markowski 	WMI_10X_ADD_BCN_FILTER_CMDID,
1386b7e3adf9SBartosz Markowski 	WMI_10X_RMV_BCN_FILTER_CMDID,
1387b7e3adf9SBartosz Markowski 
1388b7e3adf9SBartosz Markowski 	/* WOW Specific WMI commands*/
1389b7e3adf9SBartosz Markowski 	WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
1390b7e3adf9SBartosz Markowski 	WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
1391b7e3adf9SBartosz Markowski 	WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1392b7e3adf9SBartosz Markowski 	WMI_10X_WOW_ENABLE_CMDID,
1393b7e3adf9SBartosz Markowski 	WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1394b7e3adf9SBartosz Markowski 
1395b7e3adf9SBartosz Markowski 	/* RTT measurement related cmd */
1396b7e3adf9SBartosz Markowski 	WMI_10X_RTT_MEASREQ_CMDID,
1397b7e3adf9SBartosz Markowski 	WMI_10X_RTT_TSF_CMDID,
1398b7e3adf9SBartosz Markowski 
1399b7e3adf9SBartosz Markowski 	/* transmit beacon by value */
1400b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SEND_BCN_CMDID,
1401b7e3adf9SBartosz Markowski 
1402b7e3adf9SBartosz Markowski 	/* F/W stats */
1403b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1404b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1405b7e3adf9SBartosz Markowski 	WMI_10X_REQUEST_STATS_CMDID,
1406b7e3adf9SBartosz Markowski 
1407b7e3adf9SBartosz Markowski 	/* GPIO Configuration */
1408b7e3adf9SBartosz Markowski 	WMI_10X_GPIO_CONFIG_CMDID,
1409b7e3adf9SBartosz Markowski 	WMI_10X_GPIO_OUTPUT_CMDID,
1410b7e3adf9SBartosz Markowski 
1411b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1,
1412b7e3adf9SBartosz Markowski };
1413b7e3adf9SBartosz Markowski 
1414b7e3adf9SBartosz Markowski enum wmi_10x_event_id {
1415b7e3adf9SBartosz Markowski 	WMI_10X_SERVICE_READY_EVENTID = 0x8000,
1416b7e3adf9SBartosz Markowski 	WMI_10X_READY_EVENTID,
1417b7e3adf9SBartosz Markowski 	WMI_10X_START_EVENTID = 0x9000,
1418b7e3adf9SBartosz Markowski 	WMI_10X_END_EVENTID = 0x9FFF,
1419b7e3adf9SBartosz Markowski 
1420b7e3adf9SBartosz Markowski 	/* Scan specific events */
1421b7e3adf9SBartosz Markowski 	WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID,
1422b7e3adf9SBartosz Markowski 	WMI_10X_ECHO_EVENTID,
1423b7e3adf9SBartosz Markowski 	WMI_10X_DEBUG_MESG_EVENTID,
1424b7e3adf9SBartosz Markowski 	WMI_10X_UPDATE_STATS_EVENTID,
1425b7e3adf9SBartosz Markowski 
1426b7e3adf9SBartosz Markowski 	/* Instantaneous RSSI event */
1427b7e3adf9SBartosz Markowski 	WMI_10X_INST_RSSI_STATS_EVENTID,
1428b7e3adf9SBartosz Markowski 
1429b7e3adf9SBartosz Markowski 	/* VDEV specific events */
1430b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_START_RESP_EVENTID,
1431b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_STANDBY_REQ_EVENTID,
1432b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_RESUME_REQ_EVENTID,
1433b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_STOPPED_EVENTID,
1434b7e3adf9SBartosz Markowski 
1435b7e3adf9SBartosz Markowski 	/* peer  specific events */
1436b7e3adf9SBartosz Markowski 	WMI_10X_PEER_STA_KICKOUT_EVENTID,
1437b7e3adf9SBartosz Markowski 
1438b7e3adf9SBartosz Markowski 	/* beacon/mgmt specific events */
1439b7e3adf9SBartosz Markowski 	WMI_10X_HOST_SWBA_EVENTID,
1440b7e3adf9SBartosz Markowski 	WMI_10X_TBTTOFFSET_UPDATE_EVENTID,
1441b7e3adf9SBartosz Markowski 	WMI_10X_MGMT_RX_EVENTID,
1442b7e3adf9SBartosz Markowski 
1443b7e3adf9SBartosz Markowski 	/* Channel stats event */
1444b7e3adf9SBartosz Markowski 	WMI_10X_CHAN_INFO_EVENTID,
1445b7e3adf9SBartosz Markowski 
1446b7e3adf9SBartosz Markowski 	/* PHY Error specific WMI event */
1447b7e3adf9SBartosz Markowski 	WMI_10X_PHYERR_EVENTID,
1448b7e3adf9SBartosz Markowski 
1449b7e3adf9SBartosz Markowski 	/* Roam event to trigger roaming on host */
1450b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_EVENTID,
1451b7e3adf9SBartosz Markowski 
1452b7e3adf9SBartosz Markowski 	/* matching AP found from list of profiles */
1453b7e3adf9SBartosz Markowski 	WMI_10X_PROFILE_MATCH,
1454b7e3adf9SBartosz Markowski 
1455b7e3adf9SBartosz Markowski 	/* debug print message used for tracing FW code while debugging */
1456b7e3adf9SBartosz Markowski 	WMI_10X_DEBUG_PRINT_EVENTID,
1457b7e3adf9SBartosz Markowski 	/* VI spoecific event */
1458b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_QVIT_EVENTID,
1459b7e3adf9SBartosz Markowski 	/* FW code profile data in response to profile request */
1460b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_DATA_EVENTID,
1461b7e3adf9SBartosz Markowski 
1462b7e3adf9SBartosz Markowski 	/*RTT related event ID*/
1463b7e3adf9SBartosz Markowski 	WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID,
1464b7e3adf9SBartosz Markowski 	WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID,
1465b7e3adf9SBartosz Markowski 	WMI_10X_RTT_ERROR_REPORT_EVENTID,
1466b7e3adf9SBartosz Markowski 
1467b7e3adf9SBartosz Markowski 	WMI_10X_WOW_WAKEUP_HOST_EVENTID,
1468b7e3adf9SBartosz Markowski 	WMI_10X_DCS_INTERFERENCE_EVENTID,
1469b7e3adf9SBartosz Markowski 
1470b7e3adf9SBartosz Markowski 	/* TPC config for the current operating channel */
1471b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_TPC_CONFIG_EVENTID,
1472b7e3adf9SBartosz Markowski 
1473b7e3adf9SBartosz Markowski 	WMI_10X_GPIO_INPUT_EVENTID,
1474b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID - 1,
1475b7e3adf9SBartosz Markowski };
1476b7e3adf9SBartosz Markowski 
147724c88f78SMichal Kazior enum wmi_10_2_cmd_id {
147824c88f78SMichal Kazior 	WMI_10_2_START_CMDID = 0x9000,
147924c88f78SMichal Kazior 	WMI_10_2_END_CMDID = 0x9FFF,
148024c88f78SMichal Kazior 	WMI_10_2_INIT_CMDID,
148124c88f78SMichal Kazior 	WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID,
148224c88f78SMichal Kazior 	WMI_10_2_STOP_SCAN_CMDID,
148324c88f78SMichal Kazior 	WMI_10_2_SCAN_CHAN_LIST_CMDID,
148424c88f78SMichal Kazior 	WMI_10_2_ECHO_CMDID,
148524c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
148624c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_CHANNEL_CMDID,
148724c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_PARAM_CMDID,
148824c88f78SMichal Kazior 	WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
148924c88f78SMichal Kazior 	WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
149024c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
149124c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
149224c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
149324c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
149424c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
149524c88f78SMichal Kazior 	WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
149624c88f78SMichal Kazior 	WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
149724c88f78SMichal Kazior 	WMI_10_2_VDEV_CREATE_CMDID,
149824c88f78SMichal Kazior 	WMI_10_2_VDEV_DELETE_CMDID,
149924c88f78SMichal Kazior 	WMI_10_2_VDEV_START_REQUEST_CMDID,
150024c88f78SMichal Kazior 	WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
150124c88f78SMichal Kazior 	WMI_10_2_VDEV_UP_CMDID,
150224c88f78SMichal Kazior 	WMI_10_2_VDEV_STOP_CMDID,
150324c88f78SMichal Kazior 	WMI_10_2_VDEV_DOWN_CMDID,
150424c88f78SMichal Kazior 	WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID,
150524c88f78SMichal Kazior 	WMI_10_2_VDEV_RESUME_RESPONSE_CMDID,
150624c88f78SMichal Kazior 	WMI_10_2_VDEV_SET_PARAM_CMDID,
150724c88f78SMichal Kazior 	WMI_10_2_VDEV_INSTALL_KEY_CMDID,
150824c88f78SMichal Kazior 	WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID,
150924c88f78SMichal Kazior 	WMI_10_2_PEER_CREATE_CMDID,
151024c88f78SMichal Kazior 	WMI_10_2_PEER_DELETE_CMDID,
151124c88f78SMichal Kazior 	WMI_10_2_PEER_FLUSH_TIDS_CMDID,
151224c88f78SMichal Kazior 	WMI_10_2_PEER_SET_PARAM_CMDID,
151324c88f78SMichal Kazior 	WMI_10_2_PEER_ASSOC_CMDID,
151424c88f78SMichal Kazior 	WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
151524c88f78SMichal Kazior 	WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID,
151624c88f78SMichal Kazior 	WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
151724c88f78SMichal Kazior 	WMI_10_2_PEER_MCAST_GROUP_CMDID,
151824c88f78SMichal Kazior 	WMI_10_2_BCN_TX_CMDID,
151924c88f78SMichal Kazior 	WMI_10_2_BCN_PRB_TMPL_CMDID,
152024c88f78SMichal Kazior 	WMI_10_2_BCN_FILTER_RX_CMDID,
152124c88f78SMichal Kazior 	WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
152224c88f78SMichal Kazior 	WMI_10_2_MGMT_TX_CMDID,
152324c88f78SMichal Kazior 	WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
152424c88f78SMichal Kazior 	WMI_10_2_ADDBA_SEND_CMDID,
152524c88f78SMichal Kazior 	WMI_10_2_ADDBA_STATUS_CMDID,
152624c88f78SMichal Kazior 	WMI_10_2_DELBA_SEND_CMDID,
152724c88f78SMichal Kazior 	WMI_10_2_ADDBA_SET_RESP_CMDID,
152824c88f78SMichal Kazior 	WMI_10_2_SEND_SINGLEAMSDU_CMDID,
152924c88f78SMichal Kazior 	WMI_10_2_STA_POWERSAVE_MODE_CMDID,
153024c88f78SMichal Kazior 	WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
153124c88f78SMichal Kazior 	WMI_10_2_STA_MIMO_PS_MODE_CMDID,
153224c88f78SMichal Kazior 	WMI_10_2_DBGLOG_CFG_CMDID,
153324c88f78SMichal Kazior 	WMI_10_2_PDEV_DFS_ENABLE_CMDID,
153424c88f78SMichal Kazior 	WMI_10_2_PDEV_DFS_DISABLE_CMDID,
153524c88f78SMichal Kazior 	WMI_10_2_PDEV_QVIT_CMDID,
153624c88f78SMichal Kazior 	WMI_10_2_ROAM_SCAN_MODE,
153724c88f78SMichal Kazior 	WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
153824c88f78SMichal Kazior 	WMI_10_2_ROAM_SCAN_PERIOD,
153924c88f78SMichal Kazior 	WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
154024c88f78SMichal Kazior 	WMI_10_2_ROAM_AP_PROFILE,
154124c88f78SMichal Kazior 	WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
154224c88f78SMichal Kazior 	WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
154324c88f78SMichal Kazior 	WMI_10_2_OFL_SCAN_PERIOD,
154424c88f78SMichal Kazior 	WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
154524c88f78SMichal Kazior 	WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
154624c88f78SMichal Kazior 	WMI_10_2_P2P_GO_SET_BEACON_IE,
154724c88f78SMichal Kazior 	WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
154824c88f78SMichal Kazior 	WMI_10_2_AP_PS_PEER_PARAM_CMDID,
154924c88f78SMichal Kazior 	WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID,
155024c88f78SMichal Kazior 	WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
155124c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
155224c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
155324c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
155424c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
155524c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
155624c88f78SMichal Kazior 	WMI_10_2_PDEV_SUSPEND_CMDID,
155724c88f78SMichal Kazior 	WMI_10_2_PDEV_RESUME_CMDID,
155824c88f78SMichal Kazior 	WMI_10_2_ADD_BCN_FILTER_CMDID,
155924c88f78SMichal Kazior 	WMI_10_2_RMV_BCN_FILTER_CMDID,
156024c88f78SMichal Kazior 	WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
156124c88f78SMichal Kazior 	WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
156224c88f78SMichal Kazior 	WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
156324c88f78SMichal Kazior 	WMI_10_2_WOW_ENABLE_CMDID,
156424c88f78SMichal Kazior 	WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
156524c88f78SMichal Kazior 	WMI_10_2_RTT_MEASREQ_CMDID,
156624c88f78SMichal Kazior 	WMI_10_2_RTT_TSF_CMDID,
156724c88f78SMichal Kazior 	WMI_10_2_RTT_KEEPALIVE_CMDID,
156824c88f78SMichal Kazior 	WMI_10_2_PDEV_SEND_BCN_CMDID,
156924c88f78SMichal Kazior 	WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
157024c88f78SMichal Kazior 	WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
157124c88f78SMichal Kazior 	WMI_10_2_REQUEST_STATS_CMDID,
157224c88f78SMichal Kazior 	WMI_10_2_GPIO_CONFIG_CMDID,
157324c88f78SMichal Kazior 	WMI_10_2_GPIO_OUTPUT_CMDID,
157424c88f78SMichal Kazior 	WMI_10_2_VDEV_RATEMASK_CMDID,
157524c88f78SMichal Kazior 	WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID,
157624c88f78SMichal Kazior 	WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
157724c88f78SMichal Kazior 	WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
157824c88f78SMichal Kazior 	WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
157924c88f78SMichal Kazior 	WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
158024c88f78SMichal Kazior 	WMI_10_2_FORCE_FW_HANG_CMDID,
158124c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
158224c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_CTL_TABLE_CMDID,
158324c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID,
158424c88f78SMichal Kazior 	WMI_10_2_PDEV_RATEPWR_TABLE_CMDID,
158524c88f78SMichal Kazior 	WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1586a57a6a27SRajkumar Manoharan 	WMI_10_2_PDEV_GET_INFO,
1587a57a6a27SRajkumar Manoharan 	WMI_10_2_VDEV_GET_INFO,
1588a57a6a27SRajkumar Manoharan 	WMI_10_2_VDEV_ATF_REQUEST_CMDID,
1589a57a6a27SRajkumar Manoharan 	WMI_10_2_PEER_ATF_REQUEST_CMDID,
1590a57a6a27SRajkumar Manoharan 	WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
159162f77f09SMaharaja 	WMI_10_2_MU_CAL_START_CMDID,
159262f77f09SMaharaja 	WMI_10_2_SET_LTEU_CONFIG_CMDID,
159362f77f09SMaharaja 	WMI_10_2_SET_CCA_PARAMS,
1594dd2c5fcbSRajkumar Manoharan 	WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
159524c88f78SMichal Kazior 	WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1,
159624c88f78SMichal Kazior };
159724c88f78SMichal Kazior 
159824c88f78SMichal Kazior enum wmi_10_2_event_id {
159924c88f78SMichal Kazior 	WMI_10_2_SERVICE_READY_EVENTID = 0x8000,
160024c88f78SMichal Kazior 	WMI_10_2_READY_EVENTID,
160124c88f78SMichal Kazior 	WMI_10_2_DEBUG_MESG_EVENTID,
160224c88f78SMichal Kazior 	WMI_10_2_START_EVENTID = 0x9000,
160324c88f78SMichal Kazior 	WMI_10_2_END_EVENTID = 0x9FFF,
160424c88f78SMichal Kazior 	WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID,
160524c88f78SMichal Kazior 	WMI_10_2_ECHO_EVENTID,
160624c88f78SMichal Kazior 	WMI_10_2_UPDATE_STATS_EVENTID,
160724c88f78SMichal Kazior 	WMI_10_2_INST_RSSI_STATS_EVENTID,
160824c88f78SMichal Kazior 	WMI_10_2_VDEV_START_RESP_EVENTID,
160924c88f78SMichal Kazior 	WMI_10_2_VDEV_STANDBY_REQ_EVENTID,
161024c88f78SMichal Kazior 	WMI_10_2_VDEV_RESUME_REQ_EVENTID,
161124c88f78SMichal Kazior 	WMI_10_2_VDEV_STOPPED_EVENTID,
161224c88f78SMichal Kazior 	WMI_10_2_PEER_STA_KICKOUT_EVENTID,
161324c88f78SMichal Kazior 	WMI_10_2_HOST_SWBA_EVENTID,
161424c88f78SMichal Kazior 	WMI_10_2_TBTTOFFSET_UPDATE_EVENTID,
161524c88f78SMichal Kazior 	WMI_10_2_MGMT_RX_EVENTID,
161624c88f78SMichal Kazior 	WMI_10_2_CHAN_INFO_EVENTID,
161724c88f78SMichal Kazior 	WMI_10_2_PHYERR_EVENTID,
161824c88f78SMichal Kazior 	WMI_10_2_ROAM_EVENTID,
161924c88f78SMichal Kazior 	WMI_10_2_PROFILE_MATCH,
162024c88f78SMichal Kazior 	WMI_10_2_DEBUG_PRINT_EVENTID,
162124c88f78SMichal Kazior 	WMI_10_2_PDEV_QVIT_EVENTID,
162224c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_DATA_EVENTID,
162324c88f78SMichal Kazior 	WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID,
162424c88f78SMichal Kazior 	WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID,
162524c88f78SMichal Kazior 	WMI_10_2_RTT_ERROR_REPORT_EVENTID,
162624c88f78SMichal Kazior 	WMI_10_2_RTT_KEEPALIVE_EVENTID,
162724c88f78SMichal Kazior 	WMI_10_2_WOW_WAKEUP_HOST_EVENTID,
162824c88f78SMichal Kazior 	WMI_10_2_DCS_INTERFERENCE_EVENTID,
162924c88f78SMichal Kazior 	WMI_10_2_PDEV_TPC_CONFIG_EVENTID,
163024c88f78SMichal Kazior 	WMI_10_2_GPIO_INPUT_EVENTID,
163124c88f78SMichal Kazior 	WMI_10_2_PEER_RATECODE_LIST_EVENTID,
163224c88f78SMichal Kazior 	WMI_10_2_GENERIC_BUFFER_EVENTID,
163324c88f78SMichal Kazior 	WMI_10_2_MCAST_BUF_RELEASE_EVENTID,
163424c88f78SMichal Kazior 	WMI_10_2_MCAST_LIST_AGEOUT_EVENTID,
163524c88f78SMichal Kazior 	WMI_10_2_WDS_PEER_EVENTID,
1636a57a6a27SRajkumar Manoharan 	WMI_10_2_PEER_STA_PS_STATECHG_EVENTID,
1637a57a6a27SRajkumar Manoharan 	WMI_10_2_PDEV_TEMPERATURE_EVENTID,
1638dd2c5fcbSRajkumar Manoharan 	WMI_10_2_MU_REPORT_EVENTID,
1639dd2c5fcbSRajkumar Manoharan 	WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID,
164024c88f78SMichal Kazior 	WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1,
164124c88f78SMichal Kazior };
164224c88f78SMichal Kazior 
16432d491e69SRaja Mani enum wmi_10_4_cmd_id {
16442d491e69SRaja Mani 	WMI_10_4_START_CMDID = 0x9000,
16452d491e69SRaja Mani 	WMI_10_4_END_CMDID = 0x9FFF,
16462d491e69SRaja Mani 	WMI_10_4_INIT_CMDID,
16472d491e69SRaja Mani 	WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID,
16482d491e69SRaja Mani 	WMI_10_4_STOP_SCAN_CMDID,
16492d491e69SRaja Mani 	WMI_10_4_SCAN_CHAN_LIST_CMDID,
16502d491e69SRaja Mani 	WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
16512d491e69SRaja Mani 	WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
16522d491e69SRaja Mani 	WMI_10_4_ECHO_CMDID,
16532d491e69SRaja Mani 	WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
16542d491e69SRaja Mani 	WMI_10_4_PDEV_SET_CHANNEL_CMDID,
16552d491e69SRaja Mani 	WMI_10_4_PDEV_SET_PARAM_CMDID,
16562d491e69SRaja Mani 	WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
16572d491e69SRaja Mani 	WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
16582d491e69SRaja Mani 	WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
16592d491e69SRaja Mani 	WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
16602d491e69SRaja Mani 	WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
16612d491e69SRaja Mani 	WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
16622d491e69SRaja Mani 	WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
16632d491e69SRaja Mani 	WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
16642d491e69SRaja Mani 	WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
16652d491e69SRaja Mani 	WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
16662d491e69SRaja Mani 	WMI_10_4_VDEV_CREATE_CMDID,
16672d491e69SRaja Mani 	WMI_10_4_VDEV_DELETE_CMDID,
16682d491e69SRaja Mani 	WMI_10_4_VDEV_START_REQUEST_CMDID,
16692d491e69SRaja Mani 	WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
16702d491e69SRaja Mani 	WMI_10_4_VDEV_UP_CMDID,
16712d491e69SRaja Mani 	WMI_10_4_VDEV_STOP_CMDID,
16722d491e69SRaja Mani 	WMI_10_4_VDEV_DOWN_CMDID,
16732d491e69SRaja Mani 	WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
16742d491e69SRaja Mani 	WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
16752d491e69SRaja Mani 	WMI_10_4_VDEV_SET_PARAM_CMDID,
16762d491e69SRaja Mani 	WMI_10_4_VDEV_INSTALL_KEY_CMDID,
16772d491e69SRaja Mani 	WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
16782d491e69SRaja Mani 	WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
16792d491e69SRaja Mani 	WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
16802d491e69SRaja Mani 	WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
16812d491e69SRaja Mani 	WMI_10_4_PEER_CREATE_CMDID,
16822d491e69SRaja Mani 	WMI_10_4_PEER_DELETE_CMDID,
16832d491e69SRaja Mani 	WMI_10_4_PEER_FLUSH_TIDS_CMDID,
16842d491e69SRaja Mani 	WMI_10_4_PEER_SET_PARAM_CMDID,
16852d491e69SRaja Mani 	WMI_10_4_PEER_ASSOC_CMDID,
16862d491e69SRaja Mani 	WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
16872d491e69SRaja Mani 	WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
16882d491e69SRaja Mani 	WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
16892d491e69SRaja Mani 	WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
16902d491e69SRaja Mani 	WMI_10_4_PEER_MCAST_GROUP_CMDID,
16912d491e69SRaja Mani 	WMI_10_4_BCN_TX_CMDID,
16922d491e69SRaja Mani 	WMI_10_4_PDEV_SEND_BCN_CMDID,
16932d491e69SRaja Mani 	WMI_10_4_BCN_PRB_TMPL_CMDID,
16942d491e69SRaja Mani 	WMI_10_4_BCN_FILTER_RX_CMDID,
16952d491e69SRaja Mani 	WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
16962d491e69SRaja Mani 	WMI_10_4_MGMT_TX_CMDID,
16972d491e69SRaja Mani 	WMI_10_4_PRB_TMPL_CMDID,
16982d491e69SRaja Mani 	WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
16992d491e69SRaja Mani 	WMI_10_4_ADDBA_SEND_CMDID,
17002d491e69SRaja Mani 	WMI_10_4_ADDBA_STATUS_CMDID,
17012d491e69SRaja Mani 	WMI_10_4_DELBA_SEND_CMDID,
17022d491e69SRaja Mani 	WMI_10_4_ADDBA_SET_RESP_CMDID,
17032d491e69SRaja Mani 	WMI_10_4_SEND_SINGLEAMSDU_CMDID,
17042d491e69SRaja Mani 	WMI_10_4_STA_POWERSAVE_MODE_CMDID,
17052d491e69SRaja Mani 	WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
17062d491e69SRaja Mani 	WMI_10_4_STA_MIMO_PS_MODE_CMDID,
17072d491e69SRaja Mani 	WMI_10_4_DBGLOG_CFG_CMDID,
17082d491e69SRaja Mani 	WMI_10_4_PDEV_DFS_ENABLE_CMDID,
17092d491e69SRaja Mani 	WMI_10_4_PDEV_DFS_DISABLE_CMDID,
17102d491e69SRaja Mani 	WMI_10_4_PDEV_QVIT_CMDID,
17112d491e69SRaja Mani 	WMI_10_4_ROAM_SCAN_MODE,
17122d491e69SRaja Mani 	WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
17132d491e69SRaja Mani 	WMI_10_4_ROAM_SCAN_PERIOD,
17142d491e69SRaja Mani 	WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
17152d491e69SRaja Mani 	WMI_10_4_ROAM_AP_PROFILE,
17162d491e69SRaja Mani 	WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
17172d491e69SRaja Mani 	WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
17182d491e69SRaja Mani 	WMI_10_4_OFL_SCAN_PERIOD,
17192d491e69SRaja Mani 	WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
17202d491e69SRaja Mani 	WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
17212d491e69SRaja Mani 	WMI_10_4_P2P_GO_SET_BEACON_IE,
17222d491e69SRaja Mani 	WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
17232d491e69SRaja Mani 	WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
17242d491e69SRaja Mani 	WMI_10_4_AP_PS_PEER_PARAM_CMDID,
17252d491e69SRaja Mani 	WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
17262d491e69SRaja Mani 	WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
17272d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
17282d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
17292d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
17302d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
17312d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
17322d491e69SRaja Mani 	WMI_10_4_PDEV_SUSPEND_CMDID,
17332d491e69SRaja Mani 	WMI_10_4_PDEV_RESUME_CMDID,
17342d491e69SRaja Mani 	WMI_10_4_ADD_BCN_FILTER_CMDID,
17352d491e69SRaja Mani 	WMI_10_4_RMV_BCN_FILTER_CMDID,
17362d491e69SRaja Mani 	WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
17372d491e69SRaja Mani 	WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
17382d491e69SRaja Mani 	WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
17392d491e69SRaja Mani 	WMI_10_4_WOW_ENABLE_CMDID,
17402d491e69SRaja Mani 	WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
17412d491e69SRaja Mani 	WMI_10_4_RTT_MEASREQ_CMDID,
17422d491e69SRaja Mani 	WMI_10_4_RTT_TSF_CMDID,
17432d491e69SRaja Mani 	WMI_10_4_RTT_KEEPALIVE_CMDID,
17442d491e69SRaja Mani 	WMI_10_4_OEM_REQ_CMDID,
17452d491e69SRaja Mani 	WMI_10_4_NAN_CMDID,
17462d491e69SRaja Mani 	WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
17472d491e69SRaja Mani 	WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
17482d491e69SRaja Mani 	WMI_10_4_REQUEST_STATS_CMDID,
17492d491e69SRaja Mani 	WMI_10_4_GPIO_CONFIG_CMDID,
17502d491e69SRaja Mani 	WMI_10_4_GPIO_OUTPUT_CMDID,
17512d491e69SRaja Mani 	WMI_10_4_VDEV_RATEMASK_CMDID,
17522d491e69SRaja Mani 	WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
17532d491e69SRaja Mani 	WMI_10_4_GTK_OFFLOAD_CMDID,
17542d491e69SRaja Mani 	WMI_10_4_QBOOST_CFG_CMDID,
17552d491e69SRaja Mani 	WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
17562d491e69SRaja Mani 	WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
17572d491e69SRaja Mani 	WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
17582d491e69SRaja Mani 	WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
17592d491e69SRaja Mani 	WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
17602d491e69SRaja Mani 	WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
17612d491e69SRaja Mani 	WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
17622d491e69SRaja Mani 	WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
17632d491e69SRaja Mani 	WMI_10_4_FORCE_FW_HANG_CMDID,
17642d491e69SRaja Mani 	WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
17652d491e69SRaja Mani 	WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
17662d491e69SRaja Mani 	WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
17672d491e69SRaja Mani 	WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
17682d491e69SRaja Mani 	WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
17692d491e69SRaja Mani 	WMI_10_4_PDEV_FIPS_CMDID,
17702d491e69SRaja Mani 	WMI_10_4_TT_SET_CONF_CMDID,
17712d491e69SRaja Mani 	WMI_10_4_FWTEST_CMDID,
17722d491e69SRaja Mani 	WMI_10_4_VDEV_ATF_REQUEST_CMDID,
17732d491e69SRaja Mani 	WMI_10_4_PEER_ATF_REQUEST_CMDID,
17742d491e69SRaja Mani 	WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
17752d491e69SRaja Mani 	WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
17762d491e69SRaja Mani 	WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
17772d491e69SRaja Mani 	WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
17782d491e69SRaja Mani 	WMI_10_4_PDEV_GET_TPC_CMDID,
17792d491e69SRaja Mani 	WMI_10_4_PDEV_GET_AST_INFO_CMDID,
17802d491e69SRaja Mani 	WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
17812d491e69SRaja Mani 	WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
17822d491e69SRaja Mani 	WMI_10_4_PDEV_GET_INFO_CMDID,
17832d491e69SRaja Mani 	WMI_10_4_VDEV_GET_INFO_CMDID,
17842d491e69SRaja Mani 	WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
17852d491e69SRaja Mani 	WMI_10_4_MU_CAL_START_CMDID,
17862d491e69SRaja Mani 	WMI_10_4_SET_CCA_PARAMS_CMDID,
17872d491e69SRaja Mani 	WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
178869d4315cSVasanthakumar Thiagarajan 	WMI_10_4_EXT_RESOURCE_CFG_CMDID,
178969d4315cSVasanthakumar Thiagarajan 	WMI_10_4_VDEV_SET_IE_CMDID,
179069d4315cSVasanthakumar Thiagarajan 	WMI_10_4_SET_LTEU_CONFIG_CMDID,
1791add6cd8dSManikanta Pubbisetty 	WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
1792add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
1793add6cd8dSManikanta Pubbisetty 	WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1794add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_BWF_REQUEST_CMDID,
1795add6cd8dSManikanta Pubbisetty 	WMI_10_4_BTCOEX_CFG_CMDID,
1796add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
1797add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
1798add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
1799add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
1800add6cd8dSManikanta Pubbisetty 	WMI_10_4_COEX_VERSION_CFG_CMID,
1801add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
1802add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
1803add6cd8dSManikanta Pubbisetty 	WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
1804add6cd8dSManikanta Pubbisetty 	WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
1805add6cd8dSManikanta Pubbisetty 	WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
1806add6cd8dSManikanta Pubbisetty 	WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
1807add6cd8dSManikanta Pubbisetty 	WMI_10_4_GET_TSF_TIMER_CMDID,
1808add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
1809add6cd8dSManikanta Pubbisetty 	WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
1810add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
1811add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_SET_STATE_CMDID,
1812add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_PEER_UPDATE_CMDID,
1813add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
18146f6eb1bcSSriram R 	WMI_10_4_PDEV_SEND_FD_CMDID,
18156f6eb1bcSSriram R 	WMI_10_4_ENABLE_FILS_CMDID,
18166f6eb1bcSSriram R 	WMI_10_4_PDEV_SET_BRIDGE_MACADDR_CMDID,
18176f6eb1bcSSriram R 	WMI_10_4_ATF_GROUP_WMM_AC_CONFIG_REQUEST_CMDID,
18186f6eb1bcSSriram R 	WMI_10_4_RADAR_FOUND_CMDID,
18192d491e69SRaja Mani 	WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1,
18202d491e69SRaja Mani };
18212d491e69SRaja Mani 
18222d491e69SRaja Mani enum wmi_10_4_event_id {
18232d491e69SRaja Mani 	WMI_10_4_SERVICE_READY_EVENTID = 0x8000,
18242d491e69SRaja Mani 	WMI_10_4_READY_EVENTID,
18252d491e69SRaja Mani 	WMI_10_4_DEBUG_MESG_EVENTID,
18262d491e69SRaja Mani 	WMI_10_4_START_EVENTID = 0x9000,
18272d491e69SRaja Mani 	WMI_10_4_END_EVENTID = 0x9FFF,
18282d491e69SRaja Mani 	WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID,
18292d491e69SRaja Mani 	WMI_10_4_ECHO_EVENTID,
18302d491e69SRaja Mani 	WMI_10_4_UPDATE_STATS_EVENTID,
18312d491e69SRaja Mani 	WMI_10_4_INST_RSSI_STATS_EVENTID,
18322d491e69SRaja Mani 	WMI_10_4_VDEV_START_RESP_EVENTID,
18332d491e69SRaja Mani 	WMI_10_4_VDEV_STANDBY_REQ_EVENTID,
18342d491e69SRaja Mani 	WMI_10_4_VDEV_RESUME_REQ_EVENTID,
18352d491e69SRaja Mani 	WMI_10_4_VDEV_STOPPED_EVENTID,
18362d491e69SRaja Mani 	WMI_10_4_PEER_STA_KICKOUT_EVENTID,
18372d491e69SRaja Mani 	WMI_10_4_HOST_SWBA_EVENTID,
18382d491e69SRaja Mani 	WMI_10_4_TBTTOFFSET_UPDATE_EVENTID,
18392d491e69SRaja Mani 	WMI_10_4_MGMT_RX_EVENTID,
18402d491e69SRaja Mani 	WMI_10_4_CHAN_INFO_EVENTID,
18412d491e69SRaja Mani 	WMI_10_4_PHYERR_EVENTID,
18422d491e69SRaja Mani 	WMI_10_4_ROAM_EVENTID,
18432d491e69SRaja Mani 	WMI_10_4_PROFILE_MATCH,
18442d491e69SRaja Mani 	WMI_10_4_DEBUG_PRINT_EVENTID,
18452d491e69SRaja Mani 	WMI_10_4_PDEV_QVIT_EVENTID,
18462d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_DATA_EVENTID,
18472d491e69SRaja Mani 	WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID,
18482d491e69SRaja Mani 	WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID,
18492d491e69SRaja Mani 	WMI_10_4_RTT_ERROR_REPORT_EVENTID,
18502d491e69SRaja Mani 	WMI_10_4_RTT_KEEPALIVE_EVENTID,
18512d491e69SRaja Mani 	WMI_10_4_OEM_CAPABILITY_EVENTID,
18522d491e69SRaja Mani 	WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID,
18532d491e69SRaja Mani 	WMI_10_4_OEM_ERROR_REPORT_EVENTID,
18542d491e69SRaja Mani 	WMI_10_4_NAN_EVENTID,
18552d491e69SRaja Mani 	WMI_10_4_WOW_WAKEUP_HOST_EVENTID,
18562d491e69SRaja Mani 	WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID,
18572d491e69SRaja Mani 	WMI_10_4_GTK_REKEY_FAIL_EVENTID,
18582d491e69SRaja Mani 	WMI_10_4_DCS_INTERFERENCE_EVENTID,
18592d491e69SRaja Mani 	WMI_10_4_PDEV_TPC_CONFIG_EVENTID,
18602d491e69SRaja Mani 	WMI_10_4_CSA_HANDLING_EVENTID,
18612d491e69SRaja Mani 	WMI_10_4_GPIO_INPUT_EVENTID,
18622d491e69SRaja Mani 	WMI_10_4_PEER_RATECODE_LIST_EVENTID,
18632d491e69SRaja Mani 	WMI_10_4_GENERIC_BUFFER_EVENTID,
18642d491e69SRaja Mani 	WMI_10_4_MCAST_BUF_RELEASE_EVENTID,
18652d491e69SRaja Mani 	WMI_10_4_MCAST_LIST_AGEOUT_EVENTID,
18662d491e69SRaja Mani 	WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID,
18672d491e69SRaja Mani 	WMI_10_4_WDS_PEER_EVENTID,
18682d491e69SRaja Mani 	WMI_10_4_PEER_STA_PS_STATECHG_EVENTID,
18692d491e69SRaja Mani 	WMI_10_4_PDEV_FIPS_EVENTID,
18702d491e69SRaja Mani 	WMI_10_4_TT_STATS_EVENTID,
18712d491e69SRaja Mani 	WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID,
18722d491e69SRaja Mani 	WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID,
18732d491e69SRaja Mani 	WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID,
18742d491e69SRaja Mani 	WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID,
18752d491e69SRaja Mani 	WMI_10_4_PDEV_NFCAL_POWER_EVENTID,
18762d491e69SRaja Mani 	WMI_10_4_PDEV_TPC_EVENTID,
18772d491e69SRaja Mani 	WMI_10_4_PDEV_GET_AST_INFO_EVENTID,
18782d491e69SRaja Mani 	WMI_10_4_PDEV_TEMPERATURE_EVENTID,
18792d491e69SRaja Mani 	WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
18802d491e69SRaja Mani 	WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID,
188169d4315cSVasanthakumar Thiagarajan 	WMI_10_4_MU_REPORT_EVENTID,
1882add6cd8dSManikanta Pubbisetty 	WMI_10_4_TX_DATA_TRAFFIC_CTRL_EVENTID,
1883add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_TX_MU_TXMIT_COUNT_EVENTID,
1884add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_GID_USERPOS_LIST_EVENTID,
1885add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_CHECK_CAL_VERSION_EVENTID,
1886add6cd8dSManikanta Pubbisetty 	WMI_10_4_ATF_PEER_STATS_EVENTID,
1887add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_GET_RX_FILTER_EVENTID,
1888add6cd8dSManikanta Pubbisetty 	WMI_10_4_NAC_RSSI_EVENTID,
1889add6cd8dSManikanta Pubbisetty 	WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID,
1890add6cd8dSManikanta Pubbisetty 	WMI_10_4_GET_TSF_TIMER_RESP_EVENTID,
1891add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_TPC_TABLE_EVENTID,
1892add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_WDS_ENTRY_LIST_EVENTID,
1893add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_PEER_EVENTID,
18946f6eb1bcSSriram R 	WMI_10_4_HOST_SWFDA_EVENTID,
18956f6eb1bcSSriram R 	WMI_10_4_ESP_ESTIMATE_EVENTID,
18966f6eb1bcSSriram R 	WMI_10_4_DFS_STATUS_CHECK_EVENTID,
18972d491e69SRaja Mani 	WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1,
18982d491e69SRaja Mani };
18992d491e69SRaja Mani 
19005e3dd157SKalle Valo enum wmi_phy_mode {
19015e3dd157SKalle Valo 	MODE_11A        = 0,   /* 11a Mode */
19025e3dd157SKalle Valo 	MODE_11G        = 1,   /* 11b/g Mode */
19035e3dd157SKalle Valo 	MODE_11B        = 2,   /* 11b Mode */
19045e3dd157SKalle Valo 	MODE_11GONLY    = 3,   /* 11g only Mode */
19055e3dd157SKalle Valo 	MODE_11NA_HT20   = 4,  /* 11a HT20 mode */
19065e3dd157SKalle Valo 	MODE_11NG_HT20   = 5,  /* 11g HT20 mode */
19075e3dd157SKalle Valo 	MODE_11NA_HT40   = 6,  /* 11a HT40 mode */
19085e3dd157SKalle Valo 	MODE_11NG_HT40   = 7,  /* 11g HT40 mode */
19095e3dd157SKalle Valo 	MODE_11AC_VHT20 = 8,
19105e3dd157SKalle Valo 	MODE_11AC_VHT40 = 9,
19115e3dd157SKalle Valo 	MODE_11AC_VHT80 = 10,
19125e3dd157SKalle Valo 	/*    MODE_11AC_VHT160 = 11, */
19135e3dd157SKalle Valo 	MODE_11AC_VHT20_2G = 11,
19145e3dd157SKalle Valo 	MODE_11AC_VHT40_2G = 12,
19155e3dd157SKalle Valo 	MODE_11AC_VHT80_2G = 13,
1916bc1efd73SSebastian Gottschall 	MODE_11AC_VHT80_80 = 14,
1917bc1efd73SSebastian Gottschall 	MODE_11AC_VHT160 = 15,
1918bc1efd73SSebastian Gottschall 	MODE_UNKNOWN    = 16,
1919bc1efd73SSebastian Gottschall 	MODE_MAX        = 16
19205e3dd157SKalle Valo };
19215e3dd157SKalle Valo 
192238a1d47eSKalle Valo static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode)
192338a1d47eSKalle Valo {
192438a1d47eSKalle Valo 	switch (mode) {
192538a1d47eSKalle Valo 	case MODE_11A:
192638a1d47eSKalle Valo 		return "11a";
192738a1d47eSKalle Valo 	case MODE_11G:
192838a1d47eSKalle Valo 		return "11g";
192938a1d47eSKalle Valo 	case MODE_11B:
193038a1d47eSKalle Valo 		return "11b";
193138a1d47eSKalle Valo 	case MODE_11GONLY:
193238a1d47eSKalle Valo 		return "11gonly";
193338a1d47eSKalle Valo 	case MODE_11NA_HT20:
193438a1d47eSKalle Valo 		return "11na-ht20";
193538a1d47eSKalle Valo 	case MODE_11NG_HT20:
193638a1d47eSKalle Valo 		return "11ng-ht20";
193738a1d47eSKalle Valo 	case MODE_11NA_HT40:
193838a1d47eSKalle Valo 		return "11na-ht40";
193938a1d47eSKalle Valo 	case MODE_11NG_HT40:
194038a1d47eSKalle Valo 		return "11ng-ht40";
194138a1d47eSKalle Valo 	case MODE_11AC_VHT20:
194238a1d47eSKalle Valo 		return "11ac-vht20";
194338a1d47eSKalle Valo 	case MODE_11AC_VHT40:
194438a1d47eSKalle Valo 		return "11ac-vht40";
194538a1d47eSKalle Valo 	case MODE_11AC_VHT80:
194638a1d47eSKalle Valo 		return "11ac-vht80";
1947bc1efd73SSebastian Gottschall 	case MODE_11AC_VHT160:
1948bc1efd73SSebastian Gottschall 		return "11ac-vht160";
1949bc1efd73SSebastian Gottschall 	case MODE_11AC_VHT80_80:
1950bc1efd73SSebastian Gottschall 		return "11ac-vht80+80";
195138a1d47eSKalle Valo 	case MODE_11AC_VHT20_2G:
195238a1d47eSKalle Valo 		return "11ac-vht20-2g";
195338a1d47eSKalle Valo 	case MODE_11AC_VHT40_2G:
195438a1d47eSKalle Valo 		return "11ac-vht40-2g";
195538a1d47eSKalle Valo 	case MODE_11AC_VHT80_2G:
195638a1d47eSKalle Valo 		return "11ac-vht80-2g";
195738a1d47eSKalle Valo 	case MODE_UNKNOWN:
195838a1d47eSKalle Valo 		/* skip */
195938a1d47eSKalle Valo 		break;
196038a1d47eSKalle Valo 
196138a1d47eSKalle Valo 		/* no default handler to allow compiler to check that the
196237ff1b0dSMarcin Rokicki 		 * enum is fully handled
196337ff1b0dSMarcin Rokicki 		 */
196438a1d47eSKalle Valo 	};
196538a1d47eSKalle Valo 
196638a1d47eSKalle Valo 	return "<unknown>";
196738a1d47eSKalle Valo }
196838a1d47eSKalle Valo 
19695e3dd157SKalle Valo #define WMI_CHAN_LIST_TAG	0x1
19705e3dd157SKalle Valo #define WMI_SSID_LIST_TAG	0x2
19715e3dd157SKalle Valo #define WMI_BSSID_LIST_TAG	0x3
19725e3dd157SKalle Valo #define WMI_IE_TAG		0x4
19735e3dd157SKalle Valo 
19745e3dd157SKalle Valo struct wmi_channel {
19755e3dd157SKalle Valo 	__le32 mhz;
19765e3dd157SKalle Valo 	__le32 band_center_freq1;
19775e3dd157SKalle Valo 	__le32 band_center_freq2; /* valid for 11ac, 80plus80 */
19785e3dd157SKalle Valo 	union {
19795e3dd157SKalle Valo 		__le32 flags; /* WMI_CHAN_FLAG_ */
19805e3dd157SKalle Valo 		struct {
19815e3dd157SKalle Valo 			u8 mode; /* only 6 LSBs */
19825e3dd157SKalle Valo 		} __packed;
19835e3dd157SKalle Valo 	} __packed;
19845e3dd157SKalle Valo 	union {
19855e3dd157SKalle Valo 		__le32 reginfo0;
19865e3dd157SKalle Valo 		struct {
198702256930SMichal Kazior 			/* note: power unit is 0.5 dBm */
19885e3dd157SKalle Valo 			u8 min_power;
19895e3dd157SKalle Valo 			u8 max_power;
19905e3dd157SKalle Valo 			u8 reg_power;
19915e3dd157SKalle Valo 			u8 reg_classid;
19925e3dd157SKalle Valo 		} __packed;
19935e3dd157SKalle Valo 	} __packed;
19945e3dd157SKalle Valo 	union {
19955e3dd157SKalle Valo 		__le32 reginfo1;
19965e3dd157SKalle Valo 		struct {
19975e3dd157SKalle Valo 			u8 antenna_max;
1998513527c8SAlan Liu 			u8 max_tx_power;
19995e3dd157SKalle Valo 		} __packed;
20005e3dd157SKalle Valo 	} __packed;
20015e3dd157SKalle Valo } __packed;
20025e3dd157SKalle Valo 
20035e3dd157SKalle Valo struct wmi_channel_arg {
20045e3dd157SKalle Valo 	u32 freq;
20055e3dd157SKalle Valo 	u32 band_center_freq1;
2006bc1efd73SSebastian Gottschall 	u32 band_center_freq2;
20075e3dd157SKalle Valo 	bool passive;
20085e3dd157SKalle Valo 	bool allow_ibss;
20095e3dd157SKalle Valo 	bool allow_ht;
20105e3dd157SKalle Valo 	bool allow_vht;
20115e3dd157SKalle Valo 	bool ht40plus;
2012e8a50f8bSMarek Puzyniak 	bool chan_radar;
201302256930SMichal Kazior 	/* note: power unit is 0.5 dBm */
20145e3dd157SKalle Valo 	u32 min_power;
20155e3dd157SKalle Valo 	u32 max_power;
20165e3dd157SKalle Valo 	u32 max_reg_power;
20175e3dd157SKalle Valo 	u32 max_antenna_gain;
20185e3dd157SKalle Valo 	u32 reg_class_id;
20195e3dd157SKalle Valo 	enum wmi_phy_mode mode;
20205e3dd157SKalle Valo };
20215e3dd157SKalle Valo 
20225e3dd157SKalle Valo enum wmi_channel_change_cause {
20235e3dd157SKalle Valo 	WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
20245e3dd157SKalle Valo 	WMI_CHANNEL_CHANGE_CAUSE_CSA,
20255e3dd157SKalle Valo };
20265e3dd157SKalle Valo 
20275e3dd157SKalle Valo #define WMI_CHAN_FLAG_HT40_PLUS      (1 << 6)
20285e3dd157SKalle Valo #define WMI_CHAN_FLAG_PASSIVE        (1 << 7)
20295e3dd157SKalle Valo #define WMI_CHAN_FLAG_ADHOC_ALLOWED  (1 << 8)
20305e3dd157SKalle Valo #define WMI_CHAN_FLAG_AP_DISABLED    (1 << 9)
20315e3dd157SKalle Valo #define WMI_CHAN_FLAG_DFS            (1 << 10)
20325e3dd157SKalle Valo #define WMI_CHAN_FLAG_ALLOW_HT       (1 << 11)
20335e3dd157SKalle Valo #define WMI_CHAN_FLAG_ALLOW_VHT      (1 << 12)
20345e3dd157SKalle Valo 
20355e3dd157SKalle Valo /* Indicate reason for channel switch */
20365e3dd157SKalle Valo #define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13)
20375e3dd157SKalle Valo 
20385c8726ecSRaja Mani #define WMI_MAX_SPATIAL_STREAM        3 /* default max ss */
20395e3dd157SKalle Valo 
20405e3dd157SKalle Valo /* HT Capabilities*/
20415e3dd157SKalle Valo #define WMI_HT_CAP_ENABLED                0x0001   /* HT Enabled/ disabled */
20425e3dd157SKalle Valo #define WMI_HT_CAP_HT20_SGI       0x0002   /* Short Guard Interval with HT20 */
20435e3dd157SKalle Valo #define WMI_HT_CAP_DYNAMIC_SMPS           0x0004   /* Dynamic MIMO powersave */
20445e3dd157SKalle Valo #define WMI_HT_CAP_TX_STBC                0x0008   /* B3 TX STBC */
20455e3dd157SKalle Valo #define WMI_HT_CAP_TX_STBC_MASK_SHIFT     3
20465e3dd157SKalle Valo #define WMI_HT_CAP_RX_STBC                0x0030   /* B4-B5 RX STBC */
20475e3dd157SKalle Valo #define WMI_HT_CAP_RX_STBC_MASK_SHIFT     4
20485e3dd157SKalle Valo #define WMI_HT_CAP_LDPC                   0x0040   /* LDPC supported */
20495e3dd157SKalle Valo #define WMI_HT_CAP_L_SIG_TXOP_PROT        0x0080   /* L-SIG TXOP Protection */
20505e3dd157SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY           0x0700   /* MPDU Density */
20515e3dd157SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
20525e3dd157SKalle Valo #define WMI_HT_CAP_HT40_SGI               0x0800
20535e3dd157SKalle Valo 
20545e3dd157SKalle Valo #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED       | \
20555e3dd157SKalle Valo 				WMI_HT_CAP_HT20_SGI      | \
20565e3dd157SKalle Valo 				WMI_HT_CAP_HT40_SGI      | \
20575e3dd157SKalle Valo 				WMI_HT_CAP_TX_STBC       | \
20585e3dd157SKalle Valo 				WMI_HT_CAP_RX_STBC       | \
20595e3dd157SKalle Valo 				WMI_HT_CAP_LDPC)
20605e3dd157SKalle Valo 
20615e3dd157SKalle Valo /*
20625e3dd157SKalle Valo  * WMI_VHT_CAP_* these maps to ieee 802.11ac vht capability information
20635e3dd157SKalle Valo  * field. The fields not defined here are not supported, or reserved.
20645e3dd157SKalle Valo  * Do not change these masks and if you have to add new one follow the
20655e3dd157SKalle Valo  * bitmask as specified by 802.11ac draft.
20665e3dd157SKalle Valo  */
20675e3dd157SKalle Valo 
20685e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK            0x00000003
20695e3dd157SKalle Valo #define WMI_VHT_CAP_RX_LDPC                      0x00000010
20705e3dd157SKalle Valo #define WMI_VHT_CAP_SGI_80MHZ                    0x00000020
2071bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_SGI_160MHZ                   0x00000040
20725e3dd157SKalle Valo #define WMI_VHT_CAP_TX_STBC                      0x00000080
20735e3dd157SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK                 0x00000300
20745e3dd157SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT           8
2075bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_SU_BFER                      0x00000800
2076bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_SU_BFEE                      0x00001000
2077bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_CS_ANT_MASK              0x0000E000
2078bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT        13
2079bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_SND_DIM_MASK             0x00070000
2080bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT       16
2081bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MU_BFER                      0x00080000
2082bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MU_BFEE                      0x00100000
20835e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP            0x03800000
20845e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT      23
20855e3dd157SKalle Valo #define WMI_VHT_CAP_RX_FIXED_ANT                 0x10000000
20865e3dd157SKalle Valo #define WMI_VHT_CAP_TX_FIXED_ANT                 0x20000000
20875e3dd157SKalle Valo 
20885e3dd157SKalle Valo /* The following also refer for max HT AMSDU */
20895e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_3839            0x00000000
20905e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_7935            0x00000001
20915e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_11454           0x00000002
20925e3dd157SKalle Valo 
20935e3dd157SKalle Valo #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454  | \
20945e3dd157SKalle Valo 				 WMI_VHT_CAP_RX_LDPC             | \
20955e3dd157SKalle Valo 				 WMI_VHT_CAP_SGI_80MHZ           | \
20965e3dd157SKalle Valo 				 WMI_VHT_CAP_TX_STBC             | \
20975e3dd157SKalle Valo 				 WMI_VHT_CAP_RX_STBC_MASK        | \
20985e3dd157SKalle Valo 				 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP   | \
20995e3dd157SKalle Valo 				 WMI_VHT_CAP_RX_FIXED_ANT        | \
21005e3dd157SKalle Valo 				 WMI_VHT_CAP_TX_FIXED_ANT)
21015e3dd157SKalle Valo 
21025e3dd157SKalle Valo /*
21035e3dd157SKalle Valo  * Interested readers refer to Rx/Tx MCS Map definition as defined in
21045e3dd157SKalle Valo  * 802.11ac
21055e3dd157SKalle Valo  */
21065e3dd157SKalle Valo #define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss)      ((3 & (r)) << (((ss) - 1) << 1))
21075e3dd157SKalle Valo #define WMI_VHT_MAX_SUPP_RATE_MASK           0x1fff0000
21085e3dd157SKalle Valo #define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT     16
21095e3dd157SKalle Valo 
21105e3dd157SKalle Valo enum {
21115e3dd157SKalle Valo 	REGDMN_MODE_11A              = 0x00001, /* 11a channels */
21125e3dd157SKalle Valo 	REGDMN_MODE_TURBO            = 0x00002, /* 11a turbo-only channels */
21135e3dd157SKalle Valo 	REGDMN_MODE_11B              = 0x00004, /* 11b channels */
21145e3dd157SKalle Valo 	REGDMN_MODE_PUREG            = 0x00008, /* 11g channels (OFDM only) */
21155e3dd157SKalle Valo 	REGDMN_MODE_11G              = 0x00008, /* XXX historical */
21165e3dd157SKalle Valo 	REGDMN_MODE_108G             = 0x00020, /* 11a+Turbo channels */
21175e3dd157SKalle Valo 	REGDMN_MODE_108A             = 0x00040, /* 11g+Turbo channels */
21185e3dd157SKalle Valo 	REGDMN_MODE_XR               = 0x00100, /* XR channels */
21195e3dd157SKalle Valo 	REGDMN_MODE_11A_HALF_RATE    = 0x00200, /* 11A half rate channels */
21205e3dd157SKalle Valo 	REGDMN_MODE_11A_QUARTER_RATE = 0x00400, /* 11A quarter rate channels */
21215e3dd157SKalle Valo 	REGDMN_MODE_11NG_HT20        = 0x00800, /* 11N-G HT20 channels */
21225e3dd157SKalle Valo 	REGDMN_MODE_11NA_HT20        = 0x01000, /* 11N-A HT20 channels */
21235e3dd157SKalle Valo 	REGDMN_MODE_11NG_HT40PLUS    = 0x02000, /* 11N-G HT40 + channels */
21245e3dd157SKalle Valo 	REGDMN_MODE_11NG_HT40MINUS   = 0x04000, /* 11N-G HT40 - channels */
21255e3dd157SKalle Valo 	REGDMN_MODE_11NA_HT40PLUS    = 0x08000, /* 11N-A HT40 + channels */
21265e3dd157SKalle Valo 	REGDMN_MODE_11NA_HT40MINUS   = 0x10000, /* 11N-A HT40 - channels */
21275e3dd157SKalle Valo 	REGDMN_MODE_11AC_VHT20       = 0x20000, /* 5Ghz, VHT20 */
21285e3dd157SKalle Valo 	REGDMN_MODE_11AC_VHT40PLUS   = 0x40000, /* 5Ghz, VHT40 + channels */
21295e3dd157SKalle Valo 	REGDMN_MODE_11AC_VHT40MINUS  = 0x80000, /* 5Ghz  VHT40 - channels */
21305e3dd157SKalle Valo 	REGDMN_MODE_11AC_VHT80       = 0x100000, /* 5Ghz, VHT80 channels */
2131bc1efd73SSebastian Gottschall 	REGDMN_MODE_11AC_VHT160      = 0x200000,     /* 5Ghz, VHT160 channels */
2132bc1efd73SSebastian Gottschall 	REGDMN_MODE_11AC_VHT80_80    = 0x400000,     /* 5Ghz, VHT80+80 channels */
21335e3dd157SKalle Valo 	REGDMN_MODE_ALL              = 0xffffffff
21345e3dd157SKalle Valo };
21355e3dd157SKalle Valo 
21365e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_HALF_RATE        0x00000001
21375e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_QUARTER_RATE     0x00000002
21385e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_HAL49GHZ         0x00000004
21395e3dd157SKalle Valo 
21405e3dd157SKalle Valo /* regulatory capabilities */
21415e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND   0x0040
21425e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN    0x0080
21435e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U2         0x0100
21445e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND    0x0200
21455e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD     0x0400
21465e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A    0x0800
21475e3dd157SKalle Valo 
21485e3dd157SKalle Valo struct hal_reg_capabilities {
21495e3dd157SKalle Valo 	/* regdomain value specified in EEPROM */
21505e3dd157SKalle Valo 	__le32 eeprom_rd;
21515e3dd157SKalle Valo 	/*regdomain */
21525e3dd157SKalle Valo 	__le32 eeprom_rd_ext;
21535e3dd157SKalle Valo 	/* CAP1 capabilities bit map. */
21545e3dd157SKalle Valo 	__le32 regcap1;
21555e3dd157SKalle Valo 	/* REGDMN EEPROM CAP. */
21565e3dd157SKalle Valo 	__le32 regcap2;
21575e3dd157SKalle Valo 	/* REGDMN MODE */
21585e3dd157SKalle Valo 	__le32 wireless_modes;
21595e3dd157SKalle Valo 	__le32 low_2ghz_chan;
21605e3dd157SKalle Valo 	__le32 high_2ghz_chan;
21615e3dd157SKalle Valo 	__le32 low_5ghz_chan;
21625e3dd157SKalle Valo 	__le32 high_5ghz_chan;
21635e3dd157SKalle Valo } __packed;
21645e3dd157SKalle Valo 
21655e3dd157SKalle Valo enum wlan_mode_capability {
21665e3dd157SKalle Valo 	WHAL_WLAN_11A_CAPABILITY   = 0x1,
21675e3dd157SKalle Valo 	WHAL_WLAN_11G_CAPABILITY   = 0x2,
21685e3dd157SKalle Valo 	WHAL_WLAN_11AG_CAPABILITY  = 0x3,
21695e3dd157SKalle Valo };
21705e3dd157SKalle Valo 
21715e3dd157SKalle Valo /* structure used by FW for requesting host memory */
21725e3dd157SKalle Valo struct wlan_host_mem_req {
21735e3dd157SKalle Valo 	/* ID of the request */
21745e3dd157SKalle Valo 	__le32 req_id;
21755e3dd157SKalle Valo 	/* size of the  of each unit */
21765e3dd157SKalle Valo 	__le32 unit_size;
21775e3dd157SKalle Valo 	/* flags to  indicate that
21785e3dd157SKalle Valo 	 * the number units is dependent
21795e3dd157SKalle Valo 	 * on number of resources(num vdevs num peers .. etc)
21805e3dd157SKalle Valo 	 */
21815e3dd157SKalle Valo 	__le32 num_unit_info;
21825e3dd157SKalle Valo 	/*
21835e3dd157SKalle Valo 	 * actual number of units to allocate . if flags in the num_unit_info
21845e3dd157SKalle Valo 	 * indicate that number of units is tied to number of a particular
21855e3dd157SKalle Valo 	 * resource to allocate then  num_units filed is set to 0 and host
21865e3dd157SKalle Valo 	 * will derive the number units from number of the resources it is
21875e3dd157SKalle Valo 	 * requesting.
21885e3dd157SKalle Valo 	 */
21895e3dd157SKalle Valo 	__le32 num_units;
21905e3dd157SKalle Valo } __packed;
21915e3dd157SKalle Valo 
21925e3dd157SKalle Valo /*
21935e3dd157SKalle Valo  * The following struct holds optional payload for
21945e3dd157SKalle Valo  * wmi_service_ready_event,e.g., 11ac pass some of the
21955e3dd157SKalle Valo  * device capability to the host.
21965e3dd157SKalle Valo  */
21975e3dd157SKalle Valo struct wmi_service_ready_event {
21985e3dd157SKalle Valo 	__le32 sw_version;
21995e3dd157SKalle Valo 	__le32 sw_version_1;
22005e3dd157SKalle Valo 	__le32 abi_version;
22015e3dd157SKalle Valo 	/* WMI_PHY_CAPABILITY */
22025e3dd157SKalle Valo 	__le32 phy_capability;
22035e3dd157SKalle Valo 	/* Maximum number of frag table entries that SW will populate less 1 */
22045e3dd157SKalle Valo 	__le32 max_frag_entry;
2205c4f8c836SMichal Kazior 	__le32 wmi_service_bitmap[16];
22065e3dd157SKalle Valo 	__le32 num_rf_chains;
22075e3dd157SKalle Valo 	/*
22085e3dd157SKalle Valo 	 * The following field is only valid for service type
22095e3dd157SKalle Valo 	 * WMI_SERVICE_11AC
22105e3dd157SKalle Valo 	 */
22115e3dd157SKalle Valo 	__le32 ht_cap_info; /* WMI HT Capability */
22125e3dd157SKalle Valo 	__le32 vht_cap_info; /* VHT capability info field of 802.11ac */
22135e3dd157SKalle Valo 	__le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */
22145e3dd157SKalle Valo 	__le32 hw_min_tx_power;
22155e3dd157SKalle Valo 	__le32 hw_max_tx_power;
22165e3dd157SKalle Valo 	struct hal_reg_capabilities hal_reg_capabilities;
22175e3dd157SKalle Valo 	__le32 sys_cap_info;
22185e3dd157SKalle Valo 	__le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */
22195e3dd157SKalle Valo 	/*
22205e3dd157SKalle Valo 	 * Max beacon and Probe Response IE offload size
22215e3dd157SKalle Valo 	 * (includes optional P2P IEs)
22225e3dd157SKalle Valo 	 */
22235e3dd157SKalle Valo 	__le32 max_bcn_ie_size;
22245e3dd157SKalle Valo 	/*
22255e3dd157SKalle Valo 	 * request to host to allocate a chuck of memory and pss it down to FW
22265e3dd157SKalle Valo 	 * via WM_INIT. FW uses this as FW extesnsion memory for saving its
22275e3dd157SKalle Valo 	 * data structures. Only valid for low latency interfaces like PCIE
22285e3dd157SKalle Valo 	 * where FW can access this memory directly (or) by DMA.
22295e3dd157SKalle Valo 	 */
22305e3dd157SKalle Valo 	__le32 num_mem_reqs;
22315c01aa3dSMichal Kazior 	struct wlan_host_mem_req mem_reqs[0];
22325e3dd157SKalle Valo } __packed;
22335e3dd157SKalle Valo 
22346f97d256SBartosz Markowski /* This is the definition from 10.X firmware branch */
22355c01aa3dSMichal Kazior struct wmi_10x_service_ready_event {
22366f97d256SBartosz Markowski 	__le32 sw_version;
22376f97d256SBartosz Markowski 	__le32 abi_version;
22386f97d256SBartosz Markowski 
22396f97d256SBartosz Markowski 	/* WMI_PHY_CAPABILITY */
22406f97d256SBartosz Markowski 	__le32 phy_capability;
22416f97d256SBartosz Markowski 
22426f97d256SBartosz Markowski 	/* Maximum number of frag table entries that SW will populate less 1 */
22436f97d256SBartosz Markowski 	__le32 max_frag_entry;
2244c4f8c836SMichal Kazior 	__le32 wmi_service_bitmap[16];
22456f97d256SBartosz Markowski 	__le32 num_rf_chains;
22466f97d256SBartosz Markowski 
22476f97d256SBartosz Markowski 	/*
22486f97d256SBartosz Markowski 	 * The following field is only valid for service type
22496f97d256SBartosz Markowski 	 * WMI_SERVICE_11AC
22506f97d256SBartosz Markowski 	 */
22516f97d256SBartosz Markowski 	__le32 ht_cap_info; /* WMI HT Capability */
22526f97d256SBartosz Markowski 	__le32 vht_cap_info; /* VHT capability info field of 802.11ac */
22536f97d256SBartosz Markowski 	__le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */
22546f97d256SBartosz Markowski 	__le32 hw_min_tx_power;
22556f97d256SBartosz Markowski 	__le32 hw_max_tx_power;
22566f97d256SBartosz Markowski 
22576f97d256SBartosz Markowski 	struct hal_reg_capabilities hal_reg_capabilities;
22586f97d256SBartosz Markowski 
22596f97d256SBartosz Markowski 	__le32 sys_cap_info;
22606f97d256SBartosz Markowski 	__le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */
22616f97d256SBartosz Markowski 
22626f97d256SBartosz Markowski 	/*
22636f97d256SBartosz Markowski 	 * request to host to allocate a chuck of memory and pss it down to FW
22646f97d256SBartosz Markowski 	 * via WM_INIT. FW uses this as FW extesnsion memory for saving its
22656f97d256SBartosz Markowski 	 * data structures. Only valid for low latency interfaces like PCIE
22666f97d256SBartosz Markowski 	 * where FW can access this memory directly (or) by DMA.
22676f97d256SBartosz Markowski 	 */
22686f97d256SBartosz Markowski 	__le32 num_mem_reqs;
22696f97d256SBartosz Markowski 
22705c01aa3dSMichal Kazior 	struct wlan_host_mem_req mem_reqs[0];
22716f97d256SBartosz Markowski } __packed;
22726f97d256SBartosz Markowski 
22735e3dd157SKalle Valo #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
22745e3dd157SKalle Valo #define WMI_UNIFIED_READY_TIMEOUT_HZ (5 * HZ)
22755e3dd157SKalle Valo 
22765e3dd157SKalle Valo struct wmi_ready_event {
22775e3dd157SKalle Valo 	__le32 sw_version;
22785e3dd157SKalle Valo 	__le32 abi_version;
22795e3dd157SKalle Valo 	struct wmi_mac_addr mac_addr;
22805e3dd157SKalle Valo 	__le32 status;
22815e3dd157SKalle Valo } __packed;
22825e3dd157SKalle Valo 
22835e3dd157SKalle Valo struct wmi_resource_config {
22845e3dd157SKalle Valo 	/* number of virtual devices (VAPs) to support */
22855e3dd157SKalle Valo 	__le32 num_vdevs;
22865e3dd157SKalle Valo 
22875e3dd157SKalle Valo 	/* number of peer nodes to support */
22885e3dd157SKalle Valo 	__le32 num_peers;
22895e3dd157SKalle Valo 
22905e3dd157SKalle Valo 	/*
22915e3dd157SKalle Valo 	 * In offload mode target supports features like WOW, chatter and
22925e3dd157SKalle Valo 	 * other protocol offloads. In order to support them some
22935e3dd157SKalle Valo 	 * functionalities like reorder buffering, PN checking need to be
2294e13dbeadSJoe Perches 	 * done in target. This determines maximum number of peers supported
22955e3dd157SKalle Valo 	 * by target in offload mode
22965e3dd157SKalle Valo 	 */
22975e3dd157SKalle Valo 	__le32 num_offload_peers;
22985e3dd157SKalle Valo 
22995e3dd157SKalle Valo 	/* For target-based RX reordering */
23005e3dd157SKalle Valo 	__le32 num_offload_reorder_bufs;
23015e3dd157SKalle Valo 
23025e3dd157SKalle Valo 	/* number of keys per peer */
23035e3dd157SKalle Valo 	__le32 num_peer_keys;
23045e3dd157SKalle Valo 
23055e3dd157SKalle Valo 	/* total number of TX/RX data TIDs */
23065e3dd157SKalle Valo 	__le32 num_tids;
23075e3dd157SKalle Valo 
23085e3dd157SKalle Valo 	/*
23095e3dd157SKalle Valo 	 * max skid for resolving hash collisions
23105e3dd157SKalle Valo 	 *
23115e3dd157SKalle Valo 	 *   The address search table is sparse, so that if two MAC addresses
23125e3dd157SKalle Valo 	 *   result in the same hash value, the second of these conflicting
23135e3dd157SKalle Valo 	 *   entries can slide to the next index in the address search table,
23145e3dd157SKalle Valo 	 *   and use it, if it is unoccupied.  This ast_skid_limit parameter
23155e3dd157SKalle Valo 	 *   specifies the upper bound on how many subsequent indices to search
23165e3dd157SKalle Valo 	 *   over to find an unoccupied space.
23175e3dd157SKalle Valo 	 */
23185e3dd157SKalle Valo 	__le32 ast_skid_limit;
23195e3dd157SKalle Valo 
23205e3dd157SKalle Valo 	/*
23215e3dd157SKalle Valo 	 * the nominal chain mask for transmit
23225e3dd157SKalle Valo 	 *
23235e3dd157SKalle Valo 	 *   The chain mask may be modified dynamically, e.g. to operate AP
23245e3dd157SKalle Valo 	 *   tx with a reduced number of chains if no clients are associated.
23255e3dd157SKalle Valo 	 *   This configuration parameter specifies the nominal chain-mask that
23265e3dd157SKalle Valo 	 *   should be used when not operating with a reduced set of tx chains.
23275e3dd157SKalle Valo 	 */
23285e3dd157SKalle Valo 	__le32 tx_chain_mask;
23295e3dd157SKalle Valo 
23305e3dd157SKalle Valo 	/*
23315e3dd157SKalle Valo 	 * the nominal chain mask for receive
23325e3dd157SKalle Valo 	 *
23335e3dd157SKalle Valo 	 *   The chain mask may be modified dynamically, e.g. for a client
23345e3dd157SKalle Valo 	 *   to use a reduced number of chains for receive if the traffic to
23355e3dd157SKalle Valo 	 *   the client is low enough that it doesn't require downlink MIMO
23365e3dd157SKalle Valo 	 *   or antenna diversity.
23375e3dd157SKalle Valo 	 *   This configuration parameter specifies the nominal chain-mask that
23385e3dd157SKalle Valo 	 *   should be used when not operating with a reduced set of rx chains.
23395e3dd157SKalle Valo 	 */
23405e3dd157SKalle Valo 	__le32 rx_chain_mask;
23415e3dd157SKalle Valo 
23425e3dd157SKalle Valo 	/*
23435e3dd157SKalle Valo 	 * what rx reorder timeout (ms) to use for the AC
23445e3dd157SKalle Valo 	 *
23455e3dd157SKalle Valo 	 *   Each WMM access class (voice, video, best-effort, background) will
23465e3dd157SKalle Valo 	 *   have its own timeout value to dictate how long to wait for missing
23475e3dd157SKalle Valo 	 *   rx MPDUs to arrive before flushing subsequent MPDUs that have
23485e3dd157SKalle Valo 	 *   already been received.
23495e3dd157SKalle Valo 	 *   This parameter specifies the timeout in milliseconds for each
23505e3dd157SKalle Valo 	 *   class.
23515e3dd157SKalle Valo 	 */
23525e3dd157SKalle Valo 	__le32 rx_timeout_pri_vi;
23535e3dd157SKalle Valo 	__le32 rx_timeout_pri_vo;
23545e3dd157SKalle Valo 	__le32 rx_timeout_pri_be;
23555e3dd157SKalle Valo 	__le32 rx_timeout_pri_bk;
23565e3dd157SKalle Valo 
23575e3dd157SKalle Valo 	/*
23585e3dd157SKalle Valo 	 * what mode the rx should decap packets to
23595e3dd157SKalle Valo 	 *
23605e3dd157SKalle Valo 	 *   MAC can decap to RAW (no decap), native wifi or Ethernet types
23615e3dd157SKalle Valo 	 *   THis setting also determines the default TX behavior, however TX
23625e3dd157SKalle Valo 	 *   behavior can be modified on a per VAP basis during VAP init
23635e3dd157SKalle Valo 	 */
23645e3dd157SKalle Valo 	__le32 rx_decap_mode;
23655e3dd157SKalle Valo 
23668e4a4f5dSGeert Uytterhoeven 	/* what is the maximum number of scan requests that can be queued */
23675e3dd157SKalle Valo 	__le32 scan_max_pending_reqs;
23685e3dd157SKalle Valo 
23695e3dd157SKalle Valo 	/* maximum VDEV that could use BMISS offload */
23705e3dd157SKalle Valo 	__le32 bmiss_offload_max_vdev;
23715e3dd157SKalle Valo 
23725e3dd157SKalle Valo 	/* maximum VDEV that could use offload roaming */
23735e3dd157SKalle Valo 	__le32 roam_offload_max_vdev;
23745e3dd157SKalle Valo 
23755e3dd157SKalle Valo 	/* maximum AP profiles that would push to offload roaming */
23765e3dd157SKalle Valo 	__le32 roam_offload_max_ap_profiles;
23775e3dd157SKalle Valo 
23785e3dd157SKalle Valo 	/*
23795e3dd157SKalle Valo 	 * how many groups to use for mcast->ucast conversion
23805e3dd157SKalle Valo 	 *
23815e3dd157SKalle Valo 	 *   The target's WAL maintains a table to hold information regarding
23825e3dd157SKalle Valo 	 *   which peers belong to a given multicast group, so that if
23835e3dd157SKalle Valo 	 *   multicast->unicast conversion is enabled, the target can convert
23845e3dd157SKalle Valo 	 *   multicast tx frames to a series of unicast tx frames, to each
23855e3dd157SKalle Valo 	 *   peer within the multicast group.
23865e3dd157SKalle Valo 	     This num_mcast_groups configuration parameter tells the target how
23875e3dd157SKalle Valo 	 *   many multicast groups to provide storage for within its multicast
23885e3dd157SKalle Valo 	 *   group membership table.
23895e3dd157SKalle Valo 	 */
23905e3dd157SKalle Valo 	__le32 num_mcast_groups;
23915e3dd157SKalle Valo 
23925e3dd157SKalle Valo 	/*
23935e3dd157SKalle Valo 	 * size to alloc for the mcast membership table
23945e3dd157SKalle Valo 	 *
23955e3dd157SKalle Valo 	 *   This num_mcast_table_elems configuration parameter tells the
23965e3dd157SKalle Valo 	 *   target how many peer elements it needs to provide storage for in
23975e3dd157SKalle Valo 	 *   its multicast group membership table.
23985e3dd157SKalle Valo 	 *   These multicast group membership table elements are shared by the
23995e3dd157SKalle Valo 	 *   multicast groups stored within the table.
24005e3dd157SKalle Valo 	 */
24015e3dd157SKalle Valo 	__le32 num_mcast_table_elems;
24025e3dd157SKalle Valo 
24035e3dd157SKalle Valo 	/*
24045e3dd157SKalle Valo 	 * whether/how to do multicast->unicast conversion
24055e3dd157SKalle Valo 	 *
24065e3dd157SKalle Valo 	 *   This configuration parameter specifies whether the target should
24075e3dd157SKalle Valo 	 *   perform multicast --> unicast conversion on transmit, and if so,
24085e3dd157SKalle Valo 	 *   what to do if it finds no entries in its multicast group
24095e3dd157SKalle Valo 	 *   membership table for the multicast IP address in the tx frame.
24105e3dd157SKalle Valo 	 *   Configuration value:
24115e3dd157SKalle Valo 	 *   0 -> Do not perform multicast to unicast conversion.
24125e3dd157SKalle Valo 	 *   1 -> Convert multicast frames to unicast, if the IP multicast
24135e3dd157SKalle Valo 	 *        address from the tx frame is found in the multicast group
24145e3dd157SKalle Valo 	 *        membership table.  If the IP multicast address is not found,
24155e3dd157SKalle Valo 	 *        drop the frame.
24165e3dd157SKalle Valo 	 *   2 -> Convert multicast frames to unicast, if the IP multicast
24175e3dd157SKalle Valo 	 *        address from the tx frame is found in the multicast group
24185e3dd157SKalle Valo 	 *        membership table.  If the IP multicast address is not found,
24195e3dd157SKalle Valo 	 *        transmit the frame as multicast.
24205e3dd157SKalle Valo 	 */
24215e3dd157SKalle Valo 	__le32 mcast2ucast_mode;
24225e3dd157SKalle Valo 
24235e3dd157SKalle Valo 	/*
24245e3dd157SKalle Valo 	 * how much memory to allocate for a tx PPDU dbg log
24255e3dd157SKalle Valo 	 *
24265e3dd157SKalle Valo 	 *   This parameter controls how much memory the target will allocate
24275e3dd157SKalle Valo 	 *   to store a log of tx PPDU meta-information (how large the PPDU
24285e3dd157SKalle Valo 	 *   was, when it was sent, whether it was successful, etc.)
24295e3dd157SKalle Valo 	 */
24305e3dd157SKalle Valo 	__le32 tx_dbg_log_size;
24315e3dd157SKalle Valo 
24325e3dd157SKalle Valo 	/* how many AST entries to be allocated for WDS */
24335e3dd157SKalle Valo 	__le32 num_wds_entries;
24345e3dd157SKalle Valo 
24355e3dd157SKalle Valo 	/*
24365e3dd157SKalle Valo 	 * MAC DMA burst size, e.g., For target PCI limit can be
24375e3dd157SKalle Valo 	 * 0 -default, 1 256B
24385e3dd157SKalle Valo 	 */
24395e3dd157SKalle Valo 	__le32 dma_burst_size;
24405e3dd157SKalle Valo 
24415e3dd157SKalle Valo 	/*
24425e3dd157SKalle Valo 	 * Fixed delimiters to be inserted after every MPDU to
24435e3dd157SKalle Valo 	 * account for interface latency to avoid underrun.
24445e3dd157SKalle Valo 	 */
24455e3dd157SKalle Valo 	__le32 mac_aggr_delim;
24465e3dd157SKalle Valo 
24475e3dd157SKalle Valo 	/*
24485e3dd157SKalle Valo 	 *   determine whether target is responsible for detecting duplicate
24495e3dd157SKalle Valo 	 *   non-aggregate MPDU and timing out stale fragments.
24505e3dd157SKalle Valo 	 *
24515e3dd157SKalle Valo 	 *   A-MPDU reordering is always performed on the target.
24525e3dd157SKalle Valo 	 *
24535e3dd157SKalle Valo 	 *   0: target responsible for frag timeout and dup checking
24545e3dd157SKalle Valo 	 *   1: host responsible for frag timeout and dup checking
24555e3dd157SKalle Valo 	 */
24565e3dd157SKalle Valo 	__le32 rx_skip_defrag_timeout_dup_detection_check;
24575e3dd157SKalle Valo 
24585e3dd157SKalle Valo 	/*
24595e3dd157SKalle Valo 	 * Configuration for VoW :
24605e3dd157SKalle Valo 	 * No of Video Nodes to be supported
24615e3dd157SKalle Valo 	 * and Max no of descriptors for each Video link (node).
24625e3dd157SKalle Valo 	 */
24635e3dd157SKalle Valo 	__le32 vow_config;
24645e3dd157SKalle Valo 
24655e3dd157SKalle Valo 	/* maximum VDEV that could use GTK offload */
24665e3dd157SKalle Valo 	__le32 gtk_offload_max_vdev;
24675e3dd157SKalle Valo 
24685e3dd157SKalle Valo 	/* Number of msdu descriptors target should use */
24695e3dd157SKalle Valo 	__le32 num_msdu_desc;
24705e3dd157SKalle Valo 
24715e3dd157SKalle Valo 	/*
24725e3dd157SKalle Valo 	 * Max. number of Tx fragments per MSDU
24735e3dd157SKalle Valo 	 *  This parameter controls the max number of Tx fragments per MSDU.
24745e3dd157SKalle Valo 	 *  This is sent by the target as part of the WMI_SERVICE_READY event
2475e13dbeadSJoe Perches 	 *  and is overridden by the OS shim as required.
24765e3dd157SKalle Valo 	 */
24775e3dd157SKalle Valo 	__le32 max_frag_entries;
24785e3dd157SKalle Valo } __packed;
24795e3dd157SKalle Valo 
248012b2b9e3SBartosz Markowski struct wmi_resource_config_10x {
248112b2b9e3SBartosz Markowski 	/* number of virtual devices (VAPs) to support */
248212b2b9e3SBartosz Markowski 	__le32 num_vdevs;
248312b2b9e3SBartosz Markowski 
248412b2b9e3SBartosz Markowski 	/* number of peer nodes to support */
248512b2b9e3SBartosz Markowski 	__le32 num_peers;
248612b2b9e3SBartosz Markowski 
248712b2b9e3SBartosz Markowski 	/* number of keys per peer */
248812b2b9e3SBartosz Markowski 	__le32 num_peer_keys;
248912b2b9e3SBartosz Markowski 
249012b2b9e3SBartosz Markowski 	/* total number of TX/RX data TIDs */
249112b2b9e3SBartosz Markowski 	__le32 num_tids;
249212b2b9e3SBartosz Markowski 
249312b2b9e3SBartosz Markowski 	/*
249412b2b9e3SBartosz Markowski 	 * max skid for resolving hash collisions
249512b2b9e3SBartosz Markowski 	 *
249612b2b9e3SBartosz Markowski 	 *   The address search table is sparse, so that if two MAC addresses
249712b2b9e3SBartosz Markowski 	 *   result in the same hash value, the second of these conflicting
249812b2b9e3SBartosz Markowski 	 *   entries can slide to the next index in the address search table,
249912b2b9e3SBartosz Markowski 	 *   and use it, if it is unoccupied.  This ast_skid_limit parameter
250012b2b9e3SBartosz Markowski 	 *   specifies the upper bound on how many subsequent indices to search
250112b2b9e3SBartosz Markowski 	 *   over to find an unoccupied space.
250212b2b9e3SBartosz Markowski 	 */
250312b2b9e3SBartosz Markowski 	__le32 ast_skid_limit;
250412b2b9e3SBartosz Markowski 
250512b2b9e3SBartosz Markowski 	/*
250612b2b9e3SBartosz Markowski 	 * the nominal chain mask for transmit
250712b2b9e3SBartosz Markowski 	 *
250812b2b9e3SBartosz Markowski 	 *   The chain mask may be modified dynamically, e.g. to operate AP
250912b2b9e3SBartosz Markowski 	 *   tx with a reduced number of chains if no clients are associated.
251012b2b9e3SBartosz Markowski 	 *   This configuration parameter specifies the nominal chain-mask that
251112b2b9e3SBartosz Markowski 	 *   should be used when not operating with a reduced set of tx chains.
251212b2b9e3SBartosz Markowski 	 */
251312b2b9e3SBartosz Markowski 	__le32 tx_chain_mask;
251412b2b9e3SBartosz Markowski 
251512b2b9e3SBartosz Markowski 	/*
251612b2b9e3SBartosz Markowski 	 * the nominal chain mask for receive
251712b2b9e3SBartosz Markowski 	 *
251812b2b9e3SBartosz Markowski 	 *   The chain mask may be modified dynamically, e.g. for a client
251912b2b9e3SBartosz Markowski 	 *   to use a reduced number of chains for receive if the traffic to
252012b2b9e3SBartosz Markowski 	 *   the client is low enough that it doesn't require downlink MIMO
252112b2b9e3SBartosz Markowski 	 *   or antenna diversity.
252212b2b9e3SBartosz Markowski 	 *   This configuration parameter specifies the nominal chain-mask that
252312b2b9e3SBartosz Markowski 	 *   should be used when not operating with a reduced set of rx chains.
252412b2b9e3SBartosz Markowski 	 */
252512b2b9e3SBartosz Markowski 	__le32 rx_chain_mask;
252612b2b9e3SBartosz Markowski 
252712b2b9e3SBartosz Markowski 	/*
252812b2b9e3SBartosz Markowski 	 * what rx reorder timeout (ms) to use for the AC
252912b2b9e3SBartosz Markowski 	 *
253012b2b9e3SBartosz Markowski 	 *   Each WMM access class (voice, video, best-effort, background) will
253112b2b9e3SBartosz Markowski 	 *   have its own timeout value to dictate how long to wait for missing
253212b2b9e3SBartosz Markowski 	 *   rx MPDUs to arrive before flushing subsequent MPDUs that have
253312b2b9e3SBartosz Markowski 	 *   already been received.
253412b2b9e3SBartosz Markowski 	 *   This parameter specifies the timeout in milliseconds for each
253512b2b9e3SBartosz Markowski 	 *   class.
253612b2b9e3SBartosz Markowski 	 */
253712b2b9e3SBartosz Markowski 	__le32 rx_timeout_pri_vi;
253812b2b9e3SBartosz Markowski 	__le32 rx_timeout_pri_vo;
253912b2b9e3SBartosz Markowski 	__le32 rx_timeout_pri_be;
254012b2b9e3SBartosz Markowski 	__le32 rx_timeout_pri_bk;
254112b2b9e3SBartosz Markowski 
254212b2b9e3SBartosz Markowski 	/*
254312b2b9e3SBartosz Markowski 	 * what mode the rx should decap packets to
254412b2b9e3SBartosz Markowski 	 *
254512b2b9e3SBartosz Markowski 	 *   MAC can decap to RAW (no decap), native wifi or Ethernet types
254612b2b9e3SBartosz Markowski 	 *   THis setting also determines the default TX behavior, however TX
254712b2b9e3SBartosz Markowski 	 *   behavior can be modified on a per VAP basis during VAP init
254812b2b9e3SBartosz Markowski 	 */
254912b2b9e3SBartosz Markowski 	__le32 rx_decap_mode;
255012b2b9e3SBartosz Markowski 
25518e4a4f5dSGeert Uytterhoeven 	/* what is the maximum number of scan requests that can be queued */
255212b2b9e3SBartosz Markowski 	__le32 scan_max_pending_reqs;
255312b2b9e3SBartosz Markowski 
255412b2b9e3SBartosz Markowski 	/* maximum VDEV that could use BMISS offload */
255512b2b9e3SBartosz Markowski 	__le32 bmiss_offload_max_vdev;
255612b2b9e3SBartosz Markowski 
255712b2b9e3SBartosz Markowski 	/* maximum VDEV that could use offload roaming */
255812b2b9e3SBartosz Markowski 	__le32 roam_offload_max_vdev;
255912b2b9e3SBartosz Markowski 
256012b2b9e3SBartosz Markowski 	/* maximum AP profiles that would push to offload roaming */
256112b2b9e3SBartosz Markowski 	__le32 roam_offload_max_ap_profiles;
256212b2b9e3SBartosz Markowski 
256312b2b9e3SBartosz Markowski 	/*
256412b2b9e3SBartosz Markowski 	 * how many groups to use for mcast->ucast conversion
256512b2b9e3SBartosz Markowski 	 *
256612b2b9e3SBartosz Markowski 	 *   The target's WAL maintains a table to hold information regarding
256712b2b9e3SBartosz Markowski 	 *   which peers belong to a given multicast group, so that if
256812b2b9e3SBartosz Markowski 	 *   multicast->unicast conversion is enabled, the target can convert
256912b2b9e3SBartosz Markowski 	 *   multicast tx frames to a series of unicast tx frames, to each
257012b2b9e3SBartosz Markowski 	 *   peer within the multicast group.
257112b2b9e3SBartosz Markowski 	     This num_mcast_groups configuration parameter tells the target how
257212b2b9e3SBartosz Markowski 	 *   many multicast groups to provide storage for within its multicast
257312b2b9e3SBartosz Markowski 	 *   group membership table.
257412b2b9e3SBartosz Markowski 	 */
257512b2b9e3SBartosz Markowski 	__le32 num_mcast_groups;
257612b2b9e3SBartosz Markowski 
257712b2b9e3SBartosz Markowski 	/*
257812b2b9e3SBartosz Markowski 	 * size to alloc for the mcast membership table
257912b2b9e3SBartosz Markowski 	 *
258012b2b9e3SBartosz Markowski 	 *   This num_mcast_table_elems configuration parameter tells the
258112b2b9e3SBartosz Markowski 	 *   target how many peer elements it needs to provide storage for in
258212b2b9e3SBartosz Markowski 	 *   its multicast group membership table.
258312b2b9e3SBartosz Markowski 	 *   These multicast group membership table elements are shared by the
258412b2b9e3SBartosz Markowski 	 *   multicast groups stored within the table.
258512b2b9e3SBartosz Markowski 	 */
258612b2b9e3SBartosz Markowski 	__le32 num_mcast_table_elems;
258712b2b9e3SBartosz Markowski 
258812b2b9e3SBartosz Markowski 	/*
258912b2b9e3SBartosz Markowski 	 * whether/how to do multicast->unicast conversion
259012b2b9e3SBartosz Markowski 	 *
259112b2b9e3SBartosz Markowski 	 *   This configuration parameter specifies whether the target should
259212b2b9e3SBartosz Markowski 	 *   perform multicast --> unicast conversion on transmit, and if so,
259312b2b9e3SBartosz Markowski 	 *   what to do if it finds no entries in its multicast group
259412b2b9e3SBartosz Markowski 	 *   membership table for the multicast IP address in the tx frame.
259512b2b9e3SBartosz Markowski 	 *   Configuration value:
259612b2b9e3SBartosz Markowski 	 *   0 -> Do not perform multicast to unicast conversion.
259712b2b9e3SBartosz Markowski 	 *   1 -> Convert multicast frames to unicast, if the IP multicast
259812b2b9e3SBartosz Markowski 	 *        address from the tx frame is found in the multicast group
259912b2b9e3SBartosz Markowski 	 *        membership table.  If the IP multicast address is not found,
260012b2b9e3SBartosz Markowski 	 *        drop the frame.
260112b2b9e3SBartosz Markowski 	 *   2 -> Convert multicast frames to unicast, if the IP multicast
260212b2b9e3SBartosz Markowski 	 *        address from the tx frame is found in the multicast group
260312b2b9e3SBartosz Markowski 	 *        membership table.  If the IP multicast address is not found,
260412b2b9e3SBartosz Markowski 	 *        transmit the frame as multicast.
260512b2b9e3SBartosz Markowski 	 */
260612b2b9e3SBartosz Markowski 	__le32 mcast2ucast_mode;
260712b2b9e3SBartosz Markowski 
260812b2b9e3SBartosz Markowski 	/*
260912b2b9e3SBartosz Markowski 	 * how much memory to allocate for a tx PPDU dbg log
261012b2b9e3SBartosz Markowski 	 *
261112b2b9e3SBartosz Markowski 	 *   This parameter controls how much memory the target will allocate
261212b2b9e3SBartosz Markowski 	 *   to store a log of tx PPDU meta-information (how large the PPDU
261312b2b9e3SBartosz Markowski 	 *   was, when it was sent, whether it was successful, etc.)
261412b2b9e3SBartosz Markowski 	 */
261512b2b9e3SBartosz Markowski 	__le32 tx_dbg_log_size;
261612b2b9e3SBartosz Markowski 
261712b2b9e3SBartosz Markowski 	/* how many AST entries to be allocated for WDS */
261812b2b9e3SBartosz Markowski 	__le32 num_wds_entries;
261912b2b9e3SBartosz Markowski 
262012b2b9e3SBartosz Markowski 	/*
262112b2b9e3SBartosz Markowski 	 * MAC DMA burst size, e.g., For target PCI limit can be
262212b2b9e3SBartosz Markowski 	 * 0 -default, 1 256B
262312b2b9e3SBartosz Markowski 	 */
262412b2b9e3SBartosz Markowski 	__le32 dma_burst_size;
262512b2b9e3SBartosz Markowski 
262612b2b9e3SBartosz Markowski 	/*
262712b2b9e3SBartosz Markowski 	 * Fixed delimiters to be inserted after every MPDU to
262812b2b9e3SBartosz Markowski 	 * account for interface latency to avoid underrun.
262912b2b9e3SBartosz Markowski 	 */
263012b2b9e3SBartosz Markowski 	__le32 mac_aggr_delim;
263112b2b9e3SBartosz Markowski 
263212b2b9e3SBartosz Markowski 	/*
263312b2b9e3SBartosz Markowski 	 *   determine whether target is responsible for detecting duplicate
263412b2b9e3SBartosz Markowski 	 *   non-aggregate MPDU and timing out stale fragments.
263512b2b9e3SBartosz Markowski 	 *
263612b2b9e3SBartosz Markowski 	 *   A-MPDU reordering is always performed on the target.
263712b2b9e3SBartosz Markowski 	 *
263812b2b9e3SBartosz Markowski 	 *   0: target responsible for frag timeout and dup checking
263912b2b9e3SBartosz Markowski 	 *   1: host responsible for frag timeout and dup checking
264012b2b9e3SBartosz Markowski 	 */
264112b2b9e3SBartosz Markowski 	__le32 rx_skip_defrag_timeout_dup_detection_check;
264212b2b9e3SBartosz Markowski 
264312b2b9e3SBartosz Markowski 	/*
264412b2b9e3SBartosz Markowski 	 * Configuration for VoW :
264512b2b9e3SBartosz Markowski 	 * No of Video Nodes to be supported
264612b2b9e3SBartosz Markowski 	 * and Max no of descriptors for each Video link (node).
264712b2b9e3SBartosz Markowski 	 */
264812b2b9e3SBartosz Markowski 	__le32 vow_config;
264912b2b9e3SBartosz Markowski 
265012b2b9e3SBartosz Markowski 	/* Number of msdu descriptors target should use */
265112b2b9e3SBartosz Markowski 	__le32 num_msdu_desc;
265212b2b9e3SBartosz Markowski 
265312b2b9e3SBartosz Markowski 	/*
265412b2b9e3SBartosz Markowski 	 * Max. number of Tx fragments per MSDU
265512b2b9e3SBartosz Markowski 	 *  This parameter controls the max number of Tx fragments per MSDU.
265612b2b9e3SBartosz Markowski 	 *  This is sent by the target as part of the WMI_SERVICE_READY event
2657e13dbeadSJoe Perches 	 *  and is overridden by the OS shim as required.
265812b2b9e3SBartosz Markowski 	 */
265912b2b9e3SBartosz Markowski 	__le32 max_frag_entries;
266012b2b9e3SBartosz Markowski } __packed;
266112b2b9e3SBartosz Markowski 
26624a16fbecSRajkumar Manoharan enum wmi_10_2_feature_mask {
26634a16fbecSRajkumar Manoharan 	WMI_10_2_RX_BATCH_MODE = BIT(0),
26644a16fbecSRajkumar Manoharan 	WMI_10_2_ATF_CONFIG    = BIT(1),
2665de0c789bSYanbo Li 	WMI_10_2_COEX_GPIO     = BIT(3),
2666dd2c5fcbSRajkumar Manoharan 	WMI_10_2_BSS_CHAN_INFO = BIT(6),
2667de46c015SMohammed Shafi Shajakhan 	WMI_10_2_PEER_STATS    = BIT(7),
26684a16fbecSRajkumar Manoharan };
26694a16fbecSRajkumar Manoharan 
267024c88f78SMichal Kazior struct wmi_resource_config_10_2 {
267124c88f78SMichal Kazior 	struct wmi_resource_config_10x common;
267224c88f78SMichal Kazior 	__le32 max_peer_ext_stats;
267324c88f78SMichal Kazior 	__le32 smart_ant_cap; /* 0-disable, 1-enable */
267424c88f78SMichal Kazior 	__le32 bk_min_free;
267524c88f78SMichal Kazior 	__le32 be_min_free;
267624c88f78SMichal Kazior 	__le32 vi_min_free;
267724c88f78SMichal Kazior 	__le32 vo_min_free;
26784a16fbecSRajkumar Manoharan 	__le32 feature_mask;
267924c88f78SMichal Kazior } __packed;
268012b2b9e3SBartosz Markowski 
2681b0399417SRaja Mani #define NUM_UNITS_IS_NUM_VDEVS         BIT(0)
2682b0399417SRaja Mani #define NUM_UNITS_IS_NUM_PEERS         BIT(1)
2683b0399417SRaja Mani #define NUM_UNITS_IS_NUM_ACTIVE_PEERS  BIT(2)
2684b3effe61SBartosz Markowski 
2685d1e52a8eSRaja Mani struct wmi_resource_config_10_4 {
2686d1e52a8eSRaja Mani 	/* Number of virtual devices (VAPs) to support */
2687d1e52a8eSRaja Mani 	__le32 num_vdevs;
2688d1e52a8eSRaja Mani 
2689d1e52a8eSRaja Mani 	/* Number of peer nodes to support */
2690d1e52a8eSRaja Mani 	__le32 num_peers;
2691d1e52a8eSRaja Mani 
2692d1e52a8eSRaja Mani 	/* Number of active peer nodes to support */
2693d1e52a8eSRaja Mani 	__le32 num_active_peers;
2694d1e52a8eSRaja Mani 
2695d1e52a8eSRaja Mani 	/* In offload mode, target supports features like WOW, chatter and other
2696d1e52a8eSRaja Mani 	 * protocol offloads. In order to support them some functionalities like
2697d1e52a8eSRaja Mani 	 * reorder buffering, PN checking need to be done in target.
2698d1e52a8eSRaja Mani 	 * This determines maximum number of peers supported by target in
2699d1e52a8eSRaja Mani 	 * offload mode.
2700d1e52a8eSRaja Mani 	 */
2701d1e52a8eSRaja Mani 	__le32 num_offload_peers;
2702d1e52a8eSRaja Mani 
2703d1e52a8eSRaja Mani 	/* Number of reorder buffers available for doing target based reorder
2704d1e52a8eSRaja Mani 	 * Rx reorder buffering
2705d1e52a8eSRaja Mani 	 */
2706d1e52a8eSRaja Mani 	__le32 num_offload_reorder_buffs;
2707d1e52a8eSRaja Mani 
2708d1e52a8eSRaja Mani 	/* Number of keys per peer */
2709d1e52a8eSRaja Mani 	__le32 num_peer_keys;
2710d1e52a8eSRaja Mani 
2711d1e52a8eSRaja Mani 	/* Total number of TX/RX data TIDs */
2712d1e52a8eSRaja Mani 	__le32 num_tids;
2713d1e52a8eSRaja Mani 
2714d1e52a8eSRaja Mani 	/* Max skid for resolving hash collisions.
2715d1e52a8eSRaja Mani 	 * The address search table is sparse, so that if two MAC addresses
2716d1e52a8eSRaja Mani 	 * result in the same hash value, the second of these conflicting
2717d1e52a8eSRaja Mani 	 * entries can slide to the next index in the address search table,
2718d1e52a8eSRaja Mani 	 * and use it, if it is unoccupied.  This ast_skid_limit parameter
2719d1e52a8eSRaja Mani 	 * specifies the upper bound on how many subsequent indices to search
2720d1e52a8eSRaja Mani 	 * over to find an unoccupied space.
2721d1e52a8eSRaja Mani 	 */
2722d1e52a8eSRaja Mani 	__le32 ast_skid_limit;
2723d1e52a8eSRaja Mani 
2724d1e52a8eSRaja Mani 	/* The nominal chain mask for transmit.
2725d1e52a8eSRaja Mani 	 * The chain mask may be modified dynamically, e.g. to operate AP tx
2726d1e52a8eSRaja Mani 	 * with a reduced number of chains if no clients are associated.
2727d1e52a8eSRaja Mani 	 * This configuration parameter specifies the nominal chain-mask that
2728d1e52a8eSRaja Mani 	 * should be used when not operating with a reduced set of tx chains.
2729d1e52a8eSRaja Mani 	 */
2730d1e52a8eSRaja Mani 	__le32 tx_chain_mask;
2731d1e52a8eSRaja Mani 
2732d1e52a8eSRaja Mani 	/* The nominal chain mask for receive.
2733d1e52a8eSRaja Mani 	 * The chain mask may be modified dynamically, e.g. for a client to use
2734d1e52a8eSRaja Mani 	 * a reduced number of chains for receive if the traffic to the client
2735d1e52a8eSRaja Mani 	 * is low enough that it doesn't require downlink MIMO or antenna
2736d1e52a8eSRaja Mani 	 * diversity. This configuration parameter specifies the nominal
2737d1e52a8eSRaja Mani 	 * chain-mask that should be used when not operating with a reduced
2738d1e52a8eSRaja Mani 	 * set of rx chains.
2739d1e52a8eSRaja Mani 	 */
2740d1e52a8eSRaja Mani 	__le32 rx_chain_mask;
2741d1e52a8eSRaja Mani 
2742d1e52a8eSRaja Mani 	/* What rx reorder timeout (ms) to use for the AC.
2743d1e52a8eSRaja Mani 	 * Each WMM access class (voice, video, best-effort, background) will
2744d1e52a8eSRaja Mani 	 * have its own timeout value to dictate how long to wait for missing
2745d1e52a8eSRaja Mani 	 * rx MPDUs to arrive before flushing subsequent MPDUs that have already
2746d1e52a8eSRaja Mani 	 * been received. This parameter specifies the timeout in milliseconds
2747d1e52a8eSRaja Mani 	 * for each class.
2748d1e52a8eSRaja Mani 	 */
2749d1e52a8eSRaja Mani 	__le32 rx_timeout_pri[4];
2750d1e52a8eSRaja Mani 
2751d1e52a8eSRaja Mani 	/* What mode the rx should decap packets to.
2752d1e52a8eSRaja Mani 	 * MAC can decap to RAW (no decap), native wifi or Ethernet types.
2753d1e52a8eSRaja Mani 	 * This setting also determines the default TX behavior, however TX
2754d1e52a8eSRaja Mani 	 * behavior can be modified on a per VAP basis during VAP init
2755d1e52a8eSRaja Mani 	 */
2756d1e52a8eSRaja Mani 	__le32 rx_decap_mode;
2757d1e52a8eSRaja Mani 
2758d1e52a8eSRaja Mani 	__le32 scan_max_pending_req;
2759d1e52a8eSRaja Mani 
2760d1e52a8eSRaja Mani 	__le32 bmiss_offload_max_vdev;
2761d1e52a8eSRaja Mani 
2762d1e52a8eSRaja Mani 	__le32 roam_offload_max_vdev;
2763d1e52a8eSRaja Mani 
2764d1e52a8eSRaja Mani 	__le32 roam_offload_max_ap_profiles;
2765d1e52a8eSRaja Mani 
2766d1e52a8eSRaja Mani 	/* How many groups to use for mcast->ucast conversion.
2767d1e52a8eSRaja Mani 	 * The target's WAL maintains a table to hold information regarding
2768d1e52a8eSRaja Mani 	 * which peers belong to a given multicast group, so that if
2769d1e52a8eSRaja Mani 	 * multicast->unicast conversion is enabled, the target can convert
2770d1e52a8eSRaja Mani 	 * multicast tx frames to a series of unicast tx frames, to each peer
2771d1e52a8eSRaja Mani 	 * within the multicast group. This num_mcast_groups configuration
2772d1e52a8eSRaja Mani 	 * parameter tells the target how many multicast groups to provide
2773d1e52a8eSRaja Mani 	 * storage for within its multicast group membership table.
2774d1e52a8eSRaja Mani 	 */
2775d1e52a8eSRaja Mani 	__le32 num_mcast_groups;
2776d1e52a8eSRaja Mani 
2777d1e52a8eSRaja Mani 	/* Size to alloc for the mcast membership table.
2778d1e52a8eSRaja Mani 	 * This num_mcast_table_elems configuration parameter tells the target
2779d1e52a8eSRaja Mani 	 * how many peer elements it needs to provide storage for in its
2780d1e52a8eSRaja Mani 	 * multicast group membership table. These multicast group membership
2781d1e52a8eSRaja Mani 	 * table elements are shared by the multicast groups stored within
2782d1e52a8eSRaja Mani 	 * the table.
2783d1e52a8eSRaja Mani 	 */
2784d1e52a8eSRaja Mani 	__le32 num_mcast_table_elems;
2785d1e52a8eSRaja Mani 
2786d1e52a8eSRaja Mani 	/* Whether/how to do multicast->unicast conversion.
2787d1e52a8eSRaja Mani 	 * This configuration parameter specifies whether the target should
2788d1e52a8eSRaja Mani 	 * perform multicast --> unicast conversion on transmit, and if so,
2789d1e52a8eSRaja Mani 	 * what to do if it finds no entries in its multicast group membership
2790d1e52a8eSRaja Mani 	 * table for the multicast IP address in the tx frame.
2791d1e52a8eSRaja Mani 	 * Configuration value:
2792d1e52a8eSRaja Mani 	 * 0 -> Do not perform multicast to unicast conversion.
2793d1e52a8eSRaja Mani 	 * 1 -> Convert multicast frames to unicast, if the IP multicast address
2794d1e52a8eSRaja Mani 	 *      from the tx frame is found in the multicast group membership
2795d1e52a8eSRaja Mani 	 *      table.  If the IP multicast address is not found, drop the frame
2796d1e52a8eSRaja Mani 	 * 2 -> Convert multicast frames to unicast, if the IP multicast address
2797d1e52a8eSRaja Mani 	 *      from the tx frame is found in the multicast group membership
2798d1e52a8eSRaja Mani 	 *      table.  If the IP multicast address is not found, transmit the
2799d1e52a8eSRaja Mani 	 *      frame as multicast.
2800d1e52a8eSRaja Mani 	 */
2801d1e52a8eSRaja Mani 	__le32 mcast2ucast_mode;
2802d1e52a8eSRaja Mani 
2803d1e52a8eSRaja Mani 	/* How much memory to allocate for a tx PPDU dbg log.
2804d1e52a8eSRaja Mani 	 * This parameter controls how much memory the target will allocate to
2805d1e52a8eSRaja Mani 	 * store a log of tx PPDU meta-information (how large the PPDU was,
2806d1e52a8eSRaja Mani 	 * when it was sent, whether it was successful, etc.)
2807d1e52a8eSRaja Mani 	 */
2808d1e52a8eSRaja Mani 	__le32 tx_dbg_log_size;
2809d1e52a8eSRaja Mani 
2810d1e52a8eSRaja Mani 	/* How many AST entries to be allocated for WDS */
2811d1e52a8eSRaja Mani 	__le32 num_wds_entries;
2812d1e52a8eSRaja Mani 
2813d1e52a8eSRaja Mani 	/* MAC DMA burst size. 0 -default, 1 -256B */
2814d1e52a8eSRaja Mani 	__le32 dma_burst_size;
2815d1e52a8eSRaja Mani 
2816d1e52a8eSRaja Mani 	/* Fixed delimiters to be inserted after every MPDU to account for
2817d1e52a8eSRaja Mani 	 * interface latency to avoid underrun.
2818d1e52a8eSRaja Mani 	 */
2819d1e52a8eSRaja Mani 	__le32 mac_aggr_delim;
2820d1e52a8eSRaja Mani 
2821d1e52a8eSRaja Mani 	/* Determine whether target is responsible for detecting duplicate
2822d1e52a8eSRaja Mani 	 * non-aggregate MPDU and timing out stale fragments. A-MPDU reordering
2823d1e52a8eSRaja Mani 	 * is always performed on the target.
2824d1e52a8eSRaja Mani 	 *
2825d1e52a8eSRaja Mani 	 * 0: target responsible for frag timeout and dup checking
2826d1e52a8eSRaja Mani 	 * 1: host responsible for frag timeout and dup checking
2827d1e52a8eSRaja Mani 	 */
2828d1e52a8eSRaja Mani 	__le32 rx_skip_defrag_timeout_dup_detection_check;
2829d1e52a8eSRaja Mani 
2830d1e52a8eSRaja Mani 	/* Configuration for VoW : No of Video nodes to be supported and max
2831d1e52a8eSRaja Mani 	 * no of descriptors for each video link (node).
2832d1e52a8eSRaja Mani 	 */
2833d1e52a8eSRaja Mani 	__le32 vow_config;
2834d1e52a8eSRaja Mani 
2835d1e52a8eSRaja Mani 	/* Maximum vdev that could use gtk offload */
2836d1e52a8eSRaja Mani 	__le32 gtk_offload_max_vdev;
2837d1e52a8eSRaja Mani 
2838d1e52a8eSRaja Mani 	/* Number of msdu descriptors target should use */
2839d1e52a8eSRaja Mani 	__le32 num_msdu_desc;
2840d1e52a8eSRaja Mani 
2841d1e52a8eSRaja Mani 	/* Max number of tx fragments per MSDU.
2842d1e52a8eSRaja Mani 	 * This parameter controls the max number of tx fragments per MSDU.
2843d1e52a8eSRaja Mani 	 * This will passed by target as part of the WMI_SERVICE_READY event
2844d1e52a8eSRaja Mani 	 * and is overridden by the OS shim as required.
2845d1e52a8eSRaja Mani 	 */
2846d1e52a8eSRaja Mani 	__le32 max_frag_entries;
2847d1e52a8eSRaja Mani 
2848d1e52a8eSRaja Mani 	/* Max number of extended peer stats.
2849d1e52a8eSRaja Mani 	 * This parameter controls the max number of peers for which extended
2850d1e52a8eSRaja Mani 	 * statistics are supported by target
2851d1e52a8eSRaja Mani 	 */
2852d1e52a8eSRaja Mani 	__le32 max_peer_ext_stats;
2853d1e52a8eSRaja Mani 
2854d1e52a8eSRaja Mani 	/* Smart antenna capabilities information.
2855d1e52a8eSRaja Mani 	 * 1 - Smart antenna is enabled
2856d1e52a8eSRaja Mani 	 * 0 - Smart antenna is disabled
2857d1e52a8eSRaja Mani 	 * In future this can contain smart antenna specific capabilities.
2858d1e52a8eSRaja Mani 	 */
2859d1e52a8eSRaja Mani 	__le32 smart_ant_cap;
2860d1e52a8eSRaja Mani 
2861d1e52a8eSRaja Mani 	/* User can configure the buffers allocated for each AC (BE, BK, VI, VO)
2862d1e52a8eSRaja Mani 	 * during init.
2863d1e52a8eSRaja Mani 	 */
2864d1e52a8eSRaja Mani 	__le32 bk_minfree;
2865d1e52a8eSRaja Mani 	__le32 be_minfree;
2866d1e52a8eSRaja Mani 	__le32 vi_minfree;
2867d1e52a8eSRaja Mani 	__le32 vo_minfree;
2868d1e52a8eSRaja Mani 
2869d1e52a8eSRaja Mani 	/* Rx batch mode capability.
2870d1e52a8eSRaja Mani 	 * 1 - Rx batch mode enabled
2871d1e52a8eSRaja Mani 	 * 0 - Rx batch mode disabled
2872d1e52a8eSRaja Mani 	 */
2873d1e52a8eSRaja Mani 	__le32 rx_batchmode;
2874d1e52a8eSRaja Mani 
2875d1e52a8eSRaja Mani 	/* Thermal throttling capability.
2876d1e52a8eSRaja Mani 	 * 1 - Capable of thermal throttling
2877d1e52a8eSRaja Mani 	 * 0 - Not capable of thermal throttling
2878d1e52a8eSRaja Mani 	 */
2879d1e52a8eSRaja Mani 	__le32 tt_support;
2880d1e52a8eSRaja Mani 
2881d1e52a8eSRaja Mani 	/* ATF configuration.
2882d1e52a8eSRaja Mani 	 * 1  - Enable ATF
2883d1e52a8eSRaja Mani 	 * 0  - Disable ATF
2884d1e52a8eSRaja Mani 	 */
2885d1e52a8eSRaja Mani 	__le32 atf_config;
2886d1e52a8eSRaja Mani 
2887d1e52a8eSRaja Mani 	/* Configure padding to manage IP header un-alignment
2888d1e52a8eSRaja Mani 	 * 1  - Enable padding
2889d1e52a8eSRaja Mani 	 * 0  - Disable padding
2890d1e52a8eSRaja Mani 	 */
2891d1e52a8eSRaja Mani 	__le32 iphdr_pad_config;
2892d1e52a8eSRaja Mani 
2893169ff6dbSBen Greear 	/* qwrap configuration (bits 15-0)
2894d1e52a8eSRaja Mani 	 * 1  - This is qwrap configuration
2895d1e52a8eSRaja Mani 	 * 0  - This is not qwrap
2896169ff6dbSBen Greear 	 *
2897169ff6dbSBen Greear 	 * Bits 31-16 is alloc_frag_desc_for_data_pkt (1 enables, 0 disables)
2898169ff6dbSBen Greear 	 * In order to get ack-RSSI reporting and to specify the tx-rate for
2899169ff6dbSBen Greear 	 * individual frames, this option must be enabled.  This uses an extra
2900169ff6dbSBen Greear 	 * 4 bytes per tx-msdu descriptor, so don't enable it unless you need it.
2901d1e52a8eSRaja Mani 	 */
2902d1e52a8eSRaja Mani 	__le32 qwrap_config;
2903d1e52a8eSRaja Mani } __packed;
2904d1e52a8eSRaja Mani 
2905add6cd8dSManikanta Pubbisetty enum wmi_coex_version {
2906add6cd8dSManikanta Pubbisetty 	WMI_NO_COEX_VERSION_SUPPORT	= 0,
2907add6cd8dSManikanta Pubbisetty 	/* 3 wire coex support*/
2908add6cd8dSManikanta Pubbisetty 	WMI_COEX_VERSION_1		= 1,
2909add6cd8dSManikanta Pubbisetty 	/* 2.5 wire coex support*/
2910add6cd8dSManikanta Pubbisetty 	WMI_COEX_VERSION_2		= 2,
2911add6cd8dSManikanta Pubbisetty 	/* 2.5 wire coex with duty cycle support */
2912add6cd8dSManikanta Pubbisetty 	WMI_COEX_VERSION_3		= 3,
2913add6cd8dSManikanta Pubbisetty 	/* 4 wire coex support*/
2914add6cd8dSManikanta Pubbisetty 	WMI_COEX_VERSION_4		= 4,
2915add6cd8dSManikanta Pubbisetty };
2916add6cd8dSManikanta Pubbisetty 
291747771902SRaja Mani /**
291847771902SRaja Mani  * enum wmi_10_4_feature_mask - WMI 10.4 feature enable/disable flags
291947771902SRaja Mani  * @WMI_10_4_LTEU_SUPPORT: LTEU config
292047771902SRaja Mani  * @WMI_10_4_COEX_GPIO_SUPPORT: COEX GPIO config
292147771902SRaja Mani  * @WMI_10_4_AUX_RADIO_SPECTRAL_INTF: AUX Radio Enhancement for spectral scan
292247771902SRaja Mani  * @WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF: AUX Radio Enhancement for chan load scan
292347771902SRaja Mani  * @WMI_10_4_BSS_CHANNEL_INFO_64: BSS channel info stats
292447771902SRaja Mani  * @WMI_10_4_PEER_STATS: Per station stats
2925add6cd8dSManikanta Pubbisetty  * @WMI_10_4_VDEV_STATS: Per vdev stats
2926add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS: Implicit TDLS support in firmware enable/disable
2927add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_OFFCHAN: TDLS offchannel support enable/disable
2928add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_UAPSD_BUFFER_STA: TDLS buffer sta support enable/disable
2929add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_UAPSD_SLEEP_STA: TDLS sleep sta support enable/disable
2930add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_CONN_TRACKER_IN_HOST_MODE: TDLS connection tracker in host
2931add6cd8dSManikanta Pubbisetty  *	enable/disable
2932add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_EXPLICIT_MODE_ONLY:Explicit TDLS mode enable/disable
2933c7fd8d23SBalaji Pothunoori  * @WMI_10_4_TX_DATA_ACK_RSSI: Enable DATA ACK RSSI if firmware is capable
293447771902SRaja Mani  */
293547771902SRaja Mani enum wmi_10_4_feature_mask {
293647771902SRaja Mani 	WMI_10_4_LTEU_SUPPORT			= BIT(0),
293747771902SRaja Mani 	WMI_10_4_COEX_GPIO_SUPPORT		= BIT(1),
293847771902SRaja Mani 	WMI_10_4_AUX_RADIO_SPECTRAL_INTF	= BIT(2),
293947771902SRaja Mani 	WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF	= BIT(3),
294047771902SRaja Mani 	WMI_10_4_BSS_CHANNEL_INFO_64		= BIT(4),
294147771902SRaja Mani 	WMI_10_4_PEER_STATS			= BIT(5),
2942add6cd8dSManikanta Pubbisetty 	WMI_10_4_VDEV_STATS			= BIT(6),
2943add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS				= BIT(7),
2944add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_OFFCHAN			= BIT(8),
2945add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_UAPSD_BUFFER_STA		= BIT(9),
2946add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_UAPSD_SLEEP_STA		= BIT(10),
2947add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_CONN_TRACKER_IN_HOST_MODE = BIT(11),
2948add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_EXPLICIT_MODE_ONLY	= BIT(12),
2949c7fd8d23SBalaji Pothunoori 	WMI_10_4_TX_DATA_ACK_RSSI               = BIT(16),
2950add6cd8dSManikanta Pubbisetty 
295147771902SRaja Mani };
295247771902SRaja Mani 
295347771902SRaja Mani struct wmi_ext_resource_config_10_4_cmd {
295447771902SRaja Mani 	/* contains enum wmi_host_platform_type */
295547771902SRaja Mani 	__le32 host_platform_config;
295647771902SRaja Mani 	/* see enum wmi_10_4_feature_mask */
295747771902SRaja Mani 	__le32 fw_feature_bitmap;
2958add6cd8dSManikanta Pubbisetty 	/* WLAN priority GPIO number */
2959add6cd8dSManikanta Pubbisetty 	__le32 wlan_gpio_priority;
2960add6cd8dSManikanta Pubbisetty 	/* see enum wmi_coex_version */
2961add6cd8dSManikanta Pubbisetty 	__le32 coex_version;
2962add6cd8dSManikanta Pubbisetty 	/* COEX GPIO config */
2963add6cd8dSManikanta Pubbisetty 	__le32 coex_gpio_pin1;
2964add6cd8dSManikanta Pubbisetty 	__le32 coex_gpio_pin2;
2965add6cd8dSManikanta Pubbisetty 	__le32 coex_gpio_pin3;
2966add6cd8dSManikanta Pubbisetty 	/* number of vdevs allowed to perform tdls */
2967add6cd8dSManikanta Pubbisetty 	__le32 num_tdls_vdevs;
2968add6cd8dSManikanta Pubbisetty 	/* number of peers to track per TDLS vdev */
2969add6cd8dSManikanta Pubbisetty 	__le32 num_tdls_conn_table_entries;
2970add6cd8dSManikanta Pubbisetty 	/* number of tdls sleep sta supported */
2971add6cd8dSManikanta Pubbisetty 	__le32 max_tdls_concurrent_sleep_sta;
2972add6cd8dSManikanta Pubbisetty 	/* number of tdls buffer sta supported */
2973add6cd8dSManikanta Pubbisetty 	__le32 max_tdls_concurrent_buffer_sta;
297447771902SRaja Mani };
297547771902SRaja Mani 
29765c9f0713SErik Stromdahl /* structure describing host memory chunk. */
29775e3dd157SKalle Valo struct host_memory_chunk {
29785e3dd157SKalle Valo 	/* id of the request that is passed up in service ready */
29795e3dd157SKalle Valo 	__le32 req_id;
29805e3dd157SKalle Valo 	/* the physical address the memory chunk */
29815e3dd157SKalle Valo 	__le32 ptr;
29825e3dd157SKalle Valo 	/* size of the chunk */
29835e3dd157SKalle Valo 	__le32 size;
29845e3dd157SKalle Valo } __packed;
29855e3dd157SKalle Valo 
2986cf9fca8fSMichal Kazior struct wmi_host_mem_chunks {
2987cf9fca8fSMichal Kazior 	__le32 count;
2988cf9fca8fSMichal Kazior 	/* some fw revisions require at least 1 chunk regardless of count */
2989cf9fca8fSMichal Kazior 	struct host_memory_chunk items[1];
2990cf9fca8fSMichal Kazior } __packed;
2991cf9fca8fSMichal Kazior 
29925e3dd157SKalle Valo struct wmi_init_cmd {
29935e3dd157SKalle Valo 	struct wmi_resource_config resource_config;
2994cf9fca8fSMichal Kazior 	struct wmi_host_mem_chunks mem_chunks;
29955e3dd157SKalle Valo } __packed;
29965e3dd157SKalle Valo 
2997e13dbeadSJoe Perches /* _10x structure is from 10.X FW API */
299812b2b9e3SBartosz Markowski struct wmi_init_cmd_10x {
299912b2b9e3SBartosz Markowski 	struct wmi_resource_config_10x resource_config;
3000cf9fca8fSMichal Kazior 	struct wmi_host_mem_chunks mem_chunks;
300112b2b9e3SBartosz Markowski } __packed;
300212b2b9e3SBartosz Markowski 
300324c88f78SMichal Kazior struct wmi_init_cmd_10_2 {
300424c88f78SMichal Kazior 	struct wmi_resource_config_10_2 resource_config;
3005cf9fca8fSMichal Kazior 	struct wmi_host_mem_chunks mem_chunks;
300624c88f78SMichal Kazior } __packed;
300724c88f78SMichal Kazior 
3008d1e52a8eSRaja Mani struct wmi_init_cmd_10_4 {
3009d1e52a8eSRaja Mani 	struct wmi_resource_config_10_4 resource_config;
3010d1e52a8eSRaja Mani 	struct wmi_host_mem_chunks mem_chunks;
3011d1e52a8eSRaja Mani } __packed;
3012d1e52a8eSRaja Mani 
301324c88f78SMichal Kazior struct wmi_chan_list_entry {
301424c88f78SMichal Kazior 	__le16 freq;
301524c88f78SMichal Kazior 	u8 phy_mode; /* valid for 10.2 only */
301624c88f78SMichal Kazior 	u8 reserved;
301724c88f78SMichal Kazior } __packed;
301824c88f78SMichal Kazior 
30195e3dd157SKalle Valo /* TLV for channel list */
30205e3dd157SKalle Valo struct wmi_chan_list {
30215e3dd157SKalle Valo 	__le32 tag; /* WMI_CHAN_LIST_TAG */
30225e3dd157SKalle Valo 	__le32 num_chan;
302324c88f78SMichal Kazior 	struct wmi_chan_list_entry channel_list[0];
30245e3dd157SKalle Valo } __packed;
30255e3dd157SKalle Valo 
30265e3dd157SKalle Valo struct wmi_bssid_list {
30275e3dd157SKalle Valo 	__le32 tag; /* WMI_BSSID_LIST_TAG */
30285e3dd157SKalle Valo 	__le32 num_bssid;
30295e3dd157SKalle Valo 	struct wmi_mac_addr bssid_list[0];
30305e3dd157SKalle Valo } __packed;
30315e3dd157SKalle Valo 
30325e3dd157SKalle Valo struct wmi_ie_data {
30335e3dd157SKalle Valo 	__le32 tag; /* WMI_IE_TAG */
30345e3dd157SKalle Valo 	__le32 ie_len;
30355e3dd157SKalle Valo 	u8 ie_data[0];
30365e3dd157SKalle Valo } __packed;
30375e3dd157SKalle Valo 
30385e3dd157SKalle Valo struct wmi_ssid {
30395e3dd157SKalle Valo 	__le32 ssid_len;
30405e3dd157SKalle Valo 	u8 ssid[32];
30415e3dd157SKalle Valo } __packed;
30425e3dd157SKalle Valo 
30435e3dd157SKalle Valo struct wmi_ssid_list {
30445e3dd157SKalle Valo 	__le32 tag; /* WMI_SSID_LIST_TAG */
30455e3dd157SKalle Valo 	__le32 num_ssids;
30465e3dd157SKalle Valo 	struct wmi_ssid ssids[0];
30475e3dd157SKalle Valo } __packed;
30485e3dd157SKalle Valo 
30495e3dd157SKalle Valo /* prefix used by scan requestor ids on the host */
30505e3dd157SKalle Valo #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
30515e3dd157SKalle Valo 
30525e3dd157SKalle Valo /* prefix used by scan request ids generated on the host */
30535e3dd157SKalle Valo /* host cycles through the lower 12 bits to generate ids */
30545e3dd157SKalle Valo #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
30555e3dd157SKalle Valo 
30565e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_SSID    16
30575e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_BSSID   4
30585e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_IE_LEN  256
30595e3dd157SKalle Valo 
3060dcca0bdbSMichal Kazior /* Values lower than this may be refused by some firmware revisions with a scan
3061dcca0bdbSMichal Kazior  * completion with a timedout reason.
3062dcca0bdbSMichal Kazior  */
3063dcca0bdbSMichal Kazior #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3064dcca0bdbSMichal Kazior 
30655e3dd157SKalle Valo /* Scan priority numbers must be sequential, starting with 0 */
30665e3dd157SKalle Valo enum wmi_scan_priority {
30675e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_VERY_LOW = 0,
30685e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_LOW,
30695e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_MEDIUM,
30705e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_HIGH,
30715e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_VERY_HIGH,
30725e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_COUNT   /* number of priorities supported */
30735e3dd157SKalle Valo };
30745e3dd157SKalle Valo 
3075a6aa5da3SMichal Kazior struct wmi_start_scan_common {
30765e3dd157SKalle Valo 	/* Scan ID */
30775e3dd157SKalle Valo 	__le32 scan_id;
30785e3dd157SKalle Valo 	/* Scan requestor ID */
30795e3dd157SKalle Valo 	__le32 scan_req_id;
30805e3dd157SKalle Valo 	/* VDEV id(interface) that is requesting scan */
30815e3dd157SKalle Valo 	__le32 vdev_id;
30825e3dd157SKalle Valo 	/* Scan Priority, input to scan scheduler */
30835e3dd157SKalle Valo 	__le32 scan_priority;
30845e3dd157SKalle Valo 	/* Scan events subscription */
30855e3dd157SKalle Valo 	__le32 notify_scan_events;
30865e3dd157SKalle Valo 	/* dwell time in msec on active channels */
30875e3dd157SKalle Valo 	__le32 dwell_time_active;
30885e3dd157SKalle Valo 	/* dwell time in msec on passive channels */
30895e3dd157SKalle Valo 	__le32 dwell_time_passive;
30905e3dd157SKalle Valo 	/*
30915e3dd157SKalle Valo 	 * min time in msec on the BSS channel,only valid if atleast one
30925e3dd157SKalle Valo 	 * VDEV is active
30935e3dd157SKalle Valo 	 */
30945e3dd157SKalle Valo 	__le32 min_rest_time;
30955e3dd157SKalle Valo 	/*
30965e3dd157SKalle Valo 	 * max rest time in msec on the BSS channel,only valid if at least
30975e3dd157SKalle Valo 	 * one VDEV is active
30985e3dd157SKalle Valo 	 */
30995e3dd157SKalle Valo 	/*
31005e3dd157SKalle Valo 	 * the scanner will rest on the bss channel at least min_rest_time
31015e3dd157SKalle Valo 	 * after min_rest_time the scanner will start checking for tx/rx
31025e3dd157SKalle Valo 	 * activity on all VDEVs. if there is no activity the scanner will
31035e3dd157SKalle Valo 	 * switch to off channel. if there is activity the scanner will let
31045e3dd157SKalle Valo 	 * the radio on the bss channel until max_rest_time expires.at
31055e3dd157SKalle Valo 	 * max_rest_time scanner will switch to off channel irrespective of
31065e3dd157SKalle Valo 	 * activity. activity is determined by the idle_time parameter.
31075e3dd157SKalle Valo 	 */
31085e3dd157SKalle Valo 	__le32 max_rest_time;
31095e3dd157SKalle Valo 	/*
31105e3dd157SKalle Valo 	 * time before sending next set of probe requests.
31115e3dd157SKalle Valo 	 * The scanner keeps repeating probe requests transmission with
31125e3dd157SKalle Valo 	 * period specified by repeat_probe_time.
31135e3dd157SKalle Valo 	 * The number of probe requests specified depends on the ssid_list
31145e3dd157SKalle Valo 	 * and bssid_list
31155e3dd157SKalle Valo 	 */
31165e3dd157SKalle Valo 	__le32 repeat_probe_time;
31175e3dd157SKalle Valo 	/* time in msec between 2 consequetive probe requests with in a set. */
31185e3dd157SKalle Valo 	__le32 probe_spacing_time;
31195e3dd157SKalle Valo 	/*
31205e3dd157SKalle Valo 	 * data inactivity time in msec on bss channel that will be used by
31215e3dd157SKalle Valo 	 * scanner for measuring the inactivity.
31225e3dd157SKalle Valo 	 */
31235e3dd157SKalle Valo 	__le32 idle_time;
31245e3dd157SKalle Valo 	/* maximum time in msec allowed for scan  */
31255e3dd157SKalle Valo 	__le32 max_scan_time;
31265e3dd157SKalle Valo 	/*
31275e3dd157SKalle Valo 	 * delay in msec before sending first probe request after switching
31285e3dd157SKalle Valo 	 * to a channel
31295e3dd157SKalle Valo 	 */
31305e3dd157SKalle Valo 	__le32 probe_delay;
31315e3dd157SKalle Valo 	/* Scan control flags */
31325e3dd157SKalle Valo 	__le32 scan_ctrl_flags;
3133a6aa5da3SMichal Kazior } __packed;
31345e3dd157SKalle Valo 
3135a6aa5da3SMichal Kazior struct wmi_start_scan_tlvs {
3136a6aa5da3SMichal Kazior 	/* TLV parameters. These includes channel list, ssid list, bssid list,
3137a6aa5da3SMichal Kazior 	 * extra ies.
31385e3dd157SKalle Valo 	 */
3139a6aa5da3SMichal Kazior 	u8 tlvs[0];
3140a6aa5da3SMichal Kazior } __packed;
3141a6aa5da3SMichal Kazior 
3142a6aa5da3SMichal Kazior struct wmi_start_scan_cmd {
3143a6aa5da3SMichal Kazior 	struct wmi_start_scan_common common;
3144a6aa5da3SMichal Kazior 	__le32 burst_duration_ms;
3145a6aa5da3SMichal Kazior 	struct wmi_start_scan_tlvs tlvs;
31465e3dd157SKalle Valo } __packed;
31475e3dd157SKalle Valo 
314889b7e766SBartosz Markowski /* This is the definition from 10.X firmware branch */
3149a6aa5da3SMichal Kazior struct wmi_10x_start_scan_cmd {
3150a6aa5da3SMichal Kazior 	struct wmi_start_scan_common common;
3151a6aa5da3SMichal Kazior 	struct wmi_start_scan_tlvs tlvs;
315289b7e766SBartosz Markowski } __packed;
315389b7e766SBartosz Markowski 
31545e3dd157SKalle Valo struct wmi_ssid_arg {
31555e3dd157SKalle Valo 	int len;
31565e3dd157SKalle Valo 	const u8 *ssid;
31575e3dd157SKalle Valo };
31585e3dd157SKalle Valo 
31595e3dd157SKalle Valo struct wmi_bssid_arg {
31605e3dd157SKalle Valo 	const u8 *bssid;
31615e3dd157SKalle Valo };
31625e3dd157SKalle Valo 
31635e3dd157SKalle Valo struct wmi_start_scan_arg {
31645e3dd157SKalle Valo 	u32 scan_id;
31655e3dd157SKalle Valo 	u32 scan_req_id;
31665e3dd157SKalle Valo 	u32 vdev_id;
31675e3dd157SKalle Valo 	u32 scan_priority;
31685e3dd157SKalle Valo 	u32 notify_scan_events;
31695e3dd157SKalle Valo 	u32 dwell_time_active;
31705e3dd157SKalle Valo 	u32 dwell_time_passive;
31715e3dd157SKalle Valo 	u32 min_rest_time;
31725e3dd157SKalle Valo 	u32 max_rest_time;
31735e3dd157SKalle Valo 	u32 repeat_probe_time;
31745e3dd157SKalle Valo 	u32 probe_spacing_time;
31755e3dd157SKalle Valo 	u32 idle_time;
31765e3dd157SKalle Valo 	u32 max_scan_time;
31775e3dd157SKalle Valo 	u32 probe_delay;
31785e3dd157SKalle Valo 	u32 scan_ctrl_flags;
3179dbd3f9f3SMichal Kazior 	u32 burst_duration_ms;
31805e3dd157SKalle Valo 
31815e3dd157SKalle Valo 	u32 ie_len;
31825e3dd157SKalle Valo 	u32 n_channels;
31835e3dd157SKalle Valo 	u32 n_ssids;
31845e3dd157SKalle Valo 	u32 n_bssids;
31855e3dd157SKalle Valo 
31865e3dd157SKalle Valo 	u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
318724c88f78SMichal Kazior 	u16 channels[64];
31885e3dd157SKalle Valo 	struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
31895e3dd157SKalle Valo 	struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
319060e1d0fbSCarl Huang 	struct wmi_mac_addr mac_addr;
319160e1d0fbSCarl Huang 	struct wmi_mac_addr mac_mask;
31925e3dd157SKalle Valo };
31935e3dd157SKalle Valo 
31945e3dd157SKalle Valo /* scan control flags */
31955e3dd157SKalle Valo 
31965e3dd157SKalle Valo /* passively scan all channels including active channels */
31975e3dd157SKalle Valo #define WMI_SCAN_FLAG_PASSIVE        0x1
31985e3dd157SKalle Valo /* add wild card ssid probe request even though ssid_list is specified. */
31995e3dd157SKalle Valo #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
32005e3dd157SKalle Valo /* add cck rates to rates/xrate ie for the generated probe request */
32015e3dd157SKalle Valo #define WMI_SCAN_ADD_CCK_RATES 0x4
32025e3dd157SKalle Valo /* add ofdm rates to rates/xrate ie for the generated probe request */
32035e3dd157SKalle Valo #define WMI_SCAN_ADD_OFDM_RATES 0x8
32045e3dd157SKalle Valo /* To enable indication of Chan load and Noise floor to host */
32055e3dd157SKalle Valo #define WMI_SCAN_CHAN_STAT_EVENT 0x10
32065e3dd157SKalle Valo /* Filter Probe request frames  */
32075e3dd157SKalle Valo #define WMI_SCAN_FILTER_PROBE_REQ 0x20
32085e3dd157SKalle Valo /* When set, DFS channels will not be scanned */
32095e3dd157SKalle Valo #define WMI_SCAN_BYPASS_DFS_CHN 0x40
32105e3dd157SKalle Valo /* Different FW scan engine may choose to bail out on errors.
321137ff1b0dSMarcin Rokicki  * Allow the driver to have influence over that.
321237ff1b0dSMarcin Rokicki  */
32135e3dd157SKalle Valo #define WMI_SCAN_CONTINUE_ON_ERROR 0x80
32145e3dd157SKalle Valo 
321560e1d0fbSCarl Huang /* Use random MAC address for TA for Probe Request frame and add
321660e1d0fbSCarl Huang  * OUI specified by WMI_SCAN_PROB_REQ_OUI_CMDID to the Probe Request frame.
321760e1d0fbSCarl Huang  * if OUI is not set by WMI_SCAN_PROB_REQ_OUI_CMDID then the flag is ignored.
321860e1d0fbSCarl Huang  */
321960e1d0fbSCarl Huang #define WMI_SCAN_ADD_SPOOFED_MAC_IN_PROBE_REQ   0x1000
322060e1d0fbSCarl Huang 
32215e3dd157SKalle Valo /* WMI_SCAN_CLASS_MASK must be the same value as IEEE80211_SCAN_CLASS_MASK */
32225e3dd157SKalle Valo #define WMI_SCAN_CLASS_MASK 0xFF000000
32235e3dd157SKalle Valo 
32245e3dd157SKalle Valo enum wmi_stop_scan_type {
32255e3dd157SKalle Valo 	WMI_SCAN_STOP_ONE	= 0x00000000, /* stop by scan_id */
32265e3dd157SKalle Valo 	WMI_SCAN_STOP_VDEV_ALL	= 0x01000000, /* stop by vdev_id */
32275e3dd157SKalle Valo 	WMI_SCAN_STOP_ALL	= 0x04000000, /* stop all scans */
32285e3dd157SKalle Valo };
32295e3dd157SKalle Valo 
32305e3dd157SKalle Valo struct wmi_stop_scan_cmd {
32315e3dd157SKalle Valo 	__le32 scan_req_id;
32325e3dd157SKalle Valo 	__le32 scan_id;
32335e3dd157SKalle Valo 	__le32 req_type;
32345e3dd157SKalle Valo 	__le32 vdev_id;
32355e3dd157SKalle Valo } __packed;
32365e3dd157SKalle Valo 
32375e3dd157SKalle Valo struct wmi_stop_scan_arg {
32385e3dd157SKalle Valo 	u32 req_id;
32395e3dd157SKalle Valo 	enum wmi_stop_scan_type req_type;
32405e3dd157SKalle Valo 	union {
32415e3dd157SKalle Valo 		u32 scan_id;
32425e3dd157SKalle Valo 		u32 vdev_id;
32435e3dd157SKalle Valo 	} u;
32445e3dd157SKalle Valo };
32455e3dd157SKalle Valo 
32465e3dd157SKalle Valo struct wmi_scan_chan_list_cmd {
32475e3dd157SKalle Valo 	__le32 num_scan_chans;
32485e3dd157SKalle Valo 	struct wmi_channel chan_info[0];
32495e3dd157SKalle Valo } __packed;
32505e3dd157SKalle Valo 
32515e3dd157SKalle Valo struct wmi_scan_chan_list_arg {
32525e3dd157SKalle Valo 	u32 n_channels;
32535e3dd157SKalle Valo 	struct wmi_channel_arg *channels;
32545e3dd157SKalle Valo };
32555e3dd157SKalle Valo 
32565e3dd157SKalle Valo enum wmi_bss_filter {
32575e3dd157SKalle Valo 	WMI_BSS_FILTER_NONE = 0,        /* no beacons forwarded */
32585e3dd157SKalle Valo 	WMI_BSS_FILTER_ALL,             /* all beacons forwarded */
32595e3dd157SKalle Valo 	WMI_BSS_FILTER_PROFILE,         /* only beacons matching profile */
32605e3dd157SKalle Valo 	WMI_BSS_FILTER_ALL_BUT_PROFILE, /* all but beacons matching profile */
32615e3dd157SKalle Valo 	WMI_BSS_FILTER_CURRENT_BSS,     /* only beacons matching current BSS */
32625e3dd157SKalle Valo 	WMI_BSS_FILTER_ALL_BUT_BSS,     /* all but beacons matching BSS */
32635e3dd157SKalle Valo 	WMI_BSS_FILTER_PROBED_SSID,     /* beacons matching probed ssid */
32645e3dd157SKalle Valo 	WMI_BSS_FILTER_LAST_BSS,        /* marker only */
32655e3dd157SKalle Valo };
32665e3dd157SKalle Valo 
32675e3dd157SKalle Valo enum wmi_scan_event_type {
3268b2297baaSRaja Mani 	WMI_SCAN_EVENT_STARTED              = BIT(0),
3269b2297baaSRaja Mani 	WMI_SCAN_EVENT_COMPLETED            = BIT(1),
3270b2297baaSRaja Mani 	WMI_SCAN_EVENT_BSS_CHANNEL          = BIT(2),
3271b2297baaSRaja Mani 	WMI_SCAN_EVENT_FOREIGN_CHANNEL      = BIT(3),
3272b2297baaSRaja Mani 	WMI_SCAN_EVENT_DEQUEUED             = BIT(4),
3273b2297baaSRaja Mani 	/* possibly by high-prio scan */
3274b2297baaSRaja Mani 	WMI_SCAN_EVENT_PREEMPTED            = BIT(5),
3275b2297baaSRaja Mani 	WMI_SCAN_EVENT_START_FAILED         = BIT(6),
3276b2297baaSRaja Mani 	WMI_SCAN_EVENT_RESTARTED            = BIT(7),
3277b2297baaSRaja Mani 	WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8),
3278b2297baaSRaja Mani 	WMI_SCAN_EVENT_MAX                  = BIT(15),
32795e3dd157SKalle Valo };
32805e3dd157SKalle Valo 
32815e3dd157SKalle Valo enum wmi_scan_completion_reason {
32825e3dd157SKalle Valo 	WMI_SCAN_REASON_COMPLETED,
32835e3dd157SKalle Valo 	WMI_SCAN_REASON_CANCELLED,
32845e3dd157SKalle Valo 	WMI_SCAN_REASON_PREEMPTED,
32855e3dd157SKalle Valo 	WMI_SCAN_REASON_TIMEDOUT,
3286b2297baaSRaja Mani 	WMI_SCAN_REASON_INTERNAL_FAILURE,
32875e3dd157SKalle Valo 	WMI_SCAN_REASON_MAX,
32885e3dd157SKalle Valo };
32895e3dd157SKalle Valo 
32905e3dd157SKalle Valo struct wmi_scan_event {
32915e3dd157SKalle Valo 	__le32 event_type; /* %WMI_SCAN_EVENT_ */
32925e3dd157SKalle Valo 	__le32 reason; /* %WMI_SCAN_REASON_ */
32935e3dd157SKalle Valo 	__le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
32945e3dd157SKalle Valo 	__le32 scan_req_id;
32955e3dd157SKalle Valo 	__le32 scan_id;
32965e3dd157SKalle Valo 	__le32 vdev_id;
32975e3dd157SKalle Valo } __packed;
32985e3dd157SKalle Valo 
32995e3dd157SKalle Valo /*
33005e3dd157SKalle Valo  * This defines how much headroom is kept in the
33015e3dd157SKalle Valo  * receive frame between the descriptor and the
33025e3dd157SKalle Valo  * payload, in order for the WMI PHY error and
33035e3dd157SKalle Valo  * management handler to insert header contents.
33045e3dd157SKalle Valo  *
33055e3dd157SKalle Valo  * This is in bytes.
33065e3dd157SKalle Valo  */
33075e3dd157SKalle Valo #define WMI_MGMT_RX_HDR_HEADROOM    52
33085e3dd157SKalle Valo 
33095e3dd157SKalle Valo /*
33105e3dd157SKalle Valo  * This event will be used for sending scan results
33115e3dd157SKalle Valo  * as well as rx mgmt frames to the host. The rx buffer
33125e3dd157SKalle Valo  * will be sent as part of this WMI event. It would be a
33135e3dd157SKalle Valo  * good idea to pass all the fields in the RX status
33145e3dd157SKalle Valo  * descriptor up to the host.
33155e3dd157SKalle Valo  */
33160d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v1 {
33175e3dd157SKalle Valo 	__le32 channel;
33185e3dd157SKalle Valo 	__le32 snr;
33195e3dd157SKalle Valo 	__le32 rate;
33205e3dd157SKalle Valo 	__le32 phy_mode;
33215e3dd157SKalle Valo 	__le32 buf_len;
33225e3dd157SKalle Valo 	__le32 status; /* %WMI_RX_STATUS_ */
33235e3dd157SKalle Valo } __packed;
33245e3dd157SKalle Valo 
33250d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v2 {
33260d9b0438SMichal Kazior 	struct wmi_mgmt_rx_hdr_v1 v1;
33270d9b0438SMichal Kazior 	__le32 rssi_ctl[4];
33280d9b0438SMichal Kazior } __packed;
33290d9b0438SMichal Kazior 
33300d9b0438SMichal Kazior struct wmi_mgmt_rx_event_v1 {
33310d9b0438SMichal Kazior 	struct wmi_mgmt_rx_hdr_v1 hdr;
33320d9b0438SMichal Kazior 	u8 buf[0];
33330d9b0438SMichal Kazior } __packed;
33340d9b0438SMichal Kazior 
33350d9b0438SMichal Kazior struct wmi_mgmt_rx_event_v2 {
33360d9b0438SMichal Kazior 	struct wmi_mgmt_rx_hdr_v2 hdr;
33375e3dd157SKalle Valo 	u8 buf[0];
33385e3dd157SKalle Valo } __packed;
33395e3dd157SKalle Valo 
33401c092961SRaja Mani struct wmi_10_4_mgmt_rx_hdr {
33411c092961SRaja Mani 	__le32 channel;
33421c092961SRaja Mani 	__le32 snr;
33431c092961SRaja Mani 	    u8 rssi_ctl[4];
33441c092961SRaja Mani 	__le32 rate;
33451c092961SRaja Mani 	__le32 phy_mode;
33461c092961SRaja Mani 	__le32 buf_len;
33471c092961SRaja Mani 	__le32 status;
33481c092961SRaja Mani } __packed;
33491c092961SRaja Mani 
33501c092961SRaja Mani struct wmi_10_4_mgmt_rx_event {
33511c092961SRaja Mani 	struct wmi_10_4_mgmt_rx_hdr hdr;
33521c092961SRaja Mani 	u8 buf[0];
33531c092961SRaja Mani } __packed;
33541c092961SRaja Mani 
33558d130963SPeter Oh struct wmi_mgmt_rx_ext_info {
33568d130963SPeter Oh 	__le64 rx_mac_timestamp;
33578d130963SPeter Oh } __packed __aligned(4);
33588d130963SPeter Oh 
33595e3dd157SKalle Valo #define WMI_RX_STATUS_OK			0x00
33605e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_CRC			0x01
33615e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_DECRYPT		0x08
33625e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_MIC			0x10
33635e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS	0x20
33648d130963SPeter Oh /* Extension data at the end of mgmt frame */
33658d130963SPeter Oh #define WMI_RX_STATUS_EXT_INFO		0x40
33665e3dd157SKalle Valo 
3367991adf71SRaja Mani #define PHY_ERROR_GEN_SPECTRAL_SCAN		0x26
3368991adf71SRaja Mani #define PHY_ERROR_GEN_FALSE_RADAR_EXT		0x24
3369991adf71SRaja Mani #define PHY_ERROR_GEN_RADAR			0x05
3370991adf71SRaja Mani 
33712b0a2e0dSRaja Mani #define PHY_ERROR_10_4_RADAR_MASK               0x4
33722b0a2e0dSRaja Mani #define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK       0x4000000
33732b0a2e0dSRaja Mani 
3374991adf71SRaja Mani enum phy_err_type {
3375991adf71SRaja Mani 	PHY_ERROR_UNKNOWN,
3376991adf71SRaja Mani 	PHY_ERROR_SPECTRAL_SCAN,
3377991adf71SRaja Mani 	PHY_ERROR_FALSE_RADAR_EXT,
3378991adf71SRaja Mani 	PHY_ERROR_RADAR
3379991adf71SRaja Mani };
33809702c686SJanusz Dziedzic 
33812332d0aeSMichal Kazior struct wmi_phyerr {
33825e3dd157SKalle Valo 	__le32 tsf_timestamp;
33835e3dd157SKalle Valo 	__le16 freq1;
33845e3dd157SKalle Valo 	__le16 freq2;
33855e3dd157SKalle Valo 	u8 rssi_combined;
33865e3dd157SKalle Valo 	u8 chan_width_mhz;
33875e3dd157SKalle Valo 	u8 phy_err_code;
33885e3dd157SKalle Valo 	u8 rsvd0;
33892332d0aeSMichal Kazior 	__le32 rssi_chains[4];
33902332d0aeSMichal Kazior 	__le16 nf_chains[4];
33915e3dd157SKalle Valo 	__le32 buf_len;
33922332d0aeSMichal Kazior 	u8 buf[0];
33935e3dd157SKalle Valo } __packed;
33945e3dd157SKalle Valo 
33952332d0aeSMichal Kazior struct wmi_phyerr_event {
33962332d0aeSMichal Kazior 	__le32 num_phyerrs;
33975e3dd157SKalle Valo 	__le32 tsf_l32;
33985e3dd157SKalle Valo 	__le32 tsf_u32;
33992332d0aeSMichal Kazior 	struct wmi_phyerr phyerrs[0];
34005e3dd157SKalle Valo } __packed;
34015e3dd157SKalle Valo 
34022b0a2e0dSRaja Mani struct wmi_10_4_phyerr_event {
34032b0a2e0dSRaja Mani 	__le32 tsf_l32;
34042b0a2e0dSRaja Mani 	__le32 tsf_u32;
34052b0a2e0dSRaja Mani 	__le16 freq1;
34062b0a2e0dSRaja Mani 	__le16 freq2;
34072b0a2e0dSRaja Mani 	u8 rssi_combined;
34082b0a2e0dSRaja Mani 	u8 chan_width_mhz;
34092b0a2e0dSRaja Mani 	u8 phy_err_code;
34102b0a2e0dSRaja Mani 	u8 rsvd0;
34112b0a2e0dSRaja Mani 	__le32 rssi_chains[4];
34122b0a2e0dSRaja Mani 	__le16 nf_chains[4];
34132b0a2e0dSRaja Mani 	__le32 phy_err_mask[2];
34142b0a2e0dSRaja Mani 	__le32 tsf_timestamp;
34152b0a2e0dSRaja Mani 	__le32 buf_len;
34162b0a2e0dSRaja Mani 	u8 buf[0];
34172b0a2e0dSRaja Mani } __packed;
34182b0a2e0dSRaja Mani 
34196f6eb1bcSSriram R struct wmi_radar_found_info {
34206f6eb1bcSSriram R 	__le32 pri_min;
34216f6eb1bcSSriram R 	__le32 pri_max;
34226f6eb1bcSSriram R 	__le32 width_min;
34236f6eb1bcSSriram R 	__le32 width_max;
34246f6eb1bcSSriram R 	__le32 sidx_min;
34256f6eb1bcSSriram R 	__le32 sidx_max;
34266f6eb1bcSSriram R } __packed;
34276f6eb1bcSSriram R 
34286f6eb1bcSSriram R enum wmi_radar_confirmation_status {
34296f6eb1bcSSriram R 	/* Detected radar was due to SW pulses */
34306f6eb1bcSSriram R 	WMI_SW_RADAR_DETECTED    = 0,
34316f6eb1bcSSriram R 
34326f6eb1bcSSriram R 	WMI_RADAR_DETECTION_FAIL = 1,
34336f6eb1bcSSriram R 
34346f6eb1bcSSriram R 	/* Real radar detected */
34356f6eb1bcSSriram R 	WMI_HW_RADAR_DETECTED    = 2,
34366f6eb1bcSSriram R };
34376f6eb1bcSSriram R 
34389702c686SJanusz Dziedzic #define PHYERR_TLV_SIG				0xBB
34399702c686SJanusz Dziedzic #define PHYERR_TLV_TAG_SEARCH_FFT_REPORT	0xFB
34409702c686SJanusz Dziedzic #define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY	0xF8
3441855aed12SSimon Wunderlich #define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT	0xF9
34429702c686SJanusz Dziedzic 
34439702c686SJanusz Dziedzic struct phyerr_radar_report {
34449702c686SJanusz Dziedzic 	__le32 reg0; /* RADAR_REPORT_REG0_* */
34450a7d88e4SMohammed Shafi Shajakhan 	__le32 reg1; /* RADAR_REPORT_REG1_* */
34469702c686SJanusz Dziedzic } __packed;
34479702c686SJanusz Dziedzic 
34489702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK		0x80000000
34499702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB		31
34509702c686SJanusz Dziedzic 
34519702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK	0x40000000
34529702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB	30
34539702c686SJanusz Dziedzic 
34549702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK		0x3FF00000
34559702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB		20
34569702c686SJanusz Dziedzic 
34579702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK		0x000F0000
34589702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB		16
34599702c686SJanusz Dziedzic 
34609702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK		0x0000FC00
34619702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB		10
34629702c686SJanusz Dziedzic 
34639702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_SIDX_MASK		0x000003FF
34649702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_SIDX_LSB		0
34659702c686SJanusz Dziedzic 
34669702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK	0x80000000
34679702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB	31
34689702c686SJanusz Dziedzic 
34699702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK	0x7F000000
34709702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB		24
34719702c686SJanusz Dziedzic 
34729702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK	0x00FF0000
34739702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB	16
34749702c686SJanusz Dziedzic 
34759702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK		0x0000FF00
34769702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB		8
34779702c686SJanusz Dziedzic 
34789702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_DUR_MASK		0x000000FF
34799702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_DUR_LSB			0
34809702c686SJanusz Dziedzic 
34819702c686SJanusz Dziedzic struct phyerr_fft_report {
34829702c686SJanusz Dziedzic 	__le32 reg0; /* SEARCH_FFT_REPORT_REG0_ * */
34839702c686SJanusz Dziedzic 	__le32 reg1; /* SEARCH_FFT_REPORT_REG1_ * */
34849702c686SJanusz Dziedzic } __packed;
34859702c686SJanusz Dziedzic 
34869702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK	0xFF800000
34879702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB	23
34889702c686SJanusz Dziedzic 
34899702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK		0x007FC000
34909702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB		14
34919702c686SJanusz Dziedzic 
34929702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK		0x00003000
34939702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB		12
34949702c686SJanusz Dziedzic 
34959702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK		0x00000FFF
34969702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB		0
34979702c686SJanusz Dziedzic 
34989702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK		0xFC000000
34999702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB		26
35009702c686SJanusz Dziedzic 
35019702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK		0x03FC0000
35029702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB		18
35039702c686SJanusz Dziedzic 
35049702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK		0x0003FF00
35059702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB		8
35069702c686SJanusz Dziedzic 
35079702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK	0x000000FF
35089702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB	0
35099702c686SJanusz Dziedzic 
35109702c686SJanusz Dziedzic struct phyerr_tlv {
35119702c686SJanusz Dziedzic 	__le16 len;
35129702c686SJanusz Dziedzic 	u8 tag;
35139702c686SJanusz Dziedzic 	u8 sig;
35149702c686SJanusz Dziedzic } __packed;
35159702c686SJanusz Dziedzic 
35169702c686SJanusz Dziedzic #define DFS_RSSI_POSSIBLY_FALSE			50
35179702c686SJanusz Dziedzic #define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE	40
35189702c686SJanusz Dziedzic 
35195e3dd157SKalle Valo struct wmi_mgmt_tx_hdr {
35205e3dd157SKalle Valo 	__le32 vdev_id;
35215e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
35225e3dd157SKalle Valo 	__le32 tx_rate;
35235e3dd157SKalle Valo 	__le32 tx_power;
35245e3dd157SKalle Valo 	__le32 buf_len;
35255e3dd157SKalle Valo } __packed;
35265e3dd157SKalle Valo 
35275e3dd157SKalle Valo struct wmi_mgmt_tx_cmd {
35285e3dd157SKalle Valo 	struct wmi_mgmt_tx_hdr hdr;
35295e3dd157SKalle Valo 	u8 buf[0];
35305e3dd157SKalle Valo } __packed;
35315e3dd157SKalle Valo 
35325e3dd157SKalle Valo struct wmi_echo_event {
35335e3dd157SKalle Valo 	__le32 value;
35345e3dd157SKalle Valo } __packed;
35355e3dd157SKalle Valo 
35365e3dd157SKalle Valo struct wmi_echo_cmd {
35375e3dd157SKalle Valo 	__le32 value;
35385e3dd157SKalle Valo } __packed;
35395e3dd157SKalle Valo 
35405e3dd157SKalle Valo struct wmi_pdev_set_regdomain_cmd {
35415e3dd157SKalle Valo 	__le32 reg_domain;
35425e3dd157SKalle Valo 	__le32 reg_domain_2G;
35435e3dd157SKalle Valo 	__le32 reg_domain_5G;
35445e3dd157SKalle Valo 	__le32 conformance_test_limit_2G;
35455e3dd157SKalle Valo 	__le32 conformance_test_limit_5G;
35465e3dd157SKalle Valo } __packed;
35475e3dd157SKalle Valo 
3548821af6aeSMarek Puzyniak enum wmi_dfs_region {
3549821af6aeSMarek Puzyniak 	/* Uninitialized dfs domain */
3550821af6aeSMarek Puzyniak 	WMI_UNINIT_DFS_DOMAIN = 0,
3551821af6aeSMarek Puzyniak 
3552821af6aeSMarek Puzyniak 	/* FCC3 dfs domain */
3553821af6aeSMarek Puzyniak 	WMI_FCC_DFS_DOMAIN = 1,
3554821af6aeSMarek Puzyniak 
3555821af6aeSMarek Puzyniak 	/* ETSI dfs domain */
3556821af6aeSMarek Puzyniak 	WMI_ETSI_DFS_DOMAIN = 2,
3557821af6aeSMarek Puzyniak 
3558821af6aeSMarek Puzyniak 	/*Japan dfs domain */
3559821af6aeSMarek Puzyniak 	WMI_MKK4_DFS_DOMAIN = 3,
3560821af6aeSMarek Puzyniak };
3561821af6aeSMarek Puzyniak 
3562821af6aeSMarek Puzyniak struct wmi_pdev_set_regdomain_cmd_10x {
3563821af6aeSMarek Puzyniak 	__le32 reg_domain;
3564821af6aeSMarek Puzyniak 	__le32 reg_domain_2G;
3565821af6aeSMarek Puzyniak 	__le32 reg_domain_5G;
3566821af6aeSMarek Puzyniak 	__le32 conformance_test_limit_2G;
3567821af6aeSMarek Puzyniak 	__le32 conformance_test_limit_5G;
3568821af6aeSMarek Puzyniak 
3569821af6aeSMarek Puzyniak 	/* dfs domain from wmi_dfs_region */
3570821af6aeSMarek Puzyniak 	__le32 dfs_domain;
3571821af6aeSMarek Puzyniak } __packed;
3572821af6aeSMarek Puzyniak 
35735e3dd157SKalle Valo /* Command to set/unset chip in quiet mode */
35745e3dd157SKalle Valo struct wmi_pdev_set_quiet_cmd {
35755e3dd157SKalle Valo 	/* period in TUs */
35765e3dd157SKalle Valo 	__le32 period;
35775e3dd157SKalle Valo 
35785e3dd157SKalle Valo 	/* duration in TUs */
35795e3dd157SKalle Valo 	__le32 duration;
35805e3dd157SKalle Valo 
35815e3dd157SKalle Valo 	/* offset in TUs */
35825e3dd157SKalle Valo 	__le32 next_start;
35835e3dd157SKalle Valo 
35845e3dd157SKalle Valo 	/* enable/disable */
35855e3dd157SKalle Valo 	__le32 enabled;
35865e3dd157SKalle Valo } __packed;
35875e3dd157SKalle Valo 
35885e3dd157SKalle Valo /*
35895e3dd157SKalle Valo  * 802.11g protection mode.
35905e3dd157SKalle Valo  */
35915e3dd157SKalle Valo enum ath10k_protmode {
35925e3dd157SKalle Valo 	ATH10K_PROT_NONE     = 0,    /* no protection */
35935e3dd157SKalle Valo 	ATH10K_PROT_CTSONLY  = 1,    /* CTS to self */
35945e3dd157SKalle Valo 	ATH10K_PROT_RTSCTS   = 2,    /* RTS-CTS */
35955e3dd157SKalle Valo };
35965e3dd157SKalle Valo 
3597e81bd104SMarek Kwaczynski enum wmi_rtscts_profile {
3598e81bd104SMarek Kwaczynski 	WMI_RTSCTS_FOR_NO_RATESERIES = 0,
3599e81bd104SMarek Kwaczynski 	WMI_RTSCTS_FOR_SECOND_RATESERIES,
3600e81bd104SMarek Kwaczynski 	WMI_RTSCTS_ACROSS_SW_RETRIES
3601e81bd104SMarek Kwaczynski };
3602e81bd104SMarek Kwaczynski 
3603e81bd104SMarek Kwaczynski #define WMI_RTSCTS_ENABLED		1
3604e81bd104SMarek Kwaczynski #define WMI_RTSCTS_SET_MASK		0x0f
3605e81bd104SMarek Kwaczynski #define WMI_RTSCTS_SET_LSB		0
3606e81bd104SMarek Kwaczynski 
3607e81bd104SMarek Kwaczynski #define WMI_RTSCTS_PROFILE_MASK		0xf0
3608e81bd104SMarek Kwaczynski #define WMI_RTSCTS_PROFILE_LSB		4
3609e81bd104SMarek Kwaczynski 
36105e3dd157SKalle Valo enum wmi_beacon_gen_mode {
36115e3dd157SKalle Valo 	WMI_BEACON_STAGGERED_MODE = 0,
36125e3dd157SKalle Valo 	WMI_BEACON_BURST_MODE = 1
36135e3dd157SKalle Valo };
36145e3dd157SKalle Valo 
36155e3dd157SKalle Valo enum wmi_csa_event_ies_present_flag {
36165e3dd157SKalle Valo 	WMI_CSA_IE_PRESENT = 0x00000001,
36175e3dd157SKalle Valo 	WMI_XCSA_IE_PRESENT = 0x00000002,
36185e3dd157SKalle Valo 	WMI_WBW_IE_PRESENT = 0x00000004,
36195e3dd157SKalle Valo 	WMI_CSWARP_IE_PRESENT = 0x00000008,
36205e3dd157SKalle Valo };
36215e3dd157SKalle Valo 
36225e3dd157SKalle Valo /* wmi CSA receive event from beacon frame */
36235e3dd157SKalle Valo struct wmi_csa_event {
36245e3dd157SKalle Valo 	__le32 i_fc_dur;
36255e3dd157SKalle Valo 	/* Bit 0-15: FC */
36265e3dd157SKalle Valo 	/* Bit 16-31: DUR */
36275e3dd157SKalle Valo 	struct wmi_mac_addr i_addr1;
36285e3dd157SKalle Valo 	struct wmi_mac_addr i_addr2;
36295e3dd157SKalle Valo 	__le32 csa_ie[2];
36305e3dd157SKalle Valo 	__le32 xcsa_ie[2];
36315e3dd157SKalle Valo 	__le32 wb_ie[2];
36325e3dd157SKalle Valo 	__le32 cswarp_ie;
36335e3dd157SKalle Valo 	__le32 ies_present_flag; /* wmi_csa_event_ies_present_flag */
36345e3dd157SKalle Valo } __packed;
36355e3dd157SKalle Valo 
36365e3dd157SKalle Valo /* the definition of different PDEV parameters */
36375e3dd157SKalle Valo #define PDEV_DEFAULT_STATS_UPDATE_PERIOD    500
36385e3dd157SKalle Valo #define VDEV_DEFAULT_STATS_UPDATE_PERIOD    500
36395e3dd157SKalle Valo #define PEER_DEFAULT_STATS_UPDATE_PERIOD    500
36405e3dd157SKalle Valo 
3641226a339bSBartosz Markowski struct wmi_pdev_param_map {
3642226a339bSBartosz Markowski 	u32 tx_chain_mask;
3643226a339bSBartosz Markowski 	u32 rx_chain_mask;
3644226a339bSBartosz Markowski 	u32 txpower_limit2g;
3645226a339bSBartosz Markowski 	u32 txpower_limit5g;
3646226a339bSBartosz Markowski 	u32 txpower_scale;
3647226a339bSBartosz Markowski 	u32 beacon_gen_mode;
3648226a339bSBartosz Markowski 	u32 beacon_tx_mode;
3649226a339bSBartosz Markowski 	u32 resmgr_offchan_mode;
3650226a339bSBartosz Markowski 	u32 protection_mode;
3651226a339bSBartosz Markowski 	u32 dynamic_bw;
3652226a339bSBartosz Markowski 	u32 non_agg_sw_retry_th;
3653226a339bSBartosz Markowski 	u32 agg_sw_retry_th;
3654226a339bSBartosz Markowski 	u32 sta_kickout_th;
3655226a339bSBartosz Markowski 	u32 ac_aggrsize_scaling;
3656226a339bSBartosz Markowski 	u32 ltr_enable;
3657226a339bSBartosz Markowski 	u32 ltr_ac_latency_be;
3658226a339bSBartosz Markowski 	u32 ltr_ac_latency_bk;
3659226a339bSBartosz Markowski 	u32 ltr_ac_latency_vi;
3660226a339bSBartosz Markowski 	u32 ltr_ac_latency_vo;
3661226a339bSBartosz Markowski 	u32 ltr_ac_latency_timeout;
3662226a339bSBartosz Markowski 	u32 ltr_sleep_override;
3663226a339bSBartosz Markowski 	u32 ltr_rx_override;
3664226a339bSBartosz Markowski 	u32 ltr_tx_activity_timeout;
3665226a339bSBartosz Markowski 	u32 l1ss_enable;
3666226a339bSBartosz Markowski 	u32 dsleep_enable;
3667226a339bSBartosz Markowski 	u32 pcielp_txbuf_flush;
3668226a339bSBartosz Markowski 	u32 pcielp_txbuf_watermark;
3669226a339bSBartosz Markowski 	u32 pcielp_txbuf_tmo_en;
3670226a339bSBartosz Markowski 	u32 pcielp_txbuf_tmo_value;
3671226a339bSBartosz Markowski 	u32 pdev_stats_update_period;
3672226a339bSBartosz Markowski 	u32 vdev_stats_update_period;
3673226a339bSBartosz Markowski 	u32 peer_stats_update_period;
3674226a339bSBartosz Markowski 	u32 bcnflt_stats_update_period;
3675226a339bSBartosz Markowski 	u32 pmf_qos;
3676226a339bSBartosz Markowski 	u32 arp_ac_override;
3677226a339bSBartosz Markowski 	u32 dcs;
3678226a339bSBartosz Markowski 	u32 ani_enable;
3679226a339bSBartosz Markowski 	u32 ani_poll_period;
3680226a339bSBartosz Markowski 	u32 ani_listen_period;
3681226a339bSBartosz Markowski 	u32 ani_ofdm_level;
3682226a339bSBartosz Markowski 	u32 ani_cck_level;
3683226a339bSBartosz Markowski 	u32 dyntxchain;
3684226a339bSBartosz Markowski 	u32 proxy_sta;
3685226a339bSBartosz Markowski 	u32 idle_ps_config;
3686226a339bSBartosz Markowski 	u32 power_gating_sleep;
3687226a339bSBartosz Markowski 	u32 fast_channel_reset;
3688226a339bSBartosz Markowski 	u32 burst_dur;
3689226a339bSBartosz Markowski 	u32 burst_enable;
3690a7bd3e99SPeter Oh 	u32 cal_period;
3691d86561ffSRaja Mani 	u32 aggr_burst;
3692d86561ffSRaja Mani 	u32 rx_decap_mode;
3693d86561ffSRaja Mani 	u32 smart_antenna_default_antenna;
3694d86561ffSRaja Mani 	u32 igmpmld_override;
3695d86561ffSRaja Mani 	u32 igmpmld_tid;
3696d86561ffSRaja Mani 	u32 antenna_gain;
3697d86561ffSRaja Mani 	u32 rx_filter;
3698d86561ffSRaja Mani 	u32 set_mcast_to_ucast_tid;
3699d86561ffSRaja Mani 	u32 proxy_sta_mode;
3700d86561ffSRaja Mani 	u32 set_mcast2ucast_mode;
3701d86561ffSRaja Mani 	u32 set_mcast2ucast_buffer;
3702d86561ffSRaja Mani 	u32 remove_mcast2ucast_buffer;
3703d86561ffSRaja Mani 	u32 peer_sta_ps_statechg_enable;
3704d86561ffSRaja Mani 	u32 igmpmld_ac_override;
3705d86561ffSRaja Mani 	u32 block_interbss;
3706d86561ffSRaja Mani 	u32 set_disable_reset_cmdid;
3707d86561ffSRaja Mani 	u32 set_msdu_ttl_cmdid;
3708d86561ffSRaja Mani 	u32 set_ppdu_duration_cmdid;
3709d86561ffSRaja Mani 	u32 txbf_sound_period_cmdid;
3710d86561ffSRaja Mani 	u32 set_promisc_mode_cmdid;
3711d86561ffSRaja Mani 	u32 set_burst_mode_cmdid;
3712d86561ffSRaja Mani 	u32 en_stats;
3713d86561ffSRaja Mani 	u32 mu_group_policy;
3714d86561ffSRaja Mani 	u32 noise_detection;
3715d86561ffSRaja Mani 	u32 noise_threshold;
3716d86561ffSRaja Mani 	u32 dpd_enable;
3717d86561ffSRaja Mani 	u32 set_mcast_bcast_echo;
3718d86561ffSRaja Mani 	u32 atf_strict_sch;
3719d86561ffSRaja Mani 	u32 atf_sched_duration;
3720d86561ffSRaja Mani 	u32 ant_plzn;
3721d86561ffSRaja Mani 	u32 mgmt_retry_limit;
3722d86561ffSRaja Mani 	u32 sensitivity_level;
3723d86561ffSRaja Mani 	u32 signed_txpower_2g;
3724d86561ffSRaja Mani 	u32 signed_txpower_5g;
3725d86561ffSRaja Mani 	u32 enable_per_tid_amsdu;
3726d86561ffSRaja Mani 	u32 enable_per_tid_ampdu;
3727d86561ffSRaja Mani 	u32 cca_threshold;
3728d86561ffSRaja Mani 	u32 rts_fixed_rate;
3729d86561ffSRaja Mani 	u32 pdev_reset;
3730d86561ffSRaja Mani 	u32 wapi_mbssid_offset;
3731d86561ffSRaja Mani 	u32 arp_srcaddr;
3732d86561ffSRaja Mani 	u32 arp_dstaddr;
373339136248SRajkumar Manoharan 	u32 enable_btcoex;
3734226a339bSBartosz Markowski };
3735226a339bSBartosz Markowski 
3736226a339bSBartosz Markowski #define WMI_PDEV_PARAM_UNSUPPORTED 0
3737226a339bSBartosz Markowski 
37385e3dd157SKalle Valo enum wmi_pdev_param {
3739d0e0a552SBen Greear 	/* TX chain mask */
37405e3dd157SKalle Valo 	WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3741d0e0a552SBen Greear 	/* RX chain mask */
37425e3dd157SKalle Valo 	WMI_PDEV_PARAM_RX_CHAIN_MASK,
37435e3dd157SKalle Valo 	/* TX power limit for 2G Radio */
37445e3dd157SKalle Valo 	WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
37455e3dd157SKalle Valo 	/* TX power limit for 5G Radio */
37465e3dd157SKalle Valo 	WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
37475e3dd157SKalle Valo 	/* TX power scale */
37485e3dd157SKalle Valo 	WMI_PDEV_PARAM_TXPOWER_SCALE,
37495e3dd157SKalle Valo 	/* Beacon generation mode . 0: host, 1: target   */
37505e3dd157SKalle Valo 	WMI_PDEV_PARAM_BEACON_GEN_MODE,
37515e3dd157SKalle Valo 	/* Beacon generation mode . 0: staggered 1: bursted   */
37525e3dd157SKalle Valo 	WMI_PDEV_PARAM_BEACON_TX_MODE,
37535e3dd157SKalle Valo 	/*
37545e3dd157SKalle Valo 	 * Resource manager off chan mode .
37555e3dd157SKalle Valo 	 * 0: turn off off chan mode. 1: turn on offchan mode
37565e3dd157SKalle Valo 	 */
37575e3dd157SKalle Valo 	WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
37585e3dd157SKalle Valo 	/*
37595e3dd157SKalle Valo 	 * Protection mode:
37605e3dd157SKalle Valo 	 * 0: no protection 1:use CTS-to-self 2: use RTS/CTS
37615e3dd157SKalle Valo 	 */
37625e3dd157SKalle Valo 	WMI_PDEV_PARAM_PROTECTION_MODE,
3763c4dd0d01SMichal Kazior 	/*
3764c4dd0d01SMichal Kazior 	 * Dynamic bandwidth - 0: disable, 1: enable
3765c4dd0d01SMichal Kazior 	 *
3766c4dd0d01SMichal Kazior 	 * When enabled HW rate control tries different bandwidths when
3767c4dd0d01SMichal Kazior 	 * retransmitting frames.
3768c4dd0d01SMichal Kazior 	 */
37695e3dd157SKalle Valo 	WMI_PDEV_PARAM_DYNAMIC_BW,
37705e3dd157SKalle Valo 	/* Non aggregrate/ 11g sw retry threshold.0-disable */
37715e3dd157SKalle Valo 	WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
37725e3dd157SKalle Valo 	/* aggregrate sw retry threshold. 0-disable*/
37735e3dd157SKalle Valo 	WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
37745e3dd157SKalle Valo 	/* Station kickout threshold (non of consecutive failures).0-disable */
37755e3dd157SKalle Valo 	WMI_PDEV_PARAM_STA_KICKOUT_TH,
37765e3dd157SKalle Valo 	/* Aggerate size scaling configuration per AC */
37775e3dd157SKalle Valo 	WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
37785e3dd157SKalle Valo 	/* LTR enable */
37795e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_ENABLE,
37805e3dd157SKalle Valo 	/* LTR latency for BE, in us */
37815e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
37825e3dd157SKalle Valo 	/* LTR latency for BK, in us */
37835e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
37845e3dd157SKalle Valo 	/* LTR latency for VI, in us */
37855e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
37865e3dd157SKalle Valo 	/* LTR latency for VO, in us  */
37875e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
37885e3dd157SKalle Valo 	/* LTR AC latency timeout, in ms */
37895e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
37905e3dd157SKalle Valo 	/* LTR platform latency override, in us */
37915e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
37925e3dd157SKalle Valo 	/* LTR-RX override, in us */
37935e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
37945e3dd157SKalle Valo 	/* Tx activity timeout for LTR, in us */
37955e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
37965e3dd157SKalle Valo 	/* L1SS state machine enable */
37975e3dd157SKalle Valo 	WMI_PDEV_PARAM_L1SS_ENABLE,
37985e3dd157SKalle Valo 	/* Deep sleep state machine enable */
37995e3dd157SKalle Valo 	WMI_PDEV_PARAM_DSLEEP_ENABLE,
38005e3dd157SKalle Valo 	/* RX buffering flush enable */
38015e3dd157SKalle Valo 	WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
38025e3dd157SKalle Valo 	/* RX buffering matermark */
38035e3dd157SKalle Valo 	WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
38045e3dd157SKalle Valo 	/* RX buffering timeout enable */
38055e3dd157SKalle Valo 	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
38065e3dd157SKalle Valo 	/* RX buffering timeout value */
38075e3dd157SKalle Valo 	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
38085e3dd157SKalle Valo 	/* pdev level stats update period in ms */
38095e3dd157SKalle Valo 	WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
38105e3dd157SKalle Valo 	/* vdev level stats update period in ms */
38115e3dd157SKalle Valo 	WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
38125e3dd157SKalle Valo 	/* peer level stats update period in ms */
38135e3dd157SKalle Valo 	WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
38145e3dd157SKalle Valo 	/* beacon filter status update period */
38155e3dd157SKalle Valo 	WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
38165e3dd157SKalle Valo 	/* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */
38175e3dd157SKalle Valo 	WMI_PDEV_PARAM_PMF_QOS,
38185e3dd157SKalle Valo 	/* Access category on which ARP frames are sent */
38195e3dd157SKalle Valo 	WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
38205e3dd157SKalle Valo 	/* DCS configuration */
38215e3dd157SKalle Valo 	WMI_PDEV_PARAM_DCS,
38225e3dd157SKalle Valo 	/* Enable/Disable ANI on target */
38235e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_ENABLE,
38245e3dd157SKalle Valo 	/* configure the ANI polling period */
38255e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_POLL_PERIOD,
38265e3dd157SKalle Valo 	/* configure the ANI listening period */
38275e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
38285e3dd157SKalle Valo 	/* configure OFDM immunity level */
38295e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
38305e3dd157SKalle Valo 	/* configure CCK immunity level */
38315e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_CCK_LEVEL,
38325e3dd157SKalle Valo 	/* Enable/Disable CDD for 1x1 STAs in rate control module */
38335e3dd157SKalle Valo 	WMI_PDEV_PARAM_DYNTXCHAIN,
38345e3dd157SKalle Valo 	/* Enable/Disable proxy STA */
38355e3dd157SKalle Valo 	WMI_PDEV_PARAM_PROXY_STA,
38365e3dd157SKalle Valo 	/* Enable/Disable low power state when all VDEVs are inactive/idle. */
38375e3dd157SKalle Valo 	WMI_PDEV_PARAM_IDLE_PS_CONFIG,
38385e3dd157SKalle Valo 	/* Enable/Disable power gating sleep */
38395e3dd157SKalle Valo 	WMI_PDEV_PARAM_POWER_GATING_SLEEP,
38405e3dd157SKalle Valo };
38415e3dd157SKalle Valo 
3842226a339bSBartosz Markowski enum wmi_10x_pdev_param {
3843226a339bSBartosz Markowski 	/* TX chian mask */
3844226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3845226a339bSBartosz Markowski 	/* RX chian mask */
3846226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
3847226a339bSBartosz Markowski 	/* TX power limit for 2G Radio */
3848226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
3849226a339bSBartosz Markowski 	/* TX power limit for 5G Radio */
3850226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
3851226a339bSBartosz Markowski 	/* TX power scale */
3852226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
3853226a339bSBartosz Markowski 	/* Beacon generation mode . 0: host, 1: target   */
3854226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
3855226a339bSBartosz Markowski 	/* Beacon generation mode . 0: staggered 1: bursted   */
3856226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
3857226a339bSBartosz Markowski 	/*
3858226a339bSBartosz Markowski 	 * Resource manager off chan mode .
3859226a339bSBartosz Markowski 	 * 0: turn off off chan mode. 1: turn on offchan mode
3860226a339bSBartosz Markowski 	 */
3861226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3862226a339bSBartosz Markowski 	/*
3863226a339bSBartosz Markowski 	 * Protection mode:
3864226a339bSBartosz Markowski 	 * 0: no protection 1:use CTS-to-self 2: use RTS/CTS
3865226a339bSBartosz Markowski 	 */
3866226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_PROTECTION_MODE,
3867226a339bSBartosz Markowski 	/* Dynamic bandwidth 0: disable 1: enable */
3868226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_DYNAMIC_BW,
3869226a339bSBartosz Markowski 	/* Non aggregrate/ 11g sw retry threshold.0-disable */
3870226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3871226a339bSBartosz Markowski 	/* aggregrate sw retry threshold. 0-disable*/
3872226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
3873226a339bSBartosz Markowski 	/* Station kickout threshold (non of consecutive failures).0-disable */
3874226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
3875226a339bSBartosz Markowski 	/* Aggerate size scaling configuration per AC */
3876226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3877226a339bSBartosz Markowski 	/* LTR enable */
3878226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_ENABLE,
3879226a339bSBartosz Markowski 	/* LTR latency for BE, in us */
3880226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
3881226a339bSBartosz Markowski 	/* LTR latency for BK, in us */
3882226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
3883226a339bSBartosz Markowski 	/* LTR latency for VI, in us */
3884226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
3885226a339bSBartosz Markowski 	/* LTR latency for VO, in us  */
3886226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
3887226a339bSBartosz Markowski 	/* LTR AC latency timeout, in ms */
3888226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3889226a339bSBartosz Markowski 	/* LTR platform latency override, in us */
3890226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3891226a339bSBartosz Markowski 	/* LTR-RX override, in us */
3892226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
3893226a339bSBartosz Markowski 	/* Tx activity timeout for LTR, in us */
3894226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3895226a339bSBartosz Markowski 	/* L1SS state machine enable */
3896226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_L1SS_ENABLE,
3897226a339bSBartosz Markowski 	/* Deep sleep state machine enable */
3898226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
3899226a339bSBartosz Markowski 	/* pdev level stats update period in ms */
3900226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3901226a339bSBartosz Markowski 	/* vdev level stats update period in ms */
3902226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3903226a339bSBartosz Markowski 	/* peer level stats update period in ms */
3904226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3905226a339bSBartosz Markowski 	/* beacon filter status update period */
3906226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3907226a339bSBartosz Markowski 	/* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */
3908226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_PMF_QOS,
3909226a339bSBartosz Markowski 	/* Access category on which ARP and DHCP frames are sent */
3910226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
3911226a339bSBartosz Markowski 	/* DCS configuration */
3912226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_DCS,
3913226a339bSBartosz Markowski 	/* Enable/Disable ANI on target */
3914226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_ENABLE,
3915226a339bSBartosz Markowski 	/* configure the ANI polling period */
3916226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
3917226a339bSBartosz Markowski 	/* configure the ANI listening period */
3918226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
3919226a339bSBartosz Markowski 	/* configure OFDM immunity level */
3920226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
3921226a339bSBartosz Markowski 	/* configure CCK immunity level */
3922226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
3923226a339bSBartosz Markowski 	/* Enable/Disable CDD for 1x1 STAs in rate control module */
3924226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_DYNTXCHAIN,
3925226a339bSBartosz Markowski 	/* Enable/Disable Fast channel reset*/
3926226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
3927226a339bSBartosz Markowski 	/* Set Bursting DUR */
3928226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BURST_DUR,
3929226a339bSBartosz Markowski 	/* Set Bursting Enable*/
3930226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BURST_ENABLE,
393124c88f78SMichal Kazior 
393224c88f78SMichal Kazior 	/* following are available as of firmware 10.2 */
393324c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
393424c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE,
393524c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_IGMPMLD_TID,
393624c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_ANTENNA_GAIN,
393724c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_RX_DECAP_MODE,
393824c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_RX_FILTER,
393924c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID,
394024c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_PROXY_STA_MODE,
394124c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE,
394224c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
394324c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
3944b43bf97eSPeter Oh 	WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
3945b43bf97eSPeter Oh 	WMI_10X_PDEV_PARAM_RTS_FIXED_RATE,
3946db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_CAL_PERIOD,
3947db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_ATF_STRICT_SCH,
3948db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_ATF_SCHED_DURATION,
3949db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
3950db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_PDEV_RESET
3951226a339bSBartosz Markowski };
3952226a339bSBartosz Markowski 
3953d86561ffSRaja Mani enum wmi_10_4_pdev_param {
3954d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3955d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
3956d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
3957d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
3958d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
3959d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
3960d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
3961d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3962d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
3963d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
3964d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3965d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
3966d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
3967d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3968d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_ENABLE,
3969d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
3970d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
3971d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
3972d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
3973d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3974d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3975d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
3976d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3977d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
3978d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
3979d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
3980d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
3981d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
3982d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
3983d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3984d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3985d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3986d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3987d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PMF_QOS,
3988d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
3989d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DCS,
3990d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_ENABLE,
3991d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
3992d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
3993d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
3994d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
3995d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
3996d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PROXY_STA,
3997d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
3998d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
3999d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_AGGR_BURST,
4000d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
4001d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
4002d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BURST_DUR,
4003d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BURST_ENABLE,
4004d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
4005d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
4006d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
4007d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
4008d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RX_FILTER,
4009d86561ffSRaja Mani 	WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
4010d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
4011d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
4012d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
4013d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
4014d86561ffSRaja Mani 	WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
4015d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
4016d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
4017d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
4018d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
4019d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
4020d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
4021d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
4022d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
4023d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_EN_STATS,
4024d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
4025d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
4026d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
4027d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DPD_ENABLE,
4028d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
4029d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
4030d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
4031d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANT_PLZN,
4032d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
4033d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
4034d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
4035d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
4036d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
4037d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
4038d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
4039d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
4040d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_CAL_PERIOD,
4041d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PDEV_RESET,
4042d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
4043d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
4044d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
404552e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_TXPOWER_DECR_DB,
404652e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_RX_BATCHMODE,
404752e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_PACKET_AGGR_DELAY,
404852e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
404952e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
405052e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_CUST_TXPOWER_SCALE,
405139136248SRajkumar Manoharan 	WMI_10_4_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
405239136248SRajkumar Manoharan 	WMI_10_4_PDEV_PARAM_ATF_SSID_GROUP_POLICY,
405339136248SRajkumar Manoharan 	WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
4054d86561ffSRaja Mani };
4055d86561ffSRaja Mani 
40565e3dd157SKalle Valo struct wmi_pdev_set_param_cmd {
40575e3dd157SKalle Valo 	__le32 param_id;
40585e3dd157SKalle Valo 	__le32 param_value;
40595e3dd157SKalle Valo } __packed;
40605e3dd157SKalle Valo 
4061a7bd3e99SPeter Oh /* valid period is 1 ~ 60000ms, unit in millisecond */
4062a7bd3e99SPeter Oh #define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000
4063a7bd3e99SPeter Oh 
40645e3dd157SKalle Valo struct wmi_pdev_get_tpc_config_cmd {
40655e3dd157SKalle Valo 	/* parameter   */
40665e3dd157SKalle Valo 	__le32 param;
40675e3dd157SKalle Valo } __packed;
40685e3dd157SKalle Valo 
406929542666SMaharaja Kennadyrajan #define WMI_TPC_CONFIG_PARAM		1
4070bc64d052SMaharaja Kennadyrajan #define WMI_TPC_FINAL_RATE_MAX		240
40715e3dd157SKalle Valo #define WMI_TPC_TX_N_CHAIN		4
40724b190675STamizh Chelvam #define WMI_TPC_RATE_MAX               (WMI_TPC_TX_N_CHAIN * 65)
407329542666SMaharaja Kennadyrajan #define WMI_TPC_PREAM_TABLE_MAX		10
407429542666SMaharaja Kennadyrajan #define WMI_TPC_FLAG			3
407529542666SMaharaja Kennadyrajan #define WMI_TPC_BUF_SIZE		10
4076bc64d052SMaharaja Kennadyrajan #define WMI_TPC_BEAMFORMING		2
407729542666SMaharaja Kennadyrajan 
407829542666SMaharaja Kennadyrajan enum wmi_tpc_table_type {
407929542666SMaharaja Kennadyrajan 	WMI_TPC_TABLE_TYPE_CDD = 0,
408029542666SMaharaja Kennadyrajan 	WMI_TPC_TABLE_TYPE_STBC = 1,
408129542666SMaharaja Kennadyrajan 	WMI_TPC_TABLE_TYPE_TXBF = 2,
408229542666SMaharaja Kennadyrajan };
40835e3dd157SKalle Valo 
40845e3dd157SKalle Valo enum wmi_tpc_config_event_flag {
40855e3dd157SKalle Valo 	WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD	= 0x1,
40865e3dd157SKalle Valo 	WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC	= 0x2,
40875e3dd157SKalle Valo 	WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF	= 0x4,
40885e3dd157SKalle Valo };
40895e3dd157SKalle Valo 
40905e3dd157SKalle Valo struct wmi_pdev_tpc_config_event {
40915e3dd157SKalle Valo 	__le32 reg_domain;
40925e3dd157SKalle Valo 	__le32 chan_freq;
40935e3dd157SKalle Valo 	__le32 phy_mode;
40945e3dd157SKalle Valo 	__le32 twice_antenna_reduction;
40955e3dd157SKalle Valo 	__le32 twice_max_rd_power;
40963b8fc902SKalle Valo 	a_sle32 twice_antenna_gain;
40975e3dd157SKalle Valo 	__le32 power_limit;
40985e3dd157SKalle Valo 	__le32 rate_max;
40995e3dd157SKalle Valo 	__le32 num_tx_chain;
41005e3dd157SKalle Valo 	__le32 ctl;
41015e3dd157SKalle Valo 	__le32 flags;
41025e3dd157SKalle Valo 	s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
41035e3dd157SKalle Valo 	s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
41045e3dd157SKalle Valo 	s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
41055e3dd157SKalle Valo 	s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
41065e3dd157SKalle Valo 	u8 rates_array[WMI_TPC_RATE_MAX];
41075e3dd157SKalle Valo } __packed;
41085e3dd157SKalle Valo 
41095e3dd157SKalle Valo /* Transmit power scale factor. */
41105e3dd157SKalle Valo enum wmi_tp_scale {
41115e3dd157SKalle Valo 	WMI_TP_SCALE_MAX    = 0,	/* no scaling (default) */
41125e3dd157SKalle Valo 	WMI_TP_SCALE_50     = 1,	/* 50% of max (-3 dBm) */
41135e3dd157SKalle Valo 	WMI_TP_SCALE_25     = 2,	/* 25% of max (-6 dBm) */
41145e3dd157SKalle Valo 	WMI_TP_SCALE_12     = 3,	/* 12% of max (-9 dBm) */
41155e3dd157SKalle Valo 	WMI_TP_SCALE_MIN    = 4,	/* min, but still on   */
41165e3dd157SKalle Valo 	WMI_TP_SCALE_SIZE   = 5,	/* max num of enum     */
41175e3dd157SKalle Valo };
41185e3dd157SKalle Valo 
4119bc64d052SMaharaja Kennadyrajan struct wmi_pdev_tpc_final_table_event {
4120bc64d052SMaharaja Kennadyrajan 	__le32 reg_domain;
4121bc64d052SMaharaja Kennadyrajan 	__le32 chan_freq;
4122bc64d052SMaharaja Kennadyrajan 	__le32 phy_mode;
4123bc64d052SMaharaja Kennadyrajan 	__le32 twice_antenna_reduction;
4124bc64d052SMaharaja Kennadyrajan 	__le32 twice_max_rd_power;
4125bc64d052SMaharaja Kennadyrajan 	a_sle32 twice_antenna_gain;
4126bc64d052SMaharaja Kennadyrajan 	__le32 power_limit;
4127bc64d052SMaharaja Kennadyrajan 	__le32 rate_max;
4128bc64d052SMaharaja Kennadyrajan 	__le32 num_tx_chain;
4129bc64d052SMaharaja Kennadyrajan 	__le32 ctl;
4130bc64d052SMaharaja Kennadyrajan 	__le32 flags;
4131bc64d052SMaharaja Kennadyrajan 	s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
4132bc64d052SMaharaja Kennadyrajan 	s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4133bc64d052SMaharaja Kennadyrajan 	s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4134bc64d052SMaharaja Kennadyrajan 	s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4135bc64d052SMaharaja Kennadyrajan 	u8 rates_array[WMI_TPC_FINAL_RATE_MAX];
4136bc64d052SMaharaja Kennadyrajan 	u8 ctl_power_table[WMI_TPC_BEAMFORMING][WMI_TPC_TX_N_CHAIN]
4137bc64d052SMaharaja Kennadyrajan 	   [WMI_TPC_TX_N_CHAIN];
4138bc64d052SMaharaja Kennadyrajan } __packed;
4139bc64d052SMaharaja Kennadyrajan 
4140bc64d052SMaharaja Kennadyrajan struct wmi_pdev_get_tpc_table_cmd {
4141bc64d052SMaharaja Kennadyrajan 	__le32 param;
4142bc64d052SMaharaja Kennadyrajan } __packed;
4143bc64d052SMaharaja Kennadyrajan 
4144bc64d052SMaharaja Kennadyrajan enum wmi_tpc_pream_2ghz {
4145bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_CCK = 0,
4146bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_OFDM,
4147bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_HT20,
4148bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_HT40,
4149bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_VHT20,
4150bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_VHT40,
4151bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_VHT80,
4152bc64d052SMaharaja Kennadyrajan };
4153bc64d052SMaharaja Kennadyrajan 
4154bc64d052SMaharaja Kennadyrajan enum wmi_tpc_pream_5ghz {
4155bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_OFDM = 1,
4156bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_HT20,
4157bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_HT40,
4158bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_VHT20,
4159bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_VHT40,
4160bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_VHT80,
4161bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_HTCUP,
4162bc64d052SMaharaja Kennadyrajan };
4163bc64d052SMaharaja Kennadyrajan 
41645e3dd157SKalle Valo struct wmi_pdev_chanlist_update_event {
41655e3dd157SKalle Valo 	/* number of channels */
41665e3dd157SKalle Valo 	__le32 num_chan;
41675e3dd157SKalle Valo 	/* array of channels */
41685e3dd157SKalle Valo 	struct wmi_channel channel_list[1];
41695e3dd157SKalle Valo } __packed;
41705e3dd157SKalle Valo 
41715e3dd157SKalle Valo #define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32)
41725e3dd157SKalle Valo 
41735e3dd157SKalle Valo struct wmi_debug_mesg_event {
41745e3dd157SKalle Valo 	/* message buffer, NULL terminated */
41755e3dd157SKalle Valo 	char bufp[WMI_MAX_DEBUG_MESG];
41765e3dd157SKalle Valo } __packed;
41775e3dd157SKalle Valo 
41785e3dd157SKalle Valo enum {
41795e3dd157SKalle Valo 	/* P2P device */
41805e3dd157SKalle Valo 	VDEV_SUBTYPE_P2PDEV = 0,
41815e3dd157SKalle Valo 	/* P2P client */
41825e3dd157SKalle Valo 	VDEV_SUBTYPE_P2PCLI,
41835e3dd157SKalle Valo 	/* P2P GO */
41845e3dd157SKalle Valo 	VDEV_SUBTYPE_P2PGO,
41855e3dd157SKalle Valo 	/* BT3.0 HS */
41865e3dd157SKalle Valo 	VDEV_SUBTYPE_BT,
41875e3dd157SKalle Valo };
41885e3dd157SKalle Valo 
41895e3dd157SKalle Valo struct wmi_pdev_set_channel_cmd {
41905e3dd157SKalle Valo 	/* idnore power , only use flags , mode and freq */
41915e3dd157SKalle Valo 	struct wmi_channel chan;
41925e3dd157SKalle Valo } __packed;
41935e3dd157SKalle Valo 
419490174455SRajkumar Manoharan struct wmi_pdev_pktlog_enable_cmd {
419590174455SRajkumar Manoharan 	__le32 ev_bitmap;
419690174455SRajkumar Manoharan } __packed;
419790174455SRajkumar Manoharan 
41985e3dd157SKalle Valo /* Customize the DSCP (bit) to TID (0-7) mapping for QOS */
41995e3dd157SKalle Valo #define WMI_DSCP_MAP_MAX    (64)
42005e3dd157SKalle Valo struct wmi_pdev_set_dscp_tid_map_cmd {
42015e3dd157SKalle Valo 	/* map indicating DSCP to TID conversion */
42025e3dd157SKalle Valo 	__le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
42035e3dd157SKalle Valo } __packed;
42045e3dd157SKalle Valo 
42055e3dd157SKalle Valo enum mcast_bcast_rate_id {
42065e3dd157SKalle Valo 	WMI_SET_MCAST_RATE,
42075e3dd157SKalle Valo 	WMI_SET_BCAST_RATE
42085e3dd157SKalle Valo };
42095e3dd157SKalle Valo 
42105e3dd157SKalle Valo struct mcast_bcast_rate {
42115e3dd157SKalle Valo 	enum mcast_bcast_rate_id rate_id;
42125e3dd157SKalle Valo 	__le32 rate;
42135e3dd157SKalle Valo } __packed;
42145e3dd157SKalle Valo 
42155e3dd157SKalle Valo struct wmi_wmm_params {
42165e3dd157SKalle Valo 	__le32 cwmin;
42175e3dd157SKalle Valo 	__le32 cwmax;
42185e3dd157SKalle Valo 	__le32 aifs;
42195e3dd157SKalle Valo 	__le32 txop;
42205e3dd157SKalle Valo 	__le32 acm;
42215e3dd157SKalle Valo 	__le32 no_ack;
42225e3dd157SKalle Valo } __packed;
42235e3dd157SKalle Valo 
42245e3dd157SKalle Valo struct wmi_pdev_set_wmm_params {
42255e3dd157SKalle Valo 	struct wmi_wmm_params ac_be;
42265e3dd157SKalle Valo 	struct wmi_wmm_params ac_bk;
42275e3dd157SKalle Valo 	struct wmi_wmm_params ac_vi;
42285e3dd157SKalle Valo 	struct wmi_wmm_params ac_vo;
42295e3dd157SKalle Valo } __packed;
42305e3dd157SKalle Valo 
42315e3dd157SKalle Valo struct wmi_wmm_params_arg {
42325e3dd157SKalle Valo 	u32 cwmin;
42335e3dd157SKalle Valo 	u32 cwmax;
42345e3dd157SKalle Valo 	u32 aifs;
42355e3dd157SKalle Valo 	u32 txop;
42365e3dd157SKalle Valo 	u32 acm;
42375e3dd157SKalle Valo 	u32 no_ack;
42385e3dd157SKalle Valo };
42395e3dd157SKalle Valo 
42405e752e42SMichal Kazior struct wmi_wmm_params_all_arg {
42415e3dd157SKalle Valo 	struct wmi_wmm_params_arg ac_be;
42425e3dd157SKalle Valo 	struct wmi_wmm_params_arg ac_bk;
42435e3dd157SKalle Valo 	struct wmi_wmm_params_arg ac_vi;
42445e3dd157SKalle Valo 	struct wmi_wmm_params_arg ac_vo;
42455e3dd157SKalle Valo };
42465e3dd157SKalle Valo 
4247b91251fbSMichal Kazior struct wmi_pdev_stats_tx {
42485e3dd157SKalle Valo 	/* Num HTT cookies queued to dispatch list */
42495e3dd157SKalle Valo 	__le32 comp_queued;
42505e3dd157SKalle Valo 
42515e3dd157SKalle Valo 	/* Num HTT cookies dispatched */
42525e3dd157SKalle Valo 	__le32 comp_delivered;
42535e3dd157SKalle Valo 
42545e3dd157SKalle Valo 	/* Num MSDU queued to WAL */
42555e3dd157SKalle Valo 	__le32 msdu_enqued;
42565e3dd157SKalle Valo 
42575e3dd157SKalle Valo 	/* Num MPDU queue to WAL */
42585e3dd157SKalle Valo 	__le32 mpdu_enqued;
42595e3dd157SKalle Valo 
42605e3dd157SKalle Valo 	/* Num MSDUs dropped by WMM limit */
42615e3dd157SKalle Valo 	__le32 wmm_drop;
42625e3dd157SKalle Valo 
42635e3dd157SKalle Valo 	/* Num Local frames queued */
42645e3dd157SKalle Valo 	__le32 local_enqued;
42655e3dd157SKalle Valo 
42665e3dd157SKalle Valo 	/* Num Local frames done */
42675e3dd157SKalle Valo 	__le32 local_freed;
42685e3dd157SKalle Valo 
42695e3dd157SKalle Valo 	/* Num queued to HW */
42705e3dd157SKalle Valo 	__le32 hw_queued;
42715e3dd157SKalle Valo 
42725e3dd157SKalle Valo 	/* Num PPDU reaped from HW */
42735e3dd157SKalle Valo 	__le32 hw_reaped;
42745e3dd157SKalle Valo 
42755e3dd157SKalle Valo 	/* Num underruns */
42765e3dd157SKalle Valo 	__le32 underrun;
42775e3dd157SKalle Valo 
42785e3dd157SKalle Valo 	/* Num PPDUs cleaned up in TX abort */
42795e3dd157SKalle Valo 	__le32 tx_abort;
42805e3dd157SKalle Valo 
42815e3dd157SKalle Valo 	/* Num MPDUs requed by SW */
42825e3dd157SKalle Valo 	__le32 mpdus_requed;
42835e3dd157SKalle Valo 
42845e3dd157SKalle Valo 	/* excessive retries */
42855e3dd157SKalle Valo 	__le32 tx_ko;
42865e3dd157SKalle Valo 
42875e3dd157SKalle Valo 	/* data hw rate code */
42885e3dd157SKalle Valo 	__le32 data_rc;
42895e3dd157SKalle Valo 
42905e3dd157SKalle Valo 	/* Scheduler self triggers */
42915e3dd157SKalle Valo 	__le32 self_triggers;
42925e3dd157SKalle Valo 
42935e3dd157SKalle Valo 	/* frames dropped due to excessive sw retries */
42945e3dd157SKalle Valo 	__le32 sw_retry_failure;
42955e3dd157SKalle Valo 
42965e3dd157SKalle Valo 	/* illegal rate phy errors  */
42975e3dd157SKalle Valo 	__le32 illgl_rate_phy_err;
42985e3dd157SKalle Valo 
4299e13dbeadSJoe Perches 	/* wal pdev continuous xretry */
43005e3dd157SKalle Valo 	__le32 pdev_cont_xretry;
43015e3dd157SKalle Valo 
43025e3dd157SKalle Valo 	/* wal pdev continous xretry */
43035e3dd157SKalle Valo 	__le32 pdev_tx_timeout;
43045e3dd157SKalle Valo 
43055e3dd157SKalle Valo 	/* wal pdev resets  */
43065e3dd157SKalle Valo 	__le32 pdev_resets;
43075e3dd157SKalle Valo 
430834d714e0SBartosz Markowski 	/* frames dropped due to non-availability of stateless TIDs */
430934d714e0SBartosz Markowski 	__le32 stateless_tid_alloc_failure;
431034d714e0SBartosz Markowski 
43115e3dd157SKalle Valo 	__le32 phy_underrun;
43125e3dd157SKalle Valo 
43135e3dd157SKalle Valo 	/* MPDU is more than txop limit */
43145e3dd157SKalle Valo 	__le32 txop_ovf;
43155e3dd157SKalle Valo } __packed;
43165e3dd157SKalle Valo 
431798dd2b92SManikanta Pubbisetty struct wmi_10_4_pdev_stats_tx {
431898dd2b92SManikanta Pubbisetty 	/* Num HTT cookies queued to dispatch list */
431998dd2b92SManikanta Pubbisetty 	__le32 comp_queued;
432098dd2b92SManikanta Pubbisetty 
432198dd2b92SManikanta Pubbisetty 	/* Num HTT cookies dispatched */
432298dd2b92SManikanta Pubbisetty 	__le32 comp_delivered;
432398dd2b92SManikanta Pubbisetty 
432498dd2b92SManikanta Pubbisetty 	/* Num MSDU queued to WAL */
432598dd2b92SManikanta Pubbisetty 	__le32 msdu_enqued;
432698dd2b92SManikanta Pubbisetty 
432798dd2b92SManikanta Pubbisetty 	/* Num MPDU queue to WAL */
432898dd2b92SManikanta Pubbisetty 	__le32 mpdu_enqued;
432998dd2b92SManikanta Pubbisetty 
433098dd2b92SManikanta Pubbisetty 	/* Num MSDUs dropped by WMM limit */
433198dd2b92SManikanta Pubbisetty 	__le32 wmm_drop;
433298dd2b92SManikanta Pubbisetty 
433398dd2b92SManikanta Pubbisetty 	/* Num Local frames queued */
433498dd2b92SManikanta Pubbisetty 	__le32 local_enqued;
433598dd2b92SManikanta Pubbisetty 
433698dd2b92SManikanta Pubbisetty 	/* Num Local frames done */
433798dd2b92SManikanta Pubbisetty 	__le32 local_freed;
433898dd2b92SManikanta Pubbisetty 
433998dd2b92SManikanta Pubbisetty 	/* Num queued to HW */
434098dd2b92SManikanta Pubbisetty 	__le32 hw_queued;
434198dd2b92SManikanta Pubbisetty 
434298dd2b92SManikanta Pubbisetty 	/* Num PPDU reaped from HW */
434398dd2b92SManikanta Pubbisetty 	__le32 hw_reaped;
434498dd2b92SManikanta Pubbisetty 
434598dd2b92SManikanta Pubbisetty 	/* Num underruns */
434698dd2b92SManikanta Pubbisetty 	__le32 underrun;
434798dd2b92SManikanta Pubbisetty 
434898dd2b92SManikanta Pubbisetty 	/* HW Paused. */
434998dd2b92SManikanta Pubbisetty 	__le32  hw_paused;
435098dd2b92SManikanta Pubbisetty 
435198dd2b92SManikanta Pubbisetty 	/* Num PPDUs cleaned up in TX abort */
435298dd2b92SManikanta Pubbisetty 	__le32 tx_abort;
435398dd2b92SManikanta Pubbisetty 
435498dd2b92SManikanta Pubbisetty 	/* Num MPDUs requed by SW */
435598dd2b92SManikanta Pubbisetty 	__le32 mpdus_requed;
435698dd2b92SManikanta Pubbisetty 
435798dd2b92SManikanta Pubbisetty 	/* excessive retries */
435898dd2b92SManikanta Pubbisetty 	__le32 tx_ko;
435998dd2b92SManikanta Pubbisetty 
436098dd2b92SManikanta Pubbisetty 	/* data hw rate code */
436198dd2b92SManikanta Pubbisetty 	__le32 data_rc;
436298dd2b92SManikanta Pubbisetty 
436398dd2b92SManikanta Pubbisetty 	/* Scheduler self triggers */
436498dd2b92SManikanta Pubbisetty 	__le32 self_triggers;
436598dd2b92SManikanta Pubbisetty 
436698dd2b92SManikanta Pubbisetty 	/* frames dropped due to excessive sw retries */
436798dd2b92SManikanta Pubbisetty 	__le32 sw_retry_failure;
436898dd2b92SManikanta Pubbisetty 
436998dd2b92SManikanta Pubbisetty 	/* illegal rate phy errors  */
437098dd2b92SManikanta Pubbisetty 	__le32 illgl_rate_phy_err;
437198dd2b92SManikanta Pubbisetty 
437298dd2b92SManikanta Pubbisetty 	/* wal pdev continuous xretry */
437398dd2b92SManikanta Pubbisetty 	__le32 pdev_cont_xretry;
437498dd2b92SManikanta Pubbisetty 
437598dd2b92SManikanta Pubbisetty 	/* wal pdev tx timeouts */
437698dd2b92SManikanta Pubbisetty 	__le32 pdev_tx_timeout;
437798dd2b92SManikanta Pubbisetty 
437898dd2b92SManikanta Pubbisetty 	/* wal pdev resets  */
437998dd2b92SManikanta Pubbisetty 	__le32 pdev_resets;
438098dd2b92SManikanta Pubbisetty 
438198dd2b92SManikanta Pubbisetty 	/* frames dropped due to non-availability of stateless TIDs */
438298dd2b92SManikanta Pubbisetty 	__le32 stateless_tid_alloc_failure;
438398dd2b92SManikanta Pubbisetty 
438498dd2b92SManikanta Pubbisetty 	__le32 phy_underrun;
438598dd2b92SManikanta Pubbisetty 
438698dd2b92SManikanta Pubbisetty 	/* MPDU is more than txop limit */
438798dd2b92SManikanta Pubbisetty 	__le32 txop_ovf;
438898dd2b92SManikanta Pubbisetty 
438998dd2b92SManikanta Pubbisetty 	/* Number of Sequences posted */
439098dd2b92SManikanta Pubbisetty 	__le32 seq_posted;
439198dd2b92SManikanta Pubbisetty 
439298dd2b92SManikanta Pubbisetty 	/* Number of Sequences failed queueing */
439398dd2b92SManikanta Pubbisetty 	__le32 seq_failed_queueing;
439498dd2b92SManikanta Pubbisetty 
439598dd2b92SManikanta Pubbisetty 	/* Number of Sequences completed */
439698dd2b92SManikanta Pubbisetty 	__le32 seq_completed;
439798dd2b92SManikanta Pubbisetty 
439898dd2b92SManikanta Pubbisetty 	/* Number of Sequences restarted */
439998dd2b92SManikanta Pubbisetty 	__le32 seq_restarted;
440098dd2b92SManikanta Pubbisetty 
440198dd2b92SManikanta Pubbisetty 	/* Number of MU Sequences posted */
440298dd2b92SManikanta Pubbisetty 	__le32 mu_seq_posted;
440398dd2b92SManikanta Pubbisetty 
440498dd2b92SManikanta Pubbisetty 	/* Num MPDUs flushed by SW, HWPAUSED,SW TXABORT(Reset,channel change) */
440598dd2b92SManikanta Pubbisetty 	__le32 mpdus_sw_flush;
440698dd2b92SManikanta Pubbisetty 
440798dd2b92SManikanta Pubbisetty 	/* Num MPDUs filtered by HW, all filter condition (TTL expired) */
440898dd2b92SManikanta Pubbisetty 	__le32 mpdus_hw_filter;
440998dd2b92SManikanta Pubbisetty 
441098dd2b92SManikanta Pubbisetty 	/* Num MPDUs truncated by PDG
441198dd2b92SManikanta Pubbisetty 	 * (TXOP, TBTT, PPDU_duration based on rate, dyn_bw)
441298dd2b92SManikanta Pubbisetty 	 */
441398dd2b92SManikanta Pubbisetty 	__le32 mpdus_truncated;
441498dd2b92SManikanta Pubbisetty 
441598dd2b92SManikanta Pubbisetty 	/* Num MPDUs that was tried but didn't receive ACK or BA */
441698dd2b92SManikanta Pubbisetty 	__le32 mpdus_ack_failed;
441798dd2b92SManikanta Pubbisetty 
441898dd2b92SManikanta Pubbisetty 	/* Num MPDUs that was dropped due to expiry. */
441998dd2b92SManikanta Pubbisetty 	__le32 mpdus_expired;
442098dd2b92SManikanta Pubbisetty } __packed;
442198dd2b92SManikanta Pubbisetty 
4422b91251fbSMichal Kazior struct wmi_pdev_stats_rx {
44235e3dd157SKalle Valo 	/* Cnts any change in ring routing mid-ppdu */
44245e3dd157SKalle Valo 	__le32 mid_ppdu_route_change;
44255e3dd157SKalle Valo 
44265e3dd157SKalle Valo 	/* Total number of statuses processed */
44275e3dd157SKalle Valo 	__le32 status_rcvd;
44285e3dd157SKalle Valo 
44295e3dd157SKalle Valo 	/* Extra frags on rings 0-3 */
44305e3dd157SKalle Valo 	__le32 r0_frags;
44315e3dd157SKalle Valo 	__le32 r1_frags;
44325e3dd157SKalle Valo 	__le32 r2_frags;
44335e3dd157SKalle Valo 	__le32 r3_frags;
44345e3dd157SKalle Valo 
44355e3dd157SKalle Valo 	/* MSDUs / MPDUs delivered to HTT */
44365e3dd157SKalle Valo 	__le32 htt_msdus;
44375e3dd157SKalle Valo 	__le32 htt_mpdus;
44385e3dd157SKalle Valo 
44395e3dd157SKalle Valo 	/* MSDUs / MPDUs delivered to local stack */
44405e3dd157SKalle Valo 	__le32 loc_msdus;
44415e3dd157SKalle Valo 	__le32 loc_mpdus;
44425e3dd157SKalle Valo 
44435e3dd157SKalle Valo 	/* AMSDUs that have more MSDUs than the status ring size */
44445e3dd157SKalle Valo 	__le32 oversize_amsdu;
44455e3dd157SKalle Valo 
44465e3dd157SKalle Valo 	/* Number of PHY errors */
44475e3dd157SKalle Valo 	__le32 phy_errs;
44485e3dd157SKalle Valo 
44495e3dd157SKalle Valo 	/* Number of PHY errors drops */
44505e3dd157SKalle Valo 	__le32 phy_err_drop;
44515e3dd157SKalle Valo 
44525e3dd157SKalle Valo 	/* Number of mpdu errors - FCS, MIC, ENC etc. */
44535e3dd157SKalle Valo 	__le32 mpdu_errs;
44545e3dd157SKalle Valo } __packed;
44555e3dd157SKalle Valo 
4456b91251fbSMichal Kazior struct wmi_pdev_stats_peer {
44575e3dd157SKalle Valo 	/* REMOVE THIS ONCE REAL PEER STAT COUNTERS ARE ADDED */
44585e3dd157SKalle Valo 	__le32 dummy;
44595e3dd157SKalle Valo } __packed;
44605e3dd157SKalle Valo 
44615e3dd157SKalle Valo enum wmi_stats_id {
4462eed55411SMichal Kazior 	WMI_STAT_PEER = BIT(0),
4463eed55411SMichal Kazior 	WMI_STAT_AP = BIT(1),
4464eed55411SMichal Kazior 	WMI_STAT_PDEV = BIT(2),
4465eed55411SMichal Kazior 	WMI_STAT_VDEV = BIT(3),
4466eed55411SMichal Kazior 	WMI_STAT_BCNFLT = BIT(4),
4467eed55411SMichal Kazior 	WMI_STAT_VDEV_RATE = BIT(5),
44685e3dd157SKalle Valo };
44695e3dd157SKalle Valo 
4470f9575793SMohammed Shafi Shajakhan enum wmi_10_4_stats_id {
4471f9575793SMohammed Shafi Shajakhan 	WMI_10_4_STAT_PEER		= BIT(0),
4472f9575793SMohammed Shafi Shajakhan 	WMI_10_4_STAT_AP		= BIT(1),
4473f9575793SMohammed Shafi Shajakhan 	WMI_10_4_STAT_INST		= BIT(2),
4474f9575793SMohammed Shafi Shajakhan 	WMI_10_4_STAT_PEER_EXTD		= BIT(3),
44751b3fdb50SRajkumar Manoharan 	WMI_10_4_STAT_VDEV_EXTD		= BIT(4),
4476f9575793SMohammed Shafi Shajakhan };
4477f9575793SMohammed Shafi Shajakhan 
4478db9cdda6SBen Greear struct wlan_inst_rssi_args {
4479db9cdda6SBen Greear 	__le16 cfg_retry_count;
4480db9cdda6SBen Greear 	__le16 retry_count;
4481db9cdda6SBen Greear };
4482db9cdda6SBen Greear 
44835e3dd157SKalle Valo struct wmi_request_stats_cmd {
44845e3dd157SKalle Valo 	__le32 stats_id;
44855e3dd157SKalle Valo 
4486db9cdda6SBen Greear 	__le32 vdev_id;
4487db9cdda6SBen Greear 
4488db9cdda6SBen Greear 	/* peer MAC address */
4489db9cdda6SBen Greear 	struct wmi_mac_addr peer_macaddr;
4490db9cdda6SBen Greear 
4491db9cdda6SBen Greear 	/* Instantaneous RSSI arguments */
4492db9cdda6SBen Greear 	struct wlan_inst_rssi_args inst_rssi_args;
44935e3dd157SKalle Valo } __packed;
44945e3dd157SKalle Valo 
44955e3dd157SKalle Valo /* Suspend option */
44965e3dd157SKalle Valo enum {
44975e3dd157SKalle Valo 	/* suspend */
44985e3dd157SKalle Valo 	WMI_PDEV_SUSPEND,
44995e3dd157SKalle Valo 
45005e3dd157SKalle Valo 	/* suspend and disable all interrupts */
45015e3dd157SKalle Valo 	WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
45025e3dd157SKalle Valo };
45035e3dd157SKalle Valo 
45045e3dd157SKalle Valo struct wmi_pdev_suspend_cmd {
45055e3dd157SKalle Valo 	/* suspend option sent to target */
45065e3dd157SKalle Valo 	__le32 suspend_opt;
45075e3dd157SKalle Valo } __packed;
45085e3dd157SKalle Valo 
45095e3dd157SKalle Valo struct wmi_stats_event {
4510eed55411SMichal Kazior 	__le32 stats_id; /* WMI_STAT_ */
45115e3dd157SKalle Valo 	/*
45125e3dd157SKalle Valo 	 * number of pdev stats event structures
45135e3dd157SKalle Valo 	 * (wmi_pdev_stats) 0 or 1
45145e3dd157SKalle Valo 	 */
45155e3dd157SKalle Valo 	__le32 num_pdev_stats;
45165e3dd157SKalle Valo 	/*
45175e3dd157SKalle Valo 	 * number of vdev stats event structures
45185e3dd157SKalle Valo 	 * (wmi_vdev_stats) 0 or max vdevs
45195e3dd157SKalle Valo 	 */
45205e3dd157SKalle Valo 	__le32 num_vdev_stats;
45215e3dd157SKalle Valo 	/*
45225e3dd157SKalle Valo 	 * number of peer stats event structures
45235e3dd157SKalle Valo 	 * (wmi_peer_stats) 0 or max peers
45245e3dd157SKalle Valo 	 */
45255e3dd157SKalle Valo 	__le32 num_peer_stats;
45265e3dd157SKalle Valo 	__le32 num_bcnflt_stats;
45275e3dd157SKalle Valo 	/*
45285e3dd157SKalle Valo 	 * followed by
45295e3dd157SKalle Valo 	 *   num_pdev_stats * size of(struct wmi_pdev_stats)
45305e3dd157SKalle Valo 	 *   num_vdev_stats * size of(struct wmi_vdev_stats)
45315e3dd157SKalle Valo 	 *   num_peer_stats * size of(struct wmi_peer_stats)
45325e3dd157SKalle Valo 	 *
45335e3dd157SKalle Valo 	 *  By having a zero sized array, the pointer to data area
45345e3dd157SKalle Valo 	 *  becomes available without increasing the struct size
45355e3dd157SKalle Valo 	 */
45365e3dd157SKalle Valo 	u8 data[0];
45375e3dd157SKalle Valo } __packed;
45385e3dd157SKalle Valo 
453920de2229SMichal Kazior struct wmi_10_2_stats_event {
454020de2229SMichal Kazior 	__le32 stats_id; /* %WMI_REQUEST_ */
454120de2229SMichal Kazior 	__le32 num_pdev_stats;
454220de2229SMichal Kazior 	__le32 num_pdev_ext_stats;
454320de2229SMichal Kazior 	__le32 num_vdev_stats;
454420de2229SMichal Kazior 	__le32 num_peer_stats;
454520de2229SMichal Kazior 	__le32 num_bcnflt_stats;
454620de2229SMichal Kazior 	u8 data[0];
454720de2229SMichal Kazior } __packed;
454820de2229SMichal Kazior 
45495e3dd157SKalle Valo /*
45505e3dd157SKalle Valo  * PDEV statistics
45515e3dd157SKalle Valo  * TODO: add all PDEV stats here
45525e3dd157SKalle Valo  */
4553b91251fbSMichal Kazior struct wmi_pdev_stats_base {
4554b91251fbSMichal Kazior 	__le32 chan_nf;
455515138fdfSBen Greear 	__le32 tx_frame_count; /* Cycles spent transmitting frames */
455615138fdfSBen Greear 	__le32 rx_frame_count; /* Cycles spent receiving frames */
455715138fdfSBen Greear 	__le32 rx_clear_count; /* Total channel busy time, evidently */
455815138fdfSBen Greear 	__le32 cycle_count; /* Total on-channel time */
4559b91251fbSMichal Kazior 	__le32 phy_err_count;
4560b91251fbSMichal Kazior 	__le32 chan_tx_pwr;
45615e3dd157SKalle Valo } __packed;
45625e3dd157SKalle Valo 
4563b91251fbSMichal Kazior struct wmi_pdev_stats {
4564b91251fbSMichal Kazior 	struct wmi_pdev_stats_base base;
4565b91251fbSMichal Kazior 	struct wmi_pdev_stats_tx tx;
4566b91251fbSMichal Kazior 	struct wmi_pdev_stats_rx rx;
4567b91251fbSMichal Kazior 	struct wmi_pdev_stats_peer peer;
4568b91251fbSMichal Kazior } __packed;
4569b91251fbSMichal Kazior 
4570b91251fbSMichal Kazior struct wmi_pdev_stats_extra {
457152e346d1SChun-Yeow Yeoh 	__le32 ack_rx_bad;
457252e346d1SChun-Yeow Yeoh 	__le32 rts_bad;
457352e346d1SChun-Yeow Yeoh 	__le32 rts_good;
457452e346d1SChun-Yeow Yeoh 	__le32 fcs_bad;
457552e346d1SChun-Yeow Yeoh 	__le32 no_beacons;
457652e346d1SChun-Yeow Yeoh 	__le32 mib_int_count;
457752e346d1SChun-Yeow Yeoh } __packed;
457852e346d1SChun-Yeow Yeoh 
4579b91251fbSMichal Kazior struct wmi_10x_pdev_stats {
4580b91251fbSMichal Kazior 	struct wmi_pdev_stats_base base;
4581b91251fbSMichal Kazior 	struct wmi_pdev_stats_tx tx;
4582b91251fbSMichal Kazior 	struct wmi_pdev_stats_rx rx;
4583b91251fbSMichal Kazior 	struct wmi_pdev_stats_peer peer;
4584b91251fbSMichal Kazior 	struct wmi_pdev_stats_extra extra;
4585b91251fbSMichal Kazior } __packed;
4586b91251fbSMichal Kazior 
458720de2229SMichal Kazior struct wmi_pdev_stats_mem {
458820de2229SMichal Kazior 	__le32 dram_free;
458920de2229SMichal Kazior 	__le32 iram_free;
459020de2229SMichal Kazior } __packed;
459120de2229SMichal Kazior 
459220de2229SMichal Kazior struct wmi_10_2_pdev_stats {
459320de2229SMichal Kazior 	struct wmi_pdev_stats_base base;
459420de2229SMichal Kazior 	struct wmi_pdev_stats_tx tx;
459520de2229SMichal Kazior 	__le32 mc_drop;
459620de2229SMichal Kazior 	struct wmi_pdev_stats_rx rx;
459720de2229SMichal Kazior 	__le32 pdev_rx_timeout;
459820de2229SMichal Kazior 	struct wmi_pdev_stats_mem mem;
459920de2229SMichal Kazior 	struct wmi_pdev_stats_peer peer;
460020de2229SMichal Kazior 	struct wmi_pdev_stats_extra extra;
460120de2229SMichal Kazior } __packed;
460220de2229SMichal Kazior 
460398dd2b92SManikanta Pubbisetty struct wmi_10_4_pdev_stats {
460498dd2b92SManikanta Pubbisetty 	struct wmi_pdev_stats_base base;
460598dd2b92SManikanta Pubbisetty 	struct wmi_10_4_pdev_stats_tx tx;
460698dd2b92SManikanta Pubbisetty 	struct wmi_pdev_stats_rx rx;
460798dd2b92SManikanta Pubbisetty 	__le32 rx_ovfl_errs;
460898dd2b92SManikanta Pubbisetty 	struct wmi_pdev_stats_mem mem;
460998dd2b92SManikanta Pubbisetty 	__le32 sram_free_size;
461098dd2b92SManikanta Pubbisetty 	struct wmi_pdev_stats_extra extra;
461198dd2b92SManikanta Pubbisetty } __packed;
461298dd2b92SManikanta Pubbisetty 
46135e3dd157SKalle Valo /*
46145e3dd157SKalle Valo  * VDEV statistics
46155e3dd157SKalle Valo  */
46161b3fdb50SRajkumar Manoharan 
46171b3fdb50SRajkumar Manoharan #define WMI_VDEV_STATS_FTM_COUNT_VALID	BIT(31)
46181b3fdb50SRajkumar Manoharan #define WMI_VDEV_STATS_FTM_COUNT_LSB	0
46191b3fdb50SRajkumar Manoharan #define WMI_VDEV_STATS_FTM_COUNT_MASK	0x7fffffff
46201b3fdb50SRajkumar Manoharan 
46215e3dd157SKalle Valo struct wmi_vdev_stats {
46225e3dd157SKalle Valo 	__le32 vdev_id;
46235e3dd157SKalle Valo } __packed;
46245e3dd157SKalle Valo 
46251b3fdb50SRajkumar Manoharan struct wmi_vdev_stats_extd {
46261b3fdb50SRajkumar Manoharan 	__le32 vdev_id;
46271b3fdb50SRajkumar Manoharan 	__le32 ppdu_aggr_cnt;
46281b3fdb50SRajkumar Manoharan 	__le32 ppdu_noack;
46291b3fdb50SRajkumar Manoharan 	__le32 mpdu_queued;
46301b3fdb50SRajkumar Manoharan 	__le32 ppdu_nonaggr_cnt;
46311b3fdb50SRajkumar Manoharan 	__le32 mpdu_sw_requeued;
46321b3fdb50SRajkumar Manoharan 	__le32 mpdu_suc_retry;
46331b3fdb50SRajkumar Manoharan 	__le32 mpdu_suc_multitry;
46341b3fdb50SRajkumar Manoharan 	__le32 mpdu_fail_retry;
46351b3fdb50SRajkumar Manoharan 	__le32 tx_ftm_suc;
46361b3fdb50SRajkumar Manoharan 	__le32 tx_ftm_suc_retry;
46371b3fdb50SRajkumar Manoharan 	__le32 tx_ftm_fail;
46381b3fdb50SRajkumar Manoharan 	__le32 rx_ftmr_cnt;
46391b3fdb50SRajkumar Manoharan 	__le32 rx_ftmr_dup_cnt;
46401b3fdb50SRajkumar Manoharan 	__le32 rx_iftmr_cnt;
46411b3fdb50SRajkumar Manoharan 	__le32 rx_iftmr_dup_cnt;
46421b3fdb50SRajkumar Manoharan 	__le32 reserved[6];
46431b3fdb50SRajkumar Manoharan } __packed;
46441b3fdb50SRajkumar Manoharan 
46455e3dd157SKalle Valo /*
46465e3dd157SKalle Valo  * peer statistics.
46475e3dd157SKalle Valo  * TODO: add more stats
46485e3dd157SKalle Valo  */
4649d15fb520SMichal Kazior struct wmi_peer_stats {
46505e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
46515e3dd157SKalle Valo 	__le32 peer_rssi;
46525e3dd157SKalle Valo 	__le32 peer_tx_rate;
46535e3dd157SKalle Valo } __packed;
46545e3dd157SKalle Valo 
4655d15fb520SMichal Kazior struct wmi_10x_peer_stats {
4656d15fb520SMichal Kazior 	struct wmi_peer_stats old;
465723c3aae4SBen Greear 	__le32 peer_rx_rate;
465823c3aae4SBen Greear } __packed;
465923c3aae4SBen Greear 
466020de2229SMichal Kazior struct wmi_10_2_peer_stats {
466120de2229SMichal Kazior 	struct wmi_peer_stats old;
466220de2229SMichal Kazior 	__le32 peer_rx_rate;
466320de2229SMichal Kazior 	__le32 current_per;
466420de2229SMichal Kazior 	__le32 retries;
466520de2229SMichal Kazior 	__le32 tx_rate_count;
466620de2229SMichal Kazior 	__le32 max_4ms_frame_len;
466720de2229SMichal Kazior 	__le32 total_sub_frames;
466820de2229SMichal Kazior 	__le32 tx_bytes;
466920de2229SMichal Kazior 	__le32 num_pkt_loss_overflow[4];
467020de2229SMichal Kazior 	__le32 num_pkt_loss_excess_retry[4];
467120de2229SMichal Kazior } __packed;
467220de2229SMichal Kazior 
467320de2229SMichal Kazior struct wmi_10_2_4_peer_stats {
467420de2229SMichal Kazior 	struct wmi_10_2_peer_stats common;
4675774e656eSMohammed Shafi Shajakhan 	__le32 peer_rssi_changed;
467620de2229SMichal Kazior } __packed;
467720de2229SMichal Kazior 
4678de46c015SMohammed Shafi Shajakhan struct wmi_10_2_4_ext_peer_stats {
4679de46c015SMohammed Shafi Shajakhan 	struct wmi_10_2_peer_stats common;
4680de46c015SMohammed Shafi Shajakhan 	__le32 peer_rssi_changed;
4681de46c015SMohammed Shafi Shajakhan 	__le32 rx_duration;
4682de46c015SMohammed Shafi Shajakhan } __packed;
4683de46c015SMohammed Shafi Shajakhan 
468498dd2b92SManikanta Pubbisetty struct wmi_10_4_peer_stats {
468598dd2b92SManikanta Pubbisetty 	struct wmi_mac_addr peer_macaddr;
468698dd2b92SManikanta Pubbisetty 	__le32 peer_rssi;
468798dd2b92SManikanta Pubbisetty 	__le32 peer_rssi_seq_num;
468898dd2b92SManikanta Pubbisetty 	__le32 peer_tx_rate;
468998dd2b92SManikanta Pubbisetty 	__le32 peer_rx_rate;
469098dd2b92SManikanta Pubbisetty 	__le32 current_per;
469198dd2b92SManikanta Pubbisetty 	__le32 retries;
469298dd2b92SManikanta Pubbisetty 	__le32 tx_rate_count;
469398dd2b92SManikanta Pubbisetty 	__le32 max_4ms_frame_len;
469498dd2b92SManikanta Pubbisetty 	__le32 total_sub_frames;
469598dd2b92SManikanta Pubbisetty 	__le32 tx_bytes;
469698dd2b92SManikanta Pubbisetty 	__le32 num_pkt_loss_overflow[4];
469798dd2b92SManikanta Pubbisetty 	__le32 num_pkt_loss_excess_retry[4];
469898dd2b92SManikanta Pubbisetty 	__le32 peer_rssi_changed;
469998dd2b92SManikanta Pubbisetty } __packed;
470098dd2b92SManikanta Pubbisetty 
4701f9575793SMohammed Shafi Shajakhan struct wmi_10_4_peer_extd_stats {
4702f9575793SMohammed Shafi Shajakhan 	struct wmi_mac_addr peer_macaddr;
4703f9575793SMohammed Shafi Shajakhan 	__le32 inactive_time;
4704f9575793SMohammed Shafi Shajakhan 	__le32 peer_chain_rssi;
4705f9575793SMohammed Shafi Shajakhan 	__le32 rx_duration;
4706f9575793SMohammed Shafi Shajakhan 	__le32 reserved[10];
4707f9575793SMohammed Shafi Shajakhan } __packed;
4708f9575793SMohammed Shafi Shajakhan 
47094a49ae94SMohammed Shafi Shajakhan struct wmi_10_4_bss_bcn_stats {
47104a49ae94SMohammed Shafi Shajakhan 	__le32 vdev_id;
47114a49ae94SMohammed Shafi Shajakhan 	__le32 bss_bcns_dropped;
47124a49ae94SMohammed Shafi Shajakhan 	__le32 bss_bcn_delivered;
47134a49ae94SMohammed Shafi Shajakhan } __packed;
47144a49ae94SMohammed Shafi Shajakhan 
47154a49ae94SMohammed Shafi Shajakhan struct wmi_10_4_bss_bcn_filter_stats {
47164a49ae94SMohammed Shafi Shajakhan 	__le32 bcns_dropped;
47174a49ae94SMohammed Shafi Shajakhan 	__le32 bcns_delivered;
47184a49ae94SMohammed Shafi Shajakhan 	__le32 active_filters;
47194a49ae94SMohammed Shafi Shajakhan 	struct wmi_10_4_bss_bcn_stats bss_stats;
47204a49ae94SMohammed Shafi Shajakhan } __packed;
47214a49ae94SMohammed Shafi Shajakhan 
472220de2229SMichal Kazior struct wmi_10_2_pdev_ext_stats {
472320de2229SMichal Kazior 	__le32 rx_rssi_comb;
472420de2229SMichal Kazior 	__le32 rx_rssi[4];
472520de2229SMichal Kazior 	__le32 rx_mcs[10];
472620de2229SMichal Kazior 	__le32 tx_mcs[10];
472720de2229SMichal Kazior 	__le32 ack_rssi;
472820de2229SMichal Kazior } __packed;
472920de2229SMichal Kazior 
47305e3dd157SKalle Valo struct wmi_vdev_create_cmd {
47315e3dd157SKalle Valo 	__le32 vdev_id;
47325e3dd157SKalle Valo 	__le32 vdev_type;
47335e3dd157SKalle Valo 	__le32 vdev_subtype;
47345e3dd157SKalle Valo 	struct wmi_mac_addr vdev_macaddr;
47355e3dd157SKalle Valo } __packed;
47365e3dd157SKalle Valo 
47375e3dd157SKalle Valo enum wmi_vdev_type {
47385e3dd157SKalle Valo 	WMI_VDEV_TYPE_AP      = 1,
47395e3dd157SKalle Valo 	WMI_VDEV_TYPE_STA     = 2,
47405e3dd157SKalle Valo 	WMI_VDEV_TYPE_IBSS    = 3,
47415e3dd157SKalle Valo 	WMI_VDEV_TYPE_MONITOR = 4,
47425e3dd157SKalle Valo };
47435e3dd157SKalle Valo 
47445e3dd157SKalle Valo enum wmi_vdev_subtype {
47456e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_NONE,
47466e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_P2P_DEVICE,
47476e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_P2P_CLIENT,
47486e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_P2P_GO,
47496e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_PROXY_STA,
47506e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_MESH_11S,
47516e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_MESH_NON_11S,
47526e4de1a4SPeter Oh };
47536e4de1a4SPeter Oh 
47546e4de1a4SPeter Oh enum wmi_vdev_subtype_legacy {
47556e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_NONE      = 0,
47566e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV   = 1,
47576e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI   = 2,
47586e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_P2P_GO    = 3,
47596e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA = 4,
47606e4de1a4SPeter Oh };
47616e4de1a4SPeter Oh 
47626e4de1a4SPeter Oh enum wmi_vdev_subtype_10_2_4 {
47636e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_NONE      = 0,
47646e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV   = 1,
47656e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI   = 2,
47666e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_P2P_GO    = 3,
47676e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA = 4,
47686e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_MESH_11S  = 5,
47696e4de1a4SPeter Oh };
47706e4de1a4SPeter Oh 
47716e4de1a4SPeter Oh enum wmi_vdev_subtype_10_4 {
47726e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_NONE         = 0,
47736e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_P2P_DEV      = 1,
47746e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_P2P_CLI      = 2,
47756e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_P2P_GO       = 3,
47766e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_PROXY_STA    = 4,
47776e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S = 5,
47786e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_MESH_11S     = 6,
47795e3dd157SKalle Valo };
47805e3dd157SKalle Valo 
47815e3dd157SKalle Valo /* values for vdev_subtype */
47825e3dd157SKalle Valo 
47835e3dd157SKalle Valo /* values for vdev_start_request flags */
47845e3dd157SKalle Valo /*
47855e3dd157SKalle Valo  * Indicates that AP VDEV uses hidden ssid. only valid for
478637ff1b0dSMarcin Rokicki  *  AP/GO
478737ff1b0dSMarcin Rokicki  */
47885e3dd157SKalle Valo #define WMI_VDEV_START_HIDDEN_SSID  (1 << 0)
47895e3dd157SKalle Valo /*
47905e3dd157SKalle Valo  * Indicates if robust management frame/management frame
47915e3dd157SKalle Valo  *  protection is enabled. For GO/AP vdevs, it indicates that
47925e3dd157SKalle Valo  *  it may support station/client associations with RMF enabled.
47935e3dd157SKalle Valo  *  For STA/client vdevs, it indicates that sta will
479437ff1b0dSMarcin Rokicki  *  associate with AP with RMF enabled.
479537ff1b0dSMarcin Rokicki  */
47965e3dd157SKalle Valo #define WMI_VDEV_START_PMF_ENABLED  (1 << 1)
47975e3dd157SKalle Valo 
47985e3dd157SKalle Valo struct wmi_p2p_noa_descriptor {
47995e3dd157SKalle Valo 	__le32 type_count; /* 255: continuous schedule, 0: reserved */
48005e3dd157SKalle Valo 	__le32 duration;  /* Absent period duration in micro seconds */
48015e3dd157SKalle Valo 	__le32 interval;   /* Absent period interval in micro seconds */
48025e3dd157SKalle Valo 	__le32 start_time; /* 32 bit tsf time when in starts */
48035e3dd157SKalle Valo } __packed;
48045e3dd157SKalle Valo 
48055e3dd157SKalle Valo struct wmi_vdev_start_request_cmd {
48065e3dd157SKalle Valo 	/* WMI channel */
48075e3dd157SKalle Valo 	struct wmi_channel chan;
48085e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
48095e3dd157SKalle Valo 	__le32 vdev_id;
48105e3dd157SKalle Valo 	/* requestor id identifying the caller module */
48115e3dd157SKalle Valo 	__le32 requestor_id;
48125e3dd157SKalle Valo 	/* beacon interval from received beacon */
48135e3dd157SKalle Valo 	__le32 beacon_interval;
48145e3dd157SKalle Valo 	/* DTIM Period from the received beacon */
48155e3dd157SKalle Valo 	__le32 dtim_period;
48165e3dd157SKalle Valo 	/* Flags */
48175e3dd157SKalle Valo 	__le32 flags;
48185e3dd157SKalle Valo 	/* ssid field. Only valid for AP/GO/IBSS/BTAmp VDEV type. */
48195e3dd157SKalle Valo 	struct wmi_ssid ssid;
4820e13dbeadSJoe Perches 	/* beacon/probe response xmit rate. Applicable for SoftAP. */
48215e3dd157SKalle Valo 	__le32 bcn_tx_rate;
4822e13dbeadSJoe Perches 	/* beacon/probe response xmit power. Applicable for SoftAP. */
48235e3dd157SKalle Valo 	__le32 bcn_tx_power;
48245e3dd157SKalle Valo 	/* number of p2p NOA descriptor(s) from scan entry */
48255e3dd157SKalle Valo 	__le32 num_noa_descriptors;
48265e3dd157SKalle Valo 	/*
48275e3dd157SKalle Valo 	 * Disable H/W ack. This used by WMI_VDEV_RESTART_REQUEST_CMDID.
48285e3dd157SKalle Valo 	 * During CAC, Our HW shouldn't ack ditected frames
48295e3dd157SKalle Valo 	 */
48305e3dd157SKalle Valo 	__le32 disable_hw_ack;
48315e3dd157SKalle Valo 	/* actual p2p NOA descriptor from scan entry */
48325e3dd157SKalle Valo 	struct wmi_p2p_noa_descriptor noa_descriptors[2];
48335e3dd157SKalle Valo } __packed;
48345e3dd157SKalle Valo 
48355e3dd157SKalle Valo struct wmi_vdev_restart_request_cmd {
48365e3dd157SKalle Valo 	struct wmi_vdev_start_request_cmd vdev_start_request_cmd;
48375e3dd157SKalle Valo } __packed;
48385e3dd157SKalle Valo 
48395e3dd157SKalle Valo struct wmi_vdev_start_request_arg {
48405e3dd157SKalle Valo 	u32 vdev_id;
48415e3dd157SKalle Valo 	struct wmi_channel_arg channel;
48425e3dd157SKalle Valo 	u32 bcn_intval;
48435e3dd157SKalle Valo 	u32 dtim_period;
48445e3dd157SKalle Valo 	u8 *ssid;
48455e3dd157SKalle Valo 	u32 ssid_len;
48465e3dd157SKalle Valo 	u32 bcn_tx_rate;
48475e3dd157SKalle Valo 	u32 bcn_tx_power;
48485e3dd157SKalle Valo 	bool disable_hw_ack;
48495e3dd157SKalle Valo 	bool hidden_ssid;
48505e3dd157SKalle Valo 	bool pmf_enabled;
48515e3dd157SKalle Valo };
48525e3dd157SKalle Valo 
48535e3dd157SKalle Valo struct wmi_vdev_delete_cmd {
48545e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
48555e3dd157SKalle Valo 	__le32 vdev_id;
48565e3dd157SKalle Valo } __packed;
48575e3dd157SKalle Valo 
48585e3dd157SKalle Valo struct wmi_vdev_up_cmd {
48595e3dd157SKalle Valo 	__le32 vdev_id;
48605e3dd157SKalle Valo 	__le32 vdev_assoc_id;
48615e3dd157SKalle Valo 	struct wmi_mac_addr vdev_bssid;
48625e3dd157SKalle Valo } __packed;
48635e3dd157SKalle Valo 
48645e3dd157SKalle Valo struct wmi_vdev_stop_cmd {
48655e3dd157SKalle Valo 	__le32 vdev_id;
48665e3dd157SKalle Valo } __packed;
48675e3dd157SKalle Valo 
48685e3dd157SKalle Valo struct wmi_vdev_down_cmd {
48695e3dd157SKalle Valo 	__le32 vdev_id;
48705e3dd157SKalle Valo } __packed;
48715e3dd157SKalle Valo 
48725e3dd157SKalle Valo struct wmi_vdev_standby_response_cmd {
48735e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
48745e3dd157SKalle Valo 	__le32 vdev_id;
48755e3dd157SKalle Valo } __packed;
48765e3dd157SKalle Valo 
48775e3dd157SKalle Valo struct wmi_vdev_resume_response_cmd {
48785e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
48795e3dd157SKalle Valo 	__le32 vdev_id;
48805e3dd157SKalle Valo } __packed;
48815e3dd157SKalle Valo 
48825e3dd157SKalle Valo struct wmi_vdev_set_param_cmd {
48835e3dd157SKalle Valo 	__le32 vdev_id;
48845e3dd157SKalle Valo 	__le32 param_id;
48855e3dd157SKalle Valo 	__le32 param_value;
48865e3dd157SKalle Valo } __packed;
48875e3dd157SKalle Valo 
48885e3dd157SKalle Valo #define WMI_MAX_KEY_INDEX   3
48895e3dd157SKalle Valo #define WMI_MAX_KEY_LEN     32
48905e3dd157SKalle Valo 
48915e3dd157SKalle Valo #define WMI_KEY_PAIRWISE 0x00
48925e3dd157SKalle Valo #define WMI_KEY_GROUP    0x01
48935e3dd157SKalle Valo #define WMI_KEY_TX_USAGE 0x02 /* default tx key - static wep */
48945e3dd157SKalle Valo 
48955e3dd157SKalle Valo struct wmi_key_seq_counter {
48965e3dd157SKalle Valo 	__le32 key_seq_counter_l;
48975e3dd157SKalle Valo 	__le32 key_seq_counter_h;
48985e3dd157SKalle Valo } __packed;
48995e3dd157SKalle Valo 
49005e3dd157SKalle Valo #define WMI_CIPHER_NONE     0x0 /* clear key */
49015e3dd157SKalle Valo #define WMI_CIPHER_WEP      0x1
49025e3dd157SKalle Valo #define WMI_CIPHER_TKIP     0x2
49035e3dd157SKalle Valo #define WMI_CIPHER_AES_OCB  0x3
49045e3dd157SKalle Valo #define WMI_CIPHER_AES_CCM  0x4
49055e3dd157SKalle Valo #define WMI_CIPHER_WAPI     0x5
49065e3dd157SKalle Valo #define WMI_CIPHER_CKIP     0x6
49075e3dd157SKalle Valo #define WMI_CIPHER_AES_CMAC 0x7
49082ea9f12cSRajkumar Manoharan #define WMI_CIPHER_AES_GCM  0x8
49095e3dd157SKalle Valo 
49105e3dd157SKalle Valo struct wmi_vdev_install_key_cmd {
49115e3dd157SKalle Valo 	__le32 vdev_id;
49125e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
49135e3dd157SKalle Valo 	__le32 key_idx;
49145e3dd157SKalle Valo 	__le32 key_flags;
49155e3dd157SKalle Valo 	__le32 key_cipher; /* %WMI_CIPHER_ */
49165e3dd157SKalle Valo 	struct wmi_key_seq_counter key_rsc_counter;
49175e3dd157SKalle Valo 	struct wmi_key_seq_counter key_global_rsc_counter;
49185e3dd157SKalle Valo 	struct wmi_key_seq_counter key_tsc_counter;
49195e3dd157SKalle Valo 	u8 wpi_key_rsc_counter[16];
49205e3dd157SKalle Valo 	u8 wpi_key_tsc_counter[16];
49215e3dd157SKalle Valo 	__le32 key_len;
49225e3dd157SKalle Valo 	__le32 key_txmic_len;
49235e3dd157SKalle Valo 	__le32 key_rxmic_len;
49245e3dd157SKalle Valo 
49255e3dd157SKalle Valo 	/* contains key followed by tx mic followed by rx mic */
49265e3dd157SKalle Valo 	u8 key_data[0];
49275e3dd157SKalle Valo } __packed;
49285e3dd157SKalle Valo 
49295e3dd157SKalle Valo struct wmi_vdev_install_key_arg {
49305e3dd157SKalle Valo 	u32 vdev_id;
49315e3dd157SKalle Valo 	const u8 *macaddr;
49325e3dd157SKalle Valo 	u32 key_idx;
49335e3dd157SKalle Valo 	u32 key_flags;
49345e3dd157SKalle Valo 	u32 key_cipher;
49355e3dd157SKalle Valo 	u32 key_len;
49365e3dd157SKalle Valo 	u32 key_txmic_len;
49375e3dd157SKalle Valo 	u32 key_rxmic_len;
49385e3dd157SKalle Valo 	const void *key_data;
49395e3dd157SKalle Valo };
49405e3dd157SKalle Valo 
494151ab1a0aSJanusz Dziedzic /*
494251ab1a0aSJanusz Dziedzic  * vdev fixed rate format:
494351ab1a0aSJanusz Dziedzic  * - preamble - b7:b6 - see WMI_RATE_PREMABLE_
494451ab1a0aSJanusz Dziedzic  * - nss      - b5:b4 - ss number (0 mean 1ss)
494551ab1a0aSJanusz Dziedzic  * - rate_mcs - b3:b0 - as below
494651ab1a0aSJanusz Dziedzic  *    CCK:  0 - 11Mbps, 1 - 5,5Mbps, 2 - 2Mbps, 3 - 1Mbps,
494751ab1a0aSJanusz Dziedzic  *          4 - 11Mbps (s), 5 - 5,5Mbps (s), 6 - 2Mbps (s)
494851ab1a0aSJanusz Dziedzic  *    OFDM: 0 - 48Mbps, 1 - 24Mbps, 2 - 12Mbps, 3 - 6Mbps,
494951ab1a0aSJanusz Dziedzic  *          4 - 54Mbps, 5 - 36Mbps, 6 - 18Mbps, 7 - 9Mbps
495051ab1a0aSJanusz Dziedzic  *    HT/VHT: MCS index
495151ab1a0aSJanusz Dziedzic  */
495251ab1a0aSJanusz Dziedzic 
49535e3dd157SKalle Valo /* Preamble types to be used with VDEV fixed rate configuration */
49545e3dd157SKalle Valo enum wmi_rate_preamble {
49555e3dd157SKalle Valo 	WMI_RATE_PREAMBLE_OFDM,
49565e3dd157SKalle Valo 	WMI_RATE_PREAMBLE_CCK,
49575e3dd157SKalle Valo 	WMI_RATE_PREAMBLE_HT,
49585e3dd157SKalle Valo 	WMI_RATE_PREAMBLE_VHT,
49595e3dd157SKalle Valo };
49605e3dd157SKalle Valo 
496129542666SMaharaja Kennadyrajan #define ATH10K_HW_NSS(rate)		(1 + (((rate) >> 4) & 0x3))
496229542666SMaharaja Kennadyrajan #define ATH10K_HW_PREAMBLE(rate)	(((rate) >> 6) & 0x3)
4963cec17c38SAnilkumar Kolli #define ATH10K_HW_MCS_RATE(rate)	((rate) & 0xf)
4964cec17c38SAnilkumar Kolli #define ATH10K_HW_LEGACY_RATE(rate)	((rate) & 0x3f)
4965cec17c38SAnilkumar Kolli #define ATH10K_HW_BW(flags)		(((flags) >> 3) & 0x3)
4966cec17c38SAnilkumar Kolli #define ATH10K_HW_GI(flags)		(((flags) >> 5) & 0x1)
496729542666SMaharaja Kennadyrajan #define ATH10K_HW_RATECODE(rate, nss, preamble) \
496829542666SMaharaja Kennadyrajan 	(((preamble) << 6) | ((nss) << 4) | (rate))
4969a904417fSAnilkumar Kolli #define ATH10K_HW_AMPDU(flags)		((flags) & 0x1)
4970a904417fSAnilkumar Kolli #define ATH10K_HW_BA_FAIL(flags)	(((flags) >> 1) & 0x3)
497129542666SMaharaja Kennadyrajan 
4972a904417fSAnilkumar Kolli #define ATH10K_VHT_MCS_NUM	10
4973a904417fSAnilkumar Kolli #define ATH10K_BW_NUM		4
4974a904417fSAnilkumar Kolli #define ATH10K_NSS_NUM		4
4975a904417fSAnilkumar Kolli #define ATH10K_LEGACY_NUM	12
4976a904417fSAnilkumar Kolli #define ATH10K_GI_NUM		2
4977a904417fSAnilkumar Kolli #define ATH10K_HT_MCS_NUM	32
4978cec17c38SAnilkumar Kolli 
49795e3dd157SKalle Valo /* Value to disable fixed rate setting */
49805e3dd157SKalle Valo #define WMI_FIXED_RATE_NONE    (0xff)
49815e3dd157SKalle Valo 
49826d1506e7SBartosz Markowski struct wmi_vdev_param_map {
49836d1506e7SBartosz Markowski 	u32 rts_threshold;
49846d1506e7SBartosz Markowski 	u32 fragmentation_threshold;
49856d1506e7SBartosz Markowski 	u32 beacon_interval;
49866d1506e7SBartosz Markowski 	u32 listen_interval;
49876d1506e7SBartosz Markowski 	u32 multicast_rate;
49886d1506e7SBartosz Markowski 	u32 mgmt_tx_rate;
49896d1506e7SBartosz Markowski 	u32 slot_time;
49906d1506e7SBartosz Markowski 	u32 preamble;
49916d1506e7SBartosz Markowski 	u32 swba_time;
49926d1506e7SBartosz Markowski 	u32 wmi_vdev_stats_update_period;
49936d1506e7SBartosz Markowski 	u32 wmi_vdev_pwrsave_ageout_time;
49946d1506e7SBartosz Markowski 	u32 wmi_vdev_host_swba_interval;
49956d1506e7SBartosz Markowski 	u32 dtim_period;
49966d1506e7SBartosz Markowski 	u32 wmi_vdev_oc_scheduler_air_time_limit;
49976d1506e7SBartosz Markowski 	u32 wds;
49986d1506e7SBartosz Markowski 	u32 atim_window;
49996d1506e7SBartosz Markowski 	u32 bmiss_count_max;
50006d1506e7SBartosz Markowski 	u32 bmiss_first_bcnt;
50016d1506e7SBartosz Markowski 	u32 bmiss_final_bcnt;
50026d1506e7SBartosz Markowski 	u32 feature_wmm;
50036d1506e7SBartosz Markowski 	u32 chwidth;
50046d1506e7SBartosz Markowski 	u32 chextoffset;
50056d1506e7SBartosz Markowski 	u32 disable_htprotection;
50066d1506e7SBartosz Markowski 	u32 sta_quickkickout;
50076d1506e7SBartosz Markowski 	u32 mgmt_rate;
50086d1506e7SBartosz Markowski 	u32 protection_mode;
50096d1506e7SBartosz Markowski 	u32 fixed_rate;
50106d1506e7SBartosz Markowski 	u32 sgi;
50116d1506e7SBartosz Markowski 	u32 ldpc;
50126d1506e7SBartosz Markowski 	u32 tx_stbc;
50136d1506e7SBartosz Markowski 	u32 rx_stbc;
50146d1506e7SBartosz Markowski 	u32 intra_bss_fwd;
50156d1506e7SBartosz Markowski 	u32 def_keyid;
50166d1506e7SBartosz Markowski 	u32 nss;
50176d1506e7SBartosz Markowski 	u32 bcast_data_rate;
50186d1506e7SBartosz Markowski 	u32 mcast_data_rate;
50196d1506e7SBartosz Markowski 	u32 mcast_indicate;
50206d1506e7SBartosz Markowski 	u32 dhcp_indicate;
50216d1506e7SBartosz Markowski 	u32 unknown_dest_indicate;
50226d1506e7SBartosz Markowski 	u32 ap_keepalive_min_idle_inactive_time_secs;
50236d1506e7SBartosz Markowski 	u32 ap_keepalive_max_idle_inactive_time_secs;
50246d1506e7SBartosz Markowski 	u32 ap_keepalive_max_unresponsive_time_secs;
50256d1506e7SBartosz Markowski 	u32 ap_enable_nawds;
50266d1506e7SBartosz Markowski 	u32 mcast2ucast_set;
50276d1506e7SBartosz Markowski 	u32 enable_rtscts;
50286d1506e7SBartosz Markowski 	u32 txbf;
50296d1506e7SBartosz Markowski 	u32 packet_powersave;
50306d1506e7SBartosz Markowski 	u32 drop_unencry;
50316d1506e7SBartosz Markowski 	u32 tx_encap_type;
50326d1506e7SBartosz Markowski 	u32 ap_detect_out_of_sync_sleeping_sta_time_secs;
503393841a15SRaja Mani 	u32 rc_num_retries;
503493841a15SRaja Mani 	u32 cabq_maxdur;
503593841a15SRaja Mani 	u32 mfptest_set;
503693841a15SRaja Mani 	u32 rts_fixed_rate;
503793841a15SRaja Mani 	u32 vht_sgimask;
503893841a15SRaja Mani 	u32 vht80_ratemask;
503993841a15SRaja Mani 	u32 early_rx_adjust_enable;
504093841a15SRaja Mani 	u32 early_rx_tgt_bmiss_num;
504193841a15SRaja Mani 	u32 early_rx_bmiss_sample_cycle;
504293841a15SRaja Mani 	u32 early_rx_slop_step;
504393841a15SRaja Mani 	u32 early_rx_init_slop;
504493841a15SRaja Mani 	u32 early_rx_adjust_pause;
504593841a15SRaja Mani 	u32 proxy_sta;
504693841a15SRaja Mani 	u32 meru_vc;
504793841a15SRaja Mani 	u32 rx_decap_type;
504893841a15SRaja Mani 	u32 bw_nss_ratemask;
5049973324ffSPedersen, Thomas 	u32 inc_tsf;
5050973324ffSPedersen, Thomas 	u32 dec_tsf;
50516d1506e7SBartosz Markowski };
50526d1506e7SBartosz Markowski 
50536d1506e7SBartosz Markowski #define WMI_VDEV_PARAM_UNSUPPORTED 0
50546d1506e7SBartosz Markowski 
50555e3dd157SKalle Valo /* the definition of different VDEV parameters */
50565e3dd157SKalle Valo enum wmi_vdev_param {
50575e3dd157SKalle Valo 	/* RTS Threshold */
50585e3dd157SKalle Valo 	WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
50595e3dd157SKalle Valo 	/* Fragmentation threshold */
50605e3dd157SKalle Valo 	WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
50615e3dd157SKalle Valo 	/* beacon interval in TUs */
50625e3dd157SKalle Valo 	WMI_VDEV_PARAM_BEACON_INTERVAL,
50635e3dd157SKalle Valo 	/* Listen interval in TUs */
50645e3dd157SKalle Valo 	WMI_VDEV_PARAM_LISTEN_INTERVAL,
5065e13dbeadSJoe Perches 	/* multicast rate in Mbps */
50665e3dd157SKalle Valo 	WMI_VDEV_PARAM_MULTICAST_RATE,
50675e3dd157SKalle Valo 	/* management frame rate in Mbps */
50685e3dd157SKalle Valo 	WMI_VDEV_PARAM_MGMT_TX_RATE,
50695e3dd157SKalle Valo 	/* slot time (long vs short) */
50705e3dd157SKalle Valo 	WMI_VDEV_PARAM_SLOT_TIME,
50715e3dd157SKalle Valo 	/* preamble (long vs short) */
50725e3dd157SKalle Valo 	WMI_VDEV_PARAM_PREAMBLE,
50735e3dd157SKalle Valo 	/* SWBA time (time before tbtt in msec) */
50745e3dd157SKalle Valo 	WMI_VDEV_PARAM_SWBA_TIME,
50755e3dd157SKalle Valo 	/* time period for updating VDEV stats */
50765e3dd157SKalle Valo 	WMI_VDEV_STATS_UPDATE_PERIOD,
50775e3dd157SKalle Valo 	/* age out time in msec for frames queued for station in power save */
50785e3dd157SKalle Valo 	WMI_VDEV_PWRSAVE_AGEOUT_TIME,
50795e3dd157SKalle Valo 	/*
50805e3dd157SKalle Valo 	 * Host SWBA interval (time in msec before tbtt for SWBA event
50815e3dd157SKalle Valo 	 * generation).
50825e3dd157SKalle Valo 	 */
50835e3dd157SKalle Valo 	WMI_VDEV_HOST_SWBA_INTERVAL,
50845e3dd157SKalle Valo 	/* DTIM period (specified in units of num beacon intervals) */
50855e3dd157SKalle Valo 	WMI_VDEV_PARAM_DTIM_PERIOD,
50865e3dd157SKalle Valo 	/*
50875e3dd157SKalle Valo 	 * scheduler air time limit for this VDEV. used by off chan
50885e3dd157SKalle Valo 	 * scheduler.
50895e3dd157SKalle Valo 	 */
50905e3dd157SKalle Valo 	WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
50915e3dd157SKalle Valo 	/* enable/dsiable WDS for this VDEV  */
50925e3dd157SKalle Valo 	WMI_VDEV_PARAM_WDS,
50935e3dd157SKalle Valo 	/* ATIM Window */
50945e3dd157SKalle Valo 	WMI_VDEV_PARAM_ATIM_WINDOW,
50955e3dd157SKalle Valo 	/* BMISS max */
50965e3dd157SKalle Valo 	WMI_VDEV_PARAM_BMISS_COUNT_MAX,
50975e3dd157SKalle Valo 	/* BMISS first time */
50985e3dd157SKalle Valo 	WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
50995e3dd157SKalle Valo 	/* BMISS final time */
51005e3dd157SKalle Valo 	WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
51015e3dd157SKalle Valo 	/* WMM enables/disabled */
51025e3dd157SKalle Valo 	WMI_VDEV_PARAM_FEATURE_WMM,
51035e3dd157SKalle Valo 	/* Channel width */
51045e3dd157SKalle Valo 	WMI_VDEV_PARAM_CHWIDTH,
51055e3dd157SKalle Valo 	/* Channel Offset */
51065e3dd157SKalle Valo 	WMI_VDEV_PARAM_CHEXTOFFSET,
51075e3dd157SKalle Valo 	/* Disable HT Protection */
51085e3dd157SKalle Valo 	WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
51095e3dd157SKalle Valo 	/* Quick STA Kickout */
51105e3dd157SKalle Valo 	WMI_VDEV_PARAM_STA_QUICKKICKOUT,
51115e3dd157SKalle Valo 	/* Rate to be used with Management frames */
51125e3dd157SKalle Valo 	WMI_VDEV_PARAM_MGMT_RATE,
51135e3dd157SKalle Valo 	/* Protection Mode */
51145e3dd157SKalle Valo 	WMI_VDEV_PARAM_PROTECTION_MODE,
51155e3dd157SKalle Valo 	/* Fixed rate setting */
51165e3dd157SKalle Valo 	WMI_VDEV_PARAM_FIXED_RATE,
51175e3dd157SKalle Valo 	/* Short GI Enable/Disable */
51185e3dd157SKalle Valo 	WMI_VDEV_PARAM_SGI,
51195e3dd157SKalle Valo 	/* Enable LDPC */
51205e3dd157SKalle Valo 	WMI_VDEV_PARAM_LDPC,
51215e3dd157SKalle Valo 	/* Enable Tx STBC */
51225e3dd157SKalle Valo 	WMI_VDEV_PARAM_TX_STBC,
51235e3dd157SKalle Valo 	/* Enable Rx STBC */
51245e3dd157SKalle Valo 	WMI_VDEV_PARAM_RX_STBC,
51255e3dd157SKalle Valo 	/* Intra BSS forwarding  */
51265e3dd157SKalle Valo 	WMI_VDEV_PARAM_INTRA_BSS_FWD,
51275e3dd157SKalle Valo 	/* Setting Default xmit key for Vdev */
51285e3dd157SKalle Valo 	WMI_VDEV_PARAM_DEF_KEYID,
51295e3dd157SKalle Valo 	/* NSS width */
51305e3dd157SKalle Valo 	WMI_VDEV_PARAM_NSS,
51315e3dd157SKalle Valo 	/* Set the custom rate for the broadcast data frames */
51325e3dd157SKalle Valo 	WMI_VDEV_PARAM_BCAST_DATA_RATE,
51335e3dd157SKalle Valo 	/* Set the custom rate (rate-code) for multicast data frames */
51345e3dd157SKalle Valo 	WMI_VDEV_PARAM_MCAST_DATA_RATE,
51355e3dd157SKalle Valo 	/* Tx multicast packet indicate Enable/Disable */
51365e3dd157SKalle Valo 	WMI_VDEV_PARAM_MCAST_INDICATE,
51375e3dd157SKalle Valo 	/* Tx DHCP packet indicate Enable/Disable */
51385e3dd157SKalle Valo 	WMI_VDEV_PARAM_DHCP_INDICATE,
51395e3dd157SKalle Valo 	/* Enable host inspection of Tx unicast packet to unknown destination */
51405e3dd157SKalle Valo 	WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
51415e3dd157SKalle Valo 
51425e3dd157SKalle Valo 	/* The minimum amount of time AP begins to consider STA inactive */
51435e3dd157SKalle Valo 	WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
51445e3dd157SKalle Valo 
51455e3dd157SKalle Valo 	/*
51465e3dd157SKalle Valo 	 * An associated STA is considered inactive when there is no recent
51475e3dd157SKalle Valo 	 * TX/RX activity and no downlink frames are buffered for it. Once a
51485e3dd157SKalle Valo 	 * STA exceeds the maximum idle inactive time, the AP will send an
51495e3dd157SKalle Valo 	 * 802.11 data-null as a keep alive to verify the STA is still
51505e3dd157SKalle Valo 	 * associated. If the STA does ACK the data-null, or if the data-null
51515e3dd157SKalle Valo 	 * is buffered and the STA does not retrieve it, the STA will be
51525e3dd157SKalle Valo 	 * considered unresponsive
51535e3dd157SKalle Valo 	 * (see WMI_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS).
51545e3dd157SKalle Valo 	 */
51555e3dd157SKalle Valo 	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
51565e3dd157SKalle Valo 
51575e3dd157SKalle Valo 	/*
51585e3dd157SKalle Valo 	 * An associated STA is considered unresponsive if there is no recent
51595e3dd157SKalle Valo 	 * TX/RX activity and downlink frames are buffered for it. Once a STA
51605e3dd157SKalle Valo 	 * exceeds the maximum unresponsive time, the AP will send a
516137ff1b0dSMarcin Rokicki 	 * WMI_STA_KICKOUT event to the host so the STA can be deleted.
516237ff1b0dSMarcin Rokicki 	 */
51635e3dd157SKalle Valo 	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
51645e3dd157SKalle Valo 
51655e3dd157SKalle Valo 	/* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */
51665e3dd157SKalle Valo 	WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
51675e3dd157SKalle Valo 	/* Enable/Disable RTS-CTS */
51685e3dd157SKalle Valo 	WMI_VDEV_PARAM_ENABLE_RTSCTS,
51695e3dd157SKalle Valo 	/* Enable TXBFee/er */
51705e3dd157SKalle Valo 	WMI_VDEV_PARAM_TXBF,
51715e3dd157SKalle Valo 
51725e3dd157SKalle Valo 	/* Set packet power save */
51735e3dd157SKalle Valo 	WMI_VDEV_PARAM_PACKET_POWERSAVE,
51745e3dd157SKalle Valo 
51755e3dd157SKalle Valo 	/*
51765e3dd157SKalle Valo 	 * Drops un-encrypted packets if eceived in an encrypted connection
51775e3dd157SKalle Valo 	 * otherwise forwards to host.
51785e3dd157SKalle Valo 	 */
51795e3dd157SKalle Valo 	WMI_VDEV_PARAM_DROP_UNENCRY,
51805e3dd157SKalle Valo 
51815e3dd157SKalle Valo 	/*
51825e3dd157SKalle Valo 	 * Set the encapsulation type for frames.
51835e3dd157SKalle Valo 	 */
51845e3dd157SKalle Valo 	WMI_VDEV_PARAM_TX_ENCAP_TYPE,
51855e3dd157SKalle Valo };
51865e3dd157SKalle Valo 
51876d1506e7SBartosz Markowski /* the definition of different VDEV parameters */
51886d1506e7SBartosz Markowski enum wmi_10x_vdev_param {
51896d1506e7SBartosz Markowski 	/* RTS Threshold */
51906d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1,
51916d1506e7SBartosz Markowski 	/* Fragmentation threshold */
51926d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
51936d1506e7SBartosz Markowski 	/* beacon interval in TUs */
51946d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
51956d1506e7SBartosz Markowski 	/* Listen interval in TUs */
51966d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
5197e13dbeadSJoe Perches 	/* multicast rate in Mbps */
51986d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MULTICAST_RATE,
51996d1506e7SBartosz Markowski 	/* management frame rate in Mbps */
52006d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
52016d1506e7SBartosz Markowski 	/* slot time (long vs short) */
52026d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_SLOT_TIME,
52036d1506e7SBartosz Markowski 	/* preamble (long vs short) */
52046d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_PREAMBLE,
52056d1506e7SBartosz Markowski 	/* SWBA time (time before tbtt in msec) */
52066d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_SWBA_TIME,
52076d1506e7SBartosz Markowski 	/* time period for updating VDEV stats */
52086d1506e7SBartosz Markowski 	WMI_10X_VDEV_STATS_UPDATE_PERIOD,
52096d1506e7SBartosz Markowski 	/* age out time in msec for frames queued for station in power save */
52106d1506e7SBartosz Markowski 	WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
52116d1506e7SBartosz Markowski 	/*
52126d1506e7SBartosz Markowski 	 * Host SWBA interval (time in msec before tbtt for SWBA event
52136d1506e7SBartosz Markowski 	 * generation).
52146d1506e7SBartosz Markowski 	 */
52156d1506e7SBartosz Markowski 	WMI_10X_VDEV_HOST_SWBA_INTERVAL,
52166d1506e7SBartosz Markowski 	/* DTIM period (specified in units of num beacon intervals) */
52176d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_DTIM_PERIOD,
52186d1506e7SBartosz Markowski 	/*
52196d1506e7SBartosz Markowski 	 * scheduler air time limit for this VDEV. used by off chan
52206d1506e7SBartosz Markowski 	 * scheduler.
52216d1506e7SBartosz Markowski 	 */
52226d1506e7SBartosz Markowski 	WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
52236d1506e7SBartosz Markowski 	/* enable/dsiable WDS for this VDEV  */
52246d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_WDS,
52256d1506e7SBartosz Markowski 	/* ATIM Window */
52266d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_ATIM_WINDOW,
52276d1506e7SBartosz Markowski 	/* BMISS max */
52286d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
52296d1506e7SBartosz Markowski 	/* WMM enables/disabled */
52306d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_FEATURE_WMM,
52316d1506e7SBartosz Markowski 	/* Channel width */
52326d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_CHWIDTH,
52336d1506e7SBartosz Markowski 	/* Channel Offset */
52346d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_CHEXTOFFSET,
52356d1506e7SBartosz Markowski 	/* Disable HT Protection */
52366d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
52376d1506e7SBartosz Markowski 	/* Quick STA Kickout */
52386d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
52396d1506e7SBartosz Markowski 	/* Rate to be used with Management frames */
52406d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MGMT_RATE,
52416d1506e7SBartosz Markowski 	/* Protection Mode */
52426d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_PROTECTION_MODE,
52436d1506e7SBartosz Markowski 	/* Fixed rate setting */
52446d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_FIXED_RATE,
52456d1506e7SBartosz Markowski 	/* Short GI Enable/Disable */
52466d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_SGI,
52476d1506e7SBartosz Markowski 	/* Enable LDPC */
52486d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_LDPC,
52496d1506e7SBartosz Markowski 	/* Enable Tx STBC */
52506d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_TX_STBC,
52516d1506e7SBartosz Markowski 	/* Enable Rx STBC */
52526d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_RX_STBC,
52536d1506e7SBartosz Markowski 	/* Intra BSS forwarding  */
52546d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
52556d1506e7SBartosz Markowski 	/* Setting Default xmit key for Vdev */
52566d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_DEF_KEYID,
52576d1506e7SBartosz Markowski 	/* NSS width */
52586d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_NSS,
52596d1506e7SBartosz Markowski 	/* Set the custom rate for the broadcast data frames */
52606d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
52616d1506e7SBartosz Markowski 	/* Set the custom rate (rate-code) for multicast data frames */
52626d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
52636d1506e7SBartosz Markowski 	/* Tx multicast packet indicate Enable/Disable */
52646d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MCAST_INDICATE,
52656d1506e7SBartosz Markowski 	/* Tx DHCP packet indicate Enable/Disable */
52666d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_DHCP_INDICATE,
52676d1506e7SBartosz Markowski 	/* Enable host inspection of Tx unicast packet to unknown destination */
52686d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
52696d1506e7SBartosz Markowski 
52706d1506e7SBartosz Markowski 	/* The minimum amount of time AP begins to consider STA inactive */
52716d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
52726d1506e7SBartosz Markowski 
52736d1506e7SBartosz Markowski 	/*
52746d1506e7SBartosz Markowski 	 * An associated STA is considered inactive when there is no recent
52756d1506e7SBartosz Markowski 	 * TX/RX activity and no downlink frames are buffered for it. Once a
52766d1506e7SBartosz Markowski 	 * STA exceeds the maximum idle inactive time, the AP will send an
52776d1506e7SBartosz Markowski 	 * 802.11 data-null as a keep alive to verify the STA is still
52786d1506e7SBartosz Markowski 	 * associated. If the STA does ACK the data-null, or if the data-null
52796d1506e7SBartosz Markowski 	 * is buffered and the STA does not retrieve it, the STA will be
52806d1506e7SBartosz Markowski 	 * considered unresponsive
52816d1506e7SBartosz Markowski 	 * (see WMI_10X_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS).
52826d1506e7SBartosz Markowski 	 */
52836d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
52846d1506e7SBartosz Markowski 
52856d1506e7SBartosz Markowski 	/*
52866d1506e7SBartosz Markowski 	 * An associated STA is considered unresponsive if there is no recent
52876d1506e7SBartosz Markowski 	 * TX/RX activity and downlink frames are buffered for it. Once a STA
52886d1506e7SBartosz Markowski 	 * exceeds the maximum unresponsive time, the AP will send a
528937ff1b0dSMarcin Rokicki 	 * WMI_10X_STA_KICKOUT event to the host so the STA can be deleted.
529037ff1b0dSMarcin Rokicki 	 */
52916d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
52926d1506e7SBartosz Markowski 
52936d1506e7SBartosz Markowski 	/* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */
52946d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
52956d1506e7SBartosz Markowski 
52966d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
52976d1506e7SBartosz Markowski 	/* Enable/Disable RTS-CTS */
52986d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
52996d1506e7SBartosz Markowski 
53006d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
530124c88f78SMichal Kazior 
530224c88f78SMichal Kazior 	/* following are available as of firmware 10.2 */
530324c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE,
530424c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_CABQ_MAXDUR,
530524c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_MFPTEST_SET,
530624c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_RTS_FIXED_RATE,
530724c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_VHT_SGIMASK,
530824c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_VHT80_RATEMASK,
53099f0b7e7dSPeter Oh 	WMI_10X_VDEV_PARAM_TSF_INCREMENT,
53106d1506e7SBartosz Markowski };
53116d1506e7SBartosz Markowski 
531293841a15SRaja Mani enum wmi_10_4_vdev_param {
531393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1,
531493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
531593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
531693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
531793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
531893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
531993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_SLOT_TIME,
532093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_PREAMBLE,
532193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_SWBA_TIME,
532293841a15SRaja Mani 	WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
532393841a15SRaja Mani 	WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
532493841a15SRaja Mani 	WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
532593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
532693841a15SRaja Mani 	WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
532793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_WDS,
532893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
532993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
533093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
533193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
533293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_FEATURE_WMM,
533393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_CHWIDTH,
533493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
533593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
533693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
533793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MGMT_RATE,
533893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
533993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_FIXED_RATE,
534093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_SGI,
534193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_LDPC,
534293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_TX_STBC,
534393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RX_STBC,
534493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
534593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DEF_KEYID,
534693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_NSS,
534793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
534893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
534993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
535093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
535193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
535293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
535393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
535493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
535593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
535693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
535793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
535893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
535993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_TXBF,
536093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
536193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
536293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
536393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
536493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
536593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MFPTEST_SET,
536693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
536793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
536893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
536993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
537093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
537193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
537293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
537393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
537493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
537593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_PROXY_STA,
537693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MERU_VC,
537793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
537893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
53794857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_SENSOR_AP,
53804857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_BEACON_RATE,
53814857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_DTIM_ENABLE_CTS,
53824857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_STA_KICKOUT,
53834857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_CAPABILITIES,
53844857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
5385973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_RX_FILTER,
5386973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_MGMT_TX_POWER,
5387973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
5388973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_DISABLE_DYN_BW_RTS,
5389973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
539093841a15SRaja Mani };
539193841a15SRaja Mani 
5392139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
5393139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
5394139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
5395139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
5396139e170dSMichal Kazior 
5397a48e2cc8SVivek Natarajan #define WMI_TXBF_STS_CAP_OFFSET_LSB	4
53988cec57f5SBen Greear #define WMI_TXBF_STS_CAP_OFFSET_MASK	0x70
53998cec57f5SBen Greear #define WMI_TXBF_CONF_IMPLICIT_BF       BIT(7)
5400a48e2cc8SVivek Natarajan #define WMI_BF_SOUND_DIM_OFFSET_LSB	8
5401a48e2cc8SVivek Natarajan #define WMI_BF_SOUND_DIM_OFFSET_MASK	0xf00
5402a48e2cc8SVivek Natarajan 
54035e3dd157SKalle Valo /* slot time long */
54045e3dd157SKalle Valo #define WMI_VDEV_SLOT_TIME_LONG		0x1
54055e3dd157SKalle Valo /* slot time short */
54065e3dd157SKalle Valo #define WMI_VDEV_SLOT_TIME_SHORT	0x2
54075e3dd157SKalle Valo /* preablbe long */
54085e3dd157SKalle Valo #define WMI_VDEV_PREAMBLE_LONG		0x1
54095e3dd157SKalle Valo /* preablbe short */
54105e3dd157SKalle Valo #define WMI_VDEV_PREAMBLE_SHORT		0x2
54115e3dd157SKalle Valo 
54125e3dd157SKalle Valo enum wmi_start_event_param {
54135e3dd157SKalle Valo 	WMI_VDEV_RESP_START_EVENT = 0,
54145e3dd157SKalle Valo 	WMI_VDEV_RESP_RESTART_EVENT,
54155e3dd157SKalle Valo };
54165e3dd157SKalle Valo 
54175e3dd157SKalle Valo struct wmi_vdev_start_response_event {
54185e3dd157SKalle Valo 	__le32 vdev_id;
54195e3dd157SKalle Valo 	__le32 req_id;
54205e3dd157SKalle Valo 	__le32 resp_type; /* %WMI_VDEV_RESP_ */
54215e3dd157SKalle Valo 	__le32 status;
54225e3dd157SKalle Valo } __packed;
54235e3dd157SKalle Valo 
54245e3dd157SKalle Valo struct wmi_vdev_standby_req_event {
54255e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
54265e3dd157SKalle Valo 	__le32 vdev_id;
54275e3dd157SKalle Valo } __packed;
54285e3dd157SKalle Valo 
54295e3dd157SKalle Valo struct wmi_vdev_resume_req_event {
54305e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
54315e3dd157SKalle Valo 	__le32 vdev_id;
54325e3dd157SKalle Valo } __packed;
54335e3dd157SKalle Valo 
54345e3dd157SKalle Valo struct wmi_vdev_stopped_event {
54355e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
54365e3dd157SKalle Valo 	__le32 vdev_id;
54375e3dd157SKalle Valo } __packed;
54385e3dd157SKalle Valo 
54395e3dd157SKalle Valo /*
54405e3dd157SKalle Valo  * common structure used for simple events
54415e3dd157SKalle Valo  * (stopped, resume_req, standby response)
54425e3dd157SKalle Valo  */
54435e3dd157SKalle Valo struct wmi_vdev_simple_event {
54445e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
54455e3dd157SKalle Valo 	__le32 vdev_id;
54465e3dd157SKalle Valo } __packed;
54475e3dd157SKalle Valo 
54485e3dd157SKalle Valo /* VDEV start response status codes */
5449e13dbeadSJoe Perches /* VDEV successfully started */
54505e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS	0x0
54515e3dd157SKalle Valo 
54525e3dd157SKalle Valo /* requested VDEV not found */
54535e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID	0x1
54545e3dd157SKalle Valo 
54555e3dd157SKalle Valo /* unsupported VDEV combination */
54565e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED	0x2
54575e3dd157SKalle Valo 
5458855aed12SSimon Wunderlich /* TODO: please add more comments if you have in-depth information */
5459855aed12SSimon Wunderlich struct wmi_vdev_spectral_conf_cmd {
5460855aed12SSimon Wunderlich 	__le32 vdev_id;
5461855aed12SSimon Wunderlich 
5462855aed12SSimon Wunderlich 	/* number of fft samples to send (0 for infinite) */
5463855aed12SSimon Wunderlich 	__le32 scan_count;
5464855aed12SSimon Wunderlich 	__le32 scan_period;
5465855aed12SSimon Wunderlich 	__le32 scan_priority;
5466855aed12SSimon Wunderlich 
5467855aed12SSimon Wunderlich 	/* number of bins in the FFT: 2^(fft_size - bin_scale) */
5468855aed12SSimon Wunderlich 	__le32 scan_fft_size;
5469855aed12SSimon Wunderlich 	__le32 scan_gc_ena;
5470855aed12SSimon Wunderlich 	__le32 scan_restart_ena;
5471855aed12SSimon Wunderlich 	__le32 scan_noise_floor_ref;
5472855aed12SSimon Wunderlich 	__le32 scan_init_delay;
5473855aed12SSimon Wunderlich 	__le32 scan_nb_tone_thr;
5474855aed12SSimon Wunderlich 	__le32 scan_str_bin_thr;
5475855aed12SSimon Wunderlich 	__le32 scan_wb_rpt_mode;
5476855aed12SSimon Wunderlich 	__le32 scan_rssi_rpt_mode;
5477855aed12SSimon Wunderlich 	__le32 scan_rssi_thr;
5478855aed12SSimon Wunderlich 	__le32 scan_pwr_format;
5479855aed12SSimon Wunderlich 
5480855aed12SSimon Wunderlich 	/* rpt_mode: Format of FFT report to software for spectral scan
5481855aed12SSimon Wunderlich 	 * triggered FFTs:
5482855aed12SSimon Wunderlich 	 *	0: No FFT report (only spectral scan summary report)
5483855aed12SSimon Wunderlich 	 *	1: 2-dword summary of metrics for each completed FFT + spectral
5484855aed12SSimon Wunderlich 	 *	   scan	summary report
5485855aed12SSimon Wunderlich 	 *	2: 2-dword summary of metrics for each completed FFT +
5486855aed12SSimon Wunderlich 	 *	   1x- oversampled bins(in-band) per FFT + spectral scan summary
5487855aed12SSimon Wunderlich 	 *	   report
5488855aed12SSimon Wunderlich 	 *	3: 2-dword summary of metrics for each completed FFT +
5489855aed12SSimon Wunderlich 	 *	   2x- oversampled bins	(all) per FFT + spectral scan summary
5490855aed12SSimon Wunderlich 	 */
5491855aed12SSimon Wunderlich 	__le32 scan_rpt_mode;
5492855aed12SSimon Wunderlich 	__le32 scan_bin_scale;
5493855aed12SSimon Wunderlich 	__le32 scan_dbm_adj;
5494855aed12SSimon Wunderlich 	__le32 scan_chn_mask;
5495855aed12SSimon Wunderlich } __packed;
5496855aed12SSimon Wunderlich 
5497855aed12SSimon Wunderlich struct wmi_vdev_spectral_conf_arg {
5498855aed12SSimon Wunderlich 	u32 vdev_id;
5499855aed12SSimon Wunderlich 	u32 scan_count;
5500855aed12SSimon Wunderlich 	u32 scan_period;
5501855aed12SSimon Wunderlich 	u32 scan_priority;
5502855aed12SSimon Wunderlich 	u32 scan_fft_size;
5503855aed12SSimon Wunderlich 	u32 scan_gc_ena;
5504855aed12SSimon Wunderlich 	u32 scan_restart_ena;
5505855aed12SSimon Wunderlich 	u32 scan_noise_floor_ref;
5506855aed12SSimon Wunderlich 	u32 scan_init_delay;
5507855aed12SSimon Wunderlich 	u32 scan_nb_tone_thr;
5508855aed12SSimon Wunderlich 	u32 scan_str_bin_thr;
5509855aed12SSimon Wunderlich 	u32 scan_wb_rpt_mode;
5510855aed12SSimon Wunderlich 	u32 scan_rssi_rpt_mode;
5511855aed12SSimon Wunderlich 	u32 scan_rssi_thr;
5512855aed12SSimon Wunderlich 	u32 scan_pwr_format;
5513855aed12SSimon Wunderlich 	u32 scan_rpt_mode;
5514855aed12SSimon Wunderlich 	u32 scan_bin_scale;
5515855aed12SSimon Wunderlich 	u32 scan_dbm_adj;
5516855aed12SSimon Wunderlich 	u32 scan_chn_mask;
5517855aed12SSimon Wunderlich };
5518855aed12SSimon Wunderlich 
5519855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_DEFAULT              0
5520855aed12SSimon Wunderlich #define WMI_SPECTRAL_COUNT_DEFAULT               0
5521855aed12SSimon Wunderlich #define WMI_SPECTRAL_PERIOD_DEFAULT             35
5522855aed12SSimon Wunderlich #define WMI_SPECTRAL_PRIORITY_DEFAULT            1
5523855aed12SSimon Wunderlich #define WMI_SPECTRAL_FFT_SIZE_DEFAULT            7
5524855aed12SSimon Wunderlich #define WMI_SPECTRAL_GC_ENA_DEFAULT              1
5525855aed12SSimon Wunderlich #define WMI_SPECTRAL_RESTART_ENA_DEFAULT         0
5526855aed12SSimon Wunderlich #define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT   -96
5527855aed12SSimon Wunderlich #define WMI_SPECTRAL_INIT_DELAY_DEFAULT         80
5528855aed12SSimon Wunderlich #define WMI_SPECTRAL_NB_TONE_THR_DEFAULT        12
5529855aed12SSimon Wunderlich #define WMI_SPECTRAL_STR_BIN_THR_DEFAULT         8
5530855aed12SSimon Wunderlich #define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT         0
5531855aed12SSimon Wunderlich #define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT       0
5532855aed12SSimon Wunderlich #define WMI_SPECTRAL_RSSI_THR_DEFAULT         0xf0
5533855aed12SSimon Wunderlich #define WMI_SPECTRAL_PWR_FORMAT_DEFAULT          0
5534855aed12SSimon Wunderlich #define WMI_SPECTRAL_RPT_MODE_DEFAULT            2
5535855aed12SSimon Wunderlich #define WMI_SPECTRAL_BIN_SCALE_DEFAULT           1
5536855aed12SSimon Wunderlich #define WMI_SPECTRAL_DBM_ADJ_DEFAULT             1
5537855aed12SSimon Wunderlich #define WMI_SPECTRAL_CHN_MASK_DEFAULT            1
5538855aed12SSimon Wunderlich 
5539855aed12SSimon Wunderlich struct wmi_vdev_spectral_enable_cmd {
5540855aed12SSimon Wunderlich 	__le32 vdev_id;
5541855aed12SSimon Wunderlich 	__le32 trigger_cmd;
5542855aed12SSimon Wunderlich 	__le32 enable_cmd;
5543855aed12SSimon Wunderlich } __packed;
5544855aed12SSimon Wunderlich 
5545855aed12SSimon Wunderlich #define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER  1
5546855aed12SSimon Wunderlich #define WMI_SPECTRAL_TRIGGER_CMD_CLEAR    2
5547855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_CMD_ENABLE    1
5548855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_CMD_DISABLE   2
5549855aed12SSimon Wunderlich 
55505e3dd157SKalle Valo /* Beacon processing related command and event structures */
55515e3dd157SKalle Valo struct wmi_bcn_tx_hdr {
55525e3dd157SKalle Valo 	__le32 vdev_id;
55535e3dd157SKalle Valo 	__le32 tx_rate;
55545e3dd157SKalle Valo 	__le32 tx_power;
55555e3dd157SKalle Valo 	__le32 bcn_len;
55565e3dd157SKalle Valo } __packed;
55575e3dd157SKalle Valo 
55585e3dd157SKalle Valo struct wmi_bcn_tx_cmd {
55595e3dd157SKalle Valo 	struct wmi_bcn_tx_hdr hdr;
55605e3dd157SKalle Valo 	u8 *bcn[0];
55615e3dd157SKalle Valo } __packed;
55625e3dd157SKalle Valo 
55635e3dd157SKalle Valo struct wmi_bcn_tx_arg {
55645e3dd157SKalle Valo 	u32 vdev_id;
55655e3dd157SKalle Valo 	u32 tx_rate;
55665e3dd157SKalle Valo 	u32 tx_power;
55675e3dd157SKalle Valo 	u32 bcn_len;
55685e3dd157SKalle Valo 	const void *bcn;
55695e3dd157SKalle Valo };
55705e3dd157SKalle Valo 
5571748afc47SMichal Kazior enum wmi_bcn_tx_ref_flags {
5572748afc47SMichal Kazior 	WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1,
5573748afc47SMichal Kazior 	WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2,
5574748afc47SMichal Kazior };
5575748afc47SMichal Kazior 
557624c88f78SMichal Kazior /* TODO: It is unclear why "no antenna" works while any other seemingly valid
557724c88f78SMichal Kazior  * chainmask yields no beacons on the air at all.
557824c88f78SMichal Kazior  */
557924c88f78SMichal Kazior #define WMI_BCN_TX_REF_DEF_ANTENNA 0
558024c88f78SMichal Kazior 
5581748afc47SMichal Kazior struct wmi_bcn_tx_ref_cmd {
5582748afc47SMichal Kazior 	__le32 vdev_id;
5583748afc47SMichal Kazior 	__le32 data_len;
5584748afc47SMichal Kazior 	/* physical address of the frame - dma pointer */
5585748afc47SMichal Kazior 	__le32 data_ptr;
5586748afc47SMichal Kazior 	/* id for host to track */
5587748afc47SMichal Kazior 	__le32 msdu_id;
5588748afc47SMichal Kazior 	/* frame ctrl to setup PPDU desc */
5589748afc47SMichal Kazior 	__le32 frame_control;
5590748afc47SMichal Kazior 	/* to control CABQ traffic: WMI_BCN_TX_REF_FLAG_ */
5591748afc47SMichal Kazior 	__le32 flags;
559224c88f78SMichal Kazior 	/* introduced in 10.2 */
559324c88f78SMichal Kazior 	__le32 antenna_mask;
5594748afc47SMichal Kazior } __packed;
5595748afc47SMichal Kazior 
55965e3dd157SKalle Valo /* Beacon filter */
55975e3dd157SKalle Valo #define WMI_BCN_FILTER_ALL   0 /* Filter all beacons */
55985e3dd157SKalle Valo #define WMI_BCN_FILTER_NONE  1 /* Pass all beacons */
55995e3dd157SKalle Valo #define WMI_BCN_FILTER_RSSI  2 /* Pass Beacons RSSI >= RSSI threshold */
56005e3dd157SKalle Valo #define WMI_BCN_FILTER_BSSID 3 /* Pass Beacons with matching BSSID */
56015e3dd157SKalle Valo #define WMI_BCN_FILTER_SSID  4 /* Pass Beacons with matching SSID */
56025e3dd157SKalle Valo 
56035e3dd157SKalle Valo struct wmi_bcn_filter_rx_cmd {
56045e3dd157SKalle Valo 	/* Filter ID */
56055e3dd157SKalle Valo 	__le32 bcn_filter_id;
56065e3dd157SKalle Valo 	/* Filter type - wmi_bcn_filter */
56075e3dd157SKalle Valo 	__le32 bcn_filter;
56085e3dd157SKalle Valo 	/* Buffer len */
56095e3dd157SKalle Valo 	__le32 bcn_filter_len;
56105e3dd157SKalle Valo 	/* Filter info (threshold, BSSID, RSSI) */
56115e3dd157SKalle Valo 	u8 *bcn_filter_buf;
56125e3dd157SKalle Valo } __packed;
56135e3dd157SKalle Valo 
56145e3dd157SKalle Valo /* Capabilities and IEs to be passed to firmware */
56155e3dd157SKalle Valo struct wmi_bcn_prb_info {
56165e3dd157SKalle Valo 	/* Capabilities */
56175e3dd157SKalle Valo 	__le32 caps;
56185e3dd157SKalle Valo 	/* ERP info */
56195e3dd157SKalle Valo 	__le32 erp;
56205e3dd157SKalle Valo 	/* Advanced capabilities */
56215e3dd157SKalle Valo 	/* HT capabilities */
56225e3dd157SKalle Valo 	/* HT Info */
56235e3dd157SKalle Valo 	/* ibss_dfs */
56245e3dd157SKalle Valo 	/* wpa Info */
56255e3dd157SKalle Valo 	/* rsn Info */
56265e3dd157SKalle Valo 	/* rrm info */
56275e3dd157SKalle Valo 	/* ath_ext */
56285e3dd157SKalle Valo 	/* app IE */
56295e3dd157SKalle Valo } __packed;
56305e3dd157SKalle Valo 
56315e3dd157SKalle Valo struct wmi_bcn_tmpl_cmd {
56325e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
56335e3dd157SKalle Valo 	__le32 vdev_id;
56345e3dd157SKalle Valo 	/* TIM IE offset from the beginning of the template. */
56355e3dd157SKalle Valo 	__le32 tim_ie_offset;
56365e3dd157SKalle Valo 	/* beacon probe capabilities and IEs */
56375e3dd157SKalle Valo 	struct wmi_bcn_prb_info bcn_prb_info;
56385e3dd157SKalle Valo 	/* beacon buffer length */
56395e3dd157SKalle Valo 	__le32 buf_len;
56405e3dd157SKalle Valo 	/* variable length data */
56415e3dd157SKalle Valo 	u8 data[1];
56425e3dd157SKalle Valo } __packed;
56435e3dd157SKalle Valo 
56445e3dd157SKalle Valo struct wmi_prb_tmpl_cmd {
56455e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
56465e3dd157SKalle Valo 	__le32 vdev_id;
56475e3dd157SKalle Valo 	/* beacon probe capabilities and IEs */
56485e3dd157SKalle Valo 	struct wmi_bcn_prb_info bcn_prb_info;
56495e3dd157SKalle Valo 	/* beacon buffer length */
56505e3dd157SKalle Valo 	__le32 buf_len;
56515e3dd157SKalle Valo 	/* Variable length data */
56525e3dd157SKalle Valo 	u8 data[1];
56535e3dd157SKalle Valo } __packed;
56545e3dd157SKalle Valo 
56555e3dd157SKalle Valo enum wmi_sta_ps_mode {
56565e3dd157SKalle Valo 	/* enable power save for the given STA VDEV */
56575e3dd157SKalle Valo 	WMI_STA_PS_MODE_DISABLED = 0,
56585e3dd157SKalle Valo 	/* disable power save  for a given STA VDEV */
56595e3dd157SKalle Valo 	WMI_STA_PS_MODE_ENABLED = 1,
56605e3dd157SKalle Valo };
56615e3dd157SKalle Valo 
56625e3dd157SKalle Valo struct wmi_sta_powersave_mode_cmd {
56635e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
56645e3dd157SKalle Valo 	__le32 vdev_id;
56655e3dd157SKalle Valo 
56665e3dd157SKalle Valo 	/*
56675e3dd157SKalle Valo 	 * Power save mode
56685e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_mode)
56695e3dd157SKalle Valo 	 */
56705e3dd157SKalle Valo 	__le32 sta_ps_mode;
56715e3dd157SKalle Valo } __packed;
56725e3dd157SKalle Valo 
56735e3dd157SKalle Valo enum wmi_csa_offload_en {
56745e3dd157SKalle Valo 	WMI_CSA_OFFLOAD_DISABLE = 0,
56755e3dd157SKalle Valo 	WMI_CSA_OFFLOAD_ENABLE = 1,
56765e3dd157SKalle Valo };
56775e3dd157SKalle Valo 
56785e3dd157SKalle Valo struct wmi_csa_offload_enable_cmd {
56795e3dd157SKalle Valo 	__le32 vdev_id;
56805e3dd157SKalle Valo 	__le32 csa_offload_enable;
56815e3dd157SKalle Valo } __packed;
56825e3dd157SKalle Valo 
56835e3dd157SKalle Valo struct wmi_csa_offload_chanswitch_cmd {
56845e3dd157SKalle Valo 	__le32 vdev_id;
56855e3dd157SKalle Valo 	struct wmi_channel chan;
56865e3dd157SKalle Valo } __packed;
56875e3dd157SKalle Valo 
56885e3dd157SKalle Valo /*
56895e3dd157SKalle Valo  * This parameter controls the policy for retrieving frames from AP while the
56905e3dd157SKalle Valo  * STA is in sleep state.
56915e3dd157SKalle Valo  *
56925e3dd157SKalle Valo  * Only takes affect if the sta_ps_mode is enabled
56935e3dd157SKalle Valo  */
56945e3dd157SKalle Valo enum wmi_sta_ps_param_rx_wake_policy {
56955e3dd157SKalle Valo 	/*
56965e3dd157SKalle Valo 	 * Wake up when ever there is an  RX activity on the VDEV. In this mode
56975e3dd157SKalle Valo 	 * the Power save SM(state machine) will come out of sleep by either
56985e3dd157SKalle Valo 	 * sending null frame (or) a data frame (with PS==0) in response to TIM
56995e3dd157SKalle Valo 	 * bit set in the received beacon frame from AP.
57005e3dd157SKalle Valo 	 */
57015e3dd157SKalle Valo 	WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
57025e3dd157SKalle Valo 
57035e3dd157SKalle Valo 	/*
57045e3dd157SKalle Valo 	 * Here the power save state machine will not wakeup in response to TIM
57055e3dd157SKalle Valo 	 * bit, instead it will send a PSPOLL (or) UASPD trigger based on UAPSD
57065e3dd157SKalle Valo 	 * configuration setup by WMISET_PS_SET_UAPSD  WMI command.  When all
57075e3dd157SKalle Valo 	 * access categories are delivery-enabled, the station will send a
57085e3dd157SKalle Valo 	 * UAPSD trigger frame, otherwise it will send a PS-Poll.
57095e3dd157SKalle Valo 	 */
57105e3dd157SKalle Valo 	WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
57115e3dd157SKalle Valo };
57125e3dd157SKalle Valo 
57135e3dd157SKalle Valo /*
57145e3dd157SKalle Valo  * Number of tx frames/beacon  that cause the power save SM to wake up.
57155e3dd157SKalle Valo  *
57165e3dd157SKalle Valo  * Value 1 causes the SM to wake up for every TX. Value 0 has a special
57175e3dd157SKalle Valo  * meaning, It will cause the SM to never wake up. This is useful if you want
57185e3dd157SKalle Valo  * to keep the system to sleep all the time for some kind of test mode . host
57195e3dd157SKalle Valo  * can change this parameter any time.  It will affect at the next tx frame.
57205e3dd157SKalle Valo  */
57215e3dd157SKalle Valo enum wmi_sta_ps_param_tx_wake_threshold {
57225e3dd157SKalle Valo 	WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
57235e3dd157SKalle Valo 	WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
57245e3dd157SKalle Valo 
57255e3dd157SKalle Valo 	/*
57265e3dd157SKalle Valo 	 * Values greater than one indicate that many TX attempts per beacon
57275e3dd157SKalle Valo 	 * interval before the STA will wake up
57285e3dd157SKalle Valo 	 */
57295e3dd157SKalle Valo };
57305e3dd157SKalle Valo 
57315e3dd157SKalle Valo /*
57325e3dd157SKalle Valo  * The maximum number of PS-Poll frames the FW will send in response to
57335e3dd157SKalle Valo  * traffic advertised in TIM before waking up (by sending a null frame with PS
57345e3dd157SKalle Valo  * = 0). Value 0 has a special meaning: there is no maximum count and the FW
57355e3dd157SKalle Valo  * will send as many PS-Poll as are necessary to retrieve buffered BU. This
57365e3dd157SKalle Valo  * parameter is used when the RX wake policy is
57375e3dd157SKalle Valo  * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
57385e3dd157SKalle Valo  * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
57395e3dd157SKalle Valo  */
57405e3dd157SKalle Valo enum wmi_sta_ps_param_pspoll_count {
57415e3dd157SKalle Valo 	WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
57425e3dd157SKalle Valo 	/*
57435e3dd157SKalle Valo 	 * Values greater than 0 indicate the maximum numer of PS-Poll frames
57445e3dd157SKalle Valo 	 * FW will send before waking up.
57455e3dd157SKalle Valo 	 */
57469f9b5746SMichal Kazior 
57479f9b5746SMichal Kazior 	/* When u-APSD is enabled the firmware will be very reluctant to exit
57489f9b5746SMichal Kazior 	 * STA PS. This could result in very poor Rx performance with STA doing
57499f9b5746SMichal Kazior 	 * PS-Poll for each and every buffered frame. This value is a bit
57509f9b5746SMichal Kazior 	 * arbitrary.
57519f9b5746SMichal Kazior 	 */
57529f9b5746SMichal Kazior 	WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3,
57535e3dd157SKalle Valo };
57545e3dd157SKalle Valo 
57555e3dd157SKalle Valo /*
57565e3dd157SKalle Valo  * This will include the delivery and trigger enabled state for every AC.
57575e3dd157SKalle Valo  * This is the negotiated state with AP. The host MLME needs to set this based
57585e3dd157SKalle Valo  * on AP capability and the state Set in the association request by the
57595e3dd157SKalle Valo  * station MLME.Lower 8 bits of the value specify the UAPSD configuration.
57605e3dd157SKalle Valo  */
57615e3dd157SKalle Valo #define WMI_UAPSD_AC_TYPE_DELI 0
57625e3dd157SKalle Valo #define WMI_UAPSD_AC_TYPE_TRIG 1
57635e3dd157SKalle Valo 
57645e3dd157SKalle Valo #define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5765e13dbeadSJoe Perches 	(type == WMI_UAPSD_AC_TYPE_DELI ? 1 << (ac << 1) : 1 << ((ac << 1) + 1))
57665e3dd157SKalle Valo 
57675e3dd157SKalle Valo enum wmi_sta_ps_param_uapsd {
57685e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
57695e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
57705e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
57715e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
57725e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
57735e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
57745e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
57755e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
57765e3dd157SKalle Valo };
57775e3dd157SKalle Valo 
57780c7e477cSJanusz Dziedzic #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
57790c7e477cSJanusz Dziedzic 
57800c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_param {
57810c7e477cSJanusz Dziedzic 	__le32 wmm_ac;
57820c7e477cSJanusz Dziedzic 	__le32 user_priority;
57830c7e477cSJanusz Dziedzic 	__le32 service_interval;
57840c7e477cSJanusz Dziedzic 	__le32 suspend_interval;
57850c7e477cSJanusz Dziedzic 	__le32 delay_interval;
57860c7e477cSJanusz Dziedzic };
57870c7e477cSJanusz Dziedzic 
57880c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
57890c7e477cSJanusz Dziedzic 	__le32 vdev_id;
57900c7e477cSJanusz Dziedzic 	struct wmi_mac_addr peer_macaddr;
57910c7e477cSJanusz Dziedzic 	__le32 num_ac;
57920c7e477cSJanusz Dziedzic };
57930c7e477cSJanusz Dziedzic 
57940c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_arg {
57950c7e477cSJanusz Dziedzic 	u32 wmm_ac;
57960c7e477cSJanusz Dziedzic 	u32 user_priority;
57970c7e477cSJanusz Dziedzic 	u32 service_interval;
57980c7e477cSJanusz Dziedzic 	u32 suspend_interval;
57990c7e477cSJanusz Dziedzic 	u32 delay_interval;
58000c7e477cSJanusz Dziedzic };
58010c7e477cSJanusz Dziedzic 
58025e3dd157SKalle Valo enum wmi_sta_powersave_param {
58035e3dd157SKalle Valo 	/*
58045e3dd157SKalle Valo 	 * Controls how frames are retrievd from AP while STA is sleeping
58055e3dd157SKalle Valo 	 *
58065e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_param_rx_wake_policy)
58075e3dd157SKalle Valo 	 */
58085e3dd157SKalle Valo 	WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
58095e3dd157SKalle Valo 
58105e3dd157SKalle Valo 	/*
58115e3dd157SKalle Valo 	 * The STA will go active after this many TX
58125e3dd157SKalle Valo 	 *
58135e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_param_tx_wake_threshold)
58145e3dd157SKalle Valo 	 */
58155e3dd157SKalle Valo 	WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
58165e3dd157SKalle Valo 
58175e3dd157SKalle Valo 	/*
58185e3dd157SKalle Valo 	 * Number of PS-Poll to send before STA wakes up
58195e3dd157SKalle Valo 	 *
58205e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_param_pspoll_count)
58215e3dd157SKalle Valo 	 *
58225e3dd157SKalle Valo 	 */
58235e3dd157SKalle Valo 	WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
58245e3dd157SKalle Valo 
58255e3dd157SKalle Valo 	/*
58265e3dd157SKalle Valo 	 * TX/RX inactivity time in msec before going to sleep.
58275e3dd157SKalle Valo 	 *
58285e3dd157SKalle Valo 	 * The power save SM will monitor tx/rx activity on the VDEV, if no
58295e3dd157SKalle Valo 	 * activity for the specified msec of the parameter the Power save
58305e3dd157SKalle Valo 	 * SM will go to sleep.
58315e3dd157SKalle Valo 	 */
58325e3dd157SKalle Valo 	WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
58335e3dd157SKalle Valo 
58345e3dd157SKalle Valo 	/*
58355e3dd157SKalle Valo 	 * Set uapsd configuration.
58365e3dd157SKalle Valo 	 *
58375e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_param_uapsd)
58385e3dd157SKalle Valo 	 */
58395e3dd157SKalle Valo 	WMI_STA_PS_PARAM_UAPSD = 4,
58405e3dd157SKalle Valo };
58415e3dd157SKalle Valo 
58425e3dd157SKalle Valo struct wmi_sta_powersave_param_cmd {
58435e3dd157SKalle Valo 	__le32 vdev_id;
58445e3dd157SKalle Valo 	__le32 param_id; /* %WMI_STA_PS_PARAM_ */
58455e3dd157SKalle Valo 	__le32 param_value;
58465e3dd157SKalle Valo } __packed;
58475e3dd157SKalle Valo 
58485e3dd157SKalle Valo /* No MIMO power save */
58495e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_DISABLE
58505e3dd157SKalle Valo /* mimo powersave mode static*/
58515e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_STATIC
58525e3dd157SKalle Valo /* mimo powersave mode dynamic */
58535e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_DYNAMIC
58545e3dd157SKalle Valo 
58555e3dd157SKalle Valo struct wmi_sta_mimo_ps_mode_cmd {
58565e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
58575e3dd157SKalle Valo 	__le32 vdev_id;
58585e3dd157SKalle Valo 	/* mimo powersave mode as defined above */
58595e3dd157SKalle Valo 	__le32 mimo_pwrsave_mode;
58605e3dd157SKalle Valo } __packed;
58615e3dd157SKalle Valo 
58625e3dd157SKalle Valo /* U-APSD configuration of peer station from (re)assoc request and TSPECs */
58635e3dd157SKalle Valo enum wmi_ap_ps_param_uapsd {
58645e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
58655e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
58665e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
58675e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
58685e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
58695e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
58705e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
58715e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
58725e3dd157SKalle Valo };
58735e3dd157SKalle Valo 
58745e3dd157SKalle Valo /* U-APSD maximum service period of peer station */
58755e3dd157SKalle Valo enum wmi_ap_ps_peer_param_max_sp {
58765e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
58775e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
58785e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
58795e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
58805e3dd157SKalle Valo 	MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
58815e3dd157SKalle Valo };
58825e3dd157SKalle Valo 
58835e3dd157SKalle Valo /*
58845e3dd157SKalle Valo  * AP power save parameter
58855e3dd157SKalle Valo  * Set a power save specific parameter for a peer station
58865e3dd157SKalle Valo  */
58875e3dd157SKalle Valo enum wmi_ap_ps_peer_param {
58885e3dd157SKalle Valo 	/* Set uapsd configuration for a given peer.
58895e3dd157SKalle Valo 	 *
58905e3dd157SKalle Valo 	 * Include the delivery and trigger enabled state for every AC.
58915e3dd157SKalle Valo 	 * The host  MLME needs to set this based on AP capability and stations
58925e3dd157SKalle Valo 	 * request Set in the association request  received from the station.
58935e3dd157SKalle Valo 	 *
58945e3dd157SKalle Valo 	 * Lower 8 bits of the value specify the UAPSD configuration.
58955e3dd157SKalle Valo 	 *
58965e3dd157SKalle Valo 	 * (see enum wmi_ap_ps_param_uapsd)
58975e3dd157SKalle Valo 	 * The default value is 0.
58985e3dd157SKalle Valo 	 */
58995e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_UAPSD = 0,
59005e3dd157SKalle Valo 
59015e3dd157SKalle Valo 	/*
59025e3dd157SKalle Valo 	 * Set the service period for a UAPSD capable station
59035e3dd157SKalle Valo 	 *
59045e3dd157SKalle Valo 	 * The service period from wme ie in the (re)assoc request frame.
59055e3dd157SKalle Valo 	 *
59065e3dd157SKalle Valo 	 * (see enum wmi_ap_ps_peer_param_max_sp)
59075e3dd157SKalle Valo 	 */
59085e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
59095e3dd157SKalle Valo 
59105e3dd157SKalle Valo 	/* Time in seconds for aging out buffered frames for STA in PS */
59115e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
59125e3dd157SKalle Valo };
59135e3dd157SKalle Valo 
59145e3dd157SKalle Valo struct wmi_ap_ps_peer_cmd {
59155e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
59165e3dd157SKalle Valo 	__le32 vdev_id;
59175e3dd157SKalle Valo 
59185e3dd157SKalle Valo 	/* peer MAC address */
59195e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
59205e3dd157SKalle Valo 
59215e3dd157SKalle Valo 	/* AP powersave param (see enum wmi_ap_ps_peer_param) */
59225e3dd157SKalle Valo 	__le32 param_id;
59235e3dd157SKalle Valo 
59245e3dd157SKalle Valo 	/* AP powersave param value */
59255e3dd157SKalle Valo 	__le32 param_value;
59265e3dd157SKalle Valo } __packed;
59275e3dd157SKalle Valo 
59285e3dd157SKalle Valo /* 128 clients = 4 words */
59295e3dd157SKalle Valo #define WMI_TIM_BITMAP_ARRAY_SIZE 4
59305e3dd157SKalle Valo 
59315e3dd157SKalle Valo struct wmi_tim_info {
59325e3dd157SKalle Valo 	__le32 tim_len;
59335e3dd157SKalle Valo 	__le32 tim_mcast;
59345e3dd157SKalle Valo 	__le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
59355e3dd157SKalle Valo 	__le32 tim_changed;
59365e3dd157SKalle Valo 	__le32 tim_num_ps_pending;
59375e3dd157SKalle Valo } __packed;
59385e3dd157SKalle Valo 
5939a03fee34SRaja Mani struct wmi_tim_info_arg {
5940a03fee34SRaja Mani 	__le32 tim_len;
5941a03fee34SRaja Mani 	__le32 tim_mcast;
5942a03fee34SRaja Mani 	const __le32 *tim_bitmap;
5943a03fee34SRaja Mani 	__le32 tim_changed;
5944a03fee34SRaja Mani 	__le32 tim_num_ps_pending;
5945a03fee34SRaja Mani } __packed;
5946a03fee34SRaja Mani 
59475e3dd157SKalle Valo /* Maximum number of NOA Descriptors supported */
59485e3dd157SKalle Valo #define WMI_P2P_MAX_NOA_DESCRIPTORS 4
59495e3dd157SKalle Valo #define WMI_P2P_OPPPS_ENABLE_BIT	BIT(0)
59505e3dd157SKalle Valo #define WMI_P2P_OPPPS_CTWINDOW_OFFSET	1
59515e3dd157SKalle Valo #define WMI_P2P_NOA_CHANGED_BIT	BIT(0)
59525e3dd157SKalle Valo 
59535e3dd157SKalle Valo struct wmi_p2p_noa_info {
59545e3dd157SKalle Valo 	/* Bit 0 - Flag to indicate an update in NOA schedule
595537ff1b0dSMarcin Rokicki 	 * Bits 7-1 - Reserved
595637ff1b0dSMarcin Rokicki 	 */
59575e3dd157SKalle Valo 	u8 changed;
59585e3dd157SKalle Valo 	/* NOA index */
59595e3dd157SKalle Valo 	u8 index;
59605e3dd157SKalle Valo 	/* Bit 0 - Opp PS state of the AP
596137ff1b0dSMarcin Rokicki 	 * Bits 1-7 - Ctwindow in TUs
596237ff1b0dSMarcin Rokicki 	 */
59635e3dd157SKalle Valo 	u8 ctwindow_oppps;
59645e3dd157SKalle Valo 	/* Number of NOA descriptors */
59655e3dd157SKalle Valo 	u8 num_descriptors;
59665e3dd157SKalle Valo 
59675e3dd157SKalle Valo 	struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
59685e3dd157SKalle Valo } __packed;
59695e3dd157SKalle Valo 
59705e3dd157SKalle Valo struct wmi_bcn_info {
59715e3dd157SKalle Valo 	struct wmi_tim_info tim_info;
59725e3dd157SKalle Valo 	struct wmi_p2p_noa_info p2p_noa_info;
59735e3dd157SKalle Valo } __packed;
59745e3dd157SKalle Valo 
59755e3dd157SKalle Valo struct wmi_host_swba_event {
59765e3dd157SKalle Valo 	__le32 vdev_map;
597732653cf1SMichal Kazior 	struct wmi_bcn_info bcn_info[0];
59785e3dd157SKalle Valo } __packed;
59795e3dd157SKalle Valo 
59808b019fb0SYanbo Li struct wmi_10_2_4_bcn_info {
59818b019fb0SYanbo Li 	struct wmi_tim_info tim_info;
59828b019fb0SYanbo Li 	/* The 10.2.4 FW doesn't have p2p NOA info */
59838b019fb0SYanbo Li } __packed;
59848b019fb0SYanbo Li 
59858b019fb0SYanbo Li struct wmi_10_2_4_host_swba_event {
59868b019fb0SYanbo Li 	__le32 vdev_map;
59878b019fb0SYanbo Li 	struct wmi_10_2_4_bcn_info bcn_info[0];
59888b019fb0SYanbo Li } __packed;
59898b019fb0SYanbo Li 
59903cec3be3SRaja Mani /* 16 words = 512 client + 1 word = for guard */
59913cec3be3SRaja Mani #define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17
59923cec3be3SRaja Mani 
59933cec3be3SRaja Mani struct wmi_10_4_tim_info {
59943cec3be3SRaja Mani 	__le32 tim_len;
59953cec3be3SRaja Mani 	__le32 tim_mcast;
59963cec3be3SRaja Mani 	__le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE];
59973cec3be3SRaja Mani 	__le32 tim_changed;
59983cec3be3SRaja Mani 	__le32 tim_num_ps_pending;
59993cec3be3SRaja Mani } __packed;
60003cec3be3SRaja Mani 
60013cec3be3SRaja Mani #define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1
60023cec3be3SRaja Mani 
60033cec3be3SRaja Mani struct wmi_10_4_p2p_noa_info {
60043cec3be3SRaja Mani 	/* Bit 0 - Flag to indicate an update in NOA schedule
60053cec3be3SRaja Mani 	 * Bits 7-1 - Reserved
60063cec3be3SRaja Mani 	 */
60073cec3be3SRaja Mani 	u8 changed;
60083cec3be3SRaja Mani 	/* NOA index */
60093cec3be3SRaja Mani 	u8 index;
60103cec3be3SRaja Mani 	/* Bit 0 - Opp PS state of the AP
60113cec3be3SRaja Mani 	 * Bits 1-7 - Ctwindow in TUs
60123cec3be3SRaja Mani 	 */
60133cec3be3SRaja Mani 	u8 ctwindow_oppps;
60143cec3be3SRaja Mani 	/* Number of NOA descriptors */
60153cec3be3SRaja Mani 	u8 num_descriptors;
60163cec3be3SRaja Mani 
60173cec3be3SRaja Mani 	struct wmi_p2p_noa_descriptor
60183cec3be3SRaja Mani 		noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS];
60193cec3be3SRaja Mani } __packed;
60203cec3be3SRaja Mani 
60213cec3be3SRaja Mani struct wmi_10_4_bcn_info {
60223cec3be3SRaja Mani 	struct wmi_10_4_tim_info tim_info;
60233cec3be3SRaja Mani 	struct wmi_10_4_p2p_noa_info p2p_noa_info;
60243cec3be3SRaja Mani } __packed;
60253cec3be3SRaja Mani 
60263cec3be3SRaja Mani struct wmi_10_4_host_swba_event {
60273cec3be3SRaja Mani 	__le32 vdev_map;
60283cec3be3SRaja Mani 	struct wmi_10_4_bcn_info bcn_info[0];
60293cec3be3SRaja Mani } __packed;
60303cec3be3SRaja Mani 
60315e3dd157SKalle Valo #define WMI_MAX_AP_VDEV 16
60325e3dd157SKalle Valo 
60335e3dd157SKalle Valo struct wmi_tbtt_offset_event {
60345e3dd157SKalle Valo 	__le32 vdev_map;
60355e3dd157SKalle Valo 	__le32 tbttoffset_list[WMI_MAX_AP_VDEV];
60365e3dd157SKalle Valo } __packed;
60375e3dd157SKalle Valo 
60385e3dd157SKalle Valo struct wmi_peer_create_cmd {
60395e3dd157SKalle Valo 	__le32 vdev_id;
60405e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
6041be5b4f40SManikanta Pubbisetty 	__le32 peer_type;
60425e3dd157SKalle Valo } __packed;
60435e3dd157SKalle Valo 
60447390ed34SMarek Puzyniak enum wmi_peer_type {
60457390ed34SMarek Puzyniak 	WMI_PEER_TYPE_DEFAULT = 0,
60467390ed34SMarek Puzyniak 	WMI_PEER_TYPE_BSS = 1,
60477390ed34SMarek Puzyniak 	WMI_PEER_TYPE_TDLS = 2,
60487390ed34SMarek Puzyniak };
60497390ed34SMarek Puzyniak 
60505e3dd157SKalle Valo struct wmi_peer_delete_cmd {
60515e3dd157SKalle Valo 	__le32 vdev_id;
60525e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
60535e3dd157SKalle Valo } __packed;
60545e3dd157SKalle Valo 
60555e3dd157SKalle Valo struct wmi_peer_flush_tids_cmd {
60565e3dd157SKalle Valo 	__le32 vdev_id;
60575e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
60585e3dd157SKalle Valo 	__le32 peer_tid_bitmap;
60595e3dd157SKalle Valo } __packed;
60605e3dd157SKalle Valo 
60615e3dd157SKalle Valo struct wmi_fixed_rate {
60625e3dd157SKalle Valo 	/*
60635e3dd157SKalle Valo 	 * rate mode . 0: disable fixed rate (auto rate)
60645e3dd157SKalle Valo 	 *   1: legacy (non 11n) rate  specified as ieee rate 2*Mbps
60655e3dd157SKalle Valo 	 *   2: ht20 11n rate  specified as mcs index
60665e3dd157SKalle Valo 	 *   3: ht40 11n rate  specified as mcs index
60675e3dd157SKalle Valo 	 */
60685e3dd157SKalle Valo 	__le32  rate_mode;
60695e3dd157SKalle Valo 	/*
60705e3dd157SKalle Valo 	 * 4 rate values for 4 rate series. series 0 is stored in byte 0 (LSB)
60715e3dd157SKalle Valo 	 * and series 3 is stored at byte 3 (MSB)
60725e3dd157SKalle Valo 	 */
60735e3dd157SKalle Valo 	__le32  rate_series;
60745e3dd157SKalle Valo 	/*
60755e3dd157SKalle Valo 	 * 4 retry counts for 4 rate series. retry count for rate 0 is stored
60765e3dd157SKalle Valo 	 * in byte 0 (LSB) and retry count for rate 3 is stored at byte 3
60775e3dd157SKalle Valo 	 * (MSB)
60785e3dd157SKalle Valo 	 */
60795e3dd157SKalle Valo 	__le32  rate_retries;
60805e3dd157SKalle Valo } __packed;
60815e3dd157SKalle Valo 
60825e3dd157SKalle Valo struct wmi_peer_fixed_rate_cmd {
60835e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
60845e3dd157SKalle Valo 	__le32 vdev_id;
60855e3dd157SKalle Valo 	/* peer MAC address */
60865e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
60875e3dd157SKalle Valo 	/* fixed rate */
60885e3dd157SKalle Valo 	struct wmi_fixed_rate peer_fixed_rate;
60895e3dd157SKalle Valo } __packed;
60905e3dd157SKalle Valo 
60915e3dd157SKalle Valo #define WMI_MGMT_TID    17
60925e3dd157SKalle Valo 
60935e3dd157SKalle Valo struct wmi_addba_clear_resp_cmd {
60945e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
60955e3dd157SKalle Valo 	__le32 vdev_id;
60965e3dd157SKalle Valo 	/* peer MAC address */
60975e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
60985e3dd157SKalle Valo } __packed;
60995e3dd157SKalle Valo 
61005e3dd157SKalle Valo struct wmi_addba_send_cmd {
61015e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
61025e3dd157SKalle Valo 	__le32 vdev_id;
61035e3dd157SKalle Valo 	/* peer MAC address */
61045e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
61055e3dd157SKalle Valo 	/* Tid number */
61065e3dd157SKalle Valo 	__le32 tid;
61075e3dd157SKalle Valo 	/* Buffer/Window size*/
61085e3dd157SKalle Valo 	__le32 buffersize;
61095e3dd157SKalle Valo } __packed;
61105e3dd157SKalle Valo 
61115e3dd157SKalle Valo struct wmi_delba_send_cmd {
61125e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
61135e3dd157SKalle Valo 	__le32 vdev_id;
61145e3dd157SKalle Valo 	/* peer MAC address */
61155e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
61165e3dd157SKalle Valo 	/* Tid number */
61175e3dd157SKalle Valo 	__le32 tid;
61185e3dd157SKalle Valo 	/* Is Initiator */
61195e3dd157SKalle Valo 	__le32 initiator;
61205e3dd157SKalle Valo 	/* Reason code */
61215e3dd157SKalle Valo 	__le32 reasoncode;
61225e3dd157SKalle Valo } __packed;
61235e3dd157SKalle Valo 
61245e3dd157SKalle Valo struct wmi_addba_setresponse_cmd {
61255e3dd157SKalle Valo 	/* unique id identifying the vdev, generated by the caller */
61265e3dd157SKalle Valo 	__le32 vdev_id;
61275e3dd157SKalle Valo 	/* peer mac address */
61285e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
61295e3dd157SKalle Valo 	/* Tid number */
61305e3dd157SKalle Valo 	__le32 tid;
61315e3dd157SKalle Valo 	/* status code */
61325e3dd157SKalle Valo 	__le32 statuscode;
61335e3dd157SKalle Valo } __packed;
61345e3dd157SKalle Valo 
61355e3dd157SKalle Valo struct wmi_send_singleamsdu_cmd {
61365e3dd157SKalle Valo 	/* unique id identifying the vdev, generated by the caller */
61375e3dd157SKalle Valo 	__le32 vdev_id;
61385e3dd157SKalle Valo 	/* peer mac address */
61395e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
61405e3dd157SKalle Valo 	/* Tid number */
61415e3dd157SKalle Valo 	__le32 tid;
61425e3dd157SKalle Valo } __packed;
61435e3dd157SKalle Valo 
61445e3dd157SKalle Valo enum wmi_peer_smps_state {
61455e3dd157SKalle Valo 	WMI_PEER_SMPS_PS_NONE = 0x0,
61465e3dd157SKalle Valo 	WMI_PEER_SMPS_STATIC  = 0x1,
61475e3dd157SKalle Valo 	WMI_PEER_SMPS_DYNAMIC = 0x2
61485e3dd157SKalle Valo };
61495e3dd157SKalle Valo 
61509797febcSMichal Kazior enum wmi_peer_chwidth {
61519797febcSMichal Kazior 	WMI_PEER_CHWIDTH_20MHZ = 0,
61529797febcSMichal Kazior 	WMI_PEER_CHWIDTH_40MHZ = 1,
61539797febcSMichal Kazior 	WMI_PEER_CHWIDTH_80MHZ = 2,
6154bc1efd73SSebastian Gottschall 	WMI_PEER_CHWIDTH_160MHZ = 3,
61559797febcSMichal Kazior };
61569797febcSMichal Kazior 
61575e3dd157SKalle Valo enum wmi_peer_param {
61585e3dd157SKalle Valo 	WMI_PEER_SMPS_STATE = 0x1, /* see %wmi_peer_smps_state */
61595e3dd157SKalle Valo 	WMI_PEER_AMPDU      = 0x2,
61605e3dd157SKalle Valo 	WMI_PEER_AUTHORIZE  = 0x3,
61615e3dd157SKalle Valo 	WMI_PEER_CHAN_WIDTH = 0x4,
61625e3dd157SKalle Valo 	WMI_PEER_NSS        = 0x5,
61630a987fb0SMichal Kazior 	WMI_PEER_USE_4ADDR  = 0x6,
6164ee8b08a1SMaharaja Kennadyrajan 	WMI_PEER_DEBUG      = 0xa,
61659191fc2aSRyan Hsu 	WMI_PEER_PHYMODE    = 0xd,
61660a987fb0SMichal Kazior 	WMI_PEER_DUMMY_VAR  = 0xff, /* dummy parameter for STA PS workaround */
61675e3dd157SKalle Valo };
61685e3dd157SKalle Valo 
61695e3dd157SKalle Valo struct wmi_peer_set_param_cmd {
61705e3dd157SKalle Valo 	__le32 vdev_id;
61715e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
61725e3dd157SKalle Valo 	__le32 param_id;
61735e3dd157SKalle Valo 	__le32 param_value;
61745e3dd157SKalle Valo } __packed;
61755e3dd157SKalle Valo 
61765e3dd157SKalle Valo #define MAX_SUPPORTED_RATES 128
61775e3dd157SKalle Valo 
61785e3dd157SKalle Valo struct wmi_rate_set {
61795e3dd157SKalle Valo 	/* total number of rates */
61805e3dd157SKalle Valo 	__le32 num_rates;
61815e3dd157SKalle Valo 	/*
61825e3dd157SKalle Valo 	 * rates (each 8bit value) packed into a 32 bit word.
61835e3dd157SKalle Valo 	 * the rates are filled from least significant byte to most
61845e3dd157SKalle Valo 	 * significant byte.
61855e3dd157SKalle Valo 	 */
61865e3dd157SKalle Valo 	__le32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
61875e3dd157SKalle Valo } __packed;
61885e3dd157SKalle Valo 
61895e3dd157SKalle Valo struct wmi_rate_set_arg {
61905e3dd157SKalle Valo 	unsigned int num_rates;
61915e3dd157SKalle Valo 	u8 rates[MAX_SUPPORTED_RATES];
61925e3dd157SKalle Valo };
61935e3dd157SKalle Valo 
61945e3dd157SKalle Valo /*
61955e3dd157SKalle Valo  * NOTE: It would bea good idea to represent the Tx MCS
61965e3dd157SKalle Valo  * info in one word and Rx in another word. This is split
61975e3dd157SKalle Valo  * into multiple words for convenience
61985e3dd157SKalle Valo  */
61995e3dd157SKalle Valo struct wmi_vht_rate_set {
62005e3dd157SKalle Valo 	__le32 rx_max_rate; /* Max Rx data rate */
62015e3dd157SKalle Valo 	__le32 rx_mcs_set;  /* Negotiated RX VHT rates */
62025e3dd157SKalle Valo 	__le32 tx_max_rate; /* Max Tx data rate */
62035e3dd157SKalle Valo 	__le32 tx_mcs_set;  /* Negotiated TX VHT rates */
62045e3dd157SKalle Valo } __packed;
62055e3dd157SKalle Valo 
62065e3dd157SKalle Valo struct wmi_vht_rate_set_arg {
62075e3dd157SKalle Valo 	u32 rx_max_rate;
62085e3dd157SKalle Valo 	u32 rx_mcs_set;
62095e3dd157SKalle Valo 	u32 tx_max_rate;
62105e3dd157SKalle Valo 	u32 tx_mcs_set;
62115e3dd157SKalle Valo };
62125e3dd157SKalle Valo 
62135e3dd157SKalle Valo struct wmi_peer_set_rates_cmd {
62145e3dd157SKalle Valo 	/* peer MAC address */
62155e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62165e3dd157SKalle Valo 	/* legacy rate set */
62175e3dd157SKalle Valo 	struct wmi_rate_set peer_legacy_rates;
62185e3dd157SKalle Valo 	/* ht rate set */
62195e3dd157SKalle Valo 	struct wmi_rate_set peer_ht_rates;
62205e3dd157SKalle Valo } __packed;
62215e3dd157SKalle Valo 
62225e3dd157SKalle Valo struct wmi_peer_set_q_empty_callback_cmd {
62235e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
62245e3dd157SKalle Valo 	__le32 vdev_id;
62255e3dd157SKalle Valo 	/* peer MAC address */
62265e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62275e3dd157SKalle Valo 	__le32 callback_enable;
62285e3dd157SKalle Valo } __packed;
62295e3dd157SKalle Valo 
62303fab30f7STamizh chelvam struct wmi_peer_flags_map {
62313fab30f7STamizh chelvam 	u32 auth;
62323fab30f7STamizh chelvam 	u32 qos;
62333fab30f7STamizh chelvam 	u32 need_ptk_4_way;
62343fab30f7STamizh chelvam 	u32 need_gtk_2_way;
62353fab30f7STamizh chelvam 	u32 apsd;
62363fab30f7STamizh chelvam 	u32 ht;
62373fab30f7STamizh chelvam 	u32 bw40;
62383fab30f7STamizh chelvam 	u32 stbc;
62393fab30f7STamizh chelvam 	u32 ldbc;
62403fab30f7STamizh chelvam 	u32 dyn_mimops;
62413fab30f7STamizh chelvam 	u32 static_mimops;
62423fab30f7STamizh chelvam 	u32 spatial_mux;
62433fab30f7STamizh chelvam 	u32 vht;
62443fab30f7STamizh chelvam 	u32 bw80;
62453fab30f7STamizh chelvam 	u32 vht_2g;
62463fab30f7STamizh chelvam 	u32 pmf;
6247bc1efd73SSebastian Gottschall 	u32 bw160;
62483fab30f7STamizh chelvam };
62493fab30f7STamizh chelvam 
62503fab30f7STamizh chelvam enum wmi_peer_flags {
62513fab30f7STamizh chelvam 	WMI_PEER_AUTH = 0x00000001,
62523fab30f7STamizh chelvam 	WMI_PEER_QOS = 0x00000002,
62533fab30f7STamizh chelvam 	WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
62543fab30f7STamizh chelvam 	WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
62553fab30f7STamizh chelvam 	WMI_PEER_APSD = 0x00000800,
62563fab30f7STamizh chelvam 	WMI_PEER_HT = 0x00001000,
62573fab30f7STamizh chelvam 	WMI_PEER_40MHZ = 0x00002000,
62583fab30f7STamizh chelvam 	WMI_PEER_STBC = 0x00008000,
62593fab30f7STamizh chelvam 	WMI_PEER_LDPC = 0x00010000,
62603fab30f7STamizh chelvam 	WMI_PEER_DYN_MIMOPS = 0x00020000,
62613fab30f7STamizh chelvam 	WMI_PEER_STATIC_MIMOPS = 0x00040000,
62623fab30f7STamizh chelvam 	WMI_PEER_SPATIAL_MUX = 0x00200000,
62633fab30f7STamizh chelvam 	WMI_PEER_VHT = 0x02000000,
62643fab30f7STamizh chelvam 	WMI_PEER_80MHZ = 0x04000000,
62653fab30f7STamizh chelvam 	WMI_PEER_VHT_2G = 0x08000000,
62663fab30f7STamizh chelvam 	WMI_PEER_PMF = 0x10000000,
6267bc1efd73SSebastian Gottschall 	WMI_PEER_160MHZ = 0x20000000
62683fab30f7STamizh chelvam };
62693fab30f7STamizh chelvam 
62703fab30f7STamizh chelvam enum wmi_10x_peer_flags {
62713fab30f7STamizh chelvam 	WMI_10X_PEER_AUTH = 0x00000001,
62723fab30f7STamizh chelvam 	WMI_10X_PEER_QOS = 0x00000002,
62733fab30f7STamizh chelvam 	WMI_10X_PEER_NEED_PTK_4_WAY = 0x00000004,
62743fab30f7STamizh chelvam 	WMI_10X_PEER_NEED_GTK_2_WAY = 0x00000010,
62753fab30f7STamizh chelvam 	WMI_10X_PEER_APSD = 0x00000800,
62763fab30f7STamizh chelvam 	WMI_10X_PEER_HT = 0x00001000,
62773fab30f7STamizh chelvam 	WMI_10X_PEER_40MHZ = 0x00002000,
62783fab30f7STamizh chelvam 	WMI_10X_PEER_STBC = 0x00008000,
62793fab30f7STamizh chelvam 	WMI_10X_PEER_LDPC = 0x00010000,
62803fab30f7STamizh chelvam 	WMI_10X_PEER_DYN_MIMOPS = 0x00020000,
62813fab30f7STamizh chelvam 	WMI_10X_PEER_STATIC_MIMOPS = 0x00040000,
62823fab30f7STamizh chelvam 	WMI_10X_PEER_SPATIAL_MUX = 0x00200000,
62833fab30f7STamizh chelvam 	WMI_10X_PEER_VHT = 0x02000000,
62843fab30f7STamizh chelvam 	WMI_10X_PEER_80MHZ = 0x04000000,
6285bc1efd73SSebastian Gottschall 	WMI_10X_PEER_160MHZ = 0x20000000
62863fab30f7STamizh chelvam };
62873fab30f7STamizh chelvam 
62883fab30f7STamizh chelvam enum wmi_10_2_peer_flags {
62893fab30f7STamizh chelvam 	WMI_10_2_PEER_AUTH = 0x00000001,
62903fab30f7STamizh chelvam 	WMI_10_2_PEER_QOS = 0x00000002,
62913fab30f7STamizh chelvam 	WMI_10_2_PEER_NEED_PTK_4_WAY = 0x00000004,
62923fab30f7STamizh chelvam 	WMI_10_2_PEER_NEED_GTK_2_WAY = 0x00000010,
62933fab30f7STamizh chelvam 	WMI_10_2_PEER_APSD = 0x00000800,
62943fab30f7STamizh chelvam 	WMI_10_2_PEER_HT = 0x00001000,
62953fab30f7STamizh chelvam 	WMI_10_2_PEER_40MHZ = 0x00002000,
62963fab30f7STamizh chelvam 	WMI_10_2_PEER_STBC = 0x00008000,
62973fab30f7STamizh chelvam 	WMI_10_2_PEER_LDPC = 0x00010000,
62983fab30f7STamizh chelvam 	WMI_10_2_PEER_DYN_MIMOPS = 0x00020000,
62993fab30f7STamizh chelvam 	WMI_10_2_PEER_STATIC_MIMOPS = 0x00040000,
63003fab30f7STamizh chelvam 	WMI_10_2_PEER_SPATIAL_MUX = 0x00200000,
63013fab30f7STamizh chelvam 	WMI_10_2_PEER_VHT = 0x02000000,
63023fab30f7STamizh chelvam 	WMI_10_2_PEER_80MHZ = 0x04000000,
63033fab30f7STamizh chelvam 	WMI_10_2_PEER_VHT_2G = 0x08000000,
63043fab30f7STamizh chelvam 	WMI_10_2_PEER_PMF = 0x10000000,
6305bc1efd73SSebastian Gottschall 	WMI_10_2_PEER_160MHZ = 0x20000000
63063fab30f7STamizh chelvam };
63075e3dd157SKalle Valo 
63085e3dd157SKalle Valo /*
63095e3dd157SKalle Valo  * Peer rate capabilities.
63105e3dd157SKalle Valo  *
63115e3dd157SKalle Valo  * This is of interest to the ratecontrol
63125e3dd157SKalle Valo  * module which resides in the firmware. The bit definitions are
63135e3dd157SKalle Valo  * consistent with that defined in if_athrate.c.
63145e3dd157SKalle Valo  */
63155e3dd157SKalle Valo #define WMI_RC_DS_FLAG          0x01
63165e3dd157SKalle Valo #define WMI_RC_CW40_FLAG        0x02
63175e3dd157SKalle Valo #define WMI_RC_SGI_FLAG         0x04
63185e3dd157SKalle Valo #define WMI_RC_HT_FLAG          0x08
63195e3dd157SKalle Valo #define WMI_RC_RTSCTS_FLAG      0x10
63205e3dd157SKalle Valo #define WMI_RC_TX_STBC_FLAG     0x20
63215e3dd157SKalle Valo #define WMI_RC_RX_STBC_FLAG     0xC0
63225e3dd157SKalle Valo #define WMI_RC_RX_STBC_FLAG_S   6
63235e3dd157SKalle Valo #define WMI_RC_WEP_TKIP_FLAG    0x100
63245e3dd157SKalle Valo #define WMI_RC_TS_FLAG          0x200
63255e3dd157SKalle Valo #define WMI_RC_UAPSD_FLAG       0x400
63265e3dd157SKalle Valo 
63275e3dd157SKalle Valo /* Maximum listen interval supported by hw in units of beacon interval */
63285e3dd157SKalle Valo #define ATH10K_MAX_HW_LISTEN_INTERVAL 5
63295e3dd157SKalle Valo 
633024c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd {
63315e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
63325e3dd157SKalle Valo 	__le32 vdev_id;
63335e3dd157SKalle Valo 	__le32 peer_new_assoc; /* 1=assoc, 0=reassoc */
63345e3dd157SKalle Valo 	__le32 peer_associd; /* 16 LSBs */
63355e3dd157SKalle Valo 	__le32 peer_flags;
63365e3dd157SKalle Valo 	__le32 peer_caps; /* 16 LSBs */
63375e3dd157SKalle Valo 	__le32 peer_listen_intval;
63385e3dd157SKalle Valo 	__le32 peer_ht_caps;
63395e3dd157SKalle Valo 	__le32 peer_max_mpdu;
63405e3dd157SKalle Valo 	__le32 peer_mpdu_density; /* 0..16 */
63415e3dd157SKalle Valo 	__le32 peer_rate_caps;
63425e3dd157SKalle Valo 	struct wmi_rate_set peer_legacy_rates;
63435e3dd157SKalle Valo 	struct wmi_rate_set peer_ht_rates;
63445e3dd157SKalle Valo 	__le32 peer_nss; /* num of spatial streams */
63455e3dd157SKalle Valo 	__le32 peer_vht_caps;
63465e3dd157SKalle Valo 	__le32 peer_phymode;
63475e3dd157SKalle Valo 	struct wmi_vht_rate_set peer_vht_rates;
634824c88f78SMichal Kazior };
634924c88f78SMichal Kazior 
635024c88f78SMichal Kazior struct wmi_main_peer_assoc_complete_cmd {
635124c88f78SMichal Kazior 	struct wmi_common_peer_assoc_complete_cmd cmd;
635224c88f78SMichal Kazior 
63535e3dd157SKalle Valo 	/* HT Operation Element of the peer. Five bytes packed in 2
635437ff1b0dSMarcin Rokicki 	 *  INT32 array and filled from lsb to msb.
635537ff1b0dSMarcin Rokicki 	 */
63565e3dd157SKalle Valo 	__le32 peer_ht_info[2];
63575e3dd157SKalle Valo } __packed;
63585e3dd157SKalle Valo 
635924c88f78SMichal Kazior struct wmi_10_1_peer_assoc_complete_cmd {
636024c88f78SMichal Kazior 	struct wmi_common_peer_assoc_complete_cmd cmd;
636124c88f78SMichal Kazior } __packed;
636224c88f78SMichal Kazior 
636324c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0
636424c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f
636524c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4
636624c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0
636724c88f78SMichal Kazior 
636824c88f78SMichal Kazior struct wmi_10_2_peer_assoc_complete_cmd {
636924c88f78SMichal Kazior 	struct wmi_common_peer_assoc_complete_cmd cmd;
637024c88f78SMichal Kazior 	__le32 info0; /* WMI_PEER_ASSOC_INFO0_ */
637124c88f78SMichal Kazior } __packed;
637224c88f78SMichal Kazior 
6373cc914a55SBen Greear #define PEER_BW_RXNSS_OVERRIDE_OFFSET  31
6374cc914a55SBen Greear 
6375b54e16f1SVasanthakumar Thiagarajan struct wmi_10_4_peer_assoc_complete_cmd {
6376b54e16f1SVasanthakumar Thiagarajan 	struct wmi_10_2_peer_assoc_complete_cmd cmd;
6377b54e16f1SVasanthakumar Thiagarajan 	__le32 peer_bw_rxnss_override;
6378b54e16f1SVasanthakumar Thiagarajan } __packed;
6379b54e16f1SVasanthakumar Thiagarajan 
63805e3dd157SKalle Valo struct wmi_peer_assoc_complete_arg {
63815e3dd157SKalle Valo 	u8 addr[ETH_ALEN];
63825e3dd157SKalle Valo 	u32 vdev_id;
63835e3dd157SKalle Valo 	bool peer_reassoc;
63845e3dd157SKalle Valo 	u16 peer_aid;
63855e3dd157SKalle Valo 	u32 peer_flags; /* see %WMI_PEER_ */
63865e3dd157SKalle Valo 	u16 peer_caps;
63875e3dd157SKalle Valo 	u32 peer_listen_intval;
63885e3dd157SKalle Valo 	u32 peer_ht_caps;
63895e3dd157SKalle Valo 	u32 peer_max_mpdu;
63905e3dd157SKalle Valo 	u32 peer_mpdu_density; /* 0..16 */
63915e3dd157SKalle Valo 	u32 peer_rate_caps; /* see %WMI_RC_ */
63925e3dd157SKalle Valo 	struct wmi_rate_set_arg peer_legacy_rates;
63935e3dd157SKalle Valo 	struct wmi_rate_set_arg peer_ht_rates;
63945e3dd157SKalle Valo 	u32 peer_num_spatial_streams;
63955e3dd157SKalle Valo 	u32 peer_vht_caps;
63965e3dd157SKalle Valo 	enum wmi_phy_mode peer_phymode;
63975e3dd157SKalle Valo 	struct wmi_vht_rate_set_arg peer_vht_rates;
6398cc914a55SBen Greear 	u32 peer_bw_rxnss_override;
63995e3dd157SKalle Valo };
64005e3dd157SKalle Valo 
64015e3dd157SKalle Valo struct wmi_peer_add_wds_entry_cmd {
64025e3dd157SKalle Valo 	/* peer MAC address */
64035e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
64045e3dd157SKalle Valo 	/* wds MAC addr */
64055e3dd157SKalle Valo 	struct wmi_mac_addr wds_macaddr;
64065e3dd157SKalle Valo } __packed;
64075e3dd157SKalle Valo 
64085e3dd157SKalle Valo struct wmi_peer_remove_wds_entry_cmd {
64095e3dd157SKalle Valo 	/* wds MAC addr */
64105e3dd157SKalle Valo 	struct wmi_mac_addr wds_macaddr;
64115e3dd157SKalle Valo } __packed;
64125e3dd157SKalle Valo 
64135e3dd157SKalle Valo struct wmi_peer_q_empty_callback_event {
64145e3dd157SKalle Valo 	/* peer MAC address */
64155e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
64165e3dd157SKalle Valo } __packed;
64175e3dd157SKalle Valo 
64185e3dd157SKalle Valo /*
64195e3dd157SKalle Valo  * Channel info WMI event
64205e3dd157SKalle Valo  */
64215e3dd157SKalle Valo struct wmi_chan_info_event {
64225e3dd157SKalle Valo 	__le32 err_code;
64235e3dd157SKalle Valo 	__le32 freq;
64245e3dd157SKalle Valo 	__le32 cmd_flags;
64255e3dd157SKalle Valo 	__le32 noise_floor;
64265e3dd157SKalle Valo 	__le32 rx_clear_count;
64275e3dd157SKalle Valo 	__le32 cycle_count;
64285e3dd157SKalle Valo } __packed;
64295e3dd157SKalle Valo 
6430b2297baaSRaja Mani struct wmi_10_4_chan_info_event {
6431b2297baaSRaja Mani 	__le32 err_code;
6432b2297baaSRaja Mani 	__le32 freq;
6433b2297baaSRaja Mani 	__le32 cmd_flags;
6434b2297baaSRaja Mani 	__le32 noise_floor;
6435b2297baaSRaja Mani 	__le32 rx_clear_count;
6436b2297baaSRaja Mani 	__le32 cycle_count;
6437b2297baaSRaja Mani 	__le32 chan_tx_pwr_range;
6438b2297baaSRaja Mani 	__le32 chan_tx_pwr_tp;
6439b2297baaSRaja Mani 	__le32 rx_frame_count;
6440b2297baaSRaja Mani } __packed;
6441b2297baaSRaja Mani 
64425a13e76eSKalle Valo struct wmi_peer_sta_kickout_event {
64435a13e76eSKalle Valo 	struct wmi_mac_addr peer_macaddr;
64445a13e76eSKalle Valo } __packed;
64455a13e76eSKalle Valo 
64462e1dea40SMichal Kazior #define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
64473d2a2e29SVasanthakumar Thiagarajan #define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1)
64482e1dea40SMichal Kazior 
64495e3dd157SKalle Valo /* Beacon filter wmi command info */
64505e3dd157SKalle Valo #define BCN_FLT_MAX_SUPPORTED_IES	256
64515e3dd157SKalle Valo #define BCN_FLT_MAX_ELEMS_IE_LIST	(BCN_FLT_MAX_SUPPORTED_IES / 32)
64525e3dd157SKalle Valo 
64535e3dd157SKalle Valo struct bss_bcn_stats {
64545e3dd157SKalle Valo 	__le32 vdev_id;
64555e3dd157SKalle Valo 	__le32 bss_bcnsdropped;
64565e3dd157SKalle Valo 	__le32 bss_bcnsdelivered;
64575e3dd157SKalle Valo } __packed;
64585e3dd157SKalle Valo 
64595e3dd157SKalle Valo struct bcn_filter_stats {
64605e3dd157SKalle Valo 	__le32 bcns_dropped;
64615e3dd157SKalle Valo 	__le32 bcns_delivered;
64625e3dd157SKalle Valo 	__le32 activefilters;
64635e3dd157SKalle Valo 	struct bss_bcn_stats bss_stats;
64645e3dd157SKalle Valo } __packed;
64655e3dd157SKalle Valo 
64665e3dd157SKalle Valo struct wmi_add_bcn_filter_cmd {
64675e3dd157SKalle Valo 	u32 vdev_id;
64685e3dd157SKalle Valo 	u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
64695e3dd157SKalle Valo } __packed;
64705e3dd157SKalle Valo 
64715e3dd157SKalle Valo enum wmi_sta_keepalive_method {
64725e3dd157SKalle Valo 	WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
64735e3dd157SKalle Valo 	WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2,
64745e3dd157SKalle Valo };
64755e3dd157SKalle Valo 
647646725b15SMichal Kazior #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
647746725b15SMichal Kazior 
647846725b15SMichal Kazior /* Firmware crashes if keepalive interval exceeds this limit */
647946725b15SMichal Kazior #define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff
648046725b15SMichal Kazior 
64815e3dd157SKalle Valo /* note: ip4 addresses are in network byte order, i.e. big endian */
64825e3dd157SKalle Valo struct wmi_sta_keepalive_arp_resp {
64835e3dd157SKalle Valo 	__be32 src_ip4_addr;
64845e3dd157SKalle Valo 	__be32 dest_ip4_addr;
64855e3dd157SKalle Valo 	struct wmi_mac_addr dest_mac_addr;
64865e3dd157SKalle Valo } __packed;
64875e3dd157SKalle Valo 
64885e3dd157SKalle Valo struct wmi_sta_keepalive_cmd {
64895e3dd157SKalle Valo 	__le32 vdev_id;
64905e3dd157SKalle Valo 	__le32 enabled;
64915e3dd157SKalle Valo 	__le32 method; /* WMI_STA_KEEPALIVE_METHOD_ */
64925e3dd157SKalle Valo 	__le32 interval; /* in seconds */
64935e3dd157SKalle Valo 	struct wmi_sta_keepalive_arp_resp arp_resp;
64945e3dd157SKalle Valo } __packed;
64955e3dd157SKalle Valo 
64966e8b188bSJanusz Dziedzic struct wmi_sta_keepalive_arg {
64976e8b188bSJanusz Dziedzic 	u32 vdev_id;
64986e8b188bSJanusz Dziedzic 	u32 enabled;
64996e8b188bSJanusz Dziedzic 	u32 method;
65006e8b188bSJanusz Dziedzic 	u32 interval;
65016e8b188bSJanusz Dziedzic 	__be32 src_ip4_addr;
65026e8b188bSJanusz Dziedzic 	__be32 dest_ip4_addr;
65036e8b188bSJanusz Dziedzic 	const u8 dest_mac_addr[ETH_ALEN];
65046e8b188bSJanusz Dziedzic };
65056e8b188bSJanusz Dziedzic 
65069cfbce75SMichal Kazior enum wmi_force_fw_hang_type {
65079cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_ASSERT = 1,
65089cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_NO_DETECT,
65099cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_CTRL_EP_FULL,
65109cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_EMPTY_POINT,
65119cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_STACK_OVERFLOW,
65129cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_INFINITE_LOOP,
65139cfbce75SMichal Kazior };
65149cfbce75SMichal Kazior 
65159cfbce75SMichal Kazior #define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF
65169cfbce75SMichal Kazior 
65179cfbce75SMichal Kazior struct wmi_force_fw_hang_cmd {
65189cfbce75SMichal Kazior 	__le32 type;
65199cfbce75SMichal Kazior 	__le32 delay_ms;
65209cfbce75SMichal Kazior } __packed;
65219cfbce75SMichal Kazior 
6522db251d7dSMaharaja Kennadyrajan enum wmi_pdev_reset_mode_type {
6523db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_TX_FLUSH = 1,
6524db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_WARM_RESET,
6525db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_COLD_RESET,
6526db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_WARM_RESET_RESTORE_CAL,
6527db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_COLD_RESET_RESTORE_CAL,
6528db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_MAX,
6529db251d7dSMaharaja Kennadyrajan };
6530db251d7dSMaharaja Kennadyrajan 
6531f118a3e5SKalle Valo enum ath10k_dbglog_level {
6532f118a3e5SKalle Valo 	ATH10K_DBGLOG_LEVEL_VERBOSE = 0,
6533f118a3e5SKalle Valo 	ATH10K_DBGLOG_LEVEL_INFO = 1,
6534f118a3e5SKalle Valo 	ATH10K_DBGLOG_LEVEL_WARN = 2,
6535f118a3e5SKalle Valo 	ATH10K_DBGLOG_LEVEL_ERR = 3,
6536f118a3e5SKalle Valo };
6537f118a3e5SKalle Valo 
6538f118a3e5SKalle Valo /* VAP ids to enable dbglog */
6539f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_VAP_LOG_LSB		0
6540f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_VAP_LOG_MASK		0x0000ffff
6541f118a3e5SKalle Valo 
6542f118a3e5SKalle Valo /* to enable dbglog in the firmware */
6543f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB	16
6544f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK	0x00010000
6545f118a3e5SKalle Valo 
6546f118a3e5SKalle Valo /* timestamp resolution */
6547f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_RESOLUTION_LSB	17
6548f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_RESOLUTION_MASK	0x000E0000
6549f118a3e5SKalle Valo 
6550f118a3e5SKalle Valo /* number of queued messages before sending them to the host */
6551f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB	20
6552f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK	0x0ff00000
6553f118a3e5SKalle Valo 
6554f118a3e5SKalle Valo /*
6555f118a3e5SKalle Valo  * Log levels to enable. This defines the minimum level to enable, this is
6556f118a3e5SKalle Valo  * not a bitmask. See enum ath10k_dbglog_level for the values.
6557f118a3e5SKalle Valo  */
6558f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_LOG_LVL_LSB		28
6559f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_LOG_LVL_MASK		0x70000000
6560f118a3e5SKalle Valo 
6561f118a3e5SKalle Valo /*
6562f118a3e5SKalle Valo  * Note: this is a cleaned up version of a struct firmware uses. For
6563f118a3e5SKalle Valo  * example, config_valid was hidden inside an array.
6564f118a3e5SKalle Valo  */
6565f118a3e5SKalle Valo struct wmi_dbglog_cfg_cmd {
6566f118a3e5SKalle Valo 	/* bitmask to hold mod id config*/
6567f118a3e5SKalle Valo 	__le32 module_enable;
6568f118a3e5SKalle Valo 
6569f118a3e5SKalle Valo 	/* see ATH10K_DBGLOG_CFG_ */
6570f118a3e5SKalle Valo 	__le32 config_enable;
6571f118a3e5SKalle Valo 
6572f118a3e5SKalle Valo 	/* mask of module id bits to be changed */
6573f118a3e5SKalle Valo 	__le32 module_valid;
6574f118a3e5SKalle Valo 
6575f118a3e5SKalle Valo 	/* mask of config bits to be changed, see ATH10K_DBGLOG_CFG_ */
6576f118a3e5SKalle Valo 	__le32 config_valid;
6577f118a3e5SKalle Valo } __packed;
6578f118a3e5SKalle Valo 
6579afcbc82cSMaharaja Kennadyrajan struct wmi_10_4_dbglog_cfg_cmd {
6580afcbc82cSMaharaja Kennadyrajan 	/* bitmask to hold mod id config*/
6581afcbc82cSMaharaja Kennadyrajan 	__le64 module_enable;
6582afcbc82cSMaharaja Kennadyrajan 
6583afcbc82cSMaharaja Kennadyrajan 	/* see ATH10K_DBGLOG_CFG_ */
6584afcbc82cSMaharaja Kennadyrajan 	__le32 config_enable;
6585afcbc82cSMaharaja Kennadyrajan 
6586afcbc82cSMaharaja Kennadyrajan 	/* mask of module id bits to be changed */
6587afcbc82cSMaharaja Kennadyrajan 	__le64 module_valid;
6588afcbc82cSMaharaja Kennadyrajan 
6589afcbc82cSMaharaja Kennadyrajan 	/* mask of config bits to be changed, see ATH10K_DBGLOG_CFG_ */
6590afcbc82cSMaharaja Kennadyrajan 	__le32 config_valid;
6591afcbc82cSMaharaja Kennadyrajan } __packed;
6592afcbc82cSMaharaja Kennadyrajan 
6593c1a4654aSMichal Kazior enum wmi_roam_reason {
6594c1a4654aSMichal Kazior 	WMI_ROAM_REASON_BETTER_AP = 1,
6595c1a4654aSMichal Kazior 	WMI_ROAM_REASON_BEACON_MISS = 2,
6596c1a4654aSMichal Kazior 	WMI_ROAM_REASON_LOW_RSSI = 3,
6597c1a4654aSMichal Kazior 	WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
6598c1a4654aSMichal Kazior 	WMI_ROAM_REASON_HO_FAILED = 5,
6599c1a4654aSMichal Kazior 
6600c1a4654aSMichal Kazior 	/* keep last */
6601c1a4654aSMichal Kazior 	WMI_ROAM_REASON_MAX,
6602c1a4654aSMichal Kazior };
6603c1a4654aSMichal Kazior 
6604c1a4654aSMichal Kazior struct wmi_roam_ev {
6605c1a4654aSMichal Kazior 	__le32 vdev_id;
6606c1a4654aSMichal Kazior 	__le32 reason;
6607c1a4654aSMichal Kazior } __packed;
6608c1a4654aSMichal Kazior 
66095e3dd157SKalle Valo #define ATH10K_FRAGMT_THRESHOLD_MIN	540
66105e3dd157SKalle Valo #define ATH10K_FRAGMT_THRESHOLD_MAX	2346
66115e3dd157SKalle Valo 
66125e3dd157SKalle Valo #define WMI_MAX_EVENT 0x1000
66135e3dd157SKalle Valo /* Maximum number of pending TXed WMI packets */
66145e3dd157SKalle Valo #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
66155e3dd157SKalle Valo 
66165e3dd157SKalle Valo /* By default disable power save for IBSS */
66175e3dd157SKalle Valo #define ATH10K_DEFAULT_ATIM 0
66185e3dd157SKalle Valo 
66195c01aa3dSMichal Kazior #define WMI_MAX_MEM_REQS 16
66205c01aa3dSMichal Kazior 
662132653cf1SMichal Kazior struct wmi_scan_ev_arg {
662232653cf1SMichal Kazior 	__le32 event_type; /* %WMI_SCAN_EVENT_ */
662332653cf1SMichal Kazior 	__le32 reason; /* %WMI_SCAN_REASON_ */
662432653cf1SMichal Kazior 	__le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
662532653cf1SMichal Kazior 	__le32 scan_req_id;
662632653cf1SMichal Kazior 	__le32 scan_id;
662732653cf1SMichal Kazior 	__le32 vdev_id;
662832653cf1SMichal Kazior };
662932653cf1SMichal Kazior 
6630dc405152SRakesh Pillai struct wmi_tlv_mgmt_tx_compl_ev_arg {
6631dc405152SRakesh Pillai 	__le32 desc_id;
6632dc405152SRakesh Pillai 	__le32 status;
6633dc405152SRakesh Pillai 	__le32 pdev_id;
6634dc405152SRakesh Pillai };
6635dc405152SRakesh Pillai 
663632653cf1SMichal Kazior struct wmi_mgmt_rx_ev_arg {
663732653cf1SMichal Kazior 	__le32 channel;
663832653cf1SMichal Kazior 	__le32 snr;
663932653cf1SMichal Kazior 	__le32 rate;
664032653cf1SMichal Kazior 	__le32 phy_mode;
664132653cf1SMichal Kazior 	__le32 buf_len;
664232653cf1SMichal Kazior 	__le32 status; /* %WMI_RX_STATUS_ */
66438d130963SPeter Oh 	struct wmi_mgmt_rx_ext_info ext_info;
664432653cf1SMichal Kazior };
664532653cf1SMichal Kazior 
664632653cf1SMichal Kazior struct wmi_ch_info_ev_arg {
664732653cf1SMichal Kazior 	__le32 err_code;
664832653cf1SMichal Kazior 	__le32 freq;
664932653cf1SMichal Kazior 	__le32 cmd_flags;
665032653cf1SMichal Kazior 	__le32 noise_floor;
665132653cf1SMichal Kazior 	__le32 rx_clear_count;
665232653cf1SMichal Kazior 	__le32 cycle_count;
6653b2297baaSRaja Mani 	__le32 chan_tx_pwr_range;
6654b2297baaSRaja Mani 	__le32 chan_tx_pwr_tp;
6655b2297baaSRaja Mani 	__le32 rx_frame_count;
665632653cf1SMichal Kazior };
665732653cf1SMichal Kazior 
665832653cf1SMichal Kazior struct wmi_vdev_start_ev_arg {
665932653cf1SMichal Kazior 	__le32 vdev_id;
666032653cf1SMichal Kazior 	__le32 req_id;
666132653cf1SMichal Kazior 	__le32 resp_type; /* %WMI_VDEV_RESP_ */
666232653cf1SMichal Kazior 	__le32 status;
666332653cf1SMichal Kazior };
666432653cf1SMichal Kazior 
666532653cf1SMichal Kazior struct wmi_peer_kick_ev_arg {
666632653cf1SMichal Kazior 	const u8 *mac_addr;
666732653cf1SMichal Kazior };
666832653cf1SMichal Kazior 
666932653cf1SMichal Kazior struct wmi_swba_ev_arg {
667032653cf1SMichal Kazior 	__le32 vdev_map;
6671a03fee34SRaja Mani 	struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV];
667232653cf1SMichal Kazior 	const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV];
667332653cf1SMichal Kazior };
667432653cf1SMichal Kazior 
667532653cf1SMichal Kazior struct wmi_phyerr_ev_arg {
6676991adf71SRaja Mani 	u32 tsf_timestamp;
6677991adf71SRaja Mani 	u16 freq1;
6678991adf71SRaja Mani 	u16 freq2;
6679991adf71SRaja Mani 	u8 rssi_combined;
6680991adf71SRaja Mani 	u8 chan_width_mhz;
6681991adf71SRaja Mani 	u8 phy_err_code;
6682991adf71SRaja Mani 	u16 nf_chains[4];
6683991adf71SRaja Mani 	u32 buf_len;
6684991adf71SRaja Mani 	const u8 *buf;
6685991adf71SRaja Mani 	u8 hdr_len;
6686991adf71SRaja Mani };
6687991adf71SRaja Mani 
6688991adf71SRaja Mani struct wmi_phyerr_hdr_arg {
6689991adf71SRaja Mani 	u32 num_phyerrs;
6690991adf71SRaja Mani 	u32 tsf_l32;
6691991adf71SRaja Mani 	u32 tsf_u32;
6692991adf71SRaja Mani 	u32 buf_len;
6693991adf71SRaja Mani 	const void *phyerrs;
669432653cf1SMichal Kazior };
669532653cf1SMichal Kazior 
66966f6eb1bcSSriram R struct wmi_dfs_status_ev_arg {
66976f6eb1bcSSriram R 	u32 status;
66986f6eb1bcSSriram R };
66996f6eb1bcSSriram R 
67005c01aa3dSMichal Kazior struct wmi_svc_rdy_ev_arg {
67015c01aa3dSMichal Kazior 	__le32 min_tx_power;
67025c01aa3dSMichal Kazior 	__le32 max_tx_power;
67035c01aa3dSMichal Kazior 	__le32 ht_cap;
67045c01aa3dSMichal Kazior 	__le32 vht_cap;
67055c01aa3dSMichal Kazior 	__le32 sw_ver0;
67065c01aa3dSMichal Kazior 	__le32 sw_ver1;
6707ca996ec5SMichal Kazior 	__le32 fw_build;
67085c01aa3dSMichal Kazior 	__le32 phy_capab;
67095c01aa3dSMichal Kazior 	__le32 num_rf_chains;
67105c01aa3dSMichal Kazior 	__le32 eeprom_rd;
67115c01aa3dSMichal Kazior 	__le32 num_mem_reqs;
6712523f6701STamizh chelvam 	__le32 low_5ghz_chan;
6713523f6701STamizh chelvam 	__le32 high_5ghz_chan;
67145c01aa3dSMichal Kazior 	const __le32 *service_map;
67152a3e60d3SMichal Kazior 	size_t service_map_len;
67165c01aa3dSMichal Kazior 	const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
67175c01aa3dSMichal Kazior };
67185c01aa3dSMichal Kazior 
6719cea19a6cSCarl Huang struct wmi_svc_avail_ev_arg {
6720cea19a6cSCarl Huang 	__le32 service_map_ext_len;
6721cea19a6cSCarl Huang 	const __le32 *service_map_ext;
6722cea19a6cSCarl Huang };
6723cea19a6cSCarl Huang 
672432653cf1SMichal Kazior struct wmi_rdy_ev_arg {
672532653cf1SMichal Kazior 	__le32 sw_version;
672632653cf1SMichal Kazior 	__le32 abi_version;
672732653cf1SMichal Kazior 	__le32 status;
672832653cf1SMichal Kazior 	const u8 *mac_addr;
672932653cf1SMichal Kazior };
673032653cf1SMichal Kazior 
6731c1a4654aSMichal Kazior struct wmi_roam_ev_arg {
6732c1a4654aSMichal Kazior 	__le32 vdev_id;
6733c1a4654aSMichal Kazior 	__le32 reason;
6734c1a4654aSMichal Kazior 	__le32 rssi;
6735c1a4654aSMichal Kazior };
6736c1a4654aSMichal Kazior 
673784d4911bSMichal Kazior struct wmi_echo_ev_arg {
673884d4911bSMichal Kazior 	__le32 value;
673984d4911bSMichal Kazior };
674084d4911bSMichal Kazior 
6741a57a6a27SRajkumar Manoharan struct wmi_pdev_temperature_event {
6742a57a6a27SRajkumar Manoharan 	/* temperature value in Celcius degree */
6743a57a6a27SRajkumar Manoharan 	__le32 temperature;
6744a57a6a27SRajkumar Manoharan } __packed;
6745a57a6a27SRajkumar Manoharan 
674689d2d183SRajkumar Manoharan struct wmi_pdev_bss_chan_info_event {
674789d2d183SRajkumar Manoharan 	__le32 freq;
674889d2d183SRajkumar Manoharan 	__le32 noise_floor;
674989d2d183SRajkumar Manoharan 	__le64 cycle_busy;
675089d2d183SRajkumar Manoharan 	__le64 cycle_total;
675189d2d183SRajkumar Manoharan 	__le64 cycle_tx;
675289d2d183SRajkumar Manoharan 	__le64 cycle_rx;
675389d2d183SRajkumar Manoharan 	__le64 cycle_rx_bss;
675489d2d183SRajkumar Manoharan 	__le32 reserved;
675589d2d183SRajkumar Manoharan } __packed;
675689d2d183SRajkumar Manoharan 
6757f5431e87SJanusz Dziedzic /* WOW structures */
6758f5431e87SJanusz Dziedzic enum wmi_wow_wakeup_event {
6759f5431e87SJanusz Dziedzic 	WOW_BMISS_EVENT = 0,
6760f5431e87SJanusz Dziedzic 	WOW_BETTER_AP_EVENT,
6761f5431e87SJanusz Dziedzic 	WOW_DEAUTH_RECVD_EVENT,
6762f5431e87SJanusz Dziedzic 	WOW_MAGIC_PKT_RECVD_EVENT,
6763f5431e87SJanusz Dziedzic 	WOW_GTK_ERR_EVENT,
6764f5431e87SJanusz Dziedzic 	WOW_FOURWAY_HSHAKE_EVENT,
6765f5431e87SJanusz Dziedzic 	WOW_EAPOL_RECVD_EVENT,
6766f5431e87SJanusz Dziedzic 	WOW_NLO_DETECTED_EVENT,
6767f5431e87SJanusz Dziedzic 	WOW_DISASSOC_RECVD_EVENT,
6768f5431e87SJanusz Dziedzic 	WOW_PATTERN_MATCH_EVENT,
6769f5431e87SJanusz Dziedzic 	WOW_CSA_IE_EVENT,
6770f5431e87SJanusz Dziedzic 	WOW_PROBE_REQ_WPS_IE_EVENT,
6771f5431e87SJanusz Dziedzic 	WOW_AUTH_REQ_EVENT,
6772f5431e87SJanusz Dziedzic 	WOW_ASSOC_REQ_EVENT,
6773f5431e87SJanusz Dziedzic 	WOW_HTT_EVENT,
6774f5431e87SJanusz Dziedzic 	WOW_RA_MATCH_EVENT,
6775f5431e87SJanusz Dziedzic 	WOW_HOST_AUTO_SHUTDOWN_EVENT,
6776f5431e87SJanusz Dziedzic 	WOW_IOAC_MAGIC_EVENT,
6777f5431e87SJanusz Dziedzic 	WOW_IOAC_SHORT_EVENT,
6778f5431e87SJanusz Dziedzic 	WOW_IOAC_EXTEND_EVENT,
6779f5431e87SJanusz Dziedzic 	WOW_IOAC_TIMER_EVENT,
6780f5431e87SJanusz Dziedzic 	WOW_DFS_PHYERR_RADAR_EVENT,
6781f5431e87SJanusz Dziedzic 	WOW_BEACON_EVENT,
6782f5431e87SJanusz Dziedzic 	WOW_CLIENT_KICKOUT_EVENT,
6783f5431e87SJanusz Dziedzic 	WOW_EVENT_MAX,
6784f5431e87SJanusz Dziedzic };
6785f5431e87SJanusz Dziedzic 
6786f5431e87SJanusz Dziedzic #define C2S(x) case x: return #x
6787f5431e87SJanusz Dziedzic 
6788f5431e87SJanusz Dziedzic static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
6789f5431e87SJanusz Dziedzic {
6790f5431e87SJanusz Dziedzic 	switch (ev) {
6791f5431e87SJanusz Dziedzic 	C2S(WOW_BMISS_EVENT);
6792f5431e87SJanusz Dziedzic 	C2S(WOW_BETTER_AP_EVENT);
6793f5431e87SJanusz Dziedzic 	C2S(WOW_DEAUTH_RECVD_EVENT);
6794f5431e87SJanusz Dziedzic 	C2S(WOW_MAGIC_PKT_RECVD_EVENT);
6795f5431e87SJanusz Dziedzic 	C2S(WOW_GTK_ERR_EVENT);
6796f5431e87SJanusz Dziedzic 	C2S(WOW_FOURWAY_HSHAKE_EVENT);
6797f5431e87SJanusz Dziedzic 	C2S(WOW_EAPOL_RECVD_EVENT);
6798f5431e87SJanusz Dziedzic 	C2S(WOW_NLO_DETECTED_EVENT);
6799f5431e87SJanusz Dziedzic 	C2S(WOW_DISASSOC_RECVD_EVENT);
6800f5431e87SJanusz Dziedzic 	C2S(WOW_PATTERN_MATCH_EVENT);
6801f5431e87SJanusz Dziedzic 	C2S(WOW_CSA_IE_EVENT);
6802f5431e87SJanusz Dziedzic 	C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
6803f5431e87SJanusz Dziedzic 	C2S(WOW_AUTH_REQ_EVENT);
6804f5431e87SJanusz Dziedzic 	C2S(WOW_ASSOC_REQ_EVENT);
6805f5431e87SJanusz Dziedzic 	C2S(WOW_HTT_EVENT);
6806f5431e87SJanusz Dziedzic 	C2S(WOW_RA_MATCH_EVENT);
6807f5431e87SJanusz Dziedzic 	C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
6808f5431e87SJanusz Dziedzic 	C2S(WOW_IOAC_MAGIC_EVENT);
6809f5431e87SJanusz Dziedzic 	C2S(WOW_IOAC_SHORT_EVENT);
6810f5431e87SJanusz Dziedzic 	C2S(WOW_IOAC_EXTEND_EVENT);
6811f5431e87SJanusz Dziedzic 	C2S(WOW_IOAC_TIMER_EVENT);
6812f5431e87SJanusz Dziedzic 	C2S(WOW_DFS_PHYERR_RADAR_EVENT);
6813f5431e87SJanusz Dziedzic 	C2S(WOW_BEACON_EVENT);
6814f5431e87SJanusz Dziedzic 	C2S(WOW_CLIENT_KICKOUT_EVENT);
6815f5431e87SJanusz Dziedzic 	C2S(WOW_EVENT_MAX);
6816f5431e87SJanusz Dziedzic 	default:
6817f5431e87SJanusz Dziedzic 		return NULL;
6818f5431e87SJanusz Dziedzic 	}
6819f5431e87SJanusz Dziedzic }
6820f5431e87SJanusz Dziedzic 
6821f5431e87SJanusz Dziedzic enum wmi_wow_wake_reason {
6822f5431e87SJanusz Dziedzic 	WOW_REASON_UNSPECIFIED = -1,
6823f5431e87SJanusz Dziedzic 	WOW_REASON_NLOD = 0,
6824f5431e87SJanusz Dziedzic 	WOW_REASON_AP_ASSOC_LOST,
6825f5431e87SJanusz Dziedzic 	WOW_REASON_LOW_RSSI,
6826f5431e87SJanusz Dziedzic 	WOW_REASON_DEAUTH_RECVD,
6827f5431e87SJanusz Dziedzic 	WOW_REASON_DISASSOC_RECVD,
6828f5431e87SJanusz Dziedzic 	WOW_REASON_GTK_HS_ERR,
6829f5431e87SJanusz Dziedzic 	WOW_REASON_EAP_REQ,
6830f5431e87SJanusz Dziedzic 	WOW_REASON_FOURWAY_HS_RECV,
6831f5431e87SJanusz Dziedzic 	WOW_REASON_TIMER_INTR_RECV,
6832f5431e87SJanusz Dziedzic 	WOW_REASON_PATTERN_MATCH_FOUND,
6833f5431e87SJanusz Dziedzic 	WOW_REASON_RECV_MAGIC_PATTERN,
6834f5431e87SJanusz Dziedzic 	WOW_REASON_P2P_DISC,
6835f5431e87SJanusz Dziedzic 	WOW_REASON_WLAN_HB,
6836f5431e87SJanusz Dziedzic 	WOW_REASON_CSA_EVENT,
6837f5431e87SJanusz Dziedzic 	WOW_REASON_PROBE_REQ_WPS_IE_RECV,
6838f5431e87SJanusz Dziedzic 	WOW_REASON_AUTH_REQ_RECV,
6839f5431e87SJanusz Dziedzic 	WOW_REASON_ASSOC_REQ_RECV,
6840f5431e87SJanusz Dziedzic 	WOW_REASON_HTT_EVENT,
6841f5431e87SJanusz Dziedzic 	WOW_REASON_RA_MATCH,
6842f5431e87SJanusz Dziedzic 	WOW_REASON_HOST_AUTO_SHUTDOWN,
6843f5431e87SJanusz Dziedzic 	WOW_REASON_IOAC_MAGIC_EVENT,
6844f5431e87SJanusz Dziedzic 	WOW_REASON_IOAC_SHORT_EVENT,
6845f5431e87SJanusz Dziedzic 	WOW_REASON_IOAC_EXTEND_EVENT,
6846f5431e87SJanusz Dziedzic 	WOW_REASON_IOAC_TIMER_EVENT,
6847f5431e87SJanusz Dziedzic 	WOW_REASON_ROAM_HO,
6848f5431e87SJanusz Dziedzic 	WOW_REASON_DFS_PHYERR_RADADR_EVENT,
6849f5431e87SJanusz Dziedzic 	WOW_REASON_BEACON_RECV,
6850f5431e87SJanusz Dziedzic 	WOW_REASON_CLIENT_KICKOUT_EVENT,
6851f5431e87SJanusz Dziedzic 	WOW_REASON_DEBUG_TEST = 0xFF,
6852f5431e87SJanusz Dziedzic };
6853f5431e87SJanusz Dziedzic 
6854f5431e87SJanusz Dziedzic static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
6855f5431e87SJanusz Dziedzic {
6856f5431e87SJanusz Dziedzic 	switch (reason) {
6857f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_UNSPECIFIED);
6858f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_NLOD);
6859f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_AP_ASSOC_LOST);
6860f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_LOW_RSSI);
6861f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_DEAUTH_RECVD);
6862f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_DISASSOC_RECVD);
6863f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_GTK_HS_ERR);
6864f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_EAP_REQ);
6865f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_FOURWAY_HS_RECV);
6866f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_TIMER_INTR_RECV);
6867f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_PATTERN_MATCH_FOUND);
6868f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_RECV_MAGIC_PATTERN);
6869f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_P2P_DISC);
6870f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_WLAN_HB);
6871f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_CSA_EVENT);
6872f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
6873f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_AUTH_REQ_RECV);
6874f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_ASSOC_REQ_RECV);
6875f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_HTT_EVENT);
6876f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_RA_MATCH);
6877f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
6878f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_IOAC_MAGIC_EVENT);
6879f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_IOAC_SHORT_EVENT);
6880f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_IOAC_EXTEND_EVENT);
6881f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_IOAC_TIMER_EVENT);
6882f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_ROAM_HO);
6883f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
6884f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_BEACON_RECV);
6885f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
6886f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_DEBUG_TEST);
6887f5431e87SJanusz Dziedzic 	default:
6888f5431e87SJanusz Dziedzic 		return NULL;
6889f5431e87SJanusz Dziedzic 	}
6890f5431e87SJanusz Dziedzic }
6891f5431e87SJanusz Dziedzic 
6892f5431e87SJanusz Dziedzic #undef C2S
6893f5431e87SJanusz Dziedzic 
6894f5431e87SJanusz Dziedzic struct wmi_wow_ev_arg {
6895f5431e87SJanusz Dziedzic 	u32 vdev_id;
6896f5431e87SJanusz Dziedzic 	u32 flag;
6897f5431e87SJanusz Dziedzic 	enum wmi_wow_wake_reason wake_reason;
6898f5431e87SJanusz Dziedzic 	u32 data_len;
6899f5431e87SJanusz Dziedzic };
6900f5431e87SJanusz Dziedzic 
690125c86619SJanusz Dziedzic #define WOW_MIN_PATTERN_SIZE	1
690225c86619SJanusz Dziedzic #define WOW_MAX_PATTERN_SIZE	148
690325c86619SJanusz Dziedzic #define WOW_MAX_PKT_OFFSET	128
6904fa3440faSWen Gong #define WOW_HDR_LEN	(sizeof(struct ieee80211_hdr_3addr) + \
6905fa3440faSWen Gong 	sizeof(struct rfc1042_hdr))
6906fa3440faSWen Gong #define WOW_MAX_REDUCE	(WOW_HDR_LEN - sizeof(struct ethhdr) - \
6907fa3440faSWen Gong 	offsetof(struct ieee80211_hdr_3addr, addr1))
690825c86619SJanusz Dziedzic 
6909ad45c888SMarek Puzyniak enum wmi_tdls_state {
6910ad45c888SMarek Puzyniak 	WMI_TDLS_DISABLE,
6911ad45c888SMarek Puzyniak 	WMI_TDLS_ENABLE_PASSIVE,
6912ad45c888SMarek Puzyniak 	WMI_TDLS_ENABLE_ACTIVE,
69134c9f8d11SYingying Tang 	WMI_TDLS_ENABLE_ACTIVE_EXTERNAL_CONTROL,
6914ad45c888SMarek Puzyniak };
6915ad45c888SMarek Puzyniak 
6916ad45c888SMarek Puzyniak enum wmi_tdls_peer_state {
6917ad45c888SMarek Puzyniak 	WMI_TDLS_PEER_STATE_PEERING,
6918ad45c888SMarek Puzyniak 	WMI_TDLS_PEER_STATE_CONNECTED,
6919ad45c888SMarek Puzyniak 	WMI_TDLS_PEER_STATE_TEARDOWN,
6920ad45c888SMarek Puzyniak };
6921ad45c888SMarek Puzyniak 
6922ad45c888SMarek Puzyniak struct wmi_tdls_peer_update_cmd_arg {
6923ad45c888SMarek Puzyniak 	u32 vdev_id;
6924ad45c888SMarek Puzyniak 	enum wmi_tdls_peer_state peer_state;
6925ad45c888SMarek Puzyniak 	u8 addr[ETH_ALEN];
6926ad45c888SMarek Puzyniak };
6927ad45c888SMarek Puzyniak 
6928ad45c888SMarek Puzyniak #define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32
6929ad45c888SMarek Puzyniak 
6930add6cd8dSManikanta Pubbisetty #define WMI_TDLS_PEER_SP_MASK	0x60
6931add6cd8dSManikanta Pubbisetty #define WMI_TDLS_PEER_SP_LSB	5
6932add6cd8dSManikanta Pubbisetty 
6933add6cd8dSManikanta Pubbisetty enum wmi_tdls_options {
6934add6cd8dSManikanta Pubbisetty 	WMI_TDLS_OFFCHAN_EN = BIT(0),
6935add6cd8dSManikanta Pubbisetty 	WMI_TDLS_BUFFER_STA_EN = BIT(1),
6936add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SLEEP_STA_EN = BIT(2),
6937add6cd8dSManikanta Pubbisetty };
6938add6cd8dSManikanta Pubbisetty 
6939add6cd8dSManikanta Pubbisetty enum {
6940add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_QOS_AC_VO = BIT(0),
6941add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_QOS_AC_VI = BIT(1),
6942add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_QOS_AC_BK = BIT(2),
6943add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_QOS_AC_BE = BIT(3),
6944add6cd8dSManikanta Pubbisetty };
6945add6cd8dSManikanta Pubbisetty 
6946ad45c888SMarek Puzyniak struct wmi_tdls_peer_capab_arg {
6947ad45c888SMarek Puzyniak 	u8 peer_uapsd_queues;
6948ad45c888SMarek Puzyniak 	u8 peer_max_sp;
6949ad45c888SMarek Puzyniak 	u32 buff_sta_support;
6950ad45c888SMarek Puzyniak 	u32 off_chan_support;
6951ad45c888SMarek Puzyniak 	u32 peer_curr_operclass;
6952ad45c888SMarek Puzyniak 	u32 self_curr_operclass;
6953ad45c888SMarek Puzyniak 	u32 peer_chan_len;
6954ad45c888SMarek Puzyniak 	u32 peer_operclass_len;
6955ad45c888SMarek Puzyniak 	u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
6956ad45c888SMarek Puzyniak 	u32 is_peer_responder;
6957ad45c888SMarek Puzyniak 	u32 pref_offchan_num;
6958ad45c888SMarek Puzyniak 	u32 pref_offchan_bw;
6959ad45c888SMarek Puzyniak };
6960ad45c888SMarek Puzyniak 
6961add6cd8dSManikanta Pubbisetty struct wmi_10_4_tdls_set_state_cmd {
6962add6cd8dSManikanta Pubbisetty 	__le32 vdev_id;
6963add6cd8dSManikanta Pubbisetty 	__le32 state;
6964add6cd8dSManikanta Pubbisetty 	__le32 notification_interval_ms;
6965add6cd8dSManikanta Pubbisetty 	__le32 tx_discovery_threshold;
6966add6cd8dSManikanta Pubbisetty 	__le32 tx_teardown_threshold;
6967add6cd8dSManikanta Pubbisetty 	__le32 rssi_teardown_threshold;
6968add6cd8dSManikanta Pubbisetty 	__le32 rssi_delta;
6969add6cd8dSManikanta Pubbisetty 	__le32 tdls_options;
6970add6cd8dSManikanta Pubbisetty 	__le32 tdls_peer_traffic_ind_window;
6971add6cd8dSManikanta Pubbisetty 	__le32 tdls_peer_traffic_response_timeout_ms;
6972add6cd8dSManikanta Pubbisetty 	__le32 tdls_puapsd_mask;
6973add6cd8dSManikanta Pubbisetty 	__le32 tdls_puapsd_inactivity_time_ms;
6974add6cd8dSManikanta Pubbisetty 	__le32 tdls_puapsd_rx_frame_threshold;
6975add6cd8dSManikanta Pubbisetty 	__le32 teardown_notification_ms;
6976add6cd8dSManikanta Pubbisetty 	__le32 tdls_peer_kickout_threshold;
6977add6cd8dSManikanta Pubbisetty } __packed;
6978add6cd8dSManikanta Pubbisetty 
6979add6cd8dSManikanta Pubbisetty struct wmi_tdls_peer_capabilities {
6980add6cd8dSManikanta Pubbisetty 	__le32 peer_qos;
6981add6cd8dSManikanta Pubbisetty 	__le32 buff_sta_support;
6982add6cd8dSManikanta Pubbisetty 	__le32 off_chan_support;
6983add6cd8dSManikanta Pubbisetty 	__le32 peer_curr_operclass;
6984add6cd8dSManikanta Pubbisetty 	__le32 self_curr_operclass;
6985add6cd8dSManikanta Pubbisetty 	__le32 peer_chan_len;
6986add6cd8dSManikanta Pubbisetty 	__le32 peer_operclass_len;
6987add6cd8dSManikanta Pubbisetty 	u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
6988add6cd8dSManikanta Pubbisetty 	__le32 is_peer_responder;
6989add6cd8dSManikanta Pubbisetty 	__le32 pref_offchan_num;
6990add6cd8dSManikanta Pubbisetty 	__le32 pref_offchan_bw;
6991add6cd8dSManikanta Pubbisetty 	struct wmi_channel peer_chan_list[1];
6992add6cd8dSManikanta Pubbisetty } __packed;
6993add6cd8dSManikanta Pubbisetty 
6994add6cd8dSManikanta Pubbisetty struct wmi_10_4_tdls_peer_update_cmd {
6995add6cd8dSManikanta Pubbisetty 	__le32 vdev_id;
6996add6cd8dSManikanta Pubbisetty 	struct wmi_mac_addr peer_macaddr;
6997add6cd8dSManikanta Pubbisetty 	__le32 peer_state;
6998add6cd8dSManikanta Pubbisetty 	__le32 reserved[4];
6999add6cd8dSManikanta Pubbisetty 	struct wmi_tdls_peer_capabilities peer_capab;
7000add6cd8dSManikanta Pubbisetty } __packed;
7001add6cd8dSManikanta Pubbisetty 
7002add6cd8dSManikanta Pubbisetty enum wmi_tdls_peer_reason {
7003add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_TX,
7004add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_RSSI,
7005add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_SCAN,
7006add6cd8dSManikanta Pubbisetty 	WMI_TDLS_DISCONNECTED_REASON_PEER_DELETE,
7007add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT,
7008add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_BAD_PTR,
7009add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE,
7010add6cd8dSManikanta Pubbisetty 	WMI_TDLS_ENTER_BUF_STA,
7011add6cd8dSManikanta Pubbisetty 	WMI_TDLS_EXIT_BUF_STA,
7012add6cd8dSManikanta Pubbisetty 	WMI_TDLS_ENTER_BT_BUSY_MODE,
7013add6cd8dSManikanta Pubbisetty 	WMI_TDLS_EXIT_BT_BUSY_MODE,
7014add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SCAN_STARTED_EVENT,
7015add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SCAN_COMPLETED_EVENT,
7016add6cd8dSManikanta Pubbisetty };
7017add6cd8dSManikanta Pubbisetty 
7018add6cd8dSManikanta Pubbisetty enum wmi_tdls_peer_notification {
7019add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SHOULD_DISCOVER,
7020add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SHOULD_TEARDOWN,
7021add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_DISCONNECTED,
7022add6cd8dSManikanta Pubbisetty 	WMI_TDLS_CONNECTION_TRACKER_NOTIFICATION,
7023add6cd8dSManikanta Pubbisetty };
7024add6cd8dSManikanta Pubbisetty 
7025add6cd8dSManikanta Pubbisetty struct wmi_tdls_peer_event {
7026add6cd8dSManikanta Pubbisetty 	struct wmi_mac_addr peer_macaddr;
7027add6cd8dSManikanta Pubbisetty 	/* see enum wmi_tdls_peer_notification*/
7028add6cd8dSManikanta Pubbisetty 	__le32 peer_status;
7029add6cd8dSManikanta Pubbisetty 	/* see enum wmi_tdls_peer_reason */
7030add6cd8dSManikanta Pubbisetty 	__le32 peer_reason;
7031add6cd8dSManikanta Pubbisetty 	__le32 vdev_id;
7032add6cd8dSManikanta Pubbisetty } __packed;
7033add6cd8dSManikanta Pubbisetty 
703408e75ea8SVivek Natarajan enum wmi_txbf_conf {
703508e75ea8SVivek Natarajan 	WMI_TXBF_CONF_UNSUPPORTED,
703608e75ea8SVivek Natarajan 	WMI_TXBF_CONF_BEFORE_ASSOC,
703708e75ea8SVivek Natarajan 	WMI_TXBF_CONF_AFTER_ASSOC,
703808e75ea8SVivek Natarajan };
703908e75ea8SVivek Natarajan 
704062f77f09SMaharaja #define	WMI_CCA_DETECT_LEVEL_AUTO	0
704162f77f09SMaharaja #define	WMI_CCA_DETECT_MARGIN_AUTO	0
704262f77f09SMaharaja 
704362f77f09SMaharaja struct wmi_pdev_set_adaptive_cca_params {
704462f77f09SMaharaja 	__le32 enable;
704562f77f09SMaharaja 	__le32 cca_detect_level;
704662f77f09SMaharaja 	__le32 cca_detect_margin;
704762f77f09SMaharaja } __packed;
704862f77f09SMaharaja 
704947771902SRaja Mani enum wmi_host_platform_type {
705047771902SRaja Mani 	WMI_HOST_PLATFORM_HIGH_PERF,
705147771902SRaja Mani 	WMI_HOST_PLATFORM_LOW_PERF,
705247771902SRaja Mani };
705347771902SRaja Mani 
70548a0b459eSRajkumar Manoharan enum wmi_bss_survey_req_type {
70558a0b459eSRajkumar Manoharan 	WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
70568a0b459eSRajkumar Manoharan 	WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
70578a0b459eSRajkumar Manoharan };
70588a0b459eSRajkumar Manoharan 
70598a0b459eSRajkumar Manoharan struct wmi_pdev_chan_info_req_cmd {
70608a0b459eSRajkumar Manoharan 	__le32 type;
70618a0b459eSRajkumar Manoharan 	__le32 reserved;
70628a0b459eSRajkumar Manoharan } __packed;
70638a0b459eSRajkumar Manoharan 
70645e3dd157SKalle Valo struct ath10k;
70655e3dd157SKalle Valo struct ath10k_vif;
70660226d602SMichal Kazior struct ath10k_fw_stats_pdev;
70670226d602SMichal Kazior struct ath10k_fw_stats_peer;
7068bc6f9ae6SManikanta Pubbisetty struct ath10k_fw_stats;
70695e3dd157SKalle Valo 
70705e3dd157SKalle Valo int ath10k_wmi_attach(struct ath10k *ar);
70715e3dd157SKalle Valo void ath10k_wmi_detach(struct ath10k *ar);
7072a925a376SVasanthakumar Thiagarajan void ath10k_wmi_free_host_mem(struct ath10k *ar);
70735e3dd157SKalle Valo int ath10k_wmi_wait_for_service_ready(struct ath10k *ar);
70745e3dd157SKalle Valo int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar);
70755e3dd157SKalle Valo 
70760226d602SMichal Kazior struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
707795bf21f9SMichal Kazior int ath10k_wmi_connect(struct ath10k *ar);
7078666a73f3SKalle Valo 
7079666a73f3SKalle Valo struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
7080666a73f3SKalle Valo int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
7081d7579d12SMichal Kazior int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
7082d7579d12SMichal Kazior 			       u32 cmd_id);
7083019e4280SKalle Valo void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *arg);
70845e3dd157SKalle Valo 
7085b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
7086b91251fbSMichal Kazior 				     struct ath10k_fw_stats_pdev *dst);
7087b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
7088b91251fbSMichal Kazior 				   struct ath10k_fw_stats_pdev *dst);
7089b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
7090b91251fbSMichal Kazior 				   struct ath10k_fw_stats_pdev *dst);
7091b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
70920226d602SMichal Kazior 				      struct ath10k_fw_stats_pdev *dst);
70930226d602SMichal Kazior void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
70940226d602SMichal Kazior 				struct ath10k_fw_stats_peer *dst);
70950226d602SMichal Kazior void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
70960226d602SMichal Kazior 				    struct wmi_host_mem_chunks *chunks);
70970226d602SMichal Kazior void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
70980226d602SMichal Kazior 				      const struct wmi_start_scan_arg *arg);
70995e752e42SMichal Kazior void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
71000226d602SMichal Kazior 			      const struct wmi_wmm_params_arg *arg);
71010226d602SMichal Kazior void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
71020226d602SMichal Kazior 				const struct wmi_channel_arg *arg);
71030226d602SMichal Kazior int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg);
71040226d602SMichal Kazior 
71050226d602SMichal Kazior int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb);
71060226d602SMichal Kazior int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb);
7107dc405152SRakesh Pillai int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb);
71080226d602SMichal Kazior void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb);
71090226d602SMichal Kazior void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb);
71100226d602SMichal Kazior int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb);
71110226d602SMichal Kazior void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb);
71120226d602SMichal Kazior void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb);
71130226d602SMichal Kazior void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb);
71140226d602SMichal Kazior void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
71150226d602SMichal Kazior void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
71160226d602SMichal Kazior void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
71170226d602SMichal Kazior void ath10k_wmi_event_dfs(struct ath10k *ar,
7118991adf71SRaja Mani 			  struct wmi_phyerr_ev_arg *phyerr, u64 tsf);
71190226d602SMichal Kazior void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
7120991adf71SRaja Mani 				    struct wmi_phyerr_ev_arg *phyerr,
71210226d602SMichal Kazior 				    u64 tsf);
71220226d602SMichal Kazior void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
71230226d602SMichal Kazior void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
71240226d602SMichal Kazior void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb);
71250226d602SMichal Kazior void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb);
71260226d602SMichal Kazior void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb);
71270226d602SMichal Kazior void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb);
71280226d602SMichal Kazior void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
71290226d602SMichal Kazior 					     struct sk_buff *skb);
71300226d602SMichal Kazior void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
71310226d602SMichal Kazior 					     struct sk_buff *skb);
71320226d602SMichal Kazior void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb);
71330226d602SMichal Kazior void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb);
71340226d602SMichal Kazior void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb);
71350226d602SMichal Kazior void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb);
71360226d602SMichal Kazior void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb);
71370226d602SMichal Kazior void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
71380226d602SMichal Kazior 					 struct sk_buff *skb);
71390226d602SMichal Kazior void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb);
71400226d602SMichal Kazior void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb);
71410226d602SMichal Kazior void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb);
71420226d602SMichal Kazior void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
71430226d602SMichal Kazior 						struct sk_buff *skb);
71440226d602SMichal Kazior void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb);
71450226d602SMichal Kazior void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
71460226d602SMichal Kazior void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
71470226d602SMichal Kazior void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
71480226d602SMichal Kazior int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
7149cea19a6cSCarl Huang void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb);
7150991adf71SRaja Mani int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf,
7151991adf71SRaja Mani 				 int left_len, struct wmi_phyerr_ev_arg *arg);
7152bc6f9ae6SManikanta Pubbisetty void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
7153bc6f9ae6SManikanta Pubbisetty 				      struct ath10k_fw_stats *fw_stats,
7154bc6f9ae6SManikanta Pubbisetty 				      char *buf);
7155bc6f9ae6SManikanta Pubbisetty void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
7156bc6f9ae6SManikanta Pubbisetty 				     struct ath10k_fw_stats *fw_stats,
7157bc6f9ae6SManikanta Pubbisetty 				     char *buf);
7158bc6f9ae6SManikanta Pubbisetty size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head);
7159bc6f9ae6SManikanta Pubbisetty size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head);
716098dd2b92SManikanta Pubbisetty void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
716198dd2b92SManikanta Pubbisetty 				      struct ath10k_fw_stats *fw_stats,
716298dd2b92SManikanta Pubbisetty 				      char *buf);
71636e4de1a4SPeter Oh int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
71646e4de1a4SPeter Oh 				   enum wmi_vdev_subtype subtype);
716520ddca21SMichal Kazior int ath10k_wmi_barrier(struct ath10k *ar);
7166bc64d052SMaharaja Kennadyrajan void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
7167bc64d052SMaharaja Kennadyrajan 					 u32 num_tx_chain);
7168bc64d052SMaharaja Kennadyrajan void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb);
7169bc6f9ae6SManikanta Pubbisetty 
71705e3dd157SKalle Valo #endif /* _WMI_H_ */
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