1f0553ca9SKalle Valo /* SPDX-License-Identifier: ISC */ 25e3dd157SKalle Valo /* 35e3dd157SKalle Valo * Copyright (c) 2005-2011 Atheros Communications Inc. 48b1083d6SKalle Valo * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5fe36e70fSRakesh Pillai * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 65e3dd157SKalle Valo */ 75e3dd157SKalle Valo 85e3dd157SKalle Valo #ifndef _WMI_H_ 95e3dd157SKalle Valo #define _WMI_H_ 105e3dd157SKalle Valo 115e3dd157SKalle Valo #include <linux/types.h> 12db3b6280SKalle Valo #include <linux/ieee80211.h> 135e3dd157SKalle Valo 145e3dd157SKalle Valo /* 155e3dd157SKalle Valo * This file specifies the WMI interface for the Unified Software 165e3dd157SKalle Valo * Architecture. 175e3dd157SKalle Valo * 185e3dd157SKalle Valo * It includes definitions of all the commands and events. Commands are 195e3dd157SKalle Valo * messages from the host to the target. Events and Replies are messages 205e3dd157SKalle Valo * from the target to the host. 215e3dd157SKalle Valo * 225e3dd157SKalle Valo * Ownership of correctness in regards to WMI commands belongs to the host 235e3dd157SKalle Valo * driver and the target is not required to validate parameters for value, 245e3dd157SKalle Valo * proper range, or any other checking. 255e3dd157SKalle Valo * 265e3dd157SKalle Valo * Guidelines for extending this interface are below. 275e3dd157SKalle Valo * 285e3dd157SKalle Valo * 1. Add new WMI commands ONLY within the specified range - 0x9000 - 0x9fff 295e3dd157SKalle Valo * 305e3dd157SKalle Valo * 2. Use ONLY u32 type for defining member variables within WMI 315e3dd157SKalle Valo * command/event structures. Do not use u8, u16, bool or 325e3dd157SKalle Valo * enum types within these structures. 335e3dd157SKalle Valo * 345e3dd157SKalle Valo * 3. DO NOT define bit fields within structures. Implement bit fields 355e3dd157SKalle Valo * using masks if necessary. Do not use the programming language's bit 365e3dd157SKalle Valo * field definition. 375e3dd157SKalle Valo * 385e3dd157SKalle Valo * 4. Define macros for encode/decode of u8, u16 fields within 395e3dd157SKalle Valo * the u32 variables. Use these macros for set/get of these fields. 405e3dd157SKalle Valo * Try to use this to optimize the structure without bloating it with 415e3dd157SKalle Valo * u32 variables for every lower sized field. 425e3dd157SKalle Valo * 435e3dd157SKalle Valo * 5. Do not use PACK/UNPACK attributes for the structures as each member 445e3dd157SKalle Valo * variable is already 4-byte aligned by virtue of being a u32 455e3dd157SKalle Valo * type. 465e3dd157SKalle Valo * 475e3dd157SKalle Valo * 6. Comment each parameter part of the WMI command/event structure by 48e13dbeadSJoe Perches * using the 2 stars at the beginning of C comment instead of one star to 495e3dd157SKalle Valo * enable HTML document generation using Doxygen. 505e3dd157SKalle Valo * 515e3dd157SKalle Valo */ 525e3dd157SKalle Valo 535e3dd157SKalle Valo /* Control Path */ 545e3dd157SKalle Valo struct wmi_cmd_hdr { 555e3dd157SKalle Valo __le32 cmd_id; 565e3dd157SKalle Valo } __packed; 575e3dd157SKalle Valo 585e3dd157SKalle Valo #define WMI_CMD_HDR_CMD_ID_MASK 0x00FFFFFF 595e3dd157SKalle Valo #define WMI_CMD_HDR_CMD_ID_LSB 0 605e3dd157SKalle Valo #define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000 615e3dd157SKalle Valo #define WMI_CMD_HDR_PLT_PRIV_LSB 24 625e3dd157SKalle Valo 635e3dd157SKalle Valo #define HTC_PROTOCOL_VERSION 0x0002 645e3dd157SKalle Valo #define WMI_PROTOCOL_VERSION 0x0002 655e3dd157SKalle Valo 663b8fc902SKalle Valo /* 673b8fc902SKalle Valo * There is no signed version of __le32, so for a temporary solution come 686d219113SAmadeusz Sławiński * up with our own version. The idea is from fs/ntfs/endian.h. 693b8fc902SKalle Valo * 703b8fc902SKalle Valo * Use a_ prefix so that it doesn't conflict if we get proper support to 713b8fc902SKalle Valo * linux/types.h. 723b8fc902SKalle Valo */ 733b8fc902SKalle Valo typedef __s32 __bitwise a_sle32; 743b8fc902SKalle Valo 753b8fc902SKalle Valo static inline a_sle32 a_cpu_to_sle32(s32 val) 763b8fc902SKalle Valo { 773b8fc902SKalle Valo return (__force a_sle32)cpu_to_le32(val); 783b8fc902SKalle Valo } 793b8fc902SKalle Valo 803b8fc902SKalle Valo static inline s32 a_sle32_to_cpu(a_sle32 val) 813b8fc902SKalle Valo { 823b8fc902SKalle Valo return le32_to_cpu((__force __le32)val); 833b8fc902SKalle Valo } 843b8fc902SKalle Valo 85cff990ceSMichal Kazior enum wmi_service { 86cff990ceSMichal Kazior WMI_SERVICE_BEACON_OFFLOAD = 0, 87cff990ceSMichal Kazior WMI_SERVICE_SCAN_OFFLOAD, 88cff990ceSMichal Kazior WMI_SERVICE_ROAM_OFFLOAD, 89cff990ceSMichal Kazior WMI_SERVICE_BCN_MISS_OFFLOAD, 90cff990ceSMichal Kazior WMI_SERVICE_STA_PWRSAVE, 91cff990ceSMichal Kazior WMI_SERVICE_STA_ADVANCED_PWRSAVE, 92cff990ceSMichal Kazior WMI_SERVICE_AP_UAPSD, 93cff990ceSMichal Kazior WMI_SERVICE_AP_DFS, 94cff990ceSMichal Kazior WMI_SERVICE_11AC, 95cff990ceSMichal Kazior WMI_SERVICE_BLOCKACK, 96cff990ceSMichal Kazior WMI_SERVICE_PHYERR, 97cff990ceSMichal Kazior WMI_SERVICE_BCN_FILTER, 98cff990ceSMichal Kazior WMI_SERVICE_RTT, 99cff990ceSMichal Kazior WMI_SERVICE_RATECTRL, 100cff990ceSMichal Kazior WMI_SERVICE_WOW, 101cff990ceSMichal Kazior WMI_SERVICE_RATECTRL_CACHE, 102cff990ceSMichal Kazior WMI_SERVICE_IRAM_TIDS, 103cff990ceSMichal Kazior WMI_SERVICE_ARPNS_OFFLOAD, 104cff990ceSMichal Kazior WMI_SERVICE_NLO, 105cff990ceSMichal Kazior WMI_SERVICE_GTK_OFFLOAD, 106cff990ceSMichal Kazior WMI_SERVICE_SCAN_SCH, 107cff990ceSMichal Kazior WMI_SERVICE_CSA_OFFLOAD, 108cff990ceSMichal Kazior WMI_SERVICE_CHATTER, 109cff990ceSMichal Kazior WMI_SERVICE_COEX_FREQAVOID, 110cff990ceSMichal Kazior WMI_SERVICE_PACKET_POWER_SAVE, 111cff990ceSMichal Kazior WMI_SERVICE_FORCE_FW_HANG, 112cff990ceSMichal Kazior WMI_SERVICE_GPIO, 113cff990ceSMichal Kazior WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, 114cff990ceSMichal Kazior WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, 115cff990ceSMichal Kazior WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, 116cff990ceSMichal Kazior WMI_SERVICE_STA_KEEP_ALIVE, 117cff990ceSMichal Kazior WMI_SERVICE_TX_ENCAP, 118cff990ceSMichal Kazior WMI_SERVICE_BURST, 119cff990ceSMichal Kazior WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, 120cff990ceSMichal Kazior WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, 121ca996ec5SMichal Kazior WMI_SERVICE_ROAM_SCAN_OFFLOAD, 122ca996ec5SMichal Kazior WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, 123ca996ec5SMichal Kazior WMI_SERVICE_EARLY_RX, 124ca996ec5SMichal Kazior WMI_SERVICE_STA_SMPS, 125ca996ec5SMichal Kazior WMI_SERVICE_FWTEST, 126ca996ec5SMichal Kazior WMI_SERVICE_STA_WMMAC, 127ca996ec5SMichal Kazior WMI_SERVICE_TDLS, 128ca996ec5SMichal Kazior WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE, 129ca996ec5SMichal Kazior WMI_SERVICE_ADAPTIVE_OCS, 130ca996ec5SMichal Kazior WMI_SERVICE_BA_SSN_SUPPORT, 131ca996ec5SMichal Kazior WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE, 132ca996ec5SMichal Kazior WMI_SERVICE_WLAN_HB, 133ca996ec5SMichal Kazior WMI_SERVICE_LTE_ANT_SHARE_SUPPORT, 134ca996ec5SMichal Kazior WMI_SERVICE_BATCH_SCAN, 135ca996ec5SMichal Kazior WMI_SERVICE_QPOWER, 136ca996ec5SMichal Kazior WMI_SERVICE_PLMREQ, 137ca996ec5SMichal Kazior WMI_SERVICE_THERMAL_MGMT, 138ca996ec5SMichal Kazior WMI_SERVICE_RMC, 139ca996ec5SMichal Kazior WMI_SERVICE_MHF_OFFLOAD, 140ca996ec5SMichal Kazior WMI_SERVICE_COEX_SAR, 141ca996ec5SMichal Kazior WMI_SERVICE_BCN_TXRATE_OVERRIDE, 142ca996ec5SMichal Kazior WMI_SERVICE_NAN, 143ca996ec5SMichal Kazior WMI_SERVICE_L1SS_STAT, 144ca996ec5SMichal Kazior WMI_SERVICE_ESTIMATE_LINKSPEED, 145ca996ec5SMichal Kazior WMI_SERVICE_OBSS_SCAN, 146ca996ec5SMichal Kazior WMI_SERVICE_TDLS_OFFCHAN, 147ca996ec5SMichal Kazior WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 148ca996ec5SMichal Kazior WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, 149ca996ec5SMichal Kazior WMI_SERVICE_IBSS_PWRSAVE, 150ca996ec5SMichal Kazior WMI_SERVICE_LPASS, 151ca996ec5SMichal Kazior WMI_SERVICE_EXTSCAN, 152ca996ec5SMichal Kazior WMI_SERVICE_D0WOW, 153ca996ec5SMichal Kazior WMI_SERVICE_HSOFFLOAD, 154ca996ec5SMichal Kazior WMI_SERVICE_ROAM_HO_OFFLOAD, 155ca996ec5SMichal Kazior WMI_SERVICE_RX_FULL_REORDER, 156ca996ec5SMichal Kazior WMI_SERVICE_DHCP_OFFLOAD, 157ca996ec5SMichal Kazior WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT, 158ca996ec5SMichal Kazior WMI_SERVICE_MDNS_OFFLOAD, 159ca996ec5SMichal Kazior WMI_SERVICE_SAP_AUTH_OFFLOAD, 16052c22a63SYanbo Li WMI_SERVICE_ATF, 161de0c789bSYanbo Li WMI_SERVICE_COEX_GPIO, 162840357ccSRaja Mani WMI_SERVICE_ENHANCED_PROXY_STA, 163840357ccSRaja Mani WMI_SERVICE_TT, 164840357ccSRaja Mani WMI_SERVICE_PEER_CACHING, 165840357ccSRaja Mani WMI_SERVICE_AUX_SPECTRAL_INTF, 166840357ccSRaja Mani WMI_SERVICE_AUX_CHAN_LOAD_INTF, 167840357ccSRaja Mani WMI_SERVICE_BSS_CHANNEL_INFO_64, 168e3c6225dSVasanthakumar Thiagarajan WMI_SERVICE_EXT_RES_CFG_SUPPORT, 1690b3d76e9SPeter Oh WMI_SERVICE_MESH_11S, 1700b3d76e9SPeter Oh WMI_SERVICE_MESH_NON_11S, 171de46c015SMohammed Shafi Shajakhan WMI_SERVICE_PEER_STATS, 172e70e9ba9SPeter Oh WMI_SERVICE_RESTRT_CHNL_SUPPORT, 17364ed5771STamizh chelvam WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, 1747e247a9eSRaja Mani WMI_SERVICE_TX_MODE_PUSH_ONLY, 1757e247a9eSRaja Mani WMI_SERVICE_TX_MODE_PUSH_PULL, 1767e247a9eSRaja Mani WMI_SERVICE_TX_MODE_DYNAMIC, 177add6cd8dSManikanta Pubbisetty WMI_SERVICE_VDEV_RX_FILTER, 178add6cd8dSManikanta Pubbisetty WMI_SERVICE_BTCOEX, 179add6cd8dSManikanta Pubbisetty WMI_SERVICE_CHECK_CAL_VERSION, 180add6cd8dSManikanta Pubbisetty WMI_SERVICE_DBGLOG_WARN2, 181add6cd8dSManikanta Pubbisetty WMI_SERVICE_BTCOEX_DUTY_CYCLE, 182add6cd8dSManikanta Pubbisetty WMI_SERVICE_4_WIRE_COEX_SUPPORT, 183add6cd8dSManikanta Pubbisetty WMI_SERVICE_EXTENDED_NSS_SUPPORT, 184add6cd8dSManikanta Pubbisetty WMI_SERVICE_PROG_GPIO_BAND_SELECT, 185add6cd8dSManikanta Pubbisetty WMI_SERVICE_SMART_LOGGING_SUPPORT, 186add6cd8dSManikanta Pubbisetty WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE, 187add6cd8dSManikanta Pubbisetty WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 188229329ffSRakesh Pillai WMI_SERVICE_MGMT_TX_WMI, 18914d65775SBalaji Pothunoori WMI_SERVICE_TDLS_WIDER_BANDWIDTH, 190bc64d052SMaharaja Kennadyrajan WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, 191bc64d052SMaharaja Kennadyrajan WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, 192bc64d052SMaharaja Kennadyrajan WMI_SERVICE_TPC_STATS_FINAL, 193235b9c42SVenkateswara Naralasetty WMI_SERVICE_RESET_CHIP, 194cea19a6cSCarl Huang WMI_SERVICE_SPOOF_MAC_SUPPORT, 195c7fd8d23SBalaji Pothunoori WMI_SERVICE_TX_DATA_ACK_RSSI, 1964600563fSMaharaja Kennadyrajan WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT, 19768c295f2SSathishkumar Muruganandam WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT, 19884758d4dSBhagavathi Perumal S WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT, 19953884577SRakesh Pillai WMI_SERVICE_THERM_THROT, 200059104bfSPradeep Kumar Chitrapu WMI_SERVICE_RTT_RESPONDER_ROLE, 2014920ce3bSManikanta Pubbisetty WMI_SERVICE_PER_PACKET_SW_ENCRYPT, 202bb31b7cbSManikanta Pubbisetty WMI_SERVICE_REPORT_AIRTIME, 203fe36e70fSRakesh Pillai WMI_SERVICE_SYNC_DELETE_CMDS, 20433410a51SAshok Raj Nagarajan WMI_SERVICE_TX_PWR_PER_PEER, 20540f4ef5eSSurabhi Vishnoi WMI_SERVICE_SUPPORT_EXTEND_ADDRESS, 206c4f8c836SMichal Kazior 20795cccf4dSKalle Valo /* Remember to add the new value to wmi_service_name()! */ 20895cccf4dSKalle Valo 209c4f8c836SMichal Kazior /* keep last */ 210c4f8c836SMichal Kazior WMI_SERVICE_MAX, 211cff990ceSMichal Kazior }; 2125e3dd157SKalle Valo 213cff990ceSMichal Kazior enum wmi_10x_service { 214cff990ceSMichal Kazior WMI_10X_SERVICE_BEACON_OFFLOAD = 0, 215cff990ceSMichal Kazior WMI_10X_SERVICE_SCAN_OFFLOAD, 216cff990ceSMichal Kazior WMI_10X_SERVICE_ROAM_OFFLOAD, 217cff990ceSMichal Kazior WMI_10X_SERVICE_BCN_MISS_OFFLOAD, 218cff990ceSMichal Kazior WMI_10X_SERVICE_STA_PWRSAVE, 219cff990ceSMichal Kazior WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE, 220cff990ceSMichal Kazior WMI_10X_SERVICE_AP_UAPSD, 221cff990ceSMichal Kazior WMI_10X_SERVICE_AP_DFS, 222cff990ceSMichal Kazior WMI_10X_SERVICE_11AC, 223cff990ceSMichal Kazior WMI_10X_SERVICE_BLOCKACK, 224cff990ceSMichal Kazior WMI_10X_SERVICE_PHYERR, 225cff990ceSMichal Kazior WMI_10X_SERVICE_BCN_FILTER, 226cff990ceSMichal Kazior WMI_10X_SERVICE_RTT, 227cff990ceSMichal Kazior WMI_10X_SERVICE_RATECTRL, 228cff990ceSMichal Kazior WMI_10X_SERVICE_WOW, 229cff990ceSMichal Kazior WMI_10X_SERVICE_RATECTRL_CACHE, 230cff990ceSMichal Kazior WMI_10X_SERVICE_IRAM_TIDS, 231cff990ceSMichal Kazior WMI_10X_SERVICE_BURST, 232cff990ceSMichal Kazior 233cff990ceSMichal Kazior /* introduced in 10.2 */ 234cff990ceSMichal Kazior WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT, 235cff990ceSMichal Kazior WMI_10X_SERVICE_FORCE_FW_HANG, 236cff990ceSMichal Kazior WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT, 23752c22a63SYanbo Li WMI_10X_SERVICE_ATF, 238de0c789bSYanbo Li WMI_10X_SERVICE_COEX_GPIO, 23920fa2f7fSPeter Oh WMI_10X_SERVICE_AUX_SPECTRAL_INTF, 24020fa2f7fSPeter Oh WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF, 24120fa2f7fSPeter Oh WMI_10X_SERVICE_BSS_CHANNEL_INFO_64, 24220fa2f7fSPeter Oh WMI_10X_SERVICE_MESH, 24320fa2f7fSPeter Oh WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT, 244de46c015SMohammed Shafi Shajakhan WMI_10X_SERVICE_PEER_STATS, 245235b9c42SVenkateswara Naralasetty WMI_10X_SERVICE_RESET_CHIP, 246235b9c42SVenkateswara Naralasetty WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, 24784758d4dSBhagavathi Perumal S WMI_10X_SERVICE_VDEV_BCN_RATE_CONTROL, 24884758d4dSBhagavathi Perumal S WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT, 24984758d4dSBhagavathi Perumal S WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT, 250cff990ceSMichal Kazior }; 251cff990ceSMichal Kazior 252cff990ceSMichal Kazior enum wmi_main_service { 253cff990ceSMichal Kazior WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0, 254cff990ceSMichal Kazior WMI_MAIN_SERVICE_SCAN_OFFLOAD, 255cff990ceSMichal Kazior WMI_MAIN_SERVICE_ROAM_OFFLOAD, 256cff990ceSMichal Kazior WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD, 257cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_PWRSAVE, 258cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE, 259cff990ceSMichal Kazior WMI_MAIN_SERVICE_AP_UAPSD, 260cff990ceSMichal Kazior WMI_MAIN_SERVICE_AP_DFS, 261cff990ceSMichal Kazior WMI_MAIN_SERVICE_11AC, 262cff990ceSMichal Kazior WMI_MAIN_SERVICE_BLOCKACK, 263cff990ceSMichal Kazior WMI_MAIN_SERVICE_PHYERR, 264cff990ceSMichal Kazior WMI_MAIN_SERVICE_BCN_FILTER, 265cff990ceSMichal Kazior WMI_MAIN_SERVICE_RTT, 266cff990ceSMichal Kazior WMI_MAIN_SERVICE_RATECTRL, 267cff990ceSMichal Kazior WMI_MAIN_SERVICE_WOW, 268cff990ceSMichal Kazior WMI_MAIN_SERVICE_RATECTRL_CACHE, 269cff990ceSMichal Kazior WMI_MAIN_SERVICE_IRAM_TIDS, 270cff990ceSMichal Kazior WMI_MAIN_SERVICE_ARPNS_OFFLOAD, 271cff990ceSMichal Kazior WMI_MAIN_SERVICE_NLO, 272cff990ceSMichal Kazior WMI_MAIN_SERVICE_GTK_OFFLOAD, 273cff990ceSMichal Kazior WMI_MAIN_SERVICE_SCAN_SCH, 274cff990ceSMichal Kazior WMI_MAIN_SERVICE_CSA_OFFLOAD, 275cff990ceSMichal Kazior WMI_MAIN_SERVICE_CHATTER, 276cff990ceSMichal Kazior WMI_MAIN_SERVICE_COEX_FREQAVOID, 277cff990ceSMichal Kazior WMI_MAIN_SERVICE_PACKET_POWER_SAVE, 278cff990ceSMichal Kazior WMI_MAIN_SERVICE_FORCE_FW_HANG, 279cff990ceSMichal Kazior WMI_MAIN_SERVICE_GPIO, 280cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM, 281cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, 282cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, 283cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_KEEP_ALIVE, 284cff990ceSMichal Kazior WMI_MAIN_SERVICE_TX_ENCAP, 2855e3dd157SKalle Valo }; 2865e3dd157SKalle Valo 287840357ccSRaja Mani enum wmi_10_4_service { 288840357ccSRaja Mani WMI_10_4_SERVICE_BEACON_OFFLOAD = 0, 289840357ccSRaja Mani WMI_10_4_SERVICE_SCAN_OFFLOAD, 290840357ccSRaja Mani WMI_10_4_SERVICE_ROAM_OFFLOAD, 291840357ccSRaja Mani WMI_10_4_SERVICE_BCN_MISS_OFFLOAD, 292840357ccSRaja Mani WMI_10_4_SERVICE_STA_PWRSAVE, 293840357ccSRaja Mani WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE, 294840357ccSRaja Mani WMI_10_4_SERVICE_AP_UAPSD, 295840357ccSRaja Mani WMI_10_4_SERVICE_AP_DFS, 296840357ccSRaja Mani WMI_10_4_SERVICE_11AC, 297840357ccSRaja Mani WMI_10_4_SERVICE_BLOCKACK, 298840357ccSRaja Mani WMI_10_4_SERVICE_PHYERR, 299840357ccSRaja Mani WMI_10_4_SERVICE_BCN_FILTER, 300840357ccSRaja Mani WMI_10_4_SERVICE_RTT, 301840357ccSRaja Mani WMI_10_4_SERVICE_RATECTRL, 302840357ccSRaja Mani WMI_10_4_SERVICE_WOW, 303840357ccSRaja Mani WMI_10_4_SERVICE_RATECTRL_CACHE, 304840357ccSRaja Mani WMI_10_4_SERVICE_IRAM_TIDS, 305840357ccSRaja Mani WMI_10_4_SERVICE_BURST, 306840357ccSRaja Mani WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT, 307840357ccSRaja Mani WMI_10_4_SERVICE_GTK_OFFLOAD, 308840357ccSRaja Mani WMI_10_4_SERVICE_SCAN_SCH, 309840357ccSRaja Mani WMI_10_4_SERVICE_CSA_OFFLOAD, 310840357ccSRaja Mani WMI_10_4_SERVICE_CHATTER, 311840357ccSRaja Mani WMI_10_4_SERVICE_COEX_FREQAVOID, 312840357ccSRaja Mani WMI_10_4_SERVICE_PACKET_POWER_SAVE, 313840357ccSRaja Mani WMI_10_4_SERVICE_FORCE_FW_HANG, 314840357ccSRaja Mani WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT, 315840357ccSRaja Mani WMI_10_4_SERVICE_GPIO, 316840357ccSRaja Mani WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, 317840357ccSRaja Mani WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, 318840357ccSRaja Mani WMI_10_4_SERVICE_STA_KEEP_ALIVE, 319840357ccSRaja Mani WMI_10_4_SERVICE_TX_ENCAP, 320840357ccSRaja Mani WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, 321840357ccSRaja Mani WMI_10_4_SERVICE_EARLY_RX, 322840357ccSRaja Mani WMI_10_4_SERVICE_ENHANCED_PROXY_STA, 323840357ccSRaja Mani WMI_10_4_SERVICE_TT, 324840357ccSRaja Mani WMI_10_4_SERVICE_ATF, 325840357ccSRaja Mani WMI_10_4_SERVICE_PEER_CACHING, 326840357ccSRaja Mani WMI_10_4_SERVICE_COEX_GPIO, 327840357ccSRaja Mani WMI_10_4_SERVICE_AUX_SPECTRAL_INTF, 328840357ccSRaja Mani WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF, 329840357ccSRaja Mani WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64, 330e3c6225dSVasanthakumar Thiagarajan WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT, 3310b3d76e9SPeter Oh WMI_10_4_SERVICE_MESH_NON_11S, 332e70e9ba9SPeter Oh WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT, 333e70e9ba9SPeter Oh WMI_10_4_SERVICE_PEER_STATS, 334e70e9ba9SPeter Oh WMI_10_4_SERVICE_MESH_11S, 33564ed5771STamizh chelvam WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, 3367e247a9eSRaja Mani WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY, 3377e247a9eSRaja Mani WMI_10_4_SERVICE_TX_MODE_PUSH_PULL, 3387e247a9eSRaja Mani WMI_10_4_SERVICE_TX_MODE_DYNAMIC, 339add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_VDEV_RX_FILTER, 340add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_BTCOEX, 341add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_CHECK_CAL_VERSION, 342add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_DBGLOG_WARN2, 343add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE, 344add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT, 345add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT, 346add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT, 347add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT, 348add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_TDLS, 349add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_TDLS_OFFCHAN, 350add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA, 351add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA, 352add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE, 353add6cd8dSManikanta Pubbisetty WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 35414d65775SBalaji Pothunoori WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH, 355bc64d052SMaharaja Kennadyrajan WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, 356bc64d052SMaharaja Kennadyrajan WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT, 357bc64d052SMaharaja Kennadyrajan WMI_10_4_SERVICE_TPC_STATS_FINAL, 358c7fd8d23SBalaji Pothunoori WMI_10_4_SERVICE_CFR_CAPTURE_SUPPORT, 359c7fd8d23SBalaji Pothunoori WMI_10_4_SERVICE_TX_DATA_ACK_RSSI, 3604600563fSMaharaja Kennadyrajan WMI_10_4_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_LEGACY, 3614600563fSMaharaja Kennadyrajan WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT, 3624600563fSMaharaja Kennadyrajan WMI_10_4_SERVICE_PEER_TID_CONFIGS_SUPPORT, 3634600563fSMaharaja Kennadyrajan WMI_10_4_SERVICE_VDEV_BCN_RATE_CONTROL, 3644600563fSMaharaja Kennadyrajan WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT, 36568c295f2SSathishkumar Muruganandam WMI_10_4_SERVICE_HTT_ASSERT_TRIGGER_SUPPORT, 36668c295f2SSathishkumar Muruganandam WMI_10_4_SERVICE_VDEV_FILTER_NEIGHBOR_RX_PACKETS, 36768c295f2SSathishkumar Muruganandam WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT, 368059104bfSPradeep Kumar Chitrapu WMI_10_4_SERVICE_PEER_CHWIDTH_CHANGE, 369059104bfSPradeep Kumar Chitrapu WMI_10_4_SERVICE_RX_FILTER_OUT_COUNT, 370059104bfSPradeep Kumar Chitrapu WMI_10_4_SERVICE_RTT_RESPONDER_ROLE, 371059104bfSPradeep Kumar Chitrapu WMI_10_4_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT, 372bb31b7cbSManikanta Pubbisetty WMI_10_4_SERVICE_REPORT_AIRTIME, 37333410a51SAshok Raj Nagarajan WMI_10_4_SERVICE_TX_PWR_PER_PEER, 374bbdc8c5aSYingying Tang WMI_10_4_SERVICE_FETCH_PEER_TX_PN, 375bbdc8c5aSYingying Tang WMI_10_4_SERVICE_MULTIPLE_VDEV_RESTART, 376bbdc8c5aSYingying Tang WMI_10_4_SERVICE_ENHANCED_RADIO_COUNTERS, 377bbdc8c5aSYingying Tang WMI_10_4_SERVICE_QINQ_SUPPORT, 378bbdc8c5aSYingying Tang WMI_10_4_SERVICE_RESET_CHIP, 379840357ccSRaja Mani }; 380840357ccSRaja Mani 38195cccf4dSKalle Valo static inline char *wmi_service_name(enum wmi_service service_id) 3825e3dd157SKalle Valo { 383cff990ceSMichal Kazior #define SVCSTR(x) case x: return #x 384cff990ceSMichal Kazior 3855e3dd157SKalle Valo switch (service_id) { 386cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BEACON_OFFLOAD); 387cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_SCAN_OFFLOAD); 388cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_ROAM_OFFLOAD); 389cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD); 390cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_PWRSAVE); 391cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE); 392cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_AP_UAPSD); 393cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_AP_DFS); 394cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_11AC); 395cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BLOCKACK); 396cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_PHYERR); 397cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BCN_FILTER); 398cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_RTT); 399cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_RATECTRL); 400cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_WOW); 401cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_RATECTRL_CACHE); 402cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_IRAM_TIDS); 403cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD); 404cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_NLO); 405cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_GTK_OFFLOAD); 406cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_SCAN_SCH); 407cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_CSA_OFFLOAD); 408cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_CHATTER); 409cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_COEX_FREQAVOID); 410cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE); 411cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_FORCE_FW_HANG); 412cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_GPIO); 413cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM); 414cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG); 415cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG); 416cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE); 417cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_TX_ENCAP); 418cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BURST); 419cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT); 420cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT); 421ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD); 422ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC); 423ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_EARLY_RX); 424ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_STA_SMPS); 425ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_FWTEST); 426ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_STA_WMMAC); 427ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_TDLS); 428ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE); 429ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_ADAPTIVE_OCS); 430ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT); 431ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE); 432ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_WLAN_HB); 433ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT); 434ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_BATCH_SCAN); 435ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_QPOWER); 436ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_PLMREQ); 437ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_THERMAL_MGMT); 438ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_RMC); 439ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_MHF_OFFLOAD); 440ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_COEX_SAR); 441ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE); 442ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_NAN); 443ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_L1SS_STAT); 444ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED); 445ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_OBSS_SCAN); 446ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_TDLS_OFFCHAN); 447ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA); 448ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA); 449ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_IBSS_PWRSAVE); 450ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_LPASS); 451ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_EXTSCAN); 452ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_D0WOW); 453ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_HSOFFLOAD); 454ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD); 455ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_RX_FULL_REORDER); 456ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_DHCP_OFFLOAD); 457ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT); 458ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_MDNS_OFFLOAD); 459ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD); 46052c22a63SYanbo Li SVCSTR(WMI_SERVICE_ATF); 461de0c789bSYanbo Li SVCSTR(WMI_SERVICE_COEX_GPIO); 462840357ccSRaja Mani SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA); 463840357ccSRaja Mani SVCSTR(WMI_SERVICE_TT); 464840357ccSRaja Mani SVCSTR(WMI_SERVICE_PEER_CACHING); 465840357ccSRaja Mani SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF); 466840357ccSRaja Mani SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF); 467840357ccSRaja Mani SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64); 468e3c6225dSVasanthakumar Thiagarajan SVCSTR(WMI_SERVICE_EXT_RES_CFG_SUPPORT); 4690b3d76e9SPeter Oh SVCSTR(WMI_SERVICE_MESH_11S); 4700b3d76e9SPeter Oh SVCSTR(WMI_SERVICE_MESH_NON_11S); 471de46c015SMohammed Shafi Shajakhan SVCSTR(WMI_SERVICE_PEER_STATS); 472e70e9ba9SPeter Oh SVCSTR(WMI_SERVICE_RESTRT_CHNL_SUPPORT); 47364ed5771STamizh chelvam SVCSTR(WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT); 4747e247a9eSRaja Mani SVCSTR(WMI_SERVICE_TX_MODE_PUSH_ONLY); 4757e247a9eSRaja Mani SVCSTR(WMI_SERVICE_TX_MODE_PUSH_PULL); 4767e247a9eSRaja Mani SVCSTR(WMI_SERVICE_TX_MODE_DYNAMIC); 477add6cd8dSManikanta Pubbisetty SVCSTR(WMI_SERVICE_VDEV_RX_FILTER); 4782321dd5dSKalle Valo SVCSTR(WMI_SERVICE_BTCOEX); 479add6cd8dSManikanta Pubbisetty SVCSTR(WMI_SERVICE_CHECK_CAL_VERSION); 480add6cd8dSManikanta Pubbisetty SVCSTR(WMI_SERVICE_DBGLOG_WARN2); 481add6cd8dSManikanta Pubbisetty SVCSTR(WMI_SERVICE_BTCOEX_DUTY_CYCLE); 482add6cd8dSManikanta Pubbisetty SVCSTR(WMI_SERVICE_4_WIRE_COEX_SUPPORT); 483add6cd8dSManikanta Pubbisetty SVCSTR(WMI_SERVICE_EXTENDED_NSS_SUPPORT); 484add6cd8dSManikanta Pubbisetty SVCSTR(WMI_SERVICE_PROG_GPIO_BAND_SELECT); 485add6cd8dSManikanta Pubbisetty SVCSTR(WMI_SERVICE_SMART_LOGGING_SUPPORT); 486add6cd8dSManikanta Pubbisetty SVCSTR(WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE); 487add6cd8dSManikanta Pubbisetty SVCSTR(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY); 4882321dd5dSKalle Valo SVCSTR(WMI_SERVICE_MGMT_TX_WMI); 48914d65775SBalaji Pothunoori SVCSTR(WMI_SERVICE_TDLS_WIDER_BANDWIDTH); 490bc64d052SMaharaja Kennadyrajan SVCSTR(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS); 491bc64d052SMaharaja Kennadyrajan SVCSTR(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT); 492bc64d052SMaharaja Kennadyrajan SVCSTR(WMI_SERVICE_TPC_STATS_FINAL); 493db251d7dSMaharaja Kennadyrajan SVCSTR(WMI_SERVICE_RESET_CHIP); 4942321dd5dSKalle Valo SVCSTR(WMI_SERVICE_SPOOF_MAC_SUPPORT); 495c7fd8d23SBalaji Pothunoori SVCSTR(WMI_SERVICE_TX_DATA_ACK_RSSI); 4964600563fSMaharaja Kennadyrajan SVCSTR(WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT); 4972321dd5dSKalle Valo SVCSTR(WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT); 4982321dd5dSKalle Valo SVCSTR(WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT); 4992321dd5dSKalle Valo SVCSTR(WMI_SERVICE_THERM_THROT); 500059104bfSPradeep Kumar Chitrapu SVCSTR(WMI_SERVICE_RTT_RESPONDER_ROLE); 5014920ce3bSManikanta Pubbisetty SVCSTR(WMI_SERVICE_PER_PACKET_SW_ENCRYPT); 502bb31b7cbSManikanta Pubbisetty SVCSTR(WMI_SERVICE_REPORT_AIRTIME); 503fe36e70fSRakesh Pillai SVCSTR(WMI_SERVICE_SYNC_DELETE_CMDS); 50433410a51SAshok Raj Nagarajan SVCSTR(WMI_SERVICE_TX_PWR_PER_PEER); 50540f4ef5eSSurabhi Vishnoi SVCSTR(WMI_SERVICE_SUPPORT_EXTEND_ADDRESS); 506059104bfSPradeep Kumar Chitrapu 50795cccf4dSKalle Valo case WMI_SERVICE_MAX: 508cff990ceSMichal Kazior return NULL; 5095e3dd157SKalle Valo } 5105e3dd157SKalle Valo 511cff990ceSMichal Kazior #undef SVCSTR 51295cccf4dSKalle Valo 51395cccf4dSKalle Valo return NULL; 514cff990ceSMichal Kazior } 515cff990ceSMichal Kazior 51637b9f933SMichal Kazior #define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \ 51737b9f933SMichal Kazior ((svc_id) < (len) && \ 51837b9f933SMichal Kazior __le32_to_cpu((wmi_svc_bmap)[(svc_id) / (sizeof(u32))]) & \ 519cff990ceSMichal Kazior BIT((svc_id) % (sizeof(u32)))) 520cff990ceSMichal Kazior 521810fe818SManikanta Pubbisetty /* This extension is required to accommodate new services, current limit 522810fe818SManikanta Pubbisetty * for wmi_services is 64 as target is using only 4-bits of each 32-bit 523810fe818SManikanta Pubbisetty * wmi_service word. Extending this to make use of remaining unused bits 524810fe818SManikanta Pubbisetty * for new services. 525810fe818SManikanta Pubbisetty */ 526810fe818SManikanta Pubbisetty #define WMI_EXT_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \ 527810fe818SManikanta Pubbisetty ((svc_id) >= (len) && \ 528810fe818SManikanta Pubbisetty __le32_to_cpu((wmi_svc_bmap)[((svc_id) - (len)) / 28]) & \ 529810fe818SManikanta Pubbisetty BIT(((((svc_id) - (len)) % 28) & 0x1f) + 4)) 530810fe818SManikanta Pubbisetty 53137b9f933SMichal Kazior #define SVCMAP(x, y, len) \ 532cff990ceSMichal Kazior do { \ 533810fe818SManikanta Pubbisetty if ((WMI_SERVICE_IS_ENABLED((in), (x), (len))) || \ 534810fe818SManikanta Pubbisetty (WMI_EXT_SERVICE_IS_ENABLED((in), (x), (len)))) \ 535cff990ceSMichal Kazior __set_bit(y, out); \ 536cff990ceSMichal Kazior } while (0) 537cff990ceSMichal Kazior 53837b9f933SMichal Kazior static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out, 53937b9f933SMichal Kazior size_t len) 540cff990ceSMichal Kazior { 541cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD, 54237b9f933SMichal Kazior WMI_SERVICE_BEACON_OFFLOAD, len); 543cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD, 54437b9f933SMichal Kazior WMI_SERVICE_SCAN_OFFLOAD, len); 545cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD, 54637b9f933SMichal Kazior WMI_SERVICE_ROAM_OFFLOAD, len); 547cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD, 54837b9f933SMichal Kazior WMI_SERVICE_BCN_MISS_OFFLOAD, len); 549cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE, 55037b9f933SMichal Kazior WMI_SERVICE_STA_PWRSAVE, len); 551cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE, 55237b9f933SMichal Kazior WMI_SERVICE_STA_ADVANCED_PWRSAVE, len); 553cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_AP_UAPSD, 55437b9f933SMichal Kazior WMI_SERVICE_AP_UAPSD, len); 555cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_AP_DFS, 55637b9f933SMichal Kazior WMI_SERVICE_AP_DFS, len); 557cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_11AC, 55837b9f933SMichal Kazior WMI_SERVICE_11AC, len); 559cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BLOCKACK, 56037b9f933SMichal Kazior WMI_SERVICE_BLOCKACK, len); 561cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_PHYERR, 56237b9f933SMichal Kazior WMI_SERVICE_PHYERR, len); 563cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BCN_FILTER, 56437b9f933SMichal Kazior WMI_SERVICE_BCN_FILTER, len); 565cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_RTT, 56637b9f933SMichal Kazior WMI_SERVICE_RTT, len); 567cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_RATECTRL, 56837b9f933SMichal Kazior WMI_SERVICE_RATECTRL, len); 569cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_WOW, 57037b9f933SMichal Kazior WMI_SERVICE_WOW, len); 571cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE, 57237b9f933SMichal Kazior WMI_SERVICE_RATECTRL_CACHE, len); 573cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_IRAM_TIDS, 57437b9f933SMichal Kazior WMI_SERVICE_IRAM_TIDS, len); 575cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BURST, 57637b9f933SMichal Kazior WMI_SERVICE_BURST, len); 577cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT, 57837b9f933SMichal Kazior WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len); 579cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG, 58037b9f933SMichal Kazior WMI_SERVICE_FORCE_FW_HANG, len); 581cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT, 58237b9f933SMichal Kazior WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len); 58352c22a63SYanbo Li SVCMAP(WMI_10X_SERVICE_ATF, 58452c22a63SYanbo Li WMI_SERVICE_ATF, len); 585de0c789bSYanbo Li SVCMAP(WMI_10X_SERVICE_COEX_GPIO, 586de0c789bSYanbo Li WMI_SERVICE_COEX_GPIO, len); 58720fa2f7fSPeter Oh SVCMAP(WMI_10X_SERVICE_AUX_SPECTRAL_INTF, 58820fa2f7fSPeter Oh WMI_SERVICE_AUX_SPECTRAL_INTF, len); 58920fa2f7fSPeter Oh SVCMAP(WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF, 59020fa2f7fSPeter Oh WMI_SERVICE_AUX_CHAN_LOAD_INTF, len); 59120fa2f7fSPeter Oh SVCMAP(WMI_10X_SERVICE_BSS_CHANNEL_INFO_64, 59220fa2f7fSPeter Oh WMI_SERVICE_BSS_CHANNEL_INFO_64, len); 59320fa2f7fSPeter Oh SVCMAP(WMI_10X_SERVICE_MESH, 5940b3d76e9SPeter Oh WMI_SERVICE_MESH_11S, len); 59520fa2f7fSPeter Oh SVCMAP(WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT, 59620fa2f7fSPeter Oh WMI_SERVICE_EXT_RES_CFG_SUPPORT, len); 597de46c015SMohammed Shafi Shajakhan SVCMAP(WMI_10X_SERVICE_PEER_STATS, 598de46c015SMohammed Shafi Shajakhan WMI_SERVICE_PEER_STATS, len); 599235b9c42SVenkateswara Naralasetty SVCMAP(WMI_10X_SERVICE_RESET_CHIP, 600235b9c42SVenkateswara Naralasetty WMI_SERVICE_RESET_CHIP, len); 601235b9c42SVenkateswara Naralasetty SVCMAP(WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, 602235b9c42SVenkateswara Naralasetty WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len); 60384758d4dSBhagavathi Perumal S SVCMAP(WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT, 60484758d4dSBhagavathi Perumal S WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT, len); 6054920ce3bSManikanta Pubbisetty SVCMAP(WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT, 6064920ce3bSManikanta Pubbisetty WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len); 607cff990ceSMichal Kazior } 608cff990ceSMichal Kazior 60937b9f933SMichal Kazior static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out, 61037b9f933SMichal Kazior size_t len) 611cff990ceSMichal Kazior { 612cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD, 61337b9f933SMichal Kazior WMI_SERVICE_BEACON_OFFLOAD, len); 614cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD, 61537b9f933SMichal Kazior WMI_SERVICE_SCAN_OFFLOAD, len); 616cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD, 61737b9f933SMichal Kazior WMI_SERVICE_ROAM_OFFLOAD, len); 618cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD, 61937b9f933SMichal Kazior WMI_SERVICE_BCN_MISS_OFFLOAD, len); 620cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE, 62137b9f933SMichal Kazior WMI_SERVICE_STA_PWRSAVE, len); 622cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE, 62337b9f933SMichal Kazior WMI_SERVICE_STA_ADVANCED_PWRSAVE, len); 624cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD, 62537b9f933SMichal Kazior WMI_SERVICE_AP_UAPSD, len); 626cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_AP_DFS, 62737b9f933SMichal Kazior WMI_SERVICE_AP_DFS, len); 628cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_11AC, 62937b9f933SMichal Kazior WMI_SERVICE_11AC, len); 630cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_BLOCKACK, 63137b9f933SMichal Kazior WMI_SERVICE_BLOCKACK, len); 632cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_PHYERR, 63337b9f933SMichal Kazior WMI_SERVICE_PHYERR, len); 634cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER, 63537b9f933SMichal Kazior WMI_SERVICE_BCN_FILTER, len); 636cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_RTT, 63737b9f933SMichal Kazior WMI_SERVICE_RTT, len); 638cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_RATECTRL, 63937b9f933SMichal Kazior WMI_SERVICE_RATECTRL, len); 640cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_WOW, 64137b9f933SMichal Kazior WMI_SERVICE_WOW, len); 642cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE, 64337b9f933SMichal Kazior WMI_SERVICE_RATECTRL_CACHE, len); 644cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS, 64537b9f933SMichal Kazior WMI_SERVICE_IRAM_TIDS, len); 646cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD, 64737b9f933SMichal Kazior WMI_SERVICE_ARPNS_OFFLOAD, len); 648cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_NLO, 64937b9f933SMichal Kazior WMI_SERVICE_NLO, len); 650cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD, 65137b9f933SMichal Kazior WMI_SERVICE_GTK_OFFLOAD, len); 652cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH, 65337b9f933SMichal Kazior WMI_SERVICE_SCAN_SCH, len); 654cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD, 65537b9f933SMichal Kazior WMI_SERVICE_CSA_OFFLOAD, len); 656cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_CHATTER, 65737b9f933SMichal Kazior WMI_SERVICE_CHATTER, len); 658cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID, 65937b9f933SMichal Kazior WMI_SERVICE_COEX_FREQAVOID, len); 660cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE, 66137b9f933SMichal Kazior WMI_SERVICE_PACKET_POWER_SAVE, len); 662cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG, 66337b9f933SMichal Kazior WMI_SERVICE_FORCE_FW_HANG, len); 664cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_GPIO, 66537b9f933SMichal Kazior WMI_SERVICE_GPIO, len); 666cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM, 66737b9f933SMichal Kazior WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len); 668cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, 66937b9f933SMichal Kazior WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len); 670cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, 67137b9f933SMichal Kazior WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len); 672cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE, 67337b9f933SMichal Kazior WMI_SERVICE_STA_KEEP_ALIVE, len); 674cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP, 67537b9f933SMichal Kazior WMI_SERVICE_TX_ENCAP, len); 676cff990ceSMichal Kazior } 677cff990ceSMichal Kazior 678840357ccSRaja Mani static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out, 679840357ccSRaja Mani size_t len) 680840357ccSRaja Mani { 681840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD, 682840357ccSRaja Mani WMI_SERVICE_BEACON_OFFLOAD, len); 683840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD, 684840357ccSRaja Mani WMI_SERVICE_SCAN_OFFLOAD, len); 685840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD, 686840357ccSRaja Mani WMI_SERVICE_ROAM_OFFLOAD, len); 687840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD, 688840357ccSRaja Mani WMI_SERVICE_BCN_MISS_OFFLOAD, len); 689840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE, 690840357ccSRaja Mani WMI_SERVICE_STA_PWRSAVE, len); 691840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE, 692840357ccSRaja Mani WMI_SERVICE_STA_ADVANCED_PWRSAVE, len); 693840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_AP_UAPSD, 694840357ccSRaja Mani WMI_SERVICE_AP_UAPSD, len); 695840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_AP_DFS, 696840357ccSRaja Mani WMI_SERVICE_AP_DFS, len); 697840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_11AC, 698840357ccSRaja Mani WMI_SERVICE_11AC, len); 699840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_BLOCKACK, 700840357ccSRaja Mani WMI_SERVICE_BLOCKACK, len); 701840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_PHYERR, 702840357ccSRaja Mani WMI_SERVICE_PHYERR, len); 703840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_BCN_FILTER, 704840357ccSRaja Mani WMI_SERVICE_BCN_FILTER, len); 705840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_RTT, 706840357ccSRaja Mani WMI_SERVICE_RTT, len); 707840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_RATECTRL, 708840357ccSRaja Mani WMI_SERVICE_RATECTRL, len); 709840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_WOW, 710840357ccSRaja Mani WMI_SERVICE_WOW, len); 711840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE, 712840357ccSRaja Mani WMI_SERVICE_RATECTRL_CACHE, len); 713840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS, 714840357ccSRaja Mani WMI_SERVICE_IRAM_TIDS, len); 715840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_BURST, 716840357ccSRaja Mani WMI_SERVICE_BURST, len); 717840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT, 718840357ccSRaja Mani WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len); 719840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD, 720840357ccSRaja Mani WMI_SERVICE_GTK_OFFLOAD, len); 721840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_SCAN_SCH, 722840357ccSRaja Mani WMI_SERVICE_SCAN_SCH, len); 723840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD, 724840357ccSRaja Mani WMI_SERVICE_CSA_OFFLOAD, len); 725840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_CHATTER, 726840357ccSRaja Mani WMI_SERVICE_CHATTER, len); 727840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID, 728840357ccSRaja Mani WMI_SERVICE_COEX_FREQAVOID, len); 729840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE, 730840357ccSRaja Mani WMI_SERVICE_PACKET_POWER_SAVE, len); 731840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG, 732840357ccSRaja Mani WMI_SERVICE_FORCE_FW_HANG, len); 733840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT, 734840357ccSRaja Mani WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len); 735840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_GPIO, 736840357ccSRaja Mani WMI_SERVICE_GPIO, len); 737840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, 738840357ccSRaja Mani WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len); 739840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, 740840357ccSRaja Mani WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len); 741840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE, 742840357ccSRaja Mani WMI_SERVICE_STA_KEEP_ALIVE, len); 743840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_TX_ENCAP, 744840357ccSRaja Mani WMI_SERVICE_TX_ENCAP, len); 745840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, 746840357ccSRaja Mani WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len); 747840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_EARLY_RX, 748840357ccSRaja Mani WMI_SERVICE_EARLY_RX, len); 749840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA, 750840357ccSRaja Mani WMI_SERVICE_ENHANCED_PROXY_STA, len); 751840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_TT, 752840357ccSRaja Mani WMI_SERVICE_TT, len); 753840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_ATF, 754840357ccSRaja Mani WMI_SERVICE_ATF, len); 755840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_PEER_CACHING, 756840357ccSRaja Mani WMI_SERVICE_PEER_CACHING, len); 757840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_COEX_GPIO, 758840357ccSRaja Mani WMI_SERVICE_COEX_GPIO, len); 759840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF, 760840357ccSRaja Mani WMI_SERVICE_AUX_SPECTRAL_INTF, len); 761840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF, 762840357ccSRaja Mani WMI_SERVICE_AUX_CHAN_LOAD_INTF, len); 763840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64, 764840357ccSRaja Mani WMI_SERVICE_BSS_CHANNEL_INFO_64, len); 765e3c6225dSVasanthakumar Thiagarajan SVCMAP(WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT, 766e3c6225dSVasanthakumar Thiagarajan WMI_SERVICE_EXT_RES_CFG_SUPPORT, len); 7670b3d76e9SPeter Oh SVCMAP(WMI_10_4_SERVICE_MESH_NON_11S, 7680b3d76e9SPeter Oh WMI_SERVICE_MESH_NON_11S, len); 769e70e9ba9SPeter Oh SVCMAP(WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT, 770e70e9ba9SPeter Oh WMI_SERVICE_RESTRT_CHNL_SUPPORT, len); 771e70e9ba9SPeter Oh SVCMAP(WMI_10_4_SERVICE_PEER_STATS, 772e70e9ba9SPeter Oh WMI_SERVICE_PEER_STATS, len); 773e70e9ba9SPeter Oh SVCMAP(WMI_10_4_SERVICE_MESH_11S, 774e70e9ba9SPeter Oh WMI_SERVICE_MESH_11S, len); 77564ed5771STamizh chelvam SVCMAP(WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, 77664ed5771STamizh chelvam WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, len); 7777e247a9eSRaja Mani SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY, 7787e247a9eSRaja Mani WMI_SERVICE_TX_MODE_PUSH_ONLY, len); 7797e247a9eSRaja Mani SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_PULL, 7807e247a9eSRaja Mani WMI_SERVICE_TX_MODE_PUSH_PULL, len); 7817e247a9eSRaja Mani SVCMAP(WMI_10_4_SERVICE_TX_MODE_DYNAMIC, 7827e247a9eSRaja Mani WMI_SERVICE_TX_MODE_DYNAMIC, len); 783add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_VDEV_RX_FILTER, 784add6cd8dSManikanta Pubbisetty WMI_SERVICE_VDEV_RX_FILTER, len); 785add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_BTCOEX, 786add6cd8dSManikanta Pubbisetty WMI_SERVICE_BTCOEX, len); 787add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_CHECK_CAL_VERSION, 788add6cd8dSManikanta Pubbisetty WMI_SERVICE_CHECK_CAL_VERSION, len); 789add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_DBGLOG_WARN2, 790add6cd8dSManikanta Pubbisetty WMI_SERVICE_DBGLOG_WARN2, len); 791add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE, 792add6cd8dSManikanta Pubbisetty WMI_SERVICE_BTCOEX_DUTY_CYCLE, len); 793add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT, 794add6cd8dSManikanta Pubbisetty WMI_SERVICE_4_WIRE_COEX_SUPPORT, len); 795add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT, 796add6cd8dSManikanta Pubbisetty WMI_SERVICE_EXTENDED_NSS_SUPPORT, len); 797add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT, 798add6cd8dSManikanta Pubbisetty WMI_SERVICE_PROG_GPIO_BAND_SELECT, len); 799add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT, 800add6cd8dSManikanta Pubbisetty WMI_SERVICE_SMART_LOGGING_SUPPORT, len); 801add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_TDLS, 802add6cd8dSManikanta Pubbisetty WMI_SERVICE_TDLS, len); 803add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_TDLS_OFFCHAN, 804add6cd8dSManikanta Pubbisetty WMI_SERVICE_TDLS_OFFCHAN, len); 805add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA, 806add6cd8dSManikanta Pubbisetty WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, len); 807add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA, 808add6cd8dSManikanta Pubbisetty WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, len); 809add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE, 810add6cd8dSManikanta Pubbisetty WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE, len); 811add6cd8dSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 812add6cd8dSManikanta Pubbisetty WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, len); 81314d65775SBalaji Pothunoori SVCMAP(WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH, 81414d65775SBalaji Pothunoori WMI_SERVICE_TDLS_WIDER_BANDWIDTH, len); 815bc64d052SMaharaja Kennadyrajan SVCMAP(WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, 816bc64d052SMaharaja Kennadyrajan WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len); 817bc64d052SMaharaja Kennadyrajan SVCMAP(WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT, 818bc64d052SMaharaja Kennadyrajan WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, len); 819bc64d052SMaharaja Kennadyrajan SVCMAP(WMI_10_4_SERVICE_TPC_STATS_FINAL, 820bc64d052SMaharaja Kennadyrajan WMI_SERVICE_TPC_STATS_FINAL, len); 821c7fd8d23SBalaji Pothunoori SVCMAP(WMI_10_4_SERVICE_TX_DATA_ACK_RSSI, 822c7fd8d23SBalaji Pothunoori WMI_SERVICE_TX_DATA_ACK_RSSI, len); 8234600563fSMaharaja Kennadyrajan SVCMAP(WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT, 8244600563fSMaharaja Kennadyrajan WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT, len); 82568c295f2SSathishkumar Muruganandam SVCMAP(WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT, 82668c295f2SSathishkumar Muruganandam WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT, len); 827059104bfSPradeep Kumar Chitrapu SVCMAP(WMI_10_4_SERVICE_RTT_RESPONDER_ROLE, 828059104bfSPradeep Kumar Chitrapu WMI_SERVICE_RTT_RESPONDER_ROLE, len); 8294920ce3bSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT, 8304920ce3bSManikanta Pubbisetty WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len); 831bb31b7cbSManikanta Pubbisetty SVCMAP(WMI_10_4_SERVICE_REPORT_AIRTIME, 832bb31b7cbSManikanta Pubbisetty WMI_SERVICE_REPORT_AIRTIME, len); 83333410a51SAshok Raj Nagarajan SVCMAP(WMI_10_4_SERVICE_TX_PWR_PER_PEER, 83433410a51SAshok Raj Nagarajan WMI_SERVICE_TX_PWR_PER_PEER, len); 835bbdc8c5aSYingying Tang SVCMAP(WMI_10_4_SERVICE_RESET_CHIP, 836bbdc8c5aSYingying Tang WMI_SERVICE_RESET_CHIP, len); 837840357ccSRaja Mani } 838840357ccSRaja Mani 839cff990ceSMichal Kazior #undef SVCMAP 8405e3dd157SKalle Valo 8415e3dd157SKalle Valo /* 2 word representation of MAC addr */ 8425e3dd157SKalle Valo struct wmi_mac_addr { 8435e3dd157SKalle Valo union { 8445e3dd157SKalle Valo u8 addr[6]; 8455e3dd157SKalle Valo struct { 8465e3dd157SKalle Valo u32 word0; 8475e3dd157SKalle Valo u32 word1; 8485e3dd157SKalle Valo } __packed; 8495e3dd157SKalle Valo } __packed; 8505e3dd157SKalle Valo } __packed; 8515e3dd157SKalle Valo 852ce42870eSBartosz Markowski struct wmi_cmd_map { 853ce42870eSBartosz Markowski u32 init_cmdid; 854ce42870eSBartosz Markowski u32 start_scan_cmdid; 855ce42870eSBartosz Markowski u32 stop_scan_cmdid; 856ce42870eSBartosz Markowski u32 scan_chan_list_cmdid; 857ce42870eSBartosz Markowski u32 scan_sch_prio_tbl_cmdid; 85860e1d0fbSCarl Huang u32 scan_prob_req_oui_cmdid; 859ce42870eSBartosz Markowski u32 pdev_set_regdomain_cmdid; 860ce42870eSBartosz Markowski u32 pdev_set_channel_cmdid; 861ce42870eSBartosz Markowski u32 pdev_set_param_cmdid; 862ce42870eSBartosz Markowski u32 pdev_pktlog_enable_cmdid; 863ce42870eSBartosz Markowski u32 pdev_pktlog_disable_cmdid; 864ce42870eSBartosz Markowski u32 pdev_set_wmm_params_cmdid; 865ce42870eSBartosz Markowski u32 pdev_set_ht_cap_ie_cmdid; 866ce42870eSBartosz Markowski u32 pdev_set_vht_cap_ie_cmdid; 867ce42870eSBartosz Markowski u32 pdev_set_dscp_tid_map_cmdid; 868ce42870eSBartosz Markowski u32 pdev_set_quiet_mode_cmdid; 869ce42870eSBartosz Markowski u32 pdev_green_ap_ps_enable_cmdid; 870ce42870eSBartosz Markowski u32 pdev_get_tpc_config_cmdid; 871ce42870eSBartosz Markowski u32 pdev_set_base_macaddr_cmdid; 872ce42870eSBartosz Markowski u32 vdev_create_cmdid; 873ce42870eSBartosz Markowski u32 vdev_delete_cmdid; 874ce42870eSBartosz Markowski u32 vdev_start_request_cmdid; 875ce42870eSBartosz Markowski u32 vdev_restart_request_cmdid; 876ce42870eSBartosz Markowski u32 vdev_up_cmdid; 877ce42870eSBartosz Markowski u32 vdev_stop_cmdid; 878ce42870eSBartosz Markowski u32 vdev_down_cmdid; 879ce42870eSBartosz Markowski u32 vdev_set_param_cmdid; 880ce42870eSBartosz Markowski u32 vdev_install_key_cmdid; 881ce42870eSBartosz Markowski u32 peer_create_cmdid; 882ce42870eSBartosz Markowski u32 peer_delete_cmdid; 883ce42870eSBartosz Markowski u32 peer_flush_tids_cmdid; 884ce42870eSBartosz Markowski u32 peer_set_param_cmdid; 885ce42870eSBartosz Markowski u32 peer_assoc_cmdid; 886ce42870eSBartosz Markowski u32 peer_add_wds_entry_cmdid; 887ce42870eSBartosz Markowski u32 peer_remove_wds_entry_cmdid; 888ce42870eSBartosz Markowski u32 peer_mcast_group_cmdid; 889ce42870eSBartosz Markowski u32 bcn_tx_cmdid; 890ce42870eSBartosz Markowski u32 pdev_send_bcn_cmdid; 891ce42870eSBartosz Markowski u32 bcn_tmpl_cmdid; 892ce42870eSBartosz Markowski u32 bcn_filter_rx_cmdid; 893ce42870eSBartosz Markowski u32 prb_req_filter_rx_cmdid; 894ce42870eSBartosz Markowski u32 mgmt_tx_cmdid; 8951807da49SRakesh Pillai u32 mgmt_tx_send_cmdid; 896ce42870eSBartosz Markowski u32 prb_tmpl_cmdid; 897ce42870eSBartosz Markowski u32 addba_clear_resp_cmdid; 898ce42870eSBartosz Markowski u32 addba_send_cmdid; 899ce42870eSBartosz Markowski u32 addba_status_cmdid; 900ce42870eSBartosz Markowski u32 delba_send_cmdid; 901ce42870eSBartosz Markowski u32 addba_set_resp_cmdid; 902ce42870eSBartosz Markowski u32 send_singleamsdu_cmdid; 903ce42870eSBartosz Markowski u32 sta_powersave_mode_cmdid; 904ce42870eSBartosz Markowski u32 sta_powersave_param_cmdid; 905ce42870eSBartosz Markowski u32 sta_mimo_ps_mode_cmdid; 906ce42870eSBartosz Markowski u32 pdev_dfs_enable_cmdid; 907ce42870eSBartosz Markowski u32 pdev_dfs_disable_cmdid; 908ce42870eSBartosz Markowski u32 roam_scan_mode; 909ce42870eSBartosz Markowski u32 roam_scan_rssi_threshold; 910ce42870eSBartosz Markowski u32 roam_scan_period; 911ce42870eSBartosz Markowski u32 roam_scan_rssi_change_threshold; 912ce42870eSBartosz Markowski u32 roam_ap_profile; 913ce42870eSBartosz Markowski u32 ofl_scan_add_ap_profile; 914ce42870eSBartosz Markowski u32 ofl_scan_remove_ap_profile; 915ce42870eSBartosz Markowski u32 ofl_scan_period; 916ce42870eSBartosz Markowski u32 p2p_dev_set_device_info; 917ce42870eSBartosz Markowski u32 p2p_dev_set_discoverability; 918ce42870eSBartosz Markowski u32 p2p_go_set_beacon_ie; 919ce42870eSBartosz Markowski u32 p2p_go_set_probe_resp_ie; 920ce42870eSBartosz Markowski u32 p2p_set_vendor_ie_data_cmdid; 921ce42870eSBartosz Markowski u32 ap_ps_peer_param_cmdid; 922ce42870eSBartosz Markowski u32 ap_ps_peer_uapsd_coex_cmdid; 923ce42870eSBartosz Markowski u32 peer_rate_retry_sched_cmdid; 924ce42870eSBartosz Markowski u32 wlan_profile_trigger_cmdid; 925ce42870eSBartosz Markowski u32 wlan_profile_set_hist_intvl_cmdid; 926ce42870eSBartosz Markowski u32 wlan_profile_get_profile_data_cmdid; 927ce42870eSBartosz Markowski u32 wlan_profile_enable_profile_id_cmdid; 928ce42870eSBartosz Markowski u32 wlan_profile_list_profile_id_cmdid; 929ce42870eSBartosz Markowski u32 pdev_suspend_cmdid; 930ce42870eSBartosz Markowski u32 pdev_resume_cmdid; 931ce42870eSBartosz Markowski u32 add_bcn_filter_cmdid; 932ce42870eSBartosz Markowski u32 rmv_bcn_filter_cmdid; 933ce42870eSBartosz Markowski u32 wow_add_wake_pattern_cmdid; 934ce42870eSBartosz Markowski u32 wow_del_wake_pattern_cmdid; 935ce42870eSBartosz Markowski u32 wow_enable_disable_wake_event_cmdid; 936ce42870eSBartosz Markowski u32 wow_enable_cmdid; 937ce42870eSBartosz Markowski u32 wow_hostwakeup_from_sleep_cmdid; 938ce42870eSBartosz Markowski u32 rtt_measreq_cmdid; 939ce42870eSBartosz Markowski u32 rtt_tsf_cmdid; 940ce42870eSBartosz Markowski u32 vdev_spectral_scan_configure_cmdid; 941ce42870eSBartosz Markowski u32 vdev_spectral_scan_enable_cmdid; 942ce42870eSBartosz Markowski u32 request_stats_cmdid; 943ce42870eSBartosz Markowski u32 set_arp_ns_offload_cmdid; 944ce42870eSBartosz Markowski u32 network_list_offload_config_cmdid; 945ce42870eSBartosz Markowski u32 gtk_offload_cmdid; 946ce42870eSBartosz Markowski u32 csa_offload_enable_cmdid; 947ce42870eSBartosz Markowski u32 csa_offload_chanswitch_cmdid; 948ce42870eSBartosz Markowski u32 chatter_set_mode_cmdid; 949ce42870eSBartosz Markowski u32 peer_tid_addba_cmdid; 950ce42870eSBartosz Markowski u32 peer_tid_delba_cmdid; 951ce42870eSBartosz Markowski u32 sta_dtim_ps_method_cmdid; 952ce42870eSBartosz Markowski u32 sta_uapsd_auto_trig_cmdid; 953ce42870eSBartosz Markowski u32 sta_keepalive_cmd; 954ce42870eSBartosz Markowski u32 echo_cmdid; 955ce42870eSBartosz Markowski u32 pdev_utf_cmdid; 956ce42870eSBartosz Markowski u32 dbglog_cfg_cmdid; 957ce42870eSBartosz Markowski u32 pdev_qvit_cmdid; 958ce42870eSBartosz Markowski u32 pdev_ftm_intg_cmdid; 959ce42870eSBartosz Markowski u32 vdev_set_keepalive_cmdid; 960ce42870eSBartosz Markowski u32 vdev_get_keepalive_cmdid; 961ce42870eSBartosz Markowski u32 force_fw_hang_cmdid; 962ce42870eSBartosz Markowski u32 gpio_config_cmdid; 963ce42870eSBartosz Markowski u32 gpio_output_cmdid; 964a57a6a27SRajkumar Manoharan u32 pdev_get_temperature_cmdid; 9656d492fe2SMichal Kazior u32 vdev_set_wmm_params_cmdid; 966ad45c888SMarek Puzyniak u32 tdls_set_state_cmdid; 967ad45c888SMarek Puzyniak u32 tdls_peer_update_cmdid; 9685b272e30SMichal Kazior u32 adaptive_qcs_cmdid; 9692d491e69SRaja Mani u32 scan_update_request_cmdid; 9702d491e69SRaja Mani u32 vdev_standby_response_cmdid; 9712d491e69SRaja Mani u32 vdev_resume_response_cmdid; 9722d491e69SRaja Mani u32 wlan_peer_caching_add_peer_cmdid; 9732d491e69SRaja Mani u32 wlan_peer_caching_evict_peer_cmdid; 9742d491e69SRaja Mani u32 wlan_peer_caching_restore_peer_cmdid; 9752d491e69SRaja Mani u32 wlan_peer_caching_print_all_peers_info_cmdid; 9762d491e69SRaja Mani u32 peer_update_wds_entry_cmdid; 9772d491e69SRaja Mani u32 peer_add_proxy_sta_entry_cmdid; 9782d491e69SRaja Mani u32 rtt_keepalive_cmdid; 9792d491e69SRaja Mani u32 oem_req_cmdid; 9802d491e69SRaja Mani u32 nan_cmdid; 9812d491e69SRaja Mani u32 vdev_ratemask_cmdid; 9822d491e69SRaja Mani u32 qboost_cfg_cmdid; 9832d491e69SRaja Mani u32 pdev_smart_ant_enable_cmdid; 9842d491e69SRaja Mani u32 pdev_smart_ant_set_rx_antenna_cmdid; 9852d491e69SRaja Mani u32 peer_smart_ant_set_tx_antenna_cmdid; 9862d491e69SRaja Mani u32 peer_smart_ant_set_train_info_cmdid; 9872d491e69SRaja Mani u32 peer_smart_ant_set_node_config_ops_cmdid; 9882d491e69SRaja Mani u32 pdev_set_antenna_switch_table_cmdid; 9892d491e69SRaja Mani u32 pdev_set_ctl_table_cmdid; 9902d491e69SRaja Mani u32 pdev_set_mimogain_table_cmdid; 9912d491e69SRaja Mani u32 pdev_ratepwr_table_cmdid; 9922d491e69SRaja Mani u32 pdev_ratepwr_chainmsk_table_cmdid; 9932d491e69SRaja Mani u32 pdev_fips_cmdid; 9942d491e69SRaja Mani u32 tt_set_conf_cmdid; 9952d491e69SRaja Mani u32 fwtest_cmdid; 9962d491e69SRaja Mani u32 vdev_atf_request_cmdid; 9972d491e69SRaja Mani u32 peer_atf_request_cmdid; 9982d491e69SRaja Mani u32 pdev_get_ani_cck_config_cmdid; 9992d491e69SRaja Mani u32 pdev_get_ani_ofdm_config_cmdid; 10002d491e69SRaja Mani u32 pdev_reserve_ast_entry_cmdid; 10012d491e69SRaja Mani u32 pdev_get_nfcal_power_cmdid; 10022d491e69SRaja Mani u32 pdev_get_tpc_cmdid; 10032d491e69SRaja Mani u32 pdev_get_ast_info_cmdid; 10042d491e69SRaja Mani u32 vdev_set_dscp_tid_map_cmdid; 10052d491e69SRaja Mani u32 pdev_get_info_cmdid; 10062d491e69SRaja Mani u32 vdev_get_info_cmdid; 10072d491e69SRaja Mani u32 vdev_filter_neighbor_rx_packets_cmdid; 10082d491e69SRaja Mani u32 mu_cal_start_cmdid; 10092d491e69SRaja Mani u32 set_cca_params_cmdid; 10102d491e69SRaja Mani u32 pdev_bss_chan_info_request_cmdid; 101162f77f09SMaharaja u32 pdev_enable_adaptive_cca_cmdid; 101247771902SRaja Mani u32 ext_resource_cfg_cmdid; 1013add6cd8dSManikanta Pubbisetty u32 vdev_set_ie_cmdid; 1014add6cd8dSManikanta Pubbisetty u32 set_lteu_config_cmdid; 1015add6cd8dSManikanta Pubbisetty u32 atf_ssid_grouping_request_cmdid; 1016add6cd8dSManikanta Pubbisetty u32 peer_atf_ext_request_cmdid; 1017add6cd8dSManikanta Pubbisetty u32 set_periodic_channel_stats_cfg_cmdid; 1018add6cd8dSManikanta Pubbisetty u32 peer_bwf_request_cmdid; 1019add6cd8dSManikanta Pubbisetty u32 btcoex_cfg_cmdid; 1020add6cd8dSManikanta Pubbisetty u32 peer_tx_mu_txmit_count_cmdid; 1021add6cd8dSManikanta Pubbisetty u32 peer_tx_mu_txmit_rstcnt_cmdid; 1022add6cd8dSManikanta Pubbisetty u32 peer_gid_userpos_list_cmdid; 1023add6cd8dSManikanta Pubbisetty u32 pdev_check_cal_version_cmdid; 1024add6cd8dSManikanta Pubbisetty u32 coex_version_cfg_cmid; 1025add6cd8dSManikanta Pubbisetty u32 pdev_get_rx_filter_cmdid; 1026add6cd8dSManikanta Pubbisetty u32 pdev_extended_nss_cfg_cmdid; 1027add6cd8dSManikanta Pubbisetty u32 vdev_set_scan_nac_rssi_cmdid; 1028add6cd8dSManikanta Pubbisetty u32 prog_gpio_band_select_cmdid; 1029add6cd8dSManikanta Pubbisetty u32 config_smart_logging_cmdid; 1030add6cd8dSManikanta Pubbisetty u32 debug_fatal_condition_cmdid; 1031add6cd8dSManikanta Pubbisetty u32 get_tsf_timer_cmdid; 1032add6cd8dSManikanta Pubbisetty u32 pdev_get_tpc_table_cmdid; 1033add6cd8dSManikanta Pubbisetty u32 vdev_sifs_trigger_time_cmdid; 1034add6cd8dSManikanta Pubbisetty u32 pdev_wds_entry_list_cmdid; 1035add6cd8dSManikanta Pubbisetty u32 tdls_set_offchan_mode_cmdid; 10366f6eb1bcSSriram R u32 radar_found_cmdid; 103784758d4dSBhagavathi Perumal S u32 set_bb_timing_cmdid; 1038ce42870eSBartosz Markowski }; 1039ce42870eSBartosz Markowski 10405e3dd157SKalle Valo /* 10415e3dd157SKalle Valo * wmi command groups. 10425e3dd157SKalle Valo */ 10435e3dd157SKalle Valo enum wmi_cmd_group { 10445e3dd157SKalle Valo /* 0 to 2 are reserved */ 10455e3dd157SKalle Valo WMI_GRP_START = 0x3, 10465e3dd157SKalle Valo WMI_GRP_SCAN = WMI_GRP_START, 10475e3dd157SKalle Valo WMI_GRP_PDEV, 10485e3dd157SKalle Valo WMI_GRP_VDEV, 10495e3dd157SKalle Valo WMI_GRP_PEER, 10505e3dd157SKalle Valo WMI_GRP_MGMT, 10515e3dd157SKalle Valo WMI_GRP_BA_NEG, 10525e3dd157SKalle Valo WMI_GRP_STA_PS, 10535e3dd157SKalle Valo WMI_GRP_DFS, 10545e3dd157SKalle Valo WMI_GRP_ROAM, 10555e3dd157SKalle Valo WMI_GRP_OFL_SCAN, 10565e3dd157SKalle Valo WMI_GRP_P2P, 10575e3dd157SKalle Valo WMI_GRP_AP_PS, 10585e3dd157SKalle Valo WMI_GRP_RATE_CTRL, 10595e3dd157SKalle Valo WMI_GRP_PROFILE, 10605e3dd157SKalle Valo WMI_GRP_SUSPEND, 10615e3dd157SKalle Valo WMI_GRP_BCN_FILTER, 10625e3dd157SKalle Valo WMI_GRP_WOW, 10635e3dd157SKalle Valo WMI_GRP_RTT, 10645e3dd157SKalle Valo WMI_GRP_SPECTRAL, 10655e3dd157SKalle Valo WMI_GRP_STATS, 10665e3dd157SKalle Valo WMI_GRP_ARP_NS_OFL, 10675e3dd157SKalle Valo WMI_GRP_NLO_OFL, 10685e3dd157SKalle Valo WMI_GRP_GTK_OFL, 10695e3dd157SKalle Valo WMI_GRP_CSA_OFL, 10705e3dd157SKalle Valo WMI_GRP_CHATTER, 10715e3dd157SKalle Valo WMI_GRP_TID_ADDBA, 10725e3dd157SKalle Valo WMI_GRP_MISC, 10735e3dd157SKalle Valo WMI_GRP_GPIO, 10745e3dd157SKalle Valo }; 10755e3dd157SKalle Valo 10765e3dd157SKalle Valo #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 10775e3dd157SKalle Valo #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 10785e3dd157SKalle Valo 107934957b25SBartosz Markowski #define WMI_CMD_UNSUPPORTED 0 1080b7e3adf9SBartosz Markowski 1081b7e3adf9SBartosz Markowski /* Command IDs and command events for MAIN FW. */ 10825e3dd157SKalle Valo enum wmi_cmd_id { 10835e3dd157SKalle Valo WMI_INIT_CMDID = 0x1, 10845e3dd157SKalle Valo 10855e3dd157SKalle Valo /* Scan specific commands */ 10865e3dd157SKalle Valo WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN), 10875e3dd157SKalle Valo WMI_STOP_SCAN_CMDID, 10885e3dd157SKalle Valo WMI_SCAN_CHAN_LIST_CMDID, 10895e3dd157SKalle Valo WMI_SCAN_SCH_PRIO_TBL_CMDID, 10905e3dd157SKalle Valo 10915e3dd157SKalle Valo /* PDEV (physical device) specific commands */ 10925e3dd157SKalle Valo WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV), 10935e3dd157SKalle Valo WMI_PDEV_SET_CHANNEL_CMDID, 10945e3dd157SKalle Valo WMI_PDEV_SET_PARAM_CMDID, 10955e3dd157SKalle Valo WMI_PDEV_PKTLOG_ENABLE_CMDID, 10965e3dd157SKalle Valo WMI_PDEV_PKTLOG_DISABLE_CMDID, 10975e3dd157SKalle Valo WMI_PDEV_SET_WMM_PARAMS_CMDID, 10985e3dd157SKalle Valo WMI_PDEV_SET_HT_CAP_IE_CMDID, 10995e3dd157SKalle Valo WMI_PDEV_SET_VHT_CAP_IE_CMDID, 11005e3dd157SKalle Valo WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 11015e3dd157SKalle Valo WMI_PDEV_SET_QUIET_MODE_CMDID, 11025e3dd157SKalle Valo WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 11035e3dd157SKalle Valo WMI_PDEV_GET_TPC_CONFIG_CMDID, 11045e3dd157SKalle Valo WMI_PDEV_SET_BASE_MACADDR_CMDID, 11055e3dd157SKalle Valo 11065e3dd157SKalle Valo /* VDEV (virtual device) specific commands */ 11075e3dd157SKalle Valo WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV), 11085e3dd157SKalle Valo WMI_VDEV_DELETE_CMDID, 11095e3dd157SKalle Valo WMI_VDEV_START_REQUEST_CMDID, 11105e3dd157SKalle Valo WMI_VDEV_RESTART_REQUEST_CMDID, 11115e3dd157SKalle Valo WMI_VDEV_UP_CMDID, 11125e3dd157SKalle Valo WMI_VDEV_STOP_CMDID, 11135e3dd157SKalle Valo WMI_VDEV_DOWN_CMDID, 11145e3dd157SKalle Valo WMI_VDEV_SET_PARAM_CMDID, 11155e3dd157SKalle Valo WMI_VDEV_INSTALL_KEY_CMDID, 11165e3dd157SKalle Valo 11175e3dd157SKalle Valo /* peer specific commands */ 11185e3dd157SKalle Valo WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER), 11195e3dd157SKalle Valo WMI_PEER_DELETE_CMDID, 11205e3dd157SKalle Valo WMI_PEER_FLUSH_TIDS_CMDID, 11215e3dd157SKalle Valo WMI_PEER_SET_PARAM_CMDID, 11225e3dd157SKalle Valo WMI_PEER_ASSOC_CMDID, 11235e3dd157SKalle Valo WMI_PEER_ADD_WDS_ENTRY_CMDID, 11245e3dd157SKalle Valo WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 11255e3dd157SKalle Valo WMI_PEER_MCAST_GROUP_CMDID, 11265e3dd157SKalle Valo 11275e3dd157SKalle Valo /* beacon/management specific commands */ 11285e3dd157SKalle Valo WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT), 11295e3dd157SKalle Valo WMI_PDEV_SEND_BCN_CMDID, 11305e3dd157SKalle Valo WMI_BCN_TMPL_CMDID, 11315e3dd157SKalle Valo WMI_BCN_FILTER_RX_CMDID, 11325e3dd157SKalle Valo WMI_PRB_REQ_FILTER_RX_CMDID, 11335e3dd157SKalle Valo WMI_MGMT_TX_CMDID, 11345e3dd157SKalle Valo WMI_PRB_TMPL_CMDID, 11355e3dd157SKalle Valo 11365e3dd157SKalle Valo /* commands to directly control BA negotiation directly from host. */ 11375e3dd157SKalle Valo WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG), 11385e3dd157SKalle Valo WMI_ADDBA_SEND_CMDID, 11395e3dd157SKalle Valo WMI_ADDBA_STATUS_CMDID, 11405e3dd157SKalle Valo WMI_DELBA_SEND_CMDID, 11415e3dd157SKalle Valo WMI_ADDBA_SET_RESP_CMDID, 11425e3dd157SKalle Valo WMI_SEND_SINGLEAMSDU_CMDID, 11435e3dd157SKalle Valo 11445e3dd157SKalle Valo /* Station power save specific config */ 11455e3dd157SKalle Valo WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS), 11465e3dd157SKalle Valo WMI_STA_POWERSAVE_PARAM_CMDID, 11475e3dd157SKalle Valo WMI_STA_MIMO_PS_MODE_CMDID, 11485e3dd157SKalle Valo 11495e3dd157SKalle Valo /** DFS-specific commands */ 11505e3dd157SKalle Valo WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS), 11515e3dd157SKalle Valo WMI_PDEV_DFS_DISABLE_CMDID, 11525e3dd157SKalle Valo 11535e3dd157SKalle Valo /* Roaming specific commands */ 11545e3dd157SKalle Valo WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM), 11555e3dd157SKalle Valo WMI_ROAM_SCAN_RSSI_THRESHOLD, 11565e3dd157SKalle Valo WMI_ROAM_SCAN_PERIOD, 11575e3dd157SKalle Valo WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 11585e3dd157SKalle Valo WMI_ROAM_AP_PROFILE, 11595e3dd157SKalle Valo 11605e3dd157SKalle Valo /* offload scan specific commands */ 11615e3dd157SKalle Valo WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN), 11625e3dd157SKalle Valo WMI_OFL_SCAN_REMOVE_AP_PROFILE, 11635e3dd157SKalle Valo WMI_OFL_SCAN_PERIOD, 11645e3dd157SKalle Valo 11655e3dd157SKalle Valo /* P2P specific commands */ 11665e3dd157SKalle Valo WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P), 11675e3dd157SKalle Valo WMI_P2P_DEV_SET_DISCOVERABILITY, 11685e3dd157SKalle Valo WMI_P2P_GO_SET_BEACON_IE, 11695e3dd157SKalle Valo WMI_P2P_GO_SET_PROBE_RESP_IE, 11705e3dd157SKalle Valo WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 11715e3dd157SKalle Valo 11725e3dd157SKalle Valo /* AP power save specific config */ 11735e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS), 11745e3dd157SKalle Valo WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 11755e3dd157SKalle Valo 11765e3dd157SKalle Valo /* Rate-control specific commands */ 11775e3dd157SKalle Valo WMI_PEER_RATE_RETRY_SCHED_CMDID = 11785e3dd157SKalle Valo WMI_CMD_GRP(WMI_GRP_RATE_CTRL), 11795e3dd157SKalle Valo 11805e3dd157SKalle Valo /* WLAN Profiling commands. */ 11815e3dd157SKalle Valo WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE), 11825e3dd157SKalle Valo WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 11835e3dd157SKalle Valo WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 11845e3dd157SKalle Valo WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 11855e3dd157SKalle Valo WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 11865e3dd157SKalle Valo 11875e3dd157SKalle Valo /* Suspend resume command Ids */ 11885e3dd157SKalle Valo WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND), 11895e3dd157SKalle Valo WMI_PDEV_RESUME_CMDID, 11905e3dd157SKalle Valo 11915e3dd157SKalle Valo /* Beacon filter commands */ 11925e3dd157SKalle Valo WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER), 11935e3dd157SKalle Valo WMI_RMV_BCN_FILTER_CMDID, 11945e3dd157SKalle Valo 11955e3dd157SKalle Valo /* WOW Specific WMI commands*/ 11965e3dd157SKalle Valo WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW), 11975e3dd157SKalle Valo WMI_WOW_DEL_WAKE_PATTERN_CMDID, 11985e3dd157SKalle Valo WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 11995e3dd157SKalle Valo WMI_WOW_ENABLE_CMDID, 12005e3dd157SKalle Valo WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 12015e3dd157SKalle Valo 12025e3dd157SKalle Valo /* RTT measurement related cmd */ 12035e3dd157SKalle Valo WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT), 12045e3dd157SKalle Valo WMI_RTT_TSF_CMDID, 12055e3dd157SKalle Valo 12065e3dd157SKalle Valo /* spectral scan commands */ 12075e3dd157SKalle Valo WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL), 12085e3dd157SKalle Valo WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 12095e3dd157SKalle Valo 12105e3dd157SKalle Valo /* F/W stats */ 12115e3dd157SKalle Valo WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS), 12125e3dd157SKalle Valo 12135e3dd157SKalle Valo /* ARP OFFLOAD REQUEST*/ 12145e3dd157SKalle Valo WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL), 12155e3dd157SKalle Valo 12165e3dd157SKalle Valo /* NS offload confid*/ 12175e3dd157SKalle Valo WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL), 12185e3dd157SKalle Valo 12195e3dd157SKalle Valo /* GTK offload Specific WMI commands*/ 12205e3dd157SKalle Valo WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL), 12215e3dd157SKalle Valo 12225e3dd157SKalle Valo /* CSA offload Specific WMI commands*/ 12235e3dd157SKalle Valo WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL), 12245e3dd157SKalle Valo WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 12255e3dd157SKalle Valo 12265e3dd157SKalle Valo /* Chatter commands*/ 12275e3dd157SKalle Valo WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER), 12285e3dd157SKalle Valo 12295e3dd157SKalle Valo /* addba specific commands */ 12305e3dd157SKalle Valo WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA), 12315e3dd157SKalle Valo WMI_PEER_TID_DELBA_CMDID, 12325e3dd157SKalle Valo 12335e3dd157SKalle Valo /* set station mimo powersave method */ 12345e3dd157SKalle Valo WMI_STA_DTIM_PS_METHOD_CMDID, 12355e3dd157SKalle Valo /* Configure the Station UAPSD AC Auto Trigger Parameters */ 12365e3dd157SKalle Valo WMI_STA_UAPSD_AUTO_TRIG_CMDID, 12375e3dd157SKalle Valo 12385e3dd157SKalle Valo /* STA Keep alive parameter configuration, 123937ff1b0dSMarcin Rokicki * Requires WMI_SERVICE_STA_KEEP_ALIVE 124037ff1b0dSMarcin Rokicki */ 12415e3dd157SKalle Valo WMI_STA_KEEPALIVE_CMD, 12425e3dd157SKalle Valo 12435e3dd157SKalle Valo /* misc command group */ 12445e3dd157SKalle Valo WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC), 12455e3dd157SKalle Valo WMI_PDEV_UTF_CMDID, 12465e3dd157SKalle Valo WMI_DBGLOG_CFG_CMDID, 12475e3dd157SKalle Valo WMI_PDEV_QVIT_CMDID, 12485e3dd157SKalle Valo WMI_PDEV_FTM_INTG_CMDID, 12495e3dd157SKalle Valo WMI_VDEV_SET_KEEPALIVE_CMDID, 12505e3dd157SKalle Valo WMI_VDEV_GET_KEEPALIVE_CMDID, 12519cfbce75SMichal Kazior WMI_FORCE_FW_HANG_CMDID, 12525e3dd157SKalle Valo 12535e3dd157SKalle Valo /* GPIO Configuration */ 12545e3dd157SKalle Valo WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO), 12555e3dd157SKalle Valo WMI_GPIO_OUTPUT_CMDID, 12565e3dd157SKalle Valo }; 12575e3dd157SKalle Valo 12585e3dd157SKalle Valo enum wmi_event_id { 12595e3dd157SKalle Valo WMI_SERVICE_READY_EVENTID = 0x1, 12605e3dd157SKalle Valo WMI_READY_EVENTID, 1261cea19a6cSCarl Huang WMI_SERVICE_AVAILABLE_EVENTID, 12625e3dd157SKalle Valo 12635e3dd157SKalle Valo /* Scan specific events */ 12645e3dd157SKalle Valo WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 12655e3dd157SKalle Valo 12665e3dd157SKalle Valo /* PDEV specific events */ 12675e3dd157SKalle Valo WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV), 12685e3dd157SKalle Valo WMI_CHAN_INFO_EVENTID, 12695e3dd157SKalle Valo WMI_PHYERR_EVENTID, 12705e3dd157SKalle Valo 12715e3dd157SKalle Valo /* VDEV specific events */ 12725e3dd157SKalle Valo WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV), 12735e3dd157SKalle Valo WMI_VDEV_STOPPED_EVENTID, 12745e3dd157SKalle Valo WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 12755e3dd157SKalle Valo 12765e3dd157SKalle Valo /* peer specific events */ 12775e3dd157SKalle Valo WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER), 12785e3dd157SKalle Valo 12795e3dd157SKalle Valo /* beacon/mgmt specific events */ 12805e3dd157SKalle Valo WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT), 12815e3dd157SKalle Valo WMI_HOST_SWBA_EVENTID, 12825e3dd157SKalle Valo WMI_TBTTOFFSET_UPDATE_EVENTID, 12835e3dd157SKalle Valo 12845e3dd157SKalle Valo /* ADDBA Related WMI Events*/ 12855e3dd157SKalle Valo WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG), 12865e3dd157SKalle Valo WMI_TX_ADDBA_COMPLETE_EVENTID, 12875e3dd157SKalle Valo 12885e3dd157SKalle Valo /* Roam event to trigger roaming on host */ 12895e3dd157SKalle Valo WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM), 12905e3dd157SKalle Valo WMI_PROFILE_MATCH, 12915e3dd157SKalle Valo 12925e3dd157SKalle Valo /* WoW */ 12935e3dd157SKalle Valo WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW), 12945e3dd157SKalle Valo 12955e3dd157SKalle Valo /* RTT */ 12965e3dd157SKalle Valo WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT), 12975e3dd157SKalle Valo WMI_TSF_MEASUREMENT_REPORT_EVENTID, 12985e3dd157SKalle Valo WMI_RTT_ERROR_REPORT_EVENTID, 12995e3dd157SKalle Valo 13005e3dd157SKalle Valo /* GTK offload */ 13015e3dd157SKalle Valo WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL), 13025e3dd157SKalle Valo WMI_GTK_REKEY_FAIL_EVENTID, 13035e3dd157SKalle Valo 13045e3dd157SKalle Valo /* CSA IE received event */ 13055e3dd157SKalle Valo WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL), 13065e3dd157SKalle Valo 13075e3dd157SKalle Valo /* Misc events */ 13085e3dd157SKalle Valo WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC), 13095e3dd157SKalle Valo WMI_PDEV_UTF_EVENTID, 13105e3dd157SKalle Valo WMI_DEBUG_MESG_EVENTID, 13115e3dd157SKalle Valo WMI_UPDATE_STATS_EVENTID, 13125e3dd157SKalle Valo WMI_DEBUG_PRINT_EVENTID, 13135e3dd157SKalle Valo WMI_DCS_INTERFERENCE_EVENTID, 13145e3dd157SKalle Valo WMI_PDEV_QVIT_EVENTID, 13155e3dd157SKalle Valo WMI_WLAN_PROFILE_DATA_EVENTID, 13165e3dd157SKalle Valo WMI_PDEV_FTM_INTG_EVENTID, 13175e3dd157SKalle Valo WMI_WLAN_FREQ_AVOID_EVENTID, 13185e3dd157SKalle Valo WMI_VDEV_GET_KEEPALIVE_EVENTID, 13195e3dd157SKalle Valo 13205e3dd157SKalle Valo /* GPIO Event */ 13215e3dd157SKalle Valo WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO), 13225e3dd157SKalle Valo }; 13235e3dd157SKalle Valo 1324b7e3adf9SBartosz Markowski /* Command IDs and command events for 10.X firmware */ 1325b7e3adf9SBartosz Markowski enum wmi_10x_cmd_id { 1326b7e3adf9SBartosz Markowski WMI_10X_START_CMDID = 0x9000, 1327b7e3adf9SBartosz Markowski WMI_10X_END_CMDID = 0x9FFF, 1328b7e3adf9SBartosz Markowski 1329b7e3adf9SBartosz Markowski /* initialize the wlan sub system */ 1330b7e3adf9SBartosz Markowski WMI_10X_INIT_CMDID, 1331b7e3adf9SBartosz Markowski 1332b7e3adf9SBartosz Markowski /* Scan specific commands */ 1333b7e3adf9SBartosz Markowski 1334b7e3adf9SBartosz Markowski WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID, 1335b7e3adf9SBartosz Markowski WMI_10X_STOP_SCAN_CMDID, 1336b7e3adf9SBartosz Markowski WMI_10X_SCAN_CHAN_LIST_CMDID, 1337b7e3adf9SBartosz Markowski WMI_10X_ECHO_CMDID, 1338b7e3adf9SBartosz Markowski 1339b7e3adf9SBartosz Markowski /* PDEV(physical device) specific commands */ 1340b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_REGDOMAIN_CMDID, 1341b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_CHANNEL_CMDID, 1342b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_PARAM_CMDID, 1343b7e3adf9SBartosz Markowski WMI_10X_PDEV_PKTLOG_ENABLE_CMDID, 1344b7e3adf9SBartosz Markowski WMI_10X_PDEV_PKTLOG_DISABLE_CMDID, 1345b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_WMM_PARAMS_CMDID, 1346b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_HT_CAP_IE_CMDID, 1347b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID, 1348b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_BASE_MACADDR_CMDID, 1349b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID, 1350b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_QUIET_MODE_CMDID, 1351b7e3adf9SBartosz Markowski WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID, 1352b7e3adf9SBartosz Markowski WMI_10X_PDEV_GET_TPC_CONFIG_CMDID, 1353b7e3adf9SBartosz Markowski 1354b7e3adf9SBartosz Markowski /* VDEV(virtual device) specific commands */ 1355b7e3adf9SBartosz Markowski WMI_10X_VDEV_CREATE_CMDID, 1356b7e3adf9SBartosz Markowski WMI_10X_VDEV_DELETE_CMDID, 1357b7e3adf9SBartosz Markowski WMI_10X_VDEV_START_REQUEST_CMDID, 1358b7e3adf9SBartosz Markowski WMI_10X_VDEV_RESTART_REQUEST_CMDID, 1359b7e3adf9SBartosz Markowski WMI_10X_VDEV_UP_CMDID, 1360b7e3adf9SBartosz Markowski WMI_10X_VDEV_STOP_CMDID, 1361b7e3adf9SBartosz Markowski WMI_10X_VDEV_DOWN_CMDID, 1362b7e3adf9SBartosz Markowski WMI_10X_VDEV_STANDBY_RESPONSE_CMDID, 1363b7e3adf9SBartosz Markowski WMI_10X_VDEV_RESUME_RESPONSE_CMDID, 1364b7e3adf9SBartosz Markowski WMI_10X_VDEV_SET_PARAM_CMDID, 1365b7e3adf9SBartosz Markowski WMI_10X_VDEV_INSTALL_KEY_CMDID, 1366b7e3adf9SBartosz Markowski 1367b7e3adf9SBartosz Markowski /* peer specific commands */ 1368b7e3adf9SBartosz Markowski WMI_10X_PEER_CREATE_CMDID, 1369b7e3adf9SBartosz Markowski WMI_10X_PEER_DELETE_CMDID, 1370b7e3adf9SBartosz Markowski WMI_10X_PEER_FLUSH_TIDS_CMDID, 1371b7e3adf9SBartosz Markowski WMI_10X_PEER_SET_PARAM_CMDID, 1372b7e3adf9SBartosz Markowski WMI_10X_PEER_ASSOC_CMDID, 1373b7e3adf9SBartosz Markowski WMI_10X_PEER_ADD_WDS_ENTRY_CMDID, 1374b7e3adf9SBartosz Markowski WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID, 1375b7e3adf9SBartosz Markowski WMI_10X_PEER_MCAST_GROUP_CMDID, 1376b7e3adf9SBartosz Markowski 1377b7e3adf9SBartosz Markowski /* beacon/management specific commands */ 1378b7e3adf9SBartosz Markowski 1379b7e3adf9SBartosz Markowski WMI_10X_BCN_TX_CMDID, 1380b7e3adf9SBartosz Markowski WMI_10X_BCN_PRB_TMPL_CMDID, 1381b7e3adf9SBartosz Markowski WMI_10X_BCN_FILTER_RX_CMDID, 1382b7e3adf9SBartosz Markowski WMI_10X_PRB_REQ_FILTER_RX_CMDID, 1383b7e3adf9SBartosz Markowski WMI_10X_MGMT_TX_CMDID, 1384b7e3adf9SBartosz Markowski 1385b7e3adf9SBartosz Markowski /* commands to directly control ba negotiation directly from host. */ 1386b7e3adf9SBartosz Markowski WMI_10X_ADDBA_CLEAR_RESP_CMDID, 1387b7e3adf9SBartosz Markowski WMI_10X_ADDBA_SEND_CMDID, 1388b7e3adf9SBartosz Markowski WMI_10X_ADDBA_STATUS_CMDID, 1389b7e3adf9SBartosz Markowski WMI_10X_DELBA_SEND_CMDID, 1390b7e3adf9SBartosz Markowski WMI_10X_ADDBA_SET_RESP_CMDID, 1391b7e3adf9SBartosz Markowski WMI_10X_SEND_SINGLEAMSDU_CMDID, 1392b7e3adf9SBartosz Markowski 1393b7e3adf9SBartosz Markowski /* Station power save specific config */ 1394b7e3adf9SBartosz Markowski WMI_10X_STA_POWERSAVE_MODE_CMDID, 1395b7e3adf9SBartosz Markowski WMI_10X_STA_POWERSAVE_PARAM_CMDID, 1396b7e3adf9SBartosz Markowski WMI_10X_STA_MIMO_PS_MODE_CMDID, 1397b7e3adf9SBartosz Markowski 1398b7e3adf9SBartosz Markowski /* set debug log config */ 1399b7e3adf9SBartosz Markowski WMI_10X_DBGLOG_CFG_CMDID, 1400b7e3adf9SBartosz Markowski 1401b7e3adf9SBartosz Markowski /* DFS-specific commands */ 1402b7e3adf9SBartosz Markowski WMI_10X_PDEV_DFS_ENABLE_CMDID, 1403b7e3adf9SBartosz Markowski WMI_10X_PDEV_DFS_DISABLE_CMDID, 1404b7e3adf9SBartosz Markowski 1405b7e3adf9SBartosz Markowski /* QVIT specific command id */ 1406b7e3adf9SBartosz Markowski WMI_10X_PDEV_QVIT_CMDID, 1407b7e3adf9SBartosz Markowski 1408b7e3adf9SBartosz Markowski /* Offload Scan and Roaming related commands */ 1409b7e3adf9SBartosz Markowski WMI_10X_ROAM_SCAN_MODE, 1410b7e3adf9SBartosz Markowski WMI_10X_ROAM_SCAN_RSSI_THRESHOLD, 1411b7e3adf9SBartosz Markowski WMI_10X_ROAM_SCAN_PERIOD, 1412b7e3adf9SBartosz Markowski WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1413b7e3adf9SBartosz Markowski WMI_10X_ROAM_AP_PROFILE, 1414b7e3adf9SBartosz Markowski WMI_10X_OFL_SCAN_ADD_AP_PROFILE, 1415b7e3adf9SBartosz Markowski WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE, 1416b7e3adf9SBartosz Markowski WMI_10X_OFL_SCAN_PERIOD, 1417b7e3adf9SBartosz Markowski 1418b7e3adf9SBartosz Markowski /* P2P specific commands */ 1419b7e3adf9SBartosz Markowski WMI_10X_P2P_DEV_SET_DEVICE_INFO, 1420b7e3adf9SBartosz Markowski WMI_10X_P2P_DEV_SET_DISCOVERABILITY, 1421b7e3adf9SBartosz Markowski WMI_10X_P2P_GO_SET_BEACON_IE, 1422b7e3adf9SBartosz Markowski WMI_10X_P2P_GO_SET_PROBE_RESP_IE, 1423b7e3adf9SBartosz Markowski 1424b7e3adf9SBartosz Markowski /* AP power save specific config */ 1425b7e3adf9SBartosz Markowski WMI_10X_AP_PS_PEER_PARAM_CMDID, 1426b7e3adf9SBartosz Markowski WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID, 1427b7e3adf9SBartosz Markowski 1428b7e3adf9SBartosz Markowski /* Rate-control specific commands */ 1429b7e3adf9SBartosz Markowski WMI_10X_PEER_RATE_RETRY_SCHED_CMDID, 1430b7e3adf9SBartosz Markowski 1431b7e3adf9SBartosz Markowski /* WLAN Profiling commands. */ 1432b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_TRIGGER_CMDID, 1433b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 1434b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 1435b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 1436b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 1437b7e3adf9SBartosz Markowski 1438b7e3adf9SBartosz Markowski /* Suspend resume command Ids */ 1439b7e3adf9SBartosz Markowski WMI_10X_PDEV_SUSPEND_CMDID, 1440b7e3adf9SBartosz Markowski WMI_10X_PDEV_RESUME_CMDID, 1441b7e3adf9SBartosz Markowski 1442b7e3adf9SBartosz Markowski /* Beacon filter commands */ 1443b7e3adf9SBartosz Markowski WMI_10X_ADD_BCN_FILTER_CMDID, 1444b7e3adf9SBartosz Markowski WMI_10X_RMV_BCN_FILTER_CMDID, 1445b7e3adf9SBartosz Markowski 1446b7e3adf9SBartosz Markowski /* WOW Specific WMI commands*/ 1447b7e3adf9SBartosz Markowski WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID, 1448b7e3adf9SBartosz Markowski WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID, 1449b7e3adf9SBartosz Markowski WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 1450b7e3adf9SBartosz Markowski WMI_10X_WOW_ENABLE_CMDID, 1451b7e3adf9SBartosz Markowski WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 1452b7e3adf9SBartosz Markowski 1453b7e3adf9SBartosz Markowski /* RTT measurement related cmd */ 1454b7e3adf9SBartosz Markowski WMI_10X_RTT_MEASREQ_CMDID, 1455b7e3adf9SBartosz Markowski WMI_10X_RTT_TSF_CMDID, 1456b7e3adf9SBartosz Markowski 1457b7e3adf9SBartosz Markowski /* transmit beacon by value */ 1458b7e3adf9SBartosz Markowski WMI_10X_PDEV_SEND_BCN_CMDID, 1459b7e3adf9SBartosz Markowski 1460b7e3adf9SBartosz Markowski /* F/W stats */ 1461b7e3adf9SBartosz Markowski WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 1462b7e3adf9SBartosz Markowski WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 1463b7e3adf9SBartosz Markowski WMI_10X_REQUEST_STATS_CMDID, 1464b7e3adf9SBartosz Markowski 1465b7e3adf9SBartosz Markowski /* GPIO Configuration */ 1466b7e3adf9SBartosz Markowski WMI_10X_GPIO_CONFIG_CMDID, 1467b7e3adf9SBartosz Markowski WMI_10X_GPIO_OUTPUT_CMDID, 1468b7e3adf9SBartosz Markowski 1469b7e3adf9SBartosz Markowski WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1, 1470b7e3adf9SBartosz Markowski }; 1471b7e3adf9SBartosz Markowski 1472b7e3adf9SBartosz Markowski enum wmi_10x_event_id { 1473b7e3adf9SBartosz Markowski WMI_10X_SERVICE_READY_EVENTID = 0x8000, 1474b7e3adf9SBartosz Markowski WMI_10X_READY_EVENTID, 1475b7e3adf9SBartosz Markowski WMI_10X_START_EVENTID = 0x9000, 1476b7e3adf9SBartosz Markowski WMI_10X_END_EVENTID = 0x9FFF, 1477b7e3adf9SBartosz Markowski 1478b7e3adf9SBartosz Markowski /* Scan specific events */ 1479b7e3adf9SBartosz Markowski WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID, 1480b7e3adf9SBartosz Markowski WMI_10X_ECHO_EVENTID, 1481b7e3adf9SBartosz Markowski WMI_10X_DEBUG_MESG_EVENTID, 1482b7e3adf9SBartosz Markowski WMI_10X_UPDATE_STATS_EVENTID, 1483b7e3adf9SBartosz Markowski 1484b7e3adf9SBartosz Markowski /* Instantaneous RSSI event */ 1485b7e3adf9SBartosz Markowski WMI_10X_INST_RSSI_STATS_EVENTID, 1486b7e3adf9SBartosz Markowski 1487b7e3adf9SBartosz Markowski /* VDEV specific events */ 1488b7e3adf9SBartosz Markowski WMI_10X_VDEV_START_RESP_EVENTID, 1489b7e3adf9SBartosz Markowski WMI_10X_VDEV_STANDBY_REQ_EVENTID, 1490b7e3adf9SBartosz Markowski WMI_10X_VDEV_RESUME_REQ_EVENTID, 1491b7e3adf9SBartosz Markowski WMI_10X_VDEV_STOPPED_EVENTID, 1492b7e3adf9SBartosz Markowski 1493b7e3adf9SBartosz Markowski /* peer specific events */ 1494b7e3adf9SBartosz Markowski WMI_10X_PEER_STA_KICKOUT_EVENTID, 1495b7e3adf9SBartosz Markowski 1496b7e3adf9SBartosz Markowski /* beacon/mgmt specific events */ 1497b7e3adf9SBartosz Markowski WMI_10X_HOST_SWBA_EVENTID, 1498b7e3adf9SBartosz Markowski WMI_10X_TBTTOFFSET_UPDATE_EVENTID, 1499b7e3adf9SBartosz Markowski WMI_10X_MGMT_RX_EVENTID, 1500b7e3adf9SBartosz Markowski 1501b7e3adf9SBartosz Markowski /* Channel stats event */ 1502b7e3adf9SBartosz Markowski WMI_10X_CHAN_INFO_EVENTID, 1503b7e3adf9SBartosz Markowski 1504b7e3adf9SBartosz Markowski /* PHY Error specific WMI event */ 1505b7e3adf9SBartosz Markowski WMI_10X_PHYERR_EVENTID, 1506b7e3adf9SBartosz Markowski 1507b7e3adf9SBartosz Markowski /* Roam event to trigger roaming on host */ 1508b7e3adf9SBartosz Markowski WMI_10X_ROAM_EVENTID, 1509b7e3adf9SBartosz Markowski 1510b7e3adf9SBartosz Markowski /* matching AP found from list of profiles */ 1511b7e3adf9SBartosz Markowski WMI_10X_PROFILE_MATCH, 1512b7e3adf9SBartosz Markowski 1513b7e3adf9SBartosz Markowski /* debug print message used for tracing FW code while debugging */ 1514b7e3adf9SBartosz Markowski WMI_10X_DEBUG_PRINT_EVENTID, 1515b7e3adf9SBartosz Markowski /* VI spoecific event */ 1516b7e3adf9SBartosz Markowski WMI_10X_PDEV_QVIT_EVENTID, 1517b7e3adf9SBartosz Markowski /* FW code profile data in response to profile request */ 1518b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_DATA_EVENTID, 1519b7e3adf9SBartosz Markowski 1520b7e3adf9SBartosz Markowski /*RTT related event ID*/ 1521b7e3adf9SBartosz Markowski WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID, 1522b7e3adf9SBartosz Markowski WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID, 1523b7e3adf9SBartosz Markowski WMI_10X_RTT_ERROR_REPORT_EVENTID, 1524b7e3adf9SBartosz Markowski 1525b7e3adf9SBartosz Markowski WMI_10X_WOW_WAKEUP_HOST_EVENTID, 1526b7e3adf9SBartosz Markowski WMI_10X_DCS_INTERFERENCE_EVENTID, 1527b7e3adf9SBartosz Markowski 1528b7e3adf9SBartosz Markowski /* TPC config for the current operating channel */ 1529b7e3adf9SBartosz Markowski WMI_10X_PDEV_TPC_CONFIG_EVENTID, 1530b7e3adf9SBartosz Markowski 1531b7e3adf9SBartosz Markowski WMI_10X_GPIO_INPUT_EVENTID, 1532b7e3adf9SBartosz Markowski WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID - 1, 1533b7e3adf9SBartosz Markowski }; 1534b7e3adf9SBartosz Markowski 153524c88f78SMichal Kazior enum wmi_10_2_cmd_id { 153624c88f78SMichal Kazior WMI_10_2_START_CMDID = 0x9000, 153724c88f78SMichal Kazior WMI_10_2_END_CMDID = 0x9FFF, 153824c88f78SMichal Kazior WMI_10_2_INIT_CMDID, 153924c88f78SMichal Kazior WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID, 154024c88f78SMichal Kazior WMI_10_2_STOP_SCAN_CMDID, 154124c88f78SMichal Kazior WMI_10_2_SCAN_CHAN_LIST_CMDID, 154224c88f78SMichal Kazior WMI_10_2_ECHO_CMDID, 154324c88f78SMichal Kazior WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, 154424c88f78SMichal Kazior WMI_10_2_PDEV_SET_CHANNEL_CMDID, 154524c88f78SMichal Kazior WMI_10_2_PDEV_SET_PARAM_CMDID, 154624c88f78SMichal Kazior WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, 154724c88f78SMichal Kazior WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, 154824c88f78SMichal Kazior WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, 154924c88f78SMichal Kazior WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, 155024c88f78SMichal Kazior WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, 155124c88f78SMichal Kazior WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, 155224c88f78SMichal Kazior WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, 155324c88f78SMichal Kazior WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, 155424c88f78SMichal Kazior WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, 155524c88f78SMichal Kazior WMI_10_2_VDEV_CREATE_CMDID, 155624c88f78SMichal Kazior WMI_10_2_VDEV_DELETE_CMDID, 155724c88f78SMichal Kazior WMI_10_2_VDEV_START_REQUEST_CMDID, 155824c88f78SMichal Kazior WMI_10_2_VDEV_RESTART_REQUEST_CMDID, 155924c88f78SMichal Kazior WMI_10_2_VDEV_UP_CMDID, 156024c88f78SMichal Kazior WMI_10_2_VDEV_STOP_CMDID, 156124c88f78SMichal Kazior WMI_10_2_VDEV_DOWN_CMDID, 156224c88f78SMichal Kazior WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID, 156324c88f78SMichal Kazior WMI_10_2_VDEV_RESUME_RESPONSE_CMDID, 156424c88f78SMichal Kazior WMI_10_2_VDEV_SET_PARAM_CMDID, 156524c88f78SMichal Kazior WMI_10_2_VDEV_INSTALL_KEY_CMDID, 156624c88f78SMichal Kazior WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID, 156724c88f78SMichal Kazior WMI_10_2_PEER_CREATE_CMDID, 156824c88f78SMichal Kazior WMI_10_2_PEER_DELETE_CMDID, 156924c88f78SMichal Kazior WMI_10_2_PEER_FLUSH_TIDS_CMDID, 157024c88f78SMichal Kazior WMI_10_2_PEER_SET_PARAM_CMDID, 157124c88f78SMichal Kazior WMI_10_2_PEER_ASSOC_CMDID, 157224c88f78SMichal Kazior WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, 157324c88f78SMichal Kazior WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID, 157424c88f78SMichal Kazior WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, 157524c88f78SMichal Kazior WMI_10_2_PEER_MCAST_GROUP_CMDID, 157624c88f78SMichal Kazior WMI_10_2_BCN_TX_CMDID, 157724c88f78SMichal Kazior WMI_10_2_BCN_PRB_TMPL_CMDID, 157824c88f78SMichal Kazior WMI_10_2_BCN_FILTER_RX_CMDID, 157924c88f78SMichal Kazior WMI_10_2_PRB_REQ_FILTER_RX_CMDID, 158024c88f78SMichal Kazior WMI_10_2_MGMT_TX_CMDID, 158124c88f78SMichal Kazior WMI_10_2_ADDBA_CLEAR_RESP_CMDID, 158224c88f78SMichal Kazior WMI_10_2_ADDBA_SEND_CMDID, 158324c88f78SMichal Kazior WMI_10_2_ADDBA_STATUS_CMDID, 158424c88f78SMichal Kazior WMI_10_2_DELBA_SEND_CMDID, 158524c88f78SMichal Kazior WMI_10_2_ADDBA_SET_RESP_CMDID, 158624c88f78SMichal Kazior WMI_10_2_SEND_SINGLEAMSDU_CMDID, 158724c88f78SMichal Kazior WMI_10_2_STA_POWERSAVE_MODE_CMDID, 158824c88f78SMichal Kazior WMI_10_2_STA_POWERSAVE_PARAM_CMDID, 158924c88f78SMichal Kazior WMI_10_2_STA_MIMO_PS_MODE_CMDID, 159024c88f78SMichal Kazior WMI_10_2_DBGLOG_CFG_CMDID, 159124c88f78SMichal Kazior WMI_10_2_PDEV_DFS_ENABLE_CMDID, 159224c88f78SMichal Kazior WMI_10_2_PDEV_DFS_DISABLE_CMDID, 159324c88f78SMichal Kazior WMI_10_2_PDEV_QVIT_CMDID, 159424c88f78SMichal Kazior WMI_10_2_ROAM_SCAN_MODE, 159524c88f78SMichal Kazior WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, 159624c88f78SMichal Kazior WMI_10_2_ROAM_SCAN_PERIOD, 159724c88f78SMichal Kazior WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 159824c88f78SMichal Kazior WMI_10_2_ROAM_AP_PROFILE, 159924c88f78SMichal Kazior WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, 160024c88f78SMichal Kazior WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, 160124c88f78SMichal Kazior WMI_10_2_OFL_SCAN_PERIOD, 160224c88f78SMichal Kazior WMI_10_2_P2P_DEV_SET_DEVICE_INFO, 160324c88f78SMichal Kazior WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, 160424c88f78SMichal Kazior WMI_10_2_P2P_GO_SET_BEACON_IE, 160524c88f78SMichal Kazior WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, 160624c88f78SMichal Kazior WMI_10_2_AP_PS_PEER_PARAM_CMDID, 160724c88f78SMichal Kazior WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID, 160824c88f78SMichal Kazior WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, 160924c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, 161024c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 161124c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 161224c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 161324c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 161424c88f78SMichal Kazior WMI_10_2_PDEV_SUSPEND_CMDID, 161524c88f78SMichal Kazior WMI_10_2_PDEV_RESUME_CMDID, 161624c88f78SMichal Kazior WMI_10_2_ADD_BCN_FILTER_CMDID, 161724c88f78SMichal Kazior WMI_10_2_RMV_BCN_FILTER_CMDID, 161824c88f78SMichal Kazior WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, 161924c88f78SMichal Kazior WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, 162024c88f78SMichal Kazior WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 162124c88f78SMichal Kazior WMI_10_2_WOW_ENABLE_CMDID, 162224c88f78SMichal Kazior WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 162324c88f78SMichal Kazior WMI_10_2_RTT_MEASREQ_CMDID, 162424c88f78SMichal Kazior WMI_10_2_RTT_TSF_CMDID, 162524c88f78SMichal Kazior WMI_10_2_RTT_KEEPALIVE_CMDID, 162624c88f78SMichal Kazior WMI_10_2_PDEV_SEND_BCN_CMDID, 162724c88f78SMichal Kazior WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 162824c88f78SMichal Kazior WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 162924c88f78SMichal Kazior WMI_10_2_REQUEST_STATS_CMDID, 163024c88f78SMichal Kazior WMI_10_2_GPIO_CONFIG_CMDID, 163124c88f78SMichal Kazior WMI_10_2_GPIO_OUTPUT_CMDID, 163224c88f78SMichal Kazior WMI_10_2_VDEV_RATEMASK_CMDID, 163324c88f78SMichal Kazior WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID, 163424c88f78SMichal Kazior WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 163524c88f78SMichal Kazior WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 163624c88f78SMichal Kazior WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 163724c88f78SMichal Kazior WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 163824c88f78SMichal Kazior WMI_10_2_FORCE_FW_HANG_CMDID, 163924c88f78SMichal Kazior WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 164024c88f78SMichal Kazior WMI_10_2_PDEV_SET_CTL_TABLE_CMDID, 164124c88f78SMichal Kazior WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID, 164224c88f78SMichal Kazior WMI_10_2_PDEV_RATEPWR_TABLE_CMDID, 164324c88f78SMichal Kazior WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID, 1644a57a6a27SRajkumar Manoharan WMI_10_2_PDEV_GET_INFO, 1645a57a6a27SRajkumar Manoharan WMI_10_2_VDEV_GET_INFO, 1646a57a6a27SRajkumar Manoharan WMI_10_2_VDEV_ATF_REQUEST_CMDID, 1647a57a6a27SRajkumar Manoharan WMI_10_2_PEER_ATF_REQUEST_CMDID, 1648a57a6a27SRajkumar Manoharan WMI_10_2_PDEV_GET_TEMPERATURE_CMDID, 164962f77f09SMaharaja WMI_10_2_MU_CAL_START_CMDID, 165062f77f09SMaharaja WMI_10_2_SET_LTEU_CONFIG_CMDID, 165162f77f09SMaharaja WMI_10_2_SET_CCA_PARAMS, 1652dd2c5fcbSRajkumar Manoharan WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 165384758d4dSBhagavathi Perumal S WMI_10_2_FWTEST_CMDID, 165484758d4dSBhagavathi Perumal S WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID, 165524c88f78SMichal Kazior WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1, 165624c88f78SMichal Kazior }; 165724c88f78SMichal Kazior 165824c88f78SMichal Kazior enum wmi_10_2_event_id { 165924c88f78SMichal Kazior WMI_10_2_SERVICE_READY_EVENTID = 0x8000, 166024c88f78SMichal Kazior WMI_10_2_READY_EVENTID, 166124c88f78SMichal Kazior WMI_10_2_DEBUG_MESG_EVENTID, 166224c88f78SMichal Kazior WMI_10_2_START_EVENTID = 0x9000, 166324c88f78SMichal Kazior WMI_10_2_END_EVENTID = 0x9FFF, 166424c88f78SMichal Kazior WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID, 166524c88f78SMichal Kazior WMI_10_2_ECHO_EVENTID, 166624c88f78SMichal Kazior WMI_10_2_UPDATE_STATS_EVENTID, 166724c88f78SMichal Kazior WMI_10_2_INST_RSSI_STATS_EVENTID, 166824c88f78SMichal Kazior WMI_10_2_VDEV_START_RESP_EVENTID, 166924c88f78SMichal Kazior WMI_10_2_VDEV_STANDBY_REQ_EVENTID, 167024c88f78SMichal Kazior WMI_10_2_VDEV_RESUME_REQ_EVENTID, 167124c88f78SMichal Kazior WMI_10_2_VDEV_STOPPED_EVENTID, 167224c88f78SMichal Kazior WMI_10_2_PEER_STA_KICKOUT_EVENTID, 167324c88f78SMichal Kazior WMI_10_2_HOST_SWBA_EVENTID, 167424c88f78SMichal Kazior WMI_10_2_TBTTOFFSET_UPDATE_EVENTID, 167524c88f78SMichal Kazior WMI_10_2_MGMT_RX_EVENTID, 167624c88f78SMichal Kazior WMI_10_2_CHAN_INFO_EVENTID, 167724c88f78SMichal Kazior WMI_10_2_PHYERR_EVENTID, 167824c88f78SMichal Kazior WMI_10_2_ROAM_EVENTID, 167924c88f78SMichal Kazior WMI_10_2_PROFILE_MATCH, 168024c88f78SMichal Kazior WMI_10_2_DEBUG_PRINT_EVENTID, 168124c88f78SMichal Kazior WMI_10_2_PDEV_QVIT_EVENTID, 168224c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_DATA_EVENTID, 168324c88f78SMichal Kazior WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID, 168424c88f78SMichal Kazior WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID, 168524c88f78SMichal Kazior WMI_10_2_RTT_ERROR_REPORT_EVENTID, 168624c88f78SMichal Kazior WMI_10_2_RTT_KEEPALIVE_EVENTID, 168724c88f78SMichal Kazior WMI_10_2_WOW_WAKEUP_HOST_EVENTID, 168824c88f78SMichal Kazior WMI_10_2_DCS_INTERFERENCE_EVENTID, 168924c88f78SMichal Kazior WMI_10_2_PDEV_TPC_CONFIG_EVENTID, 169024c88f78SMichal Kazior WMI_10_2_GPIO_INPUT_EVENTID, 169124c88f78SMichal Kazior WMI_10_2_PEER_RATECODE_LIST_EVENTID, 169224c88f78SMichal Kazior WMI_10_2_GENERIC_BUFFER_EVENTID, 169324c88f78SMichal Kazior WMI_10_2_MCAST_BUF_RELEASE_EVENTID, 169424c88f78SMichal Kazior WMI_10_2_MCAST_LIST_AGEOUT_EVENTID, 169524c88f78SMichal Kazior WMI_10_2_WDS_PEER_EVENTID, 1696a57a6a27SRajkumar Manoharan WMI_10_2_PEER_STA_PS_STATECHG_EVENTID, 1697a57a6a27SRajkumar Manoharan WMI_10_2_PDEV_TEMPERATURE_EVENTID, 1698dd2c5fcbSRajkumar Manoharan WMI_10_2_MU_REPORT_EVENTID, 1699dd2c5fcbSRajkumar Manoharan WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID, 170024c88f78SMichal Kazior WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1, 170124c88f78SMichal Kazior }; 170224c88f78SMichal Kazior 17032d491e69SRaja Mani enum wmi_10_4_cmd_id { 17042d491e69SRaja Mani WMI_10_4_START_CMDID = 0x9000, 17052d491e69SRaja Mani WMI_10_4_END_CMDID = 0x9FFF, 17062d491e69SRaja Mani WMI_10_4_INIT_CMDID, 17072d491e69SRaja Mani WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID, 17082d491e69SRaja Mani WMI_10_4_STOP_SCAN_CMDID, 17092d491e69SRaja Mani WMI_10_4_SCAN_CHAN_LIST_CMDID, 17102d491e69SRaja Mani WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID, 17112d491e69SRaja Mani WMI_10_4_SCAN_UPDATE_REQUEST_CMDID, 17122d491e69SRaja Mani WMI_10_4_ECHO_CMDID, 17132d491e69SRaja Mani WMI_10_4_PDEV_SET_REGDOMAIN_CMDID, 17142d491e69SRaja Mani WMI_10_4_PDEV_SET_CHANNEL_CMDID, 17152d491e69SRaja Mani WMI_10_4_PDEV_SET_PARAM_CMDID, 17162d491e69SRaja Mani WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID, 17172d491e69SRaja Mani WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID, 17182d491e69SRaja Mani WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID, 17192d491e69SRaja Mani WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID, 17202d491e69SRaja Mani WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID, 17212d491e69SRaja Mani WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID, 17222d491e69SRaja Mani WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID, 17232d491e69SRaja Mani WMI_10_4_PDEV_SET_QUIET_MODE_CMDID, 17242d491e69SRaja Mani WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID, 17252d491e69SRaja Mani WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID, 17262d491e69SRaja Mani WMI_10_4_VDEV_CREATE_CMDID, 17272d491e69SRaja Mani WMI_10_4_VDEV_DELETE_CMDID, 17282d491e69SRaja Mani WMI_10_4_VDEV_START_REQUEST_CMDID, 17292d491e69SRaja Mani WMI_10_4_VDEV_RESTART_REQUEST_CMDID, 17302d491e69SRaja Mani WMI_10_4_VDEV_UP_CMDID, 17312d491e69SRaja Mani WMI_10_4_VDEV_STOP_CMDID, 17322d491e69SRaja Mani WMI_10_4_VDEV_DOWN_CMDID, 17332d491e69SRaja Mani WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID, 17342d491e69SRaja Mani WMI_10_4_VDEV_RESUME_RESPONSE_CMDID, 17352d491e69SRaja Mani WMI_10_4_VDEV_SET_PARAM_CMDID, 17362d491e69SRaja Mani WMI_10_4_VDEV_INSTALL_KEY_CMDID, 17372d491e69SRaja Mani WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID, 17382d491e69SRaja Mani WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID, 17392d491e69SRaja Mani WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID, 17402d491e69SRaja Mani WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID, 17412d491e69SRaja Mani WMI_10_4_PEER_CREATE_CMDID, 17422d491e69SRaja Mani WMI_10_4_PEER_DELETE_CMDID, 17432d491e69SRaja Mani WMI_10_4_PEER_FLUSH_TIDS_CMDID, 17442d491e69SRaja Mani WMI_10_4_PEER_SET_PARAM_CMDID, 17452d491e69SRaja Mani WMI_10_4_PEER_ASSOC_CMDID, 17462d491e69SRaja Mani WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID, 17472d491e69SRaja Mani WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID, 17482d491e69SRaja Mani WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID, 17492d491e69SRaja Mani WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID, 17502d491e69SRaja Mani WMI_10_4_PEER_MCAST_GROUP_CMDID, 17512d491e69SRaja Mani WMI_10_4_BCN_TX_CMDID, 17522d491e69SRaja Mani WMI_10_4_PDEV_SEND_BCN_CMDID, 17532d491e69SRaja Mani WMI_10_4_BCN_PRB_TMPL_CMDID, 17542d491e69SRaja Mani WMI_10_4_BCN_FILTER_RX_CMDID, 17552d491e69SRaja Mani WMI_10_4_PRB_REQ_FILTER_RX_CMDID, 17562d491e69SRaja Mani WMI_10_4_MGMT_TX_CMDID, 17572d491e69SRaja Mani WMI_10_4_PRB_TMPL_CMDID, 17582d491e69SRaja Mani WMI_10_4_ADDBA_CLEAR_RESP_CMDID, 17592d491e69SRaja Mani WMI_10_4_ADDBA_SEND_CMDID, 17602d491e69SRaja Mani WMI_10_4_ADDBA_STATUS_CMDID, 17612d491e69SRaja Mani WMI_10_4_DELBA_SEND_CMDID, 17622d491e69SRaja Mani WMI_10_4_ADDBA_SET_RESP_CMDID, 17632d491e69SRaja Mani WMI_10_4_SEND_SINGLEAMSDU_CMDID, 17642d491e69SRaja Mani WMI_10_4_STA_POWERSAVE_MODE_CMDID, 17652d491e69SRaja Mani WMI_10_4_STA_POWERSAVE_PARAM_CMDID, 17662d491e69SRaja Mani WMI_10_4_STA_MIMO_PS_MODE_CMDID, 17672d491e69SRaja Mani WMI_10_4_DBGLOG_CFG_CMDID, 17682d491e69SRaja Mani WMI_10_4_PDEV_DFS_ENABLE_CMDID, 17692d491e69SRaja Mani WMI_10_4_PDEV_DFS_DISABLE_CMDID, 17702d491e69SRaja Mani WMI_10_4_PDEV_QVIT_CMDID, 17712d491e69SRaja Mani WMI_10_4_ROAM_SCAN_MODE, 17722d491e69SRaja Mani WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD, 17732d491e69SRaja Mani WMI_10_4_ROAM_SCAN_PERIOD, 17742d491e69SRaja Mani WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 17752d491e69SRaja Mani WMI_10_4_ROAM_AP_PROFILE, 17762d491e69SRaja Mani WMI_10_4_OFL_SCAN_ADD_AP_PROFILE, 17772d491e69SRaja Mani WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE, 17782d491e69SRaja Mani WMI_10_4_OFL_SCAN_PERIOD, 17792d491e69SRaja Mani WMI_10_4_P2P_DEV_SET_DEVICE_INFO, 17802d491e69SRaja Mani WMI_10_4_P2P_DEV_SET_DISCOVERABILITY, 17812d491e69SRaja Mani WMI_10_4_P2P_GO_SET_BEACON_IE, 17822d491e69SRaja Mani WMI_10_4_P2P_GO_SET_PROBE_RESP_IE, 17832d491e69SRaja Mani WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID, 17842d491e69SRaja Mani WMI_10_4_AP_PS_PEER_PARAM_CMDID, 17852d491e69SRaja Mani WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID, 17862d491e69SRaja Mani WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID, 17872d491e69SRaja Mani WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID, 17882d491e69SRaja Mani WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 17892d491e69SRaja Mani WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 17902d491e69SRaja Mani WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 17912d491e69SRaja Mani WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 17922d491e69SRaja Mani WMI_10_4_PDEV_SUSPEND_CMDID, 17932d491e69SRaja Mani WMI_10_4_PDEV_RESUME_CMDID, 17942d491e69SRaja Mani WMI_10_4_ADD_BCN_FILTER_CMDID, 17952d491e69SRaja Mani WMI_10_4_RMV_BCN_FILTER_CMDID, 17962d491e69SRaja Mani WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID, 17972d491e69SRaja Mani WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID, 17982d491e69SRaja Mani WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 17992d491e69SRaja Mani WMI_10_4_WOW_ENABLE_CMDID, 18002d491e69SRaja Mani WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 18012d491e69SRaja Mani WMI_10_4_RTT_MEASREQ_CMDID, 18022d491e69SRaja Mani WMI_10_4_RTT_TSF_CMDID, 18032d491e69SRaja Mani WMI_10_4_RTT_KEEPALIVE_CMDID, 18042d491e69SRaja Mani WMI_10_4_OEM_REQ_CMDID, 18052d491e69SRaja Mani WMI_10_4_NAN_CMDID, 18062d491e69SRaja Mani WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 18072d491e69SRaja Mani WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 18082d491e69SRaja Mani WMI_10_4_REQUEST_STATS_CMDID, 18092d491e69SRaja Mani WMI_10_4_GPIO_CONFIG_CMDID, 18102d491e69SRaja Mani WMI_10_4_GPIO_OUTPUT_CMDID, 18112d491e69SRaja Mani WMI_10_4_VDEV_RATEMASK_CMDID, 18122d491e69SRaja Mani WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID, 18132d491e69SRaja Mani WMI_10_4_GTK_OFFLOAD_CMDID, 18142d491e69SRaja Mani WMI_10_4_QBOOST_CFG_CMDID, 18152d491e69SRaja Mani WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID, 18162d491e69SRaja Mani WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID, 18172d491e69SRaja Mani WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 18182d491e69SRaja Mani WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 18192d491e69SRaja Mani WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 18202d491e69SRaja Mani WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 18212d491e69SRaja Mani WMI_10_4_VDEV_SET_KEEPALIVE_CMDID, 18222d491e69SRaja Mani WMI_10_4_VDEV_GET_KEEPALIVE_CMDID, 18232d491e69SRaja Mani WMI_10_4_FORCE_FW_HANG_CMDID, 18242d491e69SRaja Mani WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 18252d491e69SRaja Mani WMI_10_4_PDEV_SET_CTL_TABLE_CMDID, 18262d491e69SRaja Mani WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID, 18272d491e69SRaja Mani WMI_10_4_PDEV_RATEPWR_TABLE_CMDID, 18282d491e69SRaja Mani WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID, 18292d491e69SRaja Mani WMI_10_4_PDEV_FIPS_CMDID, 18302d491e69SRaja Mani WMI_10_4_TT_SET_CONF_CMDID, 18312d491e69SRaja Mani WMI_10_4_FWTEST_CMDID, 18322d491e69SRaja Mani WMI_10_4_VDEV_ATF_REQUEST_CMDID, 18332d491e69SRaja Mani WMI_10_4_PEER_ATF_REQUEST_CMDID, 18342d491e69SRaja Mani WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID, 18352d491e69SRaja Mani WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 18362d491e69SRaja Mani WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID, 18372d491e69SRaja Mani WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID, 18382d491e69SRaja Mani WMI_10_4_PDEV_GET_TPC_CMDID, 18392d491e69SRaja Mani WMI_10_4_PDEV_GET_AST_INFO_CMDID, 18402d491e69SRaja Mani WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID, 18412d491e69SRaja Mani WMI_10_4_PDEV_GET_TEMPERATURE_CMDID, 18422d491e69SRaja Mani WMI_10_4_PDEV_GET_INFO_CMDID, 18432d491e69SRaja Mani WMI_10_4_VDEV_GET_INFO_CMDID, 18442d491e69SRaja Mani WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 18452d491e69SRaja Mani WMI_10_4_MU_CAL_START_CMDID, 18462d491e69SRaja Mani WMI_10_4_SET_CCA_PARAMS_CMDID, 18472d491e69SRaja Mani WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 184869d4315cSVasanthakumar Thiagarajan WMI_10_4_EXT_RESOURCE_CFG_CMDID, 184969d4315cSVasanthakumar Thiagarajan WMI_10_4_VDEV_SET_IE_CMDID, 185069d4315cSVasanthakumar Thiagarajan WMI_10_4_SET_LTEU_CONFIG_CMDID, 1851add6cd8dSManikanta Pubbisetty WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID, 1852add6cd8dSManikanta Pubbisetty WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID, 1853add6cd8dSManikanta Pubbisetty WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1854add6cd8dSManikanta Pubbisetty WMI_10_4_PEER_BWF_REQUEST_CMDID, 1855add6cd8dSManikanta Pubbisetty WMI_10_4_BTCOEX_CFG_CMDID, 1856add6cd8dSManikanta Pubbisetty WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID, 1857add6cd8dSManikanta Pubbisetty WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID, 1858add6cd8dSManikanta Pubbisetty WMI_10_4_PEER_GID_USERPOS_LIST_CMDID, 1859add6cd8dSManikanta Pubbisetty WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID, 1860add6cd8dSManikanta Pubbisetty WMI_10_4_COEX_VERSION_CFG_CMID, 1861add6cd8dSManikanta Pubbisetty WMI_10_4_PDEV_GET_RX_FILTER_CMDID, 1862add6cd8dSManikanta Pubbisetty WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID, 1863add6cd8dSManikanta Pubbisetty WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID, 1864add6cd8dSManikanta Pubbisetty WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID, 1865add6cd8dSManikanta Pubbisetty WMI_10_4_CONFIG_SMART_LOGGING_CMDID, 1866add6cd8dSManikanta Pubbisetty WMI_10_4_DEBUG_FATAL_CONDITION_CMDID, 1867add6cd8dSManikanta Pubbisetty WMI_10_4_GET_TSF_TIMER_CMDID, 1868add6cd8dSManikanta Pubbisetty WMI_10_4_PDEV_GET_TPC_TABLE_CMDID, 1869add6cd8dSManikanta Pubbisetty WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID, 1870add6cd8dSManikanta Pubbisetty WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID, 1871add6cd8dSManikanta Pubbisetty WMI_10_4_TDLS_SET_STATE_CMDID, 1872add6cd8dSManikanta Pubbisetty WMI_10_4_TDLS_PEER_UPDATE_CMDID, 1873add6cd8dSManikanta Pubbisetty WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID, 18746f6eb1bcSSriram R WMI_10_4_PDEV_SEND_FD_CMDID, 18756f6eb1bcSSriram R WMI_10_4_ENABLE_FILS_CMDID, 18766f6eb1bcSSriram R WMI_10_4_PDEV_SET_BRIDGE_MACADDR_CMDID, 18776f6eb1bcSSriram R WMI_10_4_ATF_GROUP_WMM_AC_CONFIG_REQUEST_CMDID, 18786f6eb1bcSSriram R WMI_10_4_RADAR_FOUND_CMDID, 18792d491e69SRaja Mani WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1, 18802d491e69SRaja Mani }; 18812d491e69SRaja Mani 18822d491e69SRaja Mani enum wmi_10_4_event_id { 18832d491e69SRaja Mani WMI_10_4_SERVICE_READY_EVENTID = 0x8000, 18842d491e69SRaja Mani WMI_10_4_READY_EVENTID, 18852d491e69SRaja Mani WMI_10_4_DEBUG_MESG_EVENTID, 18862d491e69SRaja Mani WMI_10_4_START_EVENTID = 0x9000, 18872d491e69SRaja Mani WMI_10_4_END_EVENTID = 0x9FFF, 18882d491e69SRaja Mani WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID, 18892d491e69SRaja Mani WMI_10_4_ECHO_EVENTID, 18902d491e69SRaja Mani WMI_10_4_UPDATE_STATS_EVENTID, 18912d491e69SRaja Mani WMI_10_4_INST_RSSI_STATS_EVENTID, 18922d491e69SRaja Mani WMI_10_4_VDEV_START_RESP_EVENTID, 18932d491e69SRaja Mani WMI_10_4_VDEV_STANDBY_REQ_EVENTID, 18942d491e69SRaja Mani WMI_10_4_VDEV_RESUME_REQ_EVENTID, 18952d491e69SRaja Mani WMI_10_4_VDEV_STOPPED_EVENTID, 18962d491e69SRaja Mani WMI_10_4_PEER_STA_KICKOUT_EVENTID, 18972d491e69SRaja Mani WMI_10_4_HOST_SWBA_EVENTID, 18982d491e69SRaja Mani WMI_10_4_TBTTOFFSET_UPDATE_EVENTID, 18992d491e69SRaja Mani WMI_10_4_MGMT_RX_EVENTID, 19002d491e69SRaja Mani WMI_10_4_CHAN_INFO_EVENTID, 19012d491e69SRaja Mani WMI_10_4_PHYERR_EVENTID, 19022d491e69SRaja Mani WMI_10_4_ROAM_EVENTID, 19032d491e69SRaja Mani WMI_10_4_PROFILE_MATCH, 19042d491e69SRaja Mani WMI_10_4_DEBUG_PRINT_EVENTID, 19052d491e69SRaja Mani WMI_10_4_PDEV_QVIT_EVENTID, 19062d491e69SRaja Mani WMI_10_4_WLAN_PROFILE_DATA_EVENTID, 19072d491e69SRaja Mani WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID, 19082d491e69SRaja Mani WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID, 19092d491e69SRaja Mani WMI_10_4_RTT_ERROR_REPORT_EVENTID, 19102d491e69SRaja Mani WMI_10_4_RTT_KEEPALIVE_EVENTID, 19112d491e69SRaja Mani WMI_10_4_OEM_CAPABILITY_EVENTID, 19122d491e69SRaja Mani WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID, 19132d491e69SRaja Mani WMI_10_4_OEM_ERROR_REPORT_EVENTID, 19142d491e69SRaja Mani WMI_10_4_NAN_EVENTID, 19152d491e69SRaja Mani WMI_10_4_WOW_WAKEUP_HOST_EVENTID, 19162d491e69SRaja Mani WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID, 19172d491e69SRaja Mani WMI_10_4_GTK_REKEY_FAIL_EVENTID, 19182d491e69SRaja Mani WMI_10_4_DCS_INTERFERENCE_EVENTID, 19192d491e69SRaja Mani WMI_10_4_PDEV_TPC_CONFIG_EVENTID, 19202d491e69SRaja Mani WMI_10_4_CSA_HANDLING_EVENTID, 19212d491e69SRaja Mani WMI_10_4_GPIO_INPUT_EVENTID, 19222d491e69SRaja Mani WMI_10_4_PEER_RATECODE_LIST_EVENTID, 19232d491e69SRaja Mani WMI_10_4_GENERIC_BUFFER_EVENTID, 19242d491e69SRaja Mani WMI_10_4_MCAST_BUF_RELEASE_EVENTID, 19252d491e69SRaja Mani WMI_10_4_MCAST_LIST_AGEOUT_EVENTID, 19262d491e69SRaja Mani WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID, 19272d491e69SRaja Mani WMI_10_4_WDS_PEER_EVENTID, 19282d491e69SRaja Mani WMI_10_4_PEER_STA_PS_STATECHG_EVENTID, 19292d491e69SRaja Mani WMI_10_4_PDEV_FIPS_EVENTID, 19302d491e69SRaja Mani WMI_10_4_TT_STATS_EVENTID, 19312d491e69SRaja Mani WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID, 19322d491e69SRaja Mani WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID, 19332d491e69SRaja Mani WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID, 19342d491e69SRaja Mani WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID, 19352d491e69SRaja Mani WMI_10_4_PDEV_NFCAL_POWER_EVENTID, 19362d491e69SRaja Mani WMI_10_4_PDEV_TPC_EVENTID, 19372d491e69SRaja Mani WMI_10_4_PDEV_GET_AST_INFO_EVENTID, 19382d491e69SRaja Mani WMI_10_4_PDEV_TEMPERATURE_EVENTID, 19392d491e69SRaja Mani WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 19402d491e69SRaja Mani WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID, 194169d4315cSVasanthakumar Thiagarajan WMI_10_4_MU_REPORT_EVENTID, 1942add6cd8dSManikanta Pubbisetty WMI_10_4_TX_DATA_TRAFFIC_CTRL_EVENTID, 1943add6cd8dSManikanta Pubbisetty WMI_10_4_PEER_TX_MU_TXMIT_COUNT_EVENTID, 1944add6cd8dSManikanta Pubbisetty WMI_10_4_PEER_GID_USERPOS_LIST_EVENTID, 1945add6cd8dSManikanta Pubbisetty WMI_10_4_PDEV_CHECK_CAL_VERSION_EVENTID, 1946add6cd8dSManikanta Pubbisetty WMI_10_4_ATF_PEER_STATS_EVENTID, 1947add6cd8dSManikanta Pubbisetty WMI_10_4_PDEV_GET_RX_FILTER_EVENTID, 1948add6cd8dSManikanta Pubbisetty WMI_10_4_NAC_RSSI_EVENTID, 1949add6cd8dSManikanta Pubbisetty WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID, 1950add6cd8dSManikanta Pubbisetty WMI_10_4_GET_TSF_TIMER_RESP_EVENTID, 1951add6cd8dSManikanta Pubbisetty WMI_10_4_PDEV_TPC_TABLE_EVENTID, 1952add6cd8dSManikanta Pubbisetty WMI_10_4_PDEV_WDS_ENTRY_LIST_EVENTID, 1953add6cd8dSManikanta Pubbisetty WMI_10_4_TDLS_PEER_EVENTID, 19546f6eb1bcSSriram R WMI_10_4_HOST_SWFDA_EVENTID, 19556f6eb1bcSSriram R WMI_10_4_ESP_ESTIMATE_EVENTID, 19566f6eb1bcSSriram R WMI_10_4_DFS_STATUS_CHECK_EVENTID, 19572d491e69SRaja Mani WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1, 19582d491e69SRaja Mani }; 19592d491e69SRaja Mani 19605e3dd157SKalle Valo enum wmi_phy_mode { 19615e3dd157SKalle Valo MODE_11A = 0, /* 11a Mode */ 19625e3dd157SKalle Valo MODE_11G = 1, /* 11b/g Mode */ 19635e3dd157SKalle Valo MODE_11B = 2, /* 11b Mode */ 19645e3dd157SKalle Valo MODE_11GONLY = 3, /* 11g only Mode */ 19655e3dd157SKalle Valo MODE_11NA_HT20 = 4, /* 11a HT20 mode */ 19665e3dd157SKalle Valo MODE_11NG_HT20 = 5, /* 11g HT20 mode */ 19675e3dd157SKalle Valo MODE_11NA_HT40 = 6, /* 11a HT40 mode */ 19685e3dd157SKalle Valo MODE_11NG_HT40 = 7, /* 11g HT40 mode */ 19695e3dd157SKalle Valo MODE_11AC_VHT20 = 8, 19705e3dd157SKalle Valo MODE_11AC_VHT40 = 9, 19715e3dd157SKalle Valo MODE_11AC_VHT80 = 10, 19725e3dd157SKalle Valo /* MODE_11AC_VHT160 = 11, */ 19735e3dd157SKalle Valo MODE_11AC_VHT20_2G = 11, 19745e3dd157SKalle Valo MODE_11AC_VHT40_2G = 12, 19755e3dd157SKalle Valo MODE_11AC_VHT80_2G = 13, 1976bc1efd73SSebastian Gottschall MODE_11AC_VHT80_80 = 14, 1977bc1efd73SSebastian Gottschall MODE_11AC_VHT160 = 15, 1978bc1efd73SSebastian Gottschall MODE_UNKNOWN = 16, 1979bc1efd73SSebastian Gottschall MODE_MAX = 16 19805e3dd157SKalle Valo }; 19815e3dd157SKalle Valo 198238a1d47eSKalle Valo static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode) 198338a1d47eSKalle Valo { 198438a1d47eSKalle Valo switch (mode) { 198538a1d47eSKalle Valo case MODE_11A: 198638a1d47eSKalle Valo return "11a"; 198738a1d47eSKalle Valo case MODE_11G: 198838a1d47eSKalle Valo return "11g"; 198938a1d47eSKalle Valo case MODE_11B: 199038a1d47eSKalle Valo return "11b"; 199138a1d47eSKalle Valo case MODE_11GONLY: 199238a1d47eSKalle Valo return "11gonly"; 199338a1d47eSKalle Valo case MODE_11NA_HT20: 199438a1d47eSKalle Valo return "11na-ht20"; 199538a1d47eSKalle Valo case MODE_11NG_HT20: 199638a1d47eSKalle Valo return "11ng-ht20"; 199738a1d47eSKalle Valo case MODE_11NA_HT40: 199838a1d47eSKalle Valo return "11na-ht40"; 199938a1d47eSKalle Valo case MODE_11NG_HT40: 200038a1d47eSKalle Valo return "11ng-ht40"; 200138a1d47eSKalle Valo case MODE_11AC_VHT20: 200238a1d47eSKalle Valo return "11ac-vht20"; 200338a1d47eSKalle Valo case MODE_11AC_VHT40: 200438a1d47eSKalle Valo return "11ac-vht40"; 200538a1d47eSKalle Valo case MODE_11AC_VHT80: 200638a1d47eSKalle Valo return "11ac-vht80"; 2007bc1efd73SSebastian Gottschall case MODE_11AC_VHT160: 2008bc1efd73SSebastian Gottschall return "11ac-vht160"; 2009bc1efd73SSebastian Gottschall case MODE_11AC_VHT80_80: 2010bc1efd73SSebastian Gottschall return "11ac-vht80+80"; 201138a1d47eSKalle Valo case MODE_11AC_VHT20_2G: 201238a1d47eSKalle Valo return "11ac-vht20-2g"; 201338a1d47eSKalle Valo case MODE_11AC_VHT40_2G: 201438a1d47eSKalle Valo return "11ac-vht40-2g"; 201538a1d47eSKalle Valo case MODE_11AC_VHT80_2G: 201638a1d47eSKalle Valo return "11ac-vht80-2g"; 201738a1d47eSKalle Valo case MODE_UNKNOWN: 201838a1d47eSKalle Valo /* skip */ 201938a1d47eSKalle Valo break; 202038a1d47eSKalle Valo 202138a1d47eSKalle Valo /* no default handler to allow compiler to check that the 202237ff1b0dSMarcin Rokicki * enum is fully handled 202337ff1b0dSMarcin Rokicki */ 2024999eb686SYueHaibing } 202538a1d47eSKalle Valo 202638a1d47eSKalle Valo return "<unknown>"; 202738a1d47eSKalle Valo } 202838a1d47eSKalle Valo 20295e3dd157SKalle Valo #define WMI_CHAN_LIST_TAG 0x1 20305e3dd157SKalle Valo #define WMI_SSID_LIST_TAG 0x2 20315e3dd157SKalle Valo #define WMI_BSSID_LIST_TAG 0x3 20325e3dd157SKalle Valo #define WMI_IE_TAG 0x4 20335e3dd157SKalle Valo 20345e3dd157SKalle Valo struct wmi_channel { 20355e3dd157SKalle Valo __le32 mhz; 20365e3dd157SKalle Valo __le32 band_center_freq1; 20375e3dd157SKalle Valo __le32 band_center_freq2; /* valid for 11ac, 80plus80 */ 20385e3dd157SKalle Valo union { 20395e3dd157SKalle Valo __le32 flags; /* WMI_CHAN_FLAG_ */ 20405e3dd157SKalle Valo struct { 20415e3dd157SKalle Valo u8 mode; /* only 6 LSBs */ 20425e3dd157SKalle Valo } __packed; 20435e3dd157SKalle Valo } __packed; 20445e3dd157SKalle Valo union { 20455e3dd157SKalle Valo __le32 reginfo0; 20465e3dd157SKalle Valo struct { 204702256930SMichal Kazior /* note: power unit is 0.5 dBm */ 20485e3dd157SKalle Valo u8 min_power; 20495e3dd157SKalle Valo u8 max_power; 20505e3dd157SKalle Valo u8 reg_power; 20515e3dd157SKalle Valo u8 reg_classid; 20525e3dd157SKalle Valo } __packed; 20535e3dd157SKalle Valo } __packed; 20545e3dd157SKalle Valo union { 20555e3dd157SKalle Valo __le32 reginfo1; 20565e3dd157SKalle Valo struct { 20575e3dd157SKalle Valo u8 antenna_max; 2058513527c8SAlan Liu u8 max_tx_power; 20595e3dd157SKalle Valo } __packed; 20605e3dd157SKalle Valo } __packed; 20615e3dd157SKalle Valo } __packed; 20625e3dd157SKalle Valo 20635e3dd157SKalle Valo struct wmi_channel_arg { 20645e3dd157SKalle Valo u32 freq; 20655e3dd157SKalle Valo u32 band_center_freq1; 2066bc1efd73SSebastian Gottschall u32 band_center_freq2; 20675e3dd157SKalle Valo bool passive; 20685e3dd157SKalle Valo bool allow_ibss; 20695e3dd157SKalle Valo bool allow_ht; 20705e3dd157SKalle Valo bool allow_vht; 20715e3dd157SKalle Valo bool ht40plus; 2072e8a50f8bSMarek Puzyniak bool chan_radar; 207302256930SMichal Kazior /* note: power unit is 0.5 dBm */ 20745e3dd157SKalle Valo u32 min_power; 20755e3dd157SKalle Valo u32 max_power; 20765e3dd157SKalle Valo u32 max_reg_power; 20775e3dd157SKalle Valo u32 max_antenna_gain; 20785e3dd157SKalle Valo u32 reg_class_id; 20795e3dd157SKalle Valo enum wmi_phy_mode mode; 20805e3dd157SKalle Valo }; 20815e3dd157SKalle Valo 20825e3dd157SKalle Valo enum wmi_channel_change_cause { 20835e3dd157SKalle Valo WMI_CHANNEL_CHANGE_CAUSE_NONE = 0, 20845e3dd157SKalle Valo WMI_CHANNEL_CHANGE_CAUSE_CSA, 20855e3dd157SKalle Valo }; 20865e3dd157SKalle Valo 20875e3dd157SKalle Valo #define WMI_CHAN_FLAG_HT40_PLUS (1 << 6) 20885e3dd157SKalle Valo #define WMI_CHAN_FLAG_PASSIVE (1 << 7) 20895e3dd157SKalle Valo #define WMI_CHAN_FLAG_ADHOC_ALLOWED (1 << 8) 20905e3dd157SKalle Valo #define WMI_CHAN_FLAG_AP_DISABLED (1 << 9) 20915e3dd157SKalle Valo #define WMI_CHAN_FLAG_DFS (1 << 10) 20925e3dd157SKalle Valo #define WMI_CHAN_FLAG_ALLOW_HT (1 << 11) 20935e3dd157SKalle Valo #define WMI_CHAN_FLAG_ALLOW_VHT (1 << 12) 20945e3dd157SKalle Valo 20955e3dd157SKalle Valo /* Indicate reason for channel switch */ 20965e3dd157SKalle Valo #define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13) 2097795def8bSLei Wang /* DFS required on channel for 2nd segment of VHT160 and VHT80+80*/ 2098795def8bSLei Wang #define WMI_CHAN_FLAG_DFS_CFREQ2 (1 << 15) 20995c8726ecSRaja Mani #define WMI_MAX_SPATIAL_STREAM 3 /* default max ss */ 21005e3dd157SKalle Valo 21015e3dd157SKalle Valo /* HT Capabilities*/ 21025e3dd157SKalle Valo #define WMI_HT_CAP_ENABLED 0x0001 /* HT Enabled/ disabled */ 21035e3dd157SKalle Valo #define WMI_HT_CAP_HT20_SGI 0x0002 /* Short Guard Interval with HT20 */ 21045e3dd157SKalle Valo #define WMI_HT_CAP_DYNAMIC_SMPS 0x0004 /* Dynamic MIMO powersave */ 21055e3dd157SKalle Valo #define WMI_HT_CAP_TX_STBC 0x0008 /* B3 TX STBC */ 21065e3dd157SKalle Valo #define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3 21075e3dd157SKalle Valo #define WMI_HT_CAP_RX_STBC 0x0030 /* B4-B5 RX STBC */ 21085e3dd157SKalle Valo #define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4 21095e3dd157SKalle Valo #define WMI_HT_CAP_LDPC 0x0040 /* LDPC supported */ 21105e3dd157SKalle Valo #define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080 /* L-SIG TXOP Protection */ 21115e3dd157SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY 0x0700 /* MPDU Density */ 21125e3dd157SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8 21135e3dd157SKalle Valo #define WMI_HT_CAP_HT40_SGI 0x0800 2114ff488d0eSSurabhi Vishnoi #define WMI_HT_CAP_RX_LDPC 0x1000 /* LDPC RX support */ 2115ff488d0eSSurabhi Vishnoi #define WMI_HT_CAP_TX_LDPC 0x2000 /* LDPC TX support */ 21165e3dd157SKalle Valo 21175e3dd157SKalle Valo #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \ 21185e3dd157SKalle Valo WMI_HT_CAP_HT20_SGI | \ 21195e3dd157SKalle Valo WMI_HT_CAP_HT40_SGI | \ 21205e3dd157SKalle Valo WMI_HT_CAP_TX_STBC | \ 21215e3dd157SKalle Valo WMI_HT_CAP_RX_STBC | \ 21225e3dd157SKalle Valo WMI_HT_CAP_LDPC) 21235e3dd157SKalle Valo 21245e3dd157SKalle Valo /* 21255e3dd157SKalle Valo * WMI_VHT_CAP_* these maps to ieee 802.11ac vht capability information 21265e3dd157SKalle Valo * field. The fields not defined here are not supported, or reserved. 21275e3dd157SKalle Valo * Do not change these masks and if you have to add new one follow the 21285e3dd157SKalle Valo * bitmask as specified by 802.11ac draft. 21295e3dd157SKalle Valo */ 21305e3dd157SKalle Valo 21315e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003 21325e3dd157SKalle Valo #define WMI_VHT_CAP_RX_LDPC 0x00000010 21335e3dd157SKalle Valo #define WMI_VHT_CAP_SGI_80MHZ 0x00000020 2134bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_SGI_160MHZ 0x00000040 21355e3dd157SKalle Valo #define WMI_VHT_CAP_TX_STBC 0x00000080 21365e3dd157SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK 0x00000300 21375e3dd157SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8 2138bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_SU_BFER 0x00000800 2139bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_SU_BFEE 0x00001000 2140bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000 2141bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13 2142bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000 2143bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16 2144bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MU_BFER 0x00080000 2145bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MU_BFEE 0x00100000 21465e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000 21475e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT 23 21485e3dd157SKalle Valo #define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000 21495e3dd157SKalle Valo #define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000 21505e3dd157SKalle Valo 21515e3dd157SKalle Valo /* The following also refer for max HT AMSDU */ 21525e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_3839 0x00000000 21535e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_7935 0x00000001 21545e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002 21555e3dd157SKalle Valo 21565e3dd157SKalle Valo #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \ 21575e3dd157SKalle Valo WMI_VHT_CAP_RX_LDPC | \ 21585e3dd157SKalle Valo WMI_VHT_CAP_SGI_80MHZ | \ 21595e3dd157SKalle Valo WMI_VHT_CAP_TX_STBC | \ 21605e3dd157SKalle Valo WMI_VHT_CAP_RX_STBC_MASK | \ 21615e3dd157SKalle Valo WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \ 21625e3dd157SKalle Valo WMI_VHT_CAP_RX_FIXED_ANT | \ 21635e3dd157SKalle Valo WMI_VHT_CAP_TX_FIXED_ANT) 21645e3dd157SKalle Valo 21655e3dd157SKalle Valo /* 21665e3dd157SKalle Valo * Interested readers refer to Rx/Tx MCS Map definition as defined in 21675e3dd157SKalle Valo * 802.11ac 21685e3dd157SKalle Valo */ 21695e3dd157SKalle Valo #define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1)) 21705e3dd157SKalle Valo #define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000 21715e3dd157SKalle Valo #define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16 21725e3dd157SKalle Valo 21735e3dd157SKalle Valo enum { 21745e3dd157SKalle Valo REGDMN_MODE_11A = 0x00001, /* 11a channels */ 21755e3dd157SKalle Valo REGDMN_MODE_TURBO = 0x00002, /* 11a turbo-only channels */ 21765e3dd157SKalle Valo REGDMN_MODE_11B = 0x00004, /* 11b channels */ 21775e3dd157SKalle Valo REGDMN_MODE_PUREG = 0x00008, /* 11g channels (OFDM only) */ 21785e3dd157SKalle Valo REGDMN_MODE_11G = 0x00008, /* XXX historical */ 21795e3dd157SKalle Valo REGDMN_MODE_108G = 0x00020, /* 11a+Turbo channels */ 21805e3dd157SKalle Valo REGDMN_MODE_108A = 0x00040, /* 11g+Turbo channels */ 21815e3dd157SKalle Valo REGDMN_MODE_XR = 0x00100, /* XR channels */ 21825e3dd157SKalle Valo REGDMN_MODE_11A_HALF_RATE = 0x00200, /* 11A half rate channels */ 21835e3dd157SKalle Valo REGDMN_MODE_11A_QUARTER_RATE = 0x00400, /* 11A quarter rate channels */ 21845e3dd157SKalle Valo REGDMN_MODE_11NG_HT20 = 0x00800, /* 11N-G HT20 channels */ 21855e3dd157SKalle Valo REGDMN_MODE_11NA_HT20 = 0x01000, /* 11N-A HT20 channels */ 21865e3dd157SKalle Valo REGDMN_MODE_11NG_HT40PLUS = 0x02000, /* 11N-G HT40 + channels */ 21875e3dd157SKalle Valo REGDMN_MODE_11NG_HT40MINUS = 0x04000, /* 11N-G HT40 - channels */ 21885e3dd157SKalle Valo REGDMN_MODE_11NA_HT40PLUS = 0x08000, /* 11N-A HT40 + channels */ 21895e3dd157SKalle Valo REGDMN_MODE_11NA_HT40MINUS = 0x10000, /* 11N-A HT40 - channels */ 21905e3dd157SKalle Valo REGDMN_MODE_11AC_VHT20 = 0x20000, /* 5Ghz, VHT20 */ 21915e3dd157SKalle Valo REGDMN_MODE_11AC_VHT40PLUS = 0x40000, /* 5Ghz, VHT40 + channels */ 21925e3dd157SKalle Valo REGDMN_MODE_11AC_VHT40MINUS = 0x80000, /* 5Ghz VHT40 - channels */ 21935e3dd157SKalle Valo REGDMN_MODE_11AC_VHT80 = 0x100000, /* 5Ghz, VHT80 channels */ 2194bc1efd73SSebastian Gottschall REGDMN_MODE_11AC_VHT160 = 0x200000, /* 5Ghz, VHT160 channels */ 2195bc1efd73SSebastian Gottschall REGDMN_MODE_11AC_VHT80_80 = 0x400000, /* 5Ghz, VHT80+80 channels */ 21965e3dd157SKalle Valo REGDMN_MODE_ALL = 0xffffffff 21975e3dd157SKalle Valo }; 21985e3dd157SKalle Valo 21995e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001 22005e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002 22015e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004 22025e3dd157SKalle Valo 22035e3dd157SKalle Valo /* regulatory capabilities */ 22045e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040 22055e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080 22065e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100 22075e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200 22085e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400 22095e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800 22105e3dd157SKalle Valo 22115e3dd157SKalle Valo struct hal_reg_capabilities { 22125e3dd157SKalle Valo /* regdomain value specified in EEPROM */ 22135e3dd157SKalle Valo __le32 eeprom_rd; 22145e3dd157SKalle Valo /*regdomain */ 22155e3dd157SKalle Valo __le32 eeprom_rd_ext; 22165e3dd157SKalle Valo /* CAP1 capabilities bit map. */ 22175e3dd157SKalle Valo __le32 regcap1; 22185e3dd157SKalle Valo /* REGDMN EEPROM CAP. */ 22195e3dd157SKalle Valo __le32 regcap2; 22205e3dd157SKalle Valo /* REGDMN MODE */ 22215e3dd157SKalle Valo __le32 wireless_modes; 22225e3dd157SKalle Valo __le32 low_2ghz_chan; 22235e3dd157SKalle Valo __le32 high_2ghz_chan; 22245e3dd157SKalle Valo __le32 low_5ghz_chan; 22255e3dd157SKalle Valo __le32 high_5ghz_chan; 22265e3dd157SKalle Valo } __packed; 22275e3dd157SKalle Valo 22285e3dd157SKalle Valo enum wlan_mode_capability { 22295e3dd157SKalle Valo WHAL_WLAN_11A_CAPABILITY = 0x1, 22305e3dd157SKalle Valo WHAL_WLAN_11G_CAPABILITY = 0x2, 22315e3dd157SKalle Valo WHAL_WLAN_11AG_CAPABILITY = 0x3, 22325e3dd157SKalle Valo }; 22335e3dd157SKalle Valo 22345e3dd157SKalle Valo /* structure used by FW for requesting host memory */ 22355e3dd157SKalle Valo struct wlan_host_mem_req { 22365e3dd157SKalle Valo /* ID of the request */ 22375e3dd157SKalle Valo __le32 req_id; 22385e3dd157SKalle Valo /* size of the of each unit */ 22395e3dd157SKalle Valo __le32 unit_size; 22405e3dd157SKalle Valo /* flags to indicate that 22415e3dd157SKalle Valo * the number units is dependent 22425e3dd157SKalle Valo * on number of resources(num vdevs num peers .. etc) 22435e3dd157SKalle Valo */ 22445e3dd157SKalle Valo __le32 num_unit_info; 22455e3dd157SKalle Valo /* 22465e3dd157SKalle Valo * actual number of units to allocate . if flags in the num_unit_info 22475e3dd157SKalle Valo * indicate that number of units is tied to number of a particular 22485e3dd157SKalle Valo * resource to allocate then num_units filed is set to 0 and host 22495e3dd157SKalle Valo * will derive the number units from number of the resources it is 22505e3dd157SKalle Valo * requesting. 22515e3dd157SKalle Valo */ 22525e3dd157SKalle Valo __le32 num_units; 22535e3dd157SKalle Valo } __packed; 22545e3dd157SKalle Valo 22555e3dd157SKalle Valo /* 22565e3dd157SKalle Valo * The following struct holds optional payload for 22575e3dd157SKalle Valo * wmi_service_ready_event,e.g., 11ac pass some of the 22585e3dd157SKalle Valo * device capability to the host. 22595e3dd157SKalle Valo */ 22605e3dd157SKalle Valo struct wmi_service_ready_event { 22615e3dd157SKalle Valo __le32 sw_version; 22625e3dd157SKalle Valo __le32 sw_version_1; 22635e3dd157SKalle Valo __le32 abi_version; 22645e3dd157SKalle Valo /* WMI_PHY_CAPABILITY */ 22655e3dd157SKalle Valo __le32 phy_capability; 22665e3dd157SKalle Valo /* Maximum number of frag table entries that SW will populate less 1 */ 22675e3dd157SKalle Valo __le32 max_frag_entry; 2268c4f8c836SMichal Kazior __le32 wmi_service_bitmap[16]; 22695e3dd157SKalle Valo __le32 num_rf_chains; 22705e3dd157SKalle Valo /* 22715e3dd157SKalle Valo * The following field is only valid for service type 22725e3dd157SKalle Valo * WMI_SERVICE_11AC 22735e3dd157SKalle Valo */ 22745e3dd157SKalle Valo __le32 ht_cap_info; /* WMI HT Capability */ 22755e3dd157SKalle Valo __le32 vht_cap_info; /* VHT capability info field of 802.11ac */ 22765e3dd157SKalle Valo __le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */ 22775e3dd157SKalle Valo __le32 hw_min_tx_power; 22785e3dd157SKalle Valo __le32 hw_max_tx_power; 22795e3dd157SKalle Valo struct hal_reg_capabilities hal_reg_capabilities; 22805e3dd157SKalle Valo __le32 sys_cap_info; 22815e3dd157SKalle Valo __le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */ 22825e3dd157SKalle Valo /* 22835e3dd157SKalle Valo * Max beacon and Probe Response IE offload size 22845e3dd157SKalle Valo * (includes optional P2P IEs) 22855e3dd157SKalle Valo */ 22865e3dd157SKalle Valo __le32 max_bcn_ie_size; 22875e3dd157SKalle Valo /* 22885e3dd157SKalle Valo * request to host to allocate a chuck of memory and pss it down to FW 22895e3dd157SKalle Valo * via WM_INIT. FW uses this as FW extesnsion memory for saving its 22905e3dd157SKalle Valo * data structures. Only valid for low latency interfaces like PCIE 22915e3dd157SKalle Valo * where FW can access this memory directly (or) by DMA. 22925e3dd157SKalle Valo */ 22935e3dd157SKalle Valo __le32 num_mem_reqs; 22945c01aa3dSMichal Kazior struct wlan_host_mem_req mem_reqs[0]; 22955e3dd157SKalle Valo } __packed; 22965e3dd157SKalle Valo 22976f97d256SBartosz Markowski /* This is the definition from 10.X firmware branch */ 22985c01aa3dSMichal Kazior struct wmi_10x_service_ready_event { 22996f97d256SBartosz Markowski __le32 sw_version; 23006f97d256SBartosz Markowski __le32 abi_version; 23016f97d256SBartosz Markowski 23026f97d256SBartosz Markowski /* WMI_PHY_CAPABILITY */ 23036f97d256SBartosz Markowski __le32 phy_capability; 23046f97d256SBartosz Markowski 23056f97d256SBartosz Markowski /* Maximum number of frag table entries that SW will populate less 1 */ 23066f97d256SBartosz Markowski __le32 max_frag_entry; 2307c4f8c836SMichal Kazior __le32 wmi_service_bitmap[16]; 23086f97d256SBartosz Markowski __le32 num_rf_chains; 23096f97d256SBartosz Markowski 23106f97d256SBartosz Markowski /* 23116f97d256SBartosz Markowski * The following field is only valid for service type 23126f97d256SBartosz Markowski * WMI_SERVICE_11AC 23136f97d256SBartosz Markowski */ 23146f97d256SBartosz Markowski __le32 ht_cap_info; /* WMI HT Capability */ 23156f97d256SBartosz Markowski __le32 vht_cap_info; /* VHT capability info field of 802.11ac */ 23166f97d256SBartosz Markowski __le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */ 23176f97d256SBartosz Markowski __le32 hw_min_tx_power; 23186f97d256SBartosz Markowski __le32 hw_max_tx_power; 23196f97d256SBartosz Markowski 23206f97d256SBartosz Markowski struct hal_reg_capabilities hal_reg_capabilities; 23216f97d256SBartosz Markowski 23226f97d256SBartosz Markowski __le32 sys_cap_info; 23236f97d256SBartosz Markowski __le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */ 23246f97d256SBartosz Markowski 23256f97d256SBartosz Markowski /* 23266f97d256SBartosz Markowski * request to host to allocate a chuck of memory and pss it down to FW 23276f97d256SBartosz Markowski * via WM_INIT. FW uses this as FW extesnsion memory for saving its 23286f97d256SBartosz Markowski * data structures. Only valid for low latency interfaces like PCIE 23296f97d256SBartosz Markowski * where FW can access this memory directly (or) by DMA. 23306f97d256SBartosz Markowski */ 23316f97d256SBartosz Markowski __le32 num_mem_reqs; 23326f97d256SBartosz Markowski 23335c01aa3dSMichal Kazior struct wlan_host_mem_req mem_reqs[0]; 23346f97d256SBartosz Markowski } __packed; 23356f97d256SBartosz Markowski 23365e3dd157SKalle Valo #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 23375e3dd157SKalle Valo #define WMI_UNIFIED_READY_TIMEOUT_HZ (5 * HZ) 23385e3dd157SKalle Valo 23395e3dd157SKalle Valo struct wmi_ready_event { 23405e3dd157SKalle Valo __le32 sw_version; 23415e3dd157SKalle Valo __le32 abi_version; 23425e3dd157SKalle Valo struct wmi_mac_addr mac_addr; 23435e3dd157SKalle Valo __le32 status; 23445e3dd157SKalle Valo } __packed; 23455e3dd157SKalle Valo 23465e3dd157SKalle Valo struct wmi_resource_config { 23475e3dd157SKalle Valo /* number of virtual devices (VAPs) to support */ 23485e3dd157SKalle Valo __le32 num_vdevs; 23495e3dd157SKalle Valo 23505e3dd157SKalle Valo /* number of peer nodes to support */ 23515e3dd157SKalle Valo __le32 num_peers; 23525e3dd157SKalle Valo 23535e3dd157SKalle Valo /* 23545e3dd157SKalle Valo * In offload mode target supports features like WOW, chatter and 23555e3dd157SKalle Valo * other protocol offloads. In order to support them some 23565e3dd157SKalle Valo * functionalities like reorder buffering, PN checking need to be 2357e13dbeadSJoe Perches * done in target. This determines maximum number of peers supported 23585e3dd157SKalle Valo * by target in offload mode 23595e3dd157SKalle Valo */ 23605e3dd157SKalle Valo __le32 num_offload_peers; 23615e3dd157SKalle Valo 23625e3dd157SKalle Valo /* For target-based RX reordering */ 23635e3dd157SKalle Valo __le32 num_offload_reorder_bufs; 23645e3dd157SKalle Valo 23655e3dd157SKalle Valo /* number of keys per peer */ 23665e3dd157SKalle Valo __le32 num_peer_keys; 23675e3dd157SKalle Valo 23685e3dd157SKalle Valo /* total number of TX/RX data TIDs */ 23695e3dd157SKalle Valo __le32 num_tids; 23705e3dd157SKalle Valo 23715e3dd157SKalle Valo /* 23725e3dd157SKalle Valo * max skid for resolving hash collisions 23735e3dd157SKalle Valo * 23745e3dd157SKalle Valo * The address search table is sparse, so that if two MAC addresses 23755e3dd157SKalle Valo * result in the same hash value, the second of these conflicting 23765e3dd157SKalle Valo * entries can slide to the next index in the address search table, 23775e3dd157SKalle Valo * and use it, if it is unoccupied. This ast_skid_limit parameter 23785e3dd157SKalle Valo * specifies the upper bound on how many subsequent indices to search 23795e3dd157SKalle Valo * over to find an unoccupied space. 23805e3dd157SKalle Valo */ 23815e3dd157SKalle Valo __le32 ast_skid_limit; 23825e3dd157SKalle Valo 23835e3dd157SKalle Valo /* 23845e3dd157SKalle Valo * the nominal chain mask for transmit 23855e3dd157SKalle Valo * 23865e3dd157SKalle Valo * The chain mask may be modified dynamically, e.g. to operate AP 23875e3dd157SKalle Valo * tx with a reduced number of chains if no clients are associated. 23885e3dd157SKalle Valo * This configuration parameter specifies the nominal chain-mask that 23895e3dd157SKalle Valo * should be used when not operating with a reduced set of tx chains. 23905e3dd157SKalle Valo */ 23915e3dd157SKalle Valo __le32 tx_chain_mask; 23925e3dd157SKalle Valo 23935e3dd157SKalle Valo /* 23945e3dd157SKalle Valo * the nominal chain mask for receive 23955e3dd157SKalle Valo * 23965e3dd157SKalle Valo * The chain mask may be modified dynamically, e.g. for a client 23975e3dd157SKalle Valo * to use a reduced number of chains for receive if the traffic to 23985e3dd157SKalle Valo * the client is low enough that it doesn't require downlink MIMO 23995e3dd157SKalle Valo * or antenna diversity. 24005e3dd157SKalle Valo * This configuration parameter specifies the nominal chain-mask that 24015e3dd157SKalle Valo * should be used when not operating with a reduced set of rx chains. 24025e3dd157SKalle Valo */ 24035e3dd157SKalle Valo __le32 rx_chain_mask; 24045e3dd157SKalle Valo 24055e3dd157SKalle Valo /* 24065e3dd157SKalle Valo * what rx reorder timeout (ms) to use for the AC 24075e3dd157SKalle Valo * 24085e3dd157SKalle Valo * Each WMM access class (voice, video, best-effort, background) will 24095e3dd157SKalle Valo * have its own timeout value to dictate how long to wait for missing 24105e3dd157SKalle Valo * rx MPDUs to arrive before flushing subsequent MPDUs that have 24115e3dd157SKalle Valo * already been received. 24125e3dd157SKalle Valo * This parameter specifies the timeout in milliseconds for each 24135e3dd157SKalle Valo * class. 24145e3dd157SKalle Valo */ 24155e3dd157SKalle Valo __le32 rx_timeout_pri_vi; 24165e3dd157SKalle Valo __le32 rx_timeout_pri_vo; 24175e3dd157SKalle Valo __le32 rx_timeout_pri_be; 24185e3dd157SKalle Valo __le32 rx_timeout_pri_bk; 24195e3dd157SKalle Valo 24205e3dd157SKalle Valo /* 24215e3dd157SKalle Valo * what mode the rx should decap packets to 24225e3dd157SKalle Valo * 24235e3dd157SKalle Valo * MAC can decap to RAW (no decap), native wifi or Ethernet types 24245e3dd157SKalle Valo * THis setting also determines the default TX behavior, however TX 24255e3dd157SKalle Valo * behavior can be modified on a per VAP basis during VAP init 24265e3dd157SKalle Valo */ 24275e3dd157SKalle Valo __le32 rx_decap_mode; 24285e3dd157SKalle Valo 24298e4a4f5dSGeert Uytterhoeven /* what is the maximum number of scan requests that can be queued */ 24305e3dd157SKalle Valo __le32 scan_max_pending_reqs; 24315e3dd157SKalle Valo 24325e3dd157SKalle Valo /* maximum VDEV that could use BMISS offload */ 24335e3dd157SKalle Valo __le32 bmiss_offload_max_vdev; 24345e3dd157SKalle Valo 24355e3dd157SKalle Valo /* maximum VDEV that could use offload roaming */ 24365e3dd157SKalle Valo __le32 roam_offload_max_vdev; 24375e3dd157SKalle Valo 24385e3dd157SKalle Valo /* maximum AP profiles that would push to offload roaming */ 24395e3dd157SKalle Valo __le32 roam_offload_max_ap_profiles; 24405e3dd157SKalle Valo 24415e3dd157SKalle Valo /* 24425e3dd157SKalle Valo * how many groups to use for mcast->ucast conversion 24435e3dd157SKalle Valo * 24445e3dd157SKalle Valo * The target's WAL maintains a table to hold information regarding 24455e3dd157SKalle Valo * which peers belong to a given multicast group, so that if 24465e3dd157SKalle Valo * multicast->unicast conversion is enabled, the target can convert 24475e3dd157SKalle Valo * multicast tx frames to a series of unicast tx frames, to each 24485e3dd157SKalle Valo * peer within the multicast group. 24495e3dd157SKalle Valo This num_mcast_groups configuration parameter tells the target how 24505e3dd157SKalle Valo * many multicast groups to provide storage for within its multicast 24515e3dd157SKalle Valo * group membership table. 24525e3dd157SKalle Valo */ 24535e3dd157SKalle Valo __le32 num_mcast_groups; 24545e3dd157SKalle Valo 24555e3dd157SKalle Valo /* 24565e3dd157SKalle Valo * size to alloc for the mcast membership table 24575e3dd157SKalle Valo * 24585e3dd157SKalle Valo * This num_mcast_table_elems configuration parameter tells the 24595e3dd157SKalle Valo * target how many peer elements it needs to provide storage for in 24605e3dd157SKalle Valo * its multicast group membership table. 24615e3dd157SKalle Valo * These multicast group membership table elements are shared by the 24625e3dd157SKalle Valo * multicast groups stored within the table. 24635e3dd157SKalle Valo */ 24645e3dd157SKalle Valo __le32 num_mcast_table_elems; 24655e3dd157SKalle Valo 24665e3dd157SKalle Valo /* 24675e3dd157SKalle Valo * whether/how to do multicast->unicast conversion 24685e3dd157SKalle Valo * 24695e3dd157SKalle Valo * This configuration parameter specifies whether the target should 24705e3dd157SKalle Valo * perform multicast --> unicast conversion on transmit, and if so, 24715e3dd157SKalle Valo * what to do if it finds no entries in its multicast group 24725e3dd157SKalle Valo * membership table for the multicast IP address in the tx frame. 24735e3dd157SKalle Valo * Configuration value: 24745e3dd157SKalle Valo * 0 -> Do not perform multicast to unicast conversion. 24755e3dd157SKalle Valo * 1 -> Convert multicast frames to unicast, if the IP multicast 24765e3dd157SKalle Valo * address from the tx frame is found in the multicast group 24775e3dd157SKalle Valo * membership table. If the IP multicast address is not found, 24785e3dd157SKalle Valo * drop the frame. 24795e3dd157SKalle Valo * 2 -> Convert multicast frames to unicast, if the IP multicast 24805e3dd157SKalle Valo * address from the tx frame is found in the multicast group 24815e3dd157SKalle Valo * membership table. If the IP multicast address is not found, 24825e3dd157SKalle Valo * transmit the frame as multicast. 24835e3dd157SKalle Valo */ 24845e3dd157SKalle Valo __le32 mcast2ucast_mode; 24855e3dd157SKalle Valo 24865e3dd157SKalle Valo /* 24875e3dd157SKalle Valo * how much memory to allocate for a tx PPDU dbg log 24885e3dd157SKalle Valo * 24895e3dd157SKalle Valo * This parameter controls how much memory the target will allocate 24905e3dd157SKalle Valo * to store a log of tx PPDU meta-information (how large the PPDU 24915e3dd157SKalle Valo * was, when it was sent, whether it was successful, etc.) 24925e3dd157SKalle Valo */ 24935e3dd157SKalle Valo __le32 tx_dbg_log_size; 24945e3dd157SKalle Valo 24955e3dd157SKalle Valo /* how many AST entries to be allocated for WDS */ 24965e3dd157SKalle Valo __le32 num_wds_entries; 24975e3dd157SKalle Valo 24985e3dd157SKalle Valo /* 24995e3dd157SKalle Valo * MAC DMA burst size, e.g., For target PCI limit can be 25005e3dd157SKalle Valo * 0 -default, 1 256B 25015e3dd157SKalle Valo */ 25025e3dd157SKalle Valo __le32 dma_burst_size; 25035e3dd157SKalle Valo 25045e3dd157SKalle Valo /* 25055e3dd157SKalle Valo * Fixed delimiters to be inserted after every MPDU to 25065e3dd157SKalle Valo * account for interface latency to avoid underrun. 25075e3dd157SKalle Valo */ 25085e3dd157SKalle Valo __le32 mac_aggr_delim; 25095e3dd157SKalle Valo 25105e3dd157SKalle Valo /* 25115e3dd157SKalle Valo * determine whether target is responsible for detecting duplicate 25125e3dd157SKalle Valo * non-aggregate MPDU and timing out stale fragments. 25135e3dd157SKalle Valo * 25145e3dd157SKalle Valo * A-MPDU reordering is always performed on the target. 25155e3dd157SKalle Valo * 25165e3dd157SKalle Valo * 0: target responsible for frag timeout and dup checking 25175e3dd157SKalle Valo * 1: host responsible for frag timeout and dup checking 25185e3dd157SKalle Valo */ 25195e3dd157SKalle Valo __le32 rx_skip_defrag_timeout_dup_detection_check; 25205e3dd157SKalle Valo 25215e3dd157SKalle Valo /* 25225e3dd157SKalle Valo * Configuration for VoW : 25235e3dd157SKalle Valo * No of Video Nodes to be supported 25245e3dd157SKalle Valo * and Max no of descriptors for each Video link (node). 25255e3dd157SKalle Valo */ 25265e3dd157SKalle Valo __le32 vow_config; 25275e3dd157SKalle Valo 25285e3dd157SKalle Valo /* maximum VDEV that could use GTK offload */ 25295e3dd157SKalle Valo __le32 gtk_offload_max_vdev; 25305e3dd157SKalle Valo 25315e3dd157SKalle Valo /* Number of msdu descriptors target should use */ 25325e3dd157SKalle Valo __le32 num_msdu_desc; 25335e3dd157SKalle Valo 25345e3dd157SKalle Valo /* 25355e3dd157SKalle Valo * Max. number of Tx fragments per MSDU 25365e3dd157SKalle Valo * This parameter controls the max number of Tx fragments per MSDU. 25375e3dd157SKalle Valo * This is sent by the target as part of the WMI_SERVICE_READY event 2538e13dbeadSJoe Perches * and is overridden by the OS shim as required. 25395e3dd157SKalle Valo */ 25405e3dd157SKalle Valo __le32 max_frag_entries; 25415e3dd157SKalle Valo } __packed; 25425e3dd157SKalle Valo 254312b2b9e3SBartosz Markowski struct wmi_resource_config_10x { 254412b2b9e3SBartosz Markowski /* number of virtual devices (VAPs) to support */ 254512b2b9e3SBartosz Markowski __le32 num_vdevs; 254612b2b9e3SBartosz Markowski 254712b2b9e3SBartosz Markowski /* number of peer nodes to support */ 254812b2b9e3SBartosz Markowski __le32 num_peers; 254912b2b9e3SBartosz Markowski 255012b2b9e3SBartosz Markowski /* number of keys per peer */ 255112b2b9e3SBartosz Markowski __le32 num_peer_keys; 255212b2b9e3SBartosz Markowski 255312b2b9e3SBartosz Markowski /* total number of TX/RX data TIDs */ 255412b2b9e3SBartosz Markowski __le32 num_tids; 255512b2b9e3SBartosz Markowski 255612b2b9e3SBartosz Markowski /* 255712b2b9e3SBartosz Markowski * max skid for resolving hash collisions 255812b2b9e3SBartosz Markowski * 255912b2b9e3SBartosz Markowski * The address search table is sparse, so that if two MAC addresses 256012b2b9e3SBartosz Markowski * result in the same hash value, the second of these conflicting 256112b2b9e3SBartosz Markowski * entries can slide to the next index in the address search table, 256212b2b9e3SBartosz Markowski * and use it, if it is unoccupied. This ast_skid_limit parameter 256312b2b9e3SBartosz Markowski * specifies the upper bound on how many subsequent indices to search 256412b2b9e3SBartosz Markowski * over to find an unoccupied space. 256512b2b9e3SBartosz Markowski */ 256612b2b9e3SBartosz Markowski __le32 ast_skid_limit; 256712b2b9e3SBartosz Markowski 256812b2b9e3SBartosz Markowski /* 256912b2b9e3SBartosz Markowski * the nominal chain mask for transmit 257012b2b9e3SBartosz Markowski * 257112b2b9e3SBartosz Markowski * The chain mask may be modified dynamically, e.g. to operate AP 257212b2b9e3SBartosz Markowski * tx with a reduced number of chains if no clients are associated. 257312b2b9e3SBartosz Markowski * This configuration parameter specifies the nominal chain-mask that 257412b2b9e3SBartosz Markowski * should be used when not operating with a reduced set of tx chains. 257512b2b9e3SBartosz Markowski */ 257612b2b9e3SBartosz Markowski __le32 tx_chain_mask; 257712b2b9e3SBartosz Markowski 257812b2b9e3SBartosz Markowski /* 257912b2b9e3SBartosz Markowski * the nominal chain mask for receive 258012b2b9e3SBartosz Markowski * 258112b2b9e3SBartosz Markowski * The chain mask may be modified dynamically, e.g. for a client 258212b2b9e3SBartosz Markowski * to use a reduced number of chains for receive if the traffic to 258312b2b9e3SBartosz Markowski * the client is low enough that it doesn't require downlink MIMO 258412b2b9e3SBartosz Markowski * or antenna diversity. 258512b2b9e3SBartosz Markowski * This configuration parameter specifies the nominal chain-mask that 258612b2b9e3SBartosz Markowski * should be used when not operating with a reduced set of rx chains. 258712b2b9e3SBartosz Markowski */ 258812b2b9e3SBartosz Markowski __le32 rx_chain_mask; 258912b2b9e3SBartosz Markowski 259012b2b9e3SBartosz Markowski /* 259112b2b9e3SBartosz Markowski * what rx reorder timeout (ms) to use for the AC 259212b2b9e3SBartosz Markowski * 259312b2b9e3SBartosz Markowski * Each WMM access class (voice, video, best-effort, background) will 259412b2b9e3SBartosz Markowski * have its own timeout value to dictate how long to wait for missing 259512b2b9e3SBartosz Markowski * rx MPDUs to arrive before flushing subsequent MPDUs that have 259612b2b9e3SBartosz Markowski * already been received. 259712b2b9e3SBartosz Markowski * This parameter specifies the timeout in milliseconds for each 259812b2b9e3SBartosz Markowski * class. 259912b2b9e3SBartosz Markowski */ 260012b2b9e3SBartosz Markowski __le32 rx_timeout_pri_vi; 260112b2b9e3SBartosz Markowski __le32 rx_timeout_pri_vo; 260212b2b9e3SBartosz Markowski __le32 rx_timeout_pri_be; 260312b2b9e3SBartosz Markowski __le32 rx_timeout_pri_bk; 260412b2b9e3SBartosz Markowski 260512b2b9e3SBartosz Markowski /* 260612b2b9e3SBartosz Markowski * what mode the rx should decap packets to 260712b2b9e3SBartosz Markowski * 260812b2b9e3SBartosz Markowski * MAC can decap to RAW (no decap), native wifi or Ethernet types 260912b2b9e3SBartosz Markowski * THis setting also determines the default TX behavior, however TX 261012b2b9e3SBartosz Markowski * behavior can be modified on a per VAP basis during VAP init 261112b2b9e3SBartosz Markowski */ 261212b2b9e3SBartosz Markowski __le32 rx_decap_mode; 261312b2b9e3SBartosz Markowski 26148e4a4f5dSGeert Uytterhoeven /* what is the maximum number of scan requests that can be queued */ 261512b2b9e3SBartosz Markowski __le32 scan_max_pending_reqs; 261612b2b9e3SBartosz Markowski 261712b2b9e3SBartosz Markowski /* maximum VDEV that could use BMISS offload */ 261812b2b9e3SBartosz Markowski __le32 bmiss_offload_max_vdev; 261912b2b9e3SBartosz Markowski 262012b2b9e3SBartosz Markowski /* maximum VDEV that could use offload roaming */ 262112b2b9e3SBartosz Markowski __le32 roam_offload_max_vdev; 262212b2b9e3SBartosz Markowski 262312b2b9e3SBartosz Markowski /* maximum AP profiles that would push to offload roaming */ 262412b2b9e3SBartosz Markowski __le32 roam_offload_max_ap_profiles; 262512b2b9e3SBartosz Markowski 262612b2b9e3SBartosz Markowski /* 262712b2b9e3SBartosz Markowski * how many groups to use for mcast->ucast conversion 262812b2b9e3SBartosz Markowski * 262912b2b9e3SBartosz Markowski * The target's WAL maintains a table to hold information regarding 263012b2b9e3SBartosz Markowski * which peers belong to a given multicast group, so that if 263112b2b9e3SBartosz Markowski * multicast->unicast conversion is enabled, the target can convert 263212b2b9e3SBartosz Markowski * multicast tx frames to a series of unicast tx frames, to each 263312b2b9e3SBartosz Markowski * peer within the multicast group. 263412b2b9e3SBartosz Markowski This num_mcast_groups configuration parameter tells the target how 263512b2b9e3SBartosz Markowski * many multicast groups to provide storage for within its multicast 263612b2b9e3SBartosz Markowski * group membership table. 263712b2b9e3SBartosz Markowski */ 263812b2b9e3SBartosz Markowski __le32 num_mcast_groups; 263912b2b9e3SBartosz Markowski 264012b2b9e3SBartosz Markowski /* 264112b2b9e3SBartosz Markowski * size to alloc for the mcast membership table 264212b2b9e3SBartosz Markowski * 264312b2b9e3SBartosz Markowski * This num_mcast_table_elems configuration parameter tells the 264412b2b9e3SBartosz Markowski * target how many peer elements it needs to provide storage for in 264512b2b9e3SBartosz Markowski * its multicast group membership table. 264612b2b9e3SBartosz Markowski * These multicast group membership table elements are shared by the 264712b2b9e3SBartosz Markowski * multicast groups stored within the table. 264812b2b9e3SBartosz Markowski */ 264912b2b9e3SBartosz Markowski __le32 num_mcast_table_elems; 265012b2b9e3SBartosz Markowski 265112b2b9e3SBartosz Markowski /* 265212b2b9e3SBartosz Markowski * whether/how to do multicast->unicast conversion 265312b2b9e3SBartosz Markowski * 265412b2b9e3SBartosz Markowski * This configuration parameter specifies whether the target should 265512b2b9e3SBartosz Markowski * perform multicast --> unicast conversion on transmit, and if so, 265612b2b9e3SBartosz Markowski * what to do if it finds no entries in its multicast group 265712b2b9e3SBartosz Markowski * membership table for the multicast IP address in the tx frame. 265812b2b9e3SBartosz Markowski * Configuration value: 265912b2b9e3SBartosz Markowski * 0 -> Do not perform multicast to unicast conversion. 266012b2b9e3SBartosz Markowski * 1 -> Convert multicast frames to unicast, if the IP multicast 266112b2b9e3SBartosz Markowski * address from the tx frame is found in the multicast group 266212b2b9e3SBartosz Markowski * membership table. If the IP multicast address is not found, 266312b2b9e3SBartosz Markowski * drop the frame. 266412b2b9e3SBartosz Markowski * 2 -> Convert multicast frames to unicast, if the IP multicast 266512b2b9e3SBartosz Markowski * address from the tx frame is found in the multicast group 266612b2b9e3SBartosz Markowski * membership table. If the IP multicast address is not found, 266712b2b9e3SBartosz Markowski * transmit the frame as multicast. 266812b2b9e3SBartosz Markowski */ 266912b2b9e3SBartosz Markowski __le32 mcast2ucast_mode; 267012b2b9e3SBartosz Markowski 267112b2b9e3SBartosz Markowski /* 267212b2b9e3SBartosz Markowski * how much memory to allocate for a tx PPDU dbg log 267312b2b9e3SBartosz Markowski * 267412b2b9e3SBartosz Markowski * This parameter controls how much memory the target will allocate 267512b2b9e3SBartosz Markowski * to store a log of tx PPDU meta-information (how large the PPDU 267612b2b9e3SBartosz Markowski * was, when it was sent, whether it was successful, etc.) 267712b2b9e3SBartosz Markowski */ 267812b2b9e3SBartosz Markowski __le32 tx_dbg_log_size; 267912b2b9e3SBartosz Markowski 268012b2b9e3SBartosz Markowski /* how many AST entries to be allocated for WDS */ 268112b2b9e3SBartosz Markowski __le32 num_wds_entries; 268212b2b9e3SBartosz Markowski 268312b2b9e3SBartosz Markowski /* 268412b2b9e3SBartosz Markowski * MAC DMA burst size, e.g., For target PCI limit can be 268512b2b9e3SBartosz Markowski * 0 -default, 1 256B 268612b2b9e3SBartosz Markowski */ 268712b2b9e3SBartosz Markowski __le32 dma_burst_size; 268812b2b9e3SBartosz Markowski 268912b2b9e3SBartosz Markowski /* 269012b2b9e3SBartosz Markowski * Fixed delimiters to be inserted after every MPDU to 269112b2b9e3SBartosz Markowski * account for interface latency to avoid underrun. 269212b2b9e3SBartosz Markowski */ 269312b2b9e3SBartosz Markowski __le32 mac_aggr_delim; 269412b2b9e3SBartosz Markowski 269512b2b9e3SBartosz Markowski /* 269612b2b9e3SBartosz Markowski * determine whether target is responsible for detecting duplicate 269712b2b9e3SBartosz Markowski * non-aggregate MPDU and timing out stale fragments. 269812b2b9e3SBartosz Markowski * 269912b2b9e3SBartosz Markowski * A-MPDU reordering is always performed on the target. 270012b2b9e3SBartosz Markowski * 270112b2b9e3SBartosz Markowski * 0: target responsible for frag timeout and dup checking 270212b2b9e3SBartosz Markowski * 1: host responsible for frag timeout and dup checking 270312b2b9e3SBartosz Markowski */ 270412b2b9e3SBartosz Markowski __le32 rx_skip_defrag_timeout_dup_detection_check; 270512b2b9e3SBartosz Markowski 270612b2b9e3SBartosz Markowski /* 270712b2b9e3SBartosz Markowski * Configuration for VoW : 270812b2b9e3SBartosz Markowski * No of Video Nodes to be supported 270912b2b9e3SBartosz Markowski * and Max no of descriptors for each Video link (node). 271012b2b9e3SBartosz Markowski */ 271112b2b9e3SBartosz Markowski __le32 vow_config; 271212b2b9e3SBartosz Markowski 271312b2b9e3SBartosz Markowski /* Number of msdu descriptors target should use */ 271412b2b9e3SBartosz Markowski __le32 num_msdu_desc; 271512b2b9e3SBartosz Markowski 271612b2b9e3SBartosz Markowski /* 271712b2b9e3SBartosz Markowski * Max. number of Tx fragments per MSDU 271812b2b9e3SBartosz Markowski * This parameter controls the max number of Tx fragments per MSDU. 271912b2b9e3SBartosz Markowski * This is sent by the target as part of the WMI_SERVICE_READY event 2720e13dbeadSJoe Perches * and is overridden by the OS shim as required. 272112b2b9e3SBartosz Markowski */ 272212b2b9e3SBartosz Markowski __le32 max_frag_entries; 272312b2b9e3SBartosz Markowski } __packed; 272412b2b9e3SBartosz Markowski 27254a16fbecSRajkumar Manoharan enum wmi_10_2_feature_mask { 27264a16fbecSRajkumar Manoharan WMI_10_2_RX_BATCH_MODE = BIT(0), 27274a16fbecSRajkumar Manoharan WMI_10_2_ATF_CONFIG = BIT(1), 2728de0c789bSYanbo Li WMI_10_2_COEX_GPIO = BIT(3), 2729dd2c5fcbSRajkumar Manoharan WMI_10_2_BSS_CHAN_INFO = BIT(6), 2730de46c015SMohammed Shafi Shajakhan WMI_10_2_PEER_STATS = BIT(7), 27314a16fbecSRajkumar Manoharan }; 27324a16fbecSRajkumar Manoharan 273324c88f78SMichal Kazior struct wmi_resource_config_10_2 { 273424c88f78SMichal Kazior struct wmi_resource_config_10x common; 273524c88f78SMichal Kazior __le32 max_peer_ext_stats; 273624c88f78SMichal Kazior __le32 smart_ant_cap; /* 0-disable, 1-enable */ 273724c88f78SMichal Kazior __le32 bk_min_free; 273824c88f78SMichal Kazior __le32 be_min_free; 273924c88f78SMichal Kazior __le32 vi_min_free; 274024c88f78SMichal Kazior __le32 vo_min_free; 27414a16fbecSRajkumar Manoharan __le32 feature_mask; 274224c88f78SMichal Kazior } __packed; 274312b2b9e3SBartosz Markowski 2744b0399417SRaja Mani #define NUM_UNITS_IS_NUM_VDEVS BIT(0) 2745b0399417SRaja Mani #define NUM_UNITS_IS_NUM_PEERS BIT(1) 2746b0399417SRaja Mani #define NUM_UNITS_IS_NUM_ACTIVE_PEERS BIT(2) 2747b3effe61SBartosz Markowski 2748d1e52a8eSRaja Mani struct wmi_resource_config_10_4 { 2749d1e52a8eSRaja Mani /* Number of virtual devices (VAPs) to support */ 2750d1e52a8eSRaja Mani __le32 num_vdevs; 2751d1e52a8eSRaja Mani 2752d1e52a8eSRaja Mani /* Number of peer nodes to support */ 2753d1e52a8eSRaja Mani __le32 num_peers; 2754d1e52a8eSRaja Mani 2755d1e52a8eSRaja Mani /* Number of active peer nodes to support */ 2756d1e52a8eSRaja Mani __le32 num_active_peers; 2757d1e52a8eSRaja Mani 2758d1e52a8eSRaja Mani /* In offload mode, target supports features like WOW, chatter and other 2759d1e52a8eSRaja Mani * protocol offloads. In order to support them some functionalities like 2760d1e52a8eSRaja Mani * reorder buffering, PN checking need to be done in target. 2761d1e52a8eSRaja Mani * This determines maximum number of peers supported by target in 2762d1e52a8eSRaja Mani * offload mode. 2763d1e52a8eSRaja Mani */ 2764d1e52a8eSRaja Mani __le32 num_offload_peers; 2765d1e52a8eSRaja Mani 2766d1e52a8eSRaja Mani /* Number of reorder buffers available for doing target based reorder 2767d1e52a8eSRaja Mani * Rx reorder buffering 2768d1e52a8eSRaja Mani */ 2769d1e52a8eSRaja Mani __le32 num_offload_reorder_buffs; 2770d1e52a8eSRaja Mani 2771d1e52a8eSRaja Mani /* Number of keys per peer */ 2772d1e52a8eSRaja Mani __le32 num_peer_keys; 2773d1e52a8eSRaja Mani 2774d1e52a8eSRaja Mani /* Total number of TX/RX data TIDs */ 2775d1e52a8eSRaja Mani __le32 num_tids; 2776d1e52a8eSRaja Mani 2777d1e52a8eSRaja Mani /* Max skid for resolving hash collisions. 2778d1e52a8eSRaja Mani * The address search table is sparse, so that if two MAC addresses 2779d1e52a8eSRaja Mani * result in the same hash value, the second of these conflicting 2780d1e52a8eSRaja Mani * entries can slide to the next index in the address search table, 2781d1e52a8eSRaja Mani * and use it, if it is unoccupied. This ast_skid_limit parameter 2782d1e52a8eSRaja Mani * specifies the upper bound on how many subsequent indices to search 2783d1e52a8eSRaja Mani * over to find an unoccupied space. 2784d1e52a8eSRaja Mani */ 2785d1e52a8eSRaja Mani __le32 ast_skid_limit; 2786d1e52a8eSRaja Mani 2787d1e52a8eSRaja Mani /* The nominal chain mask for transmit. 2788d1e52a8eSRaja Mani * The chain mask may be modified dynamically, e.g. to operate AP tx 2789d1e52a8eSRaja Mani * with a reduced number of chains if no clients are associated. 2790d1e52a8eSRaja Mani * This configuration parameter specifies the nominal chain-mask that 2791d1e52a8eSRaja Mani * should be used when not operating with a reduced set of tx chains. 2792d1e52a8eSRaja Mani */ 2793d1e52a8eSRaja Mani __le32 tx_chain_mask; 2794d1e52a8eSRaja Mani 2795d1e52a8eSRaja Mani /* The nominal chain mask for receive. 2796d1e52a8eSRaja Mani * The chain mask may be modified dynamically, e.g. for a client to use 2797d1e52a8eSRaja Mani * a reduced number of chains for receive if the traffic to the client 2798d1e52a8eSRaja Mani * is low enough that it doesn't require downlink MIMO or antenna 2799d1e52a8eSRaja Mani * diversity. This configuration parameter specifies the nominal 2800d1e52a8eSRaja Mani * chain-mask that should be used when not operating with a reduced 2801d1e52a8eSRaja Mani * set of rx chains. 2802d1e52a8eSRaja Mani */ 2803d1e52a8eSRaja Mani __le32 rx_chain_mask; 2804d1e52a8eSRaja Mani 2805d1e52a8eSRaja Mani /* What rx reorder timeout (ms) to use for the AC. 2806d1e52a8eSRaja Mani * Each WMM access class (voice, video, best-effort, background) will 2807d1e52a8eSRaja Mani * have its own timeout value to dictate how long to wait for missing 2808d1e52a8eSRaja Mani * rx MPDUs to arrive before flushing subsequent MPDUs that have already 2809d1e52a8eSRaja Mani * been received. This parameter specifies the timeout in milliseconds 2810d1e52a8eSRaja Mani * for each class. 2811d1e52a8eSRaja Mani */ 2812d1e52a8eSRaja Mani __le32 rx_timeout_pri[4]; 2813d1e52a8eSRaja Mani 2814d1e52a8eSRaja Mani /* What mode the rx should decap packets to. 2815d1e52a8eSRaja Mani * MAC can decap to RAW (no decap), native wifi or Ethernet types. 2816d1e52a8eSRaja Mani * This setting also determines the default TX behavior, however TX 2817d1e52a8eSRaja Mani * behavior can be modified on a per VAP basis during VAP init 2818d1e52a8eSRaja Mani */ 2819d1e52a8eSRaja Mani __le32 rx_decap_mode; 2820d1e52a8eSRaja Mani 2821d1e52a8eSRaja Mani __le32 scan_max_pending_req; 2822d1e52a8eSRaja Mani 2823d1e52a8eSRaja Mani __le32 bmiss_offload_max_vdev; 2824d1e52a8eSRaja Mani 2825d1e52a8eSRaja Mani __le32 roam_offload_max_vdev; 2826d1e52a8eSRaja Mani 2827d1e52a8eSRaja Mani __le32 roam_offload_max_ap_profiles; 2828d1e52a8eSRaja Mani 2829d1e52a8eSRaja Mani /* How many groups to use for mcast->ucast conversion. 2830d1e52a8eSRaja Mani * The target's WAL maintains a table to hold information regarding 2831d1e52a8eSRaja Mani * which peers belong to a given multicast group, so that if 2832d1e52a8eSRaja Mani * multicast->unicast conversion is enabled, the target can convert 2833d1e52a8eSRaja Mani * multicast tx frames to a series of unicast tx frames, to each peer 2834d1e52a8eSRaja Mani * within the multicast group. This num_mcast_groups configuration 2835d1e52a8eSRaja Mani * parameter tells the target how many multicast groups to provide 2836d1e52a8eSRaja Mani * storage for within its multicast group membership table. 2837d1e52a8eSRaja Mani */ 2838d1e52a8eSRaja Mani __le32 num_mcast_groups; 2839d1e52a8eSRaja Mani 2840d1e52a8eSRaja Mani /* Size to alloc for the mcast membership table. 2841d1e52a8eSRaja Mani * This num_mcast_table_elems configuration parameter tells the target 2842d1e52a8eSRaja Mani * how many peer elements it needs to provide storage for in its 2843d1e52a8eSRaja Mani * multicast group membership table. These multicast group membership 2844d1e52a8eSRaja Mani * table elements are shared by the multicast groups stored within 2845d1e52a8eSRaja Mani * the table. 2846d1e52a8eSRaja Mani */ 2847d1e52a8eSRaja Mani __le32 num_mcast_table_elems; 2848d1e52a8eSRaja Mani 2849d1e52a8eSRaja Mani /* Whether/how to do multicast->unicast conversion. 2850d1e52a8eSRaja Mani * This configuration parameter specifies whether the target should 2851d1e52a8eSRaja Mani * perform multicast --> unicast conversion on transmit, and if so, 2852d1e52a8eSRaja Mani * what to do if it finds no entries in its multicast group membership 2853d1e52a8eSRaja Mani * table for the multicast IP address in the tx frame. 2854d1e52a8eSRaja Mani * Configuration value: 2855d1e52a8eSRaja Mani * 0 -> Do not perform multicast to unicast conversion. 2856d1e52a8eSRaja Mani * 1 -> Convert multicast frames to unicast, if the IP multicast address 2857d1e52a8eSRaja Mani * from the tx frame is found in the multicast group membership 2858d1e52a8eSRaja Mani * table. If the IP multicast address is not found, drop the frame 2859d1e52a8eSRaja Mani * 2 -> Convert multicast frames to unicast, if the IP multicast address 2860d1e52a8eSRaja Mani * from the tx frame is found in the multicast group membership 2861d1e52a8eSRaja Mani * table. If the IP multicast address is not found, transmit the 2862d1e52a8eSRaja Mani * frame as multicast. 2863d1e52a8eSRaja Mani */ 2864d1e52a8eSRaja Mani __le32 mcast2ucast_mode; 2865d1e52a8eSRaja Mani 2866d1e52a8eSRaja Mani /* How much memory to allocate for a tx PPDU dbg log. 2867d1e52a8eSRaja Mani * This parameter controls how much memory the target will allocate to 2868d1e52a8eSRaja Mani * store a log of tx PPDU meta-information (how large the PPDU was, 2869d1e52a8eSRaja Mani * when it was sent, whether it was successful, etc.) 2870d1e52a8eSRaja Mani */ 2871d1e52a8eSRaja Mani __le32 tx_dbg_log_size; 2872d1e52a8eSRaja Mani 2873d1e52a8eSRaja Mani /* How many AST entries to be allocated for WDS */ 2874d1e52a8eSRaja Mani __le32 num_wds_entries; 2875d1e52a8eSRaja Mani 2876d1e52a8eSRaja Mani /* MAC DMA burst size. 0 -default, 1 -256B */ 2877d1e52a8eSRaja Mani __le32 dma_burst_size; 2878d1e52a8eSRaja Mani 2879d1e52a8eSRaja Mani /* Fixed delimiters to be inserted after every MPDU to account for 2880d1e52a8eSRaja Mani * interface latency to avoid underrun. 2881d1e52a8eSRaja Mani */ 2882d1e52a8eSRaja Mani __le32 mac_aggr_delim; 2883d1e52a8eSRaja Mani 2884d1e52a8eSRaja Mani /* Determine whether target is responsible for detecting duplicate 2885d1e52a8eSRaja Mani * non-aggregate MPDU and timing out stale fragments. A-MPDU reordering 2886d1e52a8eSRaja Mani * is always performed on the target. 2887d1e52a8eSRaja Mani * 2888d1e52a8eSRaja Mani * 0: target responsible for frag timeout and dup checking 2889d1e52a8eSRaja Mani * 1: host responsible for frag timeout and dup checking 2890d1e52a8eSRaja Mani */ 2891d1e52a8eSRaja Mani __le32 rx_skip_defrag_timeout_dup_detection_check; 2892d1e52a8eSRaja Mani 2893d1e52a8eSRaja Mani /* Configuration for VoW : No of Video nodes to be supported and max 2894d1e52a8eSRaja Mani * no of descriptors for each video link (node). 2895d1e52a8eSRaja Mani */ 2896d1e52a8eSRaja Mani __le32 vow_config; 2897d1e52a8eSRaja Mani 2898d1e52a8eSRaja Mani /* Maximum vdev that could use gtk offload */ 2899d1e52a8eSRaja Mani __le32 gtk_offload_max_vdev; 2900d1e52a8eSRaja Mani 2901d1e52a8eSRaja Mani /* Number of msdu descriptors target should use */ 2902d1e52a8eSRaja Mani __le32 num_msdu_desc; 2903d1e52a8eSRaja Mani 2904d1e52a8eSRaja Mani /* Max number of tx fragments per MSDU. 2905d1e52a8eSRaja Mani * This parameter controls the max number of tx fragments per MSDU. 2906d1e52a8eSRaja Mani * This will passed by target as part of the WMI_SERVICE_READY event 2907d1e52a8eSRaja Mani * and is overridden by the OS shim as required. 2908d1e52a8eSRaja Mani */ 2909d1e52a8eSRaja Mani __le32 max_frag_entries; 2910d1e52a8eSRaja Mani 2911d1e52a8eSRaja Mani /* Max number of extended peer stats. 2912d1e52a8eSRaja Mani * This parameter controls the max number of peers for which extended 2913d1e52a8eSRaja Mani * statistics are supported by target 2914d1e52a8eSRaja Mani */ 2915d1e52a8eSRaja Mani __le32 max_peer_ext_stats; 2916d1e52a8eSRaja Mani 2917d1e52a8eSRaja Mani /* Smart antenna capabilities information. 2918d1e52a8eSRaja Mani * 1 - Smart antenna is enabled 2919d1e52a8eSRaja Mani * 0 - Smart antenna is disabled 2920d1e52a8eSRaja Mani * In future this can contain smart antenna specific capabilities. 2921d1e52a8eSRaja Mani */ 2922d1e52a8eSRaja Mani __le32 smart_ant_cap; 2923d1e52a8eSRaja Mani 2924d1e52a8eSRaja Mani /* User can configure the buffers allocated for each AC (BE, BK, VI, VO) 2925d1e52a8eSRaja Mani * during init. 2926d1e52a8eSRaja Mani */ 2927d1e52a8eSRaja Mani __le32 bk_minfree; 2928d1e52a8eSRaja Mani __le32 be_minfree; 2929d1e52a8eSRaja Mani __le32 vi_minfree; 2930d1e52a8eSRaja Mani __le32 vo_minfree; 2931d1e52a8eSRaja Mani 2932d1e52a8eSRaja Mani /* Rx batch mode capability. 2933d1e52a8eSRaja Mani * 1 - Rx batch mode enabled 2934d1e52a8eSRaja Mani * 0 - Rx batch mode disabled 2935d1e52a8eSRaja Mani */ 2936d1e52a8eSRaja Mani __le32 rx_batchmode; 2937d1e52a8eSRaja Mani 2938d1e52a8eSRaja Mani /* Thermal throttling capability. 2939d1e52a8eSRaja Mani * 1 - Capable of thermal throttling 2940d1e52a8eSRaja Mani * 0 - Not capable of thermal throttling 2941d1e52a8eSRaja Mani */ 2942d1e52a8eSRaja Mani __le32 tt_support; 2943d1e52a8eSRaja Mani 2944d1e52a8eSRaja Mani /* ATF configuration. 2945d1e52a8eSRaja Mani * 1 - Enable ATF 2946d1e52a8eSRaja Mani * 0 - Disable ATF 2947d1e52a8eSRaja Mani */ 2948d1e52a8eSRaja Mani __le32 atf_config; 2949d1e52a8eSRaja Mani 2950d1e52a8eSRaja Mani /* Configure padding to manage IP header un-alignment 2951d1e52a8eSRaja Mani * 1 - Enable padding 2952d1e52a8eSRaja Mani * 0 - Disable padding 2953d1e52a8eSRaja Mani */ 2954d1e52a8eSRaja Mani __le32 iphdr_pad_config; 2955d1e52a8eSRaja Mani 2956169ff6dbSBen Greear /* qwrap configuration (bits 15-0) 2957d1e52a8eSRaja Mani * 1 - This is qwrap configuration 2958d1e52a8eSRaja Mani * 0 - This is not qwrap 2959169ff6dbSBen Greear * 2960169ff6dbSBen Greear * Bits 31-16 is alloc_frag_desc_for_data_pkt (1 enables, 0 disables) 2961169ff6dbSBen Greear * In order to get ack-RSSI reporting and to specify the tx-rate for 2962169ff6dbSBen Greear * individual frames, this option must be enabled. This uses an extra 2963169ff6dbSBen Greear * 4 bytes per tx-msdu descriptor, so don't enable it unless you need it. 2964d1e52a8eSRaja Mani */ 2965d1e52a8eSRaja Mani __le32 qwrap_config; 2966d1e52a8eSRaja Mani } __packed; 2967d1e52a8eSRaja Mani 2968add6cd8dSManikanta Pubbisetty enum wmi_coex_version { 2969add6cd8dSManikanta Pubbisetty WMI_NO_COEX_VERSION_SUPPORT = 0, 2970add6cd8dSManikanta Pubbisetty /* 3 wire coex support*/ 2971add6cd8dSManikanta Pubbisetty WMI_COEX_VERSION_1 = 1, 2972add6cd8dSManikanta Pubbisetty /* 2.5 wire coex support*/ 2973add6cd8dSManikanta Pubbisetty WMI_COEX_VERSION_2 = 2, 2974add6cd8dSManikanta Pubbisetty /* 2.5 wire coex with duty cycle support */ 2975add6cd8dSManikanta Pubbisetty WMI_COEX_VERSION_3 = 3, 2976add6cd8dSManikanta Pubbisetty /* 4 wire coex support*/ 2977add6cd8dSManikanta Pubbisetty WMI_COEX_VERSION_4 = 4, 2978add6cd8dSManikanta Pubbisetty }; 2979add6cd8dSManikanta Pubbisetty 298047771902SRaja Mani /** 298147771902SRaja Mani * enum wmi_10_4_feature_mask - WMI 10.4 feature enable/disable flags 298247771902SRaja Mani * @WMI_10_4_LTEU_SUPPORT: LTEU config 298347771902SRaja Mani * @WMI_10_4_COEX_GPIO_SUPPORT: COEX GPIO config 298447771902SRaja Mani * @WMI_10_4_AUX_RADIO_SPECTRAL_INTF: AUX Radio Enhancement for spectral scan 298547771902SRaja Mani * @WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF: AUX Radio Enhancement for chan load scan 298647771902SRaja Mani * @WMI_10_4_BSS_CHANNEL_INFO_64: BSS channel info stats 298747771902SRaja Mani * @WMI_10_4_PEER_STATS: Per station stats 2988add6cd8dSManikanta Pubbisetty * @WMI_10_4_VDEV_STATS: Per vdev stats 2989add6cd8dSManikanta Pubbisetty * @WMI_10_4_TDLS: Implicit TDLS support in firmware enable/disable 2990add6cd8dSManikanta Pubbisetty * @WMI_10_4_TDLS_OFFCHAN: TDLS offchannel support enable/disable 2991add6cd8dSManikanta Pubbisetty * @WMI_10_4_TDLS_UAPSD_BUFFER_STA: TDLS buffer sta support enable/disable 2992add6cd8dSManikanta Pubbisetty * @WMI_10_4_TDLS_UAPSD_SLEEP_STA: TDLS sleep sta support enable/disable 2993add6cd8dSManikanta Pubbisetty * @WMI_10_4_TDLS_CONN_TRACKER_IN_HOST_MODE: TDLS connection tracker in host 2994add6cd8dSManikanta Pubbisetty * enable/disable 2995add6cd8dSManikanta Pubbisetty * @WMI_10_4_TDLS_EXPLICIT_MODE_ONLY:Explicit TDLS mode enable/disable 2996c7fd8d23SBalaji Pothunoori * @WMI_10_4_TX_DATA_ACK_RSSI: Enable DATA ACK RSSI if firmware is capable 299747771902SRaja Mani */ 299847771902SRaja Mani enum wmi_10_4_feature_mask { 299947771902SRaja Mani WMI_10_4_LTEU_SUPPORT = BIT(0), 300047771902SRaja Mani WMI_10_4_COEX_GPIO_SUPPORT = BIT(1), 300147771902SRaja Mani WMI_10_4_AUX_RADIO_SPECTRAL_INTF = BIT(2), 300247771902SRaja Mani WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF = BIT(3), 300347771902SRaja Mani WMI_10_4_BSS_CHANNEL_INFO_64 = BIT(4), 300447771902SRaja Mani WMI_10_4_PEER_STATS = BIT(5), 3005add6cd8dSManikanta Pubbisetty WMI_10_4_VDEV_STATS = BIT(6), 3006add6cd8dSManikanta Pubbisetty WMI_10_4_TDLS = BIT(7), 3007add6cd8dSManikanta Pubbisetty WMI_10_4_TDLS_OFFCHAN = BIT(8), 3008add6cd8dSManikanta Pubbisetty WMI_10_4_TDLS_UAPSD_BUFFER_STA = BIT(9), 3009add6cd8dSManikanta Pubbisetty WMI_10_4_TDLS_UAPSD_SLEEP_STA = BIT(10), 3010add6cd8dSManikanta Pubbisetty WMI_10_4_TDLS_CONN_TRACKER_IN_HOST_MODE = BIT(11), 3011add6cd8dSManikanta Pubbisetty WMI_10_4_TDLS_EXPLICIT_MODE_ONLY = BIT(12), 3012c7fd8d23SBalaji Pothunoori WMI_10_4_TX_DATA_ACK_RSSI = BIT(16), 3013bb31b7cbSManikanta Pubbisetty WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT = BIT(17), 3014bb31b7cbSManikanta Pubbisetty WMI_10_4_REPORT_AIRTIME = BIT(18), 3015add6cd8dSManikanta Pubbisetty 301647771902SRaja Mani }; 301747771902SRaja Mani 301847771902SRaja Mani struct wmi_ext_resource_config_10_4_cmd { 301947771902SRaja Mani /* contains enum wmi_host_platform_type */ 302047771902SRaja Mani __le32 host_platform_config; 302147771902SRaja Mani /* see enum wmi_10_4_feature_mask */ 302247771902SRaja Mani __le32 fw_feature_bitmap; 3023add6cd8dSManikanta Pubbisetty /* WLAN priority GPIO number */ 3024add6cd8dSManikanta Pubbisetty __le32 wlan_gpio_priority; 3025add6cd8dSManikanta Pubbisetty /* see enum wmi_coex_version */ 3026add6cd8dSManikanta Pubbisetty __le32 coex_version; 3027add6cd8dSManikanta Pubbisetty /* COEX GPIO config */ 3028add6cd8dSManikanta Pubbisetty __le32 coex_gpio_pin1; 3029add6cd8dSManikanta Pubbisetty __le32 coex_gpio_pin2; 3030add6cd8dSManikanta Pubbisetty __le32 coex_gpio_pin3; 3031add6cd8dSManikanta Pubbisetty /* number of vdevs allowed to perform tdls */ 3032add6cd8dSManikanta Pubbisetty __le32 num_tdls_vdevs; 3033add6cd8dSManikanta Pubbisetty /* number of peers to track per TDLS vdev */ 3034add6cd8dSManikanta Pubbisetty __le32 num_tdls_conn_table_entries; 3035add6cd8dSManikanta Pubbisetty /* number of tdls sleep sta supported */ 3036add6cd8dSManikanta Pubbisetty __le32 max_tdls_concurrent_sleep_sta; 3037add6cd8dSManikanta Pubbisetty /* number of tdls buffer sta supported */ 3038add6cd8dSManikanta Pubbisetty __le32 max_tdls_concurrent_buffer_sta; 303947771902SRaja Mani }; 304047771902SRaja Mani 30415c9f0713SErik Stromdahl /* structure describing host memory chunk. */ 30425e3dd157SKalle Valo struct host_memory_chunk { 30435e3dd157SKalle Valo /* id of the request that is passed up in service ready */ 30445e3dd157SKalle Valo __le32 req_id; 30455e3dd157SKalle Valo /* the physical address the memory chunk */ 30465e3dd157SKalle Valo __le32 ptr; 30475e3dd157SKalle Valo /* size of the chunk */ 30485e3dd157SKalle Valo __le32 size; 30495e3dd157SKalle Valo } __packed; 30505e3dd157SKalle Valo 3051cf9fca8fSMichal Kazior struct wmi_host_mem_chunks { 3052cf9fca8fSMichal Kazior __le32 count; 3053cf9fca8fSMichal Kazior /* some fw revisions require at least 1 chunk regardless of count */ 3054cf9fca8fSMichal Kazior struct host_memory_chunk items[1]; 3055cf9fca8fSMichal Kazior } __packed; 3056cf9fca8fSMichal Kazior 30575e3dd157SKalle Valo struct wmi_init_cmd { 30585e3dd157SKalle Valo struct wmi_resource_config resource_config; 3059cf9fca8fSMichal Kazior struct wmi_host_mem_chunks mem_chunks; 30605e3dd157SKalle Valo } __packed; 30615e3dd157SKalle Valo 3062e13dbeadSJoe Perches /* _10x structure is from 10.X FW API */ 306312b2b9e3SBartosz Markowski struct wmi_init_cmd_10x { 306412b2b9e3SBartosz Markowski struct wmi_resource_config_10x resource_config; 3065cf9fca8fSMichal Kazior struct wmi_host_mem_chunks mem_chunks; 306612b2b9e3SBartosz Markowski } __packed; 306712b2b9e3SBartosz Markowski 306824c88f78SMichal Kazior struct wmi_init_cmd_10_2 { 306924c88f78SMichal Kazior struct wmi_resource_config_10_2 resource_config; 3070cf9fca8fSMichal Kazior struct wmi_host_mem_chunks mem_chunks; 307124c88f78SMichal Kazior } __packed; 307224c88f78SMichal Kazior 3073d1e52a8eSRaja Mani struct wmi_init_cmd_10_4 { 3074d1e52a8eSRaja Mani struct wmi_resource_config_10_4 resource_config; 3075d1e52a8eSRaja Mani struct wmi_host_mem_chunks mem_chunks; 3076d1e52a8eSRaja Mani } __packed; 3077d1e52a8eSRaja Mani 307824c88f78SMichal Kazior struct wmi_chan_list_entry { 307924c88f78SMichal Kazior __le16 freq; 308024c88f78SMichal Kazior u8 phy_mode; /* valid for 10.2 only */ 308124c88f78SMichal Kazior u8 reserved; 308224c88f78SMichal Kazior } __packed; 308324c88f78SMichal Kazior 30845e3dd157SKalle Valo /* TLV for channel list */ 30855e3dd157SKalle Valo struct wmi_chan_list { 30865e3dd157SKalle Valo __le32 tag; /* WMI_CHAN_LIST_TAG */ 30875e3dd157SKalle Valo __le32 num_chan; 308824c88f78SMichal Kazior struct wmi_chan_list_entry channel_list[0]; 30895e3dd157SKalle Valo } __packed; 30905e3dd157SKalle Valo 30915e3dd157SKalle Valo struct wmi_bssid_list { 30925e3dd157SKalle Valo __le32 tag; /* WMI_BSSID_LIST_TAG */ 30935e3dd157SKalle Valo __le32 num_bssid; 30945e3dd157SKalle Valo struct wmi_mac_addr bssid_list[0]; 30955e3dd157SKalle Valo } __packed; 30965e3dd157SKalle Valo 30975e3dd157SKalle Valo struct wmi_ie_data { 30985e3dd157SKalle Valo __le32 tag; /* WMI_IE_TAG */ 30995e3dd157SKalle Valo __le32 ie_len; 31005e3dd157SKalle Valo u8 ie_data[0]; 31015e3dd157SKalle Valo } __packed; 31025e3dd157SKalle Valo 31035e3dd157SKalle Valo struct wmi_ssid { 31045e3dd157SKalle Valo __le32 ssid_len; 31055e3dd157SKalle Valo u8 ssid[32]; 31065e3dd157SKalle Valo } __packed; 31075e3dd157SKalle Valo 31085e3dd157SKalle Valo struct wmi_ssid_list { 31095e3dd157SKalle Valo __le32 tag; /* WMI_SSID_LIST_TAG */ 31105e3dd157SKalle Valo __le32 num_ssids; 31115e3dd157SKalle Valo struct wmi_ssid ssids[0]; 31125e3dd157SKalle Valo } __packed; 31135e3dd157SKalle Valo 31145e3dd157SKalle Valo /* prefix used by scan requestor ids on the host */ 31155e3dd157SKalle Valo #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 31165e3dd157SKalle Valo 31175e3dd157SKalle Valo /* prefix used by scan request ids generated on the host */ 31185e3dd157SKalle Valo /* host cycles through the lower 12 bits to generate ids */ 31195e3dd157SKalle Valo #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 31205e3dd157SKalle Valo 31215e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_SSID 16 31225e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_BSSID 4 31235e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 31245e3dd157SKalle Valo 3125dcca0bdbSMichal Kazior /* Values lower than this may be refused by some firmware revisions with a scan 3126dcca0bdbSMichal Kazior * completion with a timedout reason. 3127dcca0bdbSMichal Kazior */ 3128dcca0bdbSMichal Kazior #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 3129dcca0bdbSMichal Kazior 31305e3dd157SKalle Valo /* Scan priority numbers must be sequential, starting with 0 */ 31315e3dd157SKalle Valo enum wmi_scan_priority { 31325e3dd157SKalle Valo WMI_SCAN_PRIORITY_VERY_LOW = 0, 31335e3dd157SKalle Valo WMI_SCAN_PRIORITY_LOW, 31345e3dd157SKalle Valo WMI_SCAN_PRIORITY_MEDIUM, 31355e3dd157SKalle Valo WMI_SCAN_PRIORITY_HIGH, 31365e3dd157SKalle Valo WMI_SCAN_PRIORITY_VERY_HIGH, 31375e3dd157SKalle Valo WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 31385e3dd157SKalle Valo }; 31395e3dd157SKalle Valo 3140a6aa5da3SMichal Kazior struct wmi_start_scan_common { 31415e3dd157SKalle Valo /* Scan ID */ 31425e3dd157SKalle Valo __le32 scan_id; 31435e3dd157SKalle Valo /* Scan requestor ID */ 31445e3dd157SKalle Valo __le32 scan_req_id; 31455e3dd157SKalle Valo /* VDEV id(interface) that is requesting scan */ 31465e3dd157SKalle Valo __le32 vdev_id; 31475e3dd157SKalle Valo /* Scan Priority, input to scan scheduler */ 31485e3dd157SKalle Valo __le32 scan_priority; 31495e3dd157SKalle Valo /* Scan events subscription */ 31505e3dd157SKalle Valo __le32 notify_scan_events; 31515e3dd157SKalle Valo /* dwell time in msec on active channels */ 31525e3dd157SKalle Valo __le32 dwell_time_active; 31535e3dd157SKalle Valo /* dwell time in msec on passive channels */ 31545e3dd157SKalle Valo __le32 dwell_time_passive; 31555e3dd157SKalle Valo /* 31565e3dd157SKalle Valo * min time in msec on the BSS channel,only valid if atleast one 31575e3dd157SKalle Valo * VDEV is active 31585e3dd157SKalle Valo */ 31595e3dd157SKalle Valo __le32 min_rest_time; 31605e3dd157SKalle Valo /* 31615e3dd157SKalle Valo * max rest time in msec on the BSS channel,only valid if at least 31625e3dd157SKalle Valo * one VDEV is active 31635e3dd157SKalle Valo */ 31645e3dd157SKalle Valo /* 31655e3dd157SKalle Valo * the scanner will rest on the bss channel at least min_rest_time 31665e3dd157SKalle Valo * after min_rest_time the scanner will start checking for tx/rx 31675e3dd157SKalle Valo * activity on all VDEVs. if there is no activity the scanner will 31685e3dd157SKalle Valo * switch to off channel. if there is activity the scanner will let 31695e3dd157SKalle Valo * the radio on the bss channel until max_rest_time expires.at 31705e3dd157SKalle Valo * max_rest_time scanner will switch to off channel irrespective of 31715e3dd157SKalle Valo * activity. activity is determined by the idle_time parameter. 31725e3dd157SKalle Valo */ 31735e3dd157SKalle Valo __le32 max_rest_time; 31745e3dd157SKalle Valo /* 31755e3dd157SKalle Valo * time before sending next set of probe requests. 31765e3dd157SKalle Valo * The scanner keeps repeating probe requests transmission with 31775e3dd157SKalle Valo * period specified by repeat_probe_time. 31785e3dd157SKalle Valo * The number of probe requests specified depends on the ssid_list 31795e3dd157SKalle Valo * and bssid_list 31805e3dd157SKalle Valo */ 31815e3dd157SKalle Valo __le32 repeat_probe_time; 31825e3dd157SKalle Valo /* time in msec between 2 consequetive probe requests with in a set. */ 31835e3dd157SKalle Valo __le32 probe_spacing_time; 31845e3dd157SKalle Valo /* 31855e3dd157SKalle Valo * data inactivity time in msec on bss channel that will be used by 31865e3dd157SKalle Valo * scanner for measuring the inactivity. 31875e3dd157SKalle Valo */ 31885e3dd157SKalle Valo __le32 idle_time; 31895e3dd157SKalle Valo /* maximum time in msec allowed for scan */ 31905e3dd157SKalle Valo __le32 max_scan_time; 31915e3dd157SKalle Valo /* 31925e3dd157SKalle Valo * delay in msec before sending first probe request after switching 31935e3dd157SKalle Valo * to a channel 31945e3dd157SKalle Valo */ 31955e3dd157SKalle Valo __le32 probe_delay; 31965e3dd157SKalle Valo /* Scan control flags */ 31975e3dd157SKalle Valo __le32 scan_ctrl_flags; 3198a6aa5da3SMichal Kazior } __packed; 31995e3dd157SKalle Valo 3200a6aa5da3SMichal Kazior struct wmi_start_scan_tlvs { 3201a6aa5da3SMichal Kazior /* TLV parameters. These includes channel list, ssid list, bssid list, 3202a6aa5da3SMichal Kazior * extra ies. 32035e3dd157SKalle Valo */ 3204a6aa5da3SMichal Kazior u8 tlvs[0]; 3205a6aa5da3SMichal Kazior } __packed; 3206a6aa5da3SMichal Kazior 3207a6aa5da3SMichal Kazior struct wmi_start_scan_cmd { 3208a6aa5da3SMichal Kazior struct wmi_start_scan_common common; 3209a6aa5da3SMichal Kazior __le32 burst_duration_ms; 3210a6aa5da3SMichal Kazior struct wmi_start_scan_tlvs tlvs; 32115e3dd157SKalle Valo } __packed; 32125e3dd157SKalle Valo 321389b7e766SBartosz Markowski /* This is the definition from 10.X firmware branch */ 3214a6aa5da3SMichal Kazior struct wmi_10x_start_scan_cmd { 3215a6aa5da3SMichal Kazior struct wmi_start_scan_common common; 3216a6aa5da3SMichal Kazior struct wmi_start_scan_tlvs tlvs; 321789b7e766SBartosz Markowski } __packed; 321889b7e766SBartosz Markowski 32195e3dd157SKalle Valo struct wmi_ssid_arg { 32205e3dd157SKalle Valo int len; 32215e3dd157SKalle Valo const u8 *ssid; 32225e3dd157SKalle Valo }; 32235e3dd157SKalle Valo 32245e3dd157SKalle Valo struct wmi_bssid_arg { 32255e3dd157SKalle Valo const u8 *bssid; 32265e3dd157SKalle Valo }; 32275e3dd157SKalle Valo 32285e3dd157SKalle Valo struct wmi_start_scan_arg { 32295e3dd157SKalle Valo u32 scan_id; 32305e3dd157SKalle Valo u32 scan_req_id; 32315e3dd157SKalle Valo u32 vdev_id; 32325e3dd157SKalle Valo u32 scan_priority; 32335e3dd157SKalle Valo u32 notify_scan_events; 32345e3dd157SKalle Valo u32 dwell_time_active; 32355e3dd157SKalle Valo u32 dwell_time_passive; 32365e3dd157SKalle Valo u32 min_rest_time; 32375e3dd157SKalle Valo u32 max_rest_time; 32385e3dd157SKalle Valo u32 repeat_probe_time; 32395e3dd157SKalle Valo u32 probe_spacing_time; 32405e3dd157SKalle Valo u32 idle_time; 32415e3dd157SKalle Valo u32 max_scan_time; 32425e3dd157SKalle Valo u32 probe_delay; 32435e3dd157SKalle Valo u32 scan_ctrl_flags; 3244dbd3f9f3SMichal Kazior u32 burst_duration_ms; 32455e3dd157SKalle Valo 32465e3dd157SKalle Valo u32 ie_len; 32475e3dd157SKalle Valo u32 n_channels; 32485e3dd157SKalle Valo u32 n_ssids; 32495e3dd157SKalle Valo u32 n_bssids; 32505e3dd157SKalle Valo 32515e3dd157SKalle Valo u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN]; 325224c88f78SMichal Kazior u16 channels[64]; 32535e3dd157SKalle Valo struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID]; 32545e3dd157SKalle Valo struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID]; 325560e1d0fbSCarl Huang struct wmi_mac_addr mac_addr; 325660e1d0fbSCarl Huang struct wmi_mac_addr mac_mask; 32575e3dd157SKalle Valo }; 32585e3dd157SKalle Valo 32595e3dd157SKalle Valo /* scan control flags */ 32605e3dd157SKalle Valo 32615e3dd157SKalle Valo /* passively scan all channels including active channels */ 32625e3dd157SKalle Valo #define WMI_SCAN_FLAG_PASSIVE 0x1 32635e3dd157SKalle Valo /* add wild card ssid probe request even though ssid_list is specified. */ 32645e3dd157SKalle Valo #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 32655e3dd157SKalle Valo /* add cck rates to rates/xrate ie for the generated probe request */ 32665e3dd157SKalle Valo #define WMI_SCAN_ADD_CCK_RATES 0x4 32675e3dd157SKalle Valo /* add ofdm rates to rates/xrate ie for the generated probe request */ 32685e3dd157SKalle Valo #define WMI_SCAN_ADD_OFDM_RATES 0x8 32695e3dd157SKalle Valo /* To enable indication of Chan load and Noise floor to host */ 32705e3dd157SKalle Valo #define WMI_SCAN_CHAN_STAT_EVENT 0x10 32715e3dd157SKalle Valo /* Filter Probe request frames */ 32725e3dd157SKalle Valo #define WMI_SCAN_FILTER_PROBE_REQ 0x20 32735e3dd157SKalle Valo /* When set, DFS channels will not be scanned */ 32745e3dd157SKalle Valo #define WMI_SCAN_BYPASS_DFS_CHN 0x40 32755e3dd157SKalle Valo /* Different FW scan engine may choose to bail out on errors. 327637ff1b0dSMarcin Rokicki * Allow the driver to have influence over that. 327737ff1b0dSMarcin Rokicki */ 32785e3dd157SKalle Valo #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 32795e3dd157SKalle Valo 328060e1d0fbSCarl Huang /* Use random MAC address for TA for Probe Request frame and add 328160e1d0fbSCarl Huang * OUI specified by WMI_SCAN_PROB_REQ_OUI_CMDID to the Probe Request frame. 328260e1d0fbSCarl Huang * if OUI is not set by WMI_SCAN_PROB_REQ_OUI_CMDID then the flag is ignored. 328360e1d0fbSCarl Huang */ 328460e1d0fbSCarl Huang #define WMI_SCAN_ADD_SPOOFED_MAC_IN_PROBE_REQ 0x1000 328560e1d0fbSCarl Huang 32865e3dd157SKalle Valo /* WMI_SCAN_CLASS_MASK must be the same value as IEEE80211_SCAN_CLASS_MASK */ 32875e3dd157SKalle Valo #define WMI_SCAN_CLASS_MASK 0xFF000000 32885e3dd157SKalle Valo 32895e3dd157SKalle Valo enum wmi_stop_scan_type { 32905e3dd157SKalle Valo WMI_SCAN_STOP_ONE = 0x00000000, /* stop by scan_id */ 32915e3dd157SKalle Valo WMI_SCAN_STOP_VDEV_ALL = 0x01000000, /* stop by vdev_id */ 32925e3dd157SKalle Valo WMI_SCAN_STOP_ALL = 0x04000000, /* stop all scans */ 32935e3dd157SKalle Valo }; 32945e3dd157SKalle Valo 32955e3dd157SKalle Valo struct wmi_stop_scan_cmd { 32965e3dd157SKalle Valo __le32 scan_req_id; 32975e3dd157SKalle Valo __le32 scan_id; 32985e3dd157SKalle Valo __le32 req_type; 32995e3dd157SKalle Valo __le32 vdev_id; 33005e3dd157SKalle Valo } __packed; 33015e3dd157SKalle Valo 33025e3dd157SKalle Valo struct wmi_stop_scan_arg { 33035e3dd157SKalle Valo u32 req_id; 33045e3dd157SKalle Valo enum wmi_stop_scan_type req_type; 33055e3dd157SKalle Valo union { 33065e3dd157SKalle Valo u32 scan_id; 33075e3dd157SKalle Valo u32 vdev_id; 33085e3dd157SKalle Valo } u; 33095e3dd157SKalle Valo }; 33105e3dd157SKalle Valo 33115e3dd157SKalle Valo struct wmi_scan_chan_list_cmd { 33125e3dd157SKalle Valo __le32 num_scan_chans; 33135e3dd157SKalle Valo struct wmi_channel chan_info[0]; 33145e3dd157SKalle Valo } __packed; 33155e3dd157SKalle Valo 33165e3dd157SKalle Valo struct wmi_scan_chan_list_arg { 33175e3dd157SKalle Valo u32 n_channels; 33185e3dd157SKalle Valo struct wmi_channel_arg *channels; 33195e3dd157SKalle Valo }; 33205e3dd157SKalle Valo 33215e3dd157SKalle Valo enum wmi_bss_filter { 33225e3dd157SKalle Valo WMI_BSS_FILTER_NONE = 0, /* no beacons forwarded */ 33235e3dd157SKalle Valo WMI_BSS_FILTER_ALL, /* all beacons forwarded */ 33245e3dd157SKalle Valo WMI_BSS_FILTER_PROFILE, /* only beacons matching profile */ 33255e3dd157SKalle Valo WMI_BSS_FILTER_ALL_BUT_PROFILE, /* all but beacons matching profile */ 33265e3dd157SKalle Valo WMI_BSS_FILTER_CURRENT_BSS, /* only beacons matching current BSS */ 33275e3dd157SKalle Valo WMI_BSS_FILTER_ALL_BUT_BSS, /* all but beacons matching BSS */ 33285e3dd157SKalle Valo WMI_BSS_FILTER_PROBED_SSID, /* beacons matching probed ssid */ 33295e3dd157SKalle Valo WMI_BSS_FILTER_LAST_BSS, /* marker only */ 33305e3dd157SKalle Valo }; 33315e3dd157SKalle Valo 33325e3dd157SKalle Valo enum wmi_scan_event_type { 3333b2297baaSRaja Mani WMI_SCAN_EVENT_STARTED = BIT(0), 3334b2297baaSRaja Mani WMI_SCAN_EVENT_COMPLETED = BIT(1), 3335b2297baaSRaja Mani WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 3336b2297baaSRaja Mani WMI_SCAN_EVENT_FOREIGN_CHANNEL = BIT(3), 3337b2297baaSRaja Mani WMI_SCAN_EVENT_DEQUEUED = BIT(4), 3338b2297baaSRaja Mani /* possibly by high-prio scan */ 3339b2297baaSRaja Mani WMI_SCAN_EVENT_PREEMPTED = BIT(5), 3340b2297baaSRaja Mani WMI_SCAN_EVENT_START_FAILED = BIT(6), 3341b2297baaSRaja Mani WMI_SCAN_EVENT_RESTARTED = BIT(7), 3342b2297baaSRaja Mani WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8), 3343b2297baaSRaja Mani WMI_SCAN_EVENT_MAX = BIT(15), 33445e3dd157SKalle Valo }; 33455e3dd157SKalle Valo 33465e3dd157SKalle Valo enum wmi_scan_completion_reason { 33475e3dd157SKalle Valo WMI_SCAN_REASON_COMPLETED, 33485e3dd157SKalle Valo WMI_SCAN_REASON_CANCELLED, 33495e3dd157SKalle Valo WMI_SCAN_REASON_PREEMPTED, 33505e3dd157SKalle Valo WMI_SCAN_REASON_TIMEDOUT, 3351b2297baaSRaja Mani WMI_SCAN_REASON_INTERNAL_FAILURE, 33525e3dd157SKalle Valo WMI_SCAN_REASON_MAX, 33535e3dd157SKalle Valo }; 33545e3dd157SKalle Valo 33555e3dd157SKalle Valo struct wmi_scan_event { 33565e3dd157SKalle Valo __le32 event_type; /* %WMI_SCAN_EVENT_ */ 33575e3dd157SKalle Valo __le32 reason; /* %WMI_SCAN_REASON_ */ 33585e3dd157SKalle Valo __le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 33595e3dd157SKalle Valo __le32 scan_req_id; 33605e3dd157SKalle Valo __le32 scan_id; 33615e3dd157SKalle Valo __le32 vdev_id; 33625e3dd157SKalle Valo } __packed; 33635e3dd157SKalle Valo 33645e3dd157SKalle Valo /* 33655e3dd157SKalle Valo * This defines how much headroom is kept in the 33665e3dd157SKalle Valo * receive frame between the descriptor and the 33675e3dd157SKalle Valo * payload, in order for the WMI PHY error and 33685e3dd157SKalle Valo * management handler to insert header contents. 33695e3dd157SKalle Valo * 33705e3dd157SKalle Valo * This is in bytes. 33715e3dd157SKalle Valo */ 33725e3dd157SKalle Valo #define WMI_MGMT_RX_HDR_HEADROOM 52 33735e3dd157SKalle Valo 33745e3dd157SKalle Valo /* 33755e3dd157SKalle Valo * This event will be used for sending scan results 33765e3dd157SKalle Valo * as well as rx mgmt frames to the host. The rx buffer 33775e3dd157SKalle Valo * will be sent as part of this WMI event. It would be a 33785e3dd157SKalle Valo * good idea to pass all the fields in the RX status 33795e3dd157SKalle Valo * descriptor up to the host. 33805e3dd157SKalle Valo */ 33810d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v1 { 33825e3dd157SKalle Valo __le32 channel; 33835e3dd157SKalle Valo __le32 snr; 33845e3dd157SKalle Valo __le32 rate; 33855e3dd157SKalle Valo __le32 phy_mode; 33865e3dd157SKalle Valo __le32 buf_len; 33875e3dd157SKalle Valo __le32 status; /* %WMI_RX_STATUS_ */ 33885e3dd157SKalle Valo } __packed; 33895e3dd157SKalle Valo 33900d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v2 { 33910d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v1 v1; 33920d9b0438SMichal Kazior __le32 rssi_ctl[4]; 33930d9b0438SMichal Kazior } __packed; 33940d9b0438SMichal Kazior 33950d9b0438SMichal Kazior struct wmi_mgmt_rx_event_v1 { 33960d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v1 hdr; 33970d9b0438SMichal Kazior u8 buf[0]; 33980d9b0438SMichal Kazior } __packed; 33990d9b0438SMichal Kazior 34000d9b0438SMichal Kazior struct wmi_mgmt_rx_event_v2 { 34010d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v2 hdr; 34025e3dd157SKalle Valo u8 buf[0]; 34035e3dd157SKalle Valo } __packed; 34045e3dd157SKalle Valo 34051c092961SRaja Mani struct wmi_10_4_mgmt_rx_hdr { 34061c092961SRaja Mani __le32 channel; 34071c092961SRaja Mani __le32 snr; 34081c092961SRaja Mani u8 rssi_ctl[4]; 34091c092961SRaja Mani __le32 rate; 34101c092961SRaja Mani __le32 phy_mode; 34111c092961SRaja Mani __le32 buf_len; 34121c092961SRaja Mani __le32 status; 34131c092961SRaja Mani } __packed; 34141c092961SRaja Mani 34151c092961SRaja Mani struct wmi_10_4_mgmt_rx_event { 34161c092961SRaja Mani struct wmi_10_4_mgmt_rx_hdr hdr; 34171c092961SRaja Mani u8 buf[0]; 34181c092961SRaja Mani } __packed; 34191c092961SRaja Mani 34208d130963SPeter Oh struct wmi_mgmt_rx_ext_info { 34218d130963SPeter Oh __le64 rx_mac_timestamp; 34228d130963SPeter Oh } __packed __aligned(4); 34238d130963SPeter Oh 34245e3dd157SKalle Valo #define WMI_RX_STATUS_OK 0x00 34255e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_CRC 0x01 34265e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_DECRYPT 0x08 34275e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_MIC 0x10 34285e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 34298d130963SPeter Oh /* Extension data at the end of mgmt frame */ 34308d130963SPeter Oh #define WMI_RX_STATUS_EXT_INFO 0x40 34315e3dd157SKalle Valo 3432991adf71SRaja Mani #define PHY_ERROR_GEN_SPECTRAL_SCAN 0x26 3433991adf71SRaja Mani #define PHY_ERROR_GEN_FALSE_RADAR_EXT 0x24 3434991adf71SRaja Mani #define PHY_ERROR_GEN_RADAR 0x05 3435991adf71SRaja Mani 34362b0a2e0dSRaja Mani #define PHY_ERROR_10_4_RADAR_MASK 0x4 34372b0a2e0dSRaja Mani #define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK 0x4000000 34382b0a2e0dSRaja Mani 3439991adf71SRaja Mani enum phy_err_type { 3440991adf71SRaja Mani PHY_ERROR_UNKNOWN, 3441991adf71SRaja Mani PHY_ERROR_SPECTRAL_SCAN, 3442991adf71SRaja Mani PHY_ERROR_FALSE_RADAR_EXT, 3443991adf71SRaja Mani PHY_ERROR_RADAR 3444991adf71SRaja Mani }; 34459702c686SJanusz Dziedzic 34462332d0aeSMichal Kazior struct wmi_phyerr { 34475e3dd157SKalle Valo __le32 tsf_timestamp; 34485e3dd157SKalle Valo __le16 freq1; 34495e3dd157SKalle Valo __le16 freq2; 34505e3dd157SKalle Valo u8 rssi_combined; 34515e3dd157SKalle Valo u8 chan_width_mhz; 34525e3dd157SKalle Valo u8 phy_err_code; 34535e3dd157SKalle Valo u8 rsvd0; 34542332d0aeSMichal Kazior __le32 rssi_chains[4]; 34552332d0aeSMichal Kazior __le16 nf_chains[4]; 34565e3dd157SKalle Valo __le32 buf_len; 34572332d0aeSMichal Kazior u8 buf[0]; 34585e3dd157SKalle Valo } __packed; 34595e3dd157SKalle Valo 34602332d0aeSMichal Kazior struct wmi_phyerr_event { 34612332d0aeSMichal Kazior __le32 num_phyerrs; 34625e3dd157SKalle Valo __le32 tsf_l32; 34635e3dd157SKalle Valo __le32 tsf_u32; 34642332d0aeSMichal Kazior struct wmi_phyerr phyerrs[0]; 34655e3dd157SKalle Valo } __packed; 34665e3dd157SKalle Valo 34672b0a2e0dSRaja Mani struct wmi_10_4_phyerr_event { 34682b0a2e0dSRaja Mani __le32 tsf_l32; 34692b0a2e0dSRaja Mani __le32 tsf_u32; 34702b0a2e0dSRaja Mani __le16 freq1; 34712b0a2e0dSRaja Mani __le16 freq2; 34722b0a2e0dSRaja Mani u8 rssi_combined; 34732b0a2e0dSRaja Mani u8 chan_width_mhz; 34742b0a2e0dSRaja Mani u8 phy_err_code; 34752b0a2e0dSRaja Mani u8 rsvd0; 34762b0a2e0dSRaja Mani __le32 rssi_chains[4]; 34772b0a2e0dSRaja Mani __le16 nf_chains[4]; 34782b0a2e0dSRaja Mani __le32 phy_err_mask[2]; 34792b0a2e0dSRaja Mani __le32 tsf_timestamp; 34802b0a2e0dSRaja Mani __le32 buf_len; 34812b0a2e0dSRaja Mani u8 buf[0]; 34822b0a2e0dSRaja Mani } __packed; 34832b0a2e0dSRaja Mani 34846f6eb1bcSSriram R struct wmi_radar_found_info { 34856f6eb1bcSSriram R __le32 pri_min; 34866f6eb1bcSSriram R __le32 pri_max; 34876f6eb1bcSSriram R __le32 width_min; 34886f6eb1bcSSriram R __le32 width_max; 34896f6eb1bcSSriram R __le32 sidx_min; 34906f6eb1bcSSriram R __le32 sidx_max; 34916f6eb1bcSSriram R } __packed; 34926f6eb1bcSSriram R 34936f6eb1bcSSriram R enum wmi_radar_confirmation_status { 34946f6eb1bcSSriram R /* Detected radar was due to SW pulses */ 34956f6eb1bcSSriram R WMI_SW_RADAR_DETECTED = 0, 34966f6eb1bcSSriram R 34976f6eb1bcSSriram R WMI_RADAR_DETECTION_FAIL = 1, 34986f6eb1bcSSriram R 34996f6eb1bcSSriram R /* Real radar detected */ 35006f6eb1bcSSriram R WMI_HW_RADAR_DETECTED = 2, 35016f6eb1bcSSriram R }; 35026f6eb1bcSSriram R 35039702c686SJanusz Dziedzic #define PHYERR_TLV_SIG 0xBB 35049702c686SJanusz Dziedzic #define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB 35059702c686SJanusz Dziedzic #define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8 3506855aed12SSimon Wunderlich #define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT 0xF9 35079702c686SJanusz Dziedzic 35089702c686SJanusz Dziedzic struct phyerr_radar_report { 35099702c686SJanusz Dziedzic __le32 reg0; /* RADAR_REPORT_REG0_* */ 35100a7d88e4SMohammed Shafi Shajakhan __le32 reg1; /* RADAR_REPORT_REG1_* */ 35119702c686SJanusz Dziedzic } __packed; 35129702c686SJanusz Dziedzic 35139702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000 35149702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31 35159702c686SJanusz Dziedzic 35169702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000 35179702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30 35189702c686SJanusz Dziedzic 35199702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000 35209702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20 35219702c686SJanusz Dziedzic 35229702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000 35239702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16 35249702c686SJanusz Dziedzic 35259702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00 35269702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10 35279702c686SJanusz Dziedzic 35289702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF 35299702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0 35309702c686SJanusz Dziedzic 35319702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000 35329702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31 35339702c686SJanusz Dziedzic 35349702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000 35359702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24 35369702c686SJanusz Dziedzic 35379702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000 35389702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16 35399702c686SJanusz Dziedzic 35409702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00 35419702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8 35429702c686SJanusz Dziedzic 35439702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF 35449702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_DUR_LSB 0 35459702c686SJanusz Dziedzic 35469702c686SJanusz Dziedzic struct phyerr_fft_report { 35479702c686SJanusz Dziedzic __le32 reg0; /* SEARCH_FFT_REPORT_REG0_ * */ 35489702c686SJanusz Dziedzic __le32 reg1; /* SEARCH_FFT_REPORT_REG1_ * */ 35499702c686SJanusz Dziedzic } __packed; 35509702c686SJanusz Dziedzic 35519702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000 35529702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23 35539702c686SJanusz Dziedzic 35549702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000 35559702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14 35569702c686SJanusz Dziedzic 35579702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000 35589702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12 35599702c686SJanusz Dziedzic 35609702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF 35619702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0 35629702c686SJanusz Dziedzic 35639702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000 35649702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26 35659702c686SJanusz Dziedzic 35669702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000 35679702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18 35689702c686SJanusz Dziedzic 35699702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00 35709702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8 35719702c686SJanusz Dziedzic 35729702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF 35739702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0 35749702c686SJanusz Dziedzic 35759702c686SJanusz Dziedzic struct phyerr_tlv { 35769702c686SJanusz Dziedzic __le16 len; 35779702c686SJanusz Dziedzic u8 tag; 35789702c686SJanusz Dziedzic u8 sig; 35799702c686SJanusz Dziedzic } __packed; 35809702c686SJanusz Dziedzic 35819702c686SJanusz Dziedzic #define DFS_RSSI_POSSIBLY_FALSE 50 35829702c686SJanusz Dziedzic #define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40 35839702c686SJanusz Dziedzic 35845e3dd157SKalle Valo struct wmi_mgmt_tx_hdr { 35855e3dd157SKalle Valo __le32 vdev_id; 35865e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 35875e3dd157SKalle Valo __le32 tx_rate; 35885e3dd157SKalle Valo __le32 tx_power; 35895e3dd157SKalle Valo __le32 buf_len; 35905e3dd157SKalle Valo } __packed; 35915e3dd157SKalle Valo 35925e3dd157SKalle Valo struct wmi_mgmt_tx_cmd { 35935e3dd157SKalle Valo struct wmi_mgmt_tx_hdr hdr; 35945e3dd157SKalle Valo u8 buf[0]; 35955e3dd157SKalle Valo } __packed; 35965e3dd157SKalle Valo 35975e3dd157SKalle Valo struct wmi_echo_event { 35985e3dd157SKalle Valo __le32 value; 35995e3dd157SKalle Valo } __packed; 36005e3dd157SKalle Valo 36015e3dd157SKalle Valo struct wmi_echo_cmd { 36025e3dd157SKalle Valo __le32 value; 36035e3dd157SKalle Valo } __packed; 36045e3dd157SKalle Valo 36055e3dd157SKalle Valo struct wmi_pdev_set_regdomain_cmd { 36065e3dd157SKalle Valo __le32 reg_domain; 36075e3dd157SKalle Valo __le32 reg_domain_2G; 36085e3dd157SKalle Valo __le32 reg_domain_5G; 36095e3dd157SKalle Valo __le32 conformance_test_limit_2G; 36105e3dd157SKalle Valo __le32 conformance_test_limit_5G; 36115e3dd157SKalle Valo } __packed; 36125e3dd157SKalle Valo 3613821af6aeSMarek Puzyniak enum wmi_dfs_region { 3614821af6aeSMarek Puzyniak /* Uninitialized dfs domain */ 3615821af6aeSMarek Puzyniak WMI_UNINIT_DFS_DOMAIN = 0, 3616821af6aeSMarek Puzyniak 3617821af6aeSMarek Puzyniak /* FCC3 dfs domain */ 3618821af6aeSMarek Puzyniak WMI_FCC_DFS_DOMAIN = 1, 3619821af6aeSMarek Puzyniak 3620821af6aeSMarek Puzyniak /* ETSI dfs domain */ 3621821af6aeSMarek Puzyniak WMI_ETSI_DFS_DOMAIN = 2, 3622821af6aeSMarek Puzyniak 3623821af6aeSMarek Puzyniak /*Japan dfs domain */ 3624821af6aeSMarek Puzyniak WMI_MKK4_DFS_DOMAIN = 3, 3625821af6aeSMarek Puzyniak }; 3626821af6aeSMarek Puzyniak 3627821af6aeSMarek Puzyniak struct wmi_pdev_set_regdomain_cmd_10x { 3628821af6aeSMarek Puzyniak __le32 reg_domain; 3629821af6aeSMarek Puzyniak __le32 reg_domain_2G; 3630821af6aeSMarek Puzyniak __le32 reg_domain_5G; 3631821af6aeSMarek Puzyniak __le32 conformance_test_limit_2G; 3632821af6aeSMarek Puzyniak __le32 conformance_test_limit_5G; 3633821af6aeSMarek Puzyniak 3634821af6aeSMarek Puzyniak /* dfs domain from wmi_dfs_region */ 3635821af6aeSMarek Puzyniak __le32 dfs_domain; 3636821af6aeSMarek Puzyniak } __packed; 3637821af6aeSMarek Puzyniak 36385e3dd157SKalle Valo /* Command to set/unset chip in quiet mode */ 36395e3dd157SKalle Valo struct wmi_pdev_set_quiet_cmd { 36405e3dd157SKalle Valo /* period in TUs */ 36415e3dd157SKalle Valo __le32 period; 36425e3dd157SKalle Valo 36435e3dd157SKalle Valo /* duration in TUs */ 36445e3dd157SKalle Valo __le32 duration; 36455e3dd157SKalle Valo 36465e3dd157SKalle Valo /* offset in TUs */ 36475e3dd157SKalle Valo __le32 next_start; 36485e3dd157SKalle Valo 36495e3dd157SKalle Valo /* enable/disable */ 36505e3dd157SKalle Valo __le32 enabled; 36515e3dd157SKalle Valo } __packed; 36525e3dd157SKalle Valo 36535e3dd157SKalle Valo /* 36545e3dd157SKalle Valo * 802.11g protection mode. 36555e3dd157SKalle Valo */ 36565e3dd157SKalle Valo enum ath10k_protmode { 36575e3dd157SKalle Valo ATH10K_PROT_NONE = 0, /* no protection */ 36585e3dd157SKalle Valo ATH10K_PROT_CTSONLY = 1, /* CTS to self */ 36595e3dd157SKalle Valo ATH10K_PROT_RTSCTS = 2, /* RTS-CTS */ 36605e3dd157SKalle Valo }; 36615e3dd157SKalle Valo 3662e81bd104SMarek Kwaczynski enum wmi_rtscts_profile { 3663e81bd104SMarek Kwaczynski WMI_RTSCTS_FOR_NO_RATESERIES = 0, 3664e81bd104SMarek Kwaczynski WMI_RTSCTS_FOR_SECOND_RATESERIES, 3665e81bd104SMarek Kwaczynski WMI_RTSCTS_ACROSS_SW_RETRIES 3666e81bd104SMarek Kwaczynski }; 3667e81bd104SMarek Kwaczynski 3668e81bd104SMarek Kwaczynski #define WMI_RTSCTS_ENABLED 1 3669e81bd104SMarek Kwaczynski #define WMI_RTSCTS_SET_MASK 0x0f 3670e81bd104SMarek Kwaczynski #define WMI_RTSCTS_SET_LSB 0 3671e81bd104SMarek Kwaczynski 3672e81bd104SMarek Kwaczynski #define WMI_RTSCTS_PROFILE_MASK 0xf0 3673e81bd104SMarek Kwaczynski #define WMI_RTSCTS_PROFILE_LSB 4 3674e81bd104SMarek Kwaczynski 36755e3dd157SKalle Valo enum wmi_beacon_gen_mode { 36765e3dd157SKalle Valo WMI_BEACON_STAGGERED_MODE = 0, 36775e3dd157SKalle Valo WMI_BEACON_BURST_MODE = 1 36785e3dd157SKalle Valo }; 36795e3dd157SKalle Valo 36805e3dd157SKalle Valo enum wmi_csa_event_ies_present_flag { 36815e3dd157SKalle Valo WMI_CSA_IE_PRESENT = 0x00000001, 36825e3dd157SKalle Valo WMI_XCSA_IE_PRESENT = 0x00000002, 36835e3dd157SKalle Valo WMI_WBW_IE_PRESENT = 0x00000004, 36845e3dd157SKalle Valo WMI_CSWARP_IE_PRESENT = 0x00000008, 36855e3dd157SKalle Valo }; 36865e3dd157SKalle Valo 36875e3dd157SKalle Valo /* wmi CSA receive event from beacon frame */ 36885e3dd157SKalle Valo struct wmi_csa_event { 36895e3dd157SKalle Valo __le32 i_fc_dur; 36905e3dd157SKalle Valo /* Bit 0-15: FC */ 36915e3dd157SKalle Valo /* Bit 16-31: DUR */ 36925e3dd157SKalle Valo struct wmi_mac_addr i_addr1; 36935e3dd157SKalle Valo struct wmi_mac_addr i_addr2; 36945e3dd157SKalle Valo __le32 csa_ie[2]; 36955e3dd157SKalle Valo __le32 xcsa_ie[2]; 36965e3dd157SKalle Valo __le32 wb_ie[2]; 36975e3dd157SKalle Valo __le32 cswarp_ie; 36985e3dd157SKalle Valo __le32 ies_present_flag; /* wmi_csa_event_ies_present_flag */ 36995e3dd157SKalle Valo } __packed; 37005e3dd157SKalle Valo 37015e3dd157SKalle Valo /* the definition of different PDEV parameters */ 37025e3dd157SKalle Valo #define PDEV_DEFAULT_STATS_UPDATE_PERIOD 500 37035e3dd157SKalle Valo #define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500 37045e3dd157SKalle Valo #define PEER_DEFAULT_STATS_UPDATE_PERIOD 500 37055e3dd157SKalle Valo 3706226a339bSBartosz Markowski struct wmi_pdev_param_map { 3707226a339bSBartosz Markowski u32 tx_chain_mask; 3708226a339bSBartosz Markowski u32 rx_chain_mask; 3709226a339bSBartosz Markowski u32 txpower_limit2g; 3710226a339bSBartosz Markowski u32 txpower_limit5g; 3711226a339bSBartosz Markowski u32 txpower_scale; 3712226a339bSBartosz Markowski u32 beacon_gen_mode; 3713226a339bSBartosz Markowski u32 beacon_tx_mode; 3714226a339bSBartosz Markowski u32 resmgr_offchan_mode; 3715226a339bSBartosz Markowski u32 protection_mode; 3716226a339bSBartosz Markowski u32 dynamic_bw; 3717226a339bSBartosz Markowski u32 non_agg_sw_retry_th; 3718226a339bSBartosz Markowski u32 agg_sw_retry_th; 3719226a339bSBartosz Markowski u32 sta_kickout_th; 3720226a339bSBartosz Markowski u32 ac_aggrsize_scaling; 3721226a339bSBartosz Markowski u32 ltr_enable; 3722226a339bSBartosz Markowski u32 ltr_ac_latency_be; 3723226a339bSBartosz Markowski u32 ltr_ac_latency_bk; 3724226a339bSBartosz Markowski u32 ltr_ac_latency_vi; 3725226a339bSBartosz Markowski u32 ltr_ac_latency_vo; 3726226a339bSBartosz Markowski u32 ltr_ac_latency_timeout; 3727226a339bSBartosz Markowski u32 ltr_sleep_override; 3728226a339bSBartosz Markowski u32 ltr_rx_override; 3729226a339bSBartosz Markowski u32 ltr_tx_activity_timeout; 3730226a339bSBartosz Markowski u32 l1ss_enable; 3731226a339bSBartosz Markowski u32 dsleep_enable; 3732226a339bSBartosz Markowski u32 pcielp_txbuf_flush; 3733226a339bSBartosz Markowski u32 pcielp_txbuf_watermark; 3734226a339bSBartosz Markowski u32 pcielp_txbuf_tmo_en; 3735226a339bSBartosz Markowski u32 pcielp_txbuf_tmo_value; 3736226a339bSBartosz Markowski u32 pdev_stats_update_period; 3737226a339bSBartosz Markowski u32 vdev_stats_update_period; 3738226a339bSBartosz Markowski u32 peer_stats_update_period; 3739226a339bSBartosz Markowski u32 bcnflt_stats_update_period; 3740226a339bSBartosz Markowski u32 pmf_qos; 3741226a339bSBartosz Markowski u32 arp_ac_override; 3742226a339bSBartosz Markowski u32 dcs; 3743226a339bSBartosz Markowski u32 ani_enable; 3744226a339bSBartosz Markowski u32 ani_poll_period; 3745226a339bSBartosz Markowski u32 ani_listen_period; 3746226a339bSBartosz Markowski u32 ani_ofdm_level; 3747226a339bSBartosz Markowski u32 ani_cck_level; 3748226a339bSBartosz Markowski u32 dyntxchain; 3749226a339bSBartosz Markowski u32 proxy_sta; 3750226a339bSBartosz Markowski u32 idle_ps_config; 3751226a339bSBartosz Markowski u32 power_gating_sleep; 3752226a339bSBartosz Markowski u32 fast_channel_reset; 3753226a339bSBartosz Markowski u32 burst_dur; 3754226a339bSBartosz Markowski u32 burst_enable; 3755a7bd3e99SPeter Oh u32 cal_period; 3756d86561ffSRaja Mani u32 aggr_burst; 3757d86561ffSRaja Mani u32 rx_decap_mode; 3758d86561ffSRaja Mani u32 smart_antenna_default_antenna; 3759d86561ffSRaja Mani u32 igmpmld_override; 3760d86561ffSRaja Mani u32 igmpmld_tid; 3761d86561ffSRaja Mani u32 antenna_gain; 3762d86561ffSRaja Mani u32 rx_filter; 3763d86561ffSRaja Mani u32 set_mcast_to_ucast_tid; 3764d86561ffSRaja Mani u32 proxy_sta_mode; 3765d86561ffSRaja Mani u32 set_mcast2ucast_mode; 3766d86561ffSRaja Mani u32 set_mcast2ucast_buffer; 3767d86561ffSRaja Mani u32 remove_mcast2ucast_buffer; 3768d86561ffSRaja Mani u32 peer_sta_ps_statechg_enable; 3769d86561ffSRaja Mani u32 igmpmld_ac_override; 3770d86561ffSRaja Mani u32 block_interbss; 3771d86561ffSRaja Mani u32 set_disable_reset_cmdid; 3772d86561ffSRaja Mani u32 set_msdu_ttl_cmdid; 3773d86561ffSRaja Mani u32 set_ppdu_duration_cmdid; 3774d86561ffSRaja Mani u32 txbf_sound_period_cmdid; 3775d86561ffSRaja Mani u32 set_promisc_mode_cmdid; 3776d86561ffSRaja Mani u32 set_burst_mode_cmdid; 3777d86561ffSRaja Mani u32 en_stats; 3778d86561ffSRaja Mani u32 mu_group_policy; 3779d86561ffSRaja Mani u32 noise_detection; 3780d86561ffSRaja Mani u32 noise_threshold; 3781d86561ffSRaja Mani u32 dpd_enable; 3782d86561ffSRaja Mani u32 set_mcast_bcast_echo; 3783d86561ffSRaja Mani u32 atf_strict_sch; 3784d86561ffSRaja Mani u32 atf_sched_duration; 3785d86561ffSRaja Mani u32 ant_plzn; 3786d86561ffSRaja Mani u32 mgmt_retry_limit; 3787d86561ffSRaja Mani u32 sensitivity_level; 3788d86561ffSRaja Mani u32 signed_txpower_2g; 3789d86561ffSRaja Mani u32 signed_txpower_5g; 3790d86561ffSRaja Mani u32 enable_per_tid_amsdu; 3791d86561ffSRaja Mani u32 enable_per_tid_ampdu; 3792d86561ffSRaja Mani u32 cca_threshold; 3793d86561ffSRaja Mani u32 rts_fixed_rate; 3794d86561ffSRaja Mani u32 pdev_reset; 3795d86561ffSRaja Mani u32 wapi_mbssid_offset; 3796d86561ffSRaja Mani u32 arp_srcaddr; 3797d86561ffSRaja Mani u32 arp_dstaddr; 379839136248SRajkumar Manoharan u32 enable_btcoex; 37991382993fSWen Gong u32 rfkill_config; 38001382993fSWen Gong u32 rfkill_enable; 38012289bef2SWen Gong u32 peer_stats_info_enable; 3802226a339bSBartosz Markowski }; 3803226a339bSBartosz Markowski 3804226a339bSBartosz Markowski #define WMI_PDEV_PARAM_UNSUPPORTED 0 3805226a339bSBartosz Markowski 38065e3dd157SKalle Valo enum wmi_pdev_param { 3807d0e0a552SBen Greear /* TX chain mask */ 38085e3dd157SKalle Valo WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 3809d0e0a552SBen Greear /* RX chain mask */ 38105e3dd157SKalle Valo WMI_PDEV_PARAM_RX_CHAIN_MASK, 38115e3dd157SKalle Valo /* TX power limit for 2G Radio */ 38125e3dd157SKalle Valo WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 38135e3dd157SKalle Valo /* TX power limit for 5G Radio */ 38145e3dd157SKalle Valo WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 38155e3dd157SKalle Valo /* TX power scale */ 38165e3dd157SKalle Valo WMI_PDEV_PARAM_TXPOWER_SCALE, 38175e3dd157SKalle Valo /* Beacon generation mode . 0: host, 1: target */ 38185e3dd157SKalle Valo WMI_PDEV_PARAM_BEACON_GEN_MODE, 38195e3dd157SKalle Valo /* Beacon generation mode . 0: staggered 1: bursted */ 38205e3dd157SKalle Valo WMI_PDEV_PARAM_BEACON_TX_MODE, 38215e3dd157SKalle Valo /* 38225e3dd157SKalle Valo * Resource manager off chan mode . 38235e3dd157SKalle Valo * 0: turn off off chan mode. 1: turn on offchan mode 38245e3dd157SKalle Valo */ 38255e3dd157SKalle Valo WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 38265e3dd157SKalle Valo /* 38275e3dd157SKalle Valo * Protection mode: 38285e3dd157SKalle Valo * 0: no protection 1:use CTS-to-self 2: use RTS/CTS 38295e3dd157SKalle Valo */ 38305e3dd157SKalle Valo WMI_PDEV_PARAM_PROTECTION_MODE, 3831c4dd0d01SMichal Kazior /* 3832c4dd0d01SMichal Kazior * Dynamic bandwidth - 0: disable, 1: enable 3833c4dd0d01SMichal Kazior * 3834c4dd0d01SMichal Kazior * When enabled HW rate control tries different bandwidths when 3835c4dd0d01SMichal Kazior * retransmitting frames. 3836c4dd0d01SMichal Kazior */ 38375e3dd157SKalle Valo WMI_PDEV_PARAM_DYNAMIC_BW, 38385e3dd157SKalle Valo /* Non aggregrate/ 11g sw retry threshold.0-disable */ 38395e3dd157SKalle Valo WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 38405e3dd157SKalle Valo /* aggregrate sw retry threshold. 0-disable*/ 38415e3dd157SKalle Valo WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 38425e3dd157SKalle Valo /* Station kickout threshold (non of consecutive failures).0-disable */ 38435e3dd157SKalle Valo WMI_PDEV_PARAM_STA_KICKOUT_TH, 38445e3dd157SKalle Valo /* Aggerate size scaling configuration per AC */ 38455e3dd157SKalle Valo WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 38465e3dd157SKalle Valo /* LTR enable */ 38475e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_ENABLE, 38485e3dd157SKalle Valo /* LTR latency for BE, in us */ 38495e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 38505e3dd157SKalle Valo /* LTR latency for BK, in us */ 38515e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 38525e3dd157SKalle Valo /* LTR latency for VI, in us */ 38535e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 38545e3dd157SKalle Valo /* LTR latency for VO, in us */ 38555e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 38565e3dd157SKalle Valo /* LTR AC latency timeout, in ms */ 38575e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 38585e3dd157SKalle Valo /* LTR platform latency override, in us */ 38595e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 38605e3dd157SKalle Valo /* LTR-RX override, in us */ 38615e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 38625e3dd157SKalle Valo /* Tx activity timeout for LTR, in us */ 38635e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 38645e3dd157SKalle Valo /* L1SS state machine enable */ 38655e3dd157SKalle Valo WMI_PDEV_PARAM_L1SS_ENABLE, 38665e3dd157SKalle Valo /* Deep sleep state machine enable */ 38675e3dd157SKalle Valo WMI_PDEV_PARAM_DSLEEP_ENABLE, 38685e3dd157SKalle Valo /* RX buffering flush enable */ 38695e3dd157SKalle Valo WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 38705e3dd157SKalle Valo /* RX buffering matermark */ 38715e3dd157SKalle Valo WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 38725e3dd157SKalle Valo /* RX buffering timeout enable */ 38735e3dd157SKalle Valo WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 38745e3dd157SKalle Valo /* RX buffering timeout value */ 38755e3dd157SKalle Valo WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 38765e3dd157SKalle Valo /* pdev level stats update period in ms */ 38775e3dd157SKalle Valo WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 38785e3dd157SKalle Valo /* vdev level stats update period in ms */ 38795e3dd157SKalle Valo WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 38805e3dd157SKalle Valo /* peer level stats update period in ms */ 38815e3dd157SKalle Valo WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 38825e3dd157SKalle Valo /* beacon filter status update period */ 38835e3dd157SKalle Valo WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 38845e3dd157SKalle Valo /* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */ 38855e3dd157SKalle Valo WMI_PDEV_PARAM_PMF_QOS, 38865e3dd157SKalle Valo /* Access category on which ARP frames are sent */ 38875e3dd157SKalle Valo WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 38885e3dd157SKalle Valo /* DCS configuration */ 38895e3dd157SKalle Valo WMI_PDEV_PARAM_DCS, 38905e3dd157SKalle Valo /* Enable/Disable ANI on target */ 38915e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_ENABLE, 38925e3dd157SKalle Valo /* configure the ANI polling period */ 38935e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_POLL_PERIOD, 38945e3dd157SKalle Valo /* configure the ANI listening period */ 38955e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 38965e3dd157SKalle Valo /* configure OFDM immunity level */ 38975e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 38985e3dd157SKalle Valo /* configure CCK immunity level */ 38995e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_CCK_LEVEL, 39005e3dd157SKalle Valo /* Enable/Disable CDD for 1x1 STAs in rate control module */ 39015e3dd157SKalle Valo WMI_PDEV_PARAM_DYNTXCHAIN, 39025e3dd157SKalle Valo /* Enable/Disable proxy STA */ 39035e3dd157SKalle Valo WMI_PDEV_PARAM_PROXY_STA, 39045e3dd157SKalle Valo /* Enable/Disable low power state when all VDEVs are inactive/idle. */ 39055e3dd157SKalle Valo WMI_PDEV_PARAM_IDLE_PS_CONFIG, 39065e3dd157SKalle Valo /* Enable/Disable power gating sleep */ 39075e3dd157SKalle Valo WMI_PDEV_PARAM_POWER_GATING_SLEEP, 39085e3dd157SKalle Valo }; 39095e3dd157SKalle Valo 3910226a339bSBartosz Markowski enum wmi_10x_pdev_param { 3911226a339bSBartosz Markowski /* TX chian mask */ 3912226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 3913226a339bSBartosz Markowski /* RX chian mask */ 3914226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, 3915226a339bSBartosz Markowski /* TX power limit for 2G Radio */ 3916226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, 3917226a339bSBartosz Markowski /* TX power limit for 5G Radio */ 3918226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, 3919226a339bSBartosz Markowski /* TX power scale */ 3920226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_TXPOWER_SCALE, 3921226a339bSBartosz Markowski /* Beacon generation mode . 0: host, 1: target */ 3922226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, 3923226a339bSBartosz Markowski /* Beacon generation mode . 0: staggered 1: bursted */ 3924226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BEACON_TX_MODE, 3925226a339bSBartosz Markowski /* 3926226a339bSBartosz Markowski * Resource manager off chan mode . 3927226a339bSBartosz Markowski * 0: turn off off chan mode. 1: turn on offchan mode 3928226a339bSBartosz Markowski */ 3929226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 3930226a339bSBartosz Markowski /* 3931226a339bSBartosz Markowski * Protection mode: 3932226a339bSBartosz Markowski * 0: no protection 1:use CTS-to-self 2: use RTS/CTS 3933226a339bSBartosz Markowski */ 3934226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_PROTECTION_MODE, 3935226a339bSBartosz Markowski /* Dynamic bandwidth 0: disable 1: enable */ 3936226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_DYNAMIC_BW, 3937226a339bSBartosz Markowski /* Non aggregrate/ 11g sw retry threshold.0-disable */ 3938226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 3939226a339bSBartosz Markowski /* aggregrate sw retry threshold. 0-disable*/ 3940226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, 3941226a339bSBartosz Markowski /* Station kickout threshold (non of consecutive failures).0-disable */ 3942226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, 3943226a339bSBartosz Markowski /* Aggerate size scaling configuration per AC */ 3944226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, 3945226a339bSBartosz Markowski /* LTR enable */ 3946226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_ENABLE, 3947226a339bSBartosz Markowski /* LTR latency for BE, in us */ 3948226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, 3949226a339bSBartosz Markowski /* LTR latency for BK, in us */ 3950226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, 3951226a339bSBartosz Markowski /* LTR latency for VI, in us */ 3952226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, 3953226a339bSBartosz Markowski /* LTR latency for VO, in us */ 3954226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, 3955226a339bSBartosz Markowski /* LTR AC latency timeout, in ms */ 3956226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 3957226a339bSBartosz Markowski /* LTR platform latency override, in us */ 3958226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 3959226a339bSBartosz Markowski /* LTR-RX override, in us */ 3960226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, 3961226a339bSBartosz Markowski /* Tx activity timeout for LTR, in us */ 3962226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 3963226a339bSBartosz Markowski /* L1SS state machine enable */ 3964226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_L1SS_ENABLE, 3965226a339bSBartosz Markowski /* Deep sleep state machine enable */ 3966226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, 3967226a339bSBartosz Markowski /* pdev level stats update period in ms */ 3968226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 3969226a339bSBartosz Markowski /* vdev level stats update period in ms */ 3970226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 3971226a339bSBartosz Markowski /* peer level stats update period in ms */ 3972226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 3973226a339bSBartosz Markowski /* beacon filter status update period */ 3974226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 3975226a339bSBartosz Markowski /* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */ 3976226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_PMF_QOS, 3977226a339bSBartosz Markowski /* Access category on which ARP and DHCP frames are sent */ 3978226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, 3979226a339bSBartosz Markowski /* DCS configuration */ 3980226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_DCS, 3981226a339bSBartosz Markowski /* Enable/Disable ANI on target */ 3982226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_ENABLE, 3983226a339bSBartosz Markowski /* configure the ANI polling period */ 3984226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, 3985226a339bSBartosz Markowski /* configure the ANI listening period */ 3986226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, 3987226a339bSBartosz Markowski /* configure OFDM immunity level */ 3988226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, 3989226a339bSBartosz Markowski /* configure CCK immunity level */ 3990226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, 3991226a339bSBartosz Markowski /* Enable/Disable CDD for 1x1 STAs in rate control module */ 3992226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_DYNTXCHAIN, 3993226a339bSBartosz Markowski /* Enable/Disable Fast channel reset*/ 3994226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, 3995226a339bSBartosz Markowski /* Set Bursting DUR */ 3996226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BURST_DUR, 3997226a339bSBartosz Markowski /* Set Bursting Enable*/ 3998226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BURST_ENABLE, 399924c88f78SMichal Kazior 400024c88f78SMichal Kazior /* following are available as of firmware 10.2 */ 400124c88f78SMichal Kazior WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 400224c88f78SMichal Kazior WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE, 400324c88f78SMichal Kazior WMI_10X_PDEV_PARAM_IGMPMLD_TID, 400424c88f78SMichal Kazior WMI_10X_PDEV_PARAM_ANTENNA_GAIN, 400524c88f78SMichal Kazior WMI_10X_PDEV_PARAM_RX_DECAP_MODE, 400624c88f78SMichal Kazior WMI_10X_PDEV_PARAM_RX_FILTER, 400724c88f78SMichal Kazior WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID, 400824c88f78SMichal Kazior WMI_10X_PDEV_PARAM_PROXY_STA_MODE, 400924c88f78SMichal Kazior WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE, 401024c88f78SMichal Kazior WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 401124c88f78SMichal Kazior WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 4012b43bf97eSPeter Oh WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE, 4013b43bf97eSPeter Oh WMI_10X_PDEV_PARAM_RTS_FIXED_RATE, 4014db251d7dSMaharaja Kennadyrajan WMI_10X_PDEV_PARAM_CAL_PERIOD, 4015db251d7dSMaharaja Kennadyrajan WMI_10X_PDEV_PARAM_ATF_STRICT_SCH, 4016db251d7dSMaharaja Kennadyrajan WMI_10X_PDEV_PARAM_ATF_SCHED_DURATION, 4017db251d7dSMaharaja Kennadyrajan WMI_10X_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 4018db251d7dSMaharaja Kennadyrajan WMI_10X_PDEV_PARAM_PDEV_RESET 4019226a339bSBartosz Markowski }; 4020226a339bSBartosz Markowski 4021d86561ffSRaja Mani enum wmi_10_4_pdev_param { 4022d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 4023d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK, 4024d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G, 4025d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G, 4026d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_TXPOWER_SCALE, 4027d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE, 4028d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_BEACON_TX_MODE, 4029d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 4030d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PROTECTION_MODE, 4031d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_DYNAMIC_BW, 4032d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 4033d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH, 4034d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH, 4035d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING, 4036d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_ENABLE, 4037d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE, 4038d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK, 4039d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI, 4040d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO, 4041d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 4042d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 4043d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE, 4044d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 4045d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_L1SS_ENABLE, 4046d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE, 4047d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 4048d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 4049d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 4050d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 4051d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 4052d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 4053d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 4054d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 4055d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PMF_QOS, 4056d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE, 4057d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_DCS, 4058d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANI_ENABLE, 4059d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD, 4060d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD, 4061d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL, 4062d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL, 4063d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_DYNTXCHAIN, 4064d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PROXY_STA, 4065d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG, 4066d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP, 4067d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_AGGR_BURST, 4068d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_RX_DECAP_MODE, 4069d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET, 4070d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_BURST_DUR, 4071d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_BURST_ENABLE, 4072d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 4073d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE, 4074d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_IGMPMLD_TID, 4075d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANTENNA_GAIN, 4076d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_RX_FILTER, 4077d86561ffSRaja Mani WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID, 4078d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PROXY_STA_MODE, 4079d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE, 4080d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 4081d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 4082d86561ffSRaja Mani WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE, 4083d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 4084d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS, 4085d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 4086d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID, 4087d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 4088d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 4089d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 4090d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID, 4091d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_EN_STATS, 4092d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY, 4093d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_NOISE_DETECTION, 4094d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD, 4095d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_DPD_ENABLE, 4096d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 4097d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH, 4098d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION, 4099d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANT_PLZN, 4100d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT, 4101d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL, 4102d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G, 4103d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G, 4104d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 4105d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 4106d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_CCA_THRESHOLD, 4107d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE, 4108d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_CAL_PERIOD, 4109d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PDEV_RESET, 4110d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET, 4111d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ARP_SRCADDR, 4112d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ARP_DSTADDR, 411352e8ce13SVasanthakumar Thiagarajan WMI_10_4_PDEV_PARAM_TXPOWER_DECR_DB, 411452e8ce13SVasanthakumar Thiagarajan WMI_10_4_PDEV_PARAM_RX_BATCHMODE, 411552e8ce13SVasanthakumar Thiagarajan WMI_10_4_PDEV_PARAM_PACKET_AGGR_DELAY, 411652e8ce13SVasanthakumar Thiagarajan WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 411752e8ce13SVasanthakumar Thiagarajan WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 411852e8ce13SVasanthakumar Thiagarajan WMI_10_4_PDEV_PARAM_CUST_TXPOWER_SCALE, 411939136248SRajkumar Manoharan WMI_10_4_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 412039136248SRajkumar Manoharan WMI_10_4_PDEV_PARAM_ATF_SSID_GROUP_POLICY, 412139136248SRajkumar Manoharan WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX, 4122d86561ffSRaja Mani }; 4123d86561ffSRaja Mani 41245e3dd157SKalle Valo struct wmi_pdev_set_param_cmd { 41255e3dd157SKalle Valo __le32 param_id; 41265e3dd157SKalle Valo __le32 param_value; 41275e3dd157SKalle Valo } __packed; 41285e3dd157SKalle Valo 412905e7ba24SChristian Lamparter struct wmi_pdev_set_base_macaddr_cmd { 413005e7ba24SChristian Lamparter struct wmi_mac_addr mac_addr; 413105e7ba24SChristian Lamparter } __packed; 413205e7ba24SChristian Lamparter 4133a7bd3e99SPeter Oh /* valid period is 1 ~ 60000ms, unit in millisecond */ 4134a7bd3e99SPeter Oh #define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000 4135a7bd3e99SPeter Oh 41365e3dd157SKalle Valo struct wmi_pdev_get_tpc_config_cmd { 41375e3dd157SKalle Valo /* parameter */ 41385e3dd157SKalle Valo __le32 param; 41395e3dd157SKalle Valo } __packed; 41405e3dd157SKalle Valo 414129542666SMaharaja Kennadyrajan #define WMI_TPC_CONFIG_PARAM 1 4142bc64d052SMaharaja Kennadyrajan #define WMI_TPC_FINAL_RATE_MAX 240 41435e3dd157SKalle Valo #define WMI_TPC_TX_N_CHAIN 4 41444b190675STamizh Chelvam #define WMI_TPC_RATE_MAX (WMI_TPC_TX_N_CHAIN * 65) 414529542666SMaharaja Kennadyrajan #define WMI_TPC_PREAM_TABLE_MAX 10 414629542666SMaharaja Kennadyrajan #define WMI_TPC_FLAG 3 414729542666SMaharaja Kennadyrajan #define WMI_TPC_BUF_SIZE 10 4148bc64d052SMaharaja Kennadyrajan #define WMI_TPC_BEAMFORMING 2 414929542666SMaharaja Kennadyrajan 415029542666SMaharaja Kennadyrajan enum wmi_tpc_table_type { 415129542666SMaharaja Kennadyrajan WMI_TPC_TABLE_TYPE_CDD = 0, 415229542666SMaharaja Kennadyrajan WMI_TPC_TABLE_TYPE_STBC = 1, 415329542666SMaharaja Kennadyrajan WMI_TPC_TABLE_TYPE_TXBF = 2, 415429542666SMaharaja Kennadyrajan }; 41555e3dd157SKalle Valo 41565e3dd157SKalle Valo enum wmi_tpc_config_event_flag { 41575e3dd157SKalle Valo WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1, 41585e3dd157SKalle Valo WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2, 41595e3dd157SKalle Valo WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4, 41605e3dd157SKalle Valo }; 41615e3dd157SKalle Valo 41625e3dd157SKalle Valo struct wmi_pdev_tpc_config_event { 41635e3dd157SKalle Valo __le32 reg_domain; 41645e3dd157SKalle Valo __le32 chan_freq; 41655e3dd157SKalle Valo __le32 phy_mode; 41665e3dd157SKalle Valo __le32 twice_antenna_reduction; 41675e3dd157SKalle Valo __le32 twice_max_rd_power; 41683b8fc902SKalle Valo a_sle32 twice_antenna_gain; 41695e3dd157SKalle Valo __le32 power_limit; 41705e3dd157SKalle Valo __le32 rate_max; 41715e3dd157SKalle Valo __le32 num_tx_chain; 41725e3dd157SKalle Valo __le32 ctl; 41735e3dd157SKalle Valo __le32 flags; 41745e3dd157SKalle Valo s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN]; 41755e3dd157SKalle Valo s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN]; 41765e3dd157SKalle Valo s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN]; 41775e3dd157SKalle Valo s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN]; 41785e3dd157SKalle Valo u8 rates_array[WMI_TPC_RATE_MAX]; 41795e3dd157SKalle Valo } __packed; 41805e3dd157SKalle Valo 41815e3dd157SKalle Valo /* Transmit power scale factor. */ 41825e3dd157SKalle Valo enum wmi_tp_scale { 41835e3dd157SKalle Valo WMI_TP_SCALE_MAX = 0, /* no scaling (default) */ 41845e3dd157SKalle Valo WMI_TP_SCALE_50 = 1, /* 50% of max (-3 dBm) */ 41855e3dd157SKalle Valo WMI_TP_SCALE_25 = 2, /* 25% of max (-6 dBm) */ 41865e3dd157SKalle Valo WMI_TP_SCALE_12 = 3, /* 12% of max (-9 dBm) */ 41875e3dd157SKalle Valo WMI_TP_SCALE_MIN = 4, /* min, but still on */ 41885e3dd157SKalle Valo WMI_TP_SCALE_SIZE = 5, /* max num of enum */ 41895e3dd157SKalle Valo }; 41905e3dd157SKalle Valo 4191bc64d052SMaharaja Kennadyrajan struct wmi_pdev_tpc_final_table_event { 4192bc64d052SMaharaja Kennadyrajan __le32 reg_domain; 4193bc64d052SMaharaja Kennadyrajan __le32 chan_freq; 4194bc64d052SMaharaja Kennadyrajan __le32 phy_mode; 4195bc64d052SMaharaja Kennadyrajan __le32 twice_antenna_reduction; 4196bc64d052SMaharaja Kennadyrajan __le32 twice_max_rd_power; 4197bc64d052SMaharaja Kennadyrajan a_sle32 twice_antenna_gain; 4198bc64d052SMaharaja Kennadyrajan __le32 power_limit; 4199bc64d052SMaharaja Kennadyrajan __le32 rate_max; 4200bc64d052SMaharaja Kennadyrajan __le32 num_tx_chain; 4201bc64d052SMaharaja Kennadyrajan __le32 ctl; 4202bc64d052SMaharaja Kennadyrajan __le32 flags; 4203bc64d052SMaharaja Kennadyrajan s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN]; 4204bc64d052SMaharaja Kennadyrajan s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN]; 4205bc64d052SMaharaja Kennadyrajan s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN]; 4206bc64d052SMaharaja Kennadyrajan s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN]; 4207bc64d052SMaharaja Kennadyrajan u8 rates_array[WMI_TPC_FINAL_RATE_MAX]; 4208bc64d052SMaharaja Kennadyrajan u8 ctl_power_table[WMI_TPC_BEAMFORMING][WMI_TPC_TX_N_CHAIN] 4209bc64d052SMaharaja Kennadyrajan [WMI_TPC_TX_N_CHAIN]; 4210bc64d052SMaharaja Kennadyrajan } __packed; 4211bc64d052SMaharaja Kennadyrajan 4212bc64d052SMaharaja Kennadyrajan struct wmi_pdev_get_tpc_table_cmd { 4213bc64d052SMaharaja Kennadyrajan __le32 param; 4214bc64d052SMaharaja Kennadyrajan } __packed; 4215bc64d052SMaharaja Kennadyrajan 4216bc64d052SMaharaja Kennadyrajan enum wmi_tpc_pream_2ghz { 4217bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_2GHZ_CCK = 0, 4218bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_2GHZ_OFDM, 4219bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_2GHZ_HT20, 4220bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_2GHZ_HT40, 4221bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_2GHZ_VHT20, 4222bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_2GHZ_VHT40, 4223bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_2GHZ_VHT80, 4224bc64d052SMaharaja Kennadyrajan }; 4225bc64d052SMaharaja Kennadyrajan 4226bc64d052SMaharaja Kennadyrajan enum wmi_tpc_pream_5ghz { 4227bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_5GHZ_OFDM = 1, 4228bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_5GHZ_HT20, 4229bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_5GHZ_HT40, 4230bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_5GHZ_VHT20, 4231bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_5GHZ_VHT40, 4232bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_5GHZ_VHT80, 4233bc64d052SMaharaja Kennadyrajan WMI_TPC_PREAM_5GHZ_HTCUP, 4234bc64d052SMaharaja Kennadyrajan }; 4235bc64d052SMaharaja Kennadyrajan 4236d70c0d46SMaharaja Kennadyrajan #define WMI_PEER_PS_STATE_DISABLED 2 4237d70c0d46SMaharaja Kennadyrajan 4238d70c0d46SMaharaja Kennadyrajan struct wmi_peer_sta_ps_state_chg_event { 4239d70c0d46SMaharaja Kennadyrajan struct wmi_mac_addr peer_macaddr; 4240d70c0d46SMaharaja Kennadyrajan __le32 peer_ps_state; 4241d70c0d46SMaharaja Kennadyrajan } __packed; 4242d70c0d46SMaharaja Kennadyrajan 42435e3dd157SKalle Valo struct wmi_pdev_chanlist_update_event { 42445e3dd157SKalle Valo /* number of channels */ 42455e3dd157SKalle Valo __le32 num_chan; 42465e3dd157SKalle Valo /* array of channels */ 42475e3dd157SKalle Valo struct wmi_channel channel_list[1]; 42485e3dd157SKalle Valo } __packed; 42495e3dd157SKalle Valo 42505e3dd157SKalle Valo #define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32) 42515e3dd157SKalle Valo 42525e3dd157SKalle Valo struct wmi_debug_mesg_event { 42535e3dd157SKalle Valo /* message buffer, NULL terminated */ 42545e3dd157SKalle Valo char bufp[WMI_MAX_DEBUG_MESG]; 42555e3dd157SKalle Valo } __packed; 42565e3dd157SKalle Valo 42575e3dd157SKalle Valo enum { 42585e3dd157SKalle Valo /* P2P device */ 42595e3dd157SKalle Valo VDEV_SUBTYPE_P2PDEV = 0, 42605e3dd157SKalle Valo /* P2P client */ 42615e3dd157SKalle Valo VDEV_SUBTYPE_P2PCLI, 42625e3dd157SKalle Valo /* P2P GO */ 42635e3dd157SKalle Valo VDEV_SUBTYPE_P2PGO, 42645e3dd157SKalle Valo /* BT3.0 HS */ 42655e3dd157SKalle Valo VDEV_SUBTYPE_BT, 42665e3dd157SKalle Valo }; 42675e3dd157SKalle Valo 42685e3dd157SKalle Valo struct wmi_pdev_set_channel_cmd { 42695e3dd157SKalle Valo /* idnore power , only use flags , mode and freq */ 42705e3dd157SKalle Valo struct wmi_channel chan; 42715e3dd157SKalle Valo } __packed; 42725e3dd157SKalle Valo 427390174455SRajkumar Manoharan struct wmi_pdev_pktlog_enable_cmd { 427490174455SRajkumar Manoharan __le32 ev_bitmap; 427590174455SRajkumar Manoharan } __packed; 427690174455SRajkumar Manoharan 42775e3dd157SKalle Valo /* Customize the DSCP (bit) to TID (0-7) mapping for QOS */ 42785e3dd157SKalle Valo #define WMI_DSCP_MAP_MAX (64) 42795e3dd157SKalle Valo struct wmi_pdev_set_dscp_tid_map_cmd { 42805e3dd157SKalle Valo /* map indicating DSCP to TID conversion */ 42815e3dd157SKalle Valo __le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX]; 42825e3dd157SKalle Valo } __packed; 42835e3dd157SKalle Valo 42845e3dd157SKalle Valo enum mcast_bcast_rate_id { 42855e3dd157SKalle Valo WMI_SET_MCAST_RATE, 42865e3dd157SKalle Valo WMI_SET_BCAST_RATE 42875e3dd157SKalle Valo }; 42885e3dd157SKalle Valo 42895e3dd157SKalle Valo struct mcast_bcast_rate { 42905e3dd157SKalle Valo enum mcast_bcast_rate_id rate_id; 42915e3dd157SKalle Valo __le32 rate; 42925e3dd157SKalle Valo } __packed; 42935e3dd157SKalle Valo 42945e3dd157SKalle Valo struct wmi_wmm_params { 42955e3dd157SKalle Valo __le32 cwmin; 42965e3dd157SKalle Valo __le32 cwmax; 42975e3dd157SKalle Valo __le32 aifs; 42985e3dd157SKalle Valo __le32 txop; 42995e3dd157SKalle Valo __le32 acm; 43005e3dd157SKalle Valo __le32 no_ack; 43015e3dd157SKalle Valo } __packed; 43025e3dd157SKalle Valo 43035e3dd157SKalle Valo struct wmi_pdev_set_wmm_params { 43045e3dd157SKalle Valo struct wmi_wmm_params ac_be; 43055e3dd157SKalle Valo struct wmi_wmm_params ac_bk; 43065e3dd157SKalle Valo struct wmi_wmm_params ac_vi; 43075e3dd157SKalle Valo struct wmi_wmm_params ac_vo; 43085e3dd157SKalle Valo } __packed; 43095e3dd157SKalle Valo 43105e3dd157SKalle Valo struct wmi_wmm_params_arg { 43115e3dd157SKalle Valo u32 cwmin; 43125e3dd157SKalle Valo u32 cwmax; 43135e3dd157SKalle Valo u32 aifs; 43145e3dd157SKalle Valo u32 txop; 43155e3dd157SKalle Valo u32 acm; 43165e3dd157SKalle Valo u32 no_ack; 43175e3dd157SKalle Valo }; 43185e3dd157SKalle Valo 43195e752e42SMichal Kazior struct wmi_wmm_params_all_arg { 43205e3dd157SKalle Valo struct wmi_wmm_params_arg ac_be; 43215e3dd157SKalle Valo struct wmi_wmm_params_arg ac_bk; 43225e3dd157SKalle Valo struct wmi_wmm_params_arg ac_vi; 43235e3dd157SKalle Valo struct wmi_wmm_params_arg ac_vo; 43245e3dd157SKalle Valo }; 43255e3dd157SKalle Valo 4326b91251fbSMichal Kazior struct wmi_pdev_stats_tx { 43275e3dd157SKalle Valo /* Num HTT cookies queued to dispatch list */ 43285e3dd157SKalle Valo __le32 comp_queued; 43295e3dd157SKalle Valo 43305e3dd157SKalle Valo /* Num HTT cookies dispatched */ 43315e3dd157SKalle Valo __le32 comp_delivered; 43325e3dd157SKalle Valo 43335e3dd157SKalle Valo /* Num MSDU queued to WAL */ 43345e3dd157SKalle Valo __le32 msdu_enqued; 43355e3dd157SKalle Valo 43365e3dd157SKalle Valo /* Num MPDU queue to WAL */ 43375e3dd157SKalle Valo __le32 mpdu_enqued; 43385e3dd157SKalle Valo 43395e3dd157SKalle Valo /* Num MSDUs dropped by WMM limit */ 43405e3dd157SKalle Valo __le32 wmm_drop; 43415e3dd157SKalle Valo 43425e3dd157SKalle Valo /* Num Local frames queued */ 43435e3dd157SKalle Valo __le32 local_enqued; 43445e3dd157SKalle Valo 43455e3dd157SKalle Valo /* Num Local frames done */ 43465e3dd157SKalle Valo __le32 local_freed; 43475e3dd157SKalle Valo 43485e3dd157SKalle Valo /* Num queued to HW */ 43495e3dd157SKalle Valo __le32 hw_queued; 43505e3dd157SKalle Valo 43515e3dd157SKalle Valo /* Num PPDU reaped from HW */ 43525e3dd157SKalle Valo __le32 hw_reaped; 43535e3dd157SKalle Valo 43545e3dd157SKalle Valo /* Num underruns */ 43555e3dd157SKalle Valo __le32 underrun; 43565e3dd157SKalle Valo 43575e3dd157SKalle Valo /* Num PPDUs cleaned up in TX abort */ 43585e3dd157SKalle Valo __le32 tx_abort; 43595e3dd157SKalle Valo 43605e3dd157SKalle Valo /* Num MPDUs requed by SW */ 43615e3dd157SKalle Valo __le32 mpdus_requed; 43625e3dd157SKalle Valo 43635e3dd157SKalle Valo /* excessive retries */ 43645e3dd157SKalle Valo __le32 tx_ko; 43655e3dd157SKalle Valo 43665e3dd157SKalle Valo /* data hw rate code */ 43675e3dd157SKalle Valo __le32 data_rc; 43685e3dd157SKalle Valo 43695e3dd157SKalle Valo /* Scheduler self triggers */ 43705e3dd157SKalle Valo __le32 self_triggers; 43715e3dd157SKalle Valo 43725e3dd157SKalle Valo /* frames dropped due to excessive sw retries */ 43735e3dd157SKalle Valo __le32 sw_retry_failure; 43745e3dd157SKalle Valo 43755e3dd157SKalle Valo /* illegal rate phy errors */ 43765e3dd157SKalle Valo __le32 illgl_rate_phy_err; 43775e3dd157SKalle Valo 4378e13dbeadSJoe Perches /* wal pdev continuous xretry */ 43795e3dd157SKalle Valo __le32 pdev_cont_xretry; 43805e3dd157SKalle Valo 43815e3dd157SKalle Valo /* wal pdev continous xretry */ 43825e3dd157SKalle Valo __le32 pdev_tx_timeout; 43835e3dd157SKalle Valo 43845e3dd157SKalle Valo /* wal pdev resets */ 43855e3dd157SKalle Valo __le32 pdev_resets; 43865e3dd157SKalle Valo 438734d714e0SBartosz Markowski /* frames dropped due to non-availability of stateless TIDs */ 438834d714e0SBartosz Markowski __le32 stateless_tid_alloc_failure; 438934d714e0SBartosz Markowski 43905e3dd157SKalle Valo __le32 phy_underrun; 43915e3dd157SKalle Valo 43925e3dd157SKalle Valo /* MPDU is more than txop limit */ 43935e3dd157SKalle Valo __le32 txop_ovf; 43945e3dd157SKalle Valo } __packed; 43955e3dd157SKalle Valo 439698dd2b92SManikanta Pubbisetty struct wmi_10_4_pdev_stats_tx { 439798dd2b92SManikanta Pubbisetty /* Num HTT cookies queued to dispatch list */ 439898dd2b92SManikanta Pubbisetty __le32 comp_queued; 439998dd2b92SManikanta Pubbisetty 440098dd2b92SManikanta Pubbisetty /* Num HTT cookies dispatched */ 440198dd2b92SManikanta Pubbisetty __le32 comp_delivered; 440298dd2b92SManikanta Pubbisetty 440398dd2b92SManikanta Pubbisetty /* Num MSDU queued to WAL */ 440498dd2b92SManikanta Pubbisetty __le32 msdu_enqued; 440598dd2b92SManikanta Pubbisetty 440698dd2b92SManikanta Pubbisetty /* Num MPDU queue to WAL */ 440798dd2b92SManikanta Pubbisetty __le32 mpdu_enqued; 440898dd2b92SManikanta Pubbisetty 440998dd2b92SManikanta Pubbisetty /* Num MSDUs dropped by WMM limit */ 441098dd2b92SManikanta Pubbisetty __le32 wmm_drop; 441198dd2b92SManikanta Pubbisetty 441298dd2b92SManikanta Pubbisetty /* Num Local frames queued */ 441398dd2b92SManikanta Pubbisetty __le32 local_enqued; 441498dd2b92SManikanta Pubbisetty 441598dd2b92SManikanta Pubbisetty /* Num Local frames done */ 441698dd2b92SManikanta Pubbisetty __le32 local_freed; 441798dd2b92SManikanta Pubbisetty 441898dd2b92SManikanta Pubbisetty /* Num queued to HW */ 441998dd2b92SManikanta Pubbisetty __le32 hw_queued; 442098dd2b92SManikanta Pubbisetty 442198dd2b92SManikanta Pubbisetty /* Num PPDU reaped from HW */ 442298dd2b92SManikanta Pubbisetty __le32 hw_reaped; 442398dd2b92SManikanta Pubbisetty 442498dd2b92SManikanta Pubbisetty /* Num underruns */ 442598dd2b92SManikanta Pubbisetty __le32 underrun; 442698dd2b92SManikanta Pubbisetty 442798dd2b92SManikanta Pubbisetty /* HW Paused. */ 442898dd2b92SManikanta Pubbisetty __le32 hw_paused; 442998dd2b92SManikanta Pubbisetty 443098dd2b92SManikanta Pubbisetty /* Num PPDUs cleaned up in TX abort */ 443198dd2b92SManikanta Pubbisetty __le32 tx_abort; 443298dd2b92SManikanta Pubbisetty 443398dd2b92SManikanta Pubbisetty /* Num MPDUs requed by SW */ 443498dd2b92SManikanta Pubbisetty __le32 mpdus_requed; 443598dd2b92SManikanta Pubbisetty 443698dd2b92SManikanta Pubbisetty /* excessive retries */ 443798dd2b92SManikanta Pubbisetty __le32 tx_ko; 443898dd2b92SManikanta Pubbisetty 443998dd2b92SManikanta Pubbisetty /* data hw rate code */ 444098dd2b92SManikanta Pubbisetty __le32 data_rc; 444198dd2b92SManikanta Pubbisetty 444298dd2b92SManikanta Pubbisetty /* Scheduler self triggers */ 444398dd2b92SManikanta Pubbisetty __le32 self_triggers; 444498dd2b92SManikanta Pubbisetty 444598dd2b92SManikanta Pubbisetty /* frames dropped due to excessive sw retries */ 444698dd2b92SManikanta Pubbisetty __le32 sw_retry_failure; 444798dd2b92SManikanta Pubbisetty 444898dd2b92SManikanta Pubbisetty /* illegal rate phy errors */ 444998dd2b92SManikanta Pubbisetty __le32 illgl_rate_phy_err; 445098dd2b92SManikanta Pubbisetty 445198dd2b92SManikanta Pubbisetty /* wal pdev continuous xretry */ 445298dd2b92SManikanta Pubbisetty __le32 pdev_cont_xretry; 445398dd2b92SManikanta Pubbisetty 445498dd2b92SManikanta Pubbisetty /* wal pdev tx timeouts */ 445598dd2b92SManikanta Pubbisetty __le32 pdev_tx_timeout; 445698dd2b92SManikanta Pubbisetty 445798dd2b92SManikanta Pubbisetty /* wal pdev resets */ 445898dd2b92SManikanta Pubbisetty __le32 pdev_resets; 445998dd2b92SManikanta Pubbisetty 446098dd2b92SManikanta Pubbisetty /* frames dropped due to non-availability of stateless TIDs */ 446198dd2b92SManikanta Pubbisetty __le32 stateless_tid_alloc_failure; 446298dd2b92SManikanta Pubbisetty 446398dd2b92SManikanta Pubbisetty __le32 phy_underrun; 446498dd2b92SManikanta Pubbisetty 446598dd2b92SManikanta Pubbisetty /* MPDU is more than txop limit */ 446698dd2b92SManikanta Pubbisetty __le32 txop_ovf; 446798dd2b92SManikanta Pubbisetty 446898dd2b92SManikanta Pubbisetty /* Number of Sequences posted */ 446998dd2b92SManikanta Pubbisetty __le32 seq_posted; 447098dd2b92SManikanta Pubbisetty 447198dd2b92SManikanta Pubbisetty /* Number of Sequences failed queueing */ 447298dd2b92SManikanta Pubbisetty __le32 seq_failed_queueing; 447398dd2b92SManikanta Pubbisetty 447498dd2b92SManikanta Pubbisetty /* Number of Sequences completed */ 447598dd2b92SManikanta Pubbisetty __le32 seq_completed; 447698dd2b92SManikanta Pubbisetty 447798dd2b92SManikanta Pubbisetty /* Number of Sequences restarted */ 447898dd2b92SManikanta Pubbisetty __le32 seq_restarted; 447998dd2b92SManikanta Pubbisetty 448098dd2b92SManikanta Pubbisetty /* Number of MU Sequences posted */ 448198dd2b92SManikanta Pubbisetty __le32 mu_seq_posted; 448298dd2b92SManikanta Pubbisetty 448398dd2b92SManikanta Pubbisetty /* Num MPDUs flushed by SW, HWPAUSED,SW TXABORT(Reset,channel change) */ 448498dd2b92SManikanta Pubbisetty __le32 mpdus_sw_flush; 448598dd2b92SManikanta Pubbisetty 448698dd2b92SManikanta Pubbisetty /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 448798dd2b92SManikanta Pubbisetty __le32 mpdus_hw_filter; 448898dd2b92SManikanta Pubbisetty 448998dd2b92SManikanta Pubbisetty /* Num MPDUs truncated by PDG 449098dd2b92SManikanta Pubbisetty * (TXOP, TBTT, PPDU_duration based on rate, dyn_bw) 449198dd2b92SManikanta Pubbisetty */ 449298dd2b92SManikanta Pubbisetty __le32 mpdus_truncated; 449398dd2b92SManikanta Pubbisetty 449498dd2b92SManikanta Pubbisetty /* Num MPDUs that was tried but didn't receive ACK or BA */ 449598dd2b92SManikanta Pubbisetty __le32 mpdus_ack_failed; 449698dd2b92SManikanta Pubbisetty 449798dd2b92SManikanta Pubbisetty /* Num MPDUs that was dropped due to expiry. */ 449898dd2b92SManikanta Pubbisetty __le32 mpdus_expired; 449998dd2b92SManikanta Pubbisetty } __packed; 450098dd2b92SManikanta Pubbisetty 4501b91251fbSMichal Kazior struct wmi_pdev_stats_rx { 45025e3dd157SKalle Valo /* Cnts any change in ring routing mid-ppdu */ 45035e3dd157SKalle Valo __le32 mid_ppdu_route_change; 45045e3dd157SKalle Valo 45055e3dd157SKalle Valo /* Total number of statuses processed */ 45065e3dd157SKalle Valo __le32 status_rcvd; 45075e3dd157SKalle Valo 45085e3dd157SKalle Valo /* Extra frags on rings 0-3 */ 45095e3dd157SKalle Valo __le32 r0_frags; 45105e3dd157SKalle Valo __le32 r1_frags; 45115e3dd157SKalle Valo __le32 r2_frags; 45125e3dd157SKalle Valo __le32 r3_frags; 45135e3dd157SKalle Valo 45145e3dd157SKalle Valo /* MSDUs / MPDUs delivered to HTT */ 45155e3dd157SKalle Valo __le32 htt_msdus; 45165e3dd157SKalle Valo __le32 htt_mpdus; 45175e3dd157SKalle Valo 45185e3dd157SKalle Valo /* MSDUs / MPDUs delivered to local stack */ 45195e3dd157SKalle Valo __le32 loc_msdus; 45205e3dd157SKalle Valo __le32 loc_mpdus; 45215e3dd157SKalle Valo 45225e3dd157SKalle Valo /* AMSDUs that have more MSDUs than the status ring size */ 45235e3dd157SKalle Valo __le32 oversize_amsdu; 45245e3dd157SKalle Valo 45255e3dd157SKalle Valo /* Number of PHY errors */ 45265e3dd157SKalle Valo __le32 phy_errs; 45275e3dd157SKalle Valo 45285e3dd157SKalle Valo /* Number of PHY errors drops */ 45295e3dd157SKalle Valo __le32 phy_err_drop; 45305e3dd157SKalle Valo 45315e3dd157SKalle Valo /* Number of mpdu errors - FCS, MIC, ENC etc. */ 45325e3dd157SKalle Valo __le32 mpdu_errs; 45335e3dd157SKalle Valo } __packed; 45345e3dd157SKalle Valo 4535b91251fbSMichal Kazior struct wmi_pdev_stats_peer { 45365e3dd157SKalle Valo /* REMOVE THIS ONCE REAL PEER STAT COUNTERS ARE ADDED */ 45375e3dd157SKalle Valo __le32 dummy; 45385e3dd157SKalle Valo } __packed; 45395e3dd157SKalle Valo 45405e3dd157SKalle Valo enum wmi_stats_id { 4541eed55411SMichal Kazior WMI_STAT_PEER = BIT(0), 4542eed55411SMichal Kazior WMI_STAT_AP = BIT(1), 4543eed55411SMichal Kazior WMI_STAT_PDEV = BIT(2), 4544eed55411SMichal Kazior WMI_STAT_VDEV = BIT(3), 4545eed55411SMichal Kazior WMI_STAT_BCNFLT = BIT(4), 4546eed55411SMichal Kazior WMI_STAT_VDEV_RATE = BIT(5), 45475e3dd157SKalle Valo }; 45485e3dd157SKalle Valo 4549f9575793SMohammed Shafi Shajakhan enum wmi_10_4_stats_id { 4550f9575793SMohammed Shafi Shajakhan WMI_10_4_STAT_PEER = BIT(0), 4551f9575793SMohammed Shafi Shajakhan WMI_10_4_STAT_AP = BIT(1), 4552f9575793SMohammed Shafi Shajakhan WMI_10_4_STAT_INST = BIT(2), 4553f9575793SMohammed Shafi Shajakhan WMI_10_4_STAT_PEER_EXTD = BIT(3), 45541b3fdb50SRajkumar Manoharan WMI_10_4_STAT_VDEV_EXTD = BIT(4), 4555f9575793SMohammed Shafi Shajakhan }; 4556f9575793SMohammed Shafi Shajakhan 4557f40a307eSSurabhi Vishnoi enum wmi_tlv_stats_id { 45589280f4fcSSurabhi Vishnoi WMI_TLV_STAT_PEER = BIT(0), 45599280f4fcSSurabhi Vishnoi WMI_TLV_STAT_AP = BIT(1), 45609280f4fcSSurabhi Vishnoi WMI_TLV_STAT_PDEV = BIT(2), 45619280f4fcSSurabhi Vishnoi WMI_TLV_STAT_VDEV = BIT(3), 4562f40a307eSSurabhi Vishnoi WMI_TLV_STAT_PEER_EXTD = BIT(10), 4563f40a307eSSurabhi Vishnoi }; 4564f40a307eSSurabhi Vishnoi 4565db9cdda6SBen Greear struct wlan_inst_rssi_args { 4566db9cdda6SBen Greear __le16 cfg_retry_count; 4567db9cdda6SBen Greear __le16 retry_count; 4568db9cdda6SBen Greear }; 4569db9cdda6SBen Greear 45705e3dd157SKalle Valo struct wmi_request_stats_cmd { 45715e3dd157SKalle Valo __le32 stats_id; 45725e3dd157SKalle Valo 4573db9cdda6SBen Greear __le32 vdev_id; 4574db9cdda6SBen Greear 4575db9cdda6SBen Greear /* peer MAC address */ 4576db9cdda6SBen Greear struct wmi_mac_addr peer_macaddr; 4577db9cdda6SBen Greear 4578db9cdda6SBen Greear /* Instantaneous RSSI arguments */ 4579db9cdda6SBen Greear struct wlan_inst_rssi_args inst_rssi_args; 45805e3dd157SKalle Valo } __packed; 45815e3dd157SKalle Valo 45825e3dd157SKalle Valo /* Suspend option */ 45835e3dd157SKalle Valo enum { 45845e3dd157SKalle Valo /* suspend */ 45855e3dd157SKalle Valo WMI_PDEV_SUSPEND, 45865e3dd157SKalle Valo 45875e3dd157SKalle Valo /* suspend and disable all interrupts */ 45885e3dd157SKalle Valo WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 45895e3dd157SKalle Valo }; 45905e3dd157SKalle Valo 45915e3dd157SKalle Valo struct wmi_pdev_suspend_cmd { 45925e3dd157SKalle Valo /* suspend option sent to target */ 45935e3dd157SKalle Valo __le32 suspend_opt; 45945e3dd157SKalle Valo } __packed; 45955e3dd157SKalle Valo 45965e3dd157SKalle Valo struct wmi_stats_event { 4597eed55411SMichal Kazior __le32 stats_id; /* WMI_STAT_ */ 45985e3dd157SKalle Valo /* 45995e3dd157SKalle Valo * number of pdev stats event structures 46005e3dd157SKalle Valo * (wmi_pdev_stats) 0 or 1 46015e3dd157SKalle Valo */ 46025e3dd157SKalle Valo __le32 num_pdev_stats; 46035e3dd157SKalle Valo /* 46045e3dd157SKalle Valo * number of vdev stats event structures 46055e3dd157SKalle Valo * (wmi_vdev_stats) 0 or max vdevs 46065e3dd157SKalle Valo */ 46075e3dd157SKalle Valo __le32 num_vdev_stats; 46085e3dd157SKalle Valo /* 46095e3dd157SKalle Valo * number of peer stats event structures 46105e3dd157SKalle Valo * (wmi_peer_stats) 0 or max peers 46115e3dd157SKalle Valo */ 46125e3dd157SKalle Valo __le32 num_peer_stats; 46135e3dd157SKalle Valo __le32 num_bcnflt_stats; 46145e3dd157SKalle Valo /* 46155e3dd157SKalle Valo * followed by 46165e3dd157SKalle Valo * num_pdev_stats * size of(struct wmi_pdev_stats) 46175e3dd157SKalle Valo * num_vdev_stats * size of(struct wmi_vdev_stats) 46185e3dd157SKalle Valo * num_peer_stats * size of(struct wmi_peer_stats) 46195e3dd157SKalle Valo * 46205e3dd157SKalle Valo * By having a zero sized array, the pointer to data area 46215e3dd157SKalle Valo * becomes available without increasing the struct size 46225e3dd157SKalle Valo */ 46235e3dd157SKalle Valo u8 data[0]; 46245e3dd157SKalle Valo } __packed; 46255e3dd157SKalle Valo 462620de2229SMichal Kazior struct wmi_10_2_stats_event { 462720de2229SMichal Kazior __le32 stats_id; /* %WMI_REQUEST_ */ 462820de2229SMichal Kazior __le32 num_pdev_stats; 462920de2229SMichal Kazior __le32 num_pdev_ext_stats; 463020de2229SMichal Kazior __le32 num_vdev_stats; 463120de2229SMichal Kazior __le32 num_peer_stats; 463220de2229SMichal Kazior __le32 num_bcnflt_stats; 463320de2229SMichal Kazior u8 data[0]; 463420de2229SMichal Kazior } __packed; 463520de2229SMichal Kazior 46365e3dd157SKalle Valo /* 46375e3dd157SKalle Valo * PDEV statistics 46385e3dd157SKalle Valo * TODO: add all PDEV stats here 46395e3dd157SKalle Valo */ 4640b91251fbSMichal Kazior struct wmi_pdev_stats_base { 4641b91251fbSMichal Kazior __le32 chan_nf; 464215138fdfSBen Greear __le32 tx_frame_count; /* Cycles spent transmitting frames */ 464315138fdfSBen Greear __le32 rx_frame_count; /* Cycles spent receiving frames */ 464415138fdfSBen Greear __le32 rx_clear_count; /* Total channel busy time, evidently */ 464515138fdfSBen Greear __le32 cycle_count; /* Total on-channel time */ 4646b91251fbSMichal Kazior __le32 phy_err_count; 4647b91251fbSMichal Kazior __le32 chan_tx_pwr; 46485e3dd157SKalle Valo } __packed; 46495e3dd157SKalle Valo 4650b91251fbSMichal Kazior struct wmi_pdev_stats { 4651b91251fbSMichal Kazior struct wmi_pdev_stats_base base; 4652b91251fbSMichal Kazior struct wmi_pdev_stats_tx tx; 4653b91251fbSMichal Kazior struct wmi_pdev_stats_rx rx; 4654b91251fbSMichal Kazior struct wmi_pdev_stats_peer peer; 4655b91251fbSMichal Kazior } __packed; 4656b91251fbSMichal Kazior 4657b91251fbSMichal Kazior struct wmi_pdev_stats_extra { 465852e346d1SChun-Yeow Yeoh __le32 ack_rx_bad; 465952e346d1SChun-Yeow Yeoh __le32 rts_bad; 466052e346d1SChun-Yeow Yeoh __le32 rts_good; 466152e346d1SChun-Yeow Yeoh __le32 fcs_bad; 466252e346d1SChun-Yeow Yeoh __le32 no_beacons; 466352e346d1SChun-Yeow Yeoh __le32 mib_int_count; 466452e346d1SChun-Yeow Yeoh } __packed; 466552e346d1SChun-Yeow Yeoh 4666b91251fbSMichal Kazior struct wmi_10x_pdev_stats { 4667b91251fbSMichal Kazior struct wmi_pdev_stats_base base; 4668b91251fbSMichal Kazior struct wmi_pdev_stats_tx tx; 4669b91251fbSMichal Kazior struct wmi_pdev_stats_rx rx; 4670b91251fbSMichal Kazior struct wmi_pdev_stats_peer peer; 4671b91251fbSMichal Kazior struct wmi_pdev_stats_extra extra; 4672b91251fbSMichal Kazior } __packed; 4673b91251fbSMichal Kazior 467420de2229SMichal Kazior struct wmi_pdev_stats_mem { 467520de2229SMichal Kazior __le32 dram_free; 467620de2229SMichal Kazior __le32 iram_free; 467720de2229SMichal Kazior } __packed; 467820de2229SMichal Kazior 467920de2229SMichal Kazior struct wmi_10_2_pdev_stats { 468020de2229SMichal Kazior struct wmi_pdev_stats_base base; 468120de2229SMichal Kazior struct wmi_pdev_stats_tx tx; 468220de2229SMichal Kazior __le32 mc_drop; 468320de2229SMichal Kazior struct wmi_pdev_stats_rx rx; 468420de2229SMichal Kazior __le32 pdev_rx_timeout; 468520de2229SMichal Kazior struct wmi_pdev_stats_mem mem; 468620de2229SMichal Kazior struct wmi_pdev_stats_peer peer; 468720de2229SMichal Kazior struct wmi_pdev_stats_extra extra; 468820de2229SMichal Kazior } __packed; 468920de2229SMichal Kazior 469098dd2b92SManikanta Pubbisetty struct wmi_10_4_pdev_stats { 469198dd2b92SManikanta Pubbisetty struct wmi_pdev_stats_base base; 469298dd2b92SManikanta Pubbisetty struct wmi_10_4_pdev_stats_tx tx; 469398dd2b92SManikanta Pubbisetty struct wmi_pdev_stats_rx rx; 469498dd2b92SManikanta Pubbisetty __le32 rx_ovfl_errs; 469598dd2b92SManikanta Pubbisetty struct wmi_pdev_stats_mem mem; 469698dd2b92SManikanta Pubbisetty __le32 sram_free_size; 469798dd2b92SManikanta Pubbisetty struct wmi_pdev_stats_extra extra; 469898dd2b92SManikanta Pubbisetty } __packed; 469998dd2b92SManikanta Pubbisetty 47005e3dd157SKalle Valo /* 47015e3dd157SKalle Valo * VDEV statistics 47025e3dd157SKalle Valo */ 47031b3fdb50SRajkumar Manoharan 47041b3fdb50SRajkumar Manoharan #define WMI_VDEV_STATS_FTM_COUNT_VALID BIT(31) 47051b3fdb50SRajkumar Manoharan #define WMI_VDEV_STATS_FTM_COUNT_LSB 0 47061b3fdb50SRajkumar Manoharan #define WMI_VDEV_STATS_FTM_COUNT_MASK 0x7fffffff 47071b3fdb50SRajkumar Manoharan 47085e3dd157SKalle Valo struct wmi_vdev_stats { 47095e3dd157SKalle Valo __le32 vdev_id; 47105e3dd157SKalle Valo } __packed; 47115e3dd157SKalle Valo 47121b3fdb50SRajkumar Manoharan struct wmi_vdev_stats_extd { 47131b3fdb50SRajkumar Manoharan __le32 vdev_id; 47141b3fdb50SRajkumar Manoharan __le32 ppdu_aggr_cnt; 47151b3fdb50SRajkumar Manoharan __le32 ppdu_noack; 47161b3fdb50SRajkumar Manoharan __le32 mpdu_queued; 47171b3fdb50SRajkumar Manoharan __le32 ppdu_nonaggr_cnt; 47181b3fdb50SRajkumar Manoharan __le32 mpdu_sw_requeued; 47191b3fdb50SRajkumar Manoharan __le32 mpdu_suc_retry; 47201b3fdb50SRajkumar Manoharan __le32 mpdu_suc_multitry; 47211b3fdb50SRajkumar Manoharan __le32 mpdu_fail_retry; 47221b3fdb50SRajkumar Manoharan __le32 tx_ftm_suc; 47231b3fdb50SRajkumar Manoharan __le32 tx_ftm_suc_retry; 47241b3fdb50SRajkumar Manoharan __le32 tx_ftm_fail; 47251b3fdb50SRajkumar Manoharan __le32 rx_ftmr_cnt; 47261b3fdb50SRajkumar Manoharan __le32 rx_ftmr_dup_cnt; 47271b3fdb50SRajkumar Manoharan __le32 rx_iftmr_cnt; 47281b3fdb50SRajkumar Manoharan __le32 rx_iftmr_dup_cnt; 47291b3fdb50SRajkumar Manoharan __le32 reserved[6]; 47301b3fdb50SRajkumar Manoharan } __packed; 47311b3fdb50SRajkumar Manoharan 47325e3dd157SKalle Valo /* 47335e3dd157SKalle Valo * peer statistics. 47345e3dd157SKalle Valo * TODO: add more stats 47355e3dd157SKalle Valo */ 4736d15fb520SMichal Kazior struct wmi_peer_stats { 47375e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 47385e3dd157SKalle Valo __le32 peer_rssi; 47395e3dd157SKalle Valo __le32 peer_tx_rate; 47405e3dd157SKalle Valo } __packed; 47415e3dd157SKalle Valo 4742d15fb520SMichal Kazior struct wmi_10x_peer_stats { 4743d15fb520SMichal Kazior struct wmi_peer_stats old; 474423c3aae4SBen Greear __le32 peer_rx_rate; 474523c3aae4SBen Greear } __packed; 474623c3aae4SBen Greear 474720de2229SMichal Kazior struct wmi_10_2_peer_stats { 474820de2229SMichal Kazior struct wmi_peer_stats old; 474920de2229SMichal Kazior __le32 peer_rx_rate; 475020de2229SMichal Kazior __le32 current_per; 475120de2229SMichal Kazior __le32 retries; 475220de2229SMichal Kazior __le32 tx_rate_count; 475320de2229SMichal Kazior __le32 max_4ms_frame_len; 475420de2229SMichal Kazior __le32 total_sub_frames; 475520de2229SMichal Kazior __le32 tx_bytes; 475620de2229SMichal Kazior __le32 num_pkt_loss_overflow[4]; 475720de2229SMichal Kazior __le32 num_pkt_loss_excess_retry[4]; 475820de2229SMichal Kazior } __packed; 475920de2229SMichal Kazior 476020de2229SMichal Kazior struct wmi_10_2_4_peer_stats { 476120de2229SMichal Kazior struct wmi_10_2_peer_stats common; 4762774e656eSMohammed Shafi Shajakhan __le32 peer_rssi_changed; 476320de2229SMichal Kazior } __packed; 476420de2229SMichal Kazior 4765de46c015SMohammed Shafi Shajakhan struct wmi_10_2_4_ext_peer_stats { 4766de46c015SMohammed Shafi Shajakhan struct wmi_10_2_peer_stats common; 4767de46c015SMohammed Shafi Shajakhan __le32 peer_rssi_changed; 4768de46c015SMohammed Shafi Shajakhan __le32 rx_duration; 4769de46c015SMohammed Shafi Shajakhan } __packed; 4770de46c015SMohammed Shafi Shajakhan 477198dd2b92SManikanta Pubbisetty struct wmi_10_4_peer_stats { 477298dd2b92SManikanta Pubbisetty struct wmi_mac_addr peer_macaddr; 477398dd2b92SManikanta Pubbisetty __le32 peer_rssi; 477498dd2b92SManikanta Pubbisetty __le32 peer_rssi_seq_num; 477598dd2b92SManikanta Pubbisetty __le32 peer_tx_rate; 477698dd2b92SManikanta Pubbisetty __le32 peer_rx_rate; 477798dd2b92SManikanta Pubbisetty __le32 current_per; 477898dd2b92SManikanta Pubbisetty __le32 retries; 477998dd2b92SManikanta Pubbisetty __le32 tx_rate_count; 478098dd2b92SManikanta Pubbisetty __le32 max_4ms_frame_len; 478198dd2b92SManikanta Pubbisetty __le32 total_sub_frames; 478298dd2b92SManikanta Pubbisetty __le32 tx_bytes; 478398dd2b92SManikanta Pubbisetty __le32 num_pkt_loss_overflow[4]; 478498dd2b92SManikanta Pubbisetty __le32 num_pkt_loss_excess_retry[4]; 478598dd2b92SManikanta Pubbisetty __le32 peer_rssi_changed; 478698dd2b92SManikanta Pubbisetty } __packed; 478798dd2b92SManikanta Pubbisetty 4788f9575793SMohammed Shafi Shajakhan struct wmi_10_4_peer_extd_stats { 4789f9575793SMohammed Shafi Shajakhan struct wmi_mac_addr peer_macaddr; 4790f9575793SMohammed Shafi Shajakhan __le32 inactive_time; 4791f9575793SMohammed Shafi Shajakhan __le32 peer_chain_rssi; 4792f9575793SMohammed Shafi Shajakhan __le32 rx_duration; 4793f9575793SMohammed Shafi Shajakhan __le32 reserved[10]; 4794f9575793SMohammed Shafi Shajakhan } __packed; 4795f9575793SMohammed Shafi Shajakhan 47964a49ae94SMohammed Shafi Shajakhan struct wmi_10_4_bss_bcn_stats { 47974a49ae94SMohammed Shafi Shajakhan __le32 vdev_id; 47984a49ae94SMohammed Shafi Shajakhan __le32 bss_bcns_dropped; 47994a49ae94SMohammed Shafi Shajakhan __le32 bss_bcn_delivered; 48004a49ae94SMohammed Shafi Shajakhan } __packed; 48014a49ae94SMohammed Shafi Shajakhan 48024a49ae94SMohammed Shafi Shajakhan struct wmi_10_4_bss_bcn_filter_stats { 48034a49ae94SMohammed Shafi Shajakhan __le32 bcns_dropped; 48044a49ae94SMohammed Shafi Shajakhan __le32 bcns_delivered; 48054a49ae94SMohammed Shafi Shajakhan __le32 active_filters; 48064a49ae94SMohammed Shafi Shajakhan struct wmi_10_4_bss_bcn_stats bss_stats; 48074a49ae94SMohammed Shafi Shajakhan } __packed; 48084a49ae94SMohammed Shafi Shajakhan 480920de2229SMichal Kazior struct wmi_10_2_pdev_ext_stats { 481020de2229SMichal Kazior __le32 rx_rssi_comb; 481120de2229SMichal Kazior __le32 rx_rssi[4]; 481220de2229SMichal Kazior __le32 rx_mcs[10]; 481320de2229SMichal Kazior __le32 tx_mcs[10]; 481420de2229SMichal Kazior __le32 ack_rssi; 481520de2229SMichal Kazior } __packed; 481620de2229SMichal Kazior 48175e3dd157SKalle Valo struct wmi_vdev_create_cmd { 48185e3dd157SKalle Valo __le32 vdev_id; 48195e3dd157SKalle Valo __le32 vdev_type; 48205e3dd157SKalle Valo __le32 vdev_subtype; 48215e3dd157SKalle Valo struct wmi_mac_addr vdev_macaddr; 48225e3dd157SKalle Valo } __packed; 48235e3dd157SKalle Valo 48245e3dd157SKalle Valo enum wmi_vdev_type { 48255e3dd157SKalle Valo WMI_VDEV_TYPE_AP = 1, 48265e3dd157SKalle Valo WMI_VDEV_TYPE_STA = 2, 48275e3dd157SKalle Valo WMI_VDEV_TYPE_IBSS = 3, 48285e3dd157SKalle Valo WMI_VDEV_TYPE_MONITOR = 4, 48295e3dd157SKalle Valo }; 48305e3dd157SKalle Valo 48315e3dd157SKalle Valo enum wmi_vdev_subtype { 48326e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_NONE, 48336e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_P2P_DEVICE, 48346e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_P2P_CLIENT, 48356e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_P2P_GO, 48366e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_PROXY_STA, 48376e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_MESH_11S, 48386e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_MESH_NON_11S, 48396e4de1a4SPeter Oh }; 48406e4de1a4SPeter Oh 48416e4de1a4SPeter Oh enum wmi_vdev_subtype_legacy { 48426e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_LEGACY_NONE = 0, 48436e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV = 1, 48446e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI = 2, 48456e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_LEGACY_P2P_GO = 3, 48466e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA = 4, 48476e4de1a4SPeter Oh }; 48486e4de1a4SPeter Oh 48496e4de1a4SPeter Oh enum wmi_vdev_subtype_10_2_4 { 48506e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_10_2_4_NONE = 0, 48516e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV = 1, 48526e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI = 2, 48536e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_10_2_4_P2P_GO = 3, 48546e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA = 4, 48556e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_10_2_4_MESH_11S = 5, 48566e4de1a4SPeter Oh }; 48576e4de1a4SPeter Oh 48586e4de1a4SPeter Oh enum wmi_vdev_subtype_10_4 { 48596e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_10_4_NONE = 0, 48606e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_10_4_P2P_DEV = 1, 48616e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_10_4_P2P_CLI = 2, 48626e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_10_4_P2P_GO = 3, 48636e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_10_4_PROXY_STA = 4, 48646e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S = 5, 48656e4de1a4SPeter Oh WMI_VDEV_SUBTYPE_10_4_MESH_11S = 6, 48665e3dd157SKalle Valo }; 48675e3dd157SKalle Valo 48685e3dd157SKalle Valo /* values for vdev_subtype */ 48695e3dd157SKalle Valo 48705e3dd157SKalle Valo /* values for vdev_start_request flags */ 48715e3dd157SKalle Valo /* 48725e3dd157SKalle Valo * Indicates that AP VDEV uses hidden ssid. only valid for 487337ff1b0dSMarcin Rokicki * AP/GO 487437ff1b0dSMarcin Rokicki */ 48755e3dd157SKalle Valo #define WMI_VDEV_START_HIDDEN_SSID (1 << 0) 48765e3dd157SKalle Valo /* 48775e3dd157SKalle Valo * Indicates if robust management frame/management frame 48785e3dd157SKalle Valo * protection is enabled. For GO/AP vdevs, it indicates that 48795e3dd157SKalle Valo * it may support station/client associations with RMF enabled. 48805e3dd157SKalle Valo * For STA/client vdevs, it indicates that sta will 488137ff1b0dSMarcin Rokicki * associate with AP with RMF enabled. 488237ff1b0dSMarcin Rokicki */ 48835e3dd157SKalle Valo #define WMI_VDEV_START_PMF_ENABLED (1 << 1) 48845e3dd157SKalle Valo 48855e3dd157SKalle Valo struct wmi_p2p_noa_descriptor { 48865e3dd157SKalle Valo __le32 type_count; /* 255: continuous schedule, 0: reserved */ 48875e3dd157SKalle Valo __le32 duration; /* Absent period duration in micro seconds */ 48885e3dd157SKalle Valo __le32 interval; /* Absent period interval in micro seconds */ 48895e3dd157SKalle Valo __le32 start_time; /* 32 bit tsf time when in starts */ 48905e3dd157SKalle Valo } __packed; 48915e3dd157SKalle Valo 48925e3dd157SKalle Valo struct wmi_vdev_start_request_cmd { 48935e3dd157SKalle Valo /* WMI channel */ 48945e3dd157SKalle Valo struct wmi_channel chan; 48955e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 48965e3dd157SKalle Valo __le32 vdev_id; 48975e3dd157SKalle Valo /* requestor id identifying the caller module */ 48985e3dd157SKalle Valo __le32 requestor_id; 48995e3dd157SKalle Valo /* beacon interval from received beacon */ 49005e3dd157SKalle Valo __le32 beacon_interval; 49015e3dd157SKalle Valo /* DTIM Period from the received beacon */ 49025e3dd157SKalle Valo __le32 dtim_period; 49035e3dd157SKalle Valo /* Flags */ 49045e3dd157SKalle Valo __le32 flags; 49055e3dd157SKalle Valo /* ssid field. Only valid for AP/GO/IBSS/BTAmp VDEV type. */ 49065e3dd157SKalle Valo struct wmi_ssid ssid; 4907e13dbeadSJoe Perches /* beacon/probe response xmit rate. Applicable for SoftAP. */ 49085e3dd157SKalle Valo __le32 bcn_tx_rate; 4909e13dbeadSJoe Perches /* beacon/probe response xmit power. Applicable for SoftAP. */ 49105e3dd157SKalle Valo __le32 bcn_tx_power; 49115e3dd157SKalle Valo /* number of p2p NOA descriptor(s) from scan entry */ 49125e3dd157SKalle Valo __le32 num_noa_descriptors; 49135e3dd157SKalle Valo /* 49145e3dd157SKalle Valo * Disable H/W ack. This used by WMI_VDEV_RESTART_REQUEST_CMDID. 49155e3dd157SKalle Valo * During CAC, Our HW shouldn't ack ditected frames 49165e3dd157SKalle Valo */ 49175e3dd157SKalle Valo __le32 disable_hw_ack; 49185e3dd157SKalle Valo /* actual p2p NOA descriptor from scan entry */ 49195e3dd157SKalle Valo struct wmi_p2p_noa_descriptor noa_descriptors[2]; 49205e3dd157SKalle Valo } __packed; 49215e3dd157SKalle Valo 49225e3dd157SKalle Valo struct wmi_vdev_restart_request_cmd { 49235e3dd157SKalle Valo struct wmi_vdev_start_request_cmd vdev_start_request_cmd; 49245e3dd157SKalle Valo } __packed; 49255e3dd157SKalle Valo 49265e3dd157SKalle Valo struct wmi_vdev_start_request_arg { 49275e3dd157SKalle Valo u32 vdev_id; 49285e3dd157SKalle Valo struct wmi_channel_arg channel; 49295e3dd157SKalle Valo u32 bcn_intval; 49305e3dd157SKalle Valo u32 dtim_period; 49315e3dd157SKalle Valo u8 *ssid; 49325e3dd157SKalle Valo u32 ssid_len; 49335e3dd157SKalle Valo u32 bcn_tx_rate; 49345e3dd157SKalle Valo u32 bcn_tx_power; 49355e3dd157SKalle Valo bool disable_hw_ack; 49365e3dd157SKalle Valo bool hidden_ssid; 49375e3dd157SKalle Valo bool pmf_enabled; 49385e3dd157SKalle Valo }; 49395e3dd157SKalle Valo 49405e3dd157SKalle Valo struct wmi_vdev_delete_cmd { 49415e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 49425e3dd157SKalle Valo __le32 vdev_id; 49435e3dd157SKalle Valo } __packed; 49445e3dd157SKalle Valo 49455e3dd157SKalle Valo struct wmi_vdev_up_cmd { 49465e3dd157SKalle Valo __le32 vdev_id; 49475e3dd157SKalle Valo __le32 vdev_assoc_id; 49485e3dd157SKalle Valo struct wmi_mac_addr vdev_bssid; 49495e3dd157SKalle Valo } __packed; 49505e3dd157SKalle Valo 49515e3dd157SKalle Valo struct wmi_vdev_stop_cmd { 49525e3dd157SKalle Valo __le32 vdev_id; 49535e3dd157SKalle Valo } __packed; 49545e3dd157SKalle Valo 49555e3dd157SKalle Valo struct wmi_vdev_down_cmd { 49565e3dd157SKalle Valo __le32 vdev_id; 49575e3dd157SKalle Valo } __packed; 49585e3dd157SKalle Valo 49595e3dd157SKalle Valo struct wmi_vdev_standby_response_cmd { 49605e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 49615e3dd157SKalle Valo __le32 vdev_id; 49625e3dd157SKalle Valo } __packed; 49635e3dd157SKalle Valo 49645e3dd157SKalle Valo struct wmi_vdev_resume_response_cmd { 49655e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 49665e3dd157SKalle Valo __le32 vdev_id; 49675e3dd157SKalle Valo } __packed; 49685e3dd157SKalle Valo 49695e3dd157SKalle Valo struct wmi_vdev_set_param_cmd { 49705e3dd157SKalle Valo __le32 vdev_id; 49715e3dd157SKalle Valo __le32 param_id; 49725e3dd157SKalle Valo __le32 param_value; 49735e3dd157SKalle Valo } __packed; 49745e3dd157SKalle Valo 49755e3dd157SKalle Valo #define WMI_MAX_KEY_INDEX 3 49765e3dd157SKalle Valo #define WMI_MAX_KEY_LEN 32 49775e3dd157SKalle Valo 49785e3dd157SKalle Valo #define WMI_KEY_PAIRWISE 0x00 49795e3dd157SKalle Valo #define WMI_KEY_GROUP 0x01 49805e3dd157SKalle Valo #define WMI_KEY_TX_USAGE 0x02 /* default tx key - static wep */ 49815e3dd157SKalle Valo 49825e3dd157SKalle Valo struct wmi_key_seq_counter { 49835e3dd157SKalle Valo __le32 key_seq_counter_l; 49845e3dd157SKalle Valo __le32 key_seq_counter_h; 49855e3dd157SKalle Valo } __packed; 49865e3dd157SKalle Valo 49877d94f862SAbhishek Ambure enum wmi_cipher_suites { 49887d94f862SAbhishek Ambure WMI_CIPHER_NONE, 49897d94f862SAbhishek Ambure WMI_CIPHER_WEP, 49907d94f862SAbhishek Ambure WMI_CIPHER_TKIP, 49917d94f862SAbhishek Ambure WMI_CIPHER_AES_OCB, 49927d94f862SAbhishek Ambure WMI_CIPHER_AES_CCM, 49937d94f862SAbhishek Ambure WMI_CIPHER_WAPI, 49947d94f862SAbhishek Ambure WMI_CIPHER_CKIP, 49957d94f862SAbhishek Ambure WMI_CIPHER_AES_CMAC, 49967d94f862SAbhishek Ambure WMI_CIPHER_AES_GCM, 49977d94f862SAbhishek Ambure }; 49987d94f862SAbhishek Ambure 49997d94f862SAbhishek Ambure enum wmi_tlv_cipher_suites { 50007d94f862SAbhishek Ambure WMI_TLV_CIPHER_NONE, 50017d94f862SAbhishek Ambure WMI_TLV_CIPHER_WEP, 50027d94f862SAbhishek Ambure WMI_TLV_CIPHER_TKIP, 50037d94f862SAbhishek Ambure WMI_TLV_CIPHER_AES_OCB, 50047d94f862SAbhishek Ambure WMI_TLV_CIPHER_AES_CCM, 50057d94f862SAbhishek Ambure WMI_TLV_CIPHER_WAPI, 50067d94f862SAbhishek Ambure WMI_TLV_CIPHER_CKIP, 50077d94f862SAbhishek Ambure WMI_TLV_CIPHER_AES_CMAC, 50087d94f862SAbhishek Ambure WMI_TLV_CIPHER_ANY, 50097d94f862SAbhishek Ambure WMI_TLV_CIPHER_AES_GCM, 50107d94f862SAbhishek Ambure }; 50115e3dd157SKalle Valo 50125e3dd157SKalle Valo struct wmi_vdev_install_key_cmd { 50135e3dd157SKalle Valo __le32 vdev_id; 50145e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 50155e3dd157SKalle Valo __le32 key_idx; 50165e3dd157SKalle Valo __le32 key_flags; 50175e3dd157SKalle Valo __le32 key_cipher; /* %WMI_CIPHER_ */ 50185e3dd157SKalle Valo struct wmi_key_seq_counter key_rsc_counter; 50195e3dd157SKalle Valo struct wmi_key_seq_counter key_global_rsc_counter; 50205e3dd157SKalle Valo struct wmi_key_seq_counter key_tsc_counter; 50215e3dd157SKalle Valo u8 wpi_key_rsc_counter[16]; 50225e3dd157SKalle Valo u8 wpi_key_tsc_counter[16]; 50235e3dd157SKalle Valo __le32 key_len; 50245e3dd157SKalle Valo __le32 key_txmic_len; 50255e3dd157SKalle Valo __le32 key_rxmic_len; 50265e3dd157SKalle Valo 50275e3dd157SKalle Valo /* contains key followed by tx mic followed by rx mic */ 50285e3dd157SKalle Valo u8 key_data[0]; 50295e3dd157SKalle Valo } __packed; 50305e3dd157SKalle Valo 50315e3dd157SKalle Valo struct wmi_vdev_install_key_arg { 50325e3dd157SKalle Valo u32 vdev_id; 50335e3dd157SKalle Valo const u8 *macaddr; 50345e3dd157SKalle Valo u32 key_idx; 50355e3dd157SKalle Valo u32 key_flags; 50365e3dd157SKalle Valo u32 key_cipher; 50375e3dd157SKalle Valo u32 key_len; 50385e3dd157SKalle Valo u32 key_txmic_len; 50395e3dd157SKalle Valo u32 key_rxmic_len; 50405e3dd157SKalle Valo const void *key_data; 50415e3dd157SKalle Valo }; 50425e3dd157SKalle Valo 504351ab1a0aSJanusz Dziedzic /* 504451ab1a0aSJanusz Dziedzic * vdev fixed rate format: 504551ab1a0aSJanusz Dziedzic * - preamble - b7:b6 - see WMI_RATE_PREMABLE_ 504651ab1a0aSJanusz Dziedzic * - nss - b5:b4 - ss number (0 mean 1ss) 504751ab1a0aSJanusz Dziedzic * - rate_mcs - b3:b0 - as below 504851ab1a0aSJanusz Dziedzic * CCK: 0 - 11Mbps, 1 - 5,5Mbps, 2 - 2Mbps, 3 - 1Mbps, 504951ab1a0aSJanusz Dziedzic * 4 - 11Mbps (s), 5 - 5,5Mbps (s), 6 - 2Mbps (s) 505051ab1a0aSJanusz Dziedzic * OFDM: 0 - 48Mbps, 1 - 24Mbps, 2 - 12Mbps, 3 - 6Mbps, 505151ab1a0aSJanusz Dziedzic * 4 - 54Mbps, 5 - 36Mbps, 6 - 18Mbps, 7 - 9Mbps 505251ab1a0aSJanusz Dziedzic * HT/VHT: MCS index 505351ab1a0aSJanusz Dziedzic */ 505451ab1a0aSJanusz Dziedzic 50555e3dd157SKalle Valo /* Preamble types to be used with VDEV fixed rate configuration */ 50565e3dd157SKalle Valo enum wmi_rate_preamble { 50575e3dd157SKalle Valo WMI_RATE_PREAMBLE_OFDM, 50585e3dd157SKalle Valo WMI_RATE_PREAMBLE_CCK, 50595e3dd157SKalle Valo WMI_RATE_PREAMBLE_HT, 50605e3dd157SKalle Valo WMI_RATE_PREAMBLE_VHT, 50615e3dd157SKalle Valo }; 50625e3dd157SKalle Valo 506329542666SMaharaja Kennadyrajan #define ATH10K_HW_NSS(rate) (1 + (((rate) >> 4) & 0x3)) 506429542666SMaharaja Kennadyrajan #define ATH10K_HW_PREAMBLE(rate) (((rate) >> 6) & 0x3) 5065cec17c38SAnilkumar Kolli #define ATH10K_HW_MCS_RATE(rate) ((rate) & 0xf) 5066cec17c38SAnilkumar Kolli #define ATH10K_HW_LEGACY_RATE(rate) ((rate) & 0x3f) 5067cec17c38SAnilkumar Kolli #define ATH10K_HW_BW(flags) (((flags) >> 3) & 0x3) 5068cec17c38SAnilkumar Kolli #define ATH10K_HW_GI(flags) (((flags) >> 5) & 0x1) 506929542666SMaharaja Kennadyrajan #define ATH10K_HW_RATECODE(rate, nss, preamble) \ 507029542666SMaharaja Kennadyrajan (((preamble) << 6) | ((nss) << 4) | (rate)) 5071a904417fSAnilkumar Kolli #define ATH10K_HW_AMPDU(flags) ((flags) & 0x1) 5072a904417fSAnilkumar Kolli #define ATH10K_HW_BA_FAIL(flags) (((flags) >> 1) & 0x3) 50739a9cf0e6SAnilkumar Kolli #define ATH10K_FW_SKIPPED_RATE_CTRL(flags) (((flags) >> 6) & 0x1) 507429542666SMaharaja Kennadyrajan 5075a904417fSAnilkumar Kolli #define ATH10K_VHT_MCS_NUM 10 5076ef9051c7SSurabhi Vishnoi #define ATH10K_BW_NUM 6 5077a904417fSAnilkumar Kolli #define ATH10K_NSS_NUM 4 5078a904417fSAnilkumar Kolli #define ATH10K_LEGACY_NUM 12 5079a904417fSAnilkumar Kolli #define ATH10K_GI_NUM 2 5080a904417fSAnilkumar Kolli #define ATH10K_HT_MCS_NUM 32 5081e88975caSAnilkumar Kolli #define ATH10K_RATE_TABLE_NUM 320 50828e55fdaaSSurabhi Vishnoi #define ATH10K_RATE_INFO_FLAGS_SGI_BIT 2 5083cec17c38SAnilkumar Kolli 50845e3dd157SKalle Valo /* Value to disable fixed rate setting */ 50855e3dd157SKalle Valo #define WMI_FIXED_RATE_NONE (0xff) 50865e3dd157SKalle Valo 5087c0e33fe6SRakesh Pillai struct wmi_peer_param_map { 5088c0e33fe6SRakesh Pillai u32 smps_state; 5089c0e33fe6SRakesh Pillai u32 ampdu; 5090c0e33fe6SRakesh Pillai u32 authorize; 5091c0e33fe6SRakesh Pillai u32 chan_width; 5092c0e33fe6SRakesh Pillai u32 nss; 5093c0e33fe6SRakesh Pillai u32 use_4addr; 5094c0e33fe6SRakesh Pillai u32 membership; 5095c0e33fe6SRakesh Pillai u32 use_fixed_power; 5096c0e33fe6SRakesh Pillai u32 user_pos; 5097c0e33fe6SRakesh Pillai u32 crit_proto_hint_enabled; 5098c0e33fe6SRakesh Pillai u32 tx_fail_cnt_thr; 5099c0e33fe6SRakesh Pillai u32 set_hw_retry_cts2s; 5100c0e33fe6SRakesh Pillai u32 ibss_atim_win_len; 5101c0e33fe6SRakesh Pillai u32 debug; 5102c0e33fe6SRakesh Pillai u32 phymode; 5103c0e33fe6SRakesh Pillai u32 dummy_var; 5104c0e33fe6SRakesh Pillai }; 5105c0e33fe6SRakesh Pillai 51066d1506e7SBartosz Markowski struct wmi_vdev_param_map { 51076d1506e7SBartosz Markowski u32 rts_threshold; 51086d1506e7SBartosz Markowski u32 fragmentation_threshold; 51096d1506e7SBartosz Markowski u32 beacon_interval; 51106d1506e7SBartosz Markowski u32 listen_interval; 51116d1506e7SBartosz Markowski u32 multicast_rate; 51126d1506e7SBartosz Markowski u32 mgmt_tx_rate; 51136d1506e7SBartosz Markowski u32 slot_time; 51146d1506e7SBartosz Markowski u32 preamble; 51156d1506e7SBartosz Markowski u32 swba_time; 51166d1506e7SBartosz Markowski u32 wmi_vdev_stats_update_period; 51176d1506e7SBartosz Markowski u32 wmi_vdev_pwrsave_ageout_time; 51186d1506e7SBartosz Markowski u32 wmi_vdev_host_swba_interval; 51196d1506e7SBartosz Markowski u32 dtim_period; 51206d1506e7SBartosz Markowski u32 wmi_vdev_oc_scheduler_air_time_limit; 51216d1506e7SBartosz Markowski u32 wds; 51226d1506e7SBartosz Markowski u32 atim_window; 51236d1506e7SBartosz Markowski u32 bmiss_count_max; 51246d1506e7SBartosz Markowski u32 bmiss_first_bcnt; 51256d1506e7SBartosz Markowski u32 bmiss_final_bcnt; 51266d1506e7SBartosz Markowski u32 feature_wmm; 51276d1506e7SBartosz Markowski u32 chwidth; 51286d1506e7SBartosz Markowski u32 chextoffset; 51296d1506e7SBartosz Markowski u32 disable_htprotection; 51306d1506e7SBartosz Markowski u32 sta_quickkickout; 51316d1506e7SBartosz Markowski u32 mgmt_rate; 51326d1506e7SBartosz Markowski u32 protection_mode; 51336d1506e7SBartosz Markowski u32 fixed_rate; 51346d1506e7SBartosz Markowski u32 sgi; 51356d1506e7SBartosz Markowski u32 ldpc; 51366d1506e7SBartosz Markowski u32 tx_stbc; 51376d1506e7SBartosz Markowski u32 rx_stbc; 51386d1506e7SBartosz Markowski u32 intra_bss_fwd; 51396d1506e7SBartosz Markowski u32 def_keyid; 51406d1506e7SBartosz Markowski u32 nss; 51416d1506e7SBartosz Markowski u32 bcast_data_rate; 51426d1506e7SBartosz Markowski u32 mcast_data_rate; 51436d1506e7SBartosz Markowski u32 mcast_indicate; 51446d1506e7SBartosz Markowski u32 dhcp_indicate; 51456d1506e7SBartosz Markowski u32 unknown_dest_indicate; 51466d1506e7SBartosz Markowski u32 ap_keepalive_min_idle_inactive_time_secs; 51476d1506e7SBartosz Markowski u32 ap_keepalive_max_idle_inactive_time_secs; 51486d1506e7SBartosz Markowski u32 ap_keepalive_max_unresponsive_time_secs; 51496d1506e7SBartosz Markowski u32 ap_enable_nawds; 51506d1506e7SBartosz Markowski u32 mcast2ucast_set; 51516d1506e7SBartosz Markowski u32 enable_rtscts; 51526d1506e7SBartosz Markowski u32 txbf; 51536d1506e7SBartosz Markowski u32 packet_powersave; 51546d1506e7SBartosz Markowski u32 drop_unencry; 51556d1506e7SBartosz Markowski u32 tx_encap_type; 51566d1506e7SBartosz Markowski u32 ap_detect_out_of_sync_sleeping_sta_time_secs; 515793841a15SRaja Mani u32 rc_num_retries; 515893841a15SRaja Mani u32 cabq_maxdur; 515993841a15SRaja Mani u32 mfptest_set; 516093841a15SRaja Mani u32 rts_fixed_rate; 516193841a15SRaja Mani u32 vht_sgimask; 516293841a15SRaja Mani u32 vht80_ratemask; 516393841a15SRaja Mani u32 early_rx_adjust_enable; 516493841a15SRaja Mani u32 early_rx_tgt_bmiss_num; 516593841a15SRaja Mani u32 early_rx_bmiss_sample_cycle; 516693841a15SRaja Mani u32 early_rx_slop_step; 516793841a15SRaja Mani u32 early_rx_init_slop; 516893841a15SRaja Mani u32 early_rx_adjust_pause; 516993841a15SRaja Mani u32 proxy_sta; 517093841a15SRaja Mani u32 meru_vc; 517193841a15SRaja Mani u32 rx_decap_type; 517293841a15SRaja Mani u32 bw_nss_ratemask; 5173973324ffSPedersen, Thomas u32 inc_tsf; 5174973324ffSPedersen, Thomas u32 dec_tsf; 517568c295f2SSathishkumar Muruganandam u32 disable_4addr_src_lrn; 5176059104bfSPradeep Kumar Chitrapu u32 rtt_responder_role; 51776d1506e7SBartosz Markowski }; 51786d1506e7SBartosz Markowski 51796d1506e7SBartosz Markowski #define WMI_VDEV_PARAM_UNSUPPORTED 0 51806d1506e7SBartosz Markowski 51815e3dd157SKalle Valo /* the definition of different VDEV parameters */ 51825e3dd157SKalle Valo enum wmi_vdev_param { 51835e3dd157SKalle Valo /* RTS Threshold */ 51845e3dd157SKalle Valo WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 51855e3dd157SKalle Valo /* Fragmentation threshold */ 51865e3dd157SKalle Valo WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 51875e3dd157SKalle Valo /* beacon interval in TUs */ 51885e3dd157SKalle Valo WMI_VDEV_PARAM_BEACON_INTERVAL, 51895e3dd157SKalle Valo /* Listen interval in TUs */ 51905e3dd157SKalle Valo WMI_VDEV_PARAM_LISTEN_INTERVAL, 5191e13dbeadSJoe Perches /* multicast rate in Mbps */ 51925e3dd157SKalle Valo WMI_VDEV_PARAM_MULTICAST_RATE, 51935e3dd157SKalle Valo /* management frame rate in Mbps */ 51945e3dd157SKalle Valo WMI_VDEV_PARAM_MGMT_TX_RATE, 51955e3dd157SKalle Valo /* slot time (long vs short) */ 51965e3dd157SKalle Valo WMI_VDEV_PARAM_SLOT_TIME, 51975e3dd157SKalle Valo /* preamble (long vs short) */ 51985e3dd157SKalle Valo WMI_VDEV_PARAM_PREAMBLE, 51995e3dd157SKalle Valo /* SWBA time (time before tbtt in msec) */ 52005e3dd157SKalle Valo WMI_VDEV_PARAM_SWBA_TIME, 52015e3dd157SKalle Valo /* time period for updating VDEV stats */ 52025e3dd157SKalle Valo WMI_VDEV_STATS_UPDATE_PERIOD, 52035e3dd157SKalle Valo /* age out time in msec for frames queued for station in power save */ 52045e3dd157SKalle Valo WMI_VDEV_PWRSAVE_AGEOUT_TIME, 52055e3dd157SKalle Valo /* 52065e3dd157SKalle Valo * Host SWBA interval (time in msec before tbtt for SWBA event 52075e3dd157SKalle Valo * generation). 52085e3dd157SKalle Valo */ 52095e3dd157SKalle Valo WMI_VDEV_HOST_SWBA_INTERVAL, 52105e3dd157SKalle Valo /* DTIM period (specified in units of num beacon intervals) */ 52115e3dd157SKalle Valo WMI_VDEV_PARAM_DTIM_PERIOD, 52125e3dd157SKalle Valo /* 52135e3dd157SKalle Valo * scheduler air time limit for this VDEV. used by off chan 52145e3dd157SKalle Valo * scheduler. 52155e3dd157SKalle Valo */ 52165e3dd157SKalle Valo WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 52175e3dd157SKalle Valo /* enable/dsiable WDS for this VDEV */ 52185e3dd157SKalle Valo WMI_VDEV_PARAM_WDS, 52195e3dd157SKalle Valo /* ATIM Window */ 52205e3dd157SKalle Valo WMI_VDEV_PARAM_ATIM_WINDOW, 52215e3dd157SKalle Valo /* BMISS max */ 52225e3dd157SKalle Valo WMI_VDEV_PARAM_BMISS_COUNT_MAX, 52235e3dd157SKalle Valo /* BMISS first time */ 52245e3dd157SKalle Valo WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 52255e3dd157SKalle Valo /* BMISS final time */ 52265e3dd157SKalle Valo WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 52275e3dd157SKalle Valo /* WMM enables/disabled */ 52285e3dd157SKalle Valo WMI_VDEV_PARAM_FEATURE_WMM, 52295e3dd157SKalle Valo /* Channel width */ 52305e3dd157SKalle Valo WMI_VDEV_PARAM_CHWIDTH, 52315e3dd157SKalle Valo /* Channel Offset */ 52325e3dd157SKalle Valo WMI_VDEV_PARAM_CHEXTOFFSET, 52335e3dd157SKalle Valo /* Disable HT Protection */ 52345e3dd157SKalle Valo WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 52355e3dd157SKalle Valo /* Quick STA Kickout */ 52365e3dd157SKalle Valo WMI_VDEV_PARAM_STA_QUICKKICKOUT, 52375e3dd157SKalle Valo /* Rate to be used with Management frames */ 52385e3dd157SKalle Valo WMI_VDEV_PARAM_MGMT_RATE, 52395e3dd157SKalle Valo /* Protection Mode */ 52405e3dd157SKalle Valo WMI_VDEV_PARAM_PROTECTION_MODE, 52415e3dd157SKalle Valo /* Fixed rate setting */ 52425e3dd157SKalle Valo WMI_VDEV_PARAM_FIXED_RATE, 52435e3dd157SKalle Valo /* Short GI Enable/Disable */ 52445e3dd157SKalle Valo WMI_VDEV_PARAM_SGI, 52455e3dd157SKalle Valo /* Enable LDPC */ 52465e3dd157SKalle Valo WMI_VDEV_PARAM_LDPC, 52475e3dd157SKalle Valo /* Enable Tx STBC */ 52485e3dd157SKalle Valo WMI_VDEV_PARAM_TX_STBC, 52495e3dd157SKalle Valo /* Enable Rx STBC */ 52505e3dd157SKalle Valo WMI_VDEV_PARAM_RX_STBC, 52515e3dd157SKalle Valo /* Intra BSS forwarding */ 52525e3dd157SKalle Valo WMI_VDEV_PARAM_INTRA_BSS_FWD, 52535e3dd157SKalle Valo /* Setting Default xmit key for Vdev */ 52545e3dd157SKalle Valo WMI_VDEV_PARAM_DEF_KEYID, 52555e3dd157SKalle Valo /* NSS width */ 52565e3dd157SKalle Valo WMI_VDEV_PARAM_NSS, 52575e3dd157SKalle Valo /* Set the custom rate for the broadcast data frames */ 52585e3dd157SKalle Valo WMI_VDEV_PARAM_BCAST_DATA_RATE, 52595e3dd157SKalle Valo /* Set the custom rate (rate-code) for multicast data frames */ 52605e3dd157SKalle Valo WMI_VDEV_PARAM_MCAST_DATA_RATE, 52615e3dd157SKalle Valo /* Tx multicast packet indicate Enable/Disable */ 52625e3dd157SKalle Valo WMI_VDEV_PARAM_MCAST_INDICATE, 52635e3dd157SKalle Valo /* Tx DHCP packet indicate Enable/Disable */ 52645e3dd157SKalle Valo WMI_VDEV_PARAM_DHCP_INDICATE, 52655e3dd157SKalle Valo /* Enable host inspection of Tx unicast packet to unknown destination */ 52665e3dd157SKalle Valo WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 52675e3dd157SKalle Valo 52685e3dd157SKalle Valo /* The minimum amount of time AP begins to consider STA inactive */ 52695e3dd157SKalle Valo WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 52705e3dd157SKalle Valo 52715e3dd157SKalle Valo /* 52725e3dd157SKalle Valo * An associated STA is considered inactive when there is no recent 52735e3dd157SKalle Valo * TX/RX activity and no downlink frames are buffered for it. Once a 52745e3dd157SKalle Valo * STA exceeds the maximum idle inactive time, the AP will send an 52755e3dd157SKalle Valo * 802.11 data-null as a keep alive to verify the STA is still 52765e3dd157SKalle Valo * associated. If the STA does ACK the data-null, or if the data-null 52775e3dd157SKalle Valo * is buffered and the STA does not retrieve it, the STA will be 52785e3dd157SKalle Valo * considered unresponsive 52795e3dd157SKalle Valo * (see WMI_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS). 52805e3dd157SKalle Valo */ 52815e3dd157SKalle Valo WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 52825e3dd157SKalle Valo 52835e3dd157SKalle Valo /* 52845e3dd157SKalle Valo * An associated STA is considered unresponsive if there is no recent 52855e3dd157SKalle Valo * TX/RX activity and downlink frames are buffered for it. Once a STA 52865e3dd157SKalle Valo * exceeds the maximum unresponsive time, the AP will send a 528737ff1b0dSMarcin Rokicki * WMI_STA_KICKOUT event to the host so the STA can be deleted. 528837ff1b0dSMarcin Rokicki */ 52895e3dd157SKalle Valo WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 52905e3dd157SKalle Valo 52915e3dd157SKalle Valo /* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */ 52925e3dd157SKalle Valo WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 52935e3dd157SKalle Valo /* Enable/Disable RTS-CTS */ 52945e3dd157SKalle Valo WMI_VDEV_PARAM_ENABLE_RTSCTS, 52955e3dd157SKalle Valo /* Enable TXBFee/er */ 52965e3dd157SKalle Valo WMI_VDEV_PARAM_TXBF, 52975e3dd157SKalle Valo 52985e3dd157SKalle Valo /* Set packet power save */ 52995e3dd157SKalle Valo WMI_VDEV_PARAM_PACKET_POWERSAVE, 53005e3dd157SKalle Valo 53015e3dd157SKalle Valo /* 53025e3dd157SKalle Valo * Drops un-encrypted packets if eceived in an encrypted connection 53035e3dd157SKalle Valo * otherwise forwards to host. 53045e3dd157SKalle Valo */ 53055e3dd157SKalle Valo WMI_VDEV_PARAM_DROP_UNENCRY, 53065e3dd157SKalle Valo 53075e3dd157SKalle Valo /* 53085e3dd157SKalle Valo * Set the encapsulation type for frames. 53095e3dd157SKalle Valo */ 53105e3dd157SKalle Valo WMI_VDEV_PARAM_TX_ENCAP_TYPE, 53115e3dd157SKalle Valo }; 53125e3dd157SKalle Valo 53136d1506e7SBartosz Markowski /* the definition of different VDEV parameters */ 53146d1506e7SBartosz Markowski enum wmi_10x_vdev_param { 53156d1506e7SBartosz Markowski /* RTS Threshold */ 53166d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1, 53176d1506e7SBartosz Markowski /* Fragmentation threshold */ 53186d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 53196d1506e7SBartosz Markowski /* beacon interval in TUs */ 53206d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_BEACON_INTERVAL, 53216d1506e7SBartosz Markowski /* Listen interval in TUs */ 53226d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, 5323e13dbeadSJoe Perches /* multicast rate in Mbps */ 53246d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MULTICAST_RATE, 53256d1506e7SBartosz Markowski /* management frame rate in Mbps */ 53266d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MGMT_TX_RATE, 53276d1506e7SBartosz Markowski /* slot time (long vs short) */ 53286d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_SLOT_TIME, 53296d1506e7SBartosz Markowski /* preamble (long vs short) */ 53306d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_PREAMBLE, 53316d1506e7SBartosz Markowski /* SWBA time (time before tbtt in msec) */ 53326d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_SWBA_TIME, 53336d1506e7SBartosz Markowski /* time period for updating VDEV stats */ 53346d1506e7SBartosz Markowski WMI_10X_VDEV_STATS_UPDATE_PERIOD, 53356d1506e7SBartosz Markowski /* age out time in msec for frames queued for station in power save */ 53366d1506e7SBartosz Markowski WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, 53376d1506e7SBartosz Markowski /* 53386d1506e7SBartosz Markowski * Host SWBA interval (time in msec before tbtt for SWBA event 53396d1506e7SBartosz Markowski * generation). 53406d1506e7SBartosz Markowski */ 53416d1506e7SBartosz Markowski WMI_10X_VDEV_HOST_SWBA_INTERVAL, 53426d1506e7SBartosz Markowski /* DTIM period (specified in units of num beacon intervals) */ 53436d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_DTIM_PERIOD, 53446d1506e7SBartosz Markowski /* 53456d1506e7SBartosz Markowski * scheduler air time limit for this VDEV. used by off chan 53466d1506e7SBartosz Markowski * scheduler. 53476d1506e7SBartosz Markowski */ 53486d1506e7SBartosz Markowski WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 53496d1506e7SBartosz Markowski /* enable/dsiable WDS for this VDEV */ 53506d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_WDS, 53516d1506e7SBartosz Markowski /* ATIM Window */ 53526d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_ATIM_WINDOW, 53536d1506e7SBartosz Markowski /* BMISS max */ 53546d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, 53556d1506e7SBartosz Markowski /* WMM enables/disabled */ 53566d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_FEATURE_WMM, 53576d1506e7SBartosz Markowski /* Channel width */ 53586d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_CHWIDTH, 53596d1506e7SBartosz Markowski /* Channel Offset */ 53606d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_CHEXTOFFSET, 53616d1506e7SBartosz Markowski /* Disable HT Protection */ 53626d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, 53636d1506e7SBartosz Markowski /* Quick STA Kickout */ 53646d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, 53656d1506e7SBartosz Markowski /* Rate to be used with Management frames */ 53666d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MGMT_RATE, 53676d1506e7SBartosz Markowski /* Protection Mode */ 53686d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_PROTECTION_MODE, 53696d1506e7SBartosz Markowski /* Fixed rate setting */ 53706d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_FIXED_RATE, 53716d1506e7SBartosz Markowski /* Short GI Enable/Disable */ 53726d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_SGI, 53736d1506e7SBartosz Markowski /* Enable LDPC */ 53746d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_LDPC, 53756d1506e7SBartosz Markowski /* Enable Tx STBC */ 53766d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_TX_STBC, 53776d1506e7SBartosz Markowski /* Enable Rx STBC */ 53786d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_RX_STBC, 53796d1506e7SBartosz Markowski /* Intra BSS forwarding */ 53806d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, 53816d1506e7SBartosz Markowski /* Setting Default xmit key for Vdev */ 53826d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_DEF_KEYID, 53836d1506e7SBartosz Markowski /* NSS width */ 53846d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_NSS, 53856d1506e7SBartosz Markowski /* Set the custom rate for the broadcast data frames */ 53866d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, 53876d1506e7SBartosz Markowski /* Set the custom rate (rate-code) for multicast data frames */ 53886d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, 53896d1506e7SBartosz Markowski /* Tx multicast packet indicate Enable/Disable */ 53906d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MCAST_INDICATE, 53916d1506e7SBartosz Markowski /* Tx DHCP packet indicate Enable/Disable */ 53926d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_DHCP_INDICATE, 53936d1506e7SBartosz Markowski /* Enable host inspection of Tx unicast packet to unknown destination */ 53946d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 53956d1506e7SBartosz Markowski 53966d1506e7SBartosz Markowski /* The minimum amount of time AP begins to consider STA inactive */ 53976d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 53986d1506e7SBartosz Markowski 53996d1506e7SBartosz Markowski /* 54006d1506e7SBartosz Markowski * An associated STA is considered inactive when there is no recent 54016d1506e7SBartosz Markowski * TX/RX activity and no downlink frames are buffered for it. Once a 54026d1506e7SBartosz Markowski * STA exceeds the maximum idle inactive time, the AP will send an 54036d1506e7SBartosz Markowski * 802.11 data-null as a keep alive to verify the STA is still 54046d1506e7SBartosz Markowski * associated. If the STA does ACK the data-null, or if the data-null 54056d1506e7SBartosz Markowski * is buffered and the STA does not retrieve it, the STA will be 54066d1506e7SBartosz Markowski * considered unresponsive 54076d1506e7SBartosz Markowski * (see WMI_10X_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS). 54086d1506e7SBartosz Markowski */ 54096d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 54106d1506e7SBartosz Markowski 54116d1506e7SBartosz Markowski /* 54126d1506e7SBartosz Markowski * An associated STA is considered unresponsive if there is no recent 54136d1506e7SBartosz Markowski * TX/RX activity and downlink frames are buffered for it. Once a STA 54146d1506e7SBartosz Markowski * exceeds the maximum unresponsive time, the AP will send a 541537ff1b0dSMarcin Rokicki * WMI_10X_STA_KICKOUT event to the host so the STA can be deleted. 541637ff1b0dSMarcin Rokicki */ 54176d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 54186d1506e7SBartosz Markowski 54196d1506e7SBartosz Markowski /* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */ 54206d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, 54216d1506e7SBartosz Markowski 54226d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, 54236d1506e7SBartosz Markowski /* Enable/Disable RTS-CTS */ 54246d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, 54256d1506e7SBartosz Markowski 54266d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 542724c88f78SMichal Kazior 542824c88f78SMichal Kazior /* following are available as of firmware 10.2 */ 542924c88f78SMichal Kazior WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE, 543024c88f78SMichal Kazior WMI_10X_VDEV_PARAM_CABQ_MAXDUR, 543124c88f78SMichal Kazior WMI_10X_VDEV_PARAM_MFPTEST_SET, 543224c88f78SMichal Kazior WMI_10X_VDEV_PARAM_RTS_FIXED_RATE, 543324c88f78SMichal Kazior WMI_10X_VDEV_PARAM_VHT_SGIMASK, 543424c88f78SMichal Kazior WMI_10X_VDEV_PARAM_VHT80_RATEMASK, 54359f0b7e7dSPeter Oh WMI_10X_VDEV_PARAM_TSF_INCREMENT, 54366d1506e7SBartosz Markowski }; 54376d1506e7SBartosz Markowski 543893841a15SRaja Mani enum wmi_10_4_vdev_param { 543993841a15SRaja Mani WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1, 544093841a15SRaja Mani WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 544193841a15SRaja Mani WMI_10_4_VDEV_PARAM_BEACON_INTERVAL, 544293841a15SRaja Mani WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL, 544393841a15SRaja Mani WMI_10_4_VDEV_PARAM_MULTICAST_RATE, 544493841a15SRaja Mani WMI_10_4_VDEV_PARAM_MGMT_TX_RATE, 544593841a15SRaja Mani WMI_10_4_VDEV_PARAM_SLOT_TIME, 544693841a15SRaja Mani WMI_10_4_VDEV_PARAM_PREAMBLE, 544793841a15SRaja Mani WMI_10_4_VDEV_PARAM_SWBA_TIME, 544893841a15SRaja Mani WMI_10_4_VDEV_STATS_UPDATE_PERIOD, 544993841a15SRaja Mani WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME, 545093841a15SRaja Mani WMI_10_4_VDEV_HOST_SWBA_INTERVAL, 545193841a15SRaja Mani WMI_10_4_VDEV_PARAM_DTIM_PERIOD, 545293841a15SRaja Mani WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 545393841a15SRaja Mani WMI_10_4_VDEV_PARAM_WDS, 545493841a15SRaja Mani WMI_10_4_VDEV_PARAM_ATIM_WINDOW, 545593841a15SRaja Mani WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX, 545693841a15SRaja Mani WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT, 545793841a15SRaja Mani WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT, 545893841a15SRaja Mani WMI_10_4_VDEV_PARAM_FEATURE_WMM, 545993841a15SRaja Mani WMI_10_4_VDEV_PARAM_CHWIDTH, 546093841a15SRaja Mani WMI_10_4_VDEV_PARAM_CHEXTOFFSET, 546193841a15SRaja Mani WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION, 546293841a15SRaja Mani WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT, 546393841a15SRaja Mani WMI_10_4_VDEV_PARAM_MGMT_RATE, 546493841a15SRaja Mani WMI_10_4_VDEV_PARAM_PROTECTION_MODE, 546593841a15SRaja Mani WMI_10_4_VDEV_PARAM_FIXED_RATE, 546693841a15SRaja Mani WMI_10_4_VDEV_PARAM_SGI, 546793841a15SRaja Mani WMI_10_4_VDEV_PARAM_LDPC, 546893841a15SRaja Mani WMI_10_4_VDEV_PARAM_TX_STBC, 546993841a15SRaja Mani WMI_10_4_VDEV_PARAM_RX_STBC, 547093841a15SRaja Mani WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD, 547193841a15SRaja Mani WMI_10_4_VDEV_PARAM_DEF_KEYID, 547293841a15SRaja Mani WMI_10_4_VDEV_PARAM_NSS, 547393841a15SRaja Mani WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE, 547493841a15SRaja Mani WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE, 547593841a15SRaja Mani WMI_10_4_VDEV_PARAM_MCAST_INDICATE, 547693841a15SRaja Mani WMI_10_4_VDEV_PARAM_DHCP_INDICATE, 547793841a15SRaja Mani WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 547893841a15SRaja Mani WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 547993841a15SRaja Mani WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 548093841a15SRaja Mani WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 548193841a15SRaja Mani WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS, 548293841a15SRaja Mani WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET, 548393841a15SRaja Mani WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS, 548493841a15SRaja Mani WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES, 548593841a15SRaja Mani WMI_10_4_VDEV_PARAM_TXBF, 548693841a15SRaja Mani WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE, 548793841a15SRaja Mani WMI_10_4_VDEV_PARAM_DROP_UNENCRY, 548893841a15SRaja Mani WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE, 548993841a15SRaja Mani WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 549093841a15SRaja Mani WMI_10_4_VDEV_PARAM_CABQ_MAXDUR, 549193841a15SRaja Mani WMI_10_4_VDEV_PARAM_MFPTEST_SET, 549293841a15SRaja Mani WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE, 549393841a15SRaja Mani WMI_10_4_VDEV_PARAM_VHT_SGIMASK, 549493841a15SRaja Mani WMI_10_4_VDEV_PARAM_VHT80_RATEMASK, 549593841a15SRaja Mani WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 549693841a15SRaja Mani WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 549793841a15SRaja Mani WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 549893841a15SRaja Mani WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP, 549993841a15SRaja Mani WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP, 550093841a15SRaja Mani WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 550193841a15SRaja Mani WMI_10_4_VDEV_PARAM_PROXY_STA, 550293841a15SRaja Mani WMI_10_4_VDEV_PARAM_MERU_VC, 550393841a15SRaja Mani WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE, 550493841a15SRaja Mani WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK, 55054857dd14SPeter Oh WMI_10_4_VDEV_PARAM_SENSOR_AP, 55064857dd14SPeter Oh WMI_10_4_VDEV_PARAM_BEACON_RATE, 55074857dd14SPeter Oh WMI_10_4_VDEV_PARAM_DTIM_ENABLE_CTS, 55084857dd14SPeter Oh WMI_10_4_VDEV_PARAM_STA_KICKOUT, 55094857dd14SPeter Oh WMI_10_4_VDEV_PARAM_CAPABILITIES, 55104857dd14SPeter Oh WMI_10_4_VDEV_PARAM_TSF_INCREMENT, 5511973324ffSPedersen, Thomas WMI_10_4_VDEV_PARAM_RX_FILTER, 5512973324ffSPedersen, Thomas WMI_10_4_VDEV_PARAM_MGMT_TX_POWER, 5513973324ffSPedersen, Thomas WMI_10_4_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 5514973324ffSPedersen, Thomas WMI_10_4_VDEV_PARAM_DISABLE_DYN_BW_RTS, 5515973324ffSPedersen, Thomas WMI_10_4_VDEV_PARAM_TSF_DECREMENT, 551668c295f2SSathishkumar Muruganandam WMI_10_4_VDEV_PARAM_SELFGEN_FIXED_RATE, 551768c295f2SSathishkumar Muruganandam WMI_10_4_VDEV_PARAM_AMPDU_SUBFRAME_SIZE_PER_AC, 551868c295f2SSathishkumar Muruganandam WMI_10_4_VDEV_PARAM_NSS_VHT160, 551968c295f2SSathishkumar Muruganandam WMI_10_4_VDEV_PARAM_NSS_VHT80_80, 552068c295f2SSathishkumar Muruganandam WMI_10_4_VDEV_PARAM_AMSDU_SUBFRAME_SIZE_PER_AC, 552168c295f2SSathishkumar Muruganandam WMI_10_4_VDEV_PARAM_DISABLE_CABQ, 552268c295f2SSathishkumar Muruganandam WMI_10_4_VDEV_PARAM_SIFS_TRIGGER_RATE, 552368c295f2SSathishkumar Muruganandam WMI_10_4_VDEV_PARAM_TX_POWER, 552468c295f2SSathishkumar Muruganandam WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE, 552568c295f2SSathishkumar Muruganandam WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN, 552693841a15SRaja Mani }; 552793841a15SRaja Mani 552868c295f2SSathishkumar Muruganandam #define WMI_VDEV_DISABLE_4_ADDR_SRC_LRN 1 552968c295f2SSathishkumar Muruganandam 5530139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 5531139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 5532139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 5533139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 5534139e170dSMichal Kazior 5535a48e2cc8SVivek Natarajan #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 55368cec57f5SBen Greear #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 55378cec57f5SBen Greear #define WMI_TXBF_CONF_IMPLICIT_BF BIT(7) 5538a48e2cc8SVivek Natarajan #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 5539a48e2cc8SVivek Natarajan #define WMI_BF_SOUND_DIM_OFFSET_MASK 0xf00 5540a48e2cc8SVivek Natarajan 55415e3dd157SKalle Valo /* slot time long */ 55425e3dd157SKalle Valo #define WMI_VDEV_SLOT_TIME_LONG 0x1 55435e3dd157SKalle Valo /* slot time short */ 55445e3dd157SKalle Valo #define WMI_VDEV_SLOT_TIME_SHORT 0x2 55455e3dd157SKalle Valo /* preablbe long */ 55465e3dd157SKalle Valo #define WMI_VDEV_PREAMBLE_LONG 0x1 55475e3dd157SKalle Valo /* preablbe short */ 55485e3dd157SKalle Valo #define WMI_VDEV_PREAMBLE_SHORT 0x2 55495e3dd157SKalle Valo 55505e3dd157SKalle Valo enum wmi_start_event_param { 55515e3dd157SKalle Valo WMI_VDEV_RESP_START_EVENT = 0, 55525e3dd157SKalle Valo WMI_VDEV_RESP_RESTART_EVENT, 55535e3dd157SKalle Valo }; 55545e3dd157SKalle Valo 55555e3dd157SKalle Valo struct wmi_vdev_start_response_event { 55565e3dd157SKalle Valo __le32 vdev_id; 55575e3dd157SKalle Valo __le32 req_id; 55585e3dd157SKalle Valo __le32 resp_type; /* %WMI_VDEV_RESP_ */ 55595e3dd157SKalle Valo __le32 status; 55605e3dd157SKalle Valo } __packed; 55615e3dd157SKalle Valo 55625e3dd157SKalle Valo struct wmi_vdev_standby_req_event { 55635e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 55645e3dd157SKalle Valo __le32 vdev_id; 55655e3dd157SKalle Valo } __packed; 55665e3dd157SKalle Valo 55675e3dd157SKalle Valo struct wmi_vdev_resume_req_event { 55685e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 55695e3dd157SKalle Valo __le32 vdev_id; 55705e3dd157SKalle Valo } __packed; 55715e3dd157SKalle Valo 55725e3dd157SKalle Valo struct wmi_vdev_stopped_event { 55735e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 55745e3dd157SKalle Valo __le32 vdev_id; 55755e3dd157SKalle Valo } __packed; 55765e3dd157SKalle Valo 55775e3dd157SKalle Valo /* 55785e3dd157SKalle Valo * common structure used for simple events 55795e3dd157SKalle Valo * (stopped, resume_req, standby response) 55805e3dd157SKalle Valo */ 55815e3dd157SKalle Valo struct wmi_vdev_simple_event { 55825e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 55835e3dd157SKalle Valo __le32 vdev_id; 55845e3dd157SKalle Valo } __packed; 55855e3dd157SKalle Valo 55865e3dd157SKalle Valo /* VDEV start response status codes */ 5587e13dbeadSJoe Perches /* VDEV successfully started */ 55885e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0 55895e3dd157SKalle Valo 55905e3dd157SKalle Valo /* requested VDEV not found */ 55915e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID 0x1 55925e3dd157SKalle Valo 55935e3dd157SKalle Valo /* unsupported VDEV combination */ 55945e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED 0x2 55955e3dd157SKalle Valo 5596855aed12SSimon Wunderlich /* TODO: please add more comments if you have in-depth information */ 5597855aed12SSimon Wunderlich struct wmi_vdev_spectral_conf_cmd { 5598855aed12SSimon Wunderlich __le32 vdev_id; 5599855aed12SSimon Wunderlich 5600855aed12SSimon Wunderlich /* number of fft samples to send (0 for infinite) */ 5601855aed12SSimon Wunderlich __le32 scan_count; 5602855aed12SSimon Wunderlich __le32 scan_period; 5603855aed12SSimon Wunderlich __le32 scan_priority; 5604855aed12SSimon Wunderlich 5605855aed12SSimon Wunderlich /* number of bins in the FFT: 2^(fft_size - bin_scale) */ 5606855aed12SSimon Wunderlich __le32 scan_fft_size; 5607855aed12SSimon Wunderlich __le32 scan_gc_ena; 5608855aed12SSimon Wunderlich __le32 scan_restart_ena; 5609855aed12SSimon Wunderlich __le32 scan_noise_floor_ref; 5610855aed12SSimon Wunderlich __le32 scan_init_delay; 5611855aed12SSimon Wunderlich __le32 scan_nb_tone_thr; 5612855aed12SSimon Wunderlich __le32 scan_str_bin_thr; 5613855aed12SSimon Wunderlich __le32 scan_wb_rpt_mode; 5614855aed12SSimon Wunderlich __le32 scan_rssi_rpt_mode; 5615855aed12SSimon Wunderlich __le32 scan_rssi_thr; 5616855aed12SSimon Wunderlich __le32 scan_pwr_format; 5617855aed12SSimon Wunderlich 5618855aed12SSimon Wunderlich /* rpt_mode: Format of FFT report to software for spectral scan 5619855aed12SSimon Wunderlich * triggered FFTs: 5620855aed12SSimon Wunderlich * 0: No FFT report (only spectral scan summary report) 5621855aed12SSimon Wunderlich * 1: 2-dword summary of metrics for each completed FFT + spectral 5622855aed12SSimon Wunderlich * scan summary report 5623855aed12SSimon Wunderlich * 2: 2-dword summary of metrics for each completed FFT + 5624855aed12SSimon Wunderlich * 1x- oversampled bins(in-band) per FFT + spectral scan summary 5625855aed12SSimon Wunderlich * report 5626855aed12SSimon Wunderlich * 3: 2-dword summary of metrics for each completed FFT + 5627855aed12SSimon Wunderlich * 2x- oversampled bins (all) per FFT + spectral scan summary 5628855aed12SSimon Wunderlich */ 5629855aed12SSimon Wunderlich __le32 scan_rpt_mode; 5630855aed12SSimon Wunderlich __le32 scan_bin_scale; 5631855aed12SSimon Wunderlich __le32 scan_dbm_adj; 5632855aed12SSimon Wunderlich __le32 scan_chn_mask; 5633855aed12SSimon Wunderlich } __packed; 5634855aed12SSimon Wunderlich 5635855aed12SSimon Wunderlich struct wmi_vdev_spectral_conf_arg { 5636855aed12SSimon Wunderlich u32 vdev_id; 5637855aed12SSimon Wunderlich u32 scan_count; 5638855aed12SSimon Wunderlich u32 scan_period; 5639855aed12SSimon Wunderlich u32 scan_priority; 5640855aed12SSimon Wunderlich u32 scan_fft_size; 5641855aed12SSimon Wunderlich u32 scan_gc_ena; 5642855aed12SSimon Wunderlich u32 scan_restart_ena; 5643855aed12SSimon Wunderlich u32 scan_noise_floor_ref; 5644855aed12SSimon Wunderlich u32 scan_init_delay; 5645855aed12SSimon Wunderlich u32 scan_nb_tone_thr; 5646855aed12SSimon Wunderlich u32 scan_str_bin_thr; 5647855aed12SSimon Wunderlich u32 scan_wb_rpt_mode; 5648855aed12SSimon Wunderlich u32 scan_rssi_rpt_mode; 5649855aed12SSimon Wunderlich u32 scan_rssi_thr; 5650855aed12SSimon Wunderlich u32 scan_pwr_format; 5651855aed12SSimon Wunderlich u32 scan_rpt_mode; 5652855aed12SSimon Wunderlich u32 scan_bin_scale; 5653855aed12SSimon Wunderlich u32 scan_dbm_adj; 5654855aed12SSimon Wunderlich u32 scan_chn_mask; 5655855aed12SSimon Wunderlich }; 5656855aed12SSimon Wunderlich 5657855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_DEFAULT 0 5658855aed12SSimon Wunderlich #define WMI_SPECTRAL_COUNT_DEFAULT 0 5659855aed12SSimon Wunderlich #define WMI_SPECTRAL_PERIOD_DEFAULT 35 5660855aed12SSimon Wunderlich #define WMI_SPECTRAL_PRIORITY_DEFAULT 1 5661855aed12SSimon Wunderlich #define WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 5662855aed12SSimon Wunderlich #define WMI_SPECTRAL_GC_ENA_DEFAULT 1 5663855aed12SSimon Wunderlich #define WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 5664855aed12SSimon Wunderlich #define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 5665855aed12SSimon Wunderlich #define WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 5666855aed12SSimon Wunderlich #define WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 5667855aed12SSimon Wunderlich #define WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 5668855aed12SSimon Wunderlich #define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 5669855aed12SSimon Wunderlich #define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 5670855aed12SSimon Wunderlich #define WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 5671855aed12SSimon Wunderlich #define WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 5672855aed12SSimon Wunderlich #define WMI_SPECTRAL_RPT_MODE_DEFAULT 2 5673855aed12SSimon Wunderlich #define WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 5674855aed12SSimon Wunderlich #define WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 5675855aed12SSimon Wunderlich #define WMI_SPECTRAL_CHN_MASK_DEFAULT 1 5676855aed12SSimon Wunderlich 5677855aed12SSimon Wunderlich struct wmi_vdev_spectral_enable_cmd { 5678855aed12SSimon Wunderlich __le32 vdev_id; 5679855aed12SSimon Wunderlich __le32 trigger_cmd; 5680855aed12SSimon Wunderlich __le32 enable_cmd; 5681855aed12SSimon Wunderlich } __packed; 5682855aed12SSimon Wunderlich 5683855aed12SSimon Wunderlich #define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 5684855aed12SSimon Wunderlich #define WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 5685855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 5686855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 5687855aed12SSimon Wunderlich 56885e3dd157SKalle Valo /* Beacon processing related command and event structures */ 56895e3dd157SKalle Valo struct wmi_bcn_tx_hdr { 56905e3dd157SKalle Valo __le32 vdev_id; 56915e3dd157SKalle Valo __le32 tx_rate; 56925e3dd157SKalle Valo __le32 tx_power; 56935e3dd157SKalle Valo __le32 bcn_len; 56945e3dd157SKalle Valo } __packed; 56955e3dd157SKalle Valo 56965e3dd157SKalle Valo struct wmi_bcn_tx_cmd { 56975e3dd157SKalle Valo struct wmi_bcn_tx_hdr hdr; 56985e3dd157SKalle Valo u8 *bcn[0]; 56995e3dd157SKalle Valo } __packed; 57005e3dd157SKalle Valo 57015e3dd157SKalle Valo struct wmi_bcn_tx_arg { 57025e3dd157SKalle Valo u32 vdev_id; 57035e3dd157SKalle Valo u32 tx_rate; 57045e3dd157SKalle Valo u32 tx_power; 57055e3dd157SKalle Valo u32 bcn_len; 57065e3dd157SKalle Valo const void *bcn; 57075e3dd157SKalle Valo }; 57085e3dd157SKalle Valo 5709748afc47SMichal Kazior enum wmi_bcn_tx_ref_flags { 5710748afc47SMichal Kazior WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1, 5711748afc47SMichal Kazior WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2, 5712748afc47SMichal Kazior }; 5713748afc47SMichal Kazior 571424c88f78SMichal Kazior /* TODO: It is unclear why "no antenna" works while any other seemingly valid 571524c88f78SMichal Kazior * chainmask yields no beacons on the air at all. 571624c88f78SMichal Kazior */ 571724c88f78SMichal Kazior #define WMI_BCN_TX_REF_DEF_ANTENNA 0 571824c88f78SMichal Kazior 5719748afc47SMichal Kazior struct wmi_bcn_tx_ref_cmd { 5720748afc47SMichal Kazior __le32 vdev_id; 5721748afc47SMichal Kazior __le32 data_len; 5722748afc47SMichal Kazior /* physical address of the frame - dma pointer */ 5723748afc47SMichal Kazior __le32 data_ptr; 5724748afc47SMichal Kazior /* id for host to track */ 5725748afc47SMichal Kazior __le32 msdu_id; 5726748afc47SMichal Kazior /* frame ctrl to setup PPDU desc */ 5727748afc47SMichal Kazior __le32 frame_control; 5728748afc47SMichal Kazior /* to control CABQ traffic: WMI_BCN_TX_REF_FLAG_ */ 5729748afc47SMichal Kazior __le32 flags; 573024c88f78SMichal Kazior /* introduced in 10.2 */ 573124c88f78SMichal Kazior __le32 antenna_mask; 5732748afc47SMichal Kazior } __packed; 5733748afc47SMichal Kazior 57345e3dd157SKalle Valo /* Beacon filter */ 57355e3dd157SKalle Valo #define WMI_BCN_FILTER_ALL 0 /* Filter all beacons */ 57365e3dd157SKalle Valo #define WMI_BCN_FILTER_NONE 1 /* Pass all beacons */ 57375e3dd157SKalle Valo #define WMI_BCN_FILTER_RSSI 2 /* Pass Beacons RSSI >= RSSI threshold */ 57385e3dd157SKalle Valo #define WMI_BCN_FILTER_BSSID 3 /* Pass Beacons with matching BSSID */ 57395e3dd157SKalle Valo #define WMI_BCN_FILTER_SSID 4 /* Pass Beacons with matching SSID */ 57405e3dd157SKalle Valo 57415e3dd157SKalle Valo struct wmi_bcn_filter_rx_cmd { 57425e3dd157SKalle Valo /* Filter ID */ 57435e3dd157SKalle Valo __le32 bcn_filter_id; 57445e3dd157SKalle Valo /* Filter type - wmi_bcn_filter */ 57455e3dd157SKalle Valo __le32 bcn_filter; 57465e3dd157SKalle Valo /* Buffer len */ 57475e3dd157SKalle Valo __le32 bcn_filter_len; 57485e3dd157SKalle Valo /* Filter info (threshold, BSSID, RSSI) */ 57495e3dd157SKalle Valo u8 *bcn_filter_buf; 57505e3dd157SKalle Valo } __packed; 57515e3dd157SKalle Valo 57525e3dd157SKalle Valo /* Capabilities and IEs to be passed to firmware */ 57535e3dd157SKalle Valo struct wmi_bcn_prb_info { 57545e3dd157SKalle Valo /* Capabilities */ 57555e3dd157SKalle Valo __le32 caps; 57565e3dd157SKalle Valo /* ERP info */ 57575e3dd157SKalle Valo __le32 erp; 57585e3dd157SKalle Valo /* Advanced capabilities */ 57595e3dd157SKalle Valo /* HT capabilities */ 57605e3dd157SKalle Valo /* HT Info */ 57615e3dd157SKalle Valo /* ibss_dfs */ 57625e3dd157SKalle Valo /* wpa Info */ 57635e3dd157SKalle Valo /* rsn Info */ 57645e3dd157SKalle Valo /* rrm info */ 57655e3dd157SKalle Valo /* ath_ext */ 57665e3dd157SKalle Valo /* app IE */ 57675e3dd157SKalle Valo } __packed; 57685e3dd157SKalle Valo 57695e3dd157SKalle Valo struct wmi_bcn_tmpl_cmd { 57705e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 57715e3dd157SKalle Valo __le32 vdev_id; 57725e3dd157SKalle Valo /* TIM IE offset from the beginning of the template. */ 57735e3dd157SKalle Valo __le32 tim_ie_offset; 57745e3dd157SKalle Valo /* beacon probe capabilities and IEs */ 57755e3dd157SKalle Valo struct wmi_bcn_prb_info bcn_prb_info; 57765e3dd157SKalle Valo /* beacon buffer length */ 57775e3dd157SKalle Valo __le32 buf_len; 57785e3dd157SKalle Valo /* variable length data */ 57795e3dd157SKalle Valo u8 data[1]; 57805e3dd157SKalle Valo } __packed; 57815e3dd157SKalle Valo 57825e3dd157SKalle Valo struct wmi_prb_tmpl_cmd { 57835e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 57845e3dd157SKalle Valo __le32 vdev_id; 57855e3dd157SKalle Valo /* beacon probe capabilities and IEs */ 57865e3dd157SKalle Valo struct wmi_bcn_prb_info bcn_prb_info; 57875e3dd157SKalle Valo /* beacon buffer length */ 57885e3dd157SKalle Valo __le32 buf_len; 57895e3dd157SKalle Valo /* Variable length data */ 57905e3dd157SKalle Valo u8 data[1]; 57915e3dd157SKalle Valo } __packed; 57925e3dd157SKalle Valo 57935e3dd157SKalle Valo enum wmi_sta_ps_mode { 57945e3dd157SKalle Valo /* enable power save for the given STA VDEV */ 57955e3dd157SKalle Valo WMI_STA_PS_MODE_DISABLED = 0, 57965e3dd157SKalle Valo /* disable power save for a given STA VDEV */ 57975e3dd157SKalle Valo WMI_STA_PS_MODE_ENABLED = 1, 57985e3dd157SKalle Valo }; 57995e3dd157SKalle Valo 58005e3dd157SKalle Valo struct wmi_sta_powersave_mode_cmd { 58015e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 58025e3dd157SKalle Valo __le32 vdev_id; 58035e3dd157SKalle Valo 58045e3dd157SKalle Valo /* 58055e3dd157SKalle Valo * Power save mode 58065e3dd157SKalle Valo * (see enum wmi_sta_ps_mode) 58075e3dd157SKalle Valo */ 58085e3dd157SKalle Valo __le32 sta_ps_mode; 58095e3dd157SKalle Valo } __packed; 58105e3dd157SKalle Valo 58115e3dd157SKalle Valo enum wmi_csa_offload_en { 58125e3dd157SKalle Valo WMI_CSA_OFFLOAD_DISABLE = 0, 58135e3dd157SKalle Valo WMI_CSA_OFFLOAD_ENABLE = 1, 58145e3dd157SKalle Valo }; 58155e3dd157SKalle Valo 58165e3dd157SKalle Valo struct wmi_csa_offload_enable_cmd { 58175e3dd157SKalle Valo __le32 vdev_id; 58185e3dd157SKalle Valo __le32 csa_offload_enable; 58195e3dd157SKalle Valo } __packed; 58205e3dd157SKalle Valo 58215e3dd157SKalle Valo struct wmi_csa_offload_chanswitch_cmd { 58225e3dd157SKalle Valo __le32 vdev_id; 58235e3dd157SKalle Valo struct wmi_channel chan; 58245e3dd157SKalle Valo } __packed; 58255e3dd157SKalle Valo 58265e3dd157SKalle Valo /* 58275e3dd157SKalle Valo * This parameter controls the policy for retrieving frames from AP while the 58285e3dd157SKalle Valo * STA is in sleep state. 58295e3dd157SKalle Valo * 58305e3dd157SKalle Valo * Only takes affect if the sta_ps_mode is enabled 58315e3dd157SKalle Valo */ 58325e3dd157SKalle Valo enum wmi_sta_ps_param_rx_wake_policy { 58335e3dd157SKalle Valo /* 58345e3dd157SKalle Valo * Wake up when ever there is an RX activity on the VDEV. In this mode 58355e3dd157SKalle Valo * the Power save SM(state machine) will come out of sleep by either 58365e3dd157SKalle Valo * sending null frame (or) a data frame (with PS==0) in response to TIM 58375e3dd157SKalle Valo * bit set in the received beacon frame from AP. 58385e3dd157SKalle Valo */ 58395e3dd157SKalle Valo WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 58405e3dd157SKalle Valo 58415e3dd157SKalle Valo /* 58425e3dd157SKalle Valo * Here the power save state machine will not wakeup in response to TIM 58435e3dd157SKalle Valo * bit, instead it will send a PSPOLL (or) UASPD trigger based on UAPSD 58445e3dd157SKalle Valo * configuration setup by WMISET_PS_SET_UAPSD WMI command. When all 58455e3dd157SKalle Valo * access categories are delivery-enabled, the station will send a 58465e3dd157SKalle Valo * UAPSD trigger frame, otherwise it will send a PS-Poll. 58475e3dd157SKalle Valo */ 58485e3dd157SKalle Valo WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 58495e3dd157SKalle Valo }; 58505e3dd157SKalle Valo 58515e3dd157SKalle Valo /* 58525e3dd157SKalle Valo * Number of tx frames/beacon that cause the power save SM to wake up. 58535e3dd157SKalle Valo * 58545e3dd157SKalle Valo * Value 1 causes the SM to wake up for every TX. Value 0 has a special 58555e3dd157SKalle Valo * meaning, It will cause the SM to never wake up. This is useful if you want 58565e3dd157SKalle Valo * to keep the system to sleep all the time for some kind of test mode . host 58575e3dd157SKalle Valo * can change this parameter any time. It will affect at the next tx frame. 58585e3dd157SKalle Valo */ 58595e3dd157SKalle Valo enum wmi_sta_ps_param_tx_wake_threshold { 58605e3dd157SKalle Valo WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 58615e3dd157SKalle Valo WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 58625e3dd157SKalle Valo 58635e3dd157SKalle Valo /* 58645e3dd157SKalle Valo * Values greater than one indicate that many TX attempts per beacon 58655e3dd157SKalle Valo * interval before the STA will wake up 58665e3dd157SKalle Valo */ 58675e3dd157SKalle Valo }; 58685e3dd157SKalle Valo 58695e3dd157SKalle Valo /* 58705e3dd157SKalle Valo * The maximum number of PS-Poll frames the FW will send in response to 58715e3dd157SKalle Valo * traffic advertised in TIM before waking up (by sending a null frame with PS 58725e3dd157SKalle Valo * = 0). Value 0 has a special meaning: there is no maximum count and the FW 58735e3dd157SKalle Valo * will send as many PS-Poll as are necessary to retrieve buffered BU. This 58745e3dd157SKalle Valo * parameter is used when the RX wake policy is 58755e3dd157SKalle Valo * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 58765e3dd157SKalle Valo * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 58775e3dd157SKalle Valo */ 58785e3dd157SKalle Valo enum wmi_sta_ps_param_pspoll_count { 58795e3dd157SKalle Valo WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 58805e3dd157SKalle Valo /* 58815e3dd157SKalle Valo * Values greater than 0 indicate the maximum numer of PS-Poll frames 58825e3dd157SKalle Valo * FW will send before waking up. 58835e3dd157SKalle Valo */ 58849f9b5746SMichal Kazior 58859f9b5746SMichal Kazior /* When u-APSD is enabled the firmware will be very reluctant to exit 58869f9b5746SMichal Kazior * STA PS. This could result in very poor Rx performance with STA doing 58879f9b5746SMichal Kazior * PS-Poll for each and every buffered frame. This value is a bit 58889f9b5746SMichal Kazior * arbitrary. 58899f9b5746SMichal Kazior */ 58909f9b5746SMichal Kazior WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3, 58915e3dd157SKalle Valo }; 58925e3dd157SKalle Valo 58935e3dd157SKalle Valo /* 58945e3dd157SKalle Valo * This will include the delivery and trigger enabled state for every AC. 58955e3dd157SKalle Valo * This is the negotiated state with AP. The host MLME needs to set this based 58965e3dd157SKalle Valo * on AP capability and the state Set in the association request by the 58975e3dd157SKalle Valo * station MLME.Lower 8 bits of the value specify the UAPSD configuration. 58985e3dd157SKalle Valo */ 58995e3dd157SKalle Valo #define WMI_UAPSD_AC_TYPE_DELI 0 59005e3dd157SKalle Valo #define WMI_UAPSD_AC_TYPE_TRIG 1 59015e3dd157SKalle Valo 59025e3dd157SKalle Valo #define WMI_UAPSD_AC_BIT_MASK(ac, type) \ 5903e13dbeadSJoe Perches (type == WMI_UAPSD_AC_TYPE_DELI ? 1 << (ac << 1) : 1 << ((ac << 1) + 1)) 59045e3dd157SKalle Valo 59055e3dd157SKalle Valo enum wmi_sta_ps_param_uapsd { 59065e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 59075e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 59085e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 59095e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 59105e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 59115e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 59125e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 59135e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 59145e3dd157SKalle Valo }; 59155e3dd157SKalle Valo 59160c7e477cSJanusz Dziedzic #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX 59170c7e477cSJanusz Dziedzic 59180c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_param { 59190c7e477cSJanusz Dziedzic __le32 wmm_ac; 59200c7e477cSJanusz Dziedzic __le32 user_priority; 59210c7e477cSJanusz Dziedzic __le32 service_interval; 59220c7e477cSJanusz Dziedzic __le32 suspend_interval; 59230c7e477cSJanusz Dziedzic __le32 delay_interval; 59240c7e477cSJanusz Dziedzic }; 59250c7e477cSJanusz Dziedzic 59260c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_cmd_fixed_param { 59270c7e477cSJanusz Dziedzic __le32 vdev_id; 59280c7e477cSJanusz Dziedzic struct wmi_mac_addr peer_macaddr; 59290c7e477cSJanusz Dziedzic __le32 num_ac; 59300c7e477cSJanusz Dziedzic }; 59310c7e477cSJanusz Dziedzic 59320c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_arg { 59330c7e477cSJanusz Dziedzic u32 wmm_ac; 59340c7e477cSJanusz Dziedzic u32 user_priority; 59350c7e477cSJanusz Dziedzic u32 service_interval; 59360c7e477cSJanusz Dziedzic u32 suspend_interval; 59370c7e477cSJanusz Dziedzic u32 delay_interval; 59380c7e477cSJanusz Dziedzic }; 59390c7e477cSJanusz Dziedzic 59405e3dd157SKalle Valo enum wmi_sta_powersave_param { 59415e3dd157SKalle Valo /* 59425e3dd157SKalle Valo * Controls how frames are retrievd from AP while STA is sleeping 59435e3dd157SKalle Valo * 59445e3dd157SKalle Valo * (see enum wmi_sta_ps_param_rx_wake_policy) 59455e3dd157SKalle Valo */ 59465e3dd157SKalle Valo WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 59475e3dd157SKalle Valo 59485e3dd157SKalle Valo /* 59495e3dd157SKalle Valo * The STA will go active after this many TX 59505e3dd157SKalle Valo * 59515e3dd157SKalle Valo * (see enum wmi_sta_ps_param_tx_wake_threshold) 59525e3dd157SKalle Valo */ 59535e3dd157SKalle Valo WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 59545e3dd157SKalle Valo 59555e3dd157SKalle Valo /* 59565e3dd157SKalle Valo * Number of PS-Poll to send before STA wakes up 59575e3dd157SKalle Valo * 59585e3dd157SKalle Valo * (see enum wmi_sta_ps_param_pspoll_count) 59595e3dd157SKalle Valo * 59605e3dd157SKalle Valo */ 59615e3dd157SKalle Valo WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 59625e3dd157SKalle Valo 59635e3dd157SKalle Valo /* 59645e3dd157SKalle Valo * TX/RX inactivity time in msec before going to sleep. 59655e3dd157SKalle Valo * 59665e3dd157SKalle Valo * The power save SM will monitor tx/rx activity on the VDEV, if no 59675e3dd157SKalle Valo * activity for the specified msec of the parameter the Power save 59685e3dd157SKalle Valo * SM will go to sleep. 59695e3dd157SKalle Valo */ 59705e3dd157SKalle Valo WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 59715e3dd157SKalle Valo 59725e3dd157SKalle Valo /* 59735e3dd157SKalle Valo * Set uapsd configuration. 59745e3dd157SKalle Valo * 59755e3dd157SKalle Valo * (see enum wmi_sta_ps_param_uapsd) 59765e3dd157SKalle Valo */ 59775e3dd157SKalle Valo WMI_STA_PS_PARAM_UAPSD = 4, 59785e3dd157SKalle Valo }; 59795e3dd157SKalle Valo 59805e3dd157SKalle Valo struct wmi_sta_powersave_param_cmd { 59815e3dd157SKalle Valo __le32 vdev_id; 59825e3dd157SKalle Valo __le32 param_id; /* %WMI_STA_PS_PARAM_ */ 59835e3dd157SKalle Valo __le32 param_value; 59845e3dd157SKalle Valo } __packed; 59855e3dd157SKalle Valo 59865e3dd157SKalle Valo /* No MIMO power save */ 59875e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_DISABLE 59885e3dd157SKalle Valo /* mimo powersave mode static*/ 59895e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_STATIC 59905e3dd157SKalle Valo /* mimo powersave mode dynamic */ 59915e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_DYNAMIC 59925e3dd157SKalle Valo 59935e3dd157SKalle Valo struct wmi_sta_mimo_ps_mode_cmd { 59945e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 59955e3dd157SKalle Valo __le32 vdev_id; 59965e3dd157SKalle Valo /* mimo powersave mode as defined above */ 59975e3dd157SKalle Valo __le32 mimo_pwrsave_mode; 59985e3dd157SKalle Valo } __packed; 59995e3dd157SKalle Valo 60005e3dd157SKalle Valo /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 60015e3dd157SKalle Valo enum wmi_ap_ps_param_uapsd { 60025e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 60035e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 60045e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 60055e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 60065e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 60075e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 60085e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 60095e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 60105e3dd157SKalle Valo }; 60115e3dd157SKalle Valo 60125e3dd157SKalle Valo /* U-APSD maximum service period of peer station */ 60135e3dd157SKalle Valo enum wmi_ap_ps_peer_param_max_sp { 60145e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 60155e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 60165e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 60175e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 60185e3dd157SKalle Valo MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 60195e3dd157SKalle Valo }; 60205e3dd157SKalle Valo 60215e3dd157SKalle Valo /* 60225e3dd157SKalle Valo * AP power save parameter 60235e3dd157SKalle Valo * Set a power save specific parameter for a peer station 60245e3dd157SKalle Valo */ 60255e3dd157SKalle Valo enum wmi_ap_ps_peer_param { 60265e3dd157SKalle Valo /* Set uapsd configuration for a given peer. 60275e3dd157SKalle Valo * 60285e3dd157SKalle Valo * Include the delivery and trigger enabled state for every AC. 60295e3dd157SKalle Valo * The host MLME needs to set this based on AP capability and stations 60305e3dd157SKalle Valo * request Set in the association request received from the station. 60315e3dd157SKalle Valo * 60325e3dd157SKalle Valo * Lower 8 bits of the value specify the UAPSD configuration. 60335e3dd157SKalle Valo * 60345e3dd157SKalle Valo * (see enum wmi_ap_ps_param_uapsd) 60355e3dd157SKalle Valo * The default value is 0. 60365e3dd157SKalle Valo */ 60375e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_UAPSD = 0, 60385e3dd157SKalle Valo 60395e3dd157SKalle Valo /* 60405e3dd157SKalle Valo * Set the service period for a UAPSD capable station 60415e3dd157SKalle Valo * 60425e3dd157SKalle Valo * The service period from wme ie in the (re)assoc request frame. 60435e3dd157SKalle Valo * 60445e3dd157SKalle Valo * (see enum wmi_ap_ps_peer_param_max_sp) 60455e3dd157SKalle Valo */ 60465e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 60475e3dd157SKalle Valo 60485e3dd157SKalle Valo /* Time in seconds for aging out buffered frames for STA in PS */ 60495e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 60505e3dd157SKalle Valo }; 60515e3dd157SKalle Valo 60525e3dd157SKalle Valo struct wmi_ap_ps_peer_cmd { 60535e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 60545e3dd157SKalle Valo __le32 vdev_id; 60555e3dd157SKalle Valo 60565e3dd157SKalle Valo /* peer MAC address */ 60575e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 60585e3dd157SKalle Valo 60595e3dd157SKalle Valo /* AP powersave param (see enum wmi_ap_ps_peer_param) */ 60605e3dd157SKalle Valo __le32 param_id; 60615e3dd157SKalle Valo 60625e3dd157SKalle Valo /* AP powersave param value */ 60635e3dd157SKalle Valo __le32 param_value; 60645e3dd157SKalle Valo } __packed; 60655e3dd157SKalle Valo 60665e3dd157SKalle Valo /* 128 clients = 4 words */ 60675e3dd157SKalle Valo #define WMI_TIM_BITMAP_ARRAY_SIZE 4 60685e3dd157SKalle Valo 60695e3dd157SKalle Valo struct wmi_tim_info { 60705e3dd157SKalle Valo __le32 tim_len; 60715e3dd157SKalle Valo __le32 tim_mcast; 60725e3dd157SKalle Valo __le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE]; 60735e3dd157SKalle Valo __le32 tim_changed; 60745e3dd157SKalle Valo __le32 tim_num_ps_pending; 60755e3dd157SKalle Valo } __packed; 60765e3dd157SKalle Valo 6077a03fee34SRaja Mani struct wmi_tim_info_arg { 6078a03fee34SRaja Mani __le32 tim_len; 6079a03fee34SRaja Mani __le32 tim_mcast; 6080a03fee34SRaja Mani const __le32 *tim_bitmap; 6081a03fee34SRaja Mani __le32 tim_changed; 6082a03fee34SRaja Mani __le32 tim_num_ps_pending; 6083a03fee34SRaja Mani } __packed; 6084a03fee34SRaja Mani 60855e3dd157SKalle Valo /* Maximum number of NOA Descriptors supported */ 60865e3dd157SKalle Valo #define WMI_P2P_MAX_NOA_DESCRIPTORS 4 60875e3dd157SKalle Valo #define WMI_P2P_OPPPS_ENABLE_BIT BIT(0) 60885e3dd157SKalle Valo #define WMI_P2P_OPPPS_CTWINDOW_OFFSET 1 60895e3dd157SKalle Valo #define WMI_P2P_NOA_CHANGED_BIT BIT(0) 60905e3dd157SKalle Valo 60915e3dd157SKalle Valo struct wmi_p2p_noa_info { 60925e3dd157SKalle Valo /* Bit 0 - Flag to indicate an update in NOA schedule 609337ff1b0dSMarcin Rokicki * Bits 7-1 - Reserved 609437ff1b0dSMarcin Rokicki */ 60955e3dd157SKalle Valo u8 changed; 60965e3dd157SKalle Valo /* NOA index */ 60975e3dd157SKalle Valo u8 index; 60985e3dd157SKalle Valo /* Bit 0 - Opp PS state of the AP 609937ff1b0dSMarcin Rokicki * Bits 1-7 - Ctwindow in TUs 610037ff1b0dSMarcin Rokicki */ 61015e3dd157SKalle Valo u8 ctwindow_oppps; 61025e3dd157SKalle Valo /* Number of NOA descriptors */ 61035e3dd157SKalle Valo u8 num_descriptors; 61045e3dd157SKalle Valo 61055e3dd157SKalle Valo struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS]; 61065e3dd157SKalle Valo } __packed; 61075e3dd157SKalle Valo 61085e3dd157SKalle Valo struct wmi_bcn_info { 61095e3dd157SKalle Valo struct wmi_tim_info tim_info; 61105e3dd157SKalle Valo struct wmi_p2p_noa_info p2p_noa_info; 61115e3dd157SKalle Valo } __packed; 61125e3dd157SKalle Valo 61135e3dd157SKalle Valo struct wmi_host_swba_event { 61145e3dd157SKalle Valo __le32 vdev_map; 611532653cf1SMichal Kazior struct wmi_bcn_info bcn_info[0]; 61165e3dd157SKalle Valo } __packed; 61175e3dd157SKalle Valo 61188b019fb0SYanbo Li struct wmi_10_2_4_bcn_info { 61198b019fb0SYanbo Li struct wmi_tim_info tim_info; 61208b019fb0SYanbo Li /* The 10.2.4 FW doesn't have p2p NOA info */ 61218b019fb0SYanbo Li } __packed; 61228b019fb0SYanbo Li 61238b019fb0SYanbo Li struct wmi_10_2_4_host_swba_event { 61248b019fb0SYanbo Li __le32 vdev_map; 61258b019fb0SYanbo Li struct wmi_10_2_4_bcn_info bcn_info[0]; 61268b019fb0SYanbo Li } __packed; 61278b019fb0SYanbo Li 61283cec3be3SRaja Mani /* 16 words = 512 client + 1 word = for guard */ 61293cec3be3SRaja Mani #define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17 61303cec3be3SRaja Mani 61313cec3be3SRaja Mani struct wmi_10_4_tim_info { 61323cec3be3SRaja Mani __le32 tim_len; 61333cec3be3SRaja Mani __le32 tim_mcast; 61343cec3be3SRaja Mani __le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE]; 61353cec3be3SRaja Mani __le32 tim_changed; 61363cec3be3SRaja Mani __le32 tim_num_ps_pending; 61373cec3be3SRaja Mani } __packed; 61383cec3be3SRaja Mani 61393cec3be3SRaja Mani #define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1 61403cec3be3SRaja Mani 61413cec3be3SRaja Mani struct wmi_10_4_p2p_noa_info { 61423cec3be3SRaja Mani /* Bit 0 - Flag to indicate an update in NOA schedule 61433cec3be3SRaja Mani * Bits 7-1 - Reserved 61443cec3be3SRaja Mani */ 61453cec3be3SRaja Mani u8 changed; 61463cec3be3SRaja Mani /* NOA index */ 61473cec3be3SRaja Mani u8 index; 61483cec3be3SRaja Mani /* Bit 0 - Opp PS state of the AP 61493cec3be3SRaja Mani * Bits 1-7 - Ctwindow in TUs 61503cec3be3SRaja Mani */ 61513cec3be3SRaja Mani u8 ctwindow_oppps; 61523cec3be3SRaja Mani /* Number of NOA descriptors */ 61533cec3be3SRaja Mani u8 num_descriptors; 61543cec3be3SRaja Mani 61553cec3be3SRaja Mani struct wmi_p2p_noa_descriptor 61563cec3be3SRaja Mani noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS]; 61573cec3be3SRaja Mani } __packed; 61583cec3be3SRaja Mani 61593cec3be3SRaja Mani struct wmi_10_4_bcn_info { 61603cec3be3SRaja Mani struct wmi_10_4_tim_info tim_info; 61613cec3be3SRaja Mani struct wmi_10_4_p2p_noa_info p2p_noa_info; 61623cec3be3SRaja Mani } __packed; 61633cec3be3SRaja Mani 61643cec3be3SRaja Mani struct wmi_10_4_host_swba_event { 61653cec3be3SRaja Mani __le32 vdev_map; 61663cec3be3SRaja Mani struct wmi_10_4_bcn_info bcn_info[0]; 61673cec3be3SRaja Mani } __packed; 61683cec3be3SRaja Mani 61695e3dd157SKalle Valo #define WMI_MAX_AP_VDEV 16 61705e3dd157SKalle Valo 61715e3dd157SKalle Valo struct wmi_tbtt_offset_event { 61725e3dd157SKalle Valo __le32 vdev_map; 61735e3dd157SKalle Valo __le32 tbttoffset_list[WMI_MAX_AP_VDEV]; 61745e3dd157SKalle Valo } __packed; 61755e3dd157SKalle Valo 61765e3dd157SKalle Valo struct wmi_peer_create_cmd { 61775e3dd157SKalle Valo __le32 vdev_id; 61785e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 6179be5b4f40SManikanta Pubbisetty __le32 peer_type; 61805e3dd157SKalle Valo } __packed; 61815e3dd157SKalle Valo 61827390ed34SMarek Puzyniak enum wmi_peer_type { 61837390ed34SMarek Puzyniak WMI_PEER_TYPE_DEFAULT = 0, 61847390ed34SMarek Puzyniak WMI_PEER_TYPE_BSS = 1, 61857390ed34SMarek Puzyniak WMI_PEER_TYPE_TDLS = 2, 61867390ed34SMarek Puzyniak }; 61877390ed34SMarek Puzyniak 61885e3dd157SKalle Valo struct wmi_peer_delete_cmd { 61895e3dd157SKalle Valo __le32 vdev_id; 61905e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 61915e3dd157SKalle Valo } __packed; 61925e3dd157SKalle Valo 61935e3dd157SKalle Valo struct wmi_peer_flush_tids_cmd { 61945e3dd157SKalle Valo __le32 vdev_id; 61955e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 61965e3dd157SKalle Valo __le32 peer_tid_bitmap; 61975e3dd157SKalle Valo } __packed; 61985e3dd157SKalle Valo 61995e3dd157SKalle Valo struct wmi_fixed_rate { 62005e3dd157SKalle Valo /* 62015e3dd157SKalle Valo * rate mode . 0: disable fixed rate (auto rate) 62025e3dd157SKalle Valo * 1: legacy (non 11n) rate specified as ieee rate 2*Mbps 62035e3dd157SKalle Valo * 2: ht20 11n rate specified as mcs index 62045e3dd157SKalle Valo * 3: ht40 11n rate specified as mcs index 62055e3dd157SKalle Valo */ 62065e3dd157SKalle Valo __le32 rate_mode; 62075e3dd157SKalle Valo /* 62085e3dd157SKalle Valo * 4 rate values for 4 rate series. series 0 is stored in byte 0 (LSB) 62095e3dd157SKalle Valo * and series 3 is stored at byte 3 (MSB) 62105e3dd157SKalle Valo */ 62115e3dd157SKalle Valo __le32 rate_series; 62125e3dd157SKalle Valo /* 62135e3dd157SKalle Valo * 4 retry counts for 4 rate series. retry count for rate 0 is stored 62145e3dd157SKalle Valo * in byte 0 (LSB) and retry count for rate 3 is stored at byte 3 62155e3dd157SKalle Valo * (MSB) 62165e3dd157SKalle Valo */ 62175e3dd157SKalle Valo __le32 rate_retries; 62185e3dd157SKalle Valo } __packed; 62195e3dd157SKalle Valo 62205e3dd157SKalle Valo struct wmi_peer_fixed_rate_cmd { 62215e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 62225e3dd157SKalle Valo __le32 vdev_id; 62235e3dd157SKalle Valo /* peer MAC address */ 62245e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 62255e3dd157SKalle Valo /* fixed rate */ 62265e3dd157SKalle Valo struct wmi_fixed_rate peer_fixed_rate; 62275e3dd157SKalle Valo } __packed; 62285e3dd157SKalle Valo 62295e3dd157SKalle Valo #define WMI_MGMT_TID 17 62305e3dd157SKalle Valo 62315e3dd157SKalle Valo struct wmi_addba_clear_resp_cmd { 62325e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 62335e3dd157SKalle Valo __le32 vdev_id; 62345e3dd157SKalle Valo /* peer MAC address */ 62355e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 62365e3dd157SKalle Valo } __packed; 62375e3dd157SKalle Valo 62385e3dd157SKalle Valo struct wmi_addba_send_cmd { 62395e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 62405e3dd157SKalle Valo __le32 vdev_id; 62415e3dd157SKalle Valo /* peer MAC address */ 62425e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 62435e3dd157SKalle Valo /* Tid number */ 62445e3dd157SKalle Valo __le32 tid; 62455e3dd157SKalle Valo /* Buffer/Window size*/ 62465e3dd157SKalle Valo __le32 buffersize; 62475e3dd157SKalle Valo } __packed; 62485e3dd157SKalle Valo 62495e3dd157SKalle Valo struct wmi_delba_send_cmd { 62505e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 62515e3dd157SKalle Valo __le32 vdev_id; 62525e3dd157SKalle Valo /* peer MAC address */ 62535e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 62545e3dd157SKalle Valo /* Tid number */ 62555e3dd157SKalle Valo __le32 tid; 62565e3dd157SKalle Valo /* Is Initiator */ 62575e3dd157SKalle Valo __le32 initiator; 62585e3dd157SKalle Valo /* Reason code */ 62595e3dd157SKalle Valo __le32 reasoncode; 62605e3dd157SKalle Valo } __packed; 62615e3dd157SKalle Valo 62625e3dd157SKalle Valo struct wmi_addba_setresponse_cmd { 62635e3dd157SKalle Valo /* unique id identifying the vdev, generated by the caller */ 62645e3dd157SKalle Valo __le32 vdev_id; 62655e3dd157SKalle Valo /* peer mac address */ 62665e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 62675e3dd157SKalle Valo /* Tid number */ 62685e3dd157SKalle Valo __le32 tid; 62695e3dd157SKalle Valo /* status code */ 62705e3dd157SKalle Valo __le32 statuscode; 62715e3dd157SKalle Valo } __packed; 62725e3dd157SKalle Valo 62735e3dd157SKalle Valo struct wmi_send_singleamsdu_cmd { 62745e3dd157SKalle Valo /* unique id identifying the vdev, generated by the caller */ 62755e3dd157SKalle Valo __le32 vdev_id; 62765e3dd157SKalle Valo /* peer mac address */ 62775e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 62785e3dd157SKalle Valo /* Tid number */ 62795e3dd157SKalle Valo __le32 tid; 62805e3dd157SKalle Valo } __packed; 62815e3dd157SKalle Valo 62825e3dd157SKalle Valo enum wmi_peer_smps_state { 62835e3dd157SKalle Valo WMI_PEER_SMPS_PS_NONE = 0x0, 62845e3dd157SKalle Valo WMI_PEER_SMPS_STATIC = 0x1, 62855e3dd157SKalle Valo WMI_PEER_SMPS_DYNAMIC = 0x2 62865e3dd157SKalle Valo }; 62875e3dd157SKalle Valo 62889797febcSMichal Kazior enum wmi_peer_chwidth { 62899797febcSMichal Kazior WMI_PEER_CHWIDTH_20MHZ = 0, 62909797febcSMichal Kazior WMI_PEER_CHWIDTH_40MHZ = 1, 62919797febcSMichal Kazior WMI_PEER_CHWIDTH_80MHZ = 2, 6292bc1efd73SSebastian Gottschall WMI_PEER_CHWIDTH_160MHZ = 3, 62939797febcSMichal Kazior }; 62949797febcSMichal Kazior 62955e3dd157SKalle Valo enum wmi_peer_param { 62965e3dd157SKalle Valo WMI_PEER_SMPS_STATE = 0x1, /* see %wmi_peer_smps_state */ 62975e3dd157SKalle Valo WMI_PEER_AMPDU = 0x2, 62985e3dd157SKalle Valo WMI_PEER_AUTHORIZE = 0x3, 62995e3dd157SKalle Valo WMI_PEER_CHAN_WIDTH = 0x4, 63005e3dd157SKalle Valo WMI_PEER_NSS = 0x5, 63010a987fb0SMichal Kazior WMI_PEER_USE_4ADDR = 0x6, 630233410a51SAshok Raj Nagarajan WMI_PEER_USE_FIXED_PWR = 0x8, 63038b97b055SMiaoqing Pan WMI_PEER_PARAM_FIXED_RATE = 0x9, 6304ee8b08a1SMaharaja Kennadyrajan WMI_PEER_DEBUG = 0xa, 63059191fc2aSRyan Hsu WMI_PEER_PHYMODE = 0xd, 63060a987fb0SMichal Kazior WMI_PEER_DUMMY_VAR = 0xff, /* dummy parameter for STA PS workaround */ 63075e3dd157SKalle Valo }; 63085e3dd157SKalle Valo 63095e3dd157SKalle Valo struct wmi_peer_set_param_cmd { 63105e3dd157SKalle Valo __le32 vdev_id; 63115e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 63125e3dd157SKalle Valo __le32 param_id; 63135e3dd157SKalle Valo __le32 param_value; 63145e3dd157SKalle Valo } __packed; 63155e3dd157SKalle Valo 63165e3dd157SKalle Valo #define MAX_SUPPORTED_RATES 128 63175e3dd157SKalle Valo 63185e3dd157SKalle Valo struct wmi_rate_set { 63195e3dd157SKalle Valo /* total number of rates */ 63205e3dd157SKalle Valo __le32 num_rates; 63215e3dd157SKalle Valo /* 63225e3dd157SKalle Valo * rates (each 8bit value) packed into a 32 bit word. 63235e3dd157SKalle Valo * the rates are filled from least significant byte to most 63245e3dd157SKalle Valo * significant byte. 63255e3dd157SKalle Valo */ 63265e3dd157SKalle Valo __le32 rates[(MAX_SUPPORTED_RATES / 4) + 1]; 63275e3dd157SKalle Valo } __packed; 63285e3dd157SKalle Valo 63295e3dd157SKalle Valo struct wmi_rate_set_arg { 63305e3dd157SKalle Valo unsigned int num_rates; 63315e3dd157SKalle Valo u8 rates[MAX_SUPPORTED_RATES]; 63325e3dd157SKalle Valo }; 63335e3dd157SKalle Valo 63345e3dd157SKalle Valo /* 63355e3dd157SKalle Valo * NOTE: It would bea good idea to represent the Tx MCS 63365e3dd157SKalle Valo * info in one word and Rx in another word. This is split 63375e3dd157SKalle Valo * into multiple words for convenience 63385e3dd157SKalle Valo */ 63395e3dd157SKalle Valo struct wmi_vht_rate_set { 63405e3dd157SKalle Valo __le32 rx_max_rate; /* Max Rx data rate */ 63415e3dd157SKalle Valo __le32 rx_mcs_set; /* Negotiated RX VHT rates */ 63425e3dd157SKalle Valo __le32 tx_max_rate; /* Max Tx data rate */ 63435e3dd157SKalle Valo __le32 tx_mcs_set; /* Negotiated TX VHT rates */ 63445e3dd157SKalle Valo } __packed; 63455e3dd157SKalle Valo 63465e3dd157SKalle Valo struct wmi_vht_rate_set_arg { 63475e3dd157SKalle Valo u32 rx_max_rate; 63485e3dd157SKalle Valo u32 rx_mcs_set; 63495e3dd157SKalle Valo u32 tx_max_rate; 63505e3dd157SKalle Valo u32 tx_mcs_set; 63515e3dd157SKalle Valo }; 63525e3dd157SKalle Valo 63535e3dd157SKalle Valo struct wmi_peer_set_rates_cmd { 63545e3dd157SKalle Valo /* peer MAC address */ 63555e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 63565e3dd157SKalle Valo /* legacy rate set */ 63575e3dd157SKalle Valo struct wmi_rate_set peer_legacy_rates; 63585e3dd157SKalle Valo /* ht rate set */ 63595e3dd157SKalle Valo struct wmi_rate_set peer_ht_rates; 63605e3dd157SKalle Valo } __packed; 63615e3dd157SKalle Valo 63625e3dd157SKalle Valo struct wmi_peer_set_q_empty_callback_cmd { 63635e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 63645e3dd157SKalle Valo __le32 vdev_id; 63655e3dd157SKalle Valo /* peer MAC address */ 63665e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 63675e3dd157SKalle Valo __le32 callback_enable; 63685e3dd157SKalle Valo } __packed; 63695e3dd157SKalle Valo 63703fab30f7STamizh chelvam struct wmi_peer_flags_map { 63713fab30f7STamizh chelvam u32 auth; 63723fab30f7STamizh chelvam u32 qos; 63733fab30f7STamizh chelvam u32 need_ptk_4_way; 63743fab30f7STamizh chelvam u32 need_gtk_2_way; 63753fab30f7STamizh chelvam u32 apsd; 63763fab30f7STamizh chelvam u32 ht; 63773fab30f7STamizh chelvam u32 bw40; 63783fab30f7STamizh chelvam u32 stbc; 63793fab30f7STamizh chelvam u32 ldbc; 63803fab30f7STamizh chelvam u32 dyn_mimops; 63813fab30f7STamizh chelvam u32 static_mimops; 63823fab30f7STamizh chelvam u32 spatial_mux; 63833fab30f7STamizh chelvam u32 vht; 63843fab30f7STamizh chelvam u32 bw80; 63853fab30f7STamizh chelvam u32 vht_2g; 63863fab30f7STamizh chelvam u32 pmf; 6387bc1efd73SSebastian Gottschall u32 bw160; 63883fab30f7STamizh chelvam }; 63893fab30f7STamizh chelvam 63903fab30f7STamizh chelvam enum wmi_peer_flags { 63913fab30f7STamizh chelvam WMI_PEER_AUTH = 0x00000001, 63923fab30f7STamizh chelvam WMI_PEER_QOS = 0x00000002, 63933fab30f7STamizh chelvam WMI_PEER_NEED_PTK_4_WAY = 0x00000004, 63943fab30f7STamizh chelvam WMI_PEER_NEED_GTK_2_WAY = 0x00000010, 63953fab30f7STamizh chelvam WMI_PEER_APSD = 0x00000800, 63963fab30f7STamizh chelvam WMI_PEER_HT = 0x00001000, 63973fab30f7STamizh chelvam WMI_PEER_40MHZ = 0x00002000, 63983fab30f7STamizh chelvam WMI_PEER_STBC = 0x00008000, 63993fab30f7STamizh chelvam WMI_PEER_LDPC = 0x00010000, 64003fab30f7STamizh chelvam WMI_PEER_DYN_MIMOPS = 0x00020000, 64013fab30f7STamizh chelvam WMI_PEER_STATIC_MIMOPS = 0x00040000, 64023fab30f7STamizh chelvam WMI_PEER_SPATIAL_MUX = 0x00200000, 64033fab30f7STamizh chelvam WMI_PEER_VHT = 0x02000000, 64043fab30f7STamizh chelvam WMI_PEER_80MHZ = 0x04000000, 64053fab30f7STamizh chelvam WMI_PEER_VHT_2G = 0x08000000, 64063fab30f7STamizh chelvam WMI_PEER_PMF = 0x10000000, 6407bc1efd73SSebastian Gottschall WMI_PEER_160MHZ = 0x20000000 64083fab30f7STamizh chelvam }; 64093fab30f7STamizh chelvam 64103fab30f7STamizh chelvam enum wmi_10x_peer_flags { 64113fab30f7STamizh chelvam WMI_10X_PEER_AUTH = 0x00000001, 64123fab30f7STamizh chelvam WMI_10X_PEER_QOS = 0x00000002, 64133fab30f7STamizh chelvam WMI_10X_PEER_NEED_PTK_4_WAY = 0x00000004, 64143fab30f7STamizh chelvam WMI_10X_PEER_NEED_GTK_2_WAY = 0x00000010, 64153fab30f7STamizh chelvam WMI_10X_PEER_APSD = 0x00000800, 64163fab30f7STamizh chelvam WMI_10X_PEER_HT = 0x00001000, 64173fab30f7STamizh chelvam WMI_10X_PEER_40MHZ = 0x00002000, 64183fab30f7STamizh chelvam WMI_10X_PEER_STBC = 0x00008000, 64193fab30f7STamizh chelvam WMI_10X_PEER_LDPC = 0x00010000, 64203fab30f7STamizh chelvam WMI_10X_PEER_DYN_MIMOPS = 0x00020000, 64213fab30f7STamizh chelvam WMI_10X_PEER_STATIC_MIMOPS = 0x00040000, 64223fab30f7STamizh chelvam WMI_10X_PEER_SPATIAL_MUX = 0x00200000, 64233fab30f7STamizh chelvam WMI_10X_PEER_VHT = 0x02000000, 64243fab30f7STamizh chelvam WMI_10X_PEER_80MHZ = 0x04000000, 6425bc1efd73SSebastian Gottschall WMI_10X_PEER_160MHZ = 0x20000000 64263fab30f7STamizh chelvam }; 64273fab30f7STamizh chelvam 64283fab30f7STamizh chelvam enum wmi_10_2_peer_flags { 64293fab30f7STamizh chelvam WMI_10_2_PEER_AUTH = 0x00000001, 64303fab30f7STamizh chelvam WMI_10_2_PEER_QOS = 0x00000002, 64313fab30f7STamizh chelvam WMI_10_2_PEER_NEED_PTK_4_WAY = 0x00000004, 64323fab30f7STamizh chelvam WMI_10_2_PEER_NEED_GTK_2_WAY = 0x00000010, 64333fab30f7STamizh chelvam WMI_10_2_PEER_APSD = 0x00000800, 64343fab30f7STamizh chelvam WMI_10_2_PEER_HT = 0x00001000, 64353fab30f7STamizh chelvam WMI_10_2_PEER_40MHZ = 0x00002000, 64363fab30f7STamizh chelvam WMI_10_2_PEER_STBC = 0x00008000, 64373fab30f7STamizh chelvam WMI_10_2_PEER_LDPC = 0x00010000, 64383fab30f7STamizh chelvam WMI_10_2_PEER_DYN_MIMOPS = 0x00020000, 64393fab30f7STamizh chelvam WMI_10_2_PEER_STATIC_MIMOPS = 0x00040000, 64403fab30f7STamizh chelvam WMI_10_2_PEER_SPATIAL_MUX = 0x00200000, 64413fab30f7STamizh chelvam WMI_10_2_PEER_VHT = 0x02000000, 64423fab30f7STamizh chelvam WMI_10_2_PEER_80MHZ = 0x04000000, 64433fab30f7STamizh chelvam WMI_10_2_PEER_VHT_2G = 0x08000000, 64443fab30f7STamizh chelvam WMI_10_2_PEER_PMF = 0x10000000, 6445bc1efd73SSebastian Gottschall WMI_10_2_PEER_160MHZ = 0x20000000 64463fab30f7STamizh chelvam }; 64475e3dd157SKalle Valo 64485e3dd157SKalle Valo /* 64495e3dd157SKalle Valo * Peer rate capabilities. 64505e3dd157SKalle Valo * 64515e3dd157SKalle Valo * This is of interest to the ratecontrol 64525e3dd157SKalle Valo * module which resides in the firmware. The bit definitions are 64535e3dd157SKalle Valo * consistent with that defined in if_athrate.c. 64545e3dd157SKalle Valo */ 64555e3dd157SKalle Valo #define WMI_RC_DS_FLAG 0x01 64565e3dd157SKalle Valo #define WMI_RC_CW40_FLAG 0x02 64575e3dd157SKalle Valo #define WMI_RC_SGI_FLAG 0x04 64585e3dd157SKalle Valo #define WMI_RC_HT_FLAG 0x08 64595e3dd157SKalle Valo #define WMI_RC_RTSCTS_FLAG 0x10 64605e3dd157SKalle Valo #define WMI_RC_TX_STBC_FLAG 0x20 64615e3dd157SKalle Valo #define WMI_RC_RX_STBC_FLAG 0xC0 64625e3dd157SKalle Valo #define WMI_RC_RX_STBC_FLAG_S 6 64635e3dd157SKalle Valo #define WMI_RC_WEP_TKIP_FLAG 0x100 64645e3dd157SKalle Valo #define WMI_RC_TS_FLAG 0x200 64655e3dd157SKalle Valo #define WMI_RC_UAPSD_FLAG 0x400 64665e3dd157SKalle Valo 64675e3dd157SKalle Valo /* Maximum listen interval supported by hw in units of beacon interval */ 64685e3dd157SKalle Valo #define ATH10K_MAX_HW_LISTEN_INTERVAL 5 64695e3dd157SKalle Valo 647024c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd { 64715e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 64725e3dd157SKalle Valo __le32 vdev_id; 64735e3dd157SKalle Valo __le32 peer_new_assoc; /* 1=assoc, 0=reassoc */ 64745e3dd157SKalle Valo __le32 peer_associd; /* 16 LSBs */ 64755e3dd157SKalle Valo __le32 peer_flags; 64765e3dd157SKalle Valo __le32 peer_caps; /* 16 LSBs */ 64775e3dd157SKalle Valo __le32 peer_listen_intval; 64785e3dd157SKalle Valo __le32 peer_ht_caps; 64795e3dd157SKalle Valo __le32 peer_max_mpdu; 64805e3dd157SKalle Valo __le32 peer_mpdu_density; /* 0..16 */ 64815e3dd157SKalle Valo __le32 peer_rate_caps; 64825e3dd157SKalle Valo struct wmi_rate_set peer_legacy_rates; 64835e3dd157SKalle Valo struct wmi_rate_set peer_ht_rates; 64845e3dd157SKalle Valo __le32 peer_nss; /* num of spatial streams */ 64855e3dd157SKalle Valo __le32 peer_vht_caps; 64865e3dd157SKalle Valo __le32 peer_phymode; 64875e3dd157SKalle Valo struct wmi_vht_rate_set peer_vht_rates; 648824c88f78SMichal Kazior }; 648924c88f78SMichal Kazior 649024c88f78SMichal Kazior struct wmi_main_peer_assoc_complete_cmd { 649124c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd cmd; 649224c88f78SMichal Kazior 64935e3dd157SKalle Valo /* HT Operation Element of the peer. Five bytes packed in 2 649437ff1b0dSMarcin Rokicki * INT32 array and filled from lsb to msb. 649537ff1b0dSMarcin Rokicki */ 64965e3dd157SKalle Valo __le32 peer_ht_info[2]; 64975e3dd157SKalle Valo } __packed; 64985e3dd157SKalle Valo 649924c88f78SMichal Kazior struct wmi_10_1_peer_assoc_complete_cmd { 650024c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd cmd; 650124c88f78SMichal Kazior } __packed; 650224c88f78SMichal Kazior 650324c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0 650424c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f 650524c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4 650624c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0 650724c88f78SMichal Kazior 650824c88f78SMichal Kazior struct wmi_10_2_peer_assoc_complete_cmd { 650924c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd cmd; 651024c88f78SMichal Kazior __le32 info0; /* WMI_PEER_ASSOC_INFO0_ */ 651124c88f78SMichal Kazior } __packed; 651224c88f78SMichal Kazior 65133db24065SLei Wang /* NSS Mapping to FW */ 65143db24065SLei Wang #define WMI_PEER_NSS_MAP_ENABLE BIT(31) 65153db24065SLei Wang #define WMI_PEER_NSS_160MHZ_MASK GENMASK(2, 0) 65163db24065SLei Wang #define WMI_PEER_NSS_80_80MHZ_MASK GENMASK(5, 3) 6517cc914a55SBen Greear 6518b54e16f1SVasanthakumar Thiagarajan struct wmi_10_4_peer_assoc_complete_cmd { 6519b54e16f1SVasanthakumar Thiagarajan struct wmi_10_2_peer_assoc_complete_cmd cmd; 6520b54e16f1SVasanthakumar Thiagarajan __le32 peer_bw_rxnss_override; 6521b54e16f1SVasanthakumar Thiagarajan } __packed; 6522b54e16f1SVasanthakumar Thiagarajan 65235e3dd157SKalle Valo struct wmi_peer_assoc_complete_arg { 65245e3dd157SKalle Valo u8 addr[ETH_ALEN]; 65255e3dd157SKalle Valo u32 vdev_id; 65265e3dd157SKalle Valo bool peer_reassoc; 65275e3dd157SKalle Valo u16 peer_aid; 65285e3dd157SKalle Valo u32 peer_flags; /* see %WMI_PEER_ */ 65295e3dd157SKalle Valo u16 peer_caps; 65305e3dd157SKalle Valo u32 peer_listen_intval; 65315e3dd157SKalle Valo u32 peer_ht_caps; 65325e3dd157SKalle Valo u32 peer_max_mpdu; 65335e3dd157SKalle Valo u32 peer_mpdu_density; /* 0..16 */ 65345e3dd157SKalle Valo u32 peer_rate_caps; /* see %WMI_RC_ */ 65355e3dd157SKalle Valo struct wmi_rate_set_arg peer_legacy_rates; 65365e3dd157SKalle Valo struct wmi_rate_set_arg peer_ht_rates; 65375e3dd157SKalle Valo u32 peer_num_spatial_streams; 65385e3dd157SKalle Valo u32 peer_vht_caps; 65395e3dd157SKalle Valo enum wmi_phy_mode peer_phymode; 65405e3dd157SKalle Valo struct wmi_vht_rate_set_arg peer_vht_rates; 6541cc914a55SBen Greear u32 peer_bw_rxnss_override; 65425e3dd157SKalle Valo }; 65435e3dd157SKalle Valo 65445e3dd157SKalle Valo struct wmi_peer_add_wds_entry_cmd { 65455e3dd157SKalle Valo /* peer MAC address */ 65465e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 65475e3dd157SKalle Valo /* wds MAC addr */ 65485e3dd157SKalle Valo struct wmi_mac_addr wds_macaddr; 65495e3dd157SKalle Valo } __packed; 65505e3dd157SKalle Valo 65515e3dd157SKalle Valo struct wmi_peer_remove_wds_entry_cmd { 65525e3dd157SKalle Valo /* wds MAC addr */ 65535e3dd157SKalle Valo struct wmi_mac_addr wds_macaddr; 65545e3dd157SKalle Valo } __packed; 65555e3dd157SKalle Valo 65565e3dd157SKalle Valo struct wmi_peer_q_empty_callback_event { 65575e3dd157SKalle Valo /* peer MAC address */ 65585e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 65595e3dd157SKalle Valo } __packed; 65605e3dd157SKalle Valo 65615e3dd157SKalle Valo /* 65625e3dd157SKalle Valo * Channel info WMI event 65635e3dd157SKalle Valo */ 65645e3dd157SKalle Valo struct wmi_chan_info_event { 65655e3dd157SKalle Valo __le32 err_code; 65665e3dd157SKalle Valo __le32 freq; 65675e3dd157SKalle Valo __le32 cmd_flags; 65685e3dd157SKalle Valo __le32 noise_floor; 65695e3dd157SKalle Valo __le32 rx_clear_count; 65705e3dd157SKalle Valo __le32 cycle_count; 65715e3dd157SKalle Valo } __packed; 65725e3dd157SKalle Valo 6573b2297baaSRaja Mani struct wmi_10_4_chan_info_event { 6574b2297baaSRaja Mani __le32 err_code; 6575b2297baaSRaja Mani __le32 freq; 6576b2297baaSRaja Mani __le32 cmd_flags; 6577b2297baaSRaja Mani __le32 noise_floor; 6578b2297baaSRaja Mani __le32 rx_clear_count; 6579b2297baaSRaja Mani __le32 cycle_count; 6580b2297baaSRaja Mani __le32 chan_tx_pwr_range; 6581b2297baaSRaja Mani __le32 chan_tx_pwr_tp; 6582b2297baaSRaja Mani __le32 rx_frame_count; 6583b2297baaSRaja Mani } __packed; 6584b2297baaSRaja Mani 65855a13e76eSKalle Valo struct wmi_peer_sta_kickout_event { 65865a13e76eSKalle Valo struct wmi_mac_addr peer_macaddr; 65875a13e76eSKalle Valo } __packed; 65885a13e76eSKalle Valo 65892e1dea40SMichal Kazior #define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0) 65903d2a2e29SVasanthakumar Thiagarajan #define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1) 65912e1dea40SMichal Kazior 65925e3dd157SKalle Valo /* Beacon filter wmi command info */ 65935e3dd157SKalle Valo #define BCN_FLT_MAX_SUPPORTED_IES 256 65945e3dd157SKalle Valo #define BCN_FLT_MAX_ELEMS_IE_LIST (BCN_FLT_MAX_SUPPORTED_IES / 32) 65955e3dd157SKalle Valo 65965e3dd157SKalle Valo struct bss_bcn_stats { 65975e3dd157SKalle Valo __le32 vdev_id; 65985e3dd157SKalle Valo __le32 bss_bcnsdropped; 65995e3dd157SKalle Valo __le32 bss_bcnsdelivered; 66005e3dd157SKalle Valo } __packed; 66015e3dd157SKalle Valo 66025e3dd157SKalle Valo struct bcn_filter_stats { 66035e3dd157SKalle Valo __le32 bcns_dropped; 66045e3dd157SKalle Valo __le32 bcns_delivered; 66055e3dd157SKalle Valo __le32 activefilters; 66065e3dd157SKalle Valo struct bss_bcn_stats bss_stats; 66075e3dd157SKalle Valo } __packed; 66085e3dd157SKalle Valo 66095e3dd157SKalle Valo struct wmi_add_bcn_filter_cmd { 66105e3dd157SKalle Valo u32 vdev_id; 66115e3dd157SKalle Valo u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST]; 66125e3dd157SKalle Valo } __packed; 66135e3dd157SKalle Valo 66145e3dd157SKalle Valo enum wmi_sta_keepalive_method { 66155e3dd157SKalle Valo WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1, 66165e3dd157SKalle Valo WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2, 66175e3dd157SKalle Valo }; 66185e3dd157SKalle Valo 661946725b15SMichal Kazior #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0 662046725b15SMichal Kazior 662146725b15SMichal Kazior /* Firmware crashes if keepalive interval exceeds this limit */ 662246725b15SMichal Kazior #define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff 662346725b15SMichal Kazior 66245e3dd157SKalle Valo /* note: ip4 addresses are in network byte order, i.e. big endian */ 66255e3dd157SKalle Valo struct wmi_sta_keepalive_arp_resp { 66265e3dd157SKalle Valo __be32 src_ip4_addr; 66275e3dd157SKalle Valo __be32 dest_ip4_addr; 66285e3dd157SKalle Valo struct wmi_mac_addr dest_mac_addr; 66295e3dd157SKalle Valo } __packed; 66305e3dd157SKalle Valo 66315e3dd157SKalle Valo struct wmi_sta_keepalive_cmd { 66325e3dd157SKalle Valo __le32 vdev_id; 66335e3dd157SKalle Valo __le32 enabled; 66345e3dd157SKalle Valo __le32 method; /* WMI_STA_KEEPALIVE_METHOD_ */ 66355e3dd157SKalle Valo __le32 interval; /* in seconds */ 66365e3dd157SKalle Valo struct wmi_sta_keepalive_arp_resp arp_resp; 66375e3dd157SKalle Valo } __packed; 66385e3dd157SKalle Valo 66396e8b188bSJanusz Dziedzic struct wmi_sta_keepalive_arg { 66406e8b188bSJanusz Dziedzic u32 vdev_id; 66416e8b188bSJanusz Dziedzic u32 enabled; 66426e8b188bSJanusz Dziedzic u32 method; 66436e8b188bSJanusz Dziedzic u32 interval; 66446e8b188bSJanusz Dziedzic __be32 src_ip4_addr; 66456e8b188bSJanusz Dziedzic __be32 dest_ip4_addr; 66466e8b188bSJanusz Dziedzic const u8 dest_mac_addr[ETH_ALEN]; 66476e8b188bSJanusz Dziedzic }; 66486e8b188bSJanusz Dziedzic 66499cfbce75SMichal Kazior enum wmi_force_fw_hang_type { 66509cfbce75SMichal Kazior WMI_FORCE_FW_HANG_ASSERT = 1, 66519cfbce75SMichal Kazior WMI_FORCE_FW_HANG_NO_DETECT, 66529cfbce75SMichal Kazior WMI_FORCE_FW_HANG_CTRL_EP_FULL, 66539cfbce75SMichal Kazior WMI_FORCE_FW_HANG_EMPTY_POINT, 66549cfbce75SMichal Kazior WMI_FORCE_FW_HANG_STACK_OVERFLOW, 66559cfbce75SMichal Kazior WMI_FORCE_FW_HANG_INFINITE_LOOP, 66569cfbce75SMichal Kazior }; 66579cfbce75SMichal Kazior 66589cfbce75SMichal Kazior #define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF 66599cfbce75SMichal Kazior 66609cfbce75SMichal Kazior struct wmi_force_fw_hang_cmd { 66619cfbce75SMichal Kazior __le32 type; 66629cfbce75SMichal Kazior __le32 delay_ms; 66639cfbce75SMichal Kazior } __packed; 66649cfbce75SMichal Kazior 6665db251d7dSMaharaja Kennadyrajan enum wmi_pdev_reset_mode_type { 6666db251d7dSMaharaja Kennadyrajan WMI_RST_MODE_TX_FLUSH = 1, 6667db251d7dSMaharaja Kennadyrajan WMI_RST_MODE_WARM_RESET, 6668db251d7dSMaharaja Kennadyrajan WMI_RST_MODE_COLD_RESET, 6669db251d7dSMaharaja Kennadyrajan WMI_RST_MODE_WARM_RESET_RESTORE_CAL, 6670db251d7dSMaharaja Kennadyrajan WMI_RST_MODE_COLD_RESET_RESTORE_CAL, 6671db251d7dSMaharaja Kennadyrajan WMI_RST_MODE_MAX, 6672db251d7dSMaharaja Kennadyrajan }; 6673db251d7dSMaharaja Kennadyrajan 6674f118a3e5SKalle Valo enum ath10k_dbglog_level { 6675f118a3e5SKalle Valo ATH10K_DBGLOG_LEVEL_VERBOSE = 0, 6676f118a3e5SKalle Valo ATH10K_DBGLOG_LEVEL_INFO = 1, 6677f118a3e5SKalle Valo ATH10K_DBGLOG_LEVEL_WARN = 2, 6678f118a3e5SKalle Valo ATH10K_DBGLOG_LEVEL_ERR = 3, 6679f118a3e5SKalle Valo }; 6680f118a3e5SKalle Valo 6681f118a3e5SKalle Valo /* VAP ids to enable dbglog */ 6682f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_VAP_LOG_LSB 0 6683f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_VAP_LOG_MASK 0x0000ffff 6684f118a3e5SKalle Valo 6685f118a3e5SKalle Valo /* to enable dbglog in the firmware */ 6686f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB 16 6687f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK 0x00010000 6688f118a3e5SKalle Valo 6689f118a3e5SKalle Valo /* timestamp resolution */ 6690f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_RESOLUTION_LSB 17 6691f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_RESOLUTION_MASK 0x000E0000 6692f118a3e5SKalle Valo 6693f118a3e5SKalle Valo /* number of queued messages before sending them to the host */ 6694f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB 20 6695f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK 0x0ff00000 6696f118a3e5SKalle Valo 6697f118a3e5SKalle Valo /* 6698f118a3e5SKalle Valo * Log levels to enable. This defines the minimum level to enable, this is 6699f118a3e5SKalle Valo * not a bitmask. See enum ath10k_dbglog_level for the values. 6700f118a3e5SKalle Valo */ 6701f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_LOG_LVL_LSB 28 6702f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_LOG_LVL_MASK 0x70000000 6703f118a3e5SKalle Valo 6704f118a3e5SKalle Valo /* 6705f118a3e5SKalle Valo * Note: this is a cleaned up version of a struct firmware uses. For 6706f118a3e5SKalle Valo * example, config_valid was hidden inside an array. 6707f118a3e5SKalle Valo */ 6708f118a3e5SKalle Valo struct wmi_dbglog_cfg_cmd { 6709f118a3e5SKalle Valo /* bitmask to hold mod id config*/ 6710f118a3e5SKalle Valo __le32 module_enable; 6711f118a3e5SKalle Valo 6712f118a3e5SKalle Valo /* see ATH10K_DBGLOG_CFG_ */ 6713f118a3e5SKalle Valo __le32 config_enable; 6714f118a3e5SKalle Valo 6715f118a3e5SKalle Valo /* mask of module id bits to be changed */ 6716f118a3e5SKalle Valo __le32 module_valid; 6717f118a3e5SKalle Valo 6718f118a3e5SKalle Valo /* mask of config bits to be changed, see ATH10K_DBGLOG_CFG_ */ 6719f118a3e5SKalle Valo __le32 config_valid; 6720f118a3e5SKalle Valo } __packed; 6721f118a3e5SKalle Valo 6722afcbc82cSMaharaja Kennadyrajan struct wmi_10_4_dbglog_cfg_cmd { 6723afcbc82cSMaharaja Kennadyrajan /* bitmask to hold mod id config*/ 6724afcbc82cSMaharaja Kennadyrajan __le64 module_enable; 6725afcbc82cSMaharaja Kennadyrajan 6726afcbc82cSMaharaja Kennadyrajan /* see ATH10K_DBGLOG_CFG_ */ 6727afcbc82cSMaharaja Kennadyrajan __le32 config_enable; 6728afcbc82cSMaharaja Kennadyrajan 6729afcbc82cSMaharaja Kennadyrajan /* mask of module id bits to be changed */ 6730afcbc82cSMaharaja Kennadyrajan __le64 module_valid; 6731afcbc82cSMaharaja Kennadyrajan 6732afcbc82cSMaharaja Kennadyrajan /* mask of config bits to be changed, see ATH10K_DBGLOG_CFG_ */ 6733afcbc82cSMaharaja Kennadyrajan __le32 config_valid; 6734afcbc82cSMaharaja Kennadyrajan } __packed; 6735afcbc82cSMaharaja Kennadyrajan 6736c1a4654aSMichal Kazior enum wmi_roam_reason { 6737c1a4654aSMichal Kazior WMI_ROAM_REASON_BETTER_AP = 1, 6738c1a4654aSMichal Kazior WMI_ROAM_REASON_BEACON_MISS = 2, 6739c1a4654aSMichal Kazior WMI_ROAM_REASON_LOW_RSSI = 3, 6740c1a4654aSMichal Kazior WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 6741c1a4654aSMichal Kazior WMI_ROAM_REASON_HO_FAILED = 5, 6742c1a4654aSMichal Kazior 6743c1a4654aSMichal Kazior /* keep last */ 6744c1a4654aSMichal Kazior WMI_ROAM_REASON_MAX, 6745c1a4654aSMichal Kazior }; 6746c1a4654aSMichal Kazior 6747c1a4654aSMichal Kazior struct wmi_roam_ev { 6748c1a4654aSMichal Kazior __le32 vdev_id; 6749c1a4654aSMichal Kazior __le32 reason; 6750c1a4654aSMichal Kazior } __packed; 6751c1a4654aSMichal Kazior 67525e3dd157SKalle Valo #define ATH10K_FRAGMT_THRESHOLD_MIN 540 67535e3dd157SKalle Valo #define ATH10K_FRAGMT_THRESHOLD_MAX 2346 67545e3dd157SKalle Valo 67555e3dd157SKalle Valo #define WMI_MAX_EVENT 0x1000 67565e3dd157SKalle Valo /* Maximum number of pending TXed WMI packets */ 67575e3dd157SKalle Valo #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 67585e3dd157SKalle Valo 67595e3dd157SKalle Valo /* By default disable power save for IBSS */ 67605e3dd157SKalle Valo #define ATH10K_DEFAULT_ATIM 0 67615e3dd157SKalle Valo 67625c01aa3dSMichal Kazior #define WMI_MAX_MEM_REQS 16 67635c01aa3dSMichal Kazior 676432653cf1SMichal Kazior struct wmi_scan_ev_arg { 676532653cf1SMichal Kazior __le32 event_type; /* %WMI_SCAN_EVENT_ */ 676632653cf1SMichal Kazior __le32 reason; /* %WMI_SCAN_REASON_ */ 676732653cf1SMichal Kazior __le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 676832653cf1SMichal Kazior __le32 scan_req_id; 676932653cf1SMichal Kazior __le32 scan_id; 677032653cf1SMichal Kazior __le32 vdev_id; 677132653cf1SMichal Kazior }; 677232653cf1SMichal Kazior 67734b816f17SAbhishek Ambure struct mgmt_tx_compl_params { 67744b816f17SAbhishek Ambure u32 desc_id; 67754b816f17SAbhishek Ambure u32 status; 67764b816f17SAbhishek Ambure u32 ppdu_id; 67774b816f17SAbhishek Ambure int ack_rssi; 67784b816f17SAbhishek Ambure }; 67794b816f17SAbhishek Ambure 6780dc405152SRakesh Pillai struct wmi_tlv_mgmt_tx_compl_ev_arg { 6781dc405152SRakesh Pillai __le32 desc_id; 6782dc405152SRakesh Pillai __le32 status; 6783dc405152SRakesh Pillai __le32 pdev_id; 67844b816f17SAbhishek Ambure __le32 ppdu_id; 67854b816f17SAbhishek Ambure __le32 ack_rssi; 6786dc405152SRakesh Pillai }; 6787dc405152SRakesh Pillai 6788cc123facSRakesh Pillai struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg { 6789cc123facSRakesh Pillai __le32 num_reports; 6790cc123facSRakesh Pillai const __le32 *desc_ids; 6791cc123facSRakesh Pillai const __le32 *status; 67924b816f17SAbhishek Ambure const __le32 *ppdu_ids; 67934b816f17SAbhishek Ambure const __le32 *ack_rssi; 6794cc123facSRakesh Pillai }; 6795cc123facSRakesh Pillai 6796c6f537a1SDundi Raviteja struct wmi_peer_delete_resp_ev_arg { 6797c6f537a1SDundi Raviteja __le32 vdev_id; 6798c6f537a1SDundi Raviteja struct wmi_mac_addr peer_addr; 6799c6f537a1SDundi Raviteja }; 6800c6f537a1SDundi Raviteja 68017005eafcSWen Gong #define WMI_MGMT_RX_NUM_RSSI 4 680232653cf1SMichal Kazior struct wmi_mgmt_rx_ev_arg { 680332653cf1SMichal Kazior __le32 channel; 680432653cf1SMichal Kazior __le32 snr; 680532653cf1SMichal Kazior __le32 rate; 680632653cf1SMichal Kazior __le32 phy_mode; 680732653cf1SMichal Kazior __le32 buf_len; 680832653cf1SMichal Kazior __le32 status; /* %WMI_RX_STATUS_ */ 68098d130963SPeter Oh struct wmi_mgmt_rx_ext_info ext_info; 68107005eafcSWen Gong __le32 rssi[WMI_MGMT_RX_NUM_RSSI]; 681132653cf1SMichal Kazior }; 681232653cf1SMichal Kazior 681332653cf1SMichal Kazior struct wmi_ch_info_ev_arg { 681432653cf1SMichal Kazior __le32 err_code; 681532653cf1SMichal Kazior __le32 freq; 681632653cf1SMichal Kazior __le32 cmd_flags; 681732653cf1SMichal Kazior __le32 noise_floor; 681832653cf1SMichal Kazior __le32 rx_clear_count; 681932653cf1SMichal Kazior __le32 cycle_count; 6820b2297baaSRaja Mani __le32 chan_tx_pwr_range; 6821b2297baaSRaja Mani __le32 chan_tx_pwr_tp; 6822b2297baaSRaja Mani __le32 rx_frame_count; 682313104929SRakesh Pillai __le32 my_bss_rx_cycle_count; 682413104929SRakesh Pillai __le32 rx_11b_mode_data_duration; 682513104929SRakesh Pillai __le32 tx_frame_cnt; 682613104929SRakesh Pillai __le32 mac_clk_mhz; 682732653cf1SMichal Kazior }; 682832653cf1SMichal Kazior 6829833fd34dSBen Greear /* From 10.4 firmware, not sure all have the same values. */ 6830833fd34dSBen Greear enum wmi_vdev_start_status { 6831833fd34dSBen Greear WMI_VDEV_START_OK = 0, 6832833fd34dSBen Greear WMI_VDEV_START_CHAN_INVALID, 6833833fd34dSBen Greear }; 6834833fd34dSBen Greear 683532653cf1SMichal Kazior struct wmi_vdev_start_ev_arg { 683632653cf1SMichal Kazior __le32 vdev_id; 683732653cf1SMichal Kazior __le32 req_id; 683832653cf1SMichal Kazior __le32 resp_type; /* %WMI_VDEV_RESP_ */ 6839833fd34dSBen Greear __le32 status; /* See wmi_vdev_start_status enum above */ 684032653cf1SMichal Kazior }; 684132653cf1SMichal Kazior 684232653cf1SMichal Kazior struct wmi_peer_kick_ev_arg { 684332653cf1SMichal Kazior const u8 *mac_addr; 684432653cf1SMichal Kazior }; 684532653cf1SMichal Kazior 684632653cf1SMichal Kazior struct wmi_swba_ev_arg { 684732653cf1SMichal Kazior __le32 vdev_map; 6848a03fee34SRaja Mani struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV]; 684932653cf1SMichal Kazior const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV]; 685032653cf1SMichal Kazior }; 685132653cf1SMichal Kazior 685232653cf1SMichal Kazior struct wmi_phyerr_ev_arg { 6853991adf71SRaja Mani u32 tsf_timestamp; 6854991adf71SRaja Mani u16 freq1; 6855991adf71SRaja Mani u16 freq2; 6856991adf71SRaja Mani u8 rssi_combined; 6857991adf71SRaja Mani u8 chan_width_mhz; 6858991adf71SRaja Mani u8 phy_err_code; 6859991adf71SRaja Mani u16 nf_chains[4]; 6860991adf71SRaja Mani u32 buf_len; 6861991adf71SRaja Mani const u8 *buf; 6862991adf71SRaja Mani u8 hdr_len; 6863991adf71SRaja Mani }; 6864991adf71SRaja Mani 6865991adf71SRaja Mani struct wmi_phyerr_hdr_arg { 6866991adf71SRaja Mani u32 num_phyerrs; 6867991adf71SRaja Mani u32 tsf_l32; 6868991adf71SRaja Mani u32 tsf_u32; 6869991adf71SRaja Mani u32 buf_len; 6870991adf71SRaja Mani const void *phyerrs; 687132653cf1SMichal Kazior }; 687232653cf1SMichal Kazior 68736f6eb1bcSSriram R struct wmi_dfs_status_ev_arg { 68746f6eb1bcSSriram R u32 status; 68756f6eb1bcSSriram R }; 68766f6eb1bcSSriram R 68775c01aa3dSMichal Kazior struct wmi_svc_rdy_ev_arg { 68785c01aa3dSMichal Kazior __le32 min_tx_power; 68795c01aa3dSMichal Kazior __le32 max_tx_power; 68805c01aa3dSMichal Kazior __le32 ht_cap; 68815c01aa3dSMichal Kazior __le32 vht_cap; 688273690c48STomislav Požega __le32 vht_supp_mcs; 68835c01aa3dSMichal Kazior __le32 sw_ver0; 68845c01aa3dSMichal Kazior __le32 sw_ver1; 6885ca996ec5SMichal Kazior __le32 fw_build; 68865c01aa3dSMichal Kazior __le32 phy_capab; 68875c01aa3dSMichal Kazior __le32 num_rf_chains; 68885c01aa3dSMichal Kazior __le32 eeprom_rd; 68895c01aa3dSMichal Kazior __le32 num_mem_reqs; 6890fa879490STomislav Požega __le32 low_2ghz_chan; 6891fa879490STomislav Požega __le32 high_2ghz_chan; 6892523f6701STamizh chelvam __le32 low_5ghz_chan; 6893523f6701STamizh chelvam __le32 high_5ghz_chan; 68941382993fSWen Gong __le32 sys_cap_info; 68955c01aa3dSMichal Kazior const __le32 *service_map; 68962a3e60d3SMichal Kazior size_t service_map_len; 68975c01aa3dSMichal Kazior const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS]; 68985c01aa3dSMichal Kazior }; 68995c01aa3dSMichal Kazior 6900cea19a6cSCarl Huang struct wmi_svc_avail_ev_arg { 6901cea19a6cSCarl Huang __le32 service_map_ext_len; 6902cea19a6cSCarl Huang const __le32 *service_map_ext; 6903cea19a6cSCarl Huang }; 6904cea19a6cSCarl Huang 690532653cf1SMichal Kazior struct wmi_rdy_ev_arg { 690632653cf1SMichal Kazior __le32 sw_version; 690732653cf1SMichal Kazior __le32 abi_version; 690832653cf1SMichal Kazior __le32 status; 690932653cf1SMichal Kazior const u8 *mac_addr; 691032653cf1SMichal Kazior }; 691132653cf1SMichal Kazior 6912c1a4654aSMichal Kazior struct wmi_roam_ev_arg { 6913c1a4654aSMichal Kazior __le32 vdev_id; 6914c1a4654aSMichal Kazior __le32 reason; 6915c1a4654aSMichal Kazior __le32 rssi; 6916c1a4654aSMichal Kazior }; 6917c1a4654aSMichal Kazior 691884d4911bSMichal Kazior struct wmi_echo_ev_arg { 691984d4911bSMichal Kazior __le32 value; 692084d4911bSMichal Kazior }; 692184d4911bSMichal Kazior 6922a57a6a27SRajkumar Manoharan struct wmi_pdev_temperature_event { 6923a57a6a27SRajkumar Manoharan /* temperature value in Celcius degree */ 6924a57a6a27SRajkumar Manoharan __le32 temperature; 6925a57a6a27SRajkumar Manoharan } __packed; 6926a57a6a27SRajkumar Manoharan 692789d2d183SRajkumar Manoharan struct wmi_pdev_bss_chan_info_event { 692889d2d183SRajkumar Manoharan __le32 freq; 692989d2d183SRajkumar Manoharan __le32 noise_floor; 693089d2d183SRajkumar Manoharan __le64 cycle_busy; 693189d2d183SRajkumar Manoharan __le64 cycle_total; 693289d2d183SRajkumar Manoharan __le64 cycle_tx; 693389d2d183SRajkumar Manoharan __le64 cycle_rx; 693489d2d183SRajkumar Manoharan __le64 cycle_rx_bss; 693589d2d183SRajkumar Manoharan __le32 reserved; 693689d2d183SRajkumar Manoharan } __packed; 693789d2d183SRajkumar Manoharan 6938f5431e87SJanusz Dziedzic /* WOW structures */ 6939f5431e87SJanusz Dziedzic enum wmi_wow_wakeup_event { 6940f5431e87SJanusz Dziedzic WOW_BMISS_EVENT = 0, 6941f5431e87SJanusz Dziedzic WOW_BETTER_AP_EVENT, 6942f5431e87SJanusz Dziedzic WOW_DEAUTH_RECVD_EVENT, 6943f5431e87SJanusz Dziedzic WOW_MAGIC_PKT_RECVD_EVENT, 6944f5431e87SJanusz Dziedzic WOW_GTK_ERR_EVENT, 6945f5431e87SJanusz Dziedzic WOW_FOURWAY_HSHAKE_EVENT, 6946f5431e87SJanusz Dziedzic WOW_EAPOL_RECVD_EVENT, 6947f5431e87SJanusz Dziedzic WOW_NLO_DETECTED_EVENT, 6948f5431e87SJanusz Dziedzic WOW_DISASSOC_RECVD_EVENT, 6949f5431e87SJanusz Dziedzic WOW_PATTERN_MATCH_EVENT, 6950f5431e87SJanusz Dziedzic WOW_CSA_IE_EVENT, 6951f5431e87SJanusz Dziedzic WOW_PROBE_REQ_WPS_IE_EVENT, 6952f5431e87SJanusz Dziedzic WOW_AUTH_REQ_EVENT, 6953f5431e87SJanusz Dziedzic WOW_ASSOC_REQ_EVENT, 6954f5431e87SJanusz Dziedzic WOW_HTT_EVENT, 6955f5431e87SJanusz Dziedzic WOW_RA_MATCH_EVENT, 6956f5431e87SJanusz Dziedzic WOW_HOST_AUTO_SHUTDOWN_EVENT, 6957f5431e87SJanusz Dziedzic WOW_IOAC_MAGIC_EVENT, 6958f5431e87SJanusz Dziedzic WOW_IOAC_SHORT_EVENT, 6959f5431e87SJanusz Dziedzic WOW_IOAC_EXTEND_EVENT, 6960f5431e87SJanusz Dziedzic WOW_IOAC_TIMER_EVENT, 6961f5431e87SJanusz Dziedzic WOW_DFS_PHYERR_RADAR_EVENT, 6962f5431e87SJanusz Dziedzic WOW_BEACON_EVENT, 6963f5431e87SJanusz Dziedzic WOW_CLIENT_KICKOUT_EVENT, 6964f5431e87SJanusz Dziedzic WOW_EVENT_MAX, 6965f5431e87SJanusz Dziedzic }; 6966f5431e87SJanusz Dziedzic 6967f5431e87SJanusz Dziedzic #define C2S(x) case x: return #x 6968f5431e87SJanusz Dziedzic 6969f5431e87SJanusz Dziedzic static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev) 6970f5431e87SJanusz Dziedzic { 6971f5431e87SJanusz Dziedzic switch (ev) { 6972f5431e87SJanusz Dziedzic C2S(WOW_BMISS_EVENT); 6973f5431e87SJanusz Dziedzic C2S(WOW_BETTER_AP_EVENT); 6974f5431e87SJanusz Dziedzic C2S(WOW_DEAUTH_RECVD_EVENT); 6975f5431e87SJanusz Dziedzic C2S(WOW_MAGIC_PKT_RECVD_EVENT); 6976f5431e87SJanusz Dziedzic C2S(WOW_GTK_ERR_EVENT); 6977f5431e87SJanusz Dziedzic C2S(WOW_FOURWAY_HSHAKE_EVENT); 6978f5431e87SJanusz Dziedzic C2S(WOW_EAPOL_RECVD_EVENT); 6979f5431e87SJanusz Dziedzic C2S(WOW_NLO_DETECTED_EVENT); 6980f5431e87SJanusz Dziedzic C2S(WOW_DISASSOC_RECVD_EVENT); 6981f5431e87SJanusz Dziedzic C2S(WOW_PATTERN_MATCH_EVENT); 6982f5431e87SJanusz Dziedzic C2S(WOW_CSA_IE_EVENT); 6983f5431e87SJanusz Dziedzic C2S(WOW_PROBE_REQ_WPS_IE_EVENT); 6984f5431e87SJanusz Dziedzic C2S(WOW_AUTH_REQ_EVENT); 6985f5431e87SJanusz Dziedzic C2S(WOW_ASSOC_REQ_EVENT); 6986f5431e87SJanusz Dziedzic C2S(WOW_HTT_EVENT); 6987f5431e87SJanusz Dziedzic C2S(WOW_RA_MATCH_EVENT); 6988f5431e87SJanusz Dziedzic C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT); 6989f5431e87SJanusz Dziedzic C2S(WOW_IOAC_MAGIC_EVENT); 6990f5431e87SJanusz Dziedzic C2S(WOW_IOAC_SHORT_EVENT); 6991f5431e87SJanusz Dziedzic C2S(WOW_IOAC_EXTEND_EVENT); 6992f5431e87SJanusz Dziedzic C2S(WOW_IOAC_TIMER_EVENT); 6993f5431e87SJanusz Dziedzic C2S(WOW_DFS_PHYERR_RADAR_EVENT); 6994f5431e87SJanusz Dziedzic C2S(WOW_BEACON_EVENT); 6995f5431e87SJanusz Dziedzic C2S(WOW_CLIENT_KICKOUT_EVENT); 6996f5431e87SJanusz Dziedzic C2S(WOW_EVENT_MAX); 6997f5431e87SJanusz Dziedzic default: 6998f5431e87SJanusz Dziedzic return NULL; 6999f5431e87SJanusz Dziedzic } 7000f5431e87SJanusz Dziedzic } 7001f5431e87SJanusz Dziedzic 7002f5431e87SJanusz Dziedzic enum wmi_wow_wake_reason { 7003f5431e87SJanusz Dziedzic WOW_REASON_UNSPECIFIED = -1, 7004f5431e87SJanusz Dziedzic WOW_REASON_NLOD = 0, 7005f5431e87SJanusz Dziedzic WOW_REASON_AP_ASSOC_LOST, 7006f5431e87SJanusz Dziedzic WOW_REASON_LOW_RSSI, 7007f5431e87SJanusz Dziedzic WOW_REASON_DEAUTH_RECVD, 7008f5431e87SJanusz Dziedzic WOW_REASON_DISASSOC_RECVD, 7009f5431e87SJanusz Dziedzic WOW_REASON_GTK_HS_ERR, 7010f5431e87SJanusz Dziedzic WOW_REASON_EAP_REQ, 7011f5431e87SJanusz Dziedzic WOW_REASON_FOURWAY_HS_RECV, 7012f5431e87SJanusz Dziedzic WOW_REASON_TIMER_INTR_RECV, 7013f5431e87SJanusz Dziedzic WOW_REASON_PATTERN_MATCH_FOUND, 7014f5431e87SJanusz Dziedzic WOW_REASON_RECV_MAGIC_PATTERN, 7015f5431e87SJanusz Dziedzic WOW_REASON_P2P_DISC, 7016f5431e87SJanusz Dziedzic WOW_REASON_WLAN_HB, 7017f5431e87SJanusz Dziedzic WOW_REASON_CSA_EVENT, 7018f5431e87SJanusz Dziedzic WOW_REASON_PROBE_REQ_WPS_IE_RECV, 7019f5431e87SJanusz Dziedzic WOW_REASON_AUTH_REQ_RECV, 7020f5431e87SJanusz Dziedzic WOW_REASON_ASSOC_REQ_RECV, 7021f5431e87SJanusz Dziedzic WOW_REASON_HTT_EVENT, 7022f5431e87SJanusz Dziedzic WOW_REASON_RA_MATCH, 7023f5431e87SJanusz Dziedzic WOW_REASON_HOST_AUTO_SHUTDOWN, 7024f5431e87SJanusz Dziedzic WOW_REASON_IOAC_MAGIC_EVENT, 7025f5431e87SJanusz Dziedzic WOW_REASON_IOAC_SHORT_EVENT, 7026f5431e87SJanusz Dziedzic WOW_REASON_IOAC_EXTEND_EVENT, 7027f5431e87SJanusz Dziedzic WOW_REASON_IOAC_TIMER_EVENT, 7028f5431e87SJanusz Dziedzic WOW_REASON_ROAM_HO, 7029f5431e87SJanusz Dziedzic WOW_REASON_DFS_PHYERR_RADADR_EVENT, 7030f5431e87SJanusz Dziedzic WOW_REASON_BEACON_RECV, 7031f5431e87SJanusz Dziedzic WOW_REASON_CLIENT_KICKOUT_EVENT, 7032f5431e87SJanusz Dziedzic WOW_REASON_DEBUG_TEST = 0xFF, 7033f5431e87SJanusz Dziedzic }; 7034f5431e87SJanusz Dziedzic 7035f5431e87SJanusz Dziedzic static inline const char *wow_reason(enum wmi_wow_wake_reason reason) 7036f5431e87SJanusz Dziedzic { 7037f5431e87SJanusz Dziedzic switch (reason) { 7038f5431e87SJanusz Dziedzic C2S(WOW_REASON_UNSPECIFIED); 7039f5431e87SJanusz Dziedzic C2S(WOW_REASON_NLOD); 7040f5431e87SJanusz Dziedzic C2S(WOW_REASON_AP_ASSOC_LOST); 7041f5431e87SJanusz Dziedzic C2S(WOW_REASON_LOW_RSSI); 7042f5431e87SJanusz Dziedzic C2S(WOW_REASON_DEAUTH_RECVD); 7043f5431e87SJanusz Dziedzic C2S(WOW_REASON_DISASSOC_RECVD); 7044f5431e87SJanusz Dziedzic C2S(WOW_REASON_GTK_HS_ERR); 7045f5431e87SJanusz Dziedzic C2S(WOW_REASON_EAP_REQ); 7046f5431e87SJanusz Dziedzic C2S(WOW_REASON_FOURWAY_HS_RECV); 7047f5431e87SJanusz Dziedzic C2S(WOW_REASON_TIMER_INTR_RECV); 7048f5431e87SJanusz Dziedzic C2S(WOW_REASON_PATTERN_MATCH_FOUND); 7049f5431e87SJanusz Dziedzic C2S(WOW_REASON_RECV_MAGIC_PATTERN); 7050f5431e87SJanusz Dziedzic C2S(WOW_REASON_P2P_DISC); 7051f5431e87SJanusz Dziedzic C2S(WOW_REASON_WLAN_HB); 7052f5431e87SJanusz Dziedzic C2S(WOW_REASON_CSA_EVENT); 7053f5431e87SJanusz Dziedzic C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV); 7054f5431e87SJanusz Dziedzic C2S(WOW_REASON_AUTH_REQ_RECV); 7055f5431e87SJanusz Dziedzic C2S(WOW_REASON_ASSOC_REQ_RECV); 7056f5431e87SJanusz Dziedzic C2S(WOW_REASON_HTT_EVENT); 7057f5431e87SJanusz Dziedzic C2S(WOW_REASON_RA_MATCH); 7058f5431e87SJanusz Dziedzic C2S(WOW_REASON_HOST_AUTO_SHUTDOWN); 7059f5431e87SJanusz Dziedzic C2S(WOW_REASON_IOAC_MAGIC_EVENT); 7060f5431e87SJanusz Dziedzic C2S(WOW_REASON_IOAC_SHORT_EVENT); 7061f5431e87SJanusz Dziedzic C2S(WOW_REASON_IOAC_EXTEND_EVENT); 7062f5431e87SJanusz Dziedzic C2S(WOW_REASON_IOAC_TIMER_EVENT); 7063f5431e87SJanusz Dziedzic C2S(WOW_REASON_ROAM_HO); 7064f5431e87SJanusz Dziedzic C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT); 7065f5431e87SJanusz Dziedzic C2S(WOW_REASON_BEACON_RECV); 7066f5431e87SJanusz Dziedzic C2S(WOW_REASON_CLIENT_KICKOUT_EVENT); 7067f5431e87SJanusz Dziedzic C2S(WOW_REASON_DEBUG_TEST); 7068f5431e87SJanusz Dziedzic default: 7069f5431e87SJanusz Dziedzic return NULL; 7070f5431e87SJanusz Dziedzic } 7071f5431e87SJanusz Dziedzic } 7072f5431e87SJanusz Dziedzic 7073f5431e87SJanusz Dziedzic #undef C2S 7074f5431e87SJanusz Dziedzic 7075f5431e87SJanusz Dziedzic struct wmi_wow_ev_arg { 7076f5431e87SJanusz Dziedzic u32 vdev_id; 7077f5431e87SJanusz Dziedzic u32 flag; 7078f5431e87SJanusz Dziedzic enum wmi_wow_wake_reason wake_reason; 7079f5431e87SJanusz Dziedzic u32 data_len; 7080f5431e87SJanusz Dziedzic }; 7081f5431e87SJanusz Dziedzic 708225c86619SJanusz Dziedzic #define WOW_MIN_PATTERN_SIZE 1 708325c86619SJanusz Dziedzic #define WOW_MAX_PATTERN_SIZE 148 708425c86619SJanusz Dziedzic #define WOW_MAX_PKT_OFFSET 128 7085fa3440faSWen Gong #define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \ 7086fa3440faSWen Gong sizeof(struct rfc1042_hdr)) 7087fa3440faSWen Gong #define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \ 7088fa3440faSWen Gong offsetof(struct ieee80211_hdr_3addr, addr1)) 708925c86619SJanusz Dziedzic 7090ad45c888SMarek Puzyniak enum wmi_tdls_state { 7091ad45c888SMarek Puzyniak WMI_TDLS_DISABLE, 7092ad45c888SMarek Puzyniak WMI_TDLS_ENABLE_PASSIVE, 7093ad45c888SMarek Puzyniak WMI_TDLS_ENABLE_ACTIVE, 70944c9f8d11SYingying Tang WMI_TDLS_ENABLE_ACTIVE_EXTERNAL_CONTROL, 7095ad45c888SMarek Puzyniak }; 7096ad45c888SMarek Puzyniak 7097ad45c888SMarek Puzyniak enum wmi_tdls_peer_state { 7098ad45c888SMarek Puzyniak WMI_TDLS_PEER_STATE_PEERING, 7099ad45c888SMarek Puzyniak WMI_TDLS_PEER_STATE_CONNECTED, 7100ad45c888SMarek Puzyniak WMI_TDLS_PEER_STATE_TEARDOWN, 7101ad45c888SMarek Puzyniak }; 7102ad45c888SMarek Puzyniak 7103ad45c888SMarek Puzyniak struct wmi_tdls_peer_update_cmd_arg { 7104ad45c888SMarek Puzyniak u32 vdev_id; 7105ad45c888SMarek Puzyniak enum wmi_tdls_peer_state peer_state; 7106ad45c888SMarek Puzyniak u8 addr[ETH_ALEN]; 7107ad45c888SMarek Puzyniak }; 7108ad45c888SMarek Puzyniak 7109ad45c888SMarek Puzyniak #define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32 7110ad45c888SMarek Puzyniak 7111add6cd8dSManikanta Pubbisetty #define WMI_TDLS_PEER_SP_MASK 0x60 7112add6cd8dSManikanta Pubbisetty #define WMI_TDLS_PEER_SP_LSB 5 7113add6cd8dSManikanta Pubbisetty 7114add6cd8dSManikanta Pubbisetty enum wmi_tdls_options { 7115add6cd8dSManikanta Pubbisetty WMI_TDLS_OFFCHAN_EN = BIT(0), 7116add6cd8dSManikanta Pubbisetty WMI_TDLS_BUFFER_STA_EN = BIT(1), 7117add6cd8dSManikanta Pubbisetty WMI_TDLS_SLEEP_STA_EN = BIT(2), 7118add6cd8dSManikanta Pubbisetty }; 7119add6cd8dSManikanta Pubbisetty 7120add6cd8dSManikanta Pubbisetty enum { 7121add6cd8dSManikanta Pubbisetty WMI_TDLS_PEER_QOS_AC_VO = BIT(0), 7122add6cd8dSManikanta Pubbisetty WMI_TDLS_PEER_QOS_AC_VI = BIT(1), 7123add6cd8dSManikanta Pubbisetty WMI_TDLS_PEER_QOS_AC_BK = BIT(2), 7124add6cd8dSManikanta Pubbisetty WMI_TDLS_PEER_QOS_AC_BE = BIT(3), 7125add6cd8dSManikanta Pubbisetty }; 7126add6cd8dSManikanta Pubbisetty 7127ad45c888SMarek Puzyniak struct wmi_tdls_peer_capab_arg { 7128ad45c888SMarek Puzyniak u8 peer_uapsd_queues; 7129ad45c888SMarek Puzyniak u8 peer_max_sp; 7130ad45c888SMarek Puzyniak u32 buff_sta_support; 7131ad45c888SMarek Puzyniak u32 off_chan_support; 7132ad45c888SMarek Puzyniak u32 peer_curr_operclass; 7133ad45c888SMarek Puzyniak u32 self_curr_operclass; 7134ad45c888SMarek Puzyniak u32 peer_chan_len; 7135ad45c888SMarek Puzyniak u32 peer_operclass_len; 7136ad45c888SMarek Puzyniak u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES]; 7137ad45c888SMarek Puzyniak u32 is_peer_responder; 7138ad45c888SMarek Puzyniak u32 pref_offchan_num; 7139ad45c888SMarek Puzyniak u32 pref_offchan_bw; 7140ad45c888SMarek Puzyniak }; 7141ad45c888SMarek Puzyniak 7142add6cd8dSManikanta Pubbisetty struct wmi_10_4_tdls_set_state_cmd { 7143add6cd8dSManikanta Pubbisetty __le32 vdev_id; 7144add6cd8dSManikanta Pubbisetty __le32 state; 7145add6cd8dSManikanta Pubbisetty __le32 notification_interval_ms; 7146add6cd8dSManikanta Pubbisetty __le32 tx_discovery_threshold; 7147add6cd8dSManikanta Pubbisetty __le32 tx_teardown_threshold; 7148add6cd8dSManikanta Pubbisetty __le32 rssi_teardown_threshold; 7149add6cd8dSManikanta Pubbisetty __le32 rssi_delta; 7150add6cd8dSManikanta Pubbisetty __le32 tdls_options; 7151add6cd8dSManikanta Pubbisetty __le32 tdls_peer_traffic_ind_window; 7152add6cd8dSManikanta Pubbisetty __le32 tdls_peer_traffic_response_timeout_ms; 7153add6cd8dSManikanta Pubbisetty __le32 tdls_puapsd_mask; 7154add6cd8dSManikanta Pubbisetty __le32 tdls_puapsd_inactivity_time_ms; 7155add6cd8dSManikanta Pubbisetty __le32 tdls_puapsd_rx_frame_threshold; 7156add6cd8dSManikanta Pubbisetty __le32 teardown_notification_ms; 7157add6cd8dSManikanta Pubbisetty __le32 tdls_peer_kickout_threshold; 7158add6cd8dSManikanta Pubbisetty } __packed; 7159add6cd8dSManikanta Pubbisetty 7160add6cd8dSManikanta Pubbisetty struct wmi_tdls_peer_capabilities { 7161add6cd8dSManikanta Pubbisetty __le32 peer_qos; 7162add6cd8dSManikanta Pubbisetty __le32 buff_sta_support; 7163add6cd8dSManikanta Pubbisetty __le32 off_chan_support; 7164add6cd8dSManikanta Pubbisetty __le32 peer_curr_operclass; 7165add6cd8dSManikanta Pubbisetty __le32 self_curr_operclass; 7166add6cd8dSManikanta Pubbisetty __le32 peer_chan_len; 7167add6cd8dSManikanta Pubbisetty __le32 peer_operclass_len; 7168add6cd8dSManikanta Pubbisetty u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES]; 7169add6cd8dSManikanta Pubbisetty __le32 is_peer_responder; 7170add6cd8dSManikanta Pubbisetty __le32 pref_offchan_num; 7171add6cd8dSManikanta Pubbisetty __le32 pref_offchan_bw; 7172add6cd8dSManikanta Pubbisetty struct wmi_channel peer_chan_list[1]; 7173add6cd8dSManikanta Pubbisetty } __packed; 7174add6cd8dSManikanta Pubbisetty 7175add6cd8dSManikanta Pubbisetty struct wmi_10_4_tdls_peer_update_cmd { 7176add6cd8dSManikanta Pubbisetty __le32 vdev_id; 7177add6cd8dSManikanta Pubbisetty struct wmi_mac_addr peer_macaddr; 7178add6cd8dSManikanta Pubbisetty __le32 peer_state; 7179add6cd8dSManikanta Pubbisetty __le32 reserved[4]; 7180add6cd8dSManikanta Pubbisetty struct wmi_tdls_peer_capabilities peer_capab; 7181add6cd8dSManikanta Pubbisetty } __packed; 7182add6cd8dSManikanta Pubbisetty 7183add6cd8dSManikanta Pubbisetty enum wmi_tdls_peer_reason { 7184add6cd8dSManikanta Pubbisetty WMI_TDLS_TEARDOWN_REASON_TX, 7185add6cd8dSManikanta Pubbisetty WMI_TDLS_TEARDOWN_REASON_RSSI, 7186add6cd8dSManikanta Pubbisetty WMI_TDLS_TEARDOWN_REASON_SCAN, 7187add6cd8dSManikanta Pubbisetty WMI_TDLS_DISCONNECTED_REASON_PEER_DELETE, 7188add6cd8dSManikanta Pubbisetty WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT, 7189add6cd8dSManikanta Pubbisetty WMI_TDLS_TEARDOWN_REASON_BAD_PTR, 7190add6cd8dSManikanta Pubbisetty WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE, 7191add6cd8dSManikanta Pubbisetty WMI_TDLS_ENTER_BUF_STA, 7192add6cd8dSManikanta Pubbisetty WMI_TDLS_EXIT_BUF_STA, 7193add6cd8dSManikanta Pubbisetty WMI_TDLS_ENTER_BT_BUSY_MODE, 7194add6cd8dSManikanta Pubbisetty WMI_TDLS_EXIT_BT_BUSY_MODE, 7195add6cd8dSManikanta Pubbisetty WMI_TDLS_SCAN_STARTED_EVENT, 7196add6cd8dSManikanta Pubbisetty WMI_TDLS_SCAN_COMPLETED_EVENT, 7197add6cd8dSManikanta Pubbisetty }; 7198add6cd8dSManikanta Pubbisetty 7199add6cd8dSManikanta Pubbisetty enum wmi_tdls_peer_notification { 7200add6cd8dSManikanta Pubbisetty WMI_TDLS_SHOULD_DISCOVER, 7201add6cd8dSManikanta Pubbisetty WMI_TDLS_SHOULD_TEARDOWN, 7202add6cd8dSManikanta Pubbisetty WMI_TDLS_PEER_DISCONNECTED, 7203add6cd8dSManikanta Pubbisetty WMI_TDLS_CONNECTION_TRACKER_NOTIFICATION, 7204add6cd8dSManikanta Pubbisetty }; 7205add6cd8dSManikanta Pubbisetty 7206add6cd8dSManikanta Pubbisetty struct wmi_tdls_peer_event { 7207add6cd8dSManikanta Pubbisetty struct wmi_mac_addr peer_macaddr; 7208add6cd8dSManikanta Pubbisetty /* see enum wmi_tdls_peer_notification*/ 7209add6cd8dSManikanta Pubbisetty __le32 peer_status; 7210add6cd8dSManikanta Pubbisetty /* see enum wmi_tdls_peer_reason */ 7211add6cd8dSManikanta Pubbisetty __le32 peer_reason; 7212add6cd8dSManikanta Pubbisetty __le32 vdev_id; 7213add6cd8dSManikanta Pubbisetty } __packed; 7214add6cd8dSManikanta Pubbisetty 721508e75ea8SVivek Natarajan enum wmi_txbf_conf { 721608e75ea8SVivek Natarajan WMI_TXBF_CONF_UNSUPPORTED, 721708e75ea8SVivek Natarajan WMI_TXBF_CONF_BEFORE_ASSOC, 721808e75ea8SVivek Natarajan WMI_TXBF_CONF_AFTER_ASSOC, 721908e75ea8SVivek Natarajan }; 722008e75ea8SVivek Natarajan 722162f77f09SMaharaja #define WMI_CCA_DETECT_LEVEL_AUTO 0 722262f77f09SMaharaja #define WMI_CCA_DETECT_MARGIN_AUTO 0 722362f77f09SMaharaja 722462f77f09SMaharaja struct wmi_pdev_set_adaptive_cca_params { 722562f77f09SMaharaja __le32 enable; 722662f77f09SMaharaja __le32 cca_detect_level; 722762f77f09SMaharaja __le32 cca_detect_margin; 722862f77f09SMaharaja } __packed; 722962f77f09SMaharaja 7230ce834e28SWen Gong #define WMI_PNO_MAX_SCHED_SCAN_PLANS 2 7231ce834e28SWen Gong #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT 7200 7232ce834e28SWen Gong #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100 7233ce834e28SWen Gong #define WMI_PNO_MAX_NETW_CHANNELS 26 7234ce834e28SWen Gong #define WMI_PNO_MAX_NETW_CHANNELS_EX 60 7235ce834e28SWen Gong #define WMI_PNO_MAX_SUPP_NETWORKS WLAN_SCAN_PARAMS_MAX_SSID 7236ce834e28SWen Gong #define WMI_PNO_MAX_IE_LENGTH WLAN_SCAN_PARAMS_MAX_IE_LEN 7237ce834e28SWen Gong 7238ce834e28SWen Gong /*size based of dot11 declaration without extra IEs as we will not carry those for PNO*/ 7239ce834e28SWen Gong #define WMI_PNO_MAX_PB_REQ_SIZE 450 7240ce834e28SWen Gong 7241ce834e28SWen Gong #define WMI_PNO_24G_DEFAULT_CH 1 7242ce834e28SWen Gong #define WMI_PNO_5G_DEFAULT_CH 36 7243ce834e28SWen Gong 7244ce834e28SWen Gong #define WMI_ACTIVE_MAX_CHANNEL_TIME 40 7245ce834e28SWen Gong #define WMI_PASSIVE_MAX_CHANNEL_TIME 110 7246ce834e28SWen Gong 7247ce834e28SWen Gong /* SSID broadcast type */ 7248ce834e28SWen Gong enum wmi_SSID_bcast_type { 7249ce834e28SWen Gong BCAST_UNKNOWN = 0, 7250ce834e28SWen Gong BCAST_NORMAL = 1, 7251ce834e28SWen Gong BCAST_HIDDEN = 2, 7252ce834e28SWen Gong }; 7253ce834e28SWen Gong 7254ce834e28SWen Gong struct wmi_network_type { 7255ce834e28SWen Gong struct wmi_ssid ssid; 7256ce834e28SWen Gong u32 authentication; 7257ce834e28SWen Gong u32 encryption; 7258ce834e28SWen Gong u32 bcast_nw_type; 7259ce834e28SWen Gong u8 channel_count; 7260ce834e28SWen Gong u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX]; 7261ce834e28SWen Gong s32 rssi_threshold; 7262ce834e28SWen Gong } __packed; 7263ce834e28SWen Gong 7264ce834e28SWen Gong struct wmi_pno_scan_req { 7265ce834e28SWen Gong u8 enable; 7266ce834e28SWen Gong u8 vdev_id; 7267ce834e28SWen Gong u8 uc_networks_count; 7268ce834e28SWen Gong struct wmi_network_type a_networks[WMI_PNO_MAX_SUPP_NETWORKS]; 7269ce834e28SWen Gong u32 fast_scan_period; 7270ce834e28SWen Gong u32 slow_scan_period; 7271ce834e28SWen Gong u8 fast_scan_max_cycles; 7272ce834e28SWen Gong 7273ce834e28SWen Gong bool do_passive_scan; 7274ce834e28SWen Gong 7275ce834e28SWen Gong u32 delay_start_time; 7276ce834e28SWen Gong u32 active_min_time; 7277ce834e28SWen Gong u32 active_max_time; 7278ce834e28SWen Gong u32 passive_min_time; 7279ce834e28SWen Gong u32 passive_max_time; 7280ce834e28SWen Gong 7281ce834e28SWen Gong /* mac address randomization attributes */ 7282ce834e28SWen Gong u32 enable_pno_scan_randomization; 7283ce834e28SWen Gong u8 mac_addr[ETH_ALEN]; 7284ce834e28SWen Gong u8 mac_addr_mask[ETH_ALEN]; 7285ce834e28SWen Gong } __packed; 7286ce834e28SWen Gong 728747771902SRaja Mani enum wmi_host_platform_type { 728847771902SRaja Mani WMI_HOST_PLATFORM_HIGH_PERF, 728947771902SRaja Mani WMI_HOST_PLATFORM_LOW_PERF, 729047771902SRaja Mani }; 729147771902SRaja Mani 72928a0b459eSRajkumar Manoharan enum wmi_bss_survey_req_type { 72938a0b459eSRajkumar Manoharan WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 72948a0b459eSRajkumar Manoharan WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 72958a0b459eSRajkumar Manoharan }; 72968a0b459eSRajkumar Manoharan 72978a0b459eSRajkumar Manoharan struct wmi_pdev_chan_info_req_cmd { 72988a0b459eSRajkumar Manoharan __le32 type; 72998a0b459eSRajkumar Manoharan __le32 reserved; 73008a0b459eSRajkumar Manoharan } __packed; 73018a0b459eSRajkumar Manoharan 730284758d4dSBhagavathi Perumal S /* bb timing register configurations */ 730384758d4dSBhagavathi Perumal S struct wmi_bb_timing_cfg_arg { 730484758d4dSBhagavathi Perumal S /* Tx_end to pa off timing */ 730584758d4dSBhagavathi Perumal S u32 bb_tx_timing; 730684758d4dSBhagavathi Perumal S 730784758d4dSBhagavathi Perumal S /* Tx_end to external pa off timing */ 730884758d4dSBhagavathi Perumal S u32 bb_xpa_timing; 730984758d4dSBhagavathi Perumal S }; 731084758d4dSBhagavathi Perumal S 731184758d4dSBhagavathi Perumal S struct wmi_pdev_bb_timing_cfg_cmd { 731284758d4dSBhagavathi Perumal S /* Tx_end to pa off timing */ 731384758d4dSBhagavathi Perumal S __le32 bb_tx_timing; 731484758d4dSBhagavathi Perumal S 731584758d4dSBhagavathi Perumal S /* Tx_end to external pa off timing */ 731684758d4dSBhagavathi Perumal S __le32 bb_xpa_timing; 731784758d4dSBhagavathi Perumal S } __packed; 731884758d4dSBhagavathi Perumal S 73195e3dd157SKalle Valo struct ath10k; 73205e3dd157SKalle Valo struct ath10k_vif; 73210226d602SMichal Kazior struct ath10k_fw_stats_pdev; 73220226d602SMichal Kazior struct ath10k_fw_stats_peer; 7323bc6f9ae6SManikanta Pubbisetty struct ath10k_fw_stats; 73245e3dd157SKalle Valo 73255e3dd157SKalle Valo int ath10k_wmi_attach(struct ath10k *ar); 73265e3dd157SKalle Valo void ath10k_wmi_detach(struct ath10k *ar); 7327a925a376SVasanthakumar Thiagarajan void ath10k_wmi_free_host_mem(struct ath10k *ar); 73285e3dd157SKalle Valo int ath10k_wmi_wait_for_service_ready(struct ath10k *ar); 73295e3dd157SKalle Valo int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar); 73305e3dd157SKalle Valo 73310226d602SMichal Kazior struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len); 733295bf21f9SMichal Kazior int ath10k_wmi_connect(struct ath10k *ar); 7333666a73f3SKalle Valo 7334666a73f3SKalle Valo struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len); 7335666a73f3SKalle Valo int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id); 7336d7579d12SMichal Kazior int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb, 7337d7579d12SMichal Kazior u32 cmd_id); 7338019e4280SKalle Valo void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *arg); 73395e3dd157SKalle Valo 7340b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src, 7341b91251fbSMichal Kazior struct ath10k_fw_stats_pdev *dst); 7342b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src, 7343b91251fbSMichal Kazior struct ath10k_fw_stats_pdev *dst); 7344b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src, 7345b91251fbSMichal Kazior struct ath10k_fw_stats_pdev *dst); 7346b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src, 73470226d602SMichal Kazior struct ath10k_fw_stats_pdev *dst); 73480226d602SMichal Kazior void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src, 73490226d602SMichal Kazior struct ath10k_fw_stats_peer *dst); 73500226d602SMichal Kazior void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar, 73510226d602SMichal Kazior struct wmi_host_mem_chunks *chunks); 73520226d602SMichal Kazior void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn, 73530226d602SMichal Kazior const struct wmi_start_scan_arg *arg); 73545e752e42SMichal Kazior void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params, 73550226d602SMichal Kazior const struct wmi_wmm_params_arg *arg); 7356795def8bSLei Wang void ath10k_wmi_put_wmi_channel(struct ath10k *ar, struct wmi_channel *ch, 73570226d602SMichal Kazior const struct wmi_channel_arg *arg); 73580226d602SMichal Kazior int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg); 73590226d602SMichal Kazior 73600226d602SMichal Kazior int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb); 73610226d602SMichal Kazior int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb); 7362dc405152SRakesh Pillai int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb); 7363cc123facSRakesh Pillai int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb); 73640226d602SMichal Kazior void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb); 73650226d602SMichal Kazior void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb); 73660226d602SMichal Kazior int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb); 73670226d602SMichal Kazior void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb); 73680226d602SMichal Kazior void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb); 73690226d602SMichal Kazior void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb); 73700226d602SMichal Kazior void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb); 73710226d602SMichal Kazior void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb); 73720226d602SMichal Kazior void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb); 73730226d602SMichal Kazior void ath10k_wmi_event_dfs(struct ath10k *ar, 7374991adf71SRaja Mani struct wmi_phyerr_ev_arg *phyerr, u64 tsf); 73750226d602SMichal Kazior void ath10k_wmi_event_spectral_scan(struct ath10k *ar, 7376991adf71SRaja Mani struct wmi_phyerr_ev_arg *phyerr, 73770226d602SMichal Kazior u64 tsf); 73780226d602SMichal Kazior void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb); 73790226d602SMichal Kazior void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb); 73800226d602SMichal Kazior void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb); 73810226d602SMichal Kazior void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb); 73820226d602SMichal Kazior void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb); 73830226d602SMichal Kazior void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb); 73840226d602SMichal Kazior void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar, 73850226d602SMichal Kazior struct sk_buff *skb); 73860226d602SMichal Kazior void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar, 73870226d602SMichal Kazior struct sk_buff *skb); 73880226d602SMichal Kazior void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb); 73890226d602SMichal Kazior void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb); 73900226d602SMichal Kazior void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb); 73910226d602SMichal Kazior void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb); 73920226d602SMichal Kazior void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb); 73930226d602SMichal Kazior void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, 73940226d602SMichal Kazior struct sk_buff *skb); 73950226d602SMichal Kazior void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb); 73960226d602SMichal Kazior void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb); 73970226d602SMichal Kazior void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb); 73980226d602SMichal Kazior void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar, 73990226d602SMichal Kazior struct sk_buff *skb); 74000226d602SMichal Kazior void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb); 74010226d602SMichal Kazior void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb); 74020226d602SMichal Kazior void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb); 74030226d602SMichal Kazior void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb); 74040226d602SMichal Kazior int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb); 7405cea19a6cSCarl Huang void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb); 7406991adf71SRaja Mani int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf, 7407991adf71SRaja Mani int left_len, struct wmi_phyerr_ev_arg *arg); 7408bc6f9ae6SManikanta Pubbisetty void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar, 7409bc6f9ae6SManikanta Pubbisetty struct ath10k_fw_stats *fw_stats, 7410bc6f9ae6SManikanta Pubbisetty char *buf); 7411bc6f9ae6SManikanta Pubbisetty void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar, 7412bc6f9ae6SManikanta Pubbisetty struct ath10k_fw_stats *fw_stats, 7413bc6f9ae6SManikanta Pubbisetty char *buf); 7414bc6f9ae6SManikanta Pubbisetty size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head); 7415bc6f9ae6SManikanta Pubbisetty size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head); 741698dd2b92SManikanta Pubbisetty void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar, 741798dd2b92SManikanta Pubbisetty struct ath10k_fw_stats *fw_stats, 741898dd2b92SManikanta Pubbisetty char *buf); 74196e4de1a4SPeter Oh int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar, 74206e4de1a4SPeter Oh enum wmi_vdev_subtype subtype); 742120ddca21SMichal Kazior int ath10k_wmi_barrier(struct ath10k *ar); 7422bc64d052SMaharaja Kennadyrajan void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table, 7423bc64d052SMaharaja Kennadyrajan u32 num_tx_chain); 7424bc64d052SMaharaja Kennadyrajan void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb); 7425bc6f9ae6SManikanta Pubbisetty 74265e3dd157SKalle Valo #endif /* _WMI_H_ */ 7427