15e3dd157SKalle Valo /* 25e3dd157SKalle Valo * Copyright (c) 2005-2011 Atheros Communications Inc. 35e3dd157SKalle Valo * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 45e3dd157SKalle Valo * 55e3dd157SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 65e3dd157SKalle Valo * purpose with or without fee is hereby granted, provided that the above 75e3dd157SKalle Valo * copyright notice and this permission notice appear in all copies. 85e3dd157SKalle Valo * 95e3dd157SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 105e3dd157SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 115e3dd157SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 125e3dd157SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 135e3dd157SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 145e3dd157SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 155e3dd157SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 165e3dd157SKalle Valo */ 175e3dd157SKalle Valo 185e3dd157SKalle Valo #ifndef _WMI_H_ 195e3dd157SKalle Valo #define _WMI_H_ 205e3dd157SKalle Valo 215e3dd157SKalle Valo #include <linux/types.h> 225e3dd157SKalle Valo #include <net/mac80211.h> 235e3dd157SKalle Valo 245e3dd157SKalle Valo /* 255e3dd157SKalle Valo * This file specifies the WMI interface for the Unified Software 265e3dd157SKalle Valo * Architecture. 275e3dd157SKalle Valo * 285e3dd157SKalle Valo * It includes definitions of all the commands and events. Commands are 295e3dd157SKalle Valo * messages from the host to the target. Events and Replies are messages 305e3dd157SKalle Valo * from the target to the host. 315e3dd157SKalle Valo * 325e3dd157SKalle Valo * Ownership of correctness in regards to WMI commands belongs to the host 335e3dd157SKalle Valo * driver and the target is not required to validate parameters for value, 345e3dd157SKalle Valo * proper range, or any other checking. 355e3dd157SKalle Valo * 365e3dd157SKalle Valo * Guidelines for extending this interface are below. 375e3dd157SKalle Valo * 385e3dd157SKalle Valo * 1. Add new WMI commands ONLY within the specified range - 0x9000 - 0x9fff 395e3dd157SKalle Valo * 405e3dd157SKalle Valo * 2. Use ONLY u32 type for defining member variables within WMI 415e3dd157SKalle Valo * command/event structures. Do not use u8, u16, bool or 425e3dd157SKalle Valo * enum types within these structures. 435e3dd157SKalle Valo * 445e3dd157SKalle Valo * 3. DO NOT define bit fields within structures. Implement bit fields 455e3dd157SKalle Valo * using masks if necessary. Do not use the programming language's bit 465e3dd157SKalle Valo * field definition. 475e3dd157SKalle Valo * 485e3dd157SKalle Valo * 4. Define macros for encode/decode of u8, u16 fields within 495e3dd157SKalle Valo * the u32 variables. Use these macros for set/get of these fields. 505e3dd157SKalle Valo * Try to use this to optimize the structure without bloating it with 515e3dd157SKalle Valo * u32 variables for every lower sized field. 525e3dd157SKalle Valo * 535e3dd157SKalle Valo * 5. Do not use PACK/UNPACK attributes for the structures as each member 545e3dd157SKalle Valo * variable is already 4-byte aligned by virtue of being a u32 555e3dd157SKalle Valo * type. 565e3dd157SKalle Valo * 575e3dd157SKalle Valo * 6. Comment each parameter part of the WMI command/event structure by 585e3dd157SKalle Valo * using the 2 stars at the begining of C comment instead of one star to 595e3dd157SKalle Valo * enable HTML document generation using Doxygen. 605e3dd157SKalle Valo * 615e3dd157SKalle Valo */ 625e3dd157SKalle Valo 635e3dd157SKalle Valo /* Control Path */ 645e3dd157SKalle Valo struct wmi_cmd_hdr { 655e3dd157SKalle Valo __le32 cmd_id; 665e3dd157SKalle Valo } __packed; 675e3dd157SKalle Valo 685e3dd157SKalle Valo #define WMI_CMD_HDR_CMD_ID_MASK 0x00FFFFFF 695e3dd157SKalle Valo #define WMI_CMD_HDR_CMD_ID_LSB 0 705e3dd157SKalle Valo #define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000 715e3dd157SKalle Valo #define WMI_CMD_HDR_PLT_PRIV_LSB 24 725e3dd157SKalle Valo 735e3dd157SKalle Valo #define HTC_PROTOCOL_VERSION 0x0002 745e3dd157SKalle Valo #define WMI_PROTOCOL_VERSION 0x0002 755e3dd157SKalle Valo 763b8fc902SKalle Valo /* 773b8fc902SKalle Valo * There is no signed version of __le32, so for a temporary solution come 783b8fc902SKalle Valo * up with our own version. The idea is from fs/ntfs/types.h. 793b8fc902SKalle Valo * 803b8fc902SKalle Valo * Use a_ prefix so that it doesn't conflict if we get proper support to 813b8fc902SKalle Valo * linux/types.h. 823b8fc902SKalle Valo */ 833b8fc902SKalle Valo typedef __s32 __bitwise a_sle32; 843b8fc902SKalle Valo 853b8fc902SKalle Valo static inline a_sle32 a_cpu_to_sle32(s32 val) 863b8fc902SKalle Valo { 873b8fc902SKalle Valo return (__force a_sle32)cpu_to_le32(val); 883b8fc902SKalle Valo } 893b8fc902SKalle Valo 903b8fc902SKalle Valo static inline s32 a_sle32_to_cpu(a_sle32 val) 913b8fc902SKalle Valo { 923b8fc902SKalle Valo return le32_to_cpu((__force __le32)val); 933b8fc902SKalle Valo } 943b8fc902SKalle Valo 95cff990ceSMichal Kazior enum wmi_service { 96cff990ceSMichal Kazior WMI_SERVICE_BEACON_OFFLOAD = 0, 97cff990ceSMichal Kazior WMI_SERVICE_SCAN_OFFLOAD, 98cff990ceSMichal Kazior WMI_SERVICE_ROAM_OFFLOAD, 99cff990ceSMichal Kazior WMI_SERVICE_BCN_MISS_OFFLOAD, 100cff990ceSMichal Kazior WMI_SERVICE_STA_PWRSAVE, 101cff990ceSMichal Kazior WMI_SERVICE_STA_ADVANCED_PWRSAVE, 102cff990ceSMichal Kazior WMI_SERVICE_AP_UAPSD, 103cff990ceSMichal Kazior WMI_SERVICE_AP_DFS, 104cff990ceSMichal Kazior WMI_SERVICE_11AC, 105cff990ceSMichal Kazior WMI_SERVICE_BLOCKACK, 106cff990ceSMichal Kazior WMI_SERVICE_PHYERR, 107cff990ceSMichal Kazior WMI_SERVICE_BCN_FILTER, 108cff990ceSMichal Kazior WMI_SERVICE_RTT, 109cff990ceSMichal Kazior WMI_SERVICE_RATECTRL, 110cff990ceSMichal Kazior WMI_SERVICE_WOW, 111cff990ceSMichal Kazior WMI_SERVICE_RATECTRL_CACHE, 112cff990ceSMichal Kazior WMI_SERVICE_IRAM_TIDS, 113cff990ceSMichal Kazior WMI_SERVICE_ARPNS_OFFLOAD, 114cff990ceSMichal Kazior WMI_SERVICE_NLO, 115cff990ceSMichal Kazior WMI_SERVICE_GTK_OFFLOAD, 116cff990ceSMichal Kazior WMI_SERVICE_SCAN_SCH, 117cff990ceSMichal Kazior WMI_SERVICE_CSA_OFFLOAD, 118cff990ceSMichal Kazior WMI_SERVICE_CHATTER, 119cff990ceSMichal Kazior WMI_SERVICE_COEX_FREQAVOID, 120cff990ceSMichal Kazior WMI_SERVICE_PACKET_POWER_SAVE, 121cff990ceSMichal Kazior WMI_SERVICE_FORCE_FW_HANG, 122cff990ceSMichal Kazior WMI_SERVICE_GPIO, 123cff990ceSMichal Kazior WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, 124cff990ceSMichal Kazior WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, 125cff990ceSMichal Kazior WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, 126cff990ceSMichal Kazior WMI_SERVICE_STA_KEEP_ALIVE, 127cff990ceSMichal Kazior WMI_SERVICE_TX_ENCAP, 128cff990ceSMichal Kazior WMI_SERVICE_BURST, 129cff990ceSMichal Kazior WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, 130cff990ceSMichal Kazior WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, 131ca996ec5SMichal Kazior WMI_SERVICE_ROAM_SCAN_OFFLOAD, 132ca996ec5SMichal Kazior WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, 133ca996ec5SMichal Kazior WMI_SERVICE_EARLY_RX, 134ca996ec5SMichal Kazior WMI_SERVICE_STA_SMPS, 135ca996ec5SMichal Kazior WMI_SERVICE_FWTEST, 136ca996ec5SMichal Kazior WMI_SERVICE_STA_WMMAC, 137ca996ec5SMichal Kazior WMI_SERVICE_TDLS, 138ca996ec5SMichal Kazior WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE, 139ca996ec5SMichal Kazior WMI_SERVICE_ADAPTIVE_OCS, 140ca996ec5SMichal Kazior WMI_SERVICE_BA_SSN_SUPPORT, 141ca996ec5SMichal Kazior WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE, 142ca996ec5SMichal Kazior WMI_SERVICE_WLAN_HB, 143ca996ec5SMichal Kazior WMI_SERVICE_LTE_ANT_SHARE_SUPPORT, 144ca996ec5SMichal Kazior WMI_SERVICE_BATCH_SCAN, 145ca996ec5SMichal Kazior WMI_SERVICE_QPOWER, 146ca996ec5SMichal Kazior WMI_SERVICE_PLMREQ, 147ca996ec5SMichal Kazior WMI_SERVICE_THERMAL_MGMT, 148ca996ec5SMichal Kazior WMI_SERVICE_RMC, 149ca996ec5SMichal Kazior WMI_SERVICE_MHF_OFFLOAD, 150ca996ec5SMichal Kazior WMI_SERVICE_COEX_SAR, 151ca996ec5SMichal Kazior WMI_SERVICE_BCN_TXRATE_OVERRIDE, 152ca996ec5SMichal Kazior WMI_SERVICE_NAN, 153ca996ec5SMichal Kazior WMI_SERVICE_L1SS_STAT, 154ca996ec5SMichal Kazior WMI_SERVICE_ESTIMATE_LINKSPEED, 155ca996ec5SMichal Kazior WMI_SERVICE_OBSS_SCAN, 156ca996ec5SMichal Kazior WMI_SERVICE_TDLS_OFFCHAN, 157ca996ec5SMichal Kazior WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 158ca996ec5SMichal Kazior WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, 159ca996ec5SMichal Kazior WMI_SERVICE_IBSS_PWRSAVE, 160ca996ec5SMichal Kazior WMI_SERVICE_LPASS, 161ca996ec5SMichal Kazior WMI_SERVICE_EXTSCAN, 162ca996ec5SMichal Kazior WMI_SERVICE_D0WOW, 163ca996ec5SMichal Kazior WMI_SERVICE_HSOFFLOAD, 164ca996ec5SMichal Kazior WMI_SERVICE_ROAM_HO_OFFLOAD, 165ca996ec5SMichal Kazior WMI_SERVICE_RX_FULL_REORDER, 166ca996ec5SMichal Kazior WMI_SERVICE_DHCP_OFFLOAD, 167ca996ec5SMichal Kazior WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT, 168ca996ec5SMichal Kazior WMI_SERVICE_MDNS_OFFLOAD, 169ca996ec5SMichal Kazior WMI_SERVICE_SAP_AUTH_OFFLOAD, 17052c22a63SYanbo Li WMI_SERVICE_ATF, 171de0c789bSYanbo Li WMI_SERVICE_COEX_GPIO, 172840357ccSRaja Mani WMI_SERVICE_ENHANCED_PROXY_STA, 173840357ccSRaja Mani WMI_SERVICE_TT, 174840357ccSRaja Mani WMI_SERVICE_PEER_CACHING, 175840357ccSRaja Mani WMI_SERVICE_AUX_SPECTRAL_INTF, 176840357ccSRaja Mani WMI_SERVICE_AUX_CHAN_LOAD_INTF, 177840357ccSRaja Mani WMI_SERVICE_BSS_CHANNEL_INFO_64, 178e3c6225dSVasanthakumar Thiagarajan WMI_SERVICE_EXT_RES_CFG_SUPPORT, 1790b3d76e9SPeter Oh WMI_SERVICE_MESH_11S, 1800b3d76e9SPeter Oh WMI_SERVICE_MESH_NON_11S, 181de46c015SMohammed Shafi Shajakhan WMI_SERVICE_PEER_STATS, 182c4f8c836SMichal Kazior 183c4f8c836SMichal Kazior /* keep last */ 184c4f8c836SMichal Kazior WMI_SERVICE_MAX, 185cff990ceSMichal Kazior }; 1865e3dd157SKalle Valo 187cff990ceSMichal Kazior enum wmi_10x_service { 188cff990ceSMichal Kazior WMI_10X_SERVICE_BEACON_OFFLOAD = 0, 189cff990ceSMichal Kazior WMI_10X_SERVICE_SCAN_OFFLOAD, 190cff990ceSMichal Kazior WMI_10X_SERVICE_ROAM_OFFLOAD, 191cff990ceSMichal Kazior WMI_10X_SERVICE_BCN_MISS_OFFLOAD, 192cff990ceSMichal Kazior WMI_10X_SERVICE_STA_PWRSAVE, 193cff990ceSMichal Kazior WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE, 194cff990ceSMichal Kazior WMI_10X_SERVICE_AP_UAPSD, 195cff990ceSMichal Kazior WMI_10X_SERVICE_AP_DFS, 196cff990ceSMichal Kazior WMI_10X_SERVICE_11AC, 197cff990ceSMichal Kazior WMI_10X_SERVICE_BLOCKACK, 198cff990ceSMichal Kazior WMI_10X_SERVICE_PHYERR, 199cff990ceSMichal Kazior WMI_10X_SERVICE_BCN_FILTER, 200cff990ceSMichal Kazior WMI_10X_SERVICE_RTT, 201cff990ceSMichal Kazior WMI_10X_SERVICE_RATECTRL, 202cff990ceSMichal Kazior WMI_10X_SERVICE_WOW, 203cff990ceSMichal Kazior WMI_10X_SERVICE_RATECTRL_CACHE, 204cff990ceSMichal Kazior WMI_10X_SERVICE_IRAM_TIDS, 205cff990ceSMichal Kazior WMI_10X_SERVICE_BURST, 206cff990ceSMichal Kazior 207cff990ceSMichal Kazior /* introduced in 10.2 */ 208cff990ceSMichal Kazior WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT, 209cff990ceSMichal Kazior WMI_10X_SERVICE_FORCE_FW_HANG, 210cff990ceSMichal Kazior WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT, 21152c22a63SYanbo Li WMI_10X_SERVICE_ATF, 212de0c789bSYanbo Li WMI_10X_SERVICE_COEX_GPIO, 21320fa2f7fSPeter Oh WMI_10X_SERVICE_AUX_SPECTRAL_INTF, 21420fa2f7fSPeter Oh WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF, 21520fa2f7fSPeter Oh WMI_10X_SERVICE_BSS_CHANNEL_INFO_64, 21620fa2f7fSPeter Oh WMI_10X_SERVICE_MESH, 21720fa2f7fSPeter Oh WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT, 218de46c015SMohammed Shafi Shajakhan WMI_10X_SERVICE_PEER_STATS, 219cff990ceSMichal Kazior }; 220cff990ceSMichal Kazior 221cff990ceSMichal Kazior enum wmi_main_service { 222cff990ceSMichal Kazior WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0, 223cff990ceSMichal Kazior WMI_MAIN_SERVICE_SCAN_OFFLOAD, 224cff990ceSMichal Kazior WMI_MAIN_SERVICE_ROAM_OFFLOAD, 225cff990ceSMichal Kazior WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD, 226cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_PWRSAVE, 227cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE, 228cff990ceSMichal Kazior WMI_MAIN_SERVICE_AP_UAPSD, 229cff990ceSMichal Kazior WMI_MAIN_SERVICE_AP_DFS, 230cff990ceSMichal Kazior WMI_MAIN_SERVICE_11AC, 231cff990ceSMichal Kazior WMI_MAIN_SERVICE_BLOCKACK, 232cff990ceSMichal Kazior WMI_MAIN_SERVICE_PHYERR, 233cff990ceSMichal Kazior WMI_MAIN_SERVICE_BCN_FILTER, 234cff990ceSMichal Kazior WMI_MAIN_SERVICE_RTT, 235cff990ceSMichal Kazior WMI_MAIN_SERVICE_RATECTRL, 236cff990ceSMichal Kazior WMI_MAIN_SERVICE_WOW, 237cff990ceSMichal Kazior WMI_MAIN_SERVICE_RATECTRL_CACHE, 238cff990ceSMichal Kazior WMI_MAIN_SERVICE_IRAM_TIDS, 239cff990ceSMichal Kazior WMI_MAIN_SERVICE_ARPNS_OFFLOAD, 240cff990ceSMichal Kazior WMI_MAIN_SERVICE_NLO, 241cff990ceSMichal Kazior WMI_MAIN_SERVICE_GTK_OFFLOAD, 242cff990ceSMichal Kazior WMI_MAIN_SERVICE_SCAN_SCH, 243cff990ceSMichal Kazior WMI_MAIN_SERVICE_CSA_OFFLOAD, 244cff990ceSMichal Kazior WMI_MAIN_SERVICE_CHATTER, 245cff990ceSMichal Kazior WMI_MAIN_SERVICE_COEX_FREQAVOID, 246cff990ceSMichal Kazior WMI_MAIN_SERVICE_PACKET_POWER_SAVE, 247cff990ceSMichal Kazior WMI_MAIN_SERVICE_FORCE_FW_HANG, 248cff990ceSMichal Kazior WMI_MAIN_SERVICE_GPIO, 249cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM, 250cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, 251cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, 252cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_KEEP_ALIVE, 253cff990ceSMichal Kazior WMI_MAIN_SERVICE_TX_ENCAP, 2545e3dd157SKalle Valo }; 2555e3dd157SKalle Valo 256840357ccSRaja Mani enum wmi_10_4_service { 257840357ccSRaja Mani WMI_10_4_SERVICE_BEACON_OFFLOAD = 0, 258840357ccSRaja Mani WMI_10_4_SERVICE_SCAN_OFFLOAD, 259840357ccSRaja Mani WMI_10_4_SERVICE_ROAM_OFFLOAD, 260840357ccSRaja Mani WMI_10_4_SERVICE_BCN_MISS_OFFLOAD, 261840357ccSRaja Mani WMI_10_4_SERVICE_STA_PWRSAVE, 262840357ccSRaja Mani WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE, 263840357ccSRaja Mani WMI_10_4_SERVICE_AP_UAPSD, 264840357ccSRaja Mani WMI_10_4_SERVICE_AP_DFS, 265840357ccSRaja Mani WMI_10_4_SERVICE_11AC, 266840357ccSRaja Mani WMI_10_4_SERVICE_BLOCKACK, 267840357ccSRaja Mani WMI_10_4_SERVICE_PHYERR, 268840357ccSRaja Mani WMI_10_4_SERVICE_BCN_FILTER, 269840357ccSRaja Mani WMI_10_4_SERVICE_RTT, 270840357ccSRaja Mani WMI_10_4_SERVICE_RATECTRL, 271840357ccSRaja Mani WMI_10_4_SERVICE_WOW, 272840357ccSRaja Mani WMI_10_4_SERVICE_RATECTRL_CACHE, 273840357ccSRaja Mani WMI_10_4_SERVICE_IRAM_TIDS, 274840357ccSRaja Mani WMI_10_4_SERVICE_BURST, 275840357ccSRaja Mani WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT, 276840357ccSRaja Mani WMI_10_4_SERVICE_GTK_OFFLOAD, 277840357ccSRaja Mani WMI_10_4_SERVICE_SCAN_SCH, 278840357ccSRaja Mani WMI_10_4_SERVICE_CSA_OFFLOAD, 279840357ccSRaja Mani WMI_10_4_SERVICE_CHATTER, 280840357ccSRaja Mani WMI_10_4_SERVICE_COEX_FREQAVOID, 281840357ccSRaja Mani WMI_10_4_SERVICE_PACKET_POWER_SAVE, 282840357ccSRaja Mani WMI_10_4_SERVICE_FORCE_FW_HANG, 283840357ccSRaja Mani WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT, 284840357ccSRaja Mani WMI_10_4_SERVICE_GPIO, 285840357ccSRaja Mani WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, 286840357ccSRaja Mani WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, 287840357ccSRaja Mani WMI_10_4_SERVICE_STA_KEEP_ALIVE, 288840357ccSRaja Mani WMI_10_4_SERVICE_TX_ENCAP, 289840357ccSRaja Mani WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, 290840357ccSRaja Mani WMI_10_4_SERVICE_EARLY_RX, 291840357ccSRaja Mani WMI_10_4_SERVICE_ENHANCED_PROXY_STA, 292840357ccSRaja Mani WMI_10_4_SERVICE_TT, 293840357ccSRaja Mani WMI_10_4_SERVICE_ATF, 294840357ccSRaja Mani WMI_10_4_SERVICE_PEER_CACHING, 295840357ccSRaja Mani WMI_10_4_SERVICE_COEX_GPIO, 296840357ccSRaja Mani WMI_10_4_SERVICE_AUX_SPECTRAL_INTF, 297840357ccSRaja Mani WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF, 298840357ccSRaja Mani WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64, 299e3c6225dSVasanthakumar Thiagarajan WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT, 3000b3d76e9SPeter Oh WMI_10_4_SERVICE_MESH_NON_11S, 301840357ccSRaja Mani }; 302840357ccSRaja Mani 3035e3dd157SKalle Valo static inline char *wmi_service_name(int service_id) 3045e3dd157SKalle Valo { 305cff990ceSMichal Kazior #define SVCSTR(x) case x: return #x 306cff990ceSMichal Kazior 3075e3dd157SKalle Valo switch (service_id) { 308cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BEACON_OFFLOAD); 309cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_SCAN_OFFLOAD); 310cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_ROAM_OFFLOAD); 311cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD); 312cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_PWRSAVE); 313cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE); 314cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_AP_UAPSD); 315cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_AP_DFS); 316cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_11AC); 317cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BLOCKACK); 318cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_PHYERR); 319cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BCN_FILTER); 320cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_RTT); 321cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_RATECTRL); 322cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_WOW); 323cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_RATECTRL_CACHE); 324cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_IRAM_TIDS); 325cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD); 326cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_NLO); 327cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_GTK_OFFLOAD); 328cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_SCAN_SCH); 329cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_CSA_OFFLOAD); 330cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_CHATTER); 331cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_COEX_FREQAVOID); 332cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE); 333cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_FORCE_FW_HANG); 334cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_GPIO); 335cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM); 336cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG); 337cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG); 338cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE); 339cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_TX_ENCAP); 340cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BURST); 341cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT); 342cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT); 343ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD); 344ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC); 345ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_EARLY_RX); 346ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_STA_SMPS); 347ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_FWTEST); 348ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_STA_WMMAC); 349ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_TDLS); 350ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE); 351ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_ADAPTIVE_OCS); 352ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT); 353ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE); 354ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_WLAN_HB); 355ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT); 356ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_BATCH_SCAN); 357ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_QPOWER); 358ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_PLMREQ); 359ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_THERMAL_MGMT); 360ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_RMC); 361ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_MHF_OFFLOAD); 362ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_COEX_SAR); 363ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE); 364ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_NAN); 365ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_L1SS_STAT); 366ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED); 367ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_OBSS_SCAN); 368ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_TDLS_OFFCHAN); 369ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA); 370ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA); 371ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_IBSS_PWRSAVE); 372ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_LPASS); 373ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_EXTSCAN); 374ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_D0WOW); 375ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_HSOFFLOAD); 376ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD); 377ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_RX_FULL_REORDER); 378ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_DHCP_OFFLOAD); 379ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT); 380ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_MDNS_OFFLOAD); 381ca996ec5SMichal Kazior SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD); 38252c22a63SYanbo Li SVCSTR(WMI_SERVICE_ATF); 383de0c789bSYanbo Li SVCSTR(WMI_SERVICE_COEX_GPIO); 384840357ccSRaja Mani SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA); 385840357ccSRaja Mani SVCSTR(WMI_SERVICE_TT); 386840357ccSRaja Mani SVCSTR(WMI_SERVICE_PEER_CACHING); 387840357ccSRaja Mani SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF); 388840357ccSRaja Mani SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF); 389840357ccSRaja Mani SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64); 390e3c6225dSVasanthakumar Thiagarajan SVCSTR(WMI_SERVICE_EXT_RES_CFG_SUPPORT); 3910b3d76e9SPeter Oh SVCSTR(WMI_SERVICE_MESH_11S); 3920b3d76e9SPeter Oh SVCSTR(WMI_SERVICE_MESH_NON_11S); 393de46c015SMohammed Shafi Shajakhan SVCSTR(WMI_SERVICE_PEER_STATS); 3945e3dd157SKalle Valo default: 395cff990ceSMichal Kazior return NULL; 3965e3dd157SKalle Valo } 3975e3dd157SKalle Valo 398cff990ceSMichal Kazior #undef SVCSTR 399cff990ceSMichal Kazior } 400cff990ceSMichal Kazior 40137b9f933SMichal Kazior #define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \ 40237b9f933SMichal Kazior ((svc_id) < (len) && \ 40337b9f933SMichal Kazior __le32_to_cpu((wmi_svc_bmap)[(svc_id)/(sizeof(u32))]) & \ 404cff990ceSMichal Kazior BIT((svc_id)%(sizeof(u32)))) 405cff990ceSMichal Kazior 40637b9f933SMichal Kazior #define SVCMAP(x, y, len) \ 407cff990ceSMichal Kazior do { \ 40837b9f933SMichal Kazior if (WMI_SERVICE_IS_ENABLED((in), (x), (len))) \ 409cff990ceSMichal Kazior __set_bit(y, out); \ 410cff990ceSMichal Kazior } while (0) 411cff990ceSMichal Kazior 41237b9f933SMichal Kazior static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out, 41337b9f933SMichal Kazior size_t len) 414cff990ceSMichal Kazior { 415cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD, 41637b9f933SMichal Kazior WMI_SERVICE_BEACON_OFFLOAD, len); 417cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD, 41837b9f933SMichal Kazior WMI_SERVICE_SCAN_OFFLOAD, len); 419cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD, 42037b9f933SMichal Kazior WMI_SERVICE_ROAM_OFFLOAD, len); 421cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD, 42237b9f933SMichal Kazior WMI_SERVICE_BCN_MISS_OFFLOAD, len); 423cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE, 42437b9f933SMichal Kazior WMI_SERVICE_STA_PWRSAVE, len); 425cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE, 42637b9f933SMichal Kazior WMI_SERVICE_STA_ADVANCED_PWRSAVE, len); 427cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_AP_UAPSD, 42837b9f933SMichal Kazior WMI_SERVICE_AP_UAPSD, len); 429cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_AP_DFS, 43037b9f933SMichal Kazior WMI_SERVICE_AP_DFS, len); 431cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_11AC, 43237b9f933SMichal Kazior WMI_SERVICE_11AC, len); 433cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BLOCKACK, 43437b9f933SMichal Kazior WMI_SERVICE_BLOCKACK, len); 435cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_PHYERR, 43637b9f933SMichal Kazior WMI_SERVICE_PHYERR, len); 437cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BCN_FILTER, 43837b9f933SMichal Kazior WMI_SERVICE_BCN_FILTER, len); 439cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_RTT, 44037b9f933SMichal Kazior WMI_SERVICE_RTT, len); 441cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_RATECTRL, 44237b9f933SMichal Kazior WMI_SERVICE_RATECTRL, len); 443cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_WOW, 44437b9f933SMichal Kazior WMI_SERVICE_WOW, len); 445cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE, 44637b9f933SMichal Kazior WMI_SERVICE_RATECTRL_CACHE, len); 447cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_IRAM_TIDS, 44837b9f933SMichal Kazior WMI_SERVICE_IRAM_TIDS, len); 449cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BURST, 45037b9f933SMichal Kazior WMI_SERVICE_BURST, len); 451cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT, 45237b9f933SMichal Kazior WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len); 453cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG, 45437b9f933SMichal Kazior WMI_SERVICE_FORCE_FW_HANG, len); 455cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT, 45637b9f933SMichal Kazior WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len); 45752c22a63SYanbo Li SVCMAP(WMI_10X_SERVICE_ATF, 45852c22a63SYanbo Li WMI_SERVICE_ATF, len); 459de0c789bSYanbo Li SVCMAP(WMI_10X_SERVICE_COEX_GPIO, 460de0c789bSYanbo Li WMI_SERVICE_COEX_GPIO, len); 46120fa2f7fSPeter Oh SVCMAP(WMI_10X_SERVICE_AUX_SPECTRAL_INTF, 46220fa2f7fSPeter Oh WMI_SERVICE_AUX_SPECTRAL_INTF, len); 46320fa2f7fSPeter Oh SVCMAP(WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF, 46420fa2f7fSPeter Oh WMI_SERVICE_AUX_CHAN_LOAD_INTF, len); 46520fa2f7fSPeter Oh SVCMAP(WMI_10X_SERVICE_BSS_CHANNEL_INFO_64, 46620fa2f7fSPeter Oh WMI_SERVICE_BSS_CHANNEL_INFO_64, len); 46720fa2f7fSPeter Oh SVCMAP(WMI_10X_SERVICE_MESH, 4680b3d76e9SPeter Oh WMI_SERVICE_MESH_11S, len); 46920fa2f7fSPeter Oh SVCMAP(WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT, 47020fa2f7fSPeter Oh WMI_SERVICE_EXT_RES_CFG_SUPPORT, len); 471de46c015SMohammed Shafi Shajakhan SVCMAP(WMI_10X_SERVICE_PEER_STATS, 472de46c015SMohammed Shafi Shajakhan WMI_SERVICE_PEER_STATS, len); 473cff990ceSMichal Kazior } 474cff990ceSMichal Kazior 47537b9f933SMichal Kazior static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out, 47637b9f933SMichal Kazior size_t len) 477cff990ceSMichal Kazior { 478cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD, 47937b9f933SMichal Kazior WMI_SERVICE_BEACON_OFFLOAD, len); 480cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD, 48137b9f933SMichal Kazior WMI_SERVICE_SCAN_OFFLOAD, len); 482cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD, 48337b9f933SMichal Kazior WMI_SERVICE_ROAM_OFFLOAD, len); 484cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD, 48537b9f933SMichal Kazior WMI_SERVICE_BCN_MISS_OFFLOAD, len); 486cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE, 48737b9f933SMichal Kazior WMI_SERVICE_STA_PWRSAVE, len); 488cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE, 48937b9f933SMichal Kazior WMI_SERVICE_STA_ADVANCED_PWRSAVE, len); 490cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD, 49137b9f933SMichal Kazior WMI_SERVICE_AP_UAPSD, len); 492cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_AP_DFS, 49337b9f933SMichal Kazior WMI_SERVICE_AP_DFS, len); 494cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_11AC, 49537b9f933SMichal Kazior WMI_SERVICE_11AC, len); 496cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_BLOCKACK, 49737b9f933SMichal Kazior WMI_SERVICE_BLOCKACK, len); 498cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_PHYERR, 49937b9f933SMichal Kazior WMI_SERVICE_PHYERR, len); 500cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER, 50137b9f933SMichal Kazior WMI_SERVICE_BCN_FILTER, len); 502cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_RTT, 50337b9f933SMichal Kazior WMI_SERVICE_RTT, len); 504cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_RATECTRL, 50537b9f933SMichal Kazior WMI_SERVICE_RATECTRL, len); 506cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_WOW, 50737b9f933SMichal Kazior WMI_SERVICE_WOW, len); 508cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE, 50937b9f933SMichal Kazior WMI_SERVICE_RATECTRL_CACHE, len); 510cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS, 51137b9f933SMichal Kazior WMI_SERVICE_IRAM_TIDS, len); 512cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD, 51337b9f933SMichal Kazior WMI_SERVICE_ARPNS_OFFLOAD, len); 514cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_NLO, 51537b9f933SMichal Kazior WMI_SERVICE_NLO, len); 516cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD, 51737b9f933SMichal Kazior WMI_SERVICE_GTK_OFFLOAD, len); 518cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH, 51937b9f933SMichal Kazior WMI_SERVICE_SCAN_SCH, len); 520cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD, 52137b9f933SMichal Kazior WMI_SERVICE_CSA_OFFLOAD, len); 522cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_CHATTER, 52337b9f933SMichal Kazior WMI_SERVICE_CHATTER, len); 524cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID, 52537b9f933SMichal Kazior WMI_SERVICE_COEX_FREQAVOID, len); 526cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE, 52737b9f933SMichal Kazior WMI_SERVICE_PACKET_POWER_SAVE, len); 528cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG, 52937b9f933SMichal Kazior WMI_SERVICE_FORCE_FW_HANG, len); 530cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_GPIO, 53137b9f933SMichal Kazior WMI_SERVICE_GPIO, len); 532cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM, 53337b9f933SMichal Kazior WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len); 534cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, 53537b9f933SMichal Kazior WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len); 536cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, 53737b9f933SMichal Kazior WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len); 538cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE, 53937b9f933SMichal Kazior WMI_SERVICE_STA_KEEP_ALIVE, len); 540cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP, 54137b9f933SMichal Kazior WMI_SERVICE_TX_ENCAP, len); 542cff990ceSMichal Kazior } 543cff990ceSMichal Kazior 544840357ccSRaja Mani static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out, 545840357ccSRaja Mani size_t len) 546840357ccSRaja Mani { 547840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD, 548840357ccSRaja Mani WMI_SERVICE_BEACON_OFFLOAD, len); 549840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD, 550840357ccSRaja Mani WMI_SERVICE_SCAN_OFFLOAD, len); 551840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD, 552840357ccSRaja Mani WMI_SERVICE_ROAM_OFFLOAD, len); 553840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD, 554840357ccSRaja Mani WMI_SERVICE_BCN_MISS_OFFLOAD, len); 555840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE, 556840357ccSRaja Mani WMI_SERVICE_STA_PWRSAVE, len); 557840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE, 558840357ccSRaja Mani WMI_SERVICE_STA_ADVANCED_PWRSAVE, len); 559840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_AP_UAPSD, 560840357ccSRaja Mani WMI_SERVICE_AP_UAPSD, len); 561840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_AP_DFS, 562840357ccSRaja Mani WMI_SERVICE_AP_DFS, len); 563840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_11AC, 564840357ccSRaja Mani WMI_SERVICE_11AC, len); 565840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_BLOCKACK, 566840357ccSRaja Mani WMI_SERVICE_BLOCKACK, len); 567840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_PHYERR, 568840357ccSRaja Mani WMI_SERVICE_PHYERR, len); 569840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_BCN_FILTER, 570840357ccSRaja Mani WMI_SERVICE_BCN_FILTER, len); 571840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_RTT, 572840357ccSRaja Mani WMI_SERVICE_RTT, len); 573840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_RATECTRL, 574840357ccSRaja Mani WMI_SERVICE_RATECTRL, len); 575840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_WOW, 576840357ccSRaja Mani WMI_SERVICE_WOW, len); 577840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE, 578840357ccSRaja Mani WMI_SERVICE_RATECTRL_CACHE, len); 579840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS, 580840357ccSRaja Mani WMI_SERVICE_IRAM_TIDS, len); 581840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_BURST, 582840357ccSRaja Mani WMI_SERVICE_BURST, len); 583840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT, 584840357ccSRaja Mani WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len); 585840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD, 586840357ccSRaja Mani WMI_SERVICE_GTK_OFFLOAD, len); 587840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_SCAN_SCH, 588840357ccSRaja Mani WMI_SERVICE_SCAN_SCH, len); 589840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD, 590840357ccSRaja Mani WMI_SERVICE_CSA_OFFLOAD, len); 591840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_CHATTER, 592840357ccSRaja Mani WMI_SERVICE_CHATTER, len); 593840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID, 594840357ccSRaja Mani WMI_SERVICE_COEX_FREQAVOID, len); 595840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE, 596840357ccSRaja Mani WMI_SERVICE_PACKET_POWER_SAVE, len); 597840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG, 598840357ccSRaja Mani WMI_SERVICE_FORCE_FW_HANG, len); 599840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT, 600840357ccSRaja Mani WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len); 601840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_GPIO, 602840357ccSRaja Mani WMI_SERVICE_GPIO, len); 603840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, 604840357ccSRaja Mani WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len); 605840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, 606840357ccSRaja Mani WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len); 607840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE, 608840357ccSRaja Mani WMI_SERVICE_STA_KEEP_ALIVE, len); 609840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_TX_ENCAP, 610840357ccSRaja Mani WMI_SERVICE_TX_ENCAP, len); 611840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, 612840357ccSRaja Mani WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len); 613840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_EARLY_RX, 614840357ccSRaja Mani WMI_SERVICE_EARLY_RX, len); 615840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA, 616840357ccSRaja Mani WMI_SERVICE_ENHANCED_PROXY_STA, len); 617840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_TT, 618840357ccSRaja Mani WMI_SERVICE_TT, len); 619840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_ATF, 620840357ccSRaja Mani WMI_SERVICE_ATF, len); 621840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_PEER_CACHING, 622840357ccSRaja Mani WMI_SERVICE_PEER_CACHING, len); 623840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_COEX_GPIO, 624840357ccSRaja Mani WMI_SERVICE_COEX_GPIO, len); 625840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF, 626840357ccSRaja Mani WMI_SERVICE_AUX_SPECTRAL_INTF, len); 627840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF, 628840357ccSRaja Mani WMI_SERVICE_AUX_CHAN_LOAD_INTF, len); 629840357ccSRaja Mani SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64, 630840357ccSRaja Mani WMI_SERVICE_BSS_CHANNEL_INFO_64, len); 631e3c6225dSVasanthakumar Thiagarajan SVCMAP(WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT, 632e3c6225dSVasanthakumar Thiagarajan WMI_SERVICE_EXT_RES_CFG_SUPPORT, len); 6330b3d76e9SPeter Oh SVCMAP(WMI_10_4_SERVICE_MESH_NON_11S, 6340b3d76e9SPeter Oh WMI_SERVICE_MESH_NON_11S, len); 635840357ccSRaja Mani } 636840357ccSRaja Mani 637cff990ceSMichal Kazior #undef SVCMAP 6385e3dd157SKalle Valo 6395e3dd157SKalle Valo /* 2 word representation of MAC addr */ 6405e3dd157SKalle Valo struct wmi_mac_addr { 6415e3dd157SKalle Valo union { 6425e3dd157SKalle Valo u8 addr[6]; 6435e3dd157SKalle Valo struct { 6445e3dd157SKalle Valo u32 word0; 6455e3dd157SKalle Valo u32 word1; 6465e3dd157SKalle Valo } __packed; 6475e3dd157SKalle Valo } __packed; 6485e3dd157SKalle Valo } __packed; 6495e3dd157SKalle Valo 650ce42870eSBartosz Markowski struct wmi_cmd_map { 651ce42870eSBartosz Markowski u32 init_cmdid; 652ce42870eSBartosz Markowski u32 start_scan_cmdid; 653ce42870eSBartosz Markowski u32 stop_scan_cmdid; 654ce42870eSBartosz Markowski u32 scan_chan_list_cmdid; 655ce42870eSBartosz Markowski u32 scan_sch_prio_tbl_cmdid; 656ce42870eSBartosz Markowski u32 pdev_set_regdomain_cmdid; 657ce42870eSBartosz Markowski u32 pdev_set_channel_cmdid; 658ce42870eSBartosz Markowski u32 pdev_set_param_cmdid; 659ce42870eSBartosz Markowski u32 pdev_pktlog_enable_cmdid; 660ce42870eSBartosz Markowski u32 pdev_pktlog_disable_cmdid; 661ce42870eSBartosz Markowski u32 pdev_set_wmm_params_cmdid; 662ce42870eSBartosz Markowski u32 pdev_set_ht_cap_ie_cmdid; 663ce42870eSBartosz Markowski u32 pdev_set_vht_cap_ie_cmdid; 664ce42870eSBartosz Markowski u32 pdev_set_dscp_tid_map_cmdid; 665ce42870eSBartosz Markowski u32 pdev_set_quiet_mode_cmdid; 666ce42870eSBartosz Markowski u32 pdev_green_ap_ps_enable_cmdid; 667ce42870eSBartosz Markowski u32 pdev_get_tpc_config_cmdid; 668ce42870eSBartosz Markowski u32 pdev_set_base_macaddr_cmdid; 669ce42870eSBartosz Markowski u32 vdev_create_cmdid; 670ce42870eSBartosz Markowski u32 vdev_delete_cmdid; 671ce42870eSBartosz Markowski u32 vdev_start_request_cmdid; 672ce42870eSBartosz Markowski u32 vdev_restart_request_cmdid; 673ce42870eSBartosz Markowski u32 vdev_up_cmdid; 674ce42870eSBartosz Markowski u32 vdev_stop_cmdid; 675ce42870eSBartosz Markowski u32 vdev_down_cmdid; 676ce42870eSBartosz Markowski u32 vdev_set_param_cmdid; 677ce42870eSBartosz Markowski u32 vdev_install_key_cmdid; 678ce42870eSBartosz Markowski u32 peer_create_cmdid; 679ce42870eSBartosz Markowski u32 peer_delete_cmdid; 680ce42870eSBartosz Markowski u32 peer_flush_tids_cmdid; 681ce42870eSBartosz Markowski u32 peer_set_param_cmdid; 682ce42870eSBartosz Markowski u32 peer_assoc_cmdid; 683ce42870eSBartosz Markowski u32 peer_add_wds_entry_cmdid; 684ce42870eSBartosz Markowski u32 peer_remove_wds_entry_cmdid; 685ce42870eSBartosz Markowski u32 peer_mcast_group_cmdid; 686ce42870eSBartosz Markowski u32 bcn_tx_cmdid; 687ce42870eSBartosz Markowski u32 pdev_send_bcn_cmdid; 688ce42870eSBartosz Markowski u32 bcn_tmpl_cmdid; 689ce42870eSBartosz Markowski u32 bcn_filter_rx_cmdid; 690ce42870eSBartosz Markowski u32 prb_req_filter_rx_cmdid; 691ce42870eSBartosz Markowski u32 mgmt_tx_cmdid; 692ce42870eSBartosz Markowski u32 prb_tmpl_cmdid; 693ce42870eSBartosz Markowski u32 addba_clear_resp_cmdid; 694ce42870eSBartosz Markowski u32 addba_send_cmdid; 695ce42870eSBartosz Markowski u32 addba_status_cmdid; 696ce42870eSBartosz Markowski u32 delba_send_cmdid; 697ce42870eSBartosz Markowski u32 addba_set_resp_cmdid; 698ce42870eSBartosz Markowski u32 send_singleamsdu_cmdid; 699ce42870eSBartosz Markowski u32 sta_powersave_mode_cmdid; 700ce42870eSBartosz Markowski u32 sta_powersave_param_cmdid; 701ce42870eSBartosz Markowski u32 sta_mimo_ps_mode_cmdid; 702ce42870eSBartosz Markowski u32 pdev_dfs_enable_cmdid; 703ce42870eSBartosz Markowski u32 pdev_dfs_disable_cmdid; 704ce42870eSBartosz Markowski u32 roam_scan_mode; 705ce42870eSBartosz Markowski u32 roam_scan_rssi_threshold; 706ce42870eSBartosz Markowski u32 roam_scan_period; 707ce42870eSBartosz Markowski u32 roam_scan_rssi_change_threshold; 708ce42870eSBartosz Markowski u32 roam_ap_profile; 709ce42870eSBartosz Markowski u32 ofl_scan_add_ap_profile; 710ce42870eSBartosz Markowski u32 ofl_scan_remove_ap_profile; 711ce42870eSBartosz Markowski u32 ofl_scan_period; 712ce42870eSBartosz Markowski u32 p2p_dev_set_device_info; 713ce42870eSBartosz Markowski u32 p2p_dev_set_discoverability; 714ce42870eSBartosz Markowski u32 p2p_go_set_beacon_ie; 715ce42870eSBartosz Markowski u32 p2p_go_set_probe_resp_ie; 716ce42870eSBartosz Markowski u32 p2p_set_vendor_ie_data_cmdid; 717ce42870eSBartosz Markowski u32 ap_ps_peer_param_cmdid; 718ce42870eSBartosz Markowski u32 ap_ps_peer_uapsd_coex_cmdid; 719ce42870eSBartosz Markowski u32 peer_rate_retry_sched_cmdid; 720ce42870eSBartosz Markowski u32 wlan_profile_trigger_cmdid; 721ce42870eSBartosz Markowski u32 wlan_profile_set_hist_intvl_cmdid; 722ce42870eSBartosz Markowski u32 wlan_profile_get_profile_data_cmdid; 723ce42870eSBartosz Markowski u32 wlan_profile_enable_profile_id_cmdid; 724ce42870eSBartosz Markowski u32 wlan_profile_list_profile_id_cmdid; 725ce42870eSBartosz Markowski u32 pdev_suspend_cmdid; 726ce42870eSBartosz Markowski u32 pdev_resume_cmdid; 727ce42870eSBartosz Markowski u32 add_bcn_filter_cmdid; 728ce42870eSBartosz Markowski u32 rmv_bcn_filter_cmdid; 729ce42870eSBartosz Markowski u32 wow_add_wake_pattern_cmdid; 730ce42870eSBartosz Markowski u32 wow_del_wake_pattern_cmdid; 731ce42870eSBartosz Markowski u32 wow_enable_disable_wake_event_cmdid; 732ce42870eSBartosz Markowski u32 wow_enable_cmdid; 733ce42870eSBartosz Markowski u32 wow_hostwakeup_from_sleep_cmdid; 734ce42870eSBartosz Markowski u32 rtt_measreq_cmdid; 735ce42870eSBartosz Markowski u32 rtt_tsf_cmdid; 736ce42870eSBartosz Markowski u32 vdev_spectral_scan_configure_cmdid; 737ce42870eSBartosz Markowski u32 vdev_spectral_scan_enable_cmdid; 738ce42870eSBartosz Markowski u32 request_stats_cmdid; 739ce42870eSBartosz Markowski u32 set_arp_ns_offload_cmdid; 740ce42870eSBartosz Markowski u32 network_list_offload_config_cmdid; 741ce42870eSBartosz Markowski u32 gtk_offload_cmdid; 742ce42870eSBartosz Markowski u32 csa_offload_enable_cmdid; 743ce42870eSBartosz Markowski u32 csa_offload_chanswitch_cmdid; 744ce42870eSBartosz Markowski u32 chatter_set_mode_cmdid; 745ce42870eSBartosz Markowski u32 peer_tid_addba_cmdid; 746ce42870eSBartosz Markowski u32 peer_tid_delba_cmdid; 747ce42870eSBartosz Markowski u32 sta_dtim_ps_method_cmdid; 748ce42870eSBartosz Markowski u32 sta_uapsd_auto_trig_cmdid; 749ce42870eSBartosz Markowski u32 sta_keepalive_cmd; 750ce42870eSBartosz Markowski u32 echo_cmdid; 751ce42870eSBartosz Markowski u32 pdev_utf_cmdid; 752ce42870eSBartosz Markowski u32 dbglog_cfg_cmdid; 753ce42870eSBartosz Markowski u32 pdev_qvit_cmdid; 754ce42870eSBartosz Markowski u32 pdev_ftm_intg_cmdid; 755ce42870eSBartosz Markowski u32 vdev_set_keepalive_cmdid; 756ce42870eSBartosz Markowski u32 vdev_get_keepalive_cmdid; 757ce42870eSBartosz Markowski u32 force_fw_hang_cmdid; 758ce42870eSBartosz Markowski u32 gpio_config_cmdid; 759ce42870eSBartosz Markowski u32 gpio_output_cmdid; 760a57a6a27SRajkumar Manoharan u32 pdev_get_temperature_cmdid; 7616d492fe2SMichal Kazior u32 vdev_set_wmm_params_cmdid; 762ad45c888SMarek Puzyniak u32 tdls_set_state_cmdid; 763ad45c888SMarek Puzyniak u32 tdls_peer_update_cmdid; 7645b272e30SMichal Kazior u32 adaptive_qcs_cmdid; 7652d491e69SRaja Mani u32 scan_update_request_cmdid; 7662d491e69SRaja Mani u32 vdev_standby_response_cmdid; 7672d491e69SRaja Mani u32 vdev_resume_response_cmdid; 7682d491e69SRaja Mani u32 wlan_peer_caching_add_peer_cmdid; 7692d491e69SRaja Mani u32 wlan_peer_caching_evict_peer_cmdid; 7702d491e69SRaja Mani u32 wlan_peer_caching_restore_peer_cmdid; 7712d491e69SRaja Mani u32 wlan_peer_caching_print_all_peers_info_cmdid; 7722d491e69SRaja Mani u32 peer_update_wds_entry_cmdid; 7732d491e69SRaja Mani u32 peer_add_proxy_sta_entry_cmdid; 7742d491e69SRaja Mani u32 rtt_keepalive_cmdid; 7752d491e69SRaja Mani u32 oem_req_cmdid; 7762d491e69SRaja Mani u32 nan_cmdid; 7772d491e69SRaja Mani u32 vdev_ratemask_cmdid; 7782d491e69SRaja Mani u32 qboost_cfg_cmdid; 7792d491e69SRaja Mani u32 pdev_smart_ant_enable_cmdid; 7802d491e69SRaja Mani u32 pdev_smart_ant_set_rx_antenna_cmdid; 7812d491e69SRaja Mani u32 peer_smart_ant_set_tx_antenna_cmdid; 7822d491e69SRaja Mani u32 peer_smart_ant_set_train_info_cmdid; 7832d491e69SRaja Mani u32 peer_smart_ant_set_node_config_ops_cmdid; 7842d491e69SRaja Mani u32 pdev_set_antenna_switch_table_cmdid; 7852d491e69SRaja Mani u32 pdev_set_ctl_table_cmdid; 7862d491e69SRaja Mani u32 pdev_set_mimogain_table_cmdid; 7872d491e69SRaja Mani u32 pdev_ratepwr_table_cmdid; 7882d491e69SRaja Mani u32 pdev_ratepwr_chainmsk_table_cmdid; 7892d491e69SRaja Mani u32 pdev_fips_cmdid; 7902d491e69SRaja Mani u32 tt_set_conf_cmdid; 7912d491e69SRaja Mani u32 fwtest_cmdid; 7922d491e69SRaja Mani u32 vdev_atf_request_cmdid; 7932d491e69SRaja Mani u32 peer_atf_request_cmdid; 7942d491e69SRaja Mani u32 pdev_get_ani_cck_config_cmdid; 7952d491e69SRaja Mani u32 pdev_get_ani_ofdm_config_cmdid; 7962d491e69SRaja Mani u32 pdev_reserve_ast_entry_cmdid; 7972d491e69SRaja Mani u32 pdev_get_nfcal_power_cmdid; 7982d491e69SRaja Mani u32 pdev_get_tpc_cmdid; 7992d491e69SRaja Mani u32 pdev_get_ast_info_cmdid; 8002d491e69SRaja Mani u32 vdev_set_dscp_tid_map_cmdid; 8012d491e69SRaja Mani u32 pdev_get_info_cmdid; 8022d491e69SRaja Mani u32 vdev_get_info_cmdid; 8032d491e69SRaja Mani u32 vdev_filter_neighbor_rx_packets_cmdid; 8042d491e69SRaja Mani u32 mu_cal_start_cmdid; 8052d491e69SRaja Mani u32 set_cca_params_cmdid; 8062d491e69SRaja Mani u32 pdev_bss_chan_info_request_cmdid; 80762f77f09SMaharaja u32 pdev_enable_adaptive_cca_cmdid; 808ce42870eSBartosz Markowski }; 809ce42870eSBartosz Markowski 8105e3dd157SKalle Valo /* 8115e3dd157SKalle Valo * wmi command groups. 8125e3dd157SKalle Valo */ 8135e3dd157SKalle Valo enum wmi_cmd_group { 8145e3dd157SKalle Valo /* 0 to 2 are reserved */ 8155e3dd157SKalle Valo WMI_GRP_START = 0x3, 8165e3dd157SKalle Valo WMI_GRP_SCAN = WMI_GRP_START, 8175e3dd157SKalle Valo WMI_GRP_PDEV, 8185e3dd157SKalle Valo WMI_GRP_VDEV, 8195e3dd157SKalle Valo WMI_GRP_PEER, 8205e3dd157SKalle Valo WMI_GRP_MGMT, 8215e3dd157SKalle Valo WMI_GRP_BA_NEG, 8225e3dd157SKalle Valo WMI_GRP_STA_PS, 8235e3dd157SKalle Valo WMI_GRP_DFS, 8245e3dd157SKalle Valo WMI_GRP_ROAM, 8255e3dd157SKalle Valo WMI_GRP_OFL_SCAN, 8265e3dd157SKalle Valo WMI_GRP_P2P, 8275e3dd157SKalle Valo WMI_GRP_AP_PS, 8285e3dd157SKalle Valo WMI_GRP_RATE_CTRL, 8295e3dd157SKalle Valo WMI_GRP_PROFILE, 8305e3dd157SKalle Valo WMI_GRP_SUSPEND, 8315e3dd157SKalle Valo WMI_GRP_BCN_FILTER, 8325e3dd157SKalle Valo WMI_GRP_WOW, 8335e3dd157SKalle Valo WMI_GRP_RTT, 8345e3dd157SKalle Valo WMI_GRP_SPECTRAL, 8355e3dd157SKalle Valo WMI_GRP_STATS, 8365e3dd157SKalle Valo WMI_GRP_ARP_NS_OFL, 8375e3dd157SKalle Valo WMI_GRP_NLO_OFL, 8385e3dd157SKalle Valo WMI_GRP_GTK_OFL, 8395e3dd157SKalle Valo WMI_GRP_CSA_OFL, 8405e3dd157SKalle Valo WMI_GRP_CHATTER, 8415e3dd157SKalle Valo WMI_GRP_TID_ADDBA, 8425e3dd157SKalle Valo WMI_GRP_MISC, 8435e3dd157SKalle Valo WMI_GRP_GPIO, 8445e3dd157SKalle Valo }; 8455e3dd157SKalle Valo 8465e3dd157SKalle Valo #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 8475e3dd157SKalle Valo #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 8485e3dd157SKalle Valo 84934957b25SBartosz Markowski #define WMI_CMD_UNSUPPORTED 0 850b7e3adf9SBartosz Markowski 851b7e3adf9SBartosz Markowski /* Command IDs and command events for MAIN FW. */ 8525e3dd157SKalle Valo enum wmi_cmd_id { 8535e3dd157SKalle Valo WMI_INIT_CMDID = 0x1, 8545e3dd157SKalle Valo 8555e3dd157SKalle Valo /* Scan specific commands */ 8565e3dd157SKalle Valo WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN), 8575e3dd157SKalle Valo WMI_STOP_SCAN_CMDID, 8585e3dd157SKalle Valo WMI_SCAN_CHAN_LIST_CMDID, 8595e3dd157SKalle Valo WMI_SCAN_SCH_PRIO_TBL_CMDID, 8605e3dd157SKalle Valo 8615e3dd157SKalle Valo /* PDEV (physical device) specific commands */ 8625e3dd157SKalle Valo WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV), 8635e3dd157SKalle Valo WMI_PDEV_SET_CHANNEL_CMDID, 8645e3dd157SKalle Valo WMI_PDEV_SET_PARAM_CMDID, 8655e3dd157SKalle Valo WMI_PDEV_PKTLOG_ENABLE_CMDID, 8665e3dd157SKalle Valo WMI_PDEV_PKTLOG_DISABLE_CMDID, 8675e3dd157SKalle Valo WMI_PDEV_SET_WMM_PARAMS_CMDID, 8685e3dd157SKalle Valo WMI_PDEV_SET_HT_CAP_IE_CMDID, 8695e3dd157SKalle Valo WMI_PDEV_SET_VHT_CAP_IE_CMDID, 8705e3dd157SKalle Valo WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 8715e3dd157SKalle Valo WMI_PDEV_SET_QUIET_MODE_CMDID, 8725e3dd157SKalle Valo WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 8735e3dd157SKalle Valo WMI_PDEV_GET_TPC_CONFIG_CMDID, 8745e3dd157SKalle Valo WMI_PDEV_SET_BASE_MACADDR_CMDID, 8755e3dd157SKalle Valo 8765e3dd157SKalle Valo /* VDEV (virtual device) specific commands */ 8775e3dd157SKalle Valo WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV), 8785e3dd157SKalle Valo WMI_VDEV_DELETE_CMDID, 8795e3dd157SKalle Valo WMI_VDEV_START_REQUEST_CMDID, 8805e3dd157SKalle Valo WMI_VDEV_RESTART_REQUEST_CMDID, 8815e3dd157SKalle Valo WMI_VDEV_UP_CMDID, 8825e3dd157SKalle Valo WMI_VDEV_STOP_CMDID, 8835e3dd157SKalle Valo WMI_VDEV_DOWN_CMDID, 8845e3dd157SKalle Valo WMI_VDEV_SET_PARAM_CMDID, 8855e3dd157SKalle Valo WMI_VDEV_INSTALL_KEY_CMDID, 8865e3dd157SKalle Valo 8875e3dd157SKalle Valo /* peer specific commands */ 8885e3dd157SKalle Valo WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER), 8895e3dd157SKalle Valo WMI_PEER_DELETE_CMDID, 8905e3dd157SKalle Valo WMI_PEER_FLUSH_TIDS_CMDID, 8915e3dd157SKalle Valo WMI_PEER_SET_PARAM_CMDID, 8925e3dd157SKalle Valo WMI_PEER_ASSOC_CMDID, 8935e3dd157SKalle Valo WMI_PEER_ADD_WDS_ENTRY_CMDID, 8945e3dd157SKalle Valo WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 8955e3dd157SKalle Valo WMI_PEER_MCAST_GROUP_CMDID, 8965e3dd157SKalle Valo 8975e3dd157SKalle Valo /* beacon/management specific commands */ 8985e3dd157SKalle Valo WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT), 8995e3dd157SKalle Valo WMI_PDEV_SEND_BCN_CMDID, 9005e3dd157SKalle Valo WMI_BCN_TMPL_CMDID, 9015e3dd157SKalle Valo WMI_BCN_FILTER_RX_CMDID, 9025e3dd157SKalle Valo WMI_PRB_REQ_FILTER_RX_CMDID, 9035e3dd157SKalle Valo WMI_MGMT_TX_CMDID, 9045e3dd157SKalle Valo WMI_PRB_TMPL_CMDID, 9055e3dd157SKalle Valo 9065e3dd157SKalle Valo /* commands to directly control BA negotiation directly from host. */ 9075e3dd157SKalle Valo WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG), 9085e3dd157SKalle Valo WMI_ADDBA_SEND_CMDID, 9095e3dd157SKalle Valo WMI_ADDBA_STATUS_CMDID, 9105e3dd157SKalle Valo WMI_DELBA_SEND_CMDID, 9115e3dd157SKalle Valo WMI_ADDBA_SET_RESP_CMDID, 9125e3dd157SKalle Valo WMI_SEND_SINGLEAMSDU_CMDID, 9135e3dd157SKalle Valo 9145e3dd157SKalle Valo /* Station power save specific config */ 9155e3dd157SKalle Valo WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS), 9165e3dd157SKalle Valo WMI_STA_POWERSAVE_PARAM_CMDID, 9175e3dd157SKalle Valo WMI_STA_MIMO_PS_MODE_CMDID, 9185e3dd157SKalle Valo 9195e3dd157SKalle Valo /** DFS-specific commands */ 9205e3dd157SKalle Valo WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS), 9215e3dd157SKalle Valo WMI_PDEV_DFS_DISABLE_CMDID, 9225e3dd157SKalle Valo 9235e3dd157SKalle Valo /* Roaming specific commands */ 9245e3dd157SKalle Valo WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM), 9255e3dd157SKalle Valo WMI_ROAM_SCAN_RSSI_THRESHOLD, 9265e3dd157SKalle Valo WMI_ROAM_SCAN_PERIOD, 9275e3dd157SKalle Valo WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 9285e3dd157SKalle Valo WMI_ROAM_AP_PROFILE, 9295e3dd157SKalle Valo 9305e3dd157SKalle Valo /* offload scan specific commands */ 9315e3dd157SKalle Valo WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN), 9325e3dd157SKalle Valo WMI_OFL_SCAN_REMOVE_AP_PROFILE, 9335e3dd157SKalle Valo WMI_OFL_SCAN_PERIOD, 9345e3dd157SKalle Valo 9355e3dd157SKalle Valo /* P2P specific commands */ 9365e3dd157SKalle Valo WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P), 9375e3dd157SKalle Valo WMI_P2P_DEV_SET_DISCOVERABILITY, 9385e3dd157SKalle Valo WMI_P2P_GO_SET_BEACON_IE, 9395e3dd157SKalle Valo WMI_P2P_GO_SET_PROBE_RESP_IE, 9405e3dd157SKalle Valo WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 9415e3dd157SKalle Valo 9425e3dd157SKalle Valo /* AP power save specific config */ 9435e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS), 9445e3dd157SKalle Valo WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 9455e3dd157SKalle Valo 9465e3dd157SKalle Valo /* Rate-control specific commands */ 9475e3dd157SKalle Valo WMI_PEER_RATE_RETRY_SCHED_CMDID = 9485e3dd157SKalle Valo WMI_CMD_GRP(WMI_GRP_RATE_CTRL), 9495e3dd157SKalle Valo 9505e3dd157SKalle Valo /* WLAN Profiling commands. */ 9515e3dd157SKalle Valo WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE), 9525e3dd157SKalle Valo WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 9535e3dd157SKalle Valo WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 9545e3dd157SKalle Valo WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 9555e3dd157SKalle Valo WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 9565e3dd157SKalle Valo 9575e3dd157SKalle Valo /* Suspend resume command Ids */ 9585e3dd157SKalle Valo WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND), 9595e3dd157SKalle Valo WMI_PDEV_RESUME_CMDID, 9605e3dd157SKalle Valo 9615e3dd157SKalle Valo /* Beacon filter commands */ 9625e3dd157SKalle Valo WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER), 9635e3dd157SKalle Valo WMI_RMV_BCN_FILTER_CMDID, 9645e3dd157SKalle Valo 9655e3dd157SKalle Valo /* WOW Specific WMI commands*/ 9665e3dd157SKalle Valo WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW), 9675e3dd157SKalle Valo WMI_WOW_DEL_WAKE_PATTERN_CMDID, 9685e3dd157SKalle Valo WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 9695e3dd157SKalle Valo WMI_WOW_ENABLE_CMDID, 9705e3dd157SKalle Valo WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 9715e3dd157SKalle Valo 9725e3dd157SKalle Valo /* RTT measurement related cmd */ 9735e3dd157SKalle Valo WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT), 9745e3dd157SKalle Valo WMI_RTT_TSF_CMDID, 9755e3dd157SKalle Valo 9765e3dd157SKalle Valo /* spectral scan commands */ 9775e3dd157SKalle Valo WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL), 9785e3dd157SKalle Valo WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 9795e3dd157SKalle Valo 9805e3dd157SKalle Valo /* F/W stats */ 9815e3dd157SKalle Valo WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS), 9825e3dd157SKalle Valo 9835e3dd157SKalle Valo /* ARP OFFLOAD REQUEST*/ 9845e3dd157SKalle Valo WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL), 9855e3dd157SKalle Valo 9865e3dd157SKalle Valo /* NS offload confid*/ 9875e3dd157SKalle Valo WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL), 9885e3dd157SKalle Valo 9895e3dd157SKalle Valo /* GTK offload Specific WMI commands*/ 9905e3dd157SKalle Valo WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL), 9915e3dd157SKalle Valo 9925e3dd157SKalle Valo /* CSA offload Specific WMI commands*/ 9935e3dd157SKalle Valo WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL), 9945e3dd157SKalle Valo WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 9955e3dd157SKalle Valo 9965e3dd157SKalle Valo /* Chatter commands*/ 9975e3dd157SKalle Valo WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER), 9985e3dd157SKalle Valo 9995e3dd157SKalle Valo /* addba specific commands */ 10005e3dd157SKalle Valo WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA), 10015e3dd157SKalle Valo WMI_PEER_TID_DELBA_CMDID, 10025e3dd157SKalle Valo 10035e3dd157SKalle Valo /* set station mimo powersave method */ 10045e3dd157SKalle Valo WMI_STA_DTIM_PS_METHOD_CMDID, 10055e3dd157SKalle Valo /* Configure the Station UAPSD AC Auto Trigger Parameters */ 10065e3dd157SKalle Valo WMI_STA_UAPSD_AUTO_TRIG_CMDID, 10075e3dd157SKalle Valo 10085e3dd157SKalle Valo /* STA Keep alive parameter configuration, 10095e3dd157SKalle Valo Requires WMI_SERVICE_STA_KEEP_ALIVE */ 10105e3dd157SKalle Valo WMI_STA_KEEPALIVE_CMD, 10115e3dd157SKalle Valo 10125e3dd157SKalle Valo /* misc command group */ 10135e3dd157SKalle Valo WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC), 10145e3dd157SKalle Valo WMI_PDEV_UTF_CMDID, 10155e3dd157SKalle Valo WMI_DBGLOG_CFG_CMDID, 10165e3dd157SKalle Valo WMI_PDEV_QVIT_CMDID, 10175e3dd157SKalle Valo WMI_PDEV_FTM_INTG_CMDID, 10185e3dd157SKalle Valo WMI_VDEV_SET_KEEPALIVE_CMDID, 10195e3dd157SKalle Valo WMI_VDEV_GET_KEEPALIVE_CMDID, 10209cfbce75SMichal Kazior WMI_FORCE_FW_HANG_CMDID, 10215e3dd157SKalle Valo 10225e3dd157SKalle Valo /* GPIO Configuration */ 10235e3dd157SKalle Valo WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO), 10245e3dd157SKalle Valo WMI_GPIO_OUTPUT_CMDID, 10255e3dd157SKalle Valo }; 10265e3dd157SKalle Valo 10275e3dd157SKalle Valo enum wmi_event_id { 10285e3dd157SKalle Valo WMI_SERVICE_READY_EVENTID = 0x1, 10295e3dd157SKalle Valo WMI_READY_EVENTID, 10305e3dd157SKalle Valo 10315e3dd157SKalle Valo /* Scan specific events */ 10325e3dd157SKalle Valo WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 10335e3dd157SKalle Valo 10345e3dd157SKalle Valo /* PDEV specific events */ 10355e3dd157SKalle Valo WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV), 10365e3dd157SKalle Valo WMI_CHAN_INFO_EVENTID, 10375e3dd157SKalle Valo WMI_PHYERR_EVENTID, 10385e3dd157SKalle Valo 10395e3dd157SKalle Valo /* VDEV specific events */ 10405e3dd157SKalle Valo WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV), 10415e3dd157SKalle Valo WMI_VDEV_STOPPED_EVENTID, 10425e3dd157SKalle Valo WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 10435e3dd157SKalle Valo 10445e3dd157SKalle Valo /* peer specific events */ 10455e3dd157SKalle Valo WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER), 10465e3dd157SKalle Valo 10475e3dd157SKalle Valo /* beacon/mgmt specific events */ 10485e3dd157SKalle Valo WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT), 10495e3dd157SKalle Valo WMI_HOST_SWBA_EVENTID, 10505e3dd157SKalle Valo WMI_TBTTOFFSET_UPDATE_EVENTID, 10515e3dd157SKalle Valo 10525e3dd157SKalle Valo /* ADDBA Related WMI Events*/ 10535e3dd157SKalle Valo WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG), 10545e3dd157SKalle Valo WMI_TX_ADDBA_COMPLETE_EVENTID, 10555e3dd157SKalle Valo 10565e3dd157SKalle Valo /* Roam event to trigger roaming on host */ 10575e3dd157SKalle Valo WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM), 10585e3dd157SKalle Valo WMI_PROFILE_MATCH, 10595e3dd157SKalle Valo 10605e3dd157SKalle Valo /* WoW */ 10615e3dd157SKalle Valo WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW), 10625e3dd157SKalle Valo 10635e3dd157SKalle Valo /* RTT */ 10645e3dd157SKalle Valo WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT), 10655e3dd157SKalle Valo WMI_TSF_MEASUREMENT_REPORT_EVENTID, 10665e3dd157SKalle Valo WMI_RTT_ERROR_REPORT_EVENTID, 10675e3dd157SKalle Valo 10685e3dd157SKalle Valo /* GTK offload */ 10695e3dd157SKalle Valo WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL), 10705e3dd157SKalle Valo WMI_GTK_REKEY_FAIL_EVENTID, 10715e3dd157SKalle Valo 10725e3dd157SKalle Valo /* CSA IE received event */ 10735e3dd157SKalle Valo WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL), 10745e3dd157SKalle Valo 10755e3dd157SKalle Valo /* Misc events */ 10765e3dd157SKalle Valo WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC), 10775e3dd157SKalle Valo WMI_PDEV_UTF_EVENTID, 10785e3dd157SKalle Valo WMI_DEBUG_MESG_EVENTID, 10795e3dd157SKalle Valo WMI_UPDATE_STATS_EVENTID, 10805e3dd157SKalle Valo WMI_DEBUG_PRINT_EVENTID, 10815e3dd157SKalle Valo WMI_DCS_INTERFERENCE_EVENTID, 10825e3dd157SKalle Valo WMI_PDEV_QVIT_EVENTID, 10835e3dd157SKalle Valo WMI_WLAN_PROFILE_DATA_EVENTID, 10845e3dd157SKalle Valo WMI_PDEV_FTM_INTG_EVENTID, 10855e3dd157SKalle Valo WMI_WLAN_FREQ_AVOID_EVENTID, 10865e3dd157SKalle Valo WMI_VDEV_GET_KEEPALIVE_EVENTID, 10875e3dd157SKalle Valo 10885e3dd157SKalle Valo /* GPIO Event */ 10895e3dd157SKalle Valo WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO), 10905e3dd157SKalle Valo }; 10915e3dd157SKalle Valo 1092b7e3adf9SBartosz Markowski /* Command IDs and command events for 10.X firmware */ 1093b7e3adf9SBartosz Markowski enum wmi_10x_cmd_id { 1094b7e3adf9SBartosz Markowski WMI_10X_START_CMDID = 0x9000, 1095b7e3adf9SBartosz Markowski WMI_10X_END_CMDID = 0x9FFF, 1096b7e3adf9SBartosz Markowski 1097b7e3adf9SBartosz Markowski /* initialize the wlan sub system */ 1098b7e3adf9SBartosz Markowski WMI_10X_INIT_CMDID, 1099b7e3adf9SBartosz Markowski 1100b7e3adf9SBartosz Markowski /* Scan specific commands */ 1101b7e3adf9SBartosz Markowski 1102b7e3adf9SBartosz Markowski WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID, 1103b7e3adf9SBartosz Markowski WMI_10X_STOP_SCAN_CMDID, 1104b7e3adf9SBartosz Markowski WMI_10X_SCAN_CHAN_LIST_CMDID, 1105b7e3adf9SBartosz Markowski WMI_10X_ECHO_CMDID, 1106b7e3adf9SBartosz Markowski 1107b7e3adf9SBartosz Markowski /* PDEV(physical device) specific commands */ 1108b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_REGDOMAIN_CMDID, 1109b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_CHANNEL_CMDID, 1110b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_PARAM_CMDID, 1111b7e3adf9SBartosz Markowski WMI_10X_PDEV_PKTLOG_ENABLE_CMDID, 1112b7e3adf9SBartosz Markowski WMI_10X_PDEV_PKTLOG_DISABLE_CMDID, 1113b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_WMM_PARAMS_CMDID, 1114b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_HT_CAP_IE_CMDID, 1115b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID, 1116b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_BASE_MACADDR_CMDID, 1117b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID, 1118b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_QUIET_MODE_CMDID, 1119b7e3adf9SBartosz Markowski WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID, 1120b7e3adf9SBartosz Markowski WMI_10X_PDEV_GET_TPC_CONFIG_CMDID, 1121b7e3adf9SBartosz Markowski 1122b7e3adf9SBartosz Markowski /* VDEV(virtual device) specific commands */ 1123b7e3adf9SBartosz Markowski WMI_10X_VDEV_CREATE_CMDID, 1124b7e3adf9SBartosz Markowski WMI_10X_VDEV_DELETE_CMDID, 1125b7e3adf9SBartosz Markowski WMI_10X_VDEV_START_REQUEST_CMDID, 1126b7e3adf9SBartosz Markowski WMI_10X_VDEV_RESTART_REQUEST_CMDID, 1127b7e3adf9SBartosz Markowski WMI_10X_VDEV_UP_CMDID, 1128b7e3adf9SBartosz Markowski WMI_10X_VDEV_STOP_CMDID, 1129b7e3adf9SBartosz Markowski WMI_10X_VDEV_DOWN_CMDID, 1130b7e3adf9SBartosz Markowski WMI_10X_VDEV_STANDBY_RESPONSE_CMDID, 1131b7e3adf9SBartosz Markowski WMI_10X_VDEV_RESUME_RESPONSE_CMDID, 1132b7e3adf9SBartosz Markowski WMI_10X_VDEV_SET_PARAM_CMDID, 1133b7e3adf9SBartosz Markowski WMI_10X_VDEV_INSTALL_KEY_CMDID, 1134b7e3adf9SBartosz Markowski 1135b7e3adf9SBartosz Markowski /* peer specific commands */ 1136b7e3adf9SBartosz Markowski WMI_10X_PEER_CREATE_CMDID, 1137b7e3adf9SBartosz Markowski WMI_10X_PEER_DELETE_CMDID, 1138b7e3adf9SBartosz Markowski WMI_10X_PEER_FLUSH_TIDS_CMDID, 1139b7e3adf9SBartosz Markowski WMI_10X_PEER_SET_PARAM_CMDID, 1140b7e3adf9SBartosz Markowski WMI_10X_PEER_ASSOC_CMDID, 1141b7e3adf9SBartosz Markowski WMI_10X_PEER_ADD_WDS_ENTRY_CMDID, 1142b7e3adf9SBartosz Markowski WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID, 1143b7e3adf9SBartosz Markowski WMI_10X_PEER_MCAST_GROUP_CMDID, 1144b7e3adf9SBartosz Markowski 1145b7e3adf9SBartosz Markowski /* beacon/management specific commands */ 1146b7e3adf9SBartosz Markowski 1147b7e3adf9SBartosz Markowski WMI_10X_BCN_TX_CMDID, 1148b7e3adf9SBartosz Markowski WMI_10X_BCN_PRB_TMPL_CMDID, 1149b7e3adf9SBartosz Markowski WMI_10X_BCN_FILTER_RX_CMDID, 1150b7e3adf9SBartosz Markowski WMI_10X_PRB_REQ_FILTER_RX_CMDID, 1151b7e3adf9SBartosz Markowski WMI_10X_MGMT_TX_CMDID, 1152b7e3adf9SBartosz Markowski 1153b7e3adf9SBartosz Markowski /* commands to directly control ba negotiation directly from host. */ 1154b7e3adf9SBartosz Markowski WMI_10X_ADDBA_CLEAR_RESP_CMDID, 1155b7e3adf9SBartosz Markowski WMI_10X_ADDBA_SEND_CMDID, 1156b7e3adf9SBartosz Markowski WMI_10X_ADDBA_STATUS_CMDID, 1157b7e3adf9SBartosz Markowski WMI_10X_DELBA_SEND_CMDID, 1158b7e3adf9SBartosz Markowski WMI_10X_ADDBA_SET_RESP_CMDID, 1159b7e3adf9SBartosz Markowski WMI_10X_SEND_SINGLEAMSDU_CMDID, 1160b7e3adf9SBartosz Markowski 1161b7e3adf9SBartosz Markowski /* Station power save specific config */ 1162b7e3adf9SBartosz Markowski WMI_10X_STA_POWERSAVE_MODE_CMDID, 1163b7e3adf9SBartosz Markowski WMI_10X_STA_POWERSAVE_PARAM_CMDID, 1164b7e3adf9SBartosz Markowski WMI_10X_STA_MIMO_PS_MODE_CMDID, 1165b7e3adf9SBartosz Markowski 1166b7e3adf9SBartosz Markowski /* set debug log config */ 1167b7e3adf9SBartosz Markowski WMI_10X_DBGLOG_CFG_CMDID, 1168b7e3adf9SBartosz Markowski 1169b7e3adf9SBartosz Markowski /* DFS-specific commands */ 1170b7e3adf9SBartosz Markowski WMI_10X_PDEV_DFS_ENABLE_CMDID, 1171b7e3adf9SBartosz Markowski WMI_10X_PDEV_DFS_DISABLE_CMDID, 1172b7e3adf9SBartosz Markowski 1173b7e3adf9SBartosz Markowski /* QVIT specific command id */ 1174b7e3adf9SBartosz Markowski WMI_10X_PDEV_QVIT_CMDID, 1175b7e3adf9SBartosz Markowski 1176b7e3adf9SBartosz Markowski /* Offload Scan and Roaming related commands */ 1177b7e3adf9SBartosz Markowski WMI_10X_ROAM_SCAN_MODE, 1178b7e3adf9SBartosz Markowski WMI_10X_ROAM_SCAN_RSSI_THRESHOLD, 1179b7e3adf9SBartosz Markowski WMI_10X_ROAM_SCAN_PERIOD, 1180b7e3adf9SBartosz Markowski WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1181b7e3adf9SBartosz Markowski WMI_10X_ROAM_AP_PROFILE, 1182b7e3adf9SBartosz Markowski WMI_10X_OFL_SCAN_ADD_AP_PROFILE, 1183b7e3adf9SBartosz Markowski WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE, 1184b7e3adf9SBartosz Markowski WMI_10X_OFL_SCAN_PERIOD, 1185b7e3adf9SBartosz Markowski 1186b7e3adf9SBartosz Markowski /* P2P specific commands */ 1187b7e3adf9SBartosz Markowski WMI_10X_P2P_DEV_SET_DEVICE_INFO, 1188b7e3adf9SBartosz Markowski WMI_10X_P2P_DEV_SET_DISCOVERABILITY, 1189b7e3adf9SBartosz Markowski WMI_10X_P2P_GO_SET_BEACON_IE, 1190b7e3adf9SBartosz Markowski WMI_10X_P2P_GO_SET_PROBE_RESP_IE, 1191b7e3adf9SBartosz Markowski 1192b7e3adf9SBartosz Markowski /* AP power save specific config */ 1193b7e3adf9SBartosz Markowski WMI_10X_AP_PS_PEER_PARAM_CMDID, 1194b7e3adf9SBartosz Markowski WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID, 1195b7e3adf9SBartosz Markowski 1196b7e3adf9SBartosz Markowski /* Rate-control specific commands */ 1197b7e3adf9SBartosz Markowski WMI_10X_PEER_RATE_RETRY_SCHED_CMDID, 1198b7e3adf9SBartosz Markowski 1199b7e3adf9SBartosz Markowski /* WLAN Profiling commands. */ 1200b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_TRIGGER_CMDID, 1201b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 1202b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 1203b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 1204b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 1205b7e3adf9SBartosz Markowski 1206b7e3adf9SBartosz Markowski /* Suspend resume command Ids */ 1207b7e3adf9SBartosz Markowski WMI_10X_PDEV_SUSPEND_CMDID, 1208b7e3adf9SBartosz Markowski WMI_10X_PDEV_RESUME_CMDID, 1209b7e3adf9SBartosz Markowski 1210b7e3adf9SBartosz Markowski /* Beacon filter commands */ 1211b7e3adf9SBartosz Markowski WMI_10X_ADD_BCN_FILTER_CMDID, 1212b7e3adf9SBartosz Markowski WMI_10X_RMV_BCN_FILTER_CMDID, 1213b7e3adf9SBartosz Markowski 1214b7e3adf9SBartosz Markowski /* WOW Specific WMI commands*/ 1215b7e3adf9SBartosz Markowski WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID, 1216b7e3adf9SBartosz Markowski WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID, 1217b7e3adf9SBartosz Markowski WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 1218b7e3adf9SBartosz Markowski WMI_10X_WOW_ENABLE_CMDID, 1219b7e3adf9SBartosz Markowski WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 1220b7e3adf9SBartosz Markowski 1221b7e3adf9SBartosz Markowski /* RTT measurement related cmd */ 1222b7e3adf9SBartosz Markowski WMI_10X_RTT_MEASREQ_CMDID, 1223b7e3adf9SBartosz Markowski WMI_10X_RTT_TSF_CMDID, 1224b7e3adf9SBartosz Markowski 1225b7e3adf9SBartosz Markowski /* transmit beacon by value */ 1226b7e3adf9SBartosz Markowski WMI_10X_PDEV_SEND_BCN_CMDID, 1227b7e3adf9SBartosz Markowski 1228b7e3adf9SBartosz Markowski /* F/W stats */ 1229b7e3adf9SBartosz Markowski WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 1230b7e3adf9SBartosz Markowski WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 1231b7e3adf9SBartosz Markowski WMI_10X_REQUEST_STATS_CMDID, 1232b7e3adf9SBartosz Markowski 1233b7e3adf9SBartosz Markowski /* GPIO Configuration */ 1234b7e3adf9SBartosz Markowski WMI_10X_GPIO_CONFIG_CMDID, 1235b7e3adf9SBartosz Markowski WMI_10X_GPIO_OUTPUT_CMDID, 1236b7e3adf9SBartosz Markowski 1237b7e3adf9SBartosz Markowski WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1, 1238b7e3adf9SBartosz Markowski }; 1239b7e3adf9SBartosz Markowski 1240b7e3adf9SBartosz Markowski enum wmi_10x_event_id { 1241b7e3adf9SBartosz Markowski WMI_10X_SERVICE_READY_EVENTID = 0x8000, 1242b7e3adf9SBartosz Markowski WMI_10X_READY_EVENTID, 1243b7e3adf9SBartosz Markowski WMI_10X_START_EVENTID = 0x9000, 1244b7e3adf9SBartosz Markowski WMI_10X_END_EVENTID = 0x9FFF, 1245b7e3adf9SBartosz Markowski 1246b7e3adf9SBartosz Markowski /* Scan specific events */ 1247b7e3adf9SBartosz Markowski WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID, 1248b7e3adf9SBartosz Markowski WMI_10X_ECHO_EVENTID, 1249b7e3adf9SBartosz Markowski WMI_10X_DEBUG_MESG_EVENTID, 1250b7e3adf9SBartosz Markowski WMI_10X_UPDATE_STATS_EVENTID, 1251b7e3adf9SBartosz Markowski 1252b7e3adf9SBartosz Markowski /* Instantaneous RSSI event */ 1253b7e3adf9SBartosz Markowski WMI_10X_INST_RSSI_STATS_EVENTID, 1254b7e3adf9SBartosz Markowski 1255b7e3adf9SBartosz Markowski /* VDEV specific events */ 1256b7e3adf9SBartosz Markowski WMI_10X_VDEV_START_RESP_EVENTID, 1257b7e3adf9SBartosz Markowski WMI_10X_VDEV_STANDBY_REQ_EVENTID, 1258b7e3adf9SBartosz Markowski WMI_10X_VDEV_RESUME_REQ_EVENTID, 1259b7e3adf9SBartosz Markowski WMI_10X_VDEV_STOPPED_EVENTID, 1260b7e3adf9SBartosz Markowski 1261b7e3adf9SBartosz Markowski /* peer specific events */ 1262b7e3adf9SBartosz Markowski WMI_10X_PEER_STA_KICKOUT_EVENTID, 1263b7e3adf9SBartosz Markowski 1264b7e3adf9SBartosz Markowski /* beacon/mgmt specific events */ 1265b7e3adf9SBartosz Markowski WMI_10X_HOST_SWBA_EVENTID, 1266b7e3adf9SBartosz Markowski WMI_10X_TBTTOFFSET_UPDATE_EVENTID, 1267b7e3adf9SBartosz Markowski WMI_10X_MGMT_RX_EVENTID, 1268b7e3adf9SBartosz Markowski 1269b7e3adf9SBartosz Markowski /* Channel stats event */ 1270b7e3adf9SBartosz Markowski WMI_10X_CHAN_INFO_EVENTID, 1271b7e3adf9SBartosz Markowski 1272b7e3adf9SBartosz Markowski /* PHY Error specific WMI event */ 1273b7e3adf9SBartosz Markowski WMI_10X_PHYERR_EVENTID, 1274b7e3adf9SBartosz Markowski 1275b7e3adf9SBartosz Markowski /* Roam event to trigger roaming on host */ 1276b7e3adf9SBartosz Markowski WMI_10X_ROAM_EVENTID, 1277b7e3adf9SBartosz Markowski 1278b7e3adf9SBartosz Markowski /* matching AP found from list of profiles */ 1279b7e3adf9SBartosz Markowski WMI_10X_PROFILE_MATCH, 1280b7e3adf9SBartosz Markowski 1281b7e3adf9SBartosz Markowski /* debug print message used for tracing FW code while debugging */ 1282b7e3adf9SBartosz Markowski WMI_10X_DEBUG_PRINT_EVENTID, 1283b7e3adf9SBartosz Markowski /* VI spoecific event */ 1284b7e3adf9SBartosz Markowski WMI_10X_PDEV_QVIT_EVENTID, 1285b7e3adf9SBartosz Markowski /* FW code profile data in response to profile request */ 1286b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_DATA_EVENTID, 1287b7e3adf9SBartosz Markowski 1288b7e3adf9SBartosz Markowski /*RTT related event ID*/ 1289b7e3adf9SBartosz Markowski WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID, 1290b7e3adf9SBartosz Markowski WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID, 1291b7e3adf9SBartosz Markowski WMI_10X_RTT_ERROR_REPORT_EVENTID, 1292b7e3adf9SBartosz Markowski 1293b7e3adf9SBartosz Markowski WMI_10X_WOW_WAKEUP_HOST_EVENTID, 1294b7e3adf9SBartosz Markowski WMI_10X_DCS_INTERFERENCE_EVENTID, 1295b7e3adf9SBartosz Markowski 1296b7e3adf9SBartosz Markowski /* TPC config for the current operating channel */ 1297b7e3adf9SBartosz Markowski WMI_10X_PDEV_TPC_CONFIG_EVENTID, 1298b7e3adf9SBartosz Markowski 1299b7e3adf9SBartosz Markowski WMI_10X_GPIO_INPUT_EVENTID, 1300b7e3adf9SBartosz Markowski WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID-1, 1301b7e3adf9SBartosz Markowski }; 1302b7e3adf9SBartosz Markowski 130324c88f78SMichal Kazior enum wmi_10_2_cmd_id { 130424c88f78SMichal Kazior WMI_10_2_START_CMDID = 0x9000, 130524c88f78SMichal Kazior WMI_10_2_END_CMDID = 0x9FFF, 130624c88f78SMichal Kazior WMI_10_2_INIT_CMDID, 130724c88f78SMichal Kazior WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID, 130824c88f78SMichal Kazior WMI_10_2_STOP_SCAN_CMDID, 130924c88f78SMichal Kazior WMI_10_2_SCAN_CHAN_LIST_CMDID, 131024c88f78SMichal Kazior WMI_10_2_ECHO_CMDID, 131124c88f78SMichal Kazior WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, 131224c88f78SMichal Kazior WMI_10_2_PDEV_SET_CHANNEL_CMDID, 131324c88f78SMichal Kazior WMI_10_2_PDEV_SET_PARAM_CMDID, 131424c88f78SMichal Kazior WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, 131524c88f78SMichal Kazior WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, 131624c88f78SMichal Kazior WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, 131724c88f78SMichal Kazior WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, 131824c88f78SMichal Kazior WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, 131924c88f78SMichal Kazior WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, 132024c88f78SMichal Kazior WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, 132124c88f78SMichal Kazior WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, 132224c88f78SMichal Kazior WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, 132324c88f78SMichal Kazior WMI_10_2_VDEV_CREATE_CMDID, 132424c88f78SMichal Kazior WMI_10_2_VDEV_DELETE_CMDID, 132524c88f78SMichal Kazior WMI_10_2_VDEV_START_REQUEST_CMDID, 132624c88f78SMichal Kazior WMI_10_2_VDEV_RESTART_REQUEST_CMDID, 132724c88f78SMichal Kazior WMI_10_2_VDEV_UP_CMDID, 132824c88f78SMichal Kazior WMI_10_2_VDEV_STOP_CMDID, 132924c88f78SMichal Kazior WMI_10_2_VDEV_DOWN_CMDID, 133024c88f78SMichal Kazior WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID, 133124c88f78SMichal Kazior WMI_10_2_VDEV_RESUME_RESPONSE_CMDID, 133224c88f78SMichal Kazior WMI_10_2_VDEV_SET_PARAM_CMDID, 133324c88f78SMichal Kazior WMI_10_2_VDEV_INSTALL_KEY_CMDID, 133424c88f78SMichal Kazior WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID, 133524c88f78SMichal Kazior WMI_10_2_PEER_CREATE_CMDID, 133624c88f78SMichal Kazior WMI_10_2_PEER_DELETE_CMDID, 133724c88f78SMichal Kazior WMI_10_2_PEER_FLUSH_TIDS_CMDID, 133824c88f78SMichal Kazior WMI_10_2_PEER_SET_PARAM_CMDID, 133924c88f78SMichal Kazior WMI_10_2_PEER_ASSOC_CMDID, 134024c88f78SMichal Kazior WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, 134124c88f78SMichal Kazior WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID, 134224c88f78SMichal Kazior WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, 134324c88f78SMichal Kazior WMI_10_2_PEER_MCAST_GROUP_CMDID, 134424c88f78SMichal Kazior WMI_10_2_BCN_TX_CMDID, 134524c88f78SMichal Kazior WMI_10_2_BCN_PRB_TMPL_CMDID, 134624c88f78SMichal Kazior WMI_10_2_BCN_FILTER_RX_CMDID, 134724c88f78SMichal Kazior WMI_10_2_PRB_REQ_FILTER_RX_CMDID, 134824c88f78SMichal Kazior WMI_10_2_MGMT_TX_CMDID, 134924c88f78SMichal Kazior WMI_10_2_ADDBA_CLEAR_RESP_CMDID, 135024c88f78SMichal Kazior WMI_10_2_ADDBA_SEND_CMDID, 135124c88f78SMichal Kazior WMI_10_2_ADDBA_STATUS_CMDID, 135224c88f78SMichal Kazior WMI_10_2_DELBA_SEND_CMDID, 135324c88f78SMichal Kazior WMI_10_2_ADDBA_SET_RESP_CMDID, 135424c88f78SMichal Kazior WMI_10_2_SEND_SINGLEAMSDU_CMDID, 135524c88f78SMichal Kazior WMI_10_2_STA_POWERSAVE_MODE_CMDID, 135624c88f78SMichal Kazior WMI_10_2_STA_POWERSAVE_PARAM_CMDID, 135724c88f78SMichal Kazior WMI_10_2_STA_MIMO_PS_MODE_CMDID, 135824c88f78SMichal Kazior WMI_10_2_DBGLOG_CFG_CMDID, 135924c88f78SMichal Kazior WMI_10_2_PDEV_DFS_ENABLE_CMDID, 136024c88f78SMichal Kazior WMI_10_2_PDEV_DFS_DISABLE_CMDID, 136124c88f78SMichal Kazior WMI_10_2_PDEV_QVIT_CMDID, 136224c88f78SMichal Kazior WMI_10_2_ROAM_SCAN_MODE, 136324c88f78SMichal Kazior WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, 136424c88f78SMichal Kazior WMI_10_2_ROAM_SCAN_PERIOD, 136524c88f78SMichal Kazior WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 136624c88f78SMichal Kazior WMI_10_2_ROAM_AP_PROFILE, 136724c88f78SMichal Kazior WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, 136824c88f78SMichal Kazior WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, 136924c88f78SMichal Kazior WMI_10_2_OFL_SCAN_PERIOD, 137024c88f78SMichal Kazior WMI_10_2_P2P_DEV_SET_DEVICE_INFO, 137124c88f78SMichal Kazior WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, 137224c88f78SMichal Kazior WMI_10_2_P2P_GO_SET_BEACON_IE, 137324c88f78SMichal Kazior WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, 137424c88f78SMichal Kazior WMI_10_2_AP_PS_PEER_PARAM_CMDID, 137524c88f78SMichal Kazior WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID, 137624c88f78SMichal Kazior WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, 137724c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, 137824c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 137924c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 138024c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 138124c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 138224c88f78SMichal Kazior WMI_10_2_PDEV_SUSPEND_CMDID, 138324c88f78SMichal Kazior WMI_10_2_PDEV_RESUME_CMDID, 138424c88f78SMichal Kazior WMI_10_2_ADD_BCN_FILTER_CMDID, 138524c88f78SMichal Kazior WMI_10_2_RMV_BCN_FILTER_CMDID, 138624c88f78SMichal Kazior WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, 138724c88f78SMichal Kazior WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, 138824c88f78SMichal Kazior WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 138924c88f78SMichal Kazior WMI_10_2_WOW_ENABLE_CMDID, 139024c88f78SMichal Kazior WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 139124c88f78SMichal Kazior WMI_10_2_RTT_MEASREQ_CMDID, 139224c88f78SMichal Kazior WMI_10_2_RTT_TSF_CMDID, 139324c88f78SMichal Kazior WMI_10_2_RTT_KEEPALIVE_CMDID, 139424c88f78SMichal Kazior WMI_10_2_PDEV_SEND_BCN_CMDID, 139524c88f78SMichal Kazior WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 139624c88f78SMichal Kazior WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 139724c88f78SMichal Kazior WMI_10_2_REQUEST_STATS_CMDID, 139824c88f78SMichal Kazior WMI_10_2_GPIO_CONFIG_CMDID, 139924c88f78SMichal Kazior WMI_10_2_GPIO_OUTPUT_CMDID, 140024c88f78SMichal Kazior WMI_10_2_VDEV_RATEMASK_CMDID, 140124c88f78SMichal Kazior WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID, 140224c88f78SMichal Kazior WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 140324c88f78SMichal Kazior WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 140424c88f78SMichal Kazior WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 140524c88f78SMichal Kazior WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 140624c88f78SMichal Kazior WMI_10_2_FORCE_FW_HANG_CMDID, 140724c88f78SMichal Kazior WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 140824c88f78SMichal Kazior WMI_10_2_PDEV_SET_CTL_TABLE_CMDID, 140924c88f78SMichal Kazior WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID, 141024c88f78SMichal Kazior WMI_10_2_PDEV_RATEPWR_TABLE_CMDID, 141124c88f78SMichal Kazior WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID, 1412a57a6a27SRajkumar Manoharan WMI_10_2_PDEV_GET_INFO, 1413a57a6a27SRajkumar Manoharan WMI_10_2_VDEV_GET_INFO, 1414a57a6a27SRajkumar Manoharan WMI_10_2_VDEV_ATF_REQUEST_CMDID, 1415a57a6a27SRajkumar Manoharan WMI_10_2_PEER_ATF_REQUEST_CMDID, 1416a57a6a27SRajkumar Manoharan WMI_10_2_PDEV_GET_TEMPERATURE_CMDID, 141762f77f09SMaharaja WMI_10_2_MU_CAL_START_CMDID, 141862f77f09SMaharaja WMI_10_2_SET_LTEU_CONFIG_CMDID, 141962f77f09SMaharaja WMI_10_2_SET_CCA_PARAMS, 142024c88f78SMichal Kazior WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1, 142124c88f78SMichal Kazior }; 142224c88f78SMichal Kazior 142324c88f78SMichal Kazior enum wmi_10_2_event_id { 142424c88f78SMichal Kazior WMI_10_2_SERVICE_READY_EVENTID = 0x8000, 142524c88f78SMichal Kazior WMI_10_2_READY_EVENTID, 142624c88f78SMichal Kazior WMI_10_2_DEBUG_MESG_EVENTID, 142724c88f78SMichal Kazior WMI_10_2_START_EVENTID = 0x9000, 142824c88f78SMichal Kazior WMI_10_2_END_EVENTID = 0x9FFF, 142924c88f78SMichal Kazior WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID, 143024c88f78SMichal Kazior WMI_10_2_ECHO_EVENTID, 143124c88f78SMichal Kazior WMI_10_2_UPDATE_STATS_EVENTID, 143224c88f78SMichal Kazior WMI_10_2_INST_RSSI_STATS_EVENTID, 143324c88f78SMichal Kazior WMI_10_2_VDEV_START_RESP_EVENTID, 143424c88f78SMichal Kazior WMI_10_2_VDEV_STANDBY_REQ_EVENTID, 143524c88f78SMichal Kazior WMI_10_2_VDEV_RESUME_REQ_EVENTID, 143624c88f78SMichal Kazior WMI_10_2_VDEV_STOPPED_EVENTID, 143724c88f78SMichal Kazior WMI_10_2_PEER_STA_KICKOUT_EVENTID, 143824c88f78SMichal Kazior WMI_10_2_HOST_SWBA_EVENTID, 143924c88f78SMichal Kazior WMI_10_2_TBTTOFFSET_UPDATE_EVENTID, 144024c88f78SMichal Kazior WMI_10_2_MGMT_RX_EVENTID, 144124c88f78SMichal Kazior WMI_10_2_CHAN_INFO_EVENTID, 144224c88f78SMichal Kazior WMI_10_2_PHYERR_EVENTID, 144324c88f78SMichal Kazior WMI_10_2_ROAM_EVENTID, 144424c88f78SMichal Kazior WMI_10_2_PROFILE_MATCH, 144524c88f78SMichal Kazior WMI_10_2_DEBUG_PRINT_EVENTID, 144624c88f78SMichal Kazior WMI_10_2_PDEV_QVIT_EVENTID, 144724c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_DATA_EVENTID, 144824c88f78SMichal Kazior WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID, 144924c88f78SMichal Kazior WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID, 145024c88f78SMichal Kazior WMI_10_2_RTT_ERROR_REPORT_EVENTID, 145124c88f78SMichal Kazior WMI_10_2_RTT_KEEPALIVE_EVENTID, 145224c88f78SMichal Kazior WMI_10_2_WOW_WAKEUP_HOST_EVENTID, 145324c88f78SMichal Kazior WMI_10_2_DCS_INTERFERENCE_EVENTID, 145424c88f78SMichal Kazior WMI_10_2_PDEV_TPC_CONFIG_EVENTID, 145524c88f78SMichal Kazior WMI_10_2_GPIO_INPUT_EVENTID, 145624c88f78SMichal Kazior WMI_10_2_PEER_RATECODE_LIST_EVENTID, 145724c88f78SMichal Kazior WMI_10_2_GENERIC_BUFFER_EVENTID, 145824c88f78SMichal Kazior WMI_10_2_MCAST_BUF_RELEASE_EVENTID, 145924c88f78SMichal Kazior WMI_10_2_MCAST_LIST_AGEOUT_EVENTID, 146024c88f78SMichal Kazior WMI_10_2_WDS_PEER_EVENTID, 1461a57a6a27SRajkumar Manoharan WMI_10_2_PEER_STA_PS_STATECHG_EVENTID, 1462a57a6a27SRajkumar Manoharan WMI_10_2_PDEV_TEMPERATURE_EVENTID, 146324c88f78SMichal Kazior WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1, 146424c88f78SMichal Kazior }; 146524c88f78SMichal Kazior 14662d491e69SRaja Mani enum wmi_10_4_cmd_id { 14672d491e69SRaja Mani WMI_10_4_START_CMDID = 0x9000, 14682d491e69SRaja Mani WMI_10_4_END_CMDID = 0x9FFF, 14692d491e69SRaja Mani WMI_10_4_INIT_CMDID, 14702d491e69SRaja Mani WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID, 14712d491e69SRaja Mani WMI_10_4_STOP_SCAN_CMDID, 14722d491e69SRaja Mani WMI_10_4_SCAN_CHAN_LIST_CMDID, 14732d491e69SRaja Mani WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID, 14742d491e69SRaja Mani WMI_10_4_SCAN_UPDATE_REQUEST_CMDID, 14752d491e69SRaja Mani WMI_10_4_ECHO_CMDID, 14762d491e69SRaja Mani WMI_10_4_PDEV_SET_REGDOMAIN_CMDID, 14772d491e69SRaja Mani WMI_10_4_PDEV_SET_CHANNEL_CMDID, 14782d491e69SRaja Mani WMI_10_4_PDEV_SET_PARAM_CMDID, 14792d491e69SRaja Mani WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID, 14802d491e69SRaja Mani WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID, 14812d491e69SRaja Mani WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID, 14822d491e69SRaja Mani WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID, 14832d491e69SRaja Mani WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID, 14842d491e69SRaja Mani WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID, 14852d491e69SRaja Mani WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID, 14862d491e69SRaja Mani WMI_10_4_PDEV_SET_QUIET_MODE_CMDID, 14872d491e69SRaja Mani WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID, 14882d491e69SRaja Mani WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID, 14892d491e69SRaja Mani WMI_10_4_VDEV_CREATE_CMDID, 14902d491e69SRaja Mani WMI_10_4_VDEV_DELETE_CMDID, 14912d491e69SRaja Mani WMI_10_4_VDEV_START_REQUEST_CMDID, 14922d491e69SRaja Mani WMI_10_4_VDEV_RESTART_REQUEST_CMDID, 14932d491e69SRaja Mani WMI_10_4_VDEV_UP_CMDID, 14942d491e69SRaja Mani WMI_10_4_VDEV_STOP_CMDID, 14952d491e69SRaja Mani WMI_10_4_VDEV_DOWN_CMDID, 14962d491e69SRaja Mani WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID, 14972d491e69SRaja Mani WMI_10_4_VDEV_RESUME_RESPONSE_CMDID, 14982d491e69SRaja Mani WMI_10_4_VDEV_SET_PARAM_CMDID, 14992d491e69SRaja Mani WMI_10_4_VDEV_INSTALL_KEY_CMDID, 15002d491e69SRaja Mani WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID, 15012d491e69SRaja Mani WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID, 15022d491e69SRaja Mani WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID, 15032d491e69SRaja Mani WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID, 15042d491e69SRaja Mani WMI_10_4_PEER_CREATE_CMDID, 15052d491e69SRaja Mani WMI_10_4_PEER_DELETE_CMDID, 15062d491e69SRaja Mani WMI_10_4_PEER_FLUSH_TIDS_CMDID, 15072d491e69SRaja Mani WMI_10_4_PEER_SET_PARAM_CMDID, 15082d491e69SRaja Mani WMI_10_4_PEER_ASSOC_CMDID, 15092d491e69SRaja Mani WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID, 15102d491e69SRaja Mani WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID, 15112d491e69SRaja Mani WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID, 15122d491e69SRaja Mani WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID, 15132d491e69SRaja Mani WMI_10_4_PEER_MCAST_GROUP_CMDID, 15142d491e69SRaja Mani WMI_10_4_BCN_TX_CMDID, 15152d491e69SRaja Mani WMI_10_4_PDEV_SEND_BCN_CMDID, 15162d491e69SRaja Mani WMI_10_4_BCN_PRB_TMPL_CMDID, 15172d491e69SRaja Mani WMI_10_4_BCN_FILTER_RX_CMDID, 15182d491e69SRaja Mani WMI_10_4_PRB_REQ_FILTER_RX_CMDID, 15192d491e69SRaja Mani WMI_10_4_MGMT_TX_CMDID, 15202d491e69SRaja Mani WMI_10_4_PRB_TMPL_CMDID, 15212d491e69SRaja Mani WMI_10_4_ADDBA_CLEAR_RESP_CMDID, 15222d491e69SRaja Mani WMI_10_4_ADDBA_SEND_CMDID, 15232d491e69SRaja Mani WMI_10_4_ADDBA_STATUS_CMDID, 15242d491e69SRaja Mani WMI_10_4_DELBA_SEND_CMDID, 15252d491e69SRaja Mani WMI_10_4_ADDBA_SET_RESP_CMDID, 15262d491e69SRaja Mani WMI_10_4_SEND_SINGLEAMSDU_CMDID, 15272d491e69SRaja Mani WMI_10_4_STA_POWERSAVE_MODE_CMDID, 15282d491e69SRaja Mani WMI_10_4_STA_POWERSAVE_PARAM_CMDID, 15292d491e69SRaja Mani WMI_10_4_STA_MIMO_PS_MODE_CMDID, 15302d491e69SRaja Mani WMI_10_4_DBGLOG_CFG_CMDID, 15312d491e69SRaja Mani WMI_10_4_PDEV_DFS_ENABLE_CMDID, 15322d491e69SRaja Mani WMI_10_4_PDEV_DFS_DISABLE_CMDID, 15332d491e69SRaja Mani WMI_10_4_PDEV_QVIT_CMDID, 15342d491e69SRaja Mani WMI_10_4_ROAM_SCAN_MODE, 15352d491e69SRaja Mani WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD, 15362d491e69SRaja Mani WMI_10_4_ROAM_SCAN_PERIOD, 15372d491e69SRaja Mani WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 15382d491e69SRaja Mani WMI_10_4_ROAM_AP_PROFILE, 15392d491e69SRaja Mani WMI_10_4_OFL_SCAN_ADD_AP_PROFILE, 15402d491e69SRaja Mani WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE, 15412d491e69SRaja Mani WMI_10_4_OFL_SCAN_PERIOD, 15422d491e69SRaja Mani WMI_10_4_P2P_DEV_SET_DEVICE_INFO, 15432d491e69SRaja Mani WMI_10_4_P2P_DEV_SET_DISCOVERABILITY, 15442d491e69SRaja Mani WMI_10_4_P2P_GO_SET_BEACON_IE, 15452d491e69SRaja Mani WMI_10_4_P2P_GO_SET_PROBE_RESP_IE, 15462d491e69SRaja Mani WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID, 15472d491e69SRaja Mani WMI_10_4_AP_PS_PEER_PARAM_CMDID, 15482d491e69SRaja Mani WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID, 15492d491e69SRaja Mani WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID, 15502d491e69SRaja Mani WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID, 15512d491e69SRaja Mani WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 15522d491e69SRaja Mani WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 15532d491e69SRaja Mani WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 15542d491e69SRaja Mani WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 15552d491e69SRaja Mani WMI_10_4_PDEV_SUSPEND_CMDID, 15562d491e69SRaja Mani WMI_10_4_PDEV_RESUME_CMDID, 15572d491e69SRaja Mani WMI_10_4_ADD_BCN_FILTER_CMDID, 15582d491e69SRaja Mani WMI_10_4_RMV_BCN_FILTER_CMDID, 15592d491e69SRaja Mani WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID, 15602d491e69SRaja Mani WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID, 15612d491e69SRaja Mani WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 15622d491e69SRaja Mani WMI_10_4_WOW_ENABLE_CMDID, 15632d491e69SRaja Mani WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 15642d491e69SRaja Mani WMI_10_4_RTT_MEASREQ_CMDID, 15652d491e69SRaja Mani WMI_10_4_RTT_TSF_CMDID, 15662d491e69SRaja Mani WMI_10_4_RTT_KEEPALIVE_CMDID, 15672d491e69SRaja Mani WMI_10_4_OEM_REQ_CMDID, 15682d491e69SRaja Mani WMI_10_4_NAN_CMDID, 15692d491e69SRaja Mani WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 15702d491e69SRaja Mani WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 15712d491e69SRaja Mani WMI_10_4_REQUEST_STATS_CMDID, 15722d491e69SRaja Mani WMI_10_4_GPIO_CONFIG_CMDID, 15732d491e69SRaja Mani WMI_10_4_GPIO_OUTPUT_CMDID, 15742d491e69SRaja Mani WMI_10_4_VDEV_RATEMASK_CMDID, 15752d491e69SRaja Mani WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID, 15762d491e69SRaja Mani WMI_10_4_GTK_OFFLOAD_CMDID, 15772d491e69SRaja Mani WMI_10_4_QBOOST_CFG_CMDID, 15782d491e69SRaja Mani WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID, 15792d491e69SRaja Mani WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID, 15802d491e69SRaja Mani WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 15812d491e69SRaja Mani WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 15822d491e69SRaja Mani WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 15832d491e69SRaja Mani WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 15842d491e69SRaja Mani WMI_10_4_VDEV_SET_KEEPALIVE_CMDID, 15852d491e69SRaja Mani WMI_10_4_VDEV_GET_KEEPALIVE_CMDID, 15862d491e69SRaja Mani WMI_10_4_FORCE_FW_HANG_CMDID, 15872d491e69SRaja Mani WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 15882d491e69SRaja Mani WMI_10_4_PDEV_SET_CTL_TABLE_CMDID, 15892d491e69SRaja Mani WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID, 15902d491e69SRaja Mani WMI_10_4_PDEV_RATEPWR_TABLE_CMDID, 15912d491e69SRaja Mani WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID, 15922d491e69SRaja Mani WMI_10_4_PDEV_FIPS_CMDID, 15932d491e69SRaja Mani WMI_10_4_TT_SET_CONF_CMDID, 15942d491e69SRaja Mani WMI_10_4_FWTEST_CMDID, 15952d491e69SRaja Mani WMI_10_4_VDEV_ATF_REQUEST_CMDID, 15962d491e69SRaja Mani WMI_10_4_PEER_ATF_REQUEST_CMDID, 15972d491e69SRaja Mani WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID, 15982d491e69SRaja Mani WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 15992d491e69SRaja Mani WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID, 16002d491e69SRaja Mani WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID, 16012d491e69SRaja Mani WMI_10_4_PDEV_GET_TPC_CMDID, 16022d491e69SRaja Mani WMI_10_4_PDEV_GET_AST_INFO_CMDID, 16032d491e69SRaja Mani WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID, 16042d491e69SRaja Mani WMI_10_4_PDEV_GET_TEMPERATURE_CMDID, 16052d491e69SRaja Mani WMI_10_4_PDEV_GET_INFO_CMDID, 16062d491e69SRaja Mani WMI_10_4_VDEV_GET_INFO_CMDID, 16072d491e69SRaja Mani WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 16082d491e69SRaja Mani WMI_10_4_MU_CAL_START_CMDID, 16092d491e69SRaja Mani WMI_10_4_SET_CCA_PARAMS_CMDID, 16102d491e69SRaja Mani WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 161169d4315cSVasanthakumar Thiagarajan WMI_10_4_EXT_RESOURCE_CFG_CMDID, 161269d4315cSVasanthakumar Thiagarajan WMI_10_4_VDEV_SET_IE_CMDID, 161369d4315cSVasanthakumar Thiagarajan WMI_10_4_SET_LTEU_CONFIG_CMDID, 16142d491e69SRaja Mani WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1, 16152d491e69SRaja Mani }; 16162d491e69SRaja Mani 16172d491e69SRaja Mani enum wmi_10_4_event_id { 16182d491e69SRaja Mani WMI_10_4_SERVICE_READY_EVENTID = 0x8000, 16192d491e69SRaja Mani WMI_10_4_READY_EVENTID, 16202d491e69SRaja Mani WMI_10_4_DEBUG_MESG_EVENTID, 16212d491e69SRaja Mani WMI_10_4_START_EVENTID = 0x9000, 16222d491e69SRaja Mani WMI_10_4_END_EVENTID = 0x9FFF, 16232d491e69SRaja Mani WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID, 16242d491e69SRaja Mani WMI_10_4_ECHO_EVENTID, 16252d491e69SRaja Mani WMI_10_4_UPDATE_STATS_EVENTID, 16262d491e69SRaja Mani WMI_10_4_INST_RSSI_STATS_EVENTID, 16272d491e69SRaja Mani WMI_10_4_VDEV_START_RESP_EVENTID, 16282d491e69SRaja Mani WMI_10_4_VDEV_STANDBY_REQ_EVENTID, 16292d491e69SRaja Mani WMI_10_4_VDEV_RESUME_REQ_EVENTID, 16302d491e69SRaja Mani WMI_10_4_VDEV_STOPPED_EVENTID, 16312d491e69SRaja Mani WMI_10_4_PEER_STA_KICKOUT_EVENTID, 16322d491e69SRaja Mani WMI_10_4_HOST_SWBA_EVENTID, 16332d491e69SRaja Mani WMI_10_4_TBTTOFFSET_UPDATE_EVENTID, 16342d491e69SRaja Mani WMI_10_4_MGMT_RX_EVENTID, 16352d491e69SRaja Mani WMI_10_4_CHAN_INFO_EVENTID, 16362d491e69SRaja Mani WMI_10_4_PHYERR_EVENTID, 16372d491e69SRaja Mani WMI_10_4_ROAM_EVENTID, 16382d491e69SRaja Mani WMI_10_4_PROFILE_MATCH, 16392d491e69SRaja Mani WMI_10_4_DEBUG_PRINT_EVENTID, 16402d491e69SRaja Mani WMI_10_4_PDEV_QVIT_EVENTID, 16412d491e69SRaja Mani WMI_10_4_WLAN_PROFILE_DATA_EVENTID, 16422d491e69SRaja Mani WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID, 16432d491e69SRaja Mani WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID, 16442d491e69SRaja Mani WMI_10_4_RTT_ERROR_REPORT_EVENTID, 16452d491e69SRaja Mani WMI_10_4_RTT_KEEPALIVE_EVENTID, 16462d491e69SRaja Mani WMI_10_4_OEM_CAPABILITY_EVENTID, 16472d491e69SRaja Mani WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID, 16482d491e69SRaja Mani WMI_10_4_OEM_ERROR_REPORT_EVENTID, 16492d491e69SRaja Mani WMI_10_4_NAN_EVENTID, 16502d491e69SRaja Mani WMI_10_4_WOW_WAKEUP_HOST_EVENTID, 16512d491e69SRaja Mani WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID, 16522d491e69SRaja Mani WMI_10_4_GTK_REKEY_FAIL_EVENTID, 16532d491e69SRaja Mani WMI_10_4_DCS_INTERFERENCE_EVENTID, 16542d491e69SRaja Mani WMI_10_4_PDEV_TPC_CONFIG_EVENTID, 16552d491e69SRaja Mani WMI_10_4_CSA_HANDLING_EVENTID, 16562d491e69SRaja Mani WMI_10_4_GPIO_INPUT_EVENTID, 16572d491e69SRaja Mani WMI_10_4_PEER_RATECODE_LIST_EVENTID, 16582d491e69SRaja Mani WMI_10_4_GENERIC_BUFFER_EVENTID, 16592d491e69SRaja Mani WMI_10_4_MCAST_BUF_RELEASE_EVENTID, 16602d491e69SRaja Mani WMI_10_4_MCAST_LIST_AGEOUT_EVENTID, 16612d491e69SRaja Mani WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID, 16622d491e69SRaja Mani WMI_10_4_WDS_PEER_EVENTID, 16632d491e69SRaja Mani WMI_10_4_PEER_STA_PS_STATECHG_EVENTID, 16642d491e69SRaja Mani WMI_10_4_PDEV_FIPS_EVENTID, 16652d491e69SRaja Mani WMI_10_4_TT_STATS_EVENTID, 16662d491e69SRaja Mani WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID, 16672d491e69SRaja Mani WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID, 16682d491e69SRaja Mani WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID, 16692d491e69SRaja Mani WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID, 16702d491e69SRaja Mani WMI_10_4_PDEV_NFCAL_POWER_EVENTID, 16712d491e69SRaja Mani WMI_10_4_PDEV_TPC_EVENTID, 16722d491e69SRaja Mani WMI_10_4_PDEV_GET_AST_INFO_EVENTID, 16732d491e69SRaja Mani WMI_10_4_PDEV_TEMPERATURE_EVENTID, 16742d491e69SRaja Mani WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 16752d491e69SRaja Mani WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID, 167669d4315cSVasanthakumar Thiagarajan WMI_10_4_MU_REPORT_EVENTID, 16772d491e69SRaja Mani WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1, 16782d491e69SRaja Mani }; 16792d491e69SRaja Mani 16805e3dd157SKalle Valo enum wmi_phy_mode { 16815e3dd157SKalle Valo MODE_11A = 0, /* 11a Mode */ 16825e3dd157SKalle Valo MODE_11G = 1, /* 11b/g Mode */ 16835e3dd157SKalle Valo MODE_11B = 2, /* 11b Mode */ 16845e3dd157SKalle Valo MODE_11GONLY = 3, /* 11g only Mode */ 16855e3dd157SKalle Valo MODE_11NA_HT20 = 4, /* 11a HT20 mode */ 16865e3dd157SKalle Valo MODE_11NG_HT20 = 5, /* 11g HT20 mode */ 16875e3dd157SKalle Valo MODE_11NA_HT40 = 6, /* 11a HT40 mode */ 16885e3dd157SKalle Valo MODE_11NG_HT40 = 7, /* 11g HT40 mode */ 16895e3dd157SKalle Valo MODE_11AC_VHT20 = 8, 16905e3dd157SKalle Valo MODE_11AC_VHT40 = 9, 16915e3dd157SKalle Valo MODE_11AC_VHT80 = 10, 16925e3dd157SKalle Valo /* MODE_11AC_VHT160 = 11, */ 16935e3dd157SKalle Valo MODE_11AC_VHT20_2G = 11, 16945e3dd157SKalle Valo MODE_11AC_VHT40_2G = 12, 16955e3dd157SKalle Valo MODE_11AC_VHT80_2G = 13, 16965e3dd157SKalle Valo MODE_UNKNOWN = 14, 16975e3dd157SKalle Valo MODE_MAX = 14 16985e3dd157SKalle Valo }; 16995e3dd157SKalle Valo 170038a1d47eSKalle Valo static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode) 170138a1d47eSKalle Valo { 170238a1d47eSKalle Valo switch (mode) { 170338a1d47eSKalle Valo case MODE_11A: 170438a1d47eSKalle Valo return "11a"; 170538a1d47eSKalle Valo case MODE_11G: 170638a1d47eSKalle Valo return "11g"; 170738a1d47eSKalle Valo case MODE_11B: 170838a1d47eSKalle Valo return "11b"; 170938a1d47eSKalle Valo case MODE_11GONLY: 171038a1d47eSKalle Valo return "11gonly"; 171138a1d47eSKalle Valo case MODE_11NA_HT20: 171238a1d47eSKalle Valo return "11na-ht20"; 171338a1d47eSKalle Valo case MODE_11NG_HT20: 171438a1d47eSKalle Valo return "11ng-ht20"; 171538a1d47eSKalle Valo case MODE_11NA_HT40: 171638a1d47eSKalle Valo return "11na-ht40"; 171738a1d47eSKalle Valo case MODE_11NG_HT40: 171838a1d47eSKalle Valo return "11ng-ht40"; 171938a1d47eSKalle Valo case MODE_11AC_VHT20: 172038a1d47eSKalle Valo return "11ac-vht20"; 172138a1d47eSKalle Valo case MODE_11AC_VHT40: 172238a1d47eSKalle Valo return "11ac-vht40"; 172338a1d47eSKalle Valo case MODE_11AC_VHT80: 172438a1d47eSKalle Valo return "11ac-vht80"; 172538a1d47eSKalle Valo case MODE_11AC_VHT20_2G: 172638a1d47eSKalle Valo return "11ac-vht20-2g"; 172738a1d47eSKalle Valo case MODE_11AC_VHT40_2G: 172838a1d47eSKalle Valo return "11ac-vht40-2g"; 172938a1d47eSKalle Valo case MODE_11AC_VHT80_2G: 173038a1d47eSKalle Valo return "11ac-vht80-2g"; 173138a1d47eSKalle Valo case MODE_UNKNOWN: 173238a1d47eSKalle Valo /* skip */ 173338a1d47eSKalle Valo break; 173438a1d47eSKalle Valo 173538a1d47eSKalle Valo /* no default handler to allow compiler to check that the 173638a1d47eSKalle Valo * enum is fully handled */ 173738a1d47eSKalle Valo }; 173838a1d47eSKalle Valo 173938a1d47eSKalle Valo return "<unknown>"; 174038a1d47eSKalle Valo } 174138a1d47eSKalle Valo 17425e3dd157SKalle Valo #define WMI_CHAN_LIST_TAG 0x1 17435e3dd157SKalle Valo #define WMI_SSID_LIST_TAG 0x2 17445e3dd157SKalle Valo #define WMI_BSSID_LIST_TAG 0x3 17455e3dd157SKalle Valo #define WMI_IE_TAG 0x4 17465e3dd157SKalle Valo 17475e3dd157SKalle Valo struct wmi_channel { 17485e3dd157SKalle Valo __le32 mhz; 17495e3dd157SKalle Valo __le32 band_center_freq1; 17505e3dd157SKalle Valo __le32 band_center_freq2; /* valid for 11ac, 80plus80 */ 17515e3dd157SKalle Valo union { 17525e3dd157SKalle Valo __le32 flags; /* WMI_CHAN_FLAG_ */ 17535e3dd157SKalle Valo struct { 17545e3dd157SKalle Valo u8 mode; /* only 6 LSBs */ 17555e3dd157SKalle Valo } __packed; 17565e3dd157SKalle Valo } __packed; 17575e3dd157SKalle Valo union { 17585e3dd157SKalle Valo __le32 reginfo0; 17595e3dd157SKalle Valo struct { 176002256930SMichal Kazior /* note: power unit is 0.5 dBm */ 17615e3dd157SKalle Valo u8 min_power; 17625e3dd157SKalle Valo u8 max_power; 17635e3dd157SKalle Valo u8 reg_power; 17645e3dd157SKalle Valo u8 reg_classid; 17655e3dd157SKalle Valo } __packed; 17665e3dd157SKalle Valo } __packed; 17675e3dd157SKalle Valo union { 17685e3dd157SKalle Valo __le32 reginfo1; 17695e3dd157SKalle Valo struct { 17705e3dd157SKalle Valo u8 antenna_max; 17715e3dd157SKalle Valo } __packed; 17725e3dd157SKalle Valo } __packed; 17735e3dd157SKalle Valo } __packed; 17745e3dd157SKalle Valo 17755e3dd157SKalle Valo struct wmi_channel_arg { 17765e3dd157SKalle Valo u32 freq; 17775e3dd157SKalle Valo u32 band_center_freq1; 17785e3dd157SKalle Valo bool passive; 17795e3dd157SKalle Valo bool allow_ibss; 17805e3dd157SKalle Valo bool allow_ht; 17815e3dd157SKalle Valo bool allow_vht; 17825e3dd157SKalle Valo bool ht40plus; 1783e8a50f8bSMarek Puzyniak bool chan_radar; 178402256930SMichal Kazior /* note: power unit is 0.5 dBm */ 17855e3dd157SKalle Valo u32 min_power; 17865e3dd157SKalle Valo u32 max_power; 17875e3dd157SKalle Valo u32 max_reg_power; 17885e3dd157SKalle Valo u32 max_antenna_gain; 17895e3dd157SKalle Valo u32 reg_class_id; 17905e3dd157SKalle Valo enum wmi_phy_mode mode; 17915e3dd157SKalle Valo }; 17925e3dd157SKalle Valo 17935e3dd157SKalle Valo enum wmi_channel_change_cause { 17945e3dd157SKalle Valo WMI_CHANNEL_CHANGE_CAUSE_NONE = 0, 17955e3dd157SKalle Valo WMI_CHANNEL_CHANGE_CAUSE_CSA, 17965e3dd157SKalle Valo }; 17975e3dd157SKalle Valo 17985e3dd157SKalle Valo #define WMI_CHAN_FLAG_HT40_PLUS (1 << 6) 17995e3dd157SKalle Valo #define WMI_CHAN_FLAG_PASSIVE (1 << 7) 18005e3dd157SKalle Valo #define WMI_CHAN_FLAG_ADHOC_ALLOWED (1 << 8) 18015e3dd157SKalle Valo #define WMI_CHAN_FLAG_AP_DISABLED (1 << 9) 18025e3dd157SKalle Valo #define WMI_CHAN_FLAG_DFS (1 << 10) 18035e3dd157SKalle Valo #define WMI_CHAN_FLAG_ALLOW_HT (1 << 11) 18045e3dd157SKalle Valo #define WMI_CHAN_FLAG_ALLOW_VHT (1 << 12) 18055e3dd157SKalle Valo 18065e3dd157SKalle Valo /* Indicate reason for channel switch */ 18075e3dd157SKalle Valo #define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13) 18085e3dd157SKalle Valo 18095c8726ecSRaja Mani #define WMI_MAX_SPATIAL_STREAM 3 /* default max ss */ 18105c8726ecSRaja Mani #define WMI_10_4_MAX_SPATIAL_STREAM 4 18115e3dd157SKalle Valo 18125e3dd157SKalle Valo /* HT Capabilities*/ 18135e3dd157SKalle Valo #define WMI_HT_CAP_ENABLED 0x0001 /* HT Enabled/ disabled */ 18145e3dd157SKalle Valo #define WMI_HT_CAP_HT20_SGI 0x0002 /* Short Guard Interval with HT20 */ 18155e3dd157SKalle Valo #define WMI_HT_CAP_DYNAMIC_SMPS 0x0004 /* Dynamic MIMO powersave */ 18165e3dd157SKalle Valo #define WMI_HT_CAP_TX_STBC 0x0008 /* B3 TX STBC */ 18175e3dd157SKalle Valo #define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3 18185e3dd157SKalle Valo #define WMI_HT_CAP_RX_STBC 0x0030 /* B4-B5 RX STBC */ 18195e3dd157SKalle Valo #define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4 18205e3dd157SKalle Valo #define WMI_HT_CAP_LDPC 0x0040 /* LDPC supported */ 18215e3dd157SKalle Valo #define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080 /* L-SIG TXOP Protection */ 18225e3dd157SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY 0x0700 /* MPDU Density */ 18235e3dd157SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8 18245e3dd157SKalle Valo #define WMI_HT_CAP_HT40_SGI 0x0800 18255e3dd157SKalle Valo 18265e3dd157SKalle Valo #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \ 18275e3dd157SKalle Valo WMI_HT_CAP_HT20_SGI | \ 18285e3dd157SKalle Valo WMI_HT_CAP_HT40_SGI | \ 18295e3dd157SKalle Valo WMI_HT_CAP_TX_STBC | \ 18305e3dd157SKalle Valo WMI_HT_CAP_RX_STBC | \ 18315e3dd157SKalle Valo WMI_HT_CAP_LDPC) 18325e3dd157SKalle Valo 18335e3dd157SKalle Valo /* 18345e3dd157SKalle Valo * WMI_VHT_CAP_* these maps to ieee 802.11ac vht capability information 18355e3dd157SKalle Valo * field. The fields not defined here are not supported, or reserved. 18365e3dd157SKalle Valo * Do not change these masks and if you have to add new one follow the 18375e3dd157SKalle Valo * bitmask as specified by 802.11ac draft. 18385e3dd157SKalle Valo */ 18395e3dd157SKalle Valo 18405e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003 18415e3dd157SKalle Valo #define WMI_VHT_CAP_RX_LDPC 0x00000010 18425e3dd157SKalle Valo #define WMI_VHT_CAP_SGI_80MHZ 0x00000020 18435e3dd157SKalle Valo #define WMI_VHT_CAP_TX_STBC 0x00000080 18445e3dd157SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK 0x00000300 18455e3dd157SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8 18465e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000 18475e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT 23 18485e3dd157SKalle Valo #define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000 18495e3dd157SKalle Valo #define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000 18505e3dd157SKalle Valo 18515e3dd157SKalle Valo /* The following also refer for max HT AMSDU */ 18525e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_3839 0x00000000 18535e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_7935 0x00000001 18545e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002 18555e3dd157SKalle Valo 18565e3dd157SKalle Valo #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \ 18575e3dd157SKalle Valo WMI_VHT_CAP_RX_LDPC | \ 18585e3dd157SKalle Valo WMI_VHT_CAP_SGI_80MHZ | \ 18595e3dd157SKalle Valo WMI_VHT_CAP_TX_STBC | \ 18605e3dd157SKalle Valo WMI_VHT_CAP_RX_STBC_MASK | \ 18615e3dd157SKalle Valo WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \ 18625e3dd157SKalle Valo WMI_VHT_CAP_RX_FIXED_ANT | \ 18635e3dd157SKalle Valo WMI_VHT_CAP_TX_FIXED_ANT) 18645e3dd157SKalle Valo 18655e3dd157SKalle Valo /* 18665e3dd157SKalle Valo * Interested readers refer to Rx/Tx MCS Map definition as defined in 18675e3dd157SKalle Valo * 802.11ac 18685e3dd157SKalle Valo */ 18695e3dd157SKalle Valo #define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1)) 18705e3dd157SKalle Valo #define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000 18715e3dd157SKalle Valo #define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16 18725e3dd157SKalle Valo 18735e3dd157SKalle Valo enum { 18745e3dd157SKalle Valo REGDMN_MODE_11A = 0x00001, /* 11a channels */ 18755e3dd157SKalle Valo REGDMN_MODE_TURBO = 0x00002, /* 11a turbo-only channels */ 18765e3dd157SKalle Valo REGDMN_MODE_11B = 0x00004, /* 11b channels */ 18775e3dd157SKalle Valo REGDMN_MODE_PUREG = 0x00008, /* 11g channels (OFDM only) */ 18785e3dd157SKalle Valo REGDMN_MODE_11G = 0x00008, /* XXX historical */ 18795e3dd157SKalle Valo REGDMN_MODE_108G = 0x00020, /* 11a+Turbo channels */ 18805e3dd157SKalle Valo REGDMN_MODE_108A = 0x00040, /* 11g+Turbo channels */ 18815e3dd157SKalle Valo REGDMN_MODE_XR = 0x00100, /* XR channels */ 18825e3dd157SKalle Valo REGDMN_MODE_11A_HALF_RATE = 0x00200, /* 11A half rate channels */ 18835e3dd157SKalle Valo REGDMN_MODE_11A_QUARTER_RATE = 0x00400, /* 11A quarter rate channels */ 18845e3dd157SKalle Valo REGDMN_MODE_11NG_HT20 = 0x00800, /* 11N-G HT20 channels */ 18855e3dd157SKalle Valo REGDMN_MODE_11NA_HT20 = 0x01000, /* 11N-A HT20 channels */ 18865e3dd157SKalle Valo REGDMN_MODE_11NG_HT40PLUS = 0x02000, /* 11N-G HT40 + channels */ 18875e3dd157SKalle Valo REGDMN_MODE_11NG_HT40MINUS = 0x04000, /* 11N-G HT40 - channels */ 18885e3dd157SKalle Valo REGDMN_MODE_11NA_HT40PLUS = 0x08000, /* 11N-A HT40 + channels */ 18895e3dd157SKalle Valo REGDMN_MODE_11NA_HT40MINUS = 0x10000, /* 11N-A HT40 - channels */ 18905e3dd157SKalle Valo REGDMN_MODE_11AC_VHT20 = 0x20000, /* 5Ghz, VHT20 */ 18915e3dd157SKalle Valo REGDMN_MODE_11AC_VHT40PLUS = 0x40000, /* 5Ghz, VHT40 + channels */ 18925e3dd157SKalle Valo REGDMN_MODE_11AC_VHT40MINUS = 0x80000, /* 5Ghz VHT40 - channels */ 18935e3dd157SKalle Valo REGDMN_MODE_11AC_VHT80 = 0x100000, /* 5Ghz, VHT80 channels */ 18945e3dd157SKalle Valo REGDMN_MODE_ALL = 0xffffffff 18955e3dd157SKalle Valo }; 18965e3dd157SKalle Valo 18975e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001 18985e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002 18995e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004 19005e3dd157SKalle Valo 19015e3dd157SKalle Valo /* regulatory capabilities */ 19025e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040 19035e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080 19045e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100 19055e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200 19065e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400 19075e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800 19085e3dd157SKalle Valo 19095e3dd157SKalle Valo struct hal_reg_capabilities { 19105e3dd157SKalle Valo /* regdomain value specified in EEPROM */ 19115e3dd157SKalle Valo __le32 eeprom_rd; 19125e3dd157SKalle Valo /*regdomain */ 19135e3dd157SKalle Valo __le32 eeprom_rd_ext; 19145e3dd157SKalle Valo /* CAP1 capabilities bit map. */ 19155e3dd157SKalle Valo __le32 regcap1; 19165e3dd157SKalle Valo /* REGDMN EEPROM CAP. */ 19175e3dd157SKalle Valo __le32 regcap2; 19185e3dd157SKalle Valo /* REGDMN MODE */ 19195e3dd157SKalle Valo __le32 wireless_modes; 19205e3dd157SKalle Valo __le32 low_2ghz_chan; 19215e3dd157SKalle Valo __le32 high_2ghz_chan; 19225e3dd157SKalle Valo __le32 low_5ghz_chan; 19235e3dd157SKalle Valo __le32 high_5ghz_chan; 19245e3dd157SKalle Valo } __packed; 19255e3dd157SKalle Valo 19265e3dd157SKalle Valo enum wlan_mode_capability { 19275e3dd157SKalle Valo WHAL_WLAN_11A_CAPABILITY = 0x1, 19285e3dd157SKalle Valo WHAL_WLAN_11G_CAPABILITY = 0x2, 19295e3dd157SKalle Valo WHAL_WLAN_11AG_CAPABILITY = 0x3, 19305e3dd157SKalle Valo }; 19315e3dd157SKalle Valo 19325e3dd157SKalle Valo /* structure used by FW for requesting host memory */ 19335e3dd157SKalle Valo struct wlan_host_mem_req { 19345e3dd157SKalle Valo /* ID of the request */ 19355e3dd157SKalle Valo __le32 req_id; 19365e3dd157SKalle Valo /* size of the of each unit */ 19375e3dd157SKalle Valo __le32 unit_size; 19385e3dd157SKalle Valo /* flags to indicate that 19395e3dd157SKalle Valo * the number units is dependent 19405e3dd157SKalle Valo * on number of resources(num vdevs num peers .. etc) 19415e3dd157SKalle Valo */ 19425e3dd157SKalle Valo __le32 num_unit_info; 19435e3dd157SKalle Valo /* 19445e3dd157SKalle Valo * actual number of units to allocate . if flags in the num_unit_info 19455e3dd157SKalle Valo * indicate that number of units is tied to number of a particular 19465e3dd157SKalle Valo * resource to allocate then num_units filed is set to 0 and host 19475e3dd157SKalle Valo * will derive the number units from number of the resources it is 19485e3dd157SKalle Valo * requesting. 19495e3dd157SKalle Valo */ 19505e3dd157SKalle Valo __le32 num_units; 19515e3dd157SKalle Valo } __packed; 19525e3dd157SKalle Valo 19535e3dd157SKalle Valo /* 19545e3dd157SKalle Valo * The following struct holds optional payload for 19555e3dd157SKalle Valo * wmi_service_ready_event,e.g., 11ac pass some of the 19565e3dd157SKalle Valo * device capability to the host. 19575e3dd157SKalle Valo */ 19585e3dd157SKalle Valo struct wmi_service_ready_event { 19595e3dd157SKalle Valo __le32 sw_version; 19605e3dd157SKalle Valo __le32 sw_version_1; 19615e3dd157SKalle Valo __le32 abi_version; 19625e3dd157SKalle Valo /* WMI_PHY_CAPABILITY */ 19635e3dd157SKalle Valo __le32 phy_capability; 19645e3dd157SKalle Valo /* Maximum number of frag table entries that SW will populate less 1 */ 19655e3dd157SKalle Valo __le32 max_frag_entry; 1966c4f8c836SMichal Kazior __le32 wmi_service_bitmap[16]; 19675e3dd157SKalle Valo __le32 num_rf_chains; 19685e3dd157SKalle Valo /* 19695e3dd157SKalle Valo * The following field is only valid for service type 19705e3dd157SKalle Valo * WMI_SERVICE_11AC 19715e3dd157SKalle Valo */ 19725e3dd157SKalle Valo __le32 ht_cap_info; /* WMI HT Capability */ 19735e3dd157SKalle Valo __le32 vht_cap_info; /* VHT capability info field of 802.11ac */ 19745e3dd157SKalle Valo __le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */ 19755e3dd157SKalle Valo __le32 hw_min_tx_power; 19765e3dd157SKalle Valo __le32 hw_max_tx_power; 19775e3dd157SKalle Valo struct hal_reg_capabilities hal_reg_capabilities; 19785e3dd157SKalle Valo __le32 sys_cap_info; 19795e3dd157SKalle Valo __le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */ 19805e3dd157SKalle Valo /* 19815e3dd157SKalle Valo * Max beacon and Probe Response IE offload size 19825e3dd157SKalle Valo * (includes optional P2P IEs) 19835e3dd157SKalle Valo */ 19845e3dd157SKalle Valo __le32 max_bcn_ie_size; 19855e3dd157SKalle Valo /* 19865e3dd157SKalle Valo * request to host to allocate a chuck of memory and pss it down to FW 19875e3dd157SKalle Valo * via WM_INIT. FW uses this as FW extesnsion memory for saving its 19885e3dd157SKalle Valo * data structures. Only valid for low latency interfaces like PCIE 19895e3dd157SKalle Valo * where FW can access this memory directly (or) by DMA. 19905e3dd157SKalle Valo */ 19915e3dd157SKalle Valo __le32 num_mem_reqs; 19925c01aa3dSMichal Kazior struct wlan_host_mem_req mem_reqs[0]; 19935e3dd157SKalle Valo } __packed; 19945e3dd157SKalle Valo 19956f97d256SBartosz Markowski /* This is the definition from 10.X firmware branch */ 19965c01aa3dSMichal Kazior struct wmi_10x_service_ready_event { 19976f97d256SBartosz Markowski __le32 sw_version; 19986f97d256SBartosz Markowski __le32 abi_version; 19996f97d256SBartosz Markowski 20006f97d256SBartosz Markowski /* WMI_PHY_CAPABILITY */ 20016f97d256SBartosz Markowski __le32 phy_capability; 20026f97d256SBartosz Markowski 20036f97d256SBartosz Markowski /* Maximum number of frag table entries that SW will populate less 1 */ 20046f97d256SBartosz Markowski __le32 max_frag_entry; 2005c4f8c836SMichal Kazior __le32 wmi_service_bitmap[16]; 20066f97d256SBartosz Markowski __le32 num_rf_chains; 20076f97d256SBartosz Markowski 20086f97d256SBartosz Markowski /* 20096f97d256SBartosz Markowski * The following field is only valid for service type 20106f97d256SBartosz Markowski * WMI_SERVICE_11AC 20116f97d256SBartosz Markowski */ 20126f97d256SBartosz Markowski __le32 ht_cap_info; /* WMI HT Capability */ 20136f97d256SBartosz Markowski __le32 vht_cap_info; /* VHT capability info field of 802.11ac */ 20146f97d256SBartosz Markowski __le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */ 20156f97d256SBartosz Markowski __le32 hw_min_tx_power; 20166f97d256SBartosz Markowski __le32 hw_max_tx_power; 20176f97d256SBartosz Markowski 20186f97d256SBartosz Markowski struct hal_reg_capabilities hal_reg_capabilities; 20196f97d256SBartosz Markowski 20206f97d256SBartosz Markowski __le32 sys_cap_info; 20216f97d256SBartosz Markowski __le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */ 20226f97d256SBartosz Markowski 20236f97d256SBartosz Markowski /* 20246f97d256SBartosz Markowski * request to host to allocate a chuck of memory and pss it down to FW 20256f97d256SBartosz Markowski * via WM_INIT. FW uses this as FW extesnsion memory for saving its 20266f97d256SBartosz Markowski * data structures. Only valid for low latency interfaces like PCIE 20276f97d256SBartosz Markowski * where FW can access this memory directly (or) by DMA. 20286f97d256SBartosz Markowski */ 20296f97d256SBartosz Markowski __le32 num_mem_reqs; 20306f97d256SBartosz Markowski 20315c01aa3dSMichal Kazior struct wlan_host_mem_req mem_reqs[0]; 20326f97d256SBartosz Markowski } __packed; 20336f97d256SBartosz Markowski 20345e3dd157SKalle Valo #define WMI_SERVICE_READY_TIMEOUT_HZ (5*HZ) 20355e3dd157SKalle Valo #define WMI_UNIFIED_READY_TIMEOUT_HZ (5*HZ) 20365e3dd157SKalle Valo 20375e3dd157SKalle Valo struct wmi_ready_event { 20385e3dd157SKalle Valo __le32 sw_version; 20395e3dd157SKalle Valo __le32 abi_version; 20405e3dd157SKalle Valo struct wmi_mac_addr mac_addr; 20415e3dd157SKalle Valo __le32 status; 20425e3dd157SKalle Valo } __packed; 20435e3dd157SKalle Valo 20445e3dd157SKalle Valo struct wmi_resource_config { 20455e3dd157SKalle Valo /* number of virtual devices (VAPs) to support */ 20465e3dd157SKalle Valo __le32 num_vdevs; 20475e3dd157SKalle Valo 20485e3dd157SKalle Valo /* number of peer nodes to support */ 20495e3dd157SKalle Valo __le32 num_peers; 20505e3dd157SKalle Valo 20515e3dd157SKalle Valo /* 20525e3dd157SKalle Valo * In offload mode target supports features like WOW, chatter and 20535e3dd157SKalle Valo * other protocol offloads. In order to support them some 20545e3dd157SKalle Valo * functionalities like reorder buffering, PN checking need to be 20555e3dd157SKalle Valo * done in target. This determines maximum number of peers suported 20565e3dd157SKalle Valo * by target in offload mode 20575e3dd157SKalle Valo */ 20585e3dd157SKalle Valo __le32 num_offload_peers; 20595e3dd157SKalle Valo 20605e3dd157SKalle Valo /* For target-based RX reordering */ 20615e3dd157SKalle Valo __le32 num_offload_reorder_bufs; 20625e3dd157SKalle Valo 20635e3dd157SKalle Valo /* number of keys per peer */ 20645e3dd157SKalle Valo __le32 num_peer_keys; 20655e3dd157SKalle Valo 20665e3dd157SKalle Valo /* total number of TX/RX data TIDs */ 20675e3dd157SKalle Valo __le32 num_tids; 20685e3dd157SKalle Valo 20695e3dd157SKalle Valo /* 20705e3dd157SKalle Valo * max skid for resolving hash collisions 20715e3dd157SKalle Valo * 20725e3dd157SKalle Valo * The address search table is sparse, so that if two MAC addresses 20735e3dd157SKalle Valo * result in the same hash value, the second of these conflicting 20745e3dd157SKalle Valo * entries can slide to the next index in the address search table, 20755e3dd157SKalle Valo * and use it, if it is unoccupied. This ast_skid_limit parameter 20765e3dd157SKalle Valo * specifies the upper bound on how many subsequent indices to search 20775e3dd157SKalle Valo * over to find an unoccupied space. 20785e3dd157SKalle Valo */ 20795e3dd157SKalle Valo __le32 ast_skid_limit; 20805e3dd157SKalle Valo 20815e3dd157SKalle Valo /* 20825e3dd157SKalle Valo * the nominal chain mask for transmit 20835e3dd157SKalle Valo * 20845e3dd157SKalle Valo * The chain mask may be modified dynamically, e.g. to operate AP 20855e3dd157SKalle Valo * tx with a reduced number of chains if no clients are associated. 20865e3dd157SKalle Valo * This configuration parameter specifies the nominal chain-mask that 20875e3dd157SKalle Valo * should be used when not operating with a reduced set of tx chains. 20885e3dd157SKalle Valo */ 20895e3dd157SKalle Valo __le32 tx_chain_mask; 20905e3dd157SKalle Valo 20915e3dd157SKalle Valo /* 20925e3dd157SKalle Valo * the nominal chain mask for receive 20935e3dd157SKalle Valo * 20945e3dd157SKalle Valo * The chain mask may be modified dynamically, e.g. for a client 20955e3dd157SKalle Valo * to use a reduced number of chains for receive if the traffic to 20965e3dd157SKalle Valo * the client is low enough that it doesn't require downlink MIMO 20975e3dd157SKalle Valo * or antenna diversity. 20985e3dd157SKalle Valo * This configuration parameter specifies the nominal chain-mask that 20995e3dd157SKalle Valo * should be used when not operating with a reduced set of rx chains. 21005e3dd157SKalle Valo */ 21015e3dd157SKalle Valo __le32 rx_chain_mask; 21025e3dd157SKalle Valo 21035e3dd157SKalle Valo /* 21045e3dd157SKalle Valo * what rx reorder timeout (ms) to use for the AC 21055e3dd157SKalle Valo * 21065e3dd157SKalle Valo * Each WMM access class (voice, video, best-effort, background) will 21075e3dd157SKalle Valo * have its own timeout value to dictate how long to wait for missing 21085e3dd157SKalle Valo * rx MPDUs to arrive before flushing subsequent MPDUs that have 21095e3dd157SKalle Valo * already been received. 21105e3dd157SKalle Valo * This parameter specifies the timeout in milliseconds for each 21115e3dd157SKalle Valo * class. 21125e3dd157SKalle Valo */ 21135e3dd157SKalle Valo __le32 rx_timeout_pri_vi; 21145e3dd157SKalle Valo __le32 rx_timeout_pri_vo; 21155e3dd157SKalle Valo __le32 rx_timeout_pri_be; 21165e3dd157SKalle Valo __le32 rx_timeout_pri_bk; 21175e3dd157SKalle Valo 21185e3dd157SKalle Valo /* 21195e3dd157SKalle Valo * what mode the rx should decap packets to 21205e3dd157SKalle Valo * 21215e3dd157SKalle Valo * MAC can decap to RAW (no decap), native wifi or Ethernet types 21225e3dd157SKalle Valo * THis setting also determines the default TX behavior, however TX 21235e3dd157SKalle Valo * behavior can be modified on a per VAP basis during VAP init 21245e3dd157SKalle Valo */ 21255e3dd157SKalle Valo __le32 rx_decap_mode; 21265e3dd157SKalle Valo 21278e4a4f5dSGeert Uytterhoeven /* what is the maximum number of scan requests that can be queued */ 21285e3dd157SKalle Valo __le32 scan_max_pending_reqs; 21295e3dd157SKalle Valo 21305e3dd157SKalle Valo /* maximum VDEV that could use BMISS offload */ 21315e3dd157SKalle Valo __le32 bmiss_offload_max_vdev; 21325e3dd157SKalle Valo 21335e3dd157SKalle Valo /* maximum VDEV that could use offload roaming */ 21345e3dd157SKalle Valo __le32 roam_offload_max_vdev; 21355e3dd157SKalle Valo 21365e3dd157SKalle Valo /* maximum AP profiles that would push to offload roaming */ 21375e3dd157SKalle Valo __le32 roam_offload_max_ap_profiles; 21385e3dd157SKalle Valo 21395e3dd157SKalle Valo /* 21405e3dd157SKalle Valo * how many groups to use for mcast->ucast conversion 21415e3dd157SKalle Valo * 21425e3dd157SKalle Valo * The target's WAL maintains a table to hold information regarding 21435e3dd157SKalle Valo * which peers belong to a given multicast group, so that if 21445e3dd157SKalle Valo * multicast->unicast conversion is enabled, the target can convert 21455e3dd157SKalle Valo * multicast tx frames to a series of unicast tx frames, to each 21465e3dd157SKalle Valo * peer within the multicast group. 21475e3dd157SKalle Valo This num_mcast_groups configuration parameter tells the target how 21485e3dd157SKalle Valo * many multicast groups to provide storage for within its multicast 21495e3dd157SKalle Valo * group membership table. 21505e3dd157SKalle Valo */ 21515e3dd157SKalle Valo __le32 num_mcast_groups; 21525e3dd157SKalle Valo 21535e3dd157SKalle Valo /* 21545e3dd157SKalle Valo * size to alloc for the mcast membership table 21555e3dd157SKalle Valo * 21565e3dd157SKalle Valo * This num_mcast_table_elems configuration parameter tells the 21575e3dd157SKalle Valo * target how many peer elements it needs to provide storage for in 21585e3dd157SKalle Valo * its multicast group membership table. 21595e3dd157SKalle Valo * These multicast group membership table elements are shared by the 21605e3dd157SKalle Valo * multicast groups stored within the table. 21615e3dd157SKalle Valo */ 21625e3dd157SKalle Valo __le32 num_mcast_table_elems; 21635e3dd157SKalle Valo 21645e3dd157SKalle Valo /* 21655e3dd157SKalle Valo * whether/how to do multicast->unicast conversion 21665e3dd157SKalle Valo * 21675e3dd157SKalle Valo * This configuration parameter specifies whether the target should 21685e3dd157SKalle Valo * perform multicast --> unicast conversion on transmit, and if so, 21695e3dd157SKalle Valo * what to do if it finds no entries in its multicast group 21705e3dd157SKalle Valo * membership table for the multicast IP address in the tx frame. 21715e3dd157SKalle Valo * Configuration value: 21725e3dd157SKalle Valo * 0 -> Do not perform multicast to unicast conversion. 21735e3dd157SKalle Valo * 1 -> Convert multicast frames to unicast, if the IP multicast 21745e3dd157SKalle Valo * address from the tx frame is found in the multicast group 21755e3dd157SKalle Valo * membership table. If the IP multicast address is not found, 21765e3dd157SKalle Valo * drop the frame. 21775e3dd157SKalle Valo * 2 -> Convert multicast frames to unicast, if the IP multicast 21785e3dd157SKalle Valo * address from the tx frame is found in the multicast group 21795e3dd157SKalle Valo * membership table. If the IP multicast address is not found, 21805e3dd157SKalle Valo * transmit the frame as multicast. 21815e3dd157SKalle Valo */ 21825e3dd157SKalle Valo __le32 mcast2ucast_mode; 21835e3dd157SKalle Valo 21845e3dd157SKalle Valo /* 21855e3dd157SKalle Valo * how much memory to allocate for a tx PPDU dbg log 21865e3dd157SKalle Valo * 21875e3dd157SKalle Valo * This parameter controls how much memory the target will allocate 21885e3dd157SKalle Valo * to store a log of tx PPDU meta-information (how large the PPDU 21895e3dd157SKalle Valo * was, when it was sent, whether it was successful, etc.) 21905e3dd157SKalle Valo */ 21915e3dd157SKalle Valo __le32 tx_dbg_log_size; 21925e3dd157SKalle Valo 21935e3dd157SKalle Valo /* how many AST entries to be allocated for WDS */ 21945e3dd157SKalle Valo __le32 num_wds_entries; 21955e3dd157SKalle Valo 21965e3dd157SKalle Valo /* 21975e3dd157SKalle Valo * MAC DMA burst size, e.g., For target PCI limit can be 21985e3dd157SKalle Valo * 0 -default, 1 256B 21995e3dd157SKalle Valo */ 22005e3dd157SKalle Valo __le32 dma_burst_size; 22015e3dd157SKalle Valo 22025e3dd157SKalle Valo /* 22035e3dd157SKalle Valo * Fixed delimiters to be inserted after every MPDU to 22045e3dd157SKalle Valo * account for interface latency to avoid underrun. 22055e3dd157SKalle Valo */ 22065e3dd157SKalle Valo __le32 mac_aggr_delim; 22075e3dd157SKalle Valo 22085e3dd157SKalle Valo /* 22095e3dd157SKalle Valo * determine whether target is responsible for detecting duplicate 22105e3dd157SKalle Valo * non-aggregate MPDU and timing out stale fragments. 22115e3dd157SKalle Valo * 22125e3dd157SKalle Valo * A-MPDU reordering is always performed on the target. 22135e3dd157SKalle Valo * 22145e3dd157SKalle Valo * 0: target responsible for frag timeout and dup checking 22155e3dd157SKalle Valo * 1: host responsible for frag timeout and dup checking 22165e3dd157SKalle Valo */ 22175e3dd157SKalle Valo __le32 rx_skip_defrag_timeout_dup_detection_check; 22185e3dd157SKalle Valo 22195e3dd157SKalle Valo /* 22205e3dd157SKalle Valo * Configuration for VoW : 22215e3dd157SKalle Valo * No of Video Nodes to be supported 22225e3dd157SKalle Valo * and Max no of descriptors for each Video link (node). 22235e3dd157SKalle Valo */ 22245e3dd157SKalle Valo __le32 vow_config; 22255e3dd157SKalle Valo 22265e3dd157SKalle Valo /* maximum VDEV that could use GTK offload */ 22275e3dd157SKalle Valo __le32 gtk_offload_max_vdev; 22285e3dd157SKalle Valo 22295e3dd157SKalle Valo /* Number of msdu descriptors target should use */ 22305e3dd157SKalle Valo __le32 num_msdu_desc; 22315e3dd157SKalle Valo 22325e3dd157SKalle Valo /* 22335e3dd157SKalle Valo * Max. number of Tx fragments per MSDU 22345e3dd157SKalle Valo * This parameter controls the max number of Tx fragments per MSDU. 22355e3dd157SKalle Valo * This is sent by the target as part of the WMI_SERVICE_READY event 22365e3dd157SKalle Valo * and is overriden by the OS shim as required. 22375e3dd157SKalle Valo */ 22385e3dd157SKalle Valo __le32 max_frag_entries; 22395e3dd157SKalle Valo } __packed; 22405e3dd157SKalle Valo 224112b2b9e3SBartosz Markowski struct wmi_resource_config_10x { 224212b2b9e3SBartosz Markowski /* number of virtual devices (VAPs) to support */ 224312b2b9e3SBartosz Markowski __le32 num_vdevs; 224412b2b9e3SBartosz Markowski 224512b2b9e3SBartosz Markowski /* number of peer nodes to support */ 224612b2b9e3SBartosz Markowski __le32 num_peers; 224712b2b9e3SBartosz Markowski 224812b2b9e3SBartosz Markowski /* number of keys per peer */ 224912b2b9e3SBartosz Markowski __le32 num_peer_keys; 225012b2b9e3SBartosz Markowski 225112b2b9e3SBartosz Markowski /* total number of TX/RX data TIDs */ 225212b2b9e3SBartosz Markowski __le32 num_tids; 225312b2b9e3SBartosz Markowski 225412b2b9e3SBartosz Markowski /* 225512b2b9e3SBartosz Markowski * max skid for resolving hash collisions 225612b2b9e3SBartosz Markowski * 225712b2b9e3SBartosz Markowski * The address search table is sparse, so that if two MAC addresses 225812b2b9e3SBartosz Markowski * result in the same hash value, the second of these conflicting 225912b2b9e3SBartosz Markowski * entries can slide to the next index in the address search table, 226012b2b9e3SBartosz Markowski * and use it, if it is unoccupied. This ast_skid_limit parameter 226112b2b9e3SBartosz Markowski * specifies the upper bound on how many subsequent indices to search 226212b2b9e3SBartosz Markowski * over to find an unoccupied space. 226312b2b9e3SBartosz Markowski */ 226412b2b9e3SBartosz Markowski __le32 ast_skid_limit; 226512b2b9e3SBartosz Markowski 226612b2b9e3SBartosz Markowski /* 226712b2b9e3SBartosz Markowski * the nominal chain mask for transmit 226812b2b9e3SBartosz Markowski * 226912b2b9e3SBartosz Markowski * The chain mask may be modified dynamically, e.g. to operate AP 227012b2b9e3SBartosz Markowski * tx with a reduced number of chains if no clients are associated. 227112b2b9e3SBartosz Markowski * This configuration parameter specifies the nominal chain-mask that 227212b2b9e3SBartosz Markowski * should be used when not operating with a reduced set of tx chains. 227312b2b9e3SBartosz Markowski */ 227412b2b9e3SBartosz Markowski __le32 tx_chain_mask; 227512b2b9e3SBartosz Markowski 227612b2b9e3SBartosz Markowski /* 227712b2b9e3SBartosz Markowski * the nominal chain mask for receive 227812b2b9e3SBartosz Markowski * 227912b2b9e3SBartosz Markowski * The chain mask may be modified dynamically, e.g. for a client 228012b2b9e3SBartosz Markowski * to use a reduced number of chains for receive if the traffic to 228112b2b9e3SBartosz Markowski * the client is low enough that it doesn't require downlink MIMO 228212b2b9e3SBartosz Markowski * or antenna diversity. 228312b2b9e3SBartosz Markowski * This configuration parameter specifies the nominal chain-mask that 228412b2b9e3SBartosz Markowski * should be used when not operating with a reduced set of rx chains. 228512b2b9e3SBartosz Markowski */ 228612b2b9e3SBartosz Markowski __le32 rx_chain_mask; 228712b2b9e3SBartosz Markowski 228812b2b9e3SBartosz Markowski /* 228912b2b9e3SBartosz Markowski * what rx reorder timeout (ms) to use for the AC 229012b2b9e3SBartosz Markowski * 229112b2b9e3SBartosz Markowski * Each WMM access class (voice, video, best-effort, background) will 229212b2b9e3SBartosz Markowski * have its own timeout value to dictate how long to wait for missing 229312b2b9e3SBartosz Markowski * rx MPDUs to arrive before flushing subsequent MPDUs that have 229412b2b9e3SBartosz Markowski * already been received. 229512b2b9e3SBartosz Markowski * This parameter specifies the timeout in milliseconds for each 229612b2b9e3SBartosz Markowski * class. 229712b2b9e3SBartosz Markowski */ 229812b2b9e3SBartosz Markowski __le32 rx_timeout_pri_vi; 229912b2b9e3SBartosz Markowski __le32 rx_timeout_pri_vo; 230012b2b9e3SBartosz Markowski __le32 rx_timeout_pri_be; 230112b2b9e3SBartosz Markowski __le32 rx_timeout_pri_bk; 230212b2b9e3SBartosz Markowski 230312b2b9e3SBartosz Markowski /* 230412b2b9e3SBartosz Markowski * what mode the rx should decap packets to 230512b2b9e3SBartosz Markowski * 230612b2b9e3SBartosz Markowski * MAC can decap to RAW (no decap), native wifi or Ethernet types 230712b2b9e3SBartosz Markowski * THis setting also determines the default TX behavior, however TX 230812b2b9e3SBartosz Markowski * behavior can be modified on a per VAP basis during VAP init 230912b2b9e3SBartosz Markowski */ 231012b2b9e3SBartosz Markowski __le32 rx_decap_mode; 231112b2b9e3SBartosz Markowski 23128e4a4f5dSGeert Uytterhoeven /* what is the maximum number of scan requests that can be queued */ 231312b2b9e3SBartosz Markowski __le32 scan_max_pending_reqs; 231412b2b9e3SBartosz Markowski 231512b2b9e3SBartosz Markowski /* maximum VDEV that could use BMISS offload */ 231612b2b9e3SBartosz Markowski __le32 bmiss_offload_max_vdev; 231712b2b9e3SBartosz Markowski 231812b2b9e3SBartosz Markowski /* maximum VDEV that could use offload roaming */ 231912b2b9e3SBartosz Markowski __le32 roam_offload_max_vdev; 232012b2b9e3SBartosz Markowski 232112b2b9e3SBartosz Markowski /* maximum AP profiles that would push to offload roaming */ 232212b2b9e3SBartosz Markowski __le32 roam_offload_max_ap_profiles; 232312b2b9e3SBartosz Markowski 232412b2b9e3SBartosz Markowski /* 232512b2b9e3SBartosz Markowski * how many groups to use for mcast->ucast conversion 232612b2b9e3SBartosz Markowski * 232712b2b9e3SBartosz Markowski * The target's WAL maintains a table to hold information regarding 232812b2b9e3SBartosz Markowski * which peers belong to a given multicast group, so that if 232912b2b9e3SBartosz Markowski * multicast->unicast conversion is enabled, the target can convert 233012b2b9e3SBartosz Markowski * multicast tx frames to a series of unicast tx frames, to each 233112b2b9e3SBartosz Markowski * peer within the multicast group. 233212b2b9e3SBartosz Markowski This num_mcast_groups configuration parameter tells the target how 233312b2b9e3SBartosz Markowski * many multicast groups to provide storage for within its multicast 233412b2b9e3SBartosz Markowski * group membership table. 233512b2b9e3SBartosz Markowski */ 233612b2b9e3SBartosz Markowski __le32 num_mcast_groups; 233712b2b9e3SBartosz Markowski 233812b2b9e3SBartosz Markowski /* 233912b2b9e3SBartosz Markowski * size to alloc for the mcast membership table 234012b2b9e3SBartosz Markowski * 234112b2b9e3SBartosz Markowski * This num_mcast_table_elems configuration parameter tells the 234212b2b9e3SBartosz Markowski * target how many peer elements it needs to provide storage for in 234312b2b9e3SBartosz Markowski * its multicast group membership table. 234412b2b9e3SBartosz Markowski * These multicast group membership table elements are shared by the 234512b2b9e3SBartosz Markowski * multicast groups stored within the table. 234612b2b9e3SBartosz Markowski */ 234712b2b9e3SBartosz Markowski __le32 num_mcast_table_elems; 234812b2b9e3SBartosz Markowski 234912b2b9e3SBartosz Markowski /* 235012b2b9e3SBartosz Markowski * whether/how to do multicast->unicast conversion 235112b2b9e3SBartosz Markowski * 235212b2b9e3SBartosz Markowski * This configuration parameter specifies whether the target should 235312b2b9e3SBartosz Markowski * perform multicast --> unicast conversion on transmit, and if so, 235412b2b9e3SBartosz Markowski * what to do if it finds no entries in its multicast group 235512b2b9e3SBartosz Markowski * membership table for the multicast IP address in the tx frame. 235612b2b9e3SBartosz Markowski * Configuration value: 235712b2b9e3SBartosz Markowski * 0 -> Do not perform multicast to unicast conversion. 235812b2b9e3SBartosz Markowski * 1 -> Convert multicast frames to unicast, if the IP multicast 235912b2b9e3SBartosz Markowski * address from the tx frame is found in the multicast group 236012b2b9e3SBartosz Markowski * membership table. If the IP multicast address is not found, 236112b2b9e3SBartosz Markowski * drop the frame. 236212b2b9e3SBartosz Markowski * 2 -> Convert multicast frames to unicast, if the IP multicast 236312b2b9e3SBartosz Markowski * address from the tx frame is found in the multicast group 236412b2b9e3SBartosz Markowski * membership table. If the IP multicast address is not found, 236512b2b9e3SBartosz Markowski * transmit the frame as multicast. 236612b2b9e3SBartosz Markowski */ 236712b2b9e3SBartosz Markowski __le32 mcast2ucast_mode; 236812b2b9e3SBartosz Markowski 236912b2b9e3SBartosz Markowski /* 237012b2b9e3SBartosz Markowski * how much memory to allocate for a tx PPDU dbg log 237112b2b9e3SBartosz Markowski * 237212b2b9e3SBartosz Markowski * This parameter controls how much memory the target will allocate 237312b2b9e3SBartosz Markowski * to store a log of tx PPDU meta-information (how large the PPDU 237412b2b9e3SBartosz Markowski * was, when it was sent, whether it was successful, etc.) 237512b2b9e3SBartosz Markowski */ 237612b2b9e3SBartosz Markowski __le32 tx_dbg_log_size; 237712b2b9e3SBartosz Markowski 237812b2b9e3SBartosz Markowski /* how many AST entries to be allocated for WDS */ 237912b2b9e3SBartosz Markowski __le32 num_wds_entries; 238012b2b9e3SBartosz Markowski 238112b2b9e3SBartosz Markowski /* 238212b2b9e3SBartosz Markowski * MAC DMA burst size, e.g., For target PCI limit can be 238312b2b9e3SBartosz Markowski * 0 -default, 1 256B 238412b2b9e3SBartosz Markowski */ 238512b2b9e3SBartosz Markowski __le32 dma_burst_size; 238612b2b9e3SBartosz Markowski 238712b2b9e3SBartosz Markowski /* 238812b2b9e3SBartosz Markowski * Fixed delimiters to be inserted after every MPDU to 238912b2b9e3SBartosz Markowski * account for interface latency to avoid underrun. 239012b2b9e3SBartosz Markowski */ 239112b2b9e3SBartosz Markowski __le32 mac_aggr_delim; 239212b2b9e3SBartosz Markowski 239312b2b9e3SBartosz Markowski /* 239412b2b9e3SBartosz Markowski * determine whether target is responsible for detecting duplicate 239512b2b9e3SBartosz Markowski * non-aggregate MPDU and timing out stale fragments. 239612b2b9e3SBartosz Markowski * 239712b2b9e3SBartosz Markowski * A-MPDU reordering is always performed on the target. 239812b2b9e3SBartosz Markowski * 239912b2b9e3SBartosz Markowski * 0: target responsible for frag timeout and dup checking 240012b2b9e3SBartosz Markowski * 1: host responsible for frag timeout and dup checking 240112b2b9e3SBartosz Markowski */ 240212b2b9e3SBartosz Markowski __le32 rx_skip_defrag_timeout_dup_detection_check; 240312b2b9e3SBartosz Markowski 240412b2b9e3SBartosz Markowski /* 240512b2b9e3SBartosz Markowski * Configuration for VoW : 240612b2b9e3SBartosz Markowski * No of Video Nodes to be supported 240712b2b9e3SBartosz Markowski * and Max no of descriptors for each Video link (node). 240812b2b9e3SBartosz Markowski */ 240912b2b9e3SBartosz Markowski __le32 vow_config; 241012b2b9e3SBartosz Markowski 241112b2b9e3SBartosz Markowski /* Number of msdu descriptors target should use */ 241212b2b9e3SBartosz Markowski __le32 num_msdu_desc; 241312b2b9e3SBartosz Markowski 241412b2b9e3SBartosz Markowski /* 241512b2b9e3SBartosz Markowski * Max. number of Tx fragments per MSDU 241612b2b9e3SBartosz Markowski * This parameter controls the max number of Tx fragments per MSDU. 241712b2b9e3SBartosz Markowski * This is sent by the target as part of the WMI_SERVICE_READY event 241812b2b9e3SBartosz Markowski * and is overriden by the OS shim as required. 241912b2b9e3SBartosz Markowski */ 242012b2b9e3SBartosz Markowski __le32 max_frag_entries; 242112b2b9e3SBartosz Markowski } __packed; 242212b2b9e3SBartosz Markowski 24234a16fbecSRajkumar Manoharan enum wmi_10_2_feature_mask { 24244a16fbecSRajkumar Manoharan WMI_10_2_RX_BATCH_MODE = BIT(0), 24254a16fbecSRajkumar Manoharan WMI_10_2_ATF_CONFIG = BIT(1), 2426de0c789bSYanbo Li WMI_10_2_COEX_GPIO = BIT(3), 2427de46c015SMohammed Shafi Shajakhan WMI_10_2_PEER_STATS = BIT(7), 24284a16fbecSRajkumar Manoharan }; 24294a16fbecSRajkumar Manoharan 243024c88f78SMichal Kazior struct wmi_resource_config_10_2 { 243124c88f78SMichal Kazior struct wmi_resource_config_10x common; 243224c88f78SMichal Kazior __le32 max_peer_ext_stats; 243324c88f78SMichal Kazior __le32 smart_ant_cap; /* 0-disable, 1-enable */ 243424c88f78SMichal Kazior __le32 bk_min_free; 243524c88f78SMichal Kazior __le32 be_min_free; 243624c88f78SMichal Kazior __le32 vi_min_free; 243724c88f78SMichal Kazior __le32 vo_min_free; 24384a16fbecSRajkumar Manoharan __le32 feature_mask; 243924c88f78SMichal Kazior } __packed; 244012b2b9e3SBartosz Markowski 2441b0399417SRaja Mani #define NUM_UNITS_IS_NUM_VDEVS BIT(0) 2442b0399417SRaja Mani #define NUM_UNITS_IS_NUM_PEERS BIT(1) 2443b0399417SRaja Mani #define NUM_UNITS_IS_NUM_ACTIVE_PEERS BIT(2) 2444b3effe61SBartosz Markowski 2445d1e52a8eSRaja Mani struct wmi_resource_config_10_4 { 2446d1e52a8eSRaja Mani /* Number of virtual devices (VAPs) to support */ 2447d1e52a8eSRaja Mani __le32 num_vdevs; 2448d1e52a8eSRaja Mani 2449d1e52a8eSRaja Mani /* Number of peer nodes to support */ 2450d1e52a8eSRaja Mani __le32 num_peers; 2451d1e52a8eSRaja Mani 2452d1e52a8eSRaja Mani /* Number of active peer nodes to support */ 2453d1e52a8eSRaja Mani __le32 num_active_peers; 2454d1e52a8eSRaja Mani 2455d1e52a8eSRaja Mani /* In offload mode, target supports features like WOW, chatter and other 2456d1e52a8eSRaja Mani * protocol offloads. In order to support them some functionalities like 2457d1e52a8eSRaja Mani * reorder buffering, PN checking need to be done in target. 2458d1e52a8eSRaja Mani * This determines maximum number of peers supported by target in 2459d1e52a8eSRaja Mani * offload mode. 2460d1e52a8eSRaja Mani */ 2461d1e52a8eSRaja Mani __le32 num_offload_peers; 2462d1e52a8eSRaja Mani 2463d1e52a8eSRaja Mani /* Number of reorder buffers available for doing target based reorder 2464d1e52a8eSRaja Mani * Rx reorder buffering 2465d1e52a8eSRaja Mani */ 2466d1e52a8eSRaja Mani __le32 num_offload_reorder_buffs; 2467d1e52a8eSRaja Mani 2468d1e52a8eSRaja Mani /* Number of keys per peer */ 2469d1e52a8eSRaja Mani __le32 num_peer_keys; 2470d1e52a8eSRaja Mani 2471d1e52a8eSRaja Mani /* Total number of TX/RX data TIDs */ 2472d1e52a8eSRaja Mani __le32 num_tids; 2473d1e52a8eSRaja Mani 2474d1e52a8eSRaja Mani /* Max skid for resolving hash collisions. 2475d1e52a8eSRaja Mani * The address search table is sparse, so that if two MAC addresses 2476d1e52a8eSRaja Mani * result in the same hash value, the second of these conflicting 2477d1e52a8eSRaja Mani * entries can slide to the next index in the address search table, 2478d1e52a8eSRaja Mani * and use it, if it is unoccupied. This ast_skid_limit parameter 2479d1e52a8eSRaja Mani * specifies the upper bound on how many subsequent indices to search 2480d1e52a8eSRaja Mani * over to find an unoccupied space. 2481d1e52a8eSRaja Mani */ 2482d1e52a8eSRaja Mani __le32 ast_skid_limit; 2483d1e52a8eSRaja Mani 2484d1e52a8eSRaja Mani /* The nominal chain mask for transmit. 2485d1e52a8eSRaja Mani * The chain mask may be modified dynamically, e.g. to operate AP tx 2486d1e52a8eSRaja Mani * with a reduced number of chains if no clients are associated. 2487d1e52a8eSRaja Mani * This configuration parameter specifies the nominal chain-mask that 2488d1e52a8eSRaja Mani * should be used when not operating with a reduced set of tx chains. 2489d1e52a8eSRaja Mani */ 2490d1e52a8eSRaja Mani __le32 tx_chain_mask; 2491d1e52a8eSRaja Mani 2492d1e52a8eSRaja Mani /* The nominal chain mask for receive. 2493d1e52a8eSRaja Mani * The chain mask may be modified dynamically, e.g. for a client to use 2494d1e52a8eSRaja Mani * a reduced number of chains for receive if the traffic to the client 2495d1e52a8eSRaja Mani * is low enough that it doesn't require downlink MIMO or antenna 2496d1e52a8eSRaja Mani * diversity. This configuration parameter specifies the nominal 2497d1e52a8eSRaja Mani * chain-mask that should be used when not operating with a reduced 2498d1e52a8eSRaja Mani * set of rx chains. 2499d1e52a8eSRaja Mani */ 2500d1e52a8eSRaja Mani __le32 rx_chain_mask; 2501d1e52a8eSRaja Mani 2502d1e52a8eSRaja Mani /* What rx reorder timeout (ms) to use for the AC. 2503d1e52a8eSRaja Mani * Each WMM access class (voice, video, best-effort, background) will 2504d1e52a8eSRaja Mani * have its own timeout value to dictate how long to wait for missing 2505d1e52a8eSRaja Mani * rx MPDUs to arrive before flushing subsequent MPDUs that have already 2506d1e52a8eSRaja Mani * been received. This parameter specifies the timeout in milliseconds 2507d1e52a8eSRaja Mani * for each class. 2508d1e52a8eSRaja Mani */ 2509d1e52a8eSRaja Mani __le32 rx_timeout_pri[4]; 2510d1e52a8eSRaja Mani 2511d1e52a8eSRaja Mani /* What mode the rx should decap packets to. 2512d1e52a8eSRaja Mani * MAC can decap to RAW (no decap), native wifi or Ethernet types. 2513d1e52a8eSRaja Mani * This setting also determines the default TX behavior, however TX 2514d1e52a8eSRaja Mani * behavior can be modified on a per VAP basis during VAP init 2515d1e52a8eSRaja Mani */ 2516d1e52a8eSRaja Mani __le32 rx_decap_mode; 2517d1e52a8eSRaja Mani 2518d1e52a8eSRaja Mani __le32 scan_max_pending_req; 2519d1e52a8eSRaja Mani 2520d1e52a8eSRaja Mani __le32 bmiss_offload_max_vdev; 2521d1e52a8eSRaja Mani 2522d1e52a8eSRaja Mani __le32 roam_offload_max_vdev; 2523d1e52a8eSRaja Mani 2524d1e52a8eSRaja Mani __le32 roam_offload_max_ap_profiles; 2525d1e52a8eSRaja Mani 2526d1e52a8eSRaja Mani /* How many groups to use for mcast->ucast conversion. 2527d1e52a8eSRaja Mani * The target's WAL maintains a table to hold information regarding 2528d1e52a8eSRaja Mani * which peers belong to a given multicast group, so that if 2529d1e52a8eSRaja Mani * multicast->unicast conversion is enabled, the target can convert 2530d1e52a8eSRaja Mani * multicast tx frames to a series of unicast tx frames, to each peer 2531d1e52a8eSRaja Mani * within the multicast group. This num_mcast_groups configuration 2532d1e52a8eSRaja Mani * parameter tells the target how many multicast groups to provide 2533d1e52a8eSRaja Mani * storage for within its multicast group membership table. 2534d1e52a8eSRaja Mani */ 2535d1e52a8eSRaja Mani __le32 num_mcast_groups; 2536d1e52a8eSRaja Mani 2537d1e52a8eSRaja Mani /* Size to alloc for the mcast membership table. 2538d1e52a8eSRaja Mani * This num_mcast_table_elems configuration parameter tells the target 2539d1e52a8eSRaja Mani * how many peer elements it needs to provide storage for in its 2540d1e52a8eSRaja Mani * multicast group membership table. These multicast group membership 2541d1e52a8eSRaja Mani * table elements are shared by the multicast groups stored within 2542d1e52a8eSRaja Mani * the table. 2543d1e52a8eSRaja Mani */ 2544d1e52a8eSRaja Mani __le32 num_mcast_table_elems; 2545d1e52a8eSRaja Mani 2546d1e52a8eSRaja Mani /* Whether/how to do multicast->unicast conversion. 2547d1e52a8eSRaja Mani * This configuration parameter specifies whether the target should 2548d1e52a8eSRaja Mani * perform multicast --> unicast conversion on transmit, and if so, 2549d1e52a8eSRaja Mani * what to do if it finds no entries in its multicast group membership 2550d1e52a8eSRaja Mani * table for the multicast IP address in the tx frame. 2551d1e52a8eSRaja Mani * Configuration value: 2552d1e52a8eSRaja Mani * 0 -> Do not perform multicast to unicast conversion. 2553d1e52a8eSRaja Mani * 1 -> Convert multicast frames to unicast, if the IP multicast address 2554d1e52a8eSRaja Mani * from the tx frame is found in the multicast group membership 2555d1e52a8eSRaja Mani * table. If the IP multicast address is not found, drop the frame 2556d1e52a8eSRaja Mani * 2 -> Convert multicast frames to unicast, if the IP multicast address 2557d1e52a8eSRaja Mani * from the tx frame is found in the multicast group membership 2558d1e52a8eSRaja Mani * table. If the IP multicast address is not found, transmit the 2559d1e52a8eSRaja Mani * frame as multicast. 2560d1e52a8eSRaja Mani */ 2561d1e52a8eSRaja Mani __le32 mcast2ucast_mode; 2562d1e52a8eSRaja Mani 2563d1e52a8eSRaja Mani /* How much memory to allocate for a tx PPDU dbg log. 2564d1e52a8eSRaja Mani * This parameter controls how much memory the target will allocate to 2565d1e52a8eSRaja Mani * store a log of tx PPDU meta-information (how large the PPDU was, 2566d1e52a8eSRaja Mani * when it was sent, whether it was successful, etc.) 2567d1e52a8eSRaja Mani */ 2568d1e52a8eSRaja Mani __le32 tx_dbg_log_size; 2569d1e52a8eSRaja Mani 2570d1e52a8eSRaja Mani /* How many AST entries to be allocated for WDS */ 2571d1e52a8eSRaja Mani __le32 num_wds_entries; 2572d1e52a8eSRaja Mani 2573d1e52a8eSRaja Mani /* MAC DMA burst size. 0 -default, 1 -256B */ 2574d1e52a8eSRaja Mani __le32 dma_burst_size; 2575d1e52a8eSRaja Mani 2576d1e52a8eSRaja Mani /* Fixed delimiters to be inserted after every MPDU to account for 2577d1e52a8eSRaja Mani * interface latency to avoid underrun. 2578d1e52a8eSRaja Mani */ 2579d1e52a8eSRaja Mani __le32 mac_aggr_delim; 2580d1e52a8eSRaja Mani 2581d1e52a8eSRaja Mani /* Determine whether target is responsible for detecting duplicate 2582d1e52a8eSRaja Mani * non-aggregate MPDU and timing out stale fragments. A-MPDU reordering 2583d1e52a8eSRaja Mani * is always performed on the target. 2584d1e52a8eSRaja Mani * 2585d1e52a8eSRaja Mani * 0: target responsible for frag timeout and dup checking 2586d1e52a8eSRaja Mani * 1: host responsible for frag timeout and dup checking 2587d1e52a8eSRaja Mani */ 2588d1e52a8eSRaja Mani __le32 rx_skip_defrag_timeout_dup_detection_check; 2589d1e52a8eSRaja Mani 2590d1e52a8eSRaja Mani /* Configuration for VoW : No of Video nodes to be supported and max 2591d1e52a8eSRaja Mani * no of descriptors for each video link (node). 2592d1e52a8eSRaja Mani */ 2593d1e52a8eSRaja Mani __le32 vow_config; 2594d1e52a8eSRaja Mani 2595d1e52a8eSRaja Mani /* Maximum vdev that could use gtk offload */ 2596d1e52a8eSRaja Mani __le32 gtk_offload_max_vdev; 2597d1e52a8eSRaja Mani 2598d1e52a8eSRaja Mani /* Number of msdu descriptors target should use */ 2599d1e52a8eSRaja Mani __le32 num_msdu_desc; 2600d1e52a8eSRaja Mani 2601d1e52a8eSRaja Mani /* Max number of tx fragments per MSDU. 2602d1e52a8eSRaja Mani * This parameter controls the max number of tx fragments per MSDU. 2603d1e52a8eSRaja Mani * This will passed by target as part of the WMI_SERVICE_READY event 2604d1e52a8eSRaja Mani * and is overridden by the OS shim as required. 2605d1e52a8eSRaja Mani */ 2606d1e52a8eSRaja Mani __le32 max_frag_entries; 2607d1e52a8eSRaja Mani 2608d1e52a8eSRaja Mani /* Max number of extended peer stats. 2609d1e52a8eSRaja Mani * This parameter controls the max number of peers for which extended 2610d1e52a8eSRaja Mani * statistics are supported by target 2611d1e52a8eSRaja Mani */ 2612d1e52a8eSRaja Mani __le32 max_peer_ext_stats; 2613d1e52a8eSRaja Mani 2614d1e52a8eSRaja Mani /* Smart antenna capabilities information. 2615d1e52a8eSRaja Mani * 1 - Smart antenna is enabled 2616d1e52a8eSRaja Mani * 0 - Smart antenna is disabled 2617d1e52a8eSRaja Mani * In future this can contain smart antenna specific capabilities. 2618d1e52a8eSRaja Mani */ 2619d1e52a8eSRaja Mani __le32 smart_ant_cap; 2620d1e52a8eSRaja Mani 2621d1e52a8eSRaja Mani /* User can configure the buffers allocated for each AC (BE, BK, VI, VO) 2622d1e52a8eSRaja Mani * during init. 2623d1e52a8eSRaja Mani */ 2624d1e52a8eSRaja Mani __le32 bk_minfree; 2625d1e52a8eSRaja Mani __le32 be_minfree; 2626d1e52a8eSRaja Mani __le32 vi_minfree; 2627d1e52a8eSRaja Mani __le32 vo_minfree; 2628d1e52a8eSRaja Mani 2629d1e52a8eSRaja Mani /* Rx batch mode capability. 2630d1e52a8eSRaja Mani * 1 - Rx batch mode enabled 2631d1e52a8eSRaja Mani * 0 - Rx batch mode disabled 2632d1e52a8eSRaja Mani */ 2633d1e52a8eSRaja Mani __le32 rx_batchmode; 2634d1e52a8eSRaja Mani 2635d1e52a8eSRaja Mani /* Thermal throttling capability. 2636d1e52a8eSRaja Mani * 1 - Capable of thermal throttling 2637d1e52a8eSRaja Mani * 0 - Not capable of thermal throttling 2638d1e52a8eSRaja Mani */ 2639d1e52a8eSRaja Mani __le32 tt_support; 2640d1e52a8eSRaja Mani 2641d1e52a8eSRaja Mani /* ATF configuration. 2642d1e52a8eSRaja Mani * 1 - Enable ATF 2643d1e52a8eSRaja Mani * 0 - Disable ATF 2644d1e52a8eSRaja Mani */ 2645d1e52a8eSRaja Mani __le32 atf_config; 2646d1e52a8eSRaja Mani 2647d1e52a8eSRaja Mani /* Configure padding to manage IP header un-alignment 2648d1e52a8eSRaja Mani * 1 - Enable padding 2649d1e52a8eSRaja Mani * 0 - Disable padding 2650d1e52a8eSRaja Mani */ 2651d1e52a8eSRaja Mani __le32 iphdr_pad_config; 2652d1e52a8eSRaja Mani 2653d1e52a8eSRaja Mani /* qwrap configuration 2654d1e52a8eSRaja Mani * 1 - This is qwrap configuration 2655d1e52a8eSRaja Mani * 0 - This is not qwrap 2656d1e52a8eSRaja Mani */ 2657d1e52a8eSRaja Mani __le32 qwrap_config; 2658d1e52a8eSRaja Mani } __packed; 2659d1e52a8eSRaja Mani 26605e3dd157SKalle Valo /* strucutre describing host memory chunk. */ 26615e3dd157SKalle Valo struct host_memory_chunk { 26625e3dd157SKalle Valo /* id of the request that is passed up in service ready */ 26635e3dd157SKalle Valo __le32 req_id; 26645e3dd157SKalle Valo /* the physical address the memory chunk */ 26655e3dd157SKalle Valo __le32 ptr; 26665e3dd157SKalle Valo /* size of the chunk */ 26675e3dd157SKalle Valo __le32 size; 26685e3dd157SKalle Valo } __packed; 26695e3dd157SKalle Valo 2670cf9fca8fSMichal Kazior struct wmi_host_mem_chunks { 2671cf9fca8fSMichal Kazior __le32 count; 2672cf9fca8fSMichal Kazior /* some fw revisions require at least 1 chunk regardless of count */ 2673cf9fca8fSMichal Kazior struct host_memory_chunk items[1]; 2674cf9fca8fSMichal Kazior } __packed; 2675cf9fca8fSMichal Kazior 26765e3dd157SKalle Valo struct wmi_init_cmd { 26775e3dd157SKalle Valo struct wmi_resource_config resource_config; 2678cf9fca8fSMichal Kazior struct wmi_host_mem_chunks mem_chunks; 26795e3dd157SKalle Valo } __packed; 26805e3dd157SKalle Valo 268112b2b9e3SBartosz Markowski /* _10x stucture is from 10.X FW API */ 268212b2b9e3SBartosz Markowski struct wmi_init_cmd_10x { 268312b2b9e3SBartosz Markowski struct wmi_resource_config_10x resource_config; 2684cf9fca8fSMichal Kazior struct wmi_host_mem_chunks mem_chunks; 268512b2b9e3SBartosz Markowski } __packed; 268612b2b9e3SBartosz Markowski 268724c88f78SMichal Kazior struct wmi_init_cmd_10_2 { 268824c88f78SMichal Kazior struct wmi_resource_config_10_2 resource_config; 2689cf9fca8fSMichal Kazior struct wmi_host_mem_chunks mem_chunks; 269024c88f78SMichal Kazior } __packed; 269124c88f78SMichal Kazior 2692d1e52a8eSRaja Mani struct wmi_init_cmd_10_4 { 2693d1e52a8eSRaja Mani struct wmi_resource_config_10_4 resource_config; 2694d1e52a8eSRaja Mani struct wmi_host_mem_chunks mem_chunks; 2695d1e52a8eSRaja Mani } __packed; 2696d1e52a8eSRaja Mani 269724c88f78SMichal Kazior struct wmi_chan_list_entry { 269824c88f78SMichal Kazior __le16 freq; 269924c88f78SMichal Kazior u8 phy_mode; /* valid for 10.2 only */ 270024c88f78SMichal Kazior u8 reserved; 270124c88f78SMichal Kazior } __packed; 270224c88f78SMichal Kazior 27035e3dd157SKalle Valo /* TLV for channel list */ 27045e3dd157SKalle Valo struct wmi_chan_list { 27055e3dd157SKalle Valo __le32 tag; /* WMI_CHAN_LIST_TAG */ 27065e3dd157SKalle Valo __le32 num_chan; 270724c88f78SMichal Kazior struct wmi_chan_list_entry channel_list[0]; 27085e3dd157SKalle Valo } __packed; 27095e3dd157SKalle Valo 27105e3dd157SKalle Valo struct wmi_bssid_list { 27115e3dd157SKalle Valo __le32 tag; /* WMI_BSSID_LIST_TAG */ 27125e3dd157SKalle Valo __le32 num_bssid; 27135e3dd157SKalle Valo struct wmi_mac_addr bssid_list[0]; 27145e3dd157SKalle Valo } __packed; 27155e3dd157SKalle Valo 27165e3dd157SKalle Valo struct wmi_ie_data { 27175e3dd157SKalle Valo __le32 tag; /* WMI_IE_TAG */ 27185e3dd157SKalle Valo __le32 ie_len; 27195e3dd157SKalle Valo u8 ie_data[0]; 27205e3dd157SKalle Valo } __packed; 27215e3dd157SKalle Valo 27225e3dd157SKalle Valo struct wmi_ssid { 27235e3dd157SKalle Valo __le32 ssid_len; 27245e3dd157SKalle Valo u8 ssid[32]; 27255e3dd157SKalle Valo } __packed; 27265e3dd157SKalle Valo 27275e3dd157SKalle Valo struct wmi_ssid_list { 27285e3dd157SKalle Valo __le32 tag; /* WMI_SSID_LIST_TAG */ 27295e3dd157SKalle Valo __le32 num_ssids; 27305e3dd157SKalle Valo struct wmi_ssid ssids[0]; 27315e3dd157SKalle Valo } __packed; 27325e3dd157SKalle Valo 27335e3dd157SKalle Valo /* prefix used by scan requestor ids on the host */ 27345e3dd157SKalle Valo #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 27355e3dd157SKalle Valo 27365e3dd157SKalle Valo /* prefix used by scan request ids generated on the host */ 27375e3dd157SKalle Valo /* host cycles through the lower 12 bits to generate ids */ 27385e3dd157SKalle Valo #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 27395e3dd157SKalle Valo 27405e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_SSID 16 27415e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_BSSID 4 27425e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 27435e3dd157SKalle Valo 2744dcca0bdbSMichal Kazior /* Values lower than this may be refused by some firmware revisions with a scan 2745dcca0bdbSMichal Kazior * completion with a timedout reason. 2746dcca0bdbSMichal Kazior */ 2747dcca0bdbSMichal Kazior #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 2748dcca0bdbSMichal Kazior 27495e3dd157SKalle Valo /* Scan priority numbers must be sequential, starting with 0 */ 27505e3dd157SKalle Valo enum wmi_scan_priority { 27515e3dd157SKalle Valo WMI_SCAN_PRIORITY_VERY_LOW = 0, 27525e3dd157SKalle Valo WMI_SCAN_PRIORITY_LOW, 27535e3dd157SKalle Valo WMI_SCAN_PRIORITY_MEDIUM, 27545e3dd157SKalle Valo WMI_SCAN_PRIORITY_HIGH, 27555e3dd157SKalle Valo WMI_SCAN_PRIORITY_VERY_HIGH, 27565e3dd157SKalle Valo WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 27575e3dd157SKalle Valo }; 27585e3dd157SKalle Valo 2759a6aa5da3SMichal Kazior struct wmi_start_scan_common { 27605e3dd157SKalle Valo /* Scan ID */ 27615e3dd157SKalle Valo __le32 scan_id; 27625e3dd157SKalle Valo /* Scan requestor ID */ 27635e3dd157SKalle Valo __le32 scan_req_id; 27645e3dd157SKalle Valo /* VDEV id(interface) that is requesting scan */ 27655e3dd157SKalle Valo __le32 vdev_id; 27665e3dd157SKalle Valo /* Scan Priority, input to scan scheduler */ 27675e3dd157SKalle Valo __le32 scan_priority; 27685e3dd157SKalle Valo /* Scan events subscription */ 27695e3dd157SKalle Valo __le32 notify_scan_events; 27705e3dd157SKalle Valo /* dwell time in msec on active channels */ 27715e3dd157SKalle Valo __le32 dwell_time_active; 27725e3dd157SKalle Valo /* dwell time in msec on passive channels */ 27735e3dd157SKalle Valo __le32 dwell_time_passive; 27745e3dd157SKalle Valo /* 27755e3dd157SKalle Valo * min time in msec on the BSS channel,only valid if atleast one 27765e3dd157SKalle Valo * VDEV is active 27775e3dd157SKalle Valo */ 27785e3dd157SKalle Valo __le32 min_rest_time; 27795e3dd157SKalle Valo /* 27805e3dd157SKalle Valo * max rest time in msec on the BSS channel,only valid if at least 27815e3dd157SKalle Valo * one VDEV is active 27825e3dd157SKalle Valo */ 27835e3dd157SKalle Valo /* 27845e3dd157SKalle Valo * the scanner will rest on the bss channel at least min_rest_time 27855e3dd157SKalle Valo * after min_rest_time the scanner will start checking for tx/rx 27865e3dd157SKalle Valo * activity on all VDEVs. if there is no activity the scanner will 27875e3dd157SKalle Valo * switch to off channel. if there is activity the scanner will let 27885e3dd157SKalle Valo * the radio on the bss channel until max_rest_time expires.at 27895e3dd157SKalle Valo * max_rest_time scanner will switch to off channel irrespective of 27905e3dd157SKalle Valo * activity. activity is determined by the idle_time parameter. 27915e3dd157SKalle Valo */ 27925e3dd157SKalle Valo __le32 max_rest_time; 27935e3dd157SKalle Valo /* 27945e3dd157SKalle Valo * time before sending next set of probe requests. 27955e3dd157SKalle Valo * The scanner keeps repeating probe requests transmission with 27965e3dd157SKalle Valo * period specified by repeat_probe_time. 27975e3dd157SKalle Valo * The number of probe requests specified depends on the ssid_list 27985e3dd157SKalle Valo * and bssid_list 27995e3dd157SKalle Valo */ 28005e3dd157SKalle Valo __le32 repeat_probe_time; 28015e3dd157SKalle Valo /* time in msec between 2 consequetive probe requests with in a set. */ 28025e3dd157SKalle Valo __le32 probe_spacing_time; 28035e3dd157SKalle Valo /* 28045e3dd157SKalle Valo * data inactivity time in msec on bss channel that will be used by 28055e3dd157SKalle Valo * scanner for measuring the inactivity. 28065e3dd157SKalle Valo */ 28075e3dd157SKalle Valo __le32 idle_time; 28085e3dd157SKalle Valo /* maximum time in msec allowed for scan */ 28095e3dd157SKalle Valo __le32 max_scan_time; 28105e3dd157SKalle Valo /* 28115e3dd157SKalle Valo * delay in msec before sending first probe request after switching 28125e3dd157SKalle Valo * to a channel 28135e3dd157SKalle Valo */ 28145e3dd157SKalle Valo __le32 probe_delay; 28155e3dd157SKalle Valo /* Scan control flags */ 28165e3dd157SKalle Valo __le32 scan_ctrl_flags; 2817a6aa5da3SMichal Kazior } __packed; 28185e3dd157SKalle Valo 2819a6aa5da3SMichal Kazior struct wmi_start_scan_tlvs { 2820a6aa5da3SMichal Kazior /* TLV parameters. These includes channel list, ssid list, bssid list, 2821a6aa5da3SMichal Kazior * extra ies. 28225e3dd157SKalle Valo */ 2823a6aa5da3SMichal Kazior u8 tlvs[0]; 2824a6aa5da3SMichal Kazior } __packed; 2825a6aa5da3SMichal Kazior 2826a6aa5da3SMichal Kazior struct wmi_start_scan_cmd { 2827a6aa5da3SMichal Kazior struct wmi_start_scan_common common; 2828a6aa5da3SMichal Kazior __le32 burst_duration_ms; 2829a6aa5da3SMichal Kazior struct wmi_start_scan_tlvs tlvs; 28305e3dd157SKalle Valo } __packed; 28315e3dd157SKalle Valo 283289b7e766SBartosz Markowski /* This is the definition from 10.X firmware branch */ 2833a6aa5da3SMichal Kazior struct wmi_10x_start_scan_cmd { 2834a6aa5da3SMichal Kazior struct wmi_start_scan_common common; 2835a6aa5da3SMichal Kazior struct wmi_start_scan_tlvs tlvs; 283689b7e766SBartosz Markowski } __packed; 283789b7e766SBartosz Markowski 28385e3dd157SKalle Valo struct wmi_ssid_arg { 28395e3dd157SKalle Valo int len; 28405e3dd157SKalle Valo const u8 *ssid; 28415e3dd157SKalle Valo }; 28425e3dd157SKalle Valo 28435e3dd157SKalle Valo struct wmi_bssid_arg { 28445e3dd157SKalle Valo const u8 *bssid; 28455e3dd157SKalle Valo }; 28465e3dd157SKalle Valo 28475e3dd157SKalle Valo struct wmi_start_scan_arg { 28485e3dd157SKalle Valo u32 scan_id; 28495e3dd157SKalle Valo u32 scan_req_id; 28505e3dd157SKalle Valo u32 vdev_id; 28515e3dd157SKalle Valo u32 scan_priority; 28525e3dd157SKalle Valo u32 notify_scan_events; 28535e3dd157SKalle Valo u32 dwell_time_active; 28545e3dd157SKalle Valo u32 dwell_time_passive; 28555e3dd157SKalle Valo u32 min_rest_time; 28565e3dd157SKalle Valo u32 max_rest_time; 28575e3dd157SKalle Valo u32 repeat_probe_time; 28585e3dd157SKalle Valo u32 probe_spacing_time; 28595e3dd157SKalle Valo u32 idle_time; 28605e3dd157SKalle Valo u32 max_scan_time; 28615e3dd157SKalle Valo u32 probe_delay; 28625e3dd157SKalle Valo u32 scan_ctrl_flags; 2863dbd3f9f3SMichal Kazior u32 burst_duration_ms; 28645e3dd157SKalle Valo 28655e3dd157SKalle Valo u32 ie_len; 28665e3dd157SKalle Valo u32 n_channels; 28675e3dd157SKalle Valo u32 n_ssids; 28685e3dd157SKalle Valo u32 n_bssids; 28695e3dd157SKalle Valo 28705e3dd157SKalle Valo u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN]; 287124c88f78SMichal Kazior u16 channels[64]; 28725e3dd157SKalle Valo struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID]; 28735e3dd157SKalle Valo struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID]; 28745e3dd157SKalle Valo }; 28755e3dd157SKalle Valo 28765e3dd157SKalle Valo /* scan control flags */ 28775e3dd157SKalle Valo 28785e3dd157SKalle Valo /* passively scan all channels including active channels */ 28795e3dd157SKalle Valo #define WMI_SCAN_FLAG_PASSIVE 0x1 28805e3dd157SKalle Valo /* add wild card ssid probe request even though ssid_list is specified. */ 28815e3dd157SKalle Valo #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 28825e3dd157SKalle Valo /* add cck rates to rates/xrate ie for the generated probe request */ 28835e3dd157SKalle Valo #define WMI_SCAN_ADD_CCK_RATES 0x4 28845e3dd157SKalle Valo /* add ofdm rates to rates/xrate ie for the generated probe request */ 28855e3dd157SKalle Valo #define WMI_SCAN_ADD_OFDM_RATES 0x8 28865e3dd157SKalle Valo /* To enable indication of Chan load and Noise floor to host */ 28875e3dd157SKalle Valo #define WMI_SCAN_CHAN_STAT_EVENT 0x10 28885e3dd157SKalle Valo /* Filter Probe request frames */ 28895e3dd157SKalle Valo #define WMI_SCAN_FILTER_PROBE_REQ 0x20 28905e3dd157SKalle Valo /* When set, DFS channels will not be scanned */ 28915e3dd157SKalle Valo #define WMI_SCAN_BYPASS_DFS_CHN 0x40 28925e3dd157SKalle Valo /* Different FW scan engine may choose to bail out on errors. 28935e3dd157SKalle Valo * Allow the driver to have influence over that. */ 28945e3dd157SKalle Valo #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 28955e3dd157SKalle Valo 28965e3dd157SKalle Valo /* WMI_SCAN_CLASS_MASK must be the same value as IEEE80211_SCAN_CLASS_MASK */ 28975e3dd157SKalle Valo #define WMI_SCAN_CLASS_MASK 0xFF000000 28985e3dd157SKalle Valo 28995e3dd157SKalle Valo enum wmi_stop_scan_type { 29005e3dd157SKalle Valo WMI_SCAN_STOP_ONE = 0x00000000, /* stop by scan_id */ 29015e3dd157SKalle Valo WMI_SCAN_STOP_VDEV_ALL = 0x01000000, /* stop by vdev_id */ 29025e3dd157SKalle Valo WMI_SCAN_STOP_ALL = 0x04000000, /* stop all scans */ 29035e3dd157SKalle Valo }; 29045e3dd157SKalle Valo 29055e3dd157SKalle Valo struct wmi_stop_scan_cmd { 29065e3dd157SKalle Valo __le32 scan_req_id; 29075e3dd157SKalle Valo __le32 scan_id; 29085e3dd157SKalle Valo __le32 req_type; 29095e3dd157SKalle Valo __le32 vdev_id; 29105e3dd157SKalle Valo } __packed; 29115e3dd157SKalle Valo 29125e3dd157SKalle Valo struct wmi_stop_scan_arg { 29135e3dd157SKalle Valo u32 req_id; 29145e3dd157SKalle Valo enum wmi_stop_scan_type req_type; 29155e3dd157SKalle Valo union { 29165e3dd157SKalle Valo u32 scan_id; 29175e3dd157SKalle Valo u32 vdev_id; 29185e3dd157SKalle Valo } u; 29195e3dd157SKalle Valo }; 29205e3dd157SKalle Valo 29215e3dd157SKalle Valo struct wmi_scan_chan_list_cmd { 29225e3dd157SKalle Valo __le32 num_scan_chans; 29235e3dd157SKalle Valo struct wmi_channel chan_info[0]; 29245e3dd157SKalle Valo } __packed; 29255e3dd157SKalle Valo 29265e3dd157SKalle Valo struct wmi_scan_chan_list_arg { 29275e3dd157SKalle Valo u32 n_channels; 29285e3dd157SKalle Valo struct wmi_channel_arg *channels; 29295e3dd157SKalle Valo }; 29305e3dd157SKalle Valo 29315e3dd157SKalle Valo enum wmi_bss_filter { 29325e3dd157SKalle Valo WMI_BSS_FILTER_NONE = 0, /* no beacons forwarded */ 29335e3dd157SKalle Valo WMI_BSS_FILTER_ALL, /* all beacons forwarded */ 29345e3dd157SKalle Valo WMI_BSS_FILTER_PROFILE, /* only beacons matching profile */ 29355e3dd157SKalle Valo WMI_BSS_FILTER_ALL_BUT_PROFILE, /* all but beacons matching profile */ 29365e3dd157SKalle Valo WMI_BSS_FILTER_CURRENT_BSS, /* only beacons matching current BSS */ 29375e3dd157SKalle Valo WMI_BSS_FILTER_ALL_BUT_BSS, /* all but beacons matching BSS */ 29385e3dd157SKalle Valo WMI_BSS_FILTER_PROBED_SSID, /* beacons matching probed ssid */ 29395e3dd157SKalle Valo WMI_BSS_FILTER_LAST_BSS, /* marker only */ 29405e3dd157SKalle Valo }; 29415e3dd157SKalle Valo 29425e3dd157SKalle Valo enum wmi_scan_event_type { 2943b2297baaSRaja Mani WMI_SCAN_EVENT_STARTED = BIT(0), 2944b2297baaSRaja Mani WMI_SCAN_EVENT_COMPLETED = BIT(1), 2945b2297baaSRaja Mani WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 2946b2297baaSRaja Mani WMI_SCAN_EVENT_FOREIGN_CHANNEL = BIT(3), 2947b2297baaSRaja Mani WMI_SCAN_EVENT_DEQUEUED = BIT(4), 2948b2297baaSRaja Mani /* possibly by high-prio scan */ 2949b2297baaSRaja Mani WMI_SCAN_EVENT_PREEMPTED = BIT(5), 2950b2297baaSRaja Mani WMI_SCAN_EVENT_START_FAILED = BIT(6), 2951b2297baaSRaja Mani WMI_SCAN_EVENT_RESTARTED = BIT(7), 2952b2297baaSRaja Mani WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8), 2953b2297baaSRaja Mani WMI_SCAN_EVENT_MAX = BIT(15), 29545e3dd157SKalle Valo }; 29555e3dd157SKalle Valo 29565e3dd157SKalle Valo enum wmi_scan_completion_reason { 29575e3dd157SKalle Valo WMI_SCAN_REASON_COMPLETED, 29585e3dd157SKalle Valo WMI_SCAN_REASON_CANCELLED, 29595e3dd157SKalle Valo WMI_SCAN_REASON_PREEMPTED, 29605e3dd157SKalle Valo WMI_SCAN_REASON_TIMEDOUT, 2961b2297baaSRaja Mani WMI_SCAN_REASON_INTERNAL_FAILURE, 29625e3dd157SKalle Valo WMI_SCAN_REASON_MAX, 29635e3dd157SKalle Valo }; 29645e3dd157SKalle Valo 29655e3dd157SKalle Valo struct wmi_scan_event { 29665e3dd157SKalle Valo __le32 event_type; /* %WMI_SCAN_EVENT_ */ 29675e3dd157SKalle Valo __le32 reason; /* %WMI_SCAN_REASON_ */ 29685e3dd157SKalle Valo __le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 29695e3dd157SKalle Valo __le32 scan_req_id; 29705e3dd157SKalle Valo __le32 scan_id; 29715e3dd157SKalle Valo __le32 vdev_id; 29725e3dd157SKalle Valo } __packed; 29735e3dd157SKalle Valo 29745e3dd157SKalle Valo /* 29755e3dd157SKalle Valo * This defines how much headroom is kept in the 29765e3dd157SKalle Valo * receive frame between the descriptor and the 29775e3dd157SKalle Valo * payload, in order for the WMI PHY error and 29785e3dd157SKalle Valo * management handler to insert header contents. 29795e3dd157SKalle Valo * 29805e3dd157SKalle Valo * This is in bytes. 29815e3dd157SKalle Valo */ 29825e3dd157SKalle Valo #define WMI_MGMT_RX_HDR_HEADROOM 52 29835e3dd157SKalle Valo 29845e3dd157SKalle Valo /* 29855e3dd157SKalle Valo * This event will be used for sending scan results 29865e3dd157SKalle Valo * as well as rx mgmt frames to the host. The rx buffer 29875e3dd157SKalle Valo * will be sent as part of this WMI event. It would be a 29885e3dd157SKalle Valo * good idea to pass all the fields in the RX status 29895e3dd157SKalle Valo * descriptor up to the host. 29905e3dd157SKalle Valo */ 29910d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v1 { 29925e3dd157SKalle Valo __le32 channel; 29935e3dd157SKalle Valo __le32 snr; 29945e3dd157SKalle Valo __le32 rate; 29955e3dd157SKalle Valo __le32 phy_mode; 29965e3dd157SKalle Valo __le32 buf_len; 29975e3dd157SKalle Valo __le32 status; /* %WMI_RX_STATUS_ */ 29985e3dd157SKalle Valo } __packed; 29995e3dd157SKalle Valo 30000d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v2 { 30010d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v1 v1; 30020d9b0438SMichal Kazior __le32 rssi_ctl[4]; 30030d9b0438SMichal Kazior } __packed; 30040d9b0438SMichal Kazior 30050d9b0438SMichal Kazior struct wmi_mgmt_rx_event_v1 { 30060d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v1 hdr; 30070d9b0438SMichal Kazior u8 buf[0]; 30080d9b0438SMichal Kazior } __packed; 30090d9b0438SMichal Kazior 30100d9b0438SMichal Kazior struct wmi_mgmt_rx_event_v2 { 30110d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v2 hdr; 30125e3dd157SKalle Valo u8 buf[0]; 30135e3dd157SKalle Valo } __packed; 30145e3dd157SKalle Valo 30151c092961SRaja Mani struct wmi_10_4_mgmt_rx_hdr { 30161c092961SRaja Mani __le32 channel; 30171c092961SRaja Mani __le32 snr; 30181c092961SRaja Mani u8 rssi_ctl[4]; 30191c092961SRaja Mani __le32 rate; 30201c092961SRaja Mani __le32 phy_mode; 30211c092961SRaja Mani __le32 buf_len; 30221c092961SRaja Mani __le32 status; 30231c092961SRaja Mani } __packed; 30241c092961SRaja Mani 30251c092961SRaja Mani struct wmi_10_4_mgmt_rx_event { 30261c092961SRaja Mani struct wmi_10_4_mgmt_rx_hdr hdr; 30271c092961SRaja Mani u8 buf[0]; 30281c092961SRaja Mani } __packed; 30291c092961SRaja Mani 30305e3dd157SKalle Valo #define WMI_RX_STATUS_OK 0x00 30315e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_CRC 0x01 30325e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_DECRYPT 0x08 30335e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_MIC 0x10 30345e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 30355e3dd157SKalle Valo 3036991adf71SRaja Mani #define PHY_ERROR_GEN_SPECTRAL_SCAN 0x26 3037991adf71SRaja Mani #define PHY_ERROR_GEN_FALSE_RADAR_EXT 0x24 3038991adf71SRaja Mani #define PHY_ERROR_GEN_RADAR 0x05 3039991adf71SRaja Mani 30402b0a2e0dSRaja Mani #define PHY_ERROR_10_4_RADAR_MASK 0x4 30412b0a2e0dSRaja Mani #define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK 0x4000000 30422b0a2e0dSRaja Mani 3043991adf71SRaja Mani enum phy_err_type { 3044991adf71SRaja Mani PHY_ERROR_UNKNOWN, 3045991adf71SRaja Mani PHY_ERROR_SPECTRAL_SCAN, 3046991adf71SRaja Mani PHY_ERROR_FALSE_RADAR_EXT, 3047991adf71SRaja Mani PHY_ERROR_RADAR 3048991adf71SRaja Mani }; 30499702c686SJanusz Dziedzic 30502332d0aeSMichal Kazior struct wmi_phyerr { 30515e3dd157SKalle Valo __le32 tsf_timestamp; 30525e3dd157SKalle Valo __le16 freq1; 30535e3dd157SKalle Valo __le16 freq2; 30545e3dd157SKalle Valo u8 rssi_combined; 30555e3dd157SKalle Valo u8 chan_width_mhz; 30565e3dd157SKalle Valo u8 phy_err_code; 30575e3dd157SKalle Valo u8 rsvd0; 30582332d0aeSMichal Kazior __le32 rssi_chains[4]; 30592332d0aeSMichal Kazior __le16 nf_chains[4]; 30605e3dd157SKalle Valo __le32 buf_len; 30612332d0aeSMichal Kazior u8 buf[0]; 30625e3dd157SKalle Valo } __packed; 30635e3dd157SKalle Valo 30642332d0aeSMichal Kazior struct wmi_phyerr_event { 30652332d0aeSMichal Kazior __le32 num_phyerrs; 30665e3dd157SKalle Valo __le32 tsf_l32; 30675e3dd157SKalle Valo __le32 tsf_u32; 30682332d0aeSMichal Kazior struct wmi_phyerr phyerrs[0]; 30695e3dd157SKalle Valo } __packed; 30705e3dd157SKalle Valo 30712b0a2e0dSRaja Mani struct wmi_10_4_phyerr_event { 30722b0a2e0dSRaja Mani __le32 tsf_l32; 30732b0a2e0dSRaja Mani __le32 tsf_u32; 30742b0a2e0dSRaja Mani __le16 freq1; 30752b0a2e0dSRaja Mani __le16 freq2; 30762b0a2e0dSRaja Mani u8 rssi_combined; 30772b0a2e0dSRaja Mani u8 chan_width_mhz; 30782b0a2e0dSRaja Mani u8 phy_err_code; 30792b0a2e0dSRaja Mani u8 rsvd0; 30802b0a2e0dSRaja Mani __le32 rssi_chains[4]; 30812b0a2e0dSRaja Mani __le16 nf_chains[4]; 30822b0a2e0dSRaja Mani __le32 phy_err_mask[2]; 30832b0a2e0dSRaja Mani __le32 tsf_timestamp; 30842b0a2e0dSRaja Mani __le32 buf_len; 30852b0a2e0dSRaja Mani u8 buf[0]; 30862b0a2e0dSRaja Mani } __packed; 30872b0a2e0dSRaja Mani 30889702c686SJanusz Dziedzic #define PHYERR_TLV_SIG 0xBB 30899702c686SJanusz Dziedzic #define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB 30909702c686SJanusz Dziedzic #define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8 3091855aed12SSimon Wunderlich #define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT 0xF9 30929702c686SJanusz Dziedzic 30939702c686SJanusz Dziedzic struct phyerr_radar_report { 30949702c686SJanusz Dziedzic __le32 reg0; /* RADAR_REPORT_REG0_* */ 30959702c686SJanusz Dziedzic __le32 reg1; /* REDAR_REPORT_REG1_* */ 30969702c686SJanusz Dziedzic } __packed; 30979702c686SJanusz Dziedzic 30989702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000 30999702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31 31009702c686SJanusz Dziedzic 31019702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000 31029702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30 31039702c686SJanusz Dziedzic 31049702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000 31059702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20 31069702c686SJanusz Dziedzic 31079702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000 31089702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16 31099702c686SJanusz Dziedzic 31109702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00 31119702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10 31129702c686SJanusz Dziedzic 31139702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF 31149702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0 31159702c686SJanusz Dziedzic 31169702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000 31179702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31 31189702c686SJanusz Dziedzic 31199702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000 31209702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24 31219702c686SJanusz Dziedzic 31229702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000 31239702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16 31249702c686SJanusz Dziedzic 31259702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00 31269702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8 31279702c686SJanusz Dziedzic 31289702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF 31299702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_DUR_LSB 0 31309702c686SJanusz Dziedzic 31319702c686SJanusz Dziedzic struct phyerr_fft_report { 31329702c686SJanusz Dziedzic __le32 reg0; /* SEARCH_FFT_REPORT_REG0_ * */ 31339702c686SJanusz Dziedzic __le32 reg1; /* SEARCH_FFT_REPORT_REG1_ * */ 31349702c686SJanusz Dziedzic } __packed; 31359702c686SJanusz Dziedzic 31369702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000 31379702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23 31389702c686SJanusz Dziedzic 31399702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000 31409702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14 31419702c686SJanusz Dziedzic 31429702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000 31439702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12 31449702c686SJanusz Dziedzic 31459702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF 31469702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0 31479702c686SJanusz Dziedzic 31489702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000 31499702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26 31509702c686SJanusz Dziedzic 31519702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000 31529702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18 31539702c686SJanusz Dziedzic 31549702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00 31559702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8 31569702c686SJanusz Dziedzic 31579702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF 31589702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0 31599702c686SJanusz Dziedzic 31609702c686SJanusz Dziedzic struct phyerr_tlv { 31619702c686SJanusz Dziedzic __le16 len; 31629702c686SJanusz Dziedzic u8 tag; 31639702c686SJanusz Dziedzic u8 sig; 31649702c686SJanusz Dziedzic } __packed; 31659702c686SJanusz Dziedzic 31669702c686SJanusz Dziedzic #define DFS_RSSI_POSSIBLY_FALSE 50 31679702c686SJanusz Dziedzic #define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40 31689702c686SJanusz Dziedzic 31695e3dd157SKalle Valo struct wmi_mgmt_tx_hdr { 31705e3dd157SKalle Valo __le32 vdev_id; 31715e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 31725e3dd157SKalle Valo __le32 tx_rate; 31735e3dd157SKalle Valo __le32 tx_power; 31745e3dd157SKalle Valo __le32 buf_len; 31755e3dd157SKalle Valo } __packed; 31765e3dd157SKalle Valo 31775e3dd157SKalle Valo struct wmi_mgmt_tx_cmd { 31785e3dd157SKalle Valo struct wmi_mgmt_tx_hdr hdr; 31795e3dd157SKalle Valo u8 buf[0]; 31805e3dd157SKalle Valo } __packed; 31815e3dd157SKalle Valo 31825e3dd157SKalle Valo struct wmi_echo_event { 31835e3dd157SKalle Valo __le32 value; 31845e3dd157SKalle Valo } __packed; 31855e3dd157SKalle Valo 31865e3dd157SKalle Valo struct wmi_echo_cmd { 31875e3dd157SKalle Valo __le32 value; 31885e3dd157SKalle Valo } __packed; 31895e3dd157SKalle Valo 31905e3dd157SKalle Valo struct wmi_pdev_set_regdomain_cmd { 31915e3dd157SKalle Valo __le32 reg_domain; 31925e3dd157SKalle Valo __le32 reg_domain_2G; 31935e3dd157SKalle Valo __le32 reg_domain_5G; 31945e3dd157SKalle Valo __le32 conformance_test_limit_2G; 31955e3dd157SKalle Valo __le32 conformance_test_limit_5G; 31965e3dd157SKalle Valo } __packed; 31975e3dd157SKalle Valo 3198821af6aeSMarek Puzyniak enum wmi_dfs_region { 3199821af6aeSMarek Puzyniak /* Uninitialized dfs domain */ 3200821af6aeSMarek Puzyniak WMI_UNINIT_DFS_DOMAIN = 0, 3201821af6aeSMarek Puzyniak 3202821af6aeSMarek Puzyniak /* FCC3 dfs domain */ 3203821af6aeSMarek Puzyniak WMI_FCC_DFS_DOMAIN = 1, 3204821af6aeSMarek Puzyniak 3205821af6aeSMarek Puzyniak /* ETSI dfs domain */ 3206821af6aeSMarek Puzyniak WMI_ETSI_DFS_DOMAIN = 2, 3207821af6aeSMarek Puzyniak 3208821af6aeSMarek Puzyniak /*Japan dfs domain */ 3209821af6aeSMarek Puzyniak WMI_MKK4_DFS_DOMAIN = 3, 3210821af6aeSMarek Puzyniak }; 3211821af6aeSMarek Puzyniak 3212821af6aeSMarek Puzyniak struct wmi_pdev_set_regdomain_cmd_10x { 3213821af6aeSMarek Puzyniak __le32 reg_domain; 3214821af6aeSMarek Puzyniak __le32 reg_domain_2G; 3215821af6aeSMarek Puzyniak __le32 reg_domain_5G; 3216821af6aeSMarek Puzyniak __le32 conformance_test_limit_2G; 3217821af6aeSMarek Puzyniak __le32 conformance_test_limit_5G; 3218821af6aeSMarek Puzyniak 3219821af6aeSMarek Puzyniak /* dfs domain from wmi_dfs_region */ 3220821af6aeSMarek Puzyniak __le32 dfs_domain; 3221821af6aeSMarek Puzyniak } __packed; 3222821af6aeSMarek Puzyniak 32235e3dd157SKalle Valo /* Command to set/unset chip in quiet mode */ 32245e3dd157SKalle Valo struct wmi_pdev_set_quiet_cmd { 32255e3dd157SKalle Valo /* period in TUs */ 32265e3dd157SKalle Valo __le32 period; 32275e3dd157SKalle Valo 32285e3dd157SKalle Valo /* duration in TUs */ 32295e3dd157SKalle Valo __le32 duration; 32305e3dd157SKalle Valo 32315e3dd157SKalle Valo /* offset in TUs */ 32325e3dd157SKalle Valo __le32 next_start; 32335e3dd157SKalle Valo 32345e3dd157SKalle Valo /* enable/disable */ 32355e3dd157SKalle Valo __le32 enabled; 32365e3dd157SKalle Valo } __packed; 32375e3dd157SKalle Valo 32385e3dd157SKalle Valo /* 32395e3dd157SKalle Valo * 802.11g protection mode. 32405e3dd157SKalle Valo */ 32415e3dd157SKalle Valo enum ath10k_protmode { 32425e3dd157SKalle Valo ATH10K_PROT_NONE = 0, /* no protection */ 32435e3dd157SKalle Valo ATH10K_PROT_CTSONLY = 1, /* CTS to self */ 32445e3dd157SKalle Valo ATH10K_PROT_RTSCTS = 2, /* RTS-CTS */ 32455e3dd157SKalle Valo }; 32465e3dd157SKalle Valo 3247e81bd104SMarek Kwaczynski enum wmi_rtscts_profile { 3248e81bd104SMarek Kwaczynski WMI_RTSCTS_FOR_NO_RATESERIES = 0, 3249e81bd104SMarek Kwaczynski WMI_RTSCTS_FOR_SECOND_RATESERIES, 3250e81bd104SMarek Kwaczynski WMI_RTSCTS_ACROSS_SW_RETRIES 3251e81bd104SMarek Kwaczynski }; 3252e81bd104SMarek Kwaczynski 3253e81bd104SMarek Kwaczynski #define WMI_RTSCTS_ENABLED 1 3254e81bd104SMarek Kwaczynski #define WMI_RTSCTS_SET_MASK 0x0f 3255e81bd104SMarek Kwaczynski #define WMI_RTSCTS_SET_LSB 0 3256e81bd104SMarek Kwaczynski 3257e81bd104SMarek Kwaczynski #define WMI_RTSCTS_PROFILE_MASK 0xf0 3258e81bd104SMarek Kwaczynski #define WMI_RTSCTS_PROFILE_LSB 4 3259e81bd104SMarek Kwaczynski 32605e3dd157SKalle Valo enum wmi_beacon_gen_mode { 32615e3dd157SKalle Valo WMI_BEACON_STAGGERED_MODE = 0, 32625e3dd157SKalle Valo WMI_BEACON_BURST_MODE = 1 32635e3dd157SKalle Valo }; 32645e3dd157SKalle Valo 32655e3dd157SKalle Valo enum wmi_csa_event_ies_present_flag { 32665e3dd157SKalle Valo WMI_CSA_IE_PRESENT = 0x00000001, 32675e3dd157SKalle Valo WMI_XCSA_IE_PRESENT = 0x00000002, 32685e3dd157SKalle Valo WMI_WBW_IE_PRESENT = 0x00000004, 32695e3dd157SKalle Valo WMI_CSWARP_IE_PRESENT = 0x00000008, 32705e3dd157SKalle Valo }; 32715e3dd157SKalle Valo 32725e3dd157SKalle Valo /* wmi CSA receive event from beacon frame */ 32735e3dd157SKalle Valo struct wmi_csa_event { 32745e3dd157SKalle Valo __le32 i_fc_dur; 32755e3dd157SKalle Valo /* Bit 0-15: FC */ 32765e3dd157SKalle Valo /* Bit 16-31: DUR */ 32775e3dd157SKalle Valo struct wmi_mac_addr i_addr1; 32785e3dd157SKalle Valo struct wmi_mac_addr i_addr2; 32795e3dd157SKalle Valo __le32 csa_ie[2]; 32805e3dd157SKalle Valo __le32 xcsa_ie[2]; 32815e3dd157SKalle Valo __le32 wb_ie[2]; 32825e3dd157SKalle Valo __le32 cswarp_ie; 32835e3dd157SKalle Valo __le32 ies_present_flag; /* wmi_csa_event_ies_present_flag */ 32845e3dd157SKalle Valo } __packed; 32855e3dd157SKalle Valo 32865e3dd157SKalle Valo /* the definition of different PDEV parameters */ 32875e3dd157SKalle Valo #define PDEV_DEFAULT_STATS_UPDATE_PERIOD 500 32885e3dd157SKalle Valo #define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500 32895e3dd157SKalle Valo #define PEER_DEFAULT_STATS_UPDATE_PERIOD 500 32905e3dd157SKalle Valo 3291226a339bSBartosz Markowski struct wmi_pdev_param_map { 3292226a339bSBartosz Markowski u32 tx_chain_mask; 3293226a339bSBartosz Markowski u32 rx_chain_mask; 3294226a339bSBartosz Markowski u32 txpower_limit2g; 3295226a339bSBartosz Markowski u32 txpower_limit5g; 3296226a339bSBartosz Markowski u32 txpower_scale; 3297226a339bSBartosz Markowski u32 beacon_gen_mode; 3298226a339bSBartosz Markowski u32 beacon_tx_mode; 3299226a339bSBartosz Markowski u32 resmgr_offchan_mode; 3300226a339bSBartosz Markowski u32 protection_mode; 3301226a339bSBartosz Markowski u32 dynamic_bw; 3302226a339bSBartosz Markowski u32 non_agg_sw_retry_th; 3303226a339bSBartosz Markowski u32 agg_sw_retry_th; 3304226a339bSBartosz Markowski u32 sta_kickout_th; 3305226a339bSBartosz Markowski u32 ac_aggrsize_scaling; 3306226a339bSBartosz Markowski u32 ltr_enable; 3307226a339bSBartosz Markowski u32 ltr_ac_latency_be; 3308226a339bSBartosz Markowski u32 ltr_ac_latency_bk; 3309226a339bSBartosz Markowski u32 ltr_ac_latency_vi; 3310226a339bSBartosz Markowski u32 ltr_ac_latency_vo; 3311226a339bSBartosz Markowski u32 ltr_ac_latency_timeout; 3312226a339bSBartosz Markowski u32 ltr_sleep_override; 3313226a339bSBartosz Markowski u32 ltr_rx_override; 3314226a339bSBartosz Markowski u32 ltr_tx_activity_timeout; 3315226a339bSBartosz Markowski u32 l1ss_enable; 3316226a339bSBartosz Markowski u32 dsleep_enable; 3317226a339bSBartosz Markowski u32 pcielp_txbuf_flush; 3318226a339bSBartosz Markowski u32 pcielp_txbuf_watermark; 3319226a339bSBartosz Markowski u32 pcielp_txbuf_tmo_en; 3320226a339bSBartosz Markowski u32 pcielp_txbuf_tmo_value; 3321226a339bSBartosz Markowski u32 pdev_stats_update_period; 3322226a339bSBartosz Markowski u32 vdev_stats_update_period; 3323226a339bSBartosz Markowski u32 peer_stats_update_period; 3324226a339bSBartosz Markowski u32 bcnflt_stats_update_period; 3325226a339bSBartosz Markowski u32 pmf_qos; 3326226a339bSBartosz Markowski u32 arp_ac_override; 3327226a339bSBartosz Markowski u32 dcs; 3328226a339bSBartosz Markowski u32 ani_enable; 3329226a339bSBartosz Markowski u32 ani_poll_period; 3330226a339bSBartosz Markowski u32 ani_listen_period; 3331226a339bSBartosz Markowski u32 ani_ofdm_level; 3332226a339bSBartosz Markowski u32 ani_cck_level; 3333226a339bSBartosz Markowski u32 dyntxchain; 3334226a339bSBartosz Markowski u32 proxy_sta; 3335226a339bSBartosz Markowski u32 idle_ps_config; 3336226a339bSBartosz Markowski u32 power_gating_sleep; 3337226a339bSBartosz Markowski u32 fast_channel_reset; 3338226a339bSBartosz Markowski u32 burst_dur; 3339226a339bSBartosz Markowski u32 burst_enable; 3340a7bd3e99SPeter Oh u32 cal_period; 3341d86561ffSRaja Mani u32 aggr_burst; 3342d86561ffSRaja Mani u32 rx_decap_mode; 3343d86561ffSRaja Mani u32 smart_antenna_default_antenna; 3344d86561ffSRaja Mani u32 igmpmld_override; 3345d86561ffSRaja Mani u32 igmpmld_tid; 3346d86561ffSRaja Mani u32 antenna_gain; 3347d86561ffSRaja Mani u32 rx_filter; 3348d86561ffSRaja Mani u32 set_mcast_to_ucast_tid; 3349d86561ffSRaja Mani u32 proxy_sta_mode; 3350d86561ffSRaja Mani u32 set_mcast2ucast_mode; 3351d86561ffSRaja Mani u32 set_mcast2ucast_buffer; 3352d86561ffSRaja Mani u32 remove_mcast2ucast_buffer; 3353d86561ffSRaja Mani u32 peer_sta_ps_statechg_enable; 3354d86561ffSRaja Mani u32 igmpmld_ac_override; 3355d86561ffSRaja Mani u32 block_interbss; 3356d86561ffSRaja Mani u32 set_disable_reset_cmdid; 3357d86561ffSRaja Mani u32 set_msdu_ttl_cmdid; 3358d86561ffSRaja Mani u32 set_ppdu_duration_cmdid; 3359d86561ffSRaja Mani u32 txbf_sound_period_cmdid; 3360d86561ffSRaja Mani u32 set_promisc_mode_cmdid; 3361d86561ffSRaja Mani u32 set_burst_mode_cmdid; 3362d86561ffSRaja Mani u32 en_stats; 3363d86561ffSRaja Mani u32 mu_group_policy; 3364d86561ffSRaja Mani u32 noise_detection; 3365d86561ffSRaja Mani u32 noise_threshold; 3366d86561ffSRaja Mani u32 dpd_enable; 3367d86561ffSRaja Mani u32 set_mcast_bcast_echo; 3368d86561ffSRaja Mani u32 atf_strict_sch; 3369d86561ffSRaja Mani u32 atf_sched_duration; 3370d86561ffSRaja Mani u32 ant_plzn; 3371d86561ffSRaja Mani u32 mgmt_retry_limit; 3372d86561ffSRaja Mani u32 sensitivity_level; 3373d86561ffSRaja Mani u32 signed_txpower_2g; 3374d86561ffSRaja Mani u32 signed_txpower_5g; 3375d86561ffSRaja Mani u32 enable_per_tid_amsdu; 3376d86561ffSRaja Mani u32 enable_per_tid_ampdu; 3377d86561ffSRaja Mani u32 cca_threshold; 3378d86561ffSRaja Mani u32 rts_fixed_rate; 3379d86561ffSRaja Mani u32 pdev_reset; 3380d86561ffSRaja Mani u32 wapi_mbssid_offset; 3381d86561ffSRaja Mani u32 arp_srcaddr; 3382d86561ffSRaja Mani u32 arp_dstaddr; 3383226a339bSBartosz Markowski }; 3384226a339bSBartosz Markowski 3385226a339bSBartosz Markowski #define WMI_PDEV_PARAM_UNSUPPORTED 0 3386226a339bSBartosz Markowski 33875e3dd157SKalle Valo enum wmi_pdev_param { 3388d0e0a552SBen Greear /* TX chain mask */ 33895e3dd157SKalle Valo WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 3390d0e0a552SBen Greear /* RX chain mask */ 33915e3dd157SKalle Valo WMI_PDEV_PARAM_RX_CHAIN_MASK, 33925e3dd157SKalle Valo /* TX power limit for 2G Radio */ 33935e3dd157SKalle Valo WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 33945e3dd157SKalle Valo /* TX power limit for 5G Radio */ 33955e3dd157SKalle Valo WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 33965e3dd157SKalle Valo /* TX power scale */ 33975e3dd157SKalle Valo WMI_PDEV_PARAM_TXPOWER_SCALE, 33985e3dd157SKalle Valo /* Beacon generation mode . 0: host, 1: target */ 33995e3dd157SKalle Valo WMI_PDEV_PARAM_BEACON_GEN_MODE, 34005e3dd157SKalle Valo /* Beacon generation mode . 0: staggered 1: bursted */ 34015e3dd157SKalle Valo WMI_PDEV_PARAM_BEACON_TX_MODE, 34025e3dd157SKalle Valo /* 34035e3dd157SKalle Valo * Resource manager off chan mode . 34045e3dd157SKalle Valo * 0: turn off off chan mode. 1: turn on offchan mode 34055e3dd157SKalle Valo */ 34065e3dd157SKalle Valo WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 34075e3dd157SKalle Valo /* 34085e3dd157SKalle Valo * Protection mode: 34095e3dd157SKalle Valo * 0: no protection 1:use CTS-to-self 2: use RTS/CTS 34105e3dd157SKalle Valo */ 34115e3dd157SKalle Valo WMI_PDEV_PARAM_PROTECTION_MODE, 3412c4dd0d01SMichal Kazior /* 3413c4dd0d01SMichal Kazior * Dynamic bandwidth - 0: disable, 1: enable 3414c4dd0d01SMichal Kazior * 3415c4dd0d01SMichal Kazior * When enabled HW rate control tries different bandwidths when 3416c4dd0d01SMichal Kazior * retransmitting frames. 3417c4dd0d01SMichal Kazior */ 34185e3dd157SKalle Valo WMI_PDEV_PARAM_DYNAMIC_BW, 34195e3dd157SKalle Valo /* Non aggregrate/ 11g sw retry threshold.0-disable */ 34205e3dd157SKalle Valo WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 34215e3dd157SKalle Valo /* aggregrate sw retry threshold. 0-disable*/ 34225e3dd157SKalle Valo WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 34235e3dd157SKalle Valo /* Station kickout threshold (non of consecutive failures).0-disable */ 34245e3dd157SKalle Valo WMI_PDEV_PARAM_STA_KICKOUT_TH, 34255e3dd157SKalle Valo /* Aggerate size scaling configuration per AC */ 34265e3dd157SKalle Valo WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 34275e3dd157SKalle Valo /* LTR enable */ 34285e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_ENABLE, 34295e3dd157SKalle Valo /* LTR latency for BE, in us */ 34305e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 34315e3dd157SKalle Valo /* LTR latency for BK, in us */ 34325e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 34335e3dd157SKalle Valo /* LTR latency for VI, in us */ 34345e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 34355e3dd157SKalle Valo /* LTR latency for VO, in us */ 34365e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 34375e3dd157SKalle Valo /* LTR AC latency timeout, in ms */ 34385e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 34395e3dd157SKalle Valo /* LTR platform latency override, in us */ 34405e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 34415e3dd157SKalle Valo /* LTR-RX override, in us */ 34425e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 34435e3dd157SKalle Valo /* Tx activity timeout for LTR, in us */ 34445e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 34455e3dd157SKalle Valo /* L1SS state machine enable */ 34465e3dd157SKalle Valo WMI_PDEV_PARAM_L1SS_ENABLE, 34475e3dd157SKalle Valo /* Deep sleep state machine enable */ 34485e3dd157SKalle Valo WMI_PDEV_PARAM_DSLEEP_ENABLE, 34495e3dd157SKalle Valo /* RX buffering flush enable */ 34505e3dd157SKalle Valo WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 34515e3dd157SKalle Valo /* RX buffering matermark */ 34525e3dd157SKalle Valo WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 34535e3dd157SKalle Valo /* RX buffering timeout enable */ 34545e3dd157SKalle Valo WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 34555e3dd157SKalle Valo /* RX buffering timeout value */ 34565e3dd157SKalle Valo WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 34575e3dd157SKalle Valo /* pdev level stats update period in ms */ 34585e3dd157SKalle Valo WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 34595e3dd157SKalle Valo /* vdev level stats update period in ms */ 34605e3dd157SKalle Valo WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 34615e3dd157SKalle Valo /* peer level stats update period in ms */ 34625e3dd157SKalle Valo WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 34635e3dd157SKalle Valo /* beacon filter status update period */ 34645e3dd157SKalle Valo WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 34655e3dd157SKalle Valo /* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */ 34665e3dd157SKalle Valo WMI_PDEV_PARAM_PMF_QOS, 34675e3dd157SKalle Valo /* Access category on which ARP frames are sent */ 34685e3dd157SKalle Valo WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 34695e3dd157SKalle Valo /* DCS configuration */ 34705e3dd157SKalle Valo WMI_PDEV_PARAM_DCS, 34715e3dd157SKalle Valo /* Enable/Disable ANI on target */ 34725e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_ENABLE, 34735e3dd157SKalle Valo /* configure the ANI polling period */ 34745e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_POLL_PERIOD, 34755e3dd157SKalle Valo /* configure the ANI listening period */ 34765e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 34775e3dd157SKalle Valo /* configure OFDM immunity level */ 34785e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 34795e3dd157SKalle Valo /* configure CCK immunity level */ 34805e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_CCK_LEVEL, 34815e3dd157SKalle Valo /* Enable/Disable CDD for 1x1 STAs in rate control module */ 34825e3dd157SKalle Valo WMI_PDEV_PARAM_DYNTXCHAIN, 34835e3dd157SKalle Valo /* Enable/Disable proxy STA */ 34845e3dd157SKalle Valo WMI_PDEV_PARAM_PROXY_STA, 34855e3dd157SKalle Valo /* Enable/Disable low power state when all VDEVs are inactive/idle. */ 34865e3dd157SKalle Valo WMI_PDEV_PARAM_IDLE_PS_CONFIG, 34875e3dd157SKalle Valo /* Enable/Disable power gating sleep */ 34885e3dd157SKalle Valo WMI_PDEV_PARAM_POWER_GATING_SLEEP, 34895e3dd157SKalle Valo }; 34905e3dd157SKalle Valo 3491226a339bSBartosz Markowski enum wmi_10x_pdev_param { 3492226a339bSBartosz Markowski /* TX chian mask */ 3493226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 3494226a339bSBartosz Markowski /* RX chian mask */ 3495226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, 3496226a339bSBartosz Markowski /* TX power limit for 2G Radio */ 3497226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, 3498226a339bSBartosz Markowski /* TX power limit for 5G Radio */ 3499226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, 3500226a339bSBartosz Markowski /* TX power scale */ 3501226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_TXPOWER_SCALE, 3502226a339bSBartosz Markowski /* Beacon generation mode . 0: host, 1: target */ 3503226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, 3504226a339bSBartosz Markowski /* Beacon generation mode . 0: staggered 1: bursted */ 3505226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BEACON_TX_MODE, 3506226a339bSBartosz Markowski /* 3507226a339bSBartosz Markowski * Resource manager off chan mode . 3508226a339bSBartosz Markowski * 0: turn off off chan mode. 1: turn on offchan mode 3509226a339bSBartosz Markowski */ 3510226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 3511226a339bSBartosz Markowski /* 3512226a339bSBartosz Markowski * Protection mode: 3513226a339bSBartosz Markowski * 0: no protection 1:use CTS-to-self 2: use RTS/CTS 3514226a339bSBartosz Markowski */ 3515226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_PROTECTION_MODE, 3516226a339bSBartosz Markowski /* Dynamic bandwidth 0: disable 1: enable */ 3517226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_DYNAMIC_BW, 3518226a339bSBartosz Markowski /* Non aggregrate/ 11g sw retry threshold.0-disable */ 3519226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 3520226a339bSBartosz Markowski /* aggregrate sw retry threshold. 0-disable*/ 3521226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, 3522226a339bSBartosz Markowski /* Station kickout threshold (non of consecutive failures).0-disable */ 3523226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, 3524226a339bSBartosz Markowski /* Aggerate size scaling configuration per AC */ 3525226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, 3526226a339bSBartosz Markowski /* LTR enable */ 3527226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_ENABLE, 3528226a339bSBartosz Markowski /* LTR latency for BE, in us */ 3529226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, 3530226a339bSBartosz Markowski /* LTR latency for BK, in us */ 3531226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, 3532226a339bSBartosz Markowski /* LTR latency for VI, in us */ 3533226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, 3534226a339bSBartosz Markowski /* LTR latency for VO, in us */ 3535226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, 3536226a339bSBartosz Markowski /* LTR AC latency timeout, in ms */ 3537226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 3538226a339bSBartosz Markowski /* LTR platform latency override, in us */ 3539226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 3540226a339bSBartosz Markowski /* LTR-RX override, in us */ 3541226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, 3542226a339bSBartosz Markowski /* Tx activity timeout for LTR, in us */ 3543226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 3544226a339bSBartosz Markowski /* L1SS state machine enable */ 3545226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_L1SS_ENABLE, 3546226a339bSBartosz Markowski /* Deep sleep state machine enable */ 3547226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, 3548226a339bSBartosz Markowski /* pdev level stats update period in ms */ 3549226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 3550226a339bSBartosz Markowski /* vdev level stats update period in ms */ 3551226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 3552226a339bSBartosz Markowski /* peer level stats update period in ms */ 3553226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 3554226a339bSBartosz Markowski /* beacon filter status update period */ 3555226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 3556226a339bSBartosz Markowski /* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */ 3557226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_PMF_QOS, 3558226a339bSBartosz Markowski /* Access category on which ARP and DHCP frames are sent */ 3559226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, 3560226a339bSBartosz Markowski /* DCS configuration */ 3561226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_DCS, 3562226a339bSBartosz Markowski /* Enable/Disable ANI on target */ 3563226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_ENABLE, 3564226a339bSBartosz Markowski /* configure the ANI polling period */ 3565226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, 3566226a339bSBartosz Markowski /* configure the ANI listening period */ 3567226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, 3568226a339bSBartosz Markowski /* configure OFDM immunity level */ 3569226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, 3570226a339bSBartosz Markowski /* configure CCK immunity level */ 3571226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, 3572226a339bSBartosz Markowski /* Enable/Disable CDD for 1x1 STAs in rate control module */ 3573226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_DYNTXCHAIN, 3574226a339bSBartosz Markowski /* Enable/Disable Fast channel reset*/ 3575226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, 3576226a339bSBartosz Markowski /* Set Bursting DUR */ 3577226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BURST_DUR, 3578226a339bSBartosz Markowski /* Set Bursting Enable*/ 3579226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BURST_ENABLE, 358024c88f78SMichal Kazior 358124c88f78SMichal Kazior /* following are available as of firmware 10.2 */ 358224c88f78SMichal Kazior WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 358324c88f78SMichal Kazior WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE, 358424c88f78SMichal Kazior WMI_10X_PDEV_PARAM_IGMPMLD_TID, 358524c88f78SMichal Kazior WMI_10X_PDEV_PARAM_ANTENNA_GAIN, 358624c88f78SMichal Kazior WMI_10X_PDEV_PARAM_RX_DECAP_MODE, 358724c88f78SMichal Kazior WMI_10X_PDEV_PARAM_RX_FILTER, 358824c88f78SMichal Kazior WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID, 358924c88f78SMichal Kazior WMI_10X_PDEV_PARAM_PROXY_STA_MODE, 359024c88f78SMichal Kazior WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE, 359124c88f78SMichal Kazior WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 359224c88f78SMichal Kazior WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 3593b43bf97eSPeter Oh WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE, 3594b43bf97eSPeter Oh WMI_10X_PDEV_PARAM_RTS_FIXED_RATE, 3595b43bf97eSPeter Oh WMI_10X_PDEV_PARAM_CAL_PERIOD 3596226a339bSBartosz Markowski }; 3597226a339bSBartosz Markowski 3598d86561ffSRaja Mani enum wmi_10_4_pdev_param { 3599d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 3600d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK, 3601d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G, 3602d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G, 3603d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_TXPOWER_SCALE, 3604d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE, 3605d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_BEACON_TX_MODE, 3606d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 3607d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PROTECTION_MODE, 3608d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_DYNAMIC_BW, 3609d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 3610d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH, 3611d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH, 3612d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING, 3613d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_ENABLE, 3614d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE, 3615d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK, 3616d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI, 3617d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO, 3618d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 3619d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 3620d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE, 3621d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 3622d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_L1SS_ENABLE, 3623d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE, 3624d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 3625d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 3626d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 3627d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 3628d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 3629d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 3630d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 3631d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 3632d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PMF_QOS, 3633d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE, 3634d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_DCS, 3635d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANI_ENABLE, 3636d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD, 3637d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD, 3638d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL, 3639d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL, 3640d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_DYNTXCHAIN, 3641d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PROXY_STA, 3642d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG, 3643d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP, 3644d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_AGGR_BURST, 3645d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_RX_DECAP_MODE, 3646d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET, 3647d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_BURST_DUR, 3648d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_BURST_ENABLE, 3649d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 3650d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE, 3651d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_IGMPMLD_TID, 3652d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANTENNA_GAIN, 3653d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_RX_FILTER, 3654d86561ffSRaja Mani WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID, 3655d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PROXY_STA_MODE, 3656d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE, 3657d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 3658d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 3659d86561ffSRaja Mani WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE, 3660d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 3661d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS, 3662d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 3663d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID, 3664d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 3665d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 3666d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 3667d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID, 3668d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_EN_STATS, 3669d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY, 3670d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_NOISE_DETECTION, 3671d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD, 3672d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_DPD_ENABLE, 3673d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 3674d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH, 3675d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION, 3676d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ANT_PLZN, 3677d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT, 3678d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL, 3679d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G, 3680d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G, 3681d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 3682d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 3683d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_CCA_THRESHOLD, 3684d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE, 3685d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_CAL_PERIOD, 3686d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_PDEV_RESET, 3687d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET, 3688d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ARP_SRCADDR, 3689d86561ffSRaja Mani WMI_10_4_PDEV_PARAM_ARP_DSTADDR, 369052e8ce13SVasanthakumar Thiagarajan WMI_10_4_PDEV_PARAM_TXPOWER_DECR_DB, 369152e8ce13SVasanthakumar Thiagarajan WMI_10_4_PDEV_PARAM_RX_BATCHMODE, 369252e8ce13SVasanthakumar Thiagarajan WMI_10_4_PDEV_PARAM_PACKET_AGGR_DELAY, 369352e8ce13SVasanthakumar Thiagarajan WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 369452e8ce13SVasanthakumar Thiagarajan WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 369552e8ce13SVasanthakumar Thiagarajan WMI_10_4_PDEV_PARAM_CUST_TXPOWER_SCALE, 3696d86561ffSRaja Mani }; 3697d86561ffSRaja Mani 36985e3dd157SKalle Valo struct wmi_pdev_set_param_cmd { 36995e3dd157SKalle Valo __le32 param_id; 37005e3dd157SKalle Valo __le32 param_value; 37015e3dd157SKalle Valo } __packed; 37025e3dd157SKalle Valo 3703a7bd3e99SPeter Oh /* valid period is 1 ~ 60000ms, unit in millisecond */ 3704a7bd3e99SPeter Oh #define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000 3705a7bd3e99SPeter Oh 37065e3dd157SKalle Valo struct wmi_pdev_get_tpc_config_cmd { 37075e3dd157SKalle Valo /* parameter */ 37085e3dd157SKalle Valo __le32 param; 37095e3dd157SKalle Valo } __packed; 37105e3dd157SKalle Valo 371129542666SMaharaja Kennadyrajan #define WMI_TPC_CONFIG_PARAM 1 37125e3dd157SKalle Valo #define WMI_TPC_RATE_MAX 160 37135e3dd157SKalle Valo #define WMI_TPC_TX_N_CHAIN 4 371429542666SMaharaja Kennadyrajan #define WMI_TPC_PREAM_TABLE_MAX 10 371529542666SMaharaja Kennadyrajan #define WMI_TPC_FLAG 3 371629542666SMaharaja Kennadyrajan #define WMI_TPC_BUF_SIZE 10 371729542666SMaharaja Kennadyrajan 371829542666SMaharaja Kennadyrajan enum wmi_tpc_table_type { 371929542666SMaharaja Kennadyrajan WMI_TPC_TABLE_TYPE_CDD = 0, 372029542666SMaharaja Kennadyrajan WMI_TPC_TABLE_TYPE_STBC = 1, 372129542666SMaharaja Kennadyrajan WMI_TPC_TABLE_TYPE_TXBF = 2, 372229542666SMaharaja Kennadyrajan }; 37235e3dd157SKalle Valo 37245e3dd157SKalle Valo enum wmi_tpc_config_event_flag { 37255e3dd157SKalle Valo WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1, 37265e3dd157SKalle Valo WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2, 37275e3dd157SKalle Valo WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4, 37285e3dd157SKalle Valo }; 37295e3dd157SKalle Valo 37305e3dd157SKalle Valo struct wmi_pdev_tpc_config_event { 37315e3dd157SKalle Valo __le32 reg_domain; 37325e3dd157SKalle Valo __le32 chan_freq; 37335e3dd157SKalle Valo __le32 phy_mode; 37345e3dd157SKalle Valo __le32 twice_antenna_reduction; 37355e3dd157SKalle Valo __le32 twice_max_rd_power; 37363b8fc902SKalle Valo a_sle32 twice_antenna_gain; 37375e3dd157SKalle Valo __le32 power_limit; 37385e3dd157SKalle Valo __le32 rate_max; 37395e3dd157SKalle Valo __le32 num_tx_chain; 37405e3dd157SKalle Valo __le32 ctl; 37415e3dd157SKalle Valo __le32 flags; 37425e3dd157SKalle Valo s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN]; 37435e3dd157SKalle Valo s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN]; 37445e3dd157SKalle Valo s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN]; 37455e3dd157SKalle Valo s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN]; 37465e3dd157SKalle Valo u8 rates_array[WMI_TPC_RATE_MAX]; 37475e3dd157SKalle Valo } __packed; 37485e3dd157SKalle Valo 37495e3dd157SKalle Valo /* Transmit power scale factor. */ 37505e3dd157SKalle Valo enum wmi_tp_scale { 37515e3dd157SKalle Valo WMI_TP_SCALE_MAX = 0, /* no scaling (default) */ 37525e3dd157SKalle Valo WMI_TP_SCALE_50 = 1, /* 50% of max (-3 dBm) */ 37535e3dd157SKalle Valo WMI_TP_SCALE_25 = 2, /* 25% of max (-6 dBm) */ 37545e3dd157SKalle Valo WMI_TP_SCALE_12 = 3, /* 12% of max (-9 dBm) */ 37555e3dd157SKalle Valo WMI_TP_SCALE_MIN = 4, /* min, but still on */ 37565e3dd157SKalle Valo WMI_TP_SCALE_SIZE = 5, /* max num of enum */ 37575e3dd157SKalle Valo }; 37585e3dd157SKalle Valo 37595e3dd157SKalle Valo struct wmi_pdev_chanlist_update_event { 37605e3dd157SKalle Valo /* number of channels */ 37615e3dd157SKalle Valo __le32 num_chan; 37625e3dd157SKalle Valo /* array of channels */ 37635e3dd157SKalle Valo struct wmi_channel channel_list[1]; 37645e3dd157SKalle Valo } __packed; 37655e3dd157SKalle Valo 37665e3dd157SKalle Valo #define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32) 37675e3dd157SKalle Valo 37685e3dd157SKalle Valo struct wmi_debug_mesg_event { 37695e3dd157SKalle Valo /* message buffer, NULL terminated */ 37705e3dd157SKalle Valo char bufp[WMI_MAX_DEBUG_MESG]; 37715e3dd157SKalle Valo } __packed; 37725e3dd157SKalle Valo 37735e3dd157SKalle Valo enum { 37745e3dd157SKalle Valo /* P2P device */ 37755e3dd157SKalle Valo VDEV_SUBTYPE_P2PDEV = 0, 37765e3dd157SKalle Valo /* P2P client */ 37775e3dd157SKalle Valo VDEV_SUBTYPE_P2PCLI, 37785e3dd157SKalle Valo /* P2P GO */ 37795e3dd157SKalle Valo VDEV_SUBTYPE_P2PGO, 37805e3dd157SKalle Valo /* BT3.0 HS */ 37815e3dd157SKalle Valo VDEV_SUBTYPE_BT, 37825e3dd157SKalle Valo }; 37835e3dd157SKalle Valo 37845e3dd157SKalle Valo struct wmi_pdev_set_channel_cmd { 37855e3dd157SKalle Valo /* idnore power , only use flags , mode and freq */ 37865e3dd157SKalle Valo struct wmi_channel chan; 37875e3dd157SKalle Valo } __packed; 37885e3dd157SKalle Valo 378990174455SRajkumar Manoharan struct wmi_pdev_pktlog_enable_cmd { 379090174455SRajkumar Manoharan __le32 ev_bitmap; 379190174455SRajkumar Manoharan } __packed; 379290174455SRajkumar Manoharan 37935e3dd157SKalle Valo /* Customize the DSCP (bit) to TID (0-7) mapping for QOS */ 37945e3dd157SKalle Valo #define WMI_DSCP_MAP_MAX (64) 37955e3dd157SKalle Valo struct wmi_pdev_set_dscp_tid_map_cmd { 37965e3dd157SKalle Valo /* map indicating DSCP to TID conversion */ 37975e3dd157SKalle Valo __le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX]; 37985e3dd157SKalle Valo } __packed; 37995e3dd157SKalle Valo 38005e3dd157SKalle Valo enum mcast_bcast_rate_id { 38015e3dd157SKalle Valo WMI_SET_MCAST_RATE, 38025e3dd157SKalle Valo WMI_SET_BCAST_RATE 38035e3dd157SKalle Valo }; 38045e3dd157SKalle Valo 38055e3dd157SKalle Valo struct mcast_bcast_rate { 38065e3dd157SKalle Valo enum mcast_bcast_rate_id rate_id; 38075e3dd157SKalle Valo __le32 rate; 38085e3dd157SKalle Valo } __packed; 38095e3dd157SKalle Valo 38105e3dd157SKalle Valo struct wmi_wmm_params { 38115e3dd157SKalle Valo __le32 cwmin; 38125e3dd157SKalle Valo __le32 cwmax; 38135e3dd157SKalle Valo __le32 aifs; 38145e3dd157SKalle Valo __le32 txop; 38155e3dd157SKalle Valo __le32 acm; 38165e3dd157SKalle Valo __le32 no_ack; 38175e3dd157SKalle Valo } __packed; 38185e3dd157SKalle Valo 38195e3dd157SKalle Valo struct wmi_pdev_set_wmm_params { 38205e3dd157SKalle Valo struct wmi_wmm_params ac_be; 38215e3dd157SKalle Valo struct wmi_wmm_params ac_bk; 38225e3dd157SKalle Valo struct wmi_wmm_params ac_vi; 38235e3dd157SKalle Valo struct wmi_wmm_params ac_vo; 38245e3dd157SKalle Valo } __packed; 38255e3dd157SKalle Valo 38265e3dd157SKalle Valo struct wmi_wmm_params_arg { 38275e3dd157SKalle Valo u32 cwmin; 38285e3dd157SKalle Valo u32 cwmax; 38295e3dd157SKalle Valo u32 aifs; 38305e3dd157SKalle Valo u32 txop; 38315e3dd157SKalle Valo u32 acm; 38325e3dd157SKalle Valo u32 no_ack; 38335e3dd157SKalle Valo }; 38345e3dd157SKalle Valo 38355e752e42SMichal Kazior struct wmi_wmm_params_all_arg { 38365e3dd157SKalle Valo struct wmi_wmm_params_arg ac_be; 38375e3dd157SKalle Valo struct wmi_wmm_params_arg ac_bk; 38385e3dd157SKalle Valo struct wmi_wmm_params_arg ac_vi; 38395e3dd157SKalle Valo struct wmi_wmm_params_arg ac_vo; 38405e3dd157SKalle Valo }; 38415e3dd157SKalle Valo 3842b91251fbSMichal Kazior struct wmi_pdev_stats_tx { 38435e3dd157SKalle Valo /* Num HTT cookies queued to dispatch list */ 38445e3dd157SKalle Valo __le32 comp_queued; 38455e3dd157SKalle Valo 38465e3dd157SKalle Valo /* Num HTT cookies dispatched */ 38475e3dd157SKalle Valo __le32 comp_delivered; 38485e3dd157SKalle Valo 38495e3dd157SKalle Valo /* Num MSDU queued to WAL */ 38505e3dd157SKalle Valo __le32 msdu_enqued; 38515e3dd157SKalle Valo 38525e3dd157SKalle Valo /* Num MPDU queue to WAL */ 38535e3dd157SKalle Valo __le32 mpdu_enqued; 38545e3dd157SKalle Valo 38555e3dd157SKalle Valo /* Num MSDUs dropped by WMM limit */ 38565e3dd157SKalle Valo __le32 wmm_drop; 38575e3dd157SKalle Valo 38585e3dd157SKalle Valo /* Num Local frames queued */ 38595e3dd157SKalle Valo __le32 local_enqued; 38605e3dd157SKalle Valo 38615e3dd157SKalle Valo /* Num Local frames done */ 38625e3dd157SKalle Valo __le32 local_freed; 38635e3dd157SKalle Valo 38645e3dd157SKalle Valo /* Num queued to HW */ 38655e3dd157SKalle Valo __le32 hw_queued; 38665e3dd157SKalle Valo 38675e3dd157SKalle Valo /* Num PPDU reaped from HW */ 38685e3dd157SKalle Valo __le32 hw_reaped; 38695e3dd157SKalle Valo 38705e3dd157SKalle Valo /* Num underruns */ 38715e3dd157SKalle Valo __le32 underrun; 38725e3dd157SKalle Valo 38735e3dd157SKalle Valo /* Num PPDUs cleaned up in TX abort */ 38745e3dd157SKalle Valo __le32 tx_abort; 38755e3dd157SKalle Valo 38765e3dd157SKalle Valo /* Num MPDUs requed by SW */ 38775e3dd157SKalle Valo __le32 mpdus_requed; 38785e3dd157SKalle Valo 38795e3dd157SKalle Valo /* excessive retries */ 38805e3dd157SKalle Valo __le32 tx_ko; 38815e3dd157SKalle Valo 38825e3dd157SKalle Valo /* data hw rate code */ 38835e3dd157SKalle Valo __le32 data_rc; 38845e3dd157SKalle Valo 38855e3dd157SKalle Valo /* Scheduler self triggers */ 38865e3dd157SKalle Valo __le32 self_triggers; 38875e3dd157SKalle Valo 38885e3dd157SKalle Valo /* frames dropped due to excessive sw retries */ 38895e3dd157SKalle Valo __le32 sw_retry_failure; 38905e3dd157SKalle Valo 38915e3dd157SKalle Valo /* illegal rate phy errors */ 38925e3dd157SKalle Valo __le32 illgl_rate_phy_err; 38935e3dd157SKalle Valo 38945e3dd157SKalle Valo /* wal pdev continous xretry */ 38955e3dd157SKalle Valo __le32 pdev_cont_xretry; 38965e3dd157SKalle Valo 38975e3dd157SKalle Valo /* wal pdev continous xretry */ 38985e3dd157SKalle Valo __le32 pdev_tx_timeout; 38995e3dd157SKalle Valo 39005e3dd157SKalle Valo /* wal pdev resets */ 39015e3dd157SKalle Valo __le32 pdev_resets; 39025e3dd157SKalle Valo 390334d714e0SBartosz Markowski /* frames dropped due to non-availability of stateless TIDs */ 390434d714e0SBartosz Markowski __le32 stateless_tid_alloc_failure; 390534d714e0SBartosz Markowski 39065e3dd157SKalle Valo __le32 phy_underrun; 39075e3dd157SKalle Valo 39085e3dd157SKalle Valo /* MPDU is more than txop limit */ 39095e3dd157SKalle Valo __le32 txop_ovf; 39105e3dd157SKalle Valo } __packed; 39115e3dd157SKalle Valo 391298dd2b92SManikanta Pubbisetty struct wmi_10_4_pdev_stats_tx { 391398dd2b92SManikanta Pubbisetty /* Num HTT cookies queued to dispatch list */ 391498dd2b92SManikanta Pubbisetty __le32 comp_queued; 391598dd2b92SManikanta Pubbisetty 391698dd2b92SManikanta Pubbisetty /* Num HTT cookies dispatched */ 391798dd2b92SManikanta Pubbisetty __le32 comp_delivered; 391898dd2b92SManikanta Pubbisetty 391998dd2b92SManikanta Pubbisetty /* Num MSDU queued to WAL */ 392098dd2b92SManikanta Pubbisetty __le32 msdu_enqued; 392198dd2b92SManikanta Pubbisetty 392298dd2b92SManikanta Pubbisetty /* Num MPDU queue to WAL */ 392398dd2b92SManikanta Pubbisetty __le32 mpdu_enqued; 392498dd2b92SManikanta Pubbisetty 392598dd2b92SManikanta Pubbisetty /* Num MSDUs dropped by WMM limit */ 392698dd2b92SManikanta Pubbisetty __le32 wmm_drop; 392798dd2b92SManikanta Pubbisetty 392898dd2b92SManikanta Pubbisetty /* Num Local frames queued */ 392998dd2b92SManikanta Pubbisetty __le32 local_enqued; 393098dd2b92SManikanta Pubbisetty 393198dd2b92SManikanta Pubbisetty /* Num Local frames done */ 393298dd2b92SManikanta Pubbisetty __le32 local_freed; 393398dd2b92SManikanta Pubbisetty 393498dd2b92SManikanta Pubbisetty /* Num queued to HW */ 393598dd2b92SManikanta Pubbisetty __le32 hw_queued; 393698dd2b92SManikanta Pubbisetty 393798dd2b92SManikanta Pubbisetty /* Num PPDU reaped from HW */ 393898dd2b92SManikanta Pubbisetty __le32 hw_reaped; 393998dd2b92SManikanta Pubbisetty 394098dd2b92SManikanta Pubbisetty /* Num underruns */ 394198dd2b92SManikanta Pubbisetty __le32 underrun; 394298dd2b92SManikanta Pubbisetty 394398dd2b92SManikanta Pubbisetty /* HW Paused. */ 394498dd2b92SManikanta Pubbisetty __le32 hw_paused; 394598dd2b92SManikanta Pubbisetty 394698dd2b92SManikanta Pubbisetty /* Num PPDUs cleaned up in TX abort */ 394798dd2b92SManikanta Pubbisetty __le32 tx_abort; 394898dd2b92SManikanta Pubbisetty 394998dd2b92SManikanta Pubbisetty /* Num MPDUs requed by SW */ 395098dd2b92SManikanta Pubbisetty __le32 mpdus_requed; 395198dd2b92SManikanta Pubbisetty 395298dd2b92SManikanta Pubbisetty /* excessive retries */ 395398dd2b92SManikanta Pubbisetty __le32 tx_ko; 395498dd2b92SManikanta Pubbisetty 395598dd2b92SManikanta Pubbisetty /* data hw rate code */ 395698dd2b92SManikanta Pubbisetty __le32 data_rc; 395798dd2b92SManikanta Pubbisetty 395898dd2b92SManikanta Pubbisetty /* Scheduler self triggers */ 395998dd2b92SManikanta Pubbisetty __le32 self_triggers; 396098dd2b92SManikanta Pubbisetty 396198dd2b92SManikanta Pubbisetty /* frames dropped due to excessive sw retries */ 396298dd2b92SManikanta Pubbisetty __le32 sw_retry_failure; 396398dd2b92SManikanta Pubbisetty 396498dd2b92SManikanta Pubbisetty /* illegal rate phy errors */ 396598dd2b92SManikanta Pubbisetty __le32 illgl_rate_phy_err; 396698dd2b92SManikanta Pubbisetty 396798dd2b92SManikanta Pubbisetty /* wal pdev continuous xretry */ 396898dd2b92SManikanta Pubbisetty __le32 pdev_cont_xretry; 396998dd2b92SManikanta Pubbisetty 397098dd2b92SManikanta Pubbisetty /* wal pdev tx timeouts */ 397198dd2b92SManikanta Pubbisetty __le32 pdev_tx_timeout; 397298dd2b92SManikanta Pubbisetty 397398dd2b92SManikanta Pubbisetty /* wal pdev resets */ 397498dd2b92SManikanta Pubbisetty __le32 pdev_resets; 397598dd2b92SManikanta Pubbisetty 397698dd2b92SManikanta Pubbisetty /* frames dropped due to non-availability of stateless TIDs */ 397798dd2b92SManikanta Pubbisetty __le32 stateless_tid_alloc_failure; 397898dd2b92SManikanta Pubbisetty 397998dd2b92SManikanta Pubbisetty __le32 phy_underrun; 398098dd2b92SManikanta Pubbisetty 398198dd2b92SManikanta Pubbisetty /* MPDU is more than txop limit */ 398298dd2b92SManikanta Pubbisetty __le32 txop_ovf; 398398dd2b92SManikanta Pubbisetty 398498dd2b92SManikanta Pubbisetty /* Number of Sequences posted */ 398598dd2b92SManikanta Pubbisetty __le32 seq_posted; 398698dd2b92SManikanta Pubbisetty 398798dd2b92SManikanta Pubbisetty /* Number of Sequences failed queueing */ 398898dd2b92SManikanta Pubbisetty __le32 seq_failed_queueing; 398998dd2b92SManikanta Pubbisetty 399098dd2b92SManikanta Pubbisetty /* Number of Sequences completed */ 399198dd2b92SManikanta Pubbisetty __le32 seq_completed; 399298dd2b92SManikanta Pubbisetty 399398dd2b92SManikanta Pubbisetty /* Number of Sequences restarted */ 399498dd2b92SManikanta Pubbisetty __le32 seq_restarted; 399598dd2b92SManikanta Pubbisetty 399698dd2b92SManikanta Pubbisetty /* Number of MU Sequences posted */ 399798dd2b92SManikanta Pubbisetty __le32 mu_seq_posted; 399898dd2b92SManikanta Pubbisetty 399998dd2b92SManikanta Pubbisetty /* Num MPDUs flushed by SW, HWPAUSED,SW TXABORT(Reset,channel change) */ 400098dd2b92SManikanta Pubbisetty __le32 mpdus_sw_flush; 400198dd2b92SManikanta Pubbisetty 400298dd2b92SManikanta Pubbisetty /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 400398dd2b92SManikanta Pubbisetty __le32 mpdus_hw_filter; 400498dd2b92SManikanta Pubbisetty 400598dd2b92SManikanta Pubbisetty /* Num MPDUs truncated by PDG 400698dd2b92SManikanta Pubbisetty * (TXOP, TBTT, PPDU_duration based on rate, dyn_bw) 400798dd2b92SManikanta Pubbisetty */ 400898dd2b92SManikanta Pubbisetty __le32 mpdus_truncated; 400998dd2b92SManikanta Pubbisetty 401098dd2b92SManikanta Pubbisetty /* Num MPDUs that was tried but didn't receive ACK or BA */ 401198dd2b92SManikanta Pubbisetty __le32 mpdus_ack_failed; 401298dd2b92SManikanta Pubbisetty 401398dd2b92SManikanta Pubbisetty /* Num MPDUs that was dropped due to expiry. */ 401498dd2b92SManikanta Pubbisetty __le32 mpdus_expired; 401598dd2b92SManikanta Pubbisetty } __packed; 401698dd2b92SManikanta Pubbisetty 4017b91251fbSMichal Kazior struct wmi_pdev_stats_rx { 40185e3dd157SKalle Valo /* Cnts any change in ring routing mid-ppdu */ 40195e3dd157SKalle Valo __le32 mid_ppdu_route_change; 40205e3dd157SKalle Valo 40215e3dd157SKalle Valo /* Total number of statuses processed */ 40225e3dd157SKalle Valo __le32 status_rcvd; 40235e3dd157SKalle Valo 40245e3dd157SKalle Valo /* Extra frags on rings 0-3 */ 40255e3dd157SKalle Valo __le32 r0_frags; 40265e3dd157SKalle Valo __le32 r1_frags; 40275e3dd157SKalle Valo __le32 r2_frags; 40285e3dd157SKalle Valo __le32 r3_frags; 40295e3dd157SKalle Valo 40305e3dd157SKalle Valo /* MSDUs / MPDUs delivered to HTT */ 40315e3dd157SKalle Valo __le32 htt_msdus; 40325e3dd157SKalle Valo __le32 htt_mpdus; 40335e3dd157SKalle Valo 40345e3dd157SKalle Valo /* MSDUs / MPDUs delivered to local stack */ 40355e3dd157SKalle Valo __le32 loc_msdus; 40365e3dd157SKalle Valo __le32 loc_mpdus; 40375e3dd157SKalle Valo 40385e3dd157SKalle Valo /* AMSDUs that have more MSDUs than the status ring size */ 40395e3dd157SKalle Valo __le32 oversize_amsdu; 40405e3dd157SKalle Valo 40415e3dd157SKalle Valo /* Number of PHY errors */ 40425e3dd157SKalle Valo __le32 phy_errs; 40435e3dd157SKalle Valo 40445e3dd157SKalle Valo /* Number of PHY errors drops */ 40455e3dd157SKalle Valo __le32 phy_err_drop; 40465e3dd157SKalle Valo 40475e3dd157SKalle Valo /* Number of mpdu errors - FCS, MIC, ENC etc. */ 40485e3dd157SKalle Valo __le32 mpdu_errs; 40495e3dd157SKalle Valo } __packed; 40505e3dd157SKalle Valo 4051b91251fbSMichal Kazior struct wmi_pdev_stats_peer { 40525e3dd157SKalle Valo /* REMOVE THIS ONCE REAL PEER STAT COUNTERS ARE ADDED */ 40535e3dd157SKalle Valo __le32 dummy; 40545e3dd157SKalle Valo } __packed; 40555e3dd157SKalle Valo 40565e3dd157SKalle Valo enum wmi_stats_id { 4057eed55411SMichal Kazior WMI_STAT_PEER = BIT(0), 4058eed55411SMichal Kazior WMI_STAT_AP = BIT(1), 4059eed55411SMichal Kazior WMI_STAT_PDEV = BIT(2), 4060eed55411SMichal Kazior WMI_STAT_VDEV = BIT(3), 4061eed55411SMichal Kazior WMI_STAT_BCNFLT = BIT(4), 4062eed55411SMichal Kazior WMI_STAT_VDEV_RATE = BIT(5), 40635e3dd157SKalle Valo }; 40645e3dd157SKalle Valo 4065db9cdda6SBen Greear struct wlan_inst_rssi_args { 4066db9cdda6SBen Greear __le16 cfg_retry_count; 4067db9cdda6SBen Greear __le16 retry_count; 4068db9cdda6SBen Greear }; 4069db9cdda6SBen Greear 40705e3dd157SKalle Valo struct wmi_request_stats_cmd { 40715e3dd157SKalle Valo __le32 stats_id; 40725e3dd157SKalle Valo 4073db9cdda6SBen Greear __le32 vdev_id; 4074db9cdda6SBen Greear 4075db9cdda6SBen Greear /* peer MAC address */ 4076db9cdda6SBen Greear struct wmi_mac_addr peer_macaddr; 4077db9cdda6SBen Greear 4078db9cdda6SBen Greear /* Instantaneous RSSI arguments */ 4079db9cdda6SBen Greear struct wlan_inst_rssi_args inst_rssi_args; 40805e3dd157SKalle Valo } __packed; 40815e3dd157SKalle Valo 40825e3dd157SKalle Valo /* Suspend option */ 40835e3dd157SKalle Valo enum { 40845e3dd157SKalle Valo /* suspend */ 40855e3dd157SKalle Valo WMI_PDEV_SUSPEND, 40865e3dd157SKalle Valo 40875e3dd157SKalle Valo /* suspend and disable all interrupts */ 40885e3dd157SKalle Valo WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 40895e3dd157SKalle Valo }; 40905e3dd157SKalle Valo 40915e3dd157SKalle Valo struct wmi_pdev_suspend_cmd { 40925e3dd157SKalle Valo /* suspend option sent to target */ 40935e3dd157SKalle Valo __le32 suspend_opt; 40945e3dd157SKalle Valo } __packed; 40955e3dd157SKalle Valo 40965e3dd157SKalle Valo struct wmi_stats_event { 4097eed55411SMichal Kazior __le32 stats_id; /* WMI_STAT_ */ 40985e3dd157SKalle Valo /* 40995e3dd157SKalle Valo * number of pdev stats event structures 41005e3dd157SKalle Valo * (wmi_pdev_stats) 0 or 1 41015e3dd157SKalle Valo */ 41025e3dd157SKalle Valo __le32 num_pdev_stats; 41035e3dd157SKalle Valo /* 41045e3dd157SKalle Valo * number of vdev stats event structures 41055e3dd157SKalle Valo * (wmi_vdev_stats) 0 or max vdevs 41065e3dd157SKalle Valo */ 41075e3dd157SKalle Valo __le32 num_vdev_stats; 41085e3dd157SKalle Valo /* 41095e3dd157SKalle Valo * number of peer stats event structures 41105e3dd157SKalle Valo * (wmi_peer_stats) 0 or max peers 41115e3dd157SKalle Valo */ 41125e3dd157SKalle Valo __le32 num_peer_stats; 41135e3dd157SKalle Valo __le32 num_bcnflt_stats; 41145e3dd157SKalle Valo /* 41155e3dd157SKalle Valo * followed by 41165e3dd157SKalle Valo * num_pdev_stats * size of(struct wmi_pdev_stats) 41175e3dd157SKalle Valo * num_vdev_stats * size of(struct wmi_vdev_stats) 41185e3dd157SKalle Valo * num_peer_stats * size of(struct wmi_peer_stats) 41195e3dd157SKalle Valo * 41205e3dd157SKalle Valo * By having a zero sized array, the pointer to data area 41215e3dd157SKalle Valo * becomes available without increasing the struct size 41225e3dd157SKalle Valo */ 41235e3dd157SKalle Valo u8 data[0]; 41245e3dd157SKalle Valo } __packed; 41255e3dd157SKalle Valo 412620de2229SMichal Kazior struct wmi_10_2_stats_event { 412720de2229SMichal Kazior __le32 stats_id; /* %WMI_REQUEST_ */ 412820de2229SMichal Kazior __le32 num_pdev_stats; 412920de2229SMichal Kazior __le32 num_pdev_ext_stats; 413020de2229SMichal Kazior __le32 num_vdev_stats; 413120de2229SMichal Kazior __le32 num_peer_stats; 413220de2229SMichal Kazior __le32 num_bcnflt_stats; 413320de2229SMichal Kazior u8 data[0]; 413420de2229SMichal Kazior } __packed; 413520de2229SMichal Kazior 41365e3dd157SKalle Valo /* 41375e3dd157SKalle Valo * PDEV statistics 41385e3dd157SKalle Valo * TODO: add all PDEV stats here 41395e3dd157SKalle Valo */ 4140b91251fbSMichal Kazior struct wmi_pdev_stats_base { 4141b91251fbSMichal Kazior __le32 chan_nf; 4142b91251fbSMichal Kazior __le32 tx_frame_count; 4143b91251fbSMichal Kazior __le32 rx_frame_count; 4144b91251fbSMichal Kazior __le32 rx_clear_count; 4145b91251fbSMichal Kazior __le32 cycle_count; 4146b91251fbSMichal Kazior __le32 phy_err_count; 4147b91251fbSMichal Kazior __le32 chan_tx_pwr; 41485e3dd157SKalle Valo } __packed; 41495e3dd157SKalle Valo 4150b91251fbSMichal Kazior struct wmi_pdev_stats { 4151b91251fbSMichal Kazior struct wmi_pdev_stats_base base; 4152b91251fbSMichal Kazior struct wmi_pdev_stats_tx tx; 4153b91251fbSMichal Kazior struct wmi_pdev_stats_rx rx; 4154b91251fbSMichal Kazior struct wmi_pdev_stats_peer peer; 4155b91251fbSMichal Kazior } __packed; 4156b91251fbSMichal Kazior 4157b91251fbSMichal Kazior struct wmi_pdev_stats_extra { 415852e346d1SChun-Yeow Yeoh __le32 ack_rx_bad; 415952e346d1SChun-Yeow Yeoh __le32 rts_bad; 416052e346d1SChun-Yeow Yeoh __le32 rts_good; 416152e346d1SChun-Yeow Yeoh __le32 fcs_bad; 416252e346d1SChun-Yeow Yeoh __le32 no_beacons; 416352e346d1SChun-Yeow Yeoh __le32 mib_int_count; 416452e346d1SChun-Yeow Yeoh } __packed; 416552e346d1SChun-Yeow Yeoh 4166b91251fbSMichal Kazior struct wmi_10x_pdev_stats { 4167b91251fbSMichal Kazior struct wmi_pdev_stats_base base; 4168b91251fbSMichal Kazior struct wmi_pdev_stats_tx tx; 4169b91251fbSMichal Kazior struct wmi_pdev_stats_rx rx; 4170b91251fbSMichal Kazior struct wmi_pdev_stats_peer peer; 4171b91251fbSMichal Kazior struct wmi_pdev_stats_extra extra; 4172b91251fbSMichal Kazior } __packed; 4173b91251fbSMichal Kazior 417420de2229SMichal Kazior struct wmi_pdev_stats_mem { 417520de2229SMichal Kazior __le32 dram_free; 417620de2229SMichal Kazior __le32 iram_free; 417720de2229SMichal Kazior } __packed; 417820de2229SMichal Kazior 417920de2229SMichal Kazior struct wmi_10_2_pdev_stats { 418020de2229SMichal Kazior struct wmi_pdev_stats_base base; 418120de2229SMichal Kazior struct wmi_pdev_stats_tx tx; 418220de2229SMichal Kazior __le32 mc_drop; 418320de2229SMichal Kazior struct wmi_pdev_stats_rx rx; 418420de2229SMichal Kazior __le32 pdev_rx_timeout; 418520de2229SMichal Kazior struct wmi_pdev_stats_mem mem; 418620de2229SMichal Kazior struct wmi_pdev_stats_peer peer; 418720de2229SMichal Kazior struct wmi_pdev_stats_extra extra; 418820de2229SMichal Kazior } __packed; 418920de2229SMichal Kazior 419098dd2b92SManikanta Pubbisetty struct wmi_10_4_pdev_stats { 419198dd2b92SManikanta Pubbisetty struct wmi_pdev_stats_base base; 419298dd2b92SManikanta Pubbisetty struct wmi_10_4_pdev_stats_tx tx; 419398dd2b92SManikanta Pubbisetty struct wmi_pdev_stats_rx rx; 419498dd2b92SManikanta Pubbisetty __le32 rx_ovfl_errs; 419598dd2b92SManikanta Pubbisetty struct wmi_pdev_stats_mem mem; 419698dd2b92SManikanta Pubbisetty __le32 sram_free_size; 419798dd2b92SManikanta Pubbisetty struct wmi_pdev_stats_extra extra; 419898dd2b92SManikanta Pubbisetty } __packed; 419998dd2b92SManikanta Pubbisetty 42005e3dd157SKalle Valo /* 42015e3dd157SKalle Valo * VDEV statistics 42025e3dd157SKalle Valo * TODO: add all VDEV stats here 42035e3dd157SKalle Valo */ 42045e3dd157SKalle Valo struct wmi_vdev_stats { 42055e3dd157SKalle Valo __le32 vdev_id; 42065e3dd157SKalle Valo } __packed; 42075e3dd157SKalle Valo 42085e3dd157SKalle Valo /* 42095e3dd157SKalle Valo * peer statistics. 42105e3dd157SKalle Valo * TODO: add more stats 42115e3dd157SKalle Valo */ 4212d15fb520SMichal Kazior struct wmi_peer_stats { 42135e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 42145e3dd157SKalle Valo __le32 peer_rssi; 42155e3dd157SKalle Valo __le32 peer_tx_rate; 42165e3dd157SKalle Valo } __packed; 42175e3dd157SKalle Valo 4218d15fb520SMichal Kazior struct wmi_10x_peer_stats { 4219d15fb520SMichal Kazior struct wmi_peer_stats old; 422023c3aae4SBen Greear __le32 peer_rx_rate; 422123c3aae4SBen Greear } __packed; 422223c3aae4SBen Greear 422320de2229SMichal Kazior struct wmi_10_2_peer_stats { 422420de2229SMichal Kazior struct wmi_peer_stats old; 422520de2229SMichal Kazior __le32 peer_rx_rate; 422620de2229SMichal Kazior __le32 current_per; 422720de2229SMichal Kazior __le32 retries; 422820de2229SMichal Kazior __le32 tx_rate_count; 422920de2229SMichal Kazior __le32 max_4ms_frame_len; 423020de2229SMichal Kazior __le32 total_sub_frames; 423120de2229SMichal Kazior __le32 tx_bytes; 423220de2229SMichal Kazior __le32 num_pkt_loss_overflow[4]; 423320de2229SMichal Kazior __le32 num_pkt_loss_excess_retry[4]; 423420de2229SMichal Kazior } __packed; 423520de2229SMichal Kazior 423620de2229SMichal Kazior struct wmi_10_2_4_peer_stats { 423720de2229SMichal Kazior struct wmi_10_2_peer_stats common; 4238774e656eSMohammed Shafi Shajakhan __le32 peer_rssi_changed; 423920de2229SMichal Kazior } __packed; 424020de2229SMichal Kazior 4241de46c015SMohammed Shafi Shajakhan struct wmi_10_2_4_ext_peer_stats { 4242de46c015SMohammed Shafi Shajakhan struct wmi_10_2_peer_stats common; 4243de46c015SMohammed Shafi Shajakhan __le32 peer_rssi_changed; 4244de46c015SMohammed Shafi Shajakhan __le32 rx_duration; 4245de46c015SMohammed Shafi Shajakhan } __packed; 4246de46c015SMohammed Shafi Shajakhan 424798dd2b92SManikanta Pubbisetty struct wmi_10_4_peer_stats { 424898dd2b92SManikanta Pubbisetty struct wmi_mac_addr peer_macaddr; 424998dd2b92SManikanta Pubbisetty __le32 peer_rssi; 425098dd2b92SManikanta Pubbisetty __le32 peer_rssi_seq_num; 425198dd2b92SManikanta Pubbisetty __le32 peer_tx_rate; 425298dd2b92SManikanta Pubbisetty __le32 peer_rx_rate; 425398dd2b92SManikanta Pubbisetty __le32 current_per; 425498dd2b92SManikanta Pubbisetty __le32 retries; 425598dd2b92SManikanta Pubbisetty __le32 tx_rate_count; 425698dd2b92SManikanta Pubbisetty __le32 max_4ms_frame_len; 425798dd2b92SManikanta Pubbisetty __le32 total_sub_frames; 425898dd2b92SManikanta Pubbisetty __le32 tx_bytes; 425998dd2b92SManikanta Pubbisetty __le32 num_pkt_loss_overflow[4]; 426098dd2b92SManikanta Pubbisetty __le32 num_pkt_loss_excess_retry[4]; 426198dd2b92SManikanta Pubbisetty __le32 peer_rssi_changed; 426298dd2b92SManikanta Pubbisetty } __packed; 426398dd2b92SManikanta Pubbisetty 426420de2229SMichal Kazior struct wmi_10_2_pdev_ext_stats { 426520de2229SMichal Kazior __le32 rx_rssi_comb; 426620de2229SMichal Kazior __le32 rx_rssi[4]; 426720de2229SMichal Kazior __le32 rx_mcs[10]; 426820de2229SMichal Kazior __le32 tx_mcs[10]; 426920de2229SMichal Kazior __le32 ack_rssi; 427020de2229SMichal Kazior } __packed; 427120de2229SMichal Kazior 42725e3dd157SKalle Valo struct wmi_vdev_create_cmd { 42735e3dd157SKalle Valo __le32 vdev_id; 42745e3dd157SKalle Valo __le32 vdev_type; 42755e3dd157SKalle Valo __le32 vdev_subtype; 42765e3dd157SKalle Valo struct wmi_mac_addr vdev_macaddr; 42775e3dd157SKalle Valo } __packed; 42785e3dd157SKalle Valo 42795e3dd157SKalle Valo enum wmi_vdev_type { 42805e3dd157SKalle Valo WMI_VDEV_TYPE_AP = 1, 42815e3dd157SKalle Valo WMI_VDEV_TYPE_STA = 2, 42825e3dd157SKalle Valo WMI_VDEV_TYPE_IBSS = 3, 42835e3dd157SKalle Valo WMI_VDEV_TYPE_MONITOR = 4, 42845e3dd157SKalle Valo }; 42855e3dd157SKalle Valo 42865e3dd157SKalle Valo enum wmi_vdev_subtype { 42875e3dd157SKalle Valo WMI_VDEV_SUBTYPE_NONE = 0, 42885e3dd157SKalle Valo WMI_VDEV_SUBTYPE_P2P_DEVICE = 1, 42895e3dd157SKalle Valo WMI_VDEV_SUBTYPE_P2P_CLIENT = 2, 42905e3dd157SKalle Valo WMI_VDEV_SUBTYPE_P2P_GO = 3, 429142e08feaSPeter Oh WMI_VDEV_SUBTYPE_PROXY_STA = 4, 42920b3d76e9SPeter Oh WMI_VDEV_SUBTYPE_MESH_11S = 5, 42935e3dd157SKalle Valo }; 42945e3dd157SKalle Valo 42955e3dd157SKalle Valo /* values for vdev_subtype */ 42965e3dd157SKalle Valo 42975e3dd157SKalle Valo /* values for vdev_start_request flags */ 42985e3dd157SKalle Valo /* 42995e3dd157SKalle Valo * Indicates that AP VDEV uses hidden ssid. only valid for 43005e3dd157SKalle Valo * AP/GO */ 43015e3dd157SKalle Valo #define WMI_VDEV_START_HIDDEN_SSID (1<<0) 43025e3dd157SKalle Valo /* 43035e3dd157SKalle Valo * Indicates if robust management frame/management frame 43045e3dd157SKalle Valo * protection is enabled. For GO/AP vdevs, it indicates that 43055e3dd157SKalle Valo * it may support station/client associations with RMF enabled. 43065e3dd157SKalle Valo * For STA/client vdevs, it indicates that sta will 43075e3dd157SKalle Valo * associate with AP with RMF enabled. */ 43085e3dd157SKalle Valo #define WMI_VDEV_START_PMF_ENABLED (1<<1) 43095e3dd157SKalle Valo 43105e3dd157SKalle Valo struct wmi_p2p_noa_descriptor { 43115e3dd157SKalle Valo __le32 type_count; /* 255: continuous schedule, 0: reserved */ 43125e3dd157SKalle Valo __le32 duration; /* Absent period duration in micro seconds */ 43135e3dd157SKalle Valo __le32 interval; /* Absent period interval in micro seconds */ 43145e3dd157SKalle Valo __le32 start_time; /* 32 bit tsf time when in starts */ 43155e3dd157SKalle Valo } __packed; 43165e3dd157SKalle Valo 43175e3dd157SKalle Valo struct wmi_vdev_start_request_cmd { 43185e3dd157SKalle Valo /* WMI channel */ 43195e3dd157SKalle Valo struct wmi_channel chan; 43205e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 43215e3dd157SKalle Valo __le32 vdev_id; 43225e3dd157SKalle Valo /* requestor id identifying the caller module */ 43235e3dd157SKalle Valo __le32 requestor_id; 43245e3dd157SKalle Valo /* beacon interval from received beacon */ 43255e3dd157SKalle Valo __le32 beacon_interval; 43265e3dd157SKalle Valo /* DTIM Period from the received beacon */ 43275e3dd157SKalle Valo __le32 dtim_period; 43285e3dd157SKalle Valo /* Flags */ 43295e3dd157SKalle Valo __le32 flags; 43305e3dd157SKalle Valo /* ssid field. Only valid for AP/GO/IBSS/BTAmp VDEV type. */ 43315e3dd157SKalle Valo struct wmi_ssid ssid; 43325e3dd157SKalle Valo /* beacon/probe reponse xmit rate. Applicable for SoftAP. */ 43335e3dd157SKalle Valo __le32 bcn_tx_rate; 43345e3dd157SKalle Valo /* beacon/probe reponse xmit power. Applicable for SoftAP. */ 43355e3dd157SKalle Valo __le32 bcn_tx_power; 43365e3dd157SKalle Valo /* number of p2p NOA descriptor(s) from scan entry */ 43375e3dd157SKalle Valo __le32 num_noa_descriptors; 43385e3dd157SKalle Valo /* 43395e3dd157SKalle Valo * Disable H/W ack. This used by WMI_VDEV_RESTART_REQUEST_CMDID. 43405e3dd157SKalle Valo * During CAC, Our HW shouldn't ack ditected frames 43415e3dd157SKalle Valo */ 43425e3dd157SKalle Valo __le32 disable_hw_ack; 43435e3dd157SKalle Valo /* actual p2p NOA descriptor from scan entry */ 43445e3dd157SKalle Valo struct wmi_p2p_noa_descriptor noa_descriptors[2]; 43455e3dd157SKalle Valo } __packed; 43465e3dd157SKalle Valo 43475e3dd157SKalle Valo struct wmi_vdev_restart_request_cmd { 43485e3dd157SKalle Valo struct wmi_vdev_start_request_cmd vdev_start_request_cmd; 43495e3dd157SKalle Valo } __packed; 43505e3dd157SKalle Valo 43515e3dd157SKalle Valo struct wmi_vdev_start_request_arg { 43525e3dd157SKalle Valo u32 vdev_id; 43535e3dd157SKalle Valo struct wmi_channel_arg channel; 43545e3dd157SKalle Valo u32 bcn_intval; 43555e3dd157SKalle Valo u32 dtim_period; 43565e3dd157SKalle Valo u8 *ssid; 43575e3dd157SKalle Valo u32 ssid_len; 43585e3dd157SKalle Valo u32 bcn_tx_rate; 43595e3dd157SKalle Valo u32 bcn_tx_power; 43605e3dd157SKalle Valo bool disable_hw_ack; 43615e3dd157SKalle Valo bool hidden_ssid; 43625e3dd157SKalle Valo bool pmf_enabled; 43635e3dd157SKalle Valo }; 43645e3dd157SKalle Valo 43655e3dd157SKalle Valo struct wmi_vdev_delete_cmd { 43665e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 43675e3dd157SKalle Valo __le32 vdev_id; 43685e3dd157SKalle Valo } __packed; 43695e3dd157SKalle Valo 43705e3dd157SKalle Valo struct wmi_vdev_up_cmd { 43715e3dd157SKalle Valo __le32 vdev_id; 43725e3dd157SKalle Valo __le32 vdev_assoc_id; 43735e3dd157SKalle Valo struct wmi_mac_addr vdev_bssid; 43745e3dd157SKalle Valo } __packed; 43755e3dd157SKalle Valo 43765e3dd157SKalle Valo struct wmi_vdev_stop_cmd { 43775e3dd157SKalle Valo __le32 vdev_id; 43785e3dd157SKalle Valo } __packed; 43795e3dd157SKalle Valo 43805e3dd157SKalle Valo struct wmi_vdev_down_cmd { 43815e3dd157SKalle Valo __le32 vdev_id; 43825e3dd157SKalle Valo } __packed; 43835e3dd157SKalle Valo 43845e3dd157SKalle Valo struct wmi_vdev_standby_response_cmd { 43855e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 43865e3dd157SKalle Valo __le32 vdev_id; 43875e3dd157SKalle Valo } __packed; 43885e3dd157SKalle Valo 43895e3dd157SKalle Valo struct wmi_vdev_resume_response_cmd { 43905e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 43915e3dd157SKalle Valo __le32 vdev_id; 43925e3dd157SKalle Valo } __packed; 43935e3dd157SKalle Valo 43945e3dd157SKalle Valo struct wmi_vdev_set_param_cmd { 43955e3dd157SKalle Valo __le32 vdev_id; 43965e3dd157SKalle Valo __le32 param_id; 43975e3dd157SKalle Valo __le32 param_value; 43985e3dd157SKalle Valo } __packed; 43995e3dd157SKalle Valo 44005e3dd157SKalle Valo #define WMI_MAX_KEY_INDEX 3 44015e3dd157SKalle Valo #define WMI_MAX_KEY_LEN 32 44025e3dd157SKalle Valo 44035e3dd157SKalle Valo #define WMI_KEY_PAIRWISE 0x00 44045e3dd157SKalle Valo #define WMI_KEY_GROUP 0x01 44055e3dd157SKalle Valo #define WMI_KEY_TX_USAGE 0x02 /* default tx key - static wep */ 44065e3dd157SKalle Valo 44075e3dd157SKalle Valo struct wmi_key_seq_counter { 44085e3dd157SKalle Valo __le32 key_seq_counter_l; 44095e3dd157SKalle Valo __le32 key_seq_counter_h; 44105e3dd157SKalle Valo } __packed; 44115e3dd157SKalle Valo 44125e3dd157SKalle Valo #define WMI_CIPHER_NONE 0x0 /* clear key */ 44135e3dd157SKalle Valo #define WMI_CIPHER_WEP 0x1 44145e3dd157SKalle Valo #define WMI_CIPHER_TKIP 0x2 44155e3dd157SKalle Valo #define WMI_CIPHER_AES_OCB 0x3 44165e3dd157SKalle Valo #define WMI_CIPHER_AES_CCM 0x4 44175e3dd157SKalle Valo #define WMI_CIPHER_WAPI 0x5 44185e3dd157SKalle Valo #define WMI_CIPHER_CKIP 0x6 44195e3dd157SKalle Valo #define WMI_CIPHER_AES_CMAC 0x7 44205e3dd157SKalle Valo 44215e3dd157SKalle Valo struct wmi_vdev_install_key_cmd { 44225e3dd157SKalle Valo __le32 vdev_id; 44235e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 44245e3dd157SKalle Valo __le32 key_idx; 44255e3dd157SKalle Valo __le32 key_flags; 44265e3dd157SKalle Valo __le32 key_cipher; /* %WMI_CIPHER_ */ 44275e3dd157SKalle Valo struct wmi_key_seq_counter key_rsc_counter; 44285e3dd157SKalle Valo struct wmi_key_seq_counter key_global_rsc_counter; 44295e3dd157SKalle Valo struct wmi_key_seq_counter key_tsc_counter; 44305e3dd157SKalle Valo u8 wpi_key_rsc_counter[16]; 44315e3dd157SKalle Valo u8 wpi_key_tsc_counter[16]; 44325e3dd157SKalle Valo __le32 key_len; 44335e3dd157SKalle Valo __le32 key_txmic_len; 44345e3dd157SKalle Valo __le32 key_rxmic_len; 44355e3dd157SKalle Valo 44365e3dd157SKalle Valo /* contains key followed by tx mic followed by rx mic */ 44375e3dd157SKalle Valo u8 key_data[0]; 44385e3dd157SKalle Valo } __packed; 44395e3dd157SKalle Valo 44405e3dd157SKalle Valo struct wmi_vdev_install_key_arg { 44415e3dd157SKalle Valo u32 vdev_id; 44425e3dd157SKalle Valo const u8 *macaddr; 44435e3dd157SKalle Valo u32 key_idx; 44445e3dd157SKalle Valo u32 key_flags; 44455e3dd157SKalle Valo u32 key_cipher; 44465e3dd157SKalle Valo u32 key_len; 44475e3dd157SKalle Valo u32 key_txmic_len; 44485e3dd157SKalle Valo u32 key_rxmic_len; 44495e3dd157SKalle Valo const void *key_data; 44505e3dd157SKalle Valo }; 44515e3dd157SKalle Valo 445251ab1a0aSJanusz Dziedzic /* 445351ab1a0aSJanusz Dziedzic * vdev fixed rate format: 445451ab1a0aSJanusz Dziedzic * - preamble - b7:b6 - see WMI_RATE_PREMABLE_ 445551ab1a0aSJanusz Dziedzic * - nss - b5:b4 - ss number (0 mean 1ss) 445651ab1a0aSJanusz Dziedzic * - rate_mcs - b3:b0 - as below 445751ab1a0aSJanusz Dziedzic * CCK: 0 - 11Mbps, 1 - 5,5Mbps, 2 - 2Mbps, 3 - 1Mbps, 445851ab1a0aSJanusz Dziedzic * 4 - 11Mbps (s), 5 - 5,5Mbps (s), 6 - 2Mbps (s) 445951ab1a0aSJanusz Dziedzic * OFDM: 0 - 48Mbps, 1 - 24Mbps, 2 - 12Mbps, 3 - 6Mbps, 446051ab1a0aSJanusz Dziedzic * 4 - 54Mbps, 5 - 36Mbps, 6 - 18Mbps, 7 - 9Mbps 446151ab1a0aSJanusz Dziedzic * HT/VHT: MCS index 446251ab1a0aSJanusz Dziedzic */ 446351ab1a0aSJanusz Dziedzic 44645e3dd157SKalle Valo /* Preamble types to be used with VDEV fixed rate configuration */ 44655e3dd157SKalle Valo enum wmi_rate_preamble { 44665e3dd157SKalle Valo WMI_RATE_PREAMBLE_OFDM, 44675e3dd157SKalle Valo WMI_RATE_PREAMBLE_CCK, 44685e3dd157SKalle Valo WMI_RATE_PREAMBLE_HT, 44695e3dd157SKalle Valo WMI_RATE_PREAMBLE_VHT, 44705e3dd157SKalle Valo }; 44715e3dd157SKalle Valo 447229542666SMaharaja Kennadyrajan #define ATH10K_HW_NSS(rate) (1 + (((rate) >> 4) & 0x3)) 447329542666SMaharaja Kennadyrajan #define ATH10K_HW_PREAMBLE(rate) (((rate) >> 6) & 0x3) 447429542666SMaharaja Kennadyrajan #define ATH10K_HW_RATECODE(rate, nss, preamble) \ 447529542666SMaharaja Kennadyrajan (((preamble) << 6) | ((nss) << 4) | (rate)) 447629542666SMaharaja Kennadyrajan 44775e3dd157SKalle Valo /* Value to disable fixed rate setting */ 44785e3dd157SKalle Valo #define WMI_FIXED_RATE_NONE (0xff) 44795e3dd157SKalle Valo 44806d1506e7SBartosz Markowski struct wmi_vdev_param_map { 44816d1506e7SBartosz Markowski u32 rts_threshold; 44826d1506e7SBartosz Markowski u32 fragmentation_threshold; 44836d1506e7SBartosz Markowski u32 beacon_interval; 44846d1506e7SBartosz Markowski u32 listen_interval; 44856d1506e7SBartosz Markowski u32 multicast_rate; 44866d1506e7SBartosz Markowski u32 mgmt_tx_rate; 44876d1506e7SBartosz Markowski u32 slot_time; 44886d1506e7SBartosz Markowski u32 preamble; 44896d1506e7SBartosz Markowski u32 swba_time; 44906d1506e7SBartosz Markowski u32 wmi_vdev_stats_update_period; 44916d1506e7SBartosz Markowski u32 wmi_vdev_pwrsave_ageout_time; 44926d1506e7SBartosz Markowski u32 wmi_vdev_host_swba_interval; 44936d1506e7SBartosz Markowski u32 dtim_period; 44946d1506e7SBartosz Markowski u32 wmi_vdev_oc_scheduler_air_time_limit; 44956d1506e7SBartosz Markowski u32 wds; 44966d1506e7SBartosz Markowski u32 atim_window; 44976d1506e7SBartosz Markowski u32 bmiss_count_max; 44986d1506e7SBartosz Markowski u32 bmiss_first_bcnt; 44996d1506e7SBartosz Markowski u32 bmiss_final_bcnt; 45006d1506e7SBartosz Markowski u32 feature_wmm; 45016d1506e7SBartosz Markowski u32 chwidth; 45026d1506e7SBartosz Markowski u32 chextoffset; 45036d1506e7SBartosz Markowski u32 disable_htprotection; 45046d1506e7SBartosz Markowski u32 sta_quickkickout; 45056d1506e7SBartosz Markowski u32 mgmt_rate; 45066d1506e7SBartosz Markowski u32 protection_mode; 45076d1506e7SBartosz Markowski u32 fixed_rate; 45086d1506e7SBartosz Markowski u32 sgi; 45096d1506e7SBartosz Markowski u32 ldpc; 45106d1506e7SBartosz Markowski u32 tx_stbc; 45116d1506e7SBartosz Markowski u32 rx_stbc; 45126d1506e7SBartosz Markowski u32 intra_bss_fwd; 45136d1506e7SBartosz Markowski u32 def_keyid; 45146d1506e7SBartosz Markowski u32 nss; 45156d1506e7SBartosz Markowski u32 bcast_data_rate; 45166d1506e7SBartosz Markowski u32 mcast_data_rate; 45176d1506e7SBartosz Markowski u32 mcast_indicate; 45186d1506e7SBartosz Markowski u32 dhcp_indicate; 45196d1506e7SBartosz Markowski u32 unknown_dest_indicate; 45206d1506e7SBartosz Markowski u32 ap_keepalive_min_idle_inactive_time_secs; 45216d1506e7SBartosz Markowski u32 ap_keepalive_max_idle_inactive_time_secs; 45226d1506e7SBartosz Markowski u32 ap_keepalive_max_unresponsive_time_secs; 45236d1506e7SBartosz Markowski u32 ap_enable_nawds; 45246d1506e7SBartosz Markowski u32 mcast2ucast_set; 45256d1506e7SBartosz Markowski u32 enable_rtscts; 45266d1506e7SBartosz Markowski u32 txbf; 45276d1506e7SBartosz Markowski u32 packet_powersave; 45286d1506e7SBartosz Markowski u32 drop_unencry; 45296d1506e7SBartosz Markowski u32 tx_encap_type; 45306d1506e7SBartosz Markowski u32 ap_detect_out_of_sync_sleeping_sta_time_secs; 453193841a15SRaja Mani u32 rc_num_retries; 453293841a15SRaja Mani u32 cabq_maxdur; 453393841a15SRaja Mani u32 mfptest_set; 453493841a15SRaja Mani u32 rts_fixed_rate; 453593841a15SRaja Mani u32 vht_sgimask; 453693841a15SRaja Mani u32 vht80_ratemask; 453793841a15SRaja Mani u32 early_rx_adjust_enable; 453893841a15SRaja Mani u32 early_rx_tgt_bmiss_num; 453993841a15SRaja Mani u32 early_rx_bmiss_sample_cycle; 454093841a15SRaja Mani u32 early_rx_slop_step; 454193841a15SRaja Mani u32 early_rx_init_slop; 454293841a15SRaja Mani u32 early_rx_adjust_pause; 454393841a15SRaja Mani u32 proxy_sta; 454493841a15SRaja Mani u32 meru_vc; 454593841a15SRaja Mani u32 rx_decap_type; 454693841a15SRaja Mani u32 bw_nss_ratemask; 45476d1506e7SBartosz Markowski }; 45486d1506e7SBartosz Markowski 45496d1506e7SBartosz Markowski #define WMI_VDEV_PARAM_UNSUPPORTED 0 45506d1506e7SBartosz Markowski 45515e3dd157SKalle Valo /* the definition of different VDEV parameters */ 45525e3dd157SKalle Valo enum wmi_vdev_param { 45535e3dd157SKalle Valo /* RTS Threshold */ 45545e3dd157SKalle Valo WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 45555e3dd157SKalle Valo /* Fragmentation threshold */ 45565e3dd157SKalle Valo WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 45575e3dd157SKalle Valo /* beacon interval in TUs */ 45585e3dd157SKalle Valo WMI_VDEV_PARAM_BEACON_INTERVAL, 45595e3dd157SKalle Valo /* Listen interval in TUs */ 45605e3dd157SKalle Valo WMI_VDEV_PARAM_LISTEN_INTERVAL, 45615e3dd157SKalle Valo /* muticast rate in Mbps */ 45625e3dd157SKalle Valo WMI_VDEV_PARAM_MULTICAST_RATE, 45635e3dd157SKalle Valo /* management frame rate in Mbps */ 45645e3dd157SKalle Valo WMI_VDEV_PARAM_MGMT_TX_RATE, 45655e3dd157SKalle Valo /* slot time (long vs short) */ 45665e3dd157SKalle Valo WMI_VDEV_PARAM_SLOT_TIME, 45675e3dd157SKalle Valo /* preamble (long vs short) */ 45685e3dd157SKalle Valo WMI_VDEV_PARAM_PREAMBLE, 45695e3dd157SKalle Valo /* SWBA time (time before tbtt in msec) */ 45705e3dd157SKalle Valo WMI_VDEV_PARAM_SWBA_TIME, 45715e3dd157SKalle Valo /* time period for updating VDEV stats */ 45725e3dd157SKalle Valo WMI_VDEV_STATS_UPDATE_PERIOD, 45735e3dd157SKalle Valo /* age out time in msec for frames queued for station in power save */ 45745e3dd157SKalle Valo WMI_VDEV_PWRSAVE_AGEOUT_TIME, 45755e3dd157SKalle Valo /* 45765e3dd157SKalle Valo * Host SWBA interval (time in msec before tbtt for SWBA event 45775e3dd157SKalle Valo * generation). 45785e3dd157SKalle Valo */ 45795e3dd157SKalle Valo WMI_VDEV_HOST_SWBA_INTERVAL, 45805e3dd157SKalle Valo /* DTIM period (specified in units of num beacon intervals) */ 45815e3dd157SKalle Valo WMI_VDEV_PARAM_DTIM_PERIOD, 45825e3dd157SKalle Valo /* 45835e3dd157SKalle Valo * scheduler air time limit for this VDEV. used by off chan 45845e3dd157SKalle Valo * scheduler. 45855e3dd157SKalle Valo */ 45865e3dd157SKalle Valo WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 45875e3dd157SKalle Valo /* enable/dsiable WDS for this VDEV */ 45885e3dd157SKalle Valo WMI_VDEV_PARAM_WDS, 45895e3dd157SKalle Valo /* ATIM Window */ 45905e3dd157SKalle Valo WMI_VDEV_PARAM_ATIM_WINDOW, 45915e3dd157SKalle Valo /* BMISS max */ 45925e3dd157SKalle Valo WMI_VDEV_PARAM_BMISS_COUNT_MAX, 45935e3dd157SKalle Valo /* BMISS first time */ 45945e3dd157SKalle Valo WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 45955e3dd157SKalle Valo /* BMISS final time */ 45965e3dd157SKalle Valo WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 45975e3dd157SKalle Valo /* WMM enables/disabled */ 45985e3dd157SKalle Valo WMI_VDEV_PARAM_FEATURE_WMM, 45995e3dd157SKalle Valo /* Channel width */ 46005e3dd157SKalle Valo WMI_VDEV_PARAM_CHWIDTH, 46015e3dd157SKalle Valo /* Channel Offset */ 46025e3dd157SKalle Valo WMI_VDEV_PARAM_CHEXTOFFSET, 46035e3dd157SKalle Valo /* Disable HT Protection */ 46045e3dd157SKalle Valo WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 46055e3dd157SKalle Valo /* Quick STA Kickout */ 46065e3dd157SKalle Valo WMI_VDEV_PARAM_STA_QUICKKICKOUT, 46075e3dd157SKalle Valo /* Rate to be used with Management frames */ 46085e3dd157SKalle Valo WMI_VDEV_PARAM_MGMT_RATE, 46095e3dd157SKalle Valo /* Protection Mode */ 46105e3dd157SKalle Valo WMI_VDEV_PARAM_PROTECTION_MODE, 46115e3dd157SKalle Valo /* Fixed rate setting */ 46125e3dd157SKalle Valo WMI_VDEV_PARAM_FIXED_RATE, 46135e3dd157SKalle Valo /* Short GI Enable/Disable */ 46145e3dd157SKalle Valo WMI_VDEV_PARAM_SGI, 46155e3dd157SKalle Valo /* Enable LDPC */ 46165e3dd157SKalle Valo WMI_VDEV_PARAM_LDPC, 46175e3dd157SKalle Valo /* Enable Tx STBC */ 46185e3dd157SKalle Valo WMI_VDEV_PARAM_TX_STBC, 46195e3dd157SKalle Valo /* Enable Rx STBC */ 46205e3dd157SKalle Valo WMI_VDEV_PARAM_RX_STBC, 46215e3dd157SKalle Valo /* Intra BSS forwarding */ 46225e3dd157SKalle Valo WMI_VDEV_PARAM_INTRA_BSS_FWD, 46235e3dd157SKalle Valo /* Setting Default xmit key for Vdev */ 46245e3dd157SKalle Valo WMI_VDEV_PARAM_DEF_KEYID, 46255e3dd157SKalle Valo /* NSS width */ 46265e3dd157SKalle Valo WMI_VDEV_PARAM_NSS, 46275e3dd157SKalle Valo /* Set the custom rate for the broadcast data frames */ 46285e3dd157SKalle Valo WMI_VDEV_PARAM_BCAST_DATA_RATE, 46295e3dd157SKalle Valo /* Set the custom rate (rate-code) for multicast data frames */ 46305e3dd157SKalle Valo WMI_VDEV_PARAM_MCAST_DATA_RATE, 46315e3dd157SKalle Valo /* Tx multicast packet indicate Enable/Disable */ 46325e3dd157SKalle Valo WMI_VDEV_PARAM_MCAST_INDICATE, 46335e3dd157SKalle Valo /* Tx DHCP packet indicate Enable/Disable */ 46345e3dd157SKalle Valo WMI_VDEV_PARAM_DHCP_INDICATE, 46355e3dd157SKalle Valo /* Enable host inspection of Tx unicast packet to unknown destination */ 46365e3dd157SKalle Valo WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 46375e3dd157SKalle Valo 46385e3dd157SKalle Valo /* The minimum amount of time AP begins to consider STA inactive */ 46395e3dd157SKalle Valo WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 46405e3dd157SKalle Valo 46415e3dd157SKalle Valo /* 46425e3dd157SKalle Valo * An associated STA is considered inactive when there is no recent 46435e3dd157SKalle Valo * TX/RX activity and no downlink frames are buffered for it. Once a 46445e3dd157SKalle Valo * STA exceeds the maximum idle inactive time, the AP will send an 46455e3dd157SKalle Valo * 802.11 data-null as a keep alive to verify the STA is still 46465e3dd157SKalle Valo * associated. If the STA does ACK the data-null, or if the data-null 46475e3dd157SKalle Valo * is buffered and the STA does not retrieve it, the STA will be 46485e3dd157SKalle Valo * considered unresponsive 46495e3dd157SKalle Valo * (see WMI_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS). 46505e3dd157SKalle Valo */ 46515e3dd157SKalle Valo WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 46525e3dd157SKalle Valo 46535e3dd157SKalle Valo /* 46545e3dd157SKalle Valo * An associated STA is considered unresponsive if there is no recent 46555e3dd157SKalle Valo * TX/RX activity and downlink frames are buffered for it. Once a STA 46565e3dd157SKalle Valo * exceeds the maximum unresponsive time, the AP will send a 46575e3dd157SKalle Valo * WMI_STA_KICKOUT event to the host so the STA can be deleted. */ 46585e3dd157SKalle Valo WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 46595e3dd157SKalle Valo 46605e3dd157SKalle Valo /* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */ 46615e3dd157SKalle Valo WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 46625e3dd157SKalle Valo /* Enable/Disable RTS-CTS */ 46635e3dd157SKalle Valo WMI_VDEV_PARAM_ENABLE_RTSCTS, 46645e3dd157SKalle Valo /* Enable TXBFee/er */ 46655e3dd157SKalle Valo WMI_VDEV_PARAM_TXBF, 46665e3dd157SKalle Valo 46675e3dd157SKalle Valo /* Set packet power save */ 46685e3dd157SKalle Valo WMI_VDEV_PARAM_PACKET_POWERSAVE, 46695e3dd157SKalle Valo 46705e3dd157SKalle Valo /* 46715e3dd157SKalle Valo * Drops un-encrypted packets if eceived in an encrypted connection 46725e3dd157SKalle Valo * otherwise forwards to host. 46735e3dd157SKalle Valo */ 46745e3dd157SKalle Valo WMI_VDEV_PARAM_DROP_UNENCRY, 46755e3dd157SKalle Valo 46765e3dd157SKalle Valo /* 46775e3dd157SKalle Valo * Set the encapsulation type for frames. 46785e3dd157SKalle Valo */ 46795e3dd157SKalle Valo WMI_VDEV_PARAM_TX_ENCAP_TYPE, 46805e3dd157SKalle Valo }; 46815e3dd157SKalle Valo 46826d1506e7SBartosz Markowski /* the definition of different VDEV parameters */ 46836d1506e7SBartosz Markowski enum wmi_10x_vdev_param { 46846d1506e7SBartosz Markowski /* RTS Threshold */ 46856d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1, 46866d1506e7SBartosz Markowski /* Fragmentation threshold */ 46876d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 46886d1506e7SBartosz Markowski /* beacon interval in TUs */ 46896d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_BEACON_INTERVAL, 46906d1506e7SBartosz Markowski /* Listen interval in TUs */ 46916d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, 46926d1506e7SBartosz Markowski /* muticast rate in Mbps */ 46936d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MULTICAST_RATE, 46946d1506e7SBartosz Markowski /* management frame rate in Mbps */ 46956d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MGMT_TX_RATE, 46966d1506e7SBartosz Markowski /* slot time (long vs short) */ 46976d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_SLOT_TIME, 46986d1506e7SBartosz Markowski /* preamble (long vs short) */ 46996d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_PREAMBLE, 47006d1506e7SBartosz Markowski /* SWBA time (time before tbtt in msec) */ 47016d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_SWBA_TIME, 47026d1506e7SBartosz Markowski /* time period for updating VDEV stats */ 47036d1506e7SBartosz Markowski WMI_10X_VDEV_STATS_UPDATE_PERIOD, 47046d1506e7SBartosz Markowski /* age out time in msec for frames queued for station in power save */ 47056d1506e7SBartosz Markowski WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, 47066d1506e7SBartosz Markowski /* 47076d1506e7SBartosz Markowski * Host SWBA interval (time in msec before tbtt for SWBA event 47086d1506e7SBartosz Markowski * generation). 47096d1506e7SBartosz Markowski */ 47106d1506e7SBartosz Markowski WMI_10X_VDEV_HOST_SWBA_INTERVAL, 47116d1506e7SBartosz Markowski /* DTIM period (specified in units of num beacon intervals) */ 47126d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_DTIM_PERIOD, 47136d1506e7SBartosz Markowski /* 47146d1506e7SBartosz Markowski * scheduler air time limit for this VDEV. used by off chan 47156d1506e7SBartosz Markowski * scheduler. 47166d1506e7SBartosz Markowski */ 47176d1506e7SBartosz Markowski WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 47186d1506e7SBartosz Markowski /* enable/dsiable WDS for this VDEV */ 47196d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_WDS, 47206d1506e7SBartosz Markowski /* ATIM Window */ 47216d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_ATIM_WINDOW, 47226d1506e7SBartosz Markowski /* BMISS max */ 47236d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, 47246d1506e7SBartosz Markowski /* WMM enables/disabled */ 47256d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_FEATURE_WMM, 47266d1506e7SBartosz Markowski /* Channel width */ 47276d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_CHWIDTH, 47286d1506e7SBartosz Markowski /* Channel Offset */ 47296d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_CHEXTOFFSET, 47306d1506e7SBartosz Markowski /* Disable HT Protection */ 47316d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, 47326d1506e7SBartosz Markowski /* Quick STA Kickout */ 47336d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, 47346d1506e7SBartosz Markowski /* Rate to be used with Management frames */ 47356d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MGMT_RATE, 47366d1506e7SBartosz Markowski /* Protection Mode */ 47376d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_PROTECTION_MODE, 47386d1506e7SBartosz Markowski /* Fixed rate setting */ 47396d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_FIXED_RATE, 47406d1506e7SBartosz Markowski /* Short GI Enable/Disable */ 47416d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_SGI, 47426d1506e7SBartosz Markowski /* Enable LDPC */ 47436d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_LDPC, 47446d1506e7SBartosz Markowski /* Enable Tx STBC */ 47456d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_TX_STBC, 47466d1506e7SBartosz Markowski /* Enable Rx STBC */ 47476d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_RX_STBC, 47486d1506e7SBartosz Markowski /* Intra BSS forwarding */ 47496d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, 47506d1506e7SBartosz Markowski /* Setting Default xmit key for Vdev */ 47516d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_DEF_KEYID, 47526d1506e7SBartosz Markowski /* NSS width */ 47536d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_NSS, 47546d1506e7SBartosz Markowski /* Set the custom rate for the broadcast data frames */ 47556d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, 47566d1506e7SBartosz Markowski /* Set the custom rate (rate-code) for multicast data frames */ 47576d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, 47586d1506e7SBartosz Markowski /* Tx multicast packet indicate Enable/Disable */ 47596d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MCAST_INDICATE, 47606d1506e7SBartosz Markowski /* Tx DHCP packet indicate Enable/Disable */ 47616d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_DHCP_INDICATE, 47626d1506e7SBartosz Markowski /* Enable host inspection of Tx unicast packet to unknown destination */ 47636d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 47646d1506e7SBartosz Markowski 47656d1506e7SBartosz Markowski /* The minimum amount of time AP begins to consider STA inactive */ 47666d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 47676d1506e7SBartosz Markowski 47686d1506e7SBartosz Markowski /* 47696d1506e7SBartosz Markowski * An associated STA is considered inactive when there is no recent 47706d1506e7SBartosz Markowski * TX/RX activity and no downlink frames are buffered for it. Once a 47716d1506e7SBartosz Markowski * STA exceeds the maximum idle inactive time, the AP will send an 47726d1506e7SBartosz Markowski * 802.11 data-null as a keep alive to verify the STA is still 47736d1506e7SBartosz Markowski * associated. If the STA does ACK the data-null, or if the data-null 47746d1506e7SBartosz Markowski * is buffered and the STA does not retrieve it, the STA will be 47756d1506e7SBartosz Markowski * considered unresponsive 47766d1506e7SBartosz Markowski * (see WMI_10X_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS). 47776d1506e7SBartosz Markowski */ 47786d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 47796d1506e7SBartosz Markowski 47806d1506e7SBartosz Markowski /* 47816d1506e7SBartosz Markowski * An associated STA is considered unresponsive if there is no recent 47826d1506e7SBartosz Markowski * TX/RX activity and downlink frames are buffered for it. Once a STA 47836d1506e7SBartosz Markowski * exceeds the maximum unresponsive time, the AP will send a 47846d1506e7SBartosz Markowski * WMI_10X_STA_KICKOUT event to the host so the STA can be deleted. */ 47856d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 47866d1506e7SBartosz Markowski 47876d1506e7SBartosz Markowski /* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */ 47886d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, 47896d1506e7SBartosz Markowski 47906d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, 47916d1506e7SBartosz Markowski /* Enable/Disable RTS-CTS */ 47926d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, 47936d1506e7SBartosz Markowski 47946d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 479524c88f78SMichal Kazior 479624c88f78SMichal Kazior /* following are available as of firmware 10.2 */ 479724c88f78SMichal Kazior WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE, 479824c88f78SMichal Kazior WMI_10X_VDEV_PARAM_CABQ_MAXDUR, 479924c88f78SMichal Kazior WMI_10X_VDEV_PARAM_MFPTEST_SET, 480024c88f78SMichal Kazior WMI_10X_VDEV_PARAM_RTS_FIXED_RATE, 480124c88f78SMichal Kazior WMI_10X_VDEV_PARAM_VHT_SGIMASK, 480224c88f78SMichal Kazior WMI_10X_VDEV_PARAM_VHT80_RATEMASK, 48036d1506e7SBartosz Markowski }; 48046d1506e7SBartosz Markowski 480593841a15SRaja Mani enum wmi_10_4_vdev_param { 480693841a15SRaja Mani WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1, 480793841a15SRaja Mani WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 480893841a15SRaja Mani WMI_10_4_VDEV_PARAM_BEACON_INTERVAL, 480993841a15SRaja Mani WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL, 481093841a15SRaja Mani WMI_10_4_VDEV_PARAM_MULTICAST_RATE, 481193841a15SRaja Mani WMI_10_4_VDEV_PARAM_MGMT_TX_RATE, 481293841a15SRaja Mani WMI_10_4_VDEV_PARAM_SLOT_TIME, 481393841a15SRaja Mani WMI_10_4_VDEV_PARAM_PREAMBLE, 481493841a15SRaja Mani WMI_10_4_VDEV_PARAM_SWBA_TIME, 481593841a15SRaja Mani WMI_10_4_VDEV_STATS_UPDATE_PERIOD, 481693841a15SRaja Mani WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME, 481793841a15SRaja Mani WMI_10_4_VDEV_HOST_SWBA_INTERVAL, 481893841a15SRaja Mani WMI_10_4_VDEV_PARAM_DTIM_PERIOD, 481993841a15SRaja Mani WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 482093841a15SRaja Mani WMI_10_4_VDEV_PARAM_WDS, 482193841a15SRaja Mani WMI_10_4_VDEV_PARAM_ATIM_WINDOW, 482293841a15SRaja Mani WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX, 482393841a15SRaja Mani WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT, 482493841a15SRaja Mani WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT, 482593841a15SRaja Mani WMI_10_4_VDEV_PARAM_FEATURE_WMM, 482693841a15SRaja Mani WMI_10_4_VDEV_PARAM_CHWIDTH, 482793841a15SRaja Mani WMI_10_4_VDEV_PARAM_CHEXTOFFSET, 482893841a15SRaja Mani WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION, 482993841a15SRaja Mani WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT, 483093841a15SRaja Mani WMI_10_4_VDEV_PARAM_MGMT_RATE, 483193841a15SRaja Mani WMI_10_4_VDEV_PARAM_PROTECTION_MODE, 483293841a15SRaja Mani WMI_10_4_VDEV_PARAM_FIXED_RATE, 483393841a15SRaja Mani WMI_10_4_VDEV_PARAM_SGI, 483493841a15SRaja Mani WMI_10_4_VDEV_PARAM_LDPC, 483593841a15SRaja Mani WMI_10_4_VDEV_PARAM_TX_STBC, 483693841a15SRaja Mani WMI_10_4_VDEV_PARAM_RX_STBC, 483793841a15SRaja Mani WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD, 483893841a15SRaja Mani WMI_10_4_VDEV_PARAM_DEF_KEYID, 483993841a15SRaja Mani WMI_10_4_VDEV_PARAM_NSS, 484093841a15SRaja Mani WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE, 484193841a15SRaja Mani WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE, 484293841a15SRaja Mani WMI_10_4_VDEV_PARAM_MCAST_INDICATE, 484393841a15SRaja Mani WMI_10_4_VDEV_PARAM_DHCP_INDICATE, 484493841a15SRaja Mani WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 484593841a15SRaja Mani WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 484693841a15SRaja Mani WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 484793841a15SRaja Mani WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 484893841a15SRaja Mani WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS, 484993841a15SRaja Mani WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET, 485093841a15SRaja Mani WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS, 485193841a15SRaja Mani WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES, 485293841a15SRaja Mani WMI_10_4_VDEV_PARAM_TXBF, 485393841a15SRaja Mani WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE, 485493841a15SRaja Mani WMI_10_4_VDEV_PARAM_DROP_UNENCRY, 485593841a15SRaja Mani WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE, 485693841a15SRaja Mani WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 485793841a15SRaja Mani WMI_10_4_VDEV_PARAM_CABQ_MAXDUR, 485893841a15SRaja Mani WMI_10_4_VDEV_PARAM_MFPTEST_SET, 485993841a15SRaja Mani WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE, 486093841a15SRaja Mani WMI_10_4_VDEV_PARAM_VHT_SGIMASK, 486193841a15SRaja Mani WMI_10_4_VDEV_PARAM_VHT80_RATEMASK, 486293841a15SRaja Mani WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 486393841a15SRaja Mani WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 486493841a15SRaja Mani WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 486593841a15SRaja Mani WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP, 486693841a15SRaja Mani WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP, 486793841a15SRaja Mani WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 486893841a15SRaja Mani WMI_10_4_VDEV_PARAM_PROXY_STA, 486993841a15SRaja Mani WMI_10_4_VDEV_PARAM_MERU_VC, 487093841a15SRaja Mani WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE, 487193841a15SRaja Mani WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK, 487293841a15SRaja Mani }; 487393841a15SRaja Mani 4874139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 4875139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 4876139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 4877139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 4878139e170dSMichal Kazior 4879a48e2cc8SVivek Natarajan #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 4880a48e2cc8SVivek Natarajan #define WMI_TXBF_STS_CAP_OFFSET_MASK 0xf0 4881a48e2cc8SVivek Natarajan #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 4882a48e2cc8SVivek Natarajan #define WMI_BF_SOUND_DIM_OFFSET_MASK 0xf00 4883a48e2cc8SVivek Natarajan 48845e3dd157SKalle Valo /* slot time long */ 48855e3dd157SKalle Valo #define WMI_VDEV_SLOT_TIME_LONG 0x1 48865e3dd157SKalle Valo /* slot time short */ 48875e3dd157SKalle Valo #define WMI_VDEV_SLOT_TIME_SHORT 0x2 48885e3dd157SKalle Valo /* preablbe long */ 48895e3dd157SKalle Valo #define WMI_VDEV_PREAMBLE_LONG 0x1 48905e3dd157SKalle Valo /* preablbe short */ 48915e3dd157SKalle Valo #define WMI_VDEV_PREAMBLE_SHORT 0x2 48925e3dd157SKalle Valo 48935e3dd157SKalle Valo enum wmi_start_event_param { 48945e3dd157SKalle Valo WMI_VDEV_RESP_START_EVENT = 0, 48955e3dd157SKalle Valo WMI_VDEV_RESP_RESTART_EVENT, 48965e3dd157SKalle Valo }; 48975e3dd157SKalle Valo 48985e3dd157SKalle Valo struct wmi_vdev_start_response_event { 48995e3dd157SKalle Valo __le32 vdev_id; 49005e3dd157SKalle Valo __le32 req_id; 49015e3dd157SKalle Valo __le32 resp_type; /* %WMI_VDEV_RESP_ */ 49025e3dd157SKalle Valo __le32 status; 49035e3dd157SKalle Valo } __packed; 49045e3dd157SKalle Valo 49055e3dd157SKalle Valo struct wmi_vdev_standby_req_event { 49065e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 49075e3dd157SKalle Valo __le32 vdev_id; 49085e3dd157SKalle Valo } __packed; 49095e3dd157SKalle Valo 49105e3dd157SKalle Valo struct wmi_vdev_resume_req_event { 49115e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 49125e3dd157SKalle Valo __le32 vdev_id; 49135e3dd157SKalle Valo } __packed; 49145e3dd157SKalle Valo 49155e3dd157SKalle Valo struct wmi_vdev_stopped_event { 49165e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 49175e3dd157SKalle Valo __le32 vdev_id; 49185e3dd157SKalle Valo } __packed; 49195e3dd157SKalle Valo 49205e3dd157SKalle Valo /* 49215e3dd157SKalle Valo * common structure used for simple events 49225e3dd157SKalle Valo * (stopped, resume_req, standby response) 49235e3dd157SKalle Valo */ 49245e3dd157SKalle Valo struct wmi_vdev_simple_event { 49255e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 49265e3dd157SKalle Valo __le32 vdev_id; 49275e3dd157SKalle Valo } __packed; 49285e3dd157SKalle Valo 49295e3dd157SKalle Valo /* VDEV start response status codes */ 49305e3dd157SKalle Valo /* VDEV succesfully started */ 49315e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0 49325e3dd157SKalle Valo 49335e3dd157SKalle Valo /* requested VDEV not found */ 49345e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID 0x1 49355e3dd157SKalle Valo 49365e3dd157SKalle Valo /* unsupported VDEV combination */ 49375e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED 0x2 49385e3dd157SKalle Valo 4939855aed12SSimon Wunderlich /* TODO: please add more comments if you have in-depth information */ 4940855aed12SSimon Wunderlich struct wmi_vdev_spectral_conf_cmd { 4941855aed12SSimon Wunderlich __le32 vdev_id; 4942855aed12SSimon Wunderlich 4943855aed12SSimon Wunderlich /* number of fft samples to send (0 for infinite) */ 4944855aed12SSimon Wunderlich __le32 scan_count; 4945855aed12SSimon Wunderlich __le32 scan_period; 4946855aed12SSimon Wunderlich __le32 scan_priority; 4947855aed12SSimon Wunderlich 4948855aed12SSimon Wunderlich /* number of bins in the FFT: 2^(fft_size - bin_scale) */ 4949855aed12SSimon Wunderlich __le32 scan_fft_size; 4950855aed12SSimon Wunderlich __le32 scan_gc_ena; 4951855aed12SSimon Wunderlich __le32 scan_restart_ena; 4952855aed12SSimon Wunderlich __le32 scan_noise_floor_ref; 4953855aed12SSimon Wunderlich __le32 scan_init_delay; 4954855aed12SSimon Wunderlich __le32 scan_nb_tone_thr; 4955855aed12SSimon Wunderlich __le32 scan_str_bin_thr; 4956855aed12SSimon Wunderlich __le32 scan_wb_rpt_mode; 4957855aed12SSimon Wunderlich __le32 scan_rssi_rpt_mode; 4958855aed12SSimon Wunderlich __le32 scan_rssi_thr; 4959855aed12SSimon Wunderlich __le32 scan_pwr_format; 4960855aed12SSimon Wunderlich 4961855aed12SSimon Wunderlich /* rpt_mode: Format of FFT report to software for spectral scan 4962855aed12SSimon Wunderlich * triggered FFTs: 4963855aed12SSimon Wunderlich * 0: No FFT report (only spectral scan summary report) 4964855aed12SSimon Wunderlich * 1: 2-dword summary of metrics for each completed FFT + spectral 4965855aed12SSimon Wunderlich * scan summary report 4966855aed12SSimon Wunderlich * 2: 2-dword summary of metrics for each completed FFT + 4967855aed12SSimon Wunderlich * 1x- oversampled bins(in-band) per FFT + spectral scan summary 4968855aed12SSimon Wunderlich * report 4969855aed12SSimon Wunderlich * 3: 2-dword summary of metrics for each completed FFT + 4970855aed12SSimon Wunderlich * 2x- oversampled bins (all) per FFT + spectral scan summary 4971855aed12SSimon Wunderlich */ 4972855aed12SSimon Wunderlich __le32 scan_rpt_mode; 4973855aed12SSimon Wunderlich __le32 scan_bin_scale; 4974855aed12SSimon Wunderlich __le32 scan_dbm_adj; 4975855aed12SSimon Wunderlich __le32 scan_chn_mask; 4976855aed12SSimon Wunderlich } __packed; 4977855aed12SSimon Wunderlich 4978855aed12SSimon Wunderlich struct wmi_vdev_spectral_conf_arg { 4979855aed12SSimon Wunderlich u32 vdev_id; 4980855aed12SSimon Wunderlich u32 scan_count; 4981855aed12SSimon Wunderlich u32 scan_period; 4982855aed12SSimon Wunderlich u32 scan_priority; 4983855aed12SSimon Wunderlich u32 scan_fft_size; 4984855aed12SSimon Wunderlich u32 scan_gc_ena; 4985855aed12SSimon Wunderlich u32 scan_restart_ena; 4986855aed12SSimon Wunderlich u32 scan_noise_floor_ref; 4987855aed12SSimon Wunderlich u32 scan_init_delay; 4988855aed12SSimon Wunderlich u32 scan_nb_tone_thr; 4989855aed12SSimon Wunderlich u32 scan_str_bin_thr; 4990855aed12SSimon Wunderlich u32 scan_wb_rpt_mode; 4991855aed12SSimon Wunderlich u32 scan_rssi_rpt_mode; 4992855aed12SSimon Wunderlich u32 scan_rssi_thr; 4993855aed12SSimon Wunderlich u32 scan_pwr_format; 4994855aed12SSimon Wunderlich u32 scan_rpt_mode; 4995855aed12SSimon Wunderlich u32 scan_bin_scale; 4996855aed12SSimon Wunderlich u32 scan_dbm_adj; 4997855aed12SSimon Wunderlich u32 scan_chn_mask; 4998855aed12SSimon Wunderlich }; 4999855aed12SSimon Wunderlich 5000855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_DEFAULT 0 5001855aed12SSimon Wunderlich #define WMI_SPECTRAL_COUNT_DEFAULT 0 5002855aed12SSimon Wunderlich #define WMI_SPECTRAL_PERIOD_DEFAULT 35 5003855aed12SSimon Wunderlich #define WMI_SPECTRAL_PRIORITY_DEFAULT 1 5004855aed12SSimon Wunderlich #define WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 5005855aed12SSimon Wunderlich #define WMI_SPECTRAL_GC_ENA_DEFAULT 1 5006855aed12SSimon Wunderlich #define WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 5007855aed12SSimon Wunderlich #define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 5008855aed12SSimon Wunderlich #define WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 5009855aed12SSimon Wunderlich #define WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 5010855aed12SSimon Wunderlich #define WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 5011855aed12SSimon Wunderlich #define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 5012855aed12SSimon Wunderlich #define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 5013855aed12SSimon Wunderlich #define WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 5014855aed12SSimon Wunderlich #define WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 5015855aed12SSimon Wunderlich #define WMI_SPECTRAL_RPT_MODE_DEFAULT 2 5016855aed12SSimon Wunderlich #define WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 5017855aed12SSimon Wunderlich #define WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 5018855aed12SSimon Wunderlich #define WMI_SPECTRAL_CHN_MASK_DEFAULT 1 5019855aed12SSimon Wunderlich 5020855aed12SSimon Wunderlich struct wmi_vdev_spectral_enable_cmd { 5021855aed12SSimon Wunderlich __le32 vdev_id; 5022855aed12SSimon Wunderlich __le32 trigger_cmd; 5023855aed12SSimon Wunderlich __le32 enable_cmd; 5024855aed12SSimon Wunderlich } __packed; 5025855aed12SSimon Wunderlich 5026855aed12SSimon Wunderlich #define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 5027855aed12SSimon Wunderlich #define WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 5028855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 5029855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 5030855aed12SSimon Wunderlich 50315e3dd157SKalle Valo /* Beacon processing related command and event structures */ 50325e3dd157SKalle Valo struct wmi_bcn_tx_hdr { 50335e3dd157SKalle Valo __le32 vdev_id; 50345e3dd157SKalle Valo __le32 tx_rate; 50355e3dd157SKalle Valo __le32 tx_power; 50365e3dd157SKalle Valo __le32 bcn_len; 50375e3dd157SKalle Valo } __packed; 50385e3dd157SKalle Valo 50395e3dd157SKalle Valo struct wmi_bcn_tx_cmd { 50405e3dd157SKalle Valo struct wmi_bcn_tx_hdr hdr; 50415e3dd157SKalle Valo u8 *bcn[0]; 50425e3dd157SKalle Valo } __packed; 50435e3dd157SKalle Valo 50445e3dd157SKalle Valo struct wmi_bcn_tx_arg { 50455e3dd157SKalle Valo u32 vdev_id; 50465e3dd157SKalle Valo u32 tx_rate; 50475e3dd157SKalle Valo u32 tx_power; 50485e3dd157SKalle Valo u32 bcn_len; 50495e3dd157SKalle Valo const void *bcn; 50505e3dd157SKalle Valo }; 50515e3dd157SKalle Valo 5052748afc47SMichal Kazior enum wmi_bcn_tx_ref_flags { 5053748afc47SMichal Kazior WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1, 5054748afc47SMichal Kazior WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2, 5055748afc47SMichal Kazior }; 5056748afc47SMichal Kazior 505724c88f78SMichal Kazior /* TODO: It is unclear why "no antenna" works while any other seemingly valid 505824c88f78SMichal Kazior * chainmask yields no beacons on the air at all. 505924c88f78SMichal Kazior */ 506024c88f78SMichal Kazior #define WMI_BCN_TX_REF_DEF_ANTENNA 0 506124c88f78SMichal Kazior 5062748afc47SMichal Kazior struct wmi_bcn_tx_ref_cmd { 5063748afc47SMichal Kazior __le32 vdev_id; 5064748afc47SMichal Kazior __le32 data_len; 5065748afc47SMichal Kazior /* physical address of the frame - dma pointer */ 5066748afc47SMichal Kazior __le32 data_ptr; 5067748afc47SMichal Kazior /* id for host to track */ 5068748afc47SMichal Kazior __le32 msdu_id; 5069748afc47SMichal Kazior /* frame ctrl to setup PPDU desc */ 5070748afc47SMichal Kazior __le32 frame_control; 5071748afc47SMichal Kazior /* to control CABQ traffic: WMI_BCN_TX_REF_FLAG_ */ 5072748afc47SMichal Kazior __le32 flags; 507324c88f78SMichal Kazior /* introduced in 10.2 */ 507424c88f78SMichal Kazior __le32 antenna_mask; 5075748afc47SMichal Kazior } __packed; 5076748afc47SMichal Kazior 50775e3dd157SKalle Valo /* Beacon filter */ 50785e3dd157SKalle Valo #define WMI_BCN_FILTER_ALL 0 /* Filter all beacons */ 50795e3dd157SKalle Valo #define WMI_BCN_FILTER_NONE 1 /* Pass all beacons */ 50805e3dd157SKalle Valo #define WMI_BCN_FILTER_RSSI 2 /* Pass Beacons RSSI >= RSSI threshold */ 50815e3dd157SKalle Valo #define WMI_BCN_FILTER_BSSID 3 /* Pass Beacons with matching BSSID */ 50825e3dd157SKalle Valo #define WMI_BCN_FILTER_SSID 4 /* Pass Beacons with matching SSID */ 50835e3dd157SKalle Valo 50845e3dd157SKalle Valo struct wmi_bcn_filter_rx_cmd { 50855e3dd157SKalle Valo /* Filter ID */ 50865e3dd157SKalle Valo __le32 bcn_filter_id; 50875e3dd157SKalle Valo /* Filter type - wmi_bcn_filter */ 50885e3dd157SKalle Valo __le32 bcn_filter; 50895e3dd157SKalle Valo /* Buffer len */ 50905e3dd157SKalle Valo __le32 bcn_filter_len; 50915e3dd157SKalle Valo /* Filter info (threshold, BSSID, RSSI) */ 50925e3dd157SKalle Valo u8 *bcn_filter_buf; 50935e3dd157SKalle Valo } __packed; 50945e3dd157SKalle Valo 50955e3dd157SKalle Valo /* Capabilities and IEs to be passed to firmware */ 50965e3dd157SKalle Valo struct wmi_bcn_prb_info { 50975e3dd157SKalle Valo /* Capabilities */ 50985e3dd157SKalle Valo __le32 caps; 50995e3dd157SKalle Valo /* ERP info */ 51005e3dd157SKalle Valo __le32 erp; 51015e3dd157SKalle Valo /* Advanced capabilities */ 51025e3dd157SKalle Valo /* HT capabilities */ 51035e3dd157SKalle Valo /* HT Info */ 51045e3dd157SKalle Valo /* ibss_dfs */ 51055e3dd157SKalle Valo /* wpa Info */ 51065e3dd157SKalle Valo /* rsn Info */ 51075e3dd157SKalle Valo /* rrm info */ 51085e3dd157SKalle Valo /* ath_ext */ 51095e3dd157SKalle Valo /* app IE */ 51105e3dd157SKalle Valo } __packed; 51115e3dd157SKalle Valo 51125e3dd157SKalle Valo struct wmi_bcn_tmpl_cmd { 51135e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 51145e3dd157SKalle Valo __le32 vdev_id; 51155e3dd157SKalle Valo /* TIM IE offset from the beginning of the template. */ 51165e3dd157SKalle Valo __le32 tim_ie_offset; 51175e3dd157SKalle Valo /* beacon probe capabilities and IEs */ 51185e3dd157SKalle Valo struct wmi_bcn_prb_info bcn_prb_info; 51195e3dd157SKalle Valo /* beacon buffer length */ 51205e3dd157SKalle Valo __le32 buf_len; 51215e3dd157SKalle Valo /* variable length data */ 51225e3dd157SKalle Valo u8 data[1]; 51235e3dd157SKalle Valo } __packed; 51245e3dd157SKalle Valo 51255e3dd157SKalle Valo struct wmi_prb_tmpl_cmd { 51265e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 51275e3dd157SKalle Valo __le32 vdev_id; 51285e3dd157SKalle Valo /* beacon probe capabilities and IEs */ 51295e3dd157SKalle Valo struct wmi_bcn_prb_info bcn_prb_info; 51305e3dd157SKalle Valo /* beacon buffer length */ 51315e3dd157SKalle Valo __le32 buf_len; 51325e3dd157SKalle Valo /* Variable length data */ 51335e3dd157SKalle Valo u8 data[1]; 51345e3dd157SKalle Valo } __packed; 51355e3dd157SKalle Valo 51365e3dd157SKalle Valo enum wmi_sta_ps_mode { 51375e3dd157SKalle Valo /* enable power save for the given STA VDEV */ 51385e3dd157SKalle Valo WMI_STA_PS_MODE_DISABLED = 0, 51395e3dd157SKalle Valo /* disable power save for a given STA VDEV */ 51405e3dd157SKalle Valo WMI_STA_PS_MODE_ENABLED = 1, 51415e3dd157SKalle Valo }; 51425e3dd157SKalle Valo 51435e3dd157SKalle Valo struct wmi_sta_powersave_mode_cmd { 51445e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 51455e3dd157SKalle Valo __le32 vdev_id; 51465e3dd157SKalle Valo 51475e3dd157SKalle Valo /* 51485e3dd157SKalle Valo * Power save mode 51495e3dd157SKalle Valo * (see enum wmi_sta_ps_mode) 51505e3dd157SKalle Valo */ 51515e3dd157SKalle Valo __le32 sta_ps_mode; 51525e3dd157SKalle Valo } __packed; 51535e3dd157SKalle Valo 51545e3dd157SKalle Valo enum wmi_csa_offload_en { 51555e3dd157SKalle Valo WMI_CSA_OFFLOAD_DISABLE = 0, 51565e3dd157SKalle Valo WMI_CSA_OFFLOAD_ENABLE = 1, 51575e3dd157SKalle Valo }; 51585e3dd157SKalle Valo 51595e3dd157SKalle Valo struct wmi_csa_offload_enable_cmd { 51605e3dd157SKalle Valo __le32 vdev_id; 51615e3dd157SKalle Valo __le32 csa_offload_enable; 51625e3dd157SKalle Valo } __packed; 51635e3dd157SKalle Valo 51645e3dd157SKalle Valo struct wmi_csa_offload_chanswitch_cmd { 51655e3dd157SKalle Valo __le32 vdev_id; 51665e3dd157SKalle Valo struct wmi_channel chan; 51675e3dd157SKalle Valo } __packed; 51685e3dd157SKalle Valo 51695e3dd157SKalle Valo /* 51705e3dd157SKalle Valo * This parameter controls the policy for retrieving frames from AP while the 51715e3dd157SKalle Valo * STA is in sleep state. 51725e3dd157SKalle Valo * 51735e3dd157SKalle Valo * Only takes affect if the sta_ps_mode is enabled 51745e3dd157SKalle Valo */ 51755e3dd157SKalle Valo enum wmi_sta_ps_param_rx_wake_policy { 51765e3dd157SKalle Valo /* 51775e3dd157SKalle Valo * Wake up when ever there is an RX activity on the VDEV. In this mode 51785e3dd157SKalle Valo * the Power save SM(state machine) will come out of sleep by either 51795e3dd157SKalle Valo * sending null frame (or) a data frame (with PS==0) in response to TIM 51805e3dd157SKalle Valo * bit set in the received beacon frame from AP. 51815e3dd157SKalle Valo */ 51825e3dd157SKalle Valo WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 51835e3dd157SKalle Valo 51845e3dd157SKalle Valo /* 51855e3dd157SKalle Valo * Here the power save state machine will not wakeup in response to TIM 51865e3dd157SKalle Valo * bit, instead it will send a PSPOLL (or) UASPD trigger based on UAPSD 51875e3dd157SKalle Valo * configuration setup by WMISET_PS_SET_UAPSD WMI command. When all 51885e3dd157SKalle Valo * access categories are delivery-enabled, the station will send a 51895e3dd157SKalle Valo * UAPSD trigger frame, otherwise it will send a PS-Poll. 51905e3dd157SKalle Valo */ 51915e3dd157SKalle Valo WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 51925e3dd157SKalle Valo }; 51935e3dd157SKalle Valo 51945e3dd157SKalle Valo /* 51955e3dd157SKalle Valo * Number of tx frames/beacon that cause the power save SM to wake up. 51965e3dd157SKalle Valo * 51975e3dd157SKalle Valo * Value 1 causes the SM to wake up for every TX. Value 0 has a special 51985e3dd157SKalle Valo * meaning, It will cause the SM to never wake up. This is useful if you want 51995e3dd157SKalle Valo * to keep the system to sleep all the time for some kind of test mode . host 52005e3dd157SKalle Valo * can change this parameter any time. It will affect at the next tx frame. 52015e3dd157SKalle Valo */ 52025e3dd157SKalle Valo enum wmi_sta_ps_param_tx_wake_threshold { 52035e3dd157SKalle Valo WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 52045e3dd157SKalle Valo WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 52055e3dd157SKalle Valo 52065e3dd157SKalle Valo /* 52075e3dd157SKalle Valo * Values greater than one indicate that many TX attempts per beacon 52085e3dd157SKalle Valo * interval before the STA will wake up 52095e3dd157SKalle Valo */ 52105e3dd157SKalle Valo }; 52115e3dd157SKalle Valo 52125e3dd157SKalle Valo /* 52135e3dd157SKalle Valo * The maximum number of PS-Poll frames the FW will send in response to 52145e3dd157SKalle Valo * traffic advertised in TIM before waking up (by sending a null frame with PS 52155e3dd157SKalle Valo * = 0). Value 0 has a special meaning: there is no maximum count and the FW 52165e3dd157SKalle Valo * will send as many PS-Poll as are necessary to retrieve buffered BU. This 52175e3dd157SKalle Valo * parameter is used when the RX wake policy is 52185e3dd157SKalle Valo * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 52195e3dd157SKalle Valo * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 52205e3dd157SKalle Valo */ 52215e3dd157SKalle Valo enum wmi_sta_ps_param_pspoll_count { 52225e3dd157SKalle Valo WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 52235e3dd157SKalle Valo /* 52245e3dd157SKalle Valo * Values greater than 0 indicate the maximum numer of PS-Poll frames 52255e3dd157SKalle Valo * FW will send before waking up. 52265e3dd157SKalle Valo */ 52279f9b5746SMichal Kazior 52289f9b5746SMichal Kazior /* When u-APSD is enabled the firmware will be very reluctant to exit 52299f9b5746SMichal Kazior * STA PS. This could result in very poor Rx performance with STA doing 52309f9b5746SMichal Kazior * PS-Poll for each and every buffered frame. This value is a bit 52319f9b5746SMichal Kazior * arbitrary. 52329f9b5746SMichal Kazior */ 52339f9b5746SMichal Kazior WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3, 52345e3dd157SKalle Valo }; 52355e3dd157SKalle Valo 52365e3dd157SKalle Valo /* 52375e3dd157SKalle Valo * This will include the delivery and trigger enabled state for every AC. 52385e3dd157SKalle Valo * This is the negotiated state with AP. The host MLME needs to set this based 52395e3dd157SKalle Valo * on AP capability and the state Set in the association request by the 52405e3dd157SKalle Valo * station MLME.Lower 8 bits of the value specify the UAPSD configuration. 52415e3dd157SKalle Valo */ 52425e3dd157SKalle Valo #define WMI_UAPSD_AC_TYPE_DELI 0 52435e3dd157SKalle Valo #define WMI_UAPSD_AC_TYPE_TRIG 1 52445e3dd157SKalle Valo 52455e3dd157SKalle Valo #define WMI_UAPSD_AC_BIT_MASK(ac, type) \ 52465e3dd157SKalle Valo ((type == WMI_UAPSD_AC_TYPE_DELI) ? (1<<(ac<<1)) : (1<<((ac<<1)+1))) 52475e3dd157SKalle Valo 52485e3dd157SKalle Valo enum wmi_sta_ps_param_uapsd { 52495e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 52505e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 52515e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 52525e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 52535e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 52545e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 52555e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 52565e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 52575e3dd157SKalle Valo }; 52585e3dd157SKalle Valo 52590c7e477cSJanusz Dziedzic #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX 52600c7e477cSJanusz Dziedzic 52610c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_param { 52620c7e477cSJanusz Dziedzic __le32 wmm_ac; 52630c7e477cSJanusz Dziedzic __le32 user_priority; 52640c7e477cSJanusz Dziedzic __le32 service_interval; 52650c7e477cSJanusz Dziedzic __le32 suspend_interval; 52660c7e477cSJanusz Dziedzic __le32 delay_interval; 52670c7e477cSJanusz Dziedzic }; 52680c7e477cSJanusz Dziedzic 52690c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_cmd_fixed_param { 52700c7e477cSJanusz Dziedzic __le32 vdev_id; 52710c7e477cSJanusz Dziedzic struct wmi_mac_addr peer_macaddr; 52720c7e477cSJanusz Dziedzic __le32 num_ac; 52730c7e477cSJanusz Dziedzic }; 52740c7e477cSJanusz Dziedzic 52750c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_arg { 52760c7e477cSJanusz Dziedzic u32 wmm_ac; 52770c7e477cSJanusz Dziedzic u32 user_priority; 52780c7e477cSJanusz Dziedzic u32 service_interval; 52790c7e477cSJanusz Dziedzic u32 suspend_interval; 52800c7e477cSJanusz Dziedzic u32 delay_interval; 52810c7e477cSJanusz Dziedzic }; 52820c7e477cSJanusz Dziedzic 52835e3dd157SKalle Valo enum wmi_sta_powersave_param { 52845e3dd157SKalle Valo /* 52855e3dd157SKalle Valo * Controls how frames are retrievd from AP while STA is sleeping 52865e3dd157SKalle Valo * 52875e3dd157SKalle Valo * (see enum wmi_sta_ps_param_rx_wake_policy) 52885e3dd157SKalle Valo */ 52895e3dd157SKalle Valo WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 52905e3dd157SKalle Valo 52915e3dd157SKalle Valo /* 52925e3dd157SKalle Valo * The STA will go active after this many TX 52935e3dd157SKalle Valo * 52945e3dd157SKalle Valo * (see enum wmi_sta_ps_param_tx_wake_threshold) 52955e3dd157SKalle Valo */ 52965e3dd157SKalle Valo WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 52975e3dd157SKalle Valo 52985e3dd157SKalle Valo /* 52995e3dd157SKalle Valo * Number of PS-Poll to send before STA wakes up 53005e3dd157SKalle Valo * 53015e3dd157SKalle Valo * (see enum wmi_sta_ps_param_pspoll_count) 53025e3dd157SKalle Valo * 53035e3dd157SKalle Valo */ 53045e3dd157SKalle Valo WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 53055e3dd157SKalle Valo 53065e3dd157SKalle Valo /* 53075e3dd157SKalle Valo * TX/RX inactivity time in msec before going to sleep. 53085e3dd157SKalle Valo * 53095e3dd157SKalle Valo * The power save SM will monitor tx/rx activity on the VDEV, if no 53105e3dd157SKalle Valo * activity for the specified msec of the parameter the Power save 53115e3dd157SKalle Valo * SM will go to sleep. 53125e3dd157SKalle Valo */ 53135e3dd157SKalle Valo WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 53145e3dd157SKalle Valo 53155e3dd157SKalle Valo /* 53165e3dd157SKalle Valo * Set uapsd configuration. 53175e3dd157SKalle Valo * 53185e3dd157SKalle Valo * (see enum wmi_sta_ps_param_uapsd) 53195e3dd157SKalle Valo */ 53205e3dd157SKalle Valo WMI_STA_PS_PARAM_UAPSD = 4, 53215e3dd157SKalle Valo }; 53225e3dd157SKalle Valo 53235e3dd157SKalle Valo struct wmi_sta_powersave_param_cmd { 53245e3dd157SKalle Valo __le32 vdev_id; 53255e3dd157SKalle Valo __le32 param_id; /* %WMI_STA_PS_PARAM_ */ 53265e3dd157SKalle Valo __le32 param_value; 53275e3dd157SKalle Valo } __packed; 53285e3dd157SKalle Valo 53295e3dd157SKalle Valo /* No MIMO power save */ 53305e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_DISABLE 53315e3dd157SKalle Valo /* mimo powersave mode static*/ 53325e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_STATIC 53335e3dd157SKalle Valo /* mimo powersave mode dynamic */ 53345e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_DYNAMIC 53355e3dd157SKalle Valo 53365e3dd157SKalle Valo struct wmi_sta_mimo_ps_mode_cmd { 53375e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 53385e3dd157SKalle Valo __le32 vdev_id; 53395e3dd157SKalle Valo /* mimo powersave mode as defined above */ 53405e3dd157SKalle Valo __le32 mimo_pwrsave_mode; 53415e3dd157SKalle Valo } __packed; 53425e3dd157SKalle Valo 53435e3dd157SKalle Valo /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 53445e3dd157SKalle Valo enum wmi_ap_ps_param_uapsd { 53455e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 53465e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 53475e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 53485e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 53495e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 53505e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 53515e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 53525e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 53535e3dd157SKalle Valo }; 53545e3dd157SKalle Valo 53555e3dd157SKalle Valo /* U-APSD maximum service period of peer station */ 53565e3dd157SKalle Valo enum wmi_ap_ps_peer_param_max_sp { 53575e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 53585e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 53595e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 53605e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 53615e3dd157SKalle Valo MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 53625e3dd157SKalle Valo }; 53635e3dd157SKalle Valo 53645e3dd157SKalle Valo /* 53655e3dd157SKalle Valo * AP power save parameter 53665e3dd157SKalle Valo * Set a power save specific parameter for a peer station 53675e3dd157SKalle Valo */ 53685e3dd157SKalle Valo enum wmi_ap_ps_peer_param { 53695e3dd157SKalle Valo /* Set uapsd configuration for a given peer. 53705e3dd157SKalle Valo * 53715e3dd157SKalle Valo * Include the delivery and trigger enabled state for every AC. 53725e3dd157SKalle Valo * The host MLME needs to set this based on AP capability and stations 53735e3dd157SKalle Valo * request Set in the association request received from the station. 53745e3dd157SKalle Valo * 53755e3dd157SKalle Valo * Lower 8 bits of the value specify the UAPSD configuration. 53765e3dd157SKalle Valo * 53775e3dd157SKalle Valo * (see enum wmi_ap_ps_param_uapsd) 53785e3dd157SKalle Valo * The default value is 0. 53795e3dd157SKalle Valo */ 53805e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_UAPSD = 0, 53815e3dd157SKalle Valo 53825e3dd157SKalle Valo /* 53835e3dd157SKalle Valo * Set the service period for a UAPSD capable station 53845e3dd157SKalle Valo * 53855e3dd157SKalle Valo * The service period from wme ie in the (re)assoc request frame. 53865e3dd157SKalle Valo * 53875e3dd157SKalle Valo * (see enum wmi_ap_ps_peer_param_max_sp) 53885e3dd157SKalle Valo */ 53895e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 53905e3dd157SKalle Valo 53915e3dd157SKalle Valo /* Time in seconds for aging out buffered frames for STA in PS */ 53925e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 53935e3dd157SKalle Valo }; 53945e3dd157SKalle Valo 53955e3dd157SKalle Valo struct wmi_ap_ps_peer_cmd { 53965e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 53975e3dd157SKalle Valo __le32 vdev_id; 53985e3dd157SKalle Valo 53995e3dd157SKalle Valo /* peer MAC address */ 54005e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 54015e3dd157SKalle Valo 54025e3dd157SKalle Valo /* AP powersave param (see enum wmi_ap_ps_peer_param) */ 54035e3dd157SKalle Valo __le32 param_id; 54045e3dd157SKalle Valo 54055e3dd157SKalle Valo /* AP powersave param value */ 54065e3dd157SKalle Valo __le32 param_value; 54075e3dd157SKalle Valo } __packed; 54085e3dd157SKalle Valo 54095e3dd157SKalle Valo /* 128 clients = 4 words */ 54105e3dd157SKalle Valo #define WMI_TIM_BITMAP_ARRAY_SIZE 4 54115e3dd157SKalle Valo 54125e3dd157SKalle Valo struct wmi_tim_info { 54135e3dd157SKalle Valo __le32 tim_len; 54145e3dd157SKalle Valo __le32 tim_mcast; 54155e3dd157SKalle Valo __le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE]; 54165e3dd157SKalle Valo __le32 tim_changed; 54175e3dd157SKalle Valo __le32 tim_num_ps_pending; 54185e3dd157SKalle Valo } __packed; 54195e3dd157SKalle Valo 5420a03fee34SRaja Mani struct wmi_tim_info_arg { 5421a03fee34SRaja Mani __le32 tim_len; 5422a03fee34SRaja Mani __le32 tim_mcast; 5423a03fee34SRaja Mani const __le32 *tim_bitmap; 5424a03fee34SRaja Mani __le32 tim_changed; 5425a03fee34SRaja Mani __le32 tim_num_ps_pending; 5426a03fee34SRaja Mani } __packed; 5427a03fee34SRaja Mani 54285e3dd157SKalle Valo /* Maximum number of NOA Descriptors supported */ 54295e3dd157SKalle Valo #define WMI_P2P_MAX_NOA_DESCRIPTORS 4 54305e3dd157SKalle Valo #define WMI_P2P_OPPPS_ENABLE_BIT BIT(0) 54315e3dd157SKalle Valo #define WMI_P2P_OPPPS_CTWINDOW_OFFSET 1 54325e3dd157SKalle Valo #define WMI_P2P_NOA_CHANGED_BIT BIT(0) 54335e3dd157SKalle Valo 54345e3dd157SKalle Valo struct wmi_p2p_noa_info { 54355e3dd157SKalle Valo /* Bit 0 - Flag to indicate an update in NOA schedule 54365e3dd157SKalle Valo Bits 7-1 - Reserved */ 54375e3dd157SKalle Valo u8 changed; 54385e3dd157SKalle Valo /* NOA index */ 54395e3dd157SKalle Valo u8 index; 54405e3dd157SKalle Valo /* Bit 0 - Opp PS state of the AP 54415e3dd157SKalle Valo Bits 1-7 - Ctwindow in TUs */ 54425e3dd157SKalle Valo u8 ctwindow_oppps; 54435e3dd157SKalle Valo /* Number of NOA descriptors */ 54445e3dd157SKalle Valo u8 num_descriptors; 54455e3dd157SKalle Valo 54465e3dd157SKalle Valo struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS]; 54475e3dd157SKalle Valo } __packed; 54485e3dd157SKalle Valo 54495e3dd157SKalle Valo struct wmi_bcn_info { 54505e3dd157SKalle Valo struct wmi_tim_info tim_info; 54515e3dd157SKalle Valo struct wmi_p2p_noa_info p2p_noa_info; 54525e3dd157SKalle Valo } __packed; 54535e3dd157SKalle Valo 54545e3dd157SKalle Valo struct wmi_host_swba_event { 54555e3dd157SKalle Valo __le32 vdev_map; 545632653cf1SMichal Kazior struct wmi_bcn_info bcn_info[0]; 54575e3dd157SKalle Valo } __packed; 54585e3dd157SKalle Valo 54598b019fb0SYanbo Li struct wmi_10_2_4_bcn_info { 54608b019fb0SYanbo Li struct wmi_tim_info tim_info; 54618b019fb0SYanbo Li /* The 10.2.4 FW doesn't have p2p NOA info */ 54628b019fb0SYanbo Li } __packed; 54638b019fb0SYanbo Li 54648b019fb0SYanbo Li struct wmi_10_2_4_host_swba_event { 54658b019fb0SYanbo Li __le32 vdev_map; 54668b019fb0SYanbo Li struct wmi_10_2_4_bcn_info bcn_info[0]; 54678b019fb0SYanbo Li } __packed; 54688b019fb0SYanbo Li 54693cec3be3SRaja Mani /* 16 words = 512 client + 1 word = for guard */ 54703cec3be3SRaja Mani #define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17 54713cec3be3SRaja Mani 54723cec3be3SRaja Mani struct wmi_10_4_tim_info { 54733cec3be3SRaja Mani __le32 tim_len; 54743cec3be3SRaja Mani __le32 tim_mcast; 54753cec3be3SRaja Mani __le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE]; 54763cec3be3SRaja Mani __le32 tim_changed; 54773cec3be3SRaja Mani __le32 tim_num_ps_pending; 54783cec3be3SRaja Mani } __packed; 54793cec3be3SRaja Mani 54803cec3be3SRaja Mani #define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1 54813cec3be3SRaja Mani 54823cec3be3SRaja Mani struct wmi_10_4_p2p_noa_info { 54833cec3be3SRaja Mani /* Bit 0 - Flag to indicate an update in NOA schedule 54843cec3be3SRaja Mani * Bits 7-1 - Reserved 54853cec3be3SRaja Mani */ 54863cec3be3SRaja Mani u8 changed; 54873cec3be3SRaja Mani /* NOA index */ 54883cec3be3SRaja Mani u8 index; 54893cec3be3SRaja Mani /* Bit 0 - Opp PS state of the AP 54903cec3be3SRaja Mani * Bits 1-7 - Ctwindow in TUs 54913cec3be3SRaja Mani */ 54923cec3be3SRaja Mani u8 ctwindow_oppps; 54933cec3be3SRaja Mani /* Number of NOA descriptors */ 54943cec3be3SRaja Mani u8 num_descriptors; 54953cec3be3SRaja Mani 54963cec3be3SRaja Mani struct wmi_p2p_noa_descriptor 54973cec3be3SRaja Mani noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS]; 54983cec3be3SRaja Mani } __packed; 54993cec3be3SRaja Mani 55003cec3be3SRaja Mani struct wmi_10_4_bcn_info { 55013cec3be3SRaja Mani struct wmi_10_4_tim_info tim_info; 55023cec3be3SRaja Mani struct wmi_10_4_p2p_noa_info p2p_noa_info; 55033cec3be3SRaja Mani } __packed; 55043cec3be3SRaja Mani 55053cec3be3SRaja Mani struct wmi_10_4_host_swba_event { 55063cec3be3SRaja Mani __le32 vdev_map; 55073cec3be3SRaja Mani struct wmi_10_4_bcn_info bcn_info[0]; 55083cec3be3SRaja Mani } __packed; 55093cec3be3SRaja Mani 55105e3dd157SKalle Valo #define WMI_MAX_AP_VDEV 16 55115e3dd157SKalle Valo 55125e3dd157SKalle Valo struct wmi_tbtt_offset_event { 55135e3dd157SKalle Valo __le32 vdev_map; 55145e3dd157SKalle Valo __le32 tbttoffset_list[WMI_MAX_AP_VDEV]; 55155e3dd157SKalle Valo } __packed; 55165e3dd157SKalle Valo 55175e3dd157SKalle Valo struct wmi_peer_create_cmd { 55185e3dd157SKalle Valo __le32 vdev_id; 55195e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 55205e3dd157SKalle Valo } __packed; 55215e3dd157SKalle Valo 55227390ed34SMarek Puzyniak enum wmi_peer_type { 55237390ed34SMarek Puzyniak WMI_PEER_TYPE_DEFAULT = 0, 55247390ed34SMarek Puzyniak WMI_PEER_TYPE_BSS = 1, 55257390ed34SMarek Puzyniak WMI_PEER_TYPE_TDLS = 2, 55267390ed34SMarek Puzyniak }; 55277390ed34SMarek Puzyniak 55285e3dd157SKalle Valo struct wmi_peer_delete_cmd { 55295e3dd157SKalle Valo __le32 vdev_id; 55305e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 55315e3dd157SKalle Valo } __packed; 55325e3dd157SKalle Valo 55335e3dd157SKalle Valo struct wmi_peer_flush_tids_cmd { 55345e3dd157SKalle Valo __le32 vdev_id; 55355e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 55365e3dd157SKalle Valo __le32 peer_tid_bitmap; 55375e3dd157SKalle Valo } __packed; 55385e3dd157SKalle Valo 55395e3dd157SKalle Valo struct wmi_fixed_rate { 55405e3dd157SKalle Valo /* 55415e3dd157SKalle Valo * rate mode . 0: disable fixed rate (auto rate) 55425e3dd157SKalle Valo * 1: legacy (non 11n) rate specified as ieee rate 2*Mbps 55435e3dd157SKalle Valo * 2: ht20 11n rate specified as mcs index 55445e3dd157SKalle Valo * 3: ht40 11n rate specified as mcs index 55455e3dd157SKalle Valo */ 55465e3dd157SKalle Valo __le32 rate_mode; 55475e3dd157SKalle Valo /* 55485e3dd157SKalle Valo * 4 rate values for 4 rate series. series 0 is stored in byte 0 (LSB) 55495e3dd157SKalle Valo * and series 3 is stored at byte 3 (MSB) 55505e3dd157SKalle Valo */ 55515e3dd157SKalle Valo __le32 rate_series; 55525e3dd157SKalle Valo /* 55535e3dd157SKalle Valo * 4 retry counts for 4 rate series. retry count for rate 0 is stored 55545e3dd157SKalle Valo * in byte 0 (LSB) and retry count for rate 3 is stored at byte 3 55555e3dd157SKalle Valo * (MSB) 55565e3dd157SKalle Valo */ 55575e3dd157SKalle Valo __le32 rate_retries; 55585e3dd157SKalle Valo } __packed; 55595e3dd157SKalle Valo 55605e3dd157SKalle Valo struct wmi_peer_fixed_rate_cmd { 55615e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 55625e3dd157SKalle Valo __le32 vdev_id; 55635e3dd157SKalle Valo /* peer MAC address */ 55645e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 55655e3dd157SKalle Valo /* fixed rate */ 55665e3dd157SKalle Valo struct wmi_fixed_rate peer_fixed_rate; 55675e3dd157SKalle Valo } __packed; 55685e3dd157SKalle Valo 55695e3dd157SKalle Valo #define WMI_MGMT_TID 17 55705e3dd157SKalle Valo 55715e3dd157SKalle Valo struct wmi_addba_clear_resp_cmd { 55725e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 55735e3dd157SKalle Valo __le32 vdev_id; 55745e3dd157SKalle Valo /* peer MAC address */ 55755e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 55765e3dd157SKalle Valo } __packed; 55775e3dd157SKalle Valo 55785e3dd157SKalle Valo struct wmi_addba_send_cmd { 55795e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 55805e3dd157SKalle Valo __le32 vdev_id; 55815e3dd157SKalle Valo /* peer MAC address */ 55825e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 55835e3dd157SKalle Valo /* Tid number */ 55845e3dd157SKalle Valo __le32 tid; 55855e3dd157SKalle Valo /* Buffer/Window size*/ 55865e3dd157SKalle Valo __le32 buffersize; 55875e3dd157SKalle Valo } __packed; 55885e3dd157SKalle Valo 55895e3dd157SKalle Valo struct wmi_delba_send_cmd { 55905e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 55915e3dd157SKalle Valo __le32 vdev_id; 55925e3dd157SKalle Valo /* peer MAC address */ 55935e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 55945e3dd157SKalle Valo /* Tid number */ 55955e3dd157SKalle Valo __le32 tid; 55965e3dd157SKalle Valo /* Is Initiator */ 55975e3dd157SKalle Valo __le32 initiator; 55985e3dd157SKalle Valo /* Reason code */ 55995e3dd157SKalle Valo __le32 reasoncode; 56005e3dd157SKalle Valo } __packed; 56015e3dd157SKalle Valo 56025e3dd157SKalle Valo struct wmi_addba_setresponse_cmd { 56035e3dd157SKalle Valo /* unique id identifying the vdev, generated by the caller */ 56045e3dd157SKalle Valo __le32 vdev_id; 56055e3dd157SKalle Valo /* peer mac address */ 56065e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 56075e3dd157SKalle Valo /* Tid number */ 56085e3dd157SKalle Valo __le32 tid; 56095e3dd157SKalle Valo /* status code */ 56105e3dd157SKalle Valo __le32 statuscode; 56115e3dd157SKalle Valo } __packed; 56125e3dd157SKalle Valo 56135e3dd157SKalle Valo struct wmi_send_singleamsdu_cmd { 56145e3dd157SKalle Valo /* unique id identifying the vdev, generated by the caller */ 56155e3dd157SKalle Valo __le32 vdev_id; 56165e3dd157SKalle Valo /* peer mac address */ 56175e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 56185e3dd157SKalle Valo /* Tid number */ 56195e3dd157SKalle Valo __le32 tid; 56205e3dd157SKalle Valo } __packed; 56215e3dd157SKalle Valo 56225e3dd157SKalle Valo enum wmi_peer_smps_state { 56235e3dd157SKalle Valo WMI_PEER_SMPS_PS_NONE = 0x0, 56245e3dd157SKalle Valo WMI_PEER_SMPS_STATIC = 0x1, 56255e3dd157SKalle Valo WMI_PEER_SMPS_DYNAMIC = 0x2 56265e3dd157SKalle Valo }; 56275e3dd157SKalle Valo 56289797febcSMichal Kazior enum wmi_peer_chwidth { 56299797febcSMichal Kazior WMI_PEER_CHWIDTH_20MHZ = 0, 56309797febcSMichal Kazior WMI_PEER_CHWIDTH_40MHZ = 1, 56319797febcSMichal Kazior WMI_PEER_CHWIDTH_80MHZ = 2, 56329797febcSMichal Kazior }; 56339797febcSMichal Kazior 56345e3dd157SKalle Valo enum wmi_peer_param { 56355e3dd157SKalle Valo WMI_PEER_SMPS_STATE = 0x1, /* see %wmi_peer_smps_state */ 56365e3dd157SKalle Valo WMI_PEER_AMPDU = 0x2, 56375e3dd157SKalle Valo WMI_PEER_AUTHORIZE = 0x3, 56385e3dd157SKalle Valo WMI_PEER_CHAN_WIDTH = 0x4, 56395e3dd157SKalle Valo WMI_PEER_NSS = 0x5, 56400a987fb0SMichal Kazior WMI_PEER_USE_4ADDR = 0x6, 56410a987fb0SMichal Kazior WMI_PEER_DUMMY_VAR = 0xff, /* dummy parameter for STA PS workaround */ 56425e3dd157SKalle Valo }; 56435e3dd157SKalle Valo 56445e3dd157SKalle Valo struct wmi_peer_set_param_cmd { 56455e3dd157SKalle Valo __le32 vdev_id; 56465e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 56475e3dd157SKalle Valo __le32 param_id; 56485e3dd157SKalle Valo __le32 param_value; 56495e3dd157SKalle Valo } __packed; 56505e3dd157SKalle Valo 56515e3dd157SKalle Valo #define MAX_SUPPORTED_RATES 128 56525e3dd157SKalle Valo 56535e3dd157SKalle Valo struct wmi_rate_set { 56545e3dd157SKalle Valo /* total number of rates */ 56555e3dd157SKalle Valo __le32 num_rates; 56565e3dd157SKalle Valo /* 56575e3dd157SKalle Valo * rates (each 8bit value) packed into a 32 bit word. 56585e3dd157SKalle Valo * the rates are filled from least significant byte to most 56595e3dd157SKalle Valo * significant byte. 56605e3dd157SKalle Valo */ 56615e3dd157SKalle Valo __le32 rates[(MAX_SUPPORTED_RATES/4)+1]; 56625e3dd157SKalle Valo } __packed; 56635e3dd157SKalle Valo 56645e3dd157SKalle Valo struct wmi_rate_set_arg { 56655e3dd157SKalle Valo unsigned int num_rates; 56665e3dd157SKalle Valo u8 rates[MAX_SUPPORTED_RATES]; 56675e3dd157SKalle Valo }; 56685e3dd157SKalle Valo 56695e3dd157SKalle Valo /* 56705e3dd157SKalle Valo * NOTE: It would bea good idea to represent the Tx MCS 56715e3dd157SKalle Valo * info in one word and Rx in another word. This is split 56725e3dd157SKalle Valo * into multiple words for convenience 56735e3dd157SKalle Valo */ 56745e3dd157SKalle Valo struct wmi_vht_rate_set { 56755e3dd157SKalle Valo __le32 rx_max_rate; /* Max Rx data rate */ 56765e3dd157SKalle Valo __le32 rx_mcs_set; /* Negotiated RX VHT rates */ 56775e3dd157SKalle Valo __le32 tx_max_rate; /* Max Tx data rate */ 56785e3dd157SKalle Valo __le32 tx_mcs_set; /* Negotiated TX VHT rates */ 56795e3dd157SKalle Valo } __packed; 56805e3dd157SKalle Valo 56815e3dd157SKalle Valo struct wmi_vht_rate_set_arg { 56825e3dd157SKalle Valo u32 rx_max_rate; 56835e3dd157SKalle Valo u32 rx_mcs_set; 56845e3dd157SKalle Valo u32 tx_max_rate; 56855e3dd157SKalle Valo u32 tx_mcs_set; 56865e3dd157SKalle Valo }; 56875e3dd157SKalle Valo 56885e3dd157SKalle Valo struct wmi_peer_set_rates_cmd { 56895e3dd157SKalle Valo /* peer MAC address */ 56905e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 56915e3dd157SKalle Valo /* legacy rate set */ 56925e3dd157SKalle Valo struct wmi_rate_set peer_legacy_rates; 56935e3dd157SKalle Valo /* ht rate set */ 56945e3dd157SKalle Valo struct wmi_rate_set peer_ht_rates; 56955e3dd157SKalle Valo } __packed; 56965e3dd157SKalle Valo 56975e3dd157SKalle Valo struct wmi_peer_set_q_empty_callback_cmd { 56985e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 56995e3dd157SKalle Valo __le32 vdev_id; 57005e3dd157SKalle Valo /* peer MAC address */ 57015e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 57025e3dd157SKalle Valo __le32 callback_enable; 57035e3dd157SKalle Valo } __packed; 57045e3dd157SKalle Valo 57053fab30f7STamizh chelvam struct wmi_peer_flags_map { 57063fab30f7STamizh chelvam u32 auth; 57073fab30f7STamizh chelvam u32 qos; 57083fab30f7STamizh chelvam u32 need_ptk_4_way; 57093fab30f7STamizh chelvam u32 need_gtk_2_way; 57103fab30f7STamizh chelvam u32 apsd; 57113fab30f7STamizh chelvam u32 ht; 57123fab30f7STamizh chelvam u32 bw40; 57133fab30f7STamizh chelvam u32 stbc; 57143fab30f7STamizh chelvam u32 ldbc; 57153fab30f7STamizh chelvam u32 dyn_mimops; 57163fab30f7STamizh chelvam u32 static_mimops; 57173fab30f7STamizh chelvam u32 spatial_mux; 57183fab30f7STamizh chelvam u32 vht; 57193fab30f7STamizh chelvam u32 bw80; 57203fab30f7STamizh chelvam u32 vht_2g; 57213fab30f7STamizh chelvam u32 pmf; 57223fab30f7STamizh chelvam }; 57233fab30f7STamizh chelvam 57243fab30f7STamizh chelvam enum wmi_peer_flags { 57253fab30f7STamizh chelvam WMI_PEER_AUTH = 0x00000001, 57263fab30f7STamizh chelvam WMI_PEER_QOS = 0x00000002, 57273fab30f7STamizh chelvam WMI_PEER_NEED_PTK_4_WAY = 0x00000004, 57283fab30f7STamizh chelvam WMI_PEER_NEED_GTK_2_WAY = 0x00000010, 57293fab30f7STamizh chelvam WMI_PEER_APSD = 0x00000800, 57303fab30f7STamizh chelvam WMI_PEER_HT = 0x00001000, 57313fab30f7STamizh chelvam WMI_PEER_40MHZ = 0x00002000, 57323fab30f7STamizh chelvam WMI_PEER_STBC = 0x00008000, 57333fab30f7STamizh chelvam WMI_PEER_LDPC = 0x00010000, 57343fab30f7STamizh chelvam WMI_PEER_DYN_MIMOPS = 0x00020000, 57353fab30f7STamizh chelvam WMI_PEER_STATIC_MIMOPS = 0x00040000, 57363fab30f7STamizh chelvam WMI_PEER_SPATIAL_MUX = 0x00200000, 57373fab30f7STamizh chelvam WMI_PEER_VHT = 0x02000000, 57383fab30f7STamizh chelvam WMI_PEER_80MHZ = 0x04000000, 57393fab30f7STamizh chelvam WMI_PEER_VHT_2G = 0x08000000, 57403fab30f7STamizh chelvam WMI_PEER_PMF = 0x10000000, 57413fab30f7STamizh chelvam }; 57423fab30f7STamizh chelvam 57433fab30f7STamizh chelvam enum wmi_10x_peer_flags { 57443fab30f7STamizh chelvam WMI_10X_PEER_AUTH = 0x00000001, 57453fab30f7STamizh chelvam WMI_10X_PEER_QOS = 0x00000002, 57463fab30f7STamizh chelvam WMI_10X_PEER_NEED_PTK_4_WAY = 0x00000004, 57473fab30f7STamizh chelvam WMI_10X_PEER_NEED_GTK_2_WAY = 0x00000010, 57483fab30f7STamizh chelvam WMI_10X_PEER_APSD = 0x00000800, 57493fab30f7STamizh chelvam WMI_10X_PEER_HT = 0x00001000, 57503fab30f7STamizh chelvam WMI_10X_PEER_40MHZ = 0x00002000, 57513fab30f7STamizh chelvam WMI_10X_PEER_STBC = 0x00008000, 57523fab30f7STamizh chelvam WMI_10X_PEER_LDPC = 0x00010000, 57533fab30f7STamizh chelvam WMI_10X_PEER_DYN_MIMOPS = 0x00020000, 57543fab30f7STamizh chelvam WMI_10X_PEER_STATIC_MIMOPS = 0x00040000, 57553fab30f7STamizh chelvam WMI_10X_PEER_SPATIAL_MUX = 0x00200000, 57563fab30f7STamizh chelvam WMI_10X_PEER_VHT = 0x02000000, 57573fab30f7STamizh chelvam WMI_10X_PEER_80MHZ = 0x04000000, 57583fab30f7STamizh chelvam }; 57593fab30f7STamizh chelvam 57603fab30f7STamizh chelvam enum wmi_10_2_peer_flags { 57613fab30f7STamizh chelvam WMI_10_2_PEER_AUTH = 0x00000001, 57623fab30f7STamizh chelvam WMI_10_2_PEER_QOS = 0x00000002, 57633fab30f7STamizh chelvam WMI_10_2_PEER_NEED_PTK_4_WAY = 0x00000004, 57643fab30f7STamizh chelvam WMI_10_2_PEER_NEED_GTK_2_WAY = 0x00000010, 57653fab30f7STamizh chelvam WMI_10_2_PEER_APSD = 0x00000800, 57663fab30f7STamizh chelvam WMI_10_2_PEER_HT = 0x00001000, 57673fab30f7STamizh chelvam WMI_10_2_PEER_40MHZ = 0x00002000, 57683fab30f7STamizh chelvam WMI_10_2_PEER_STBC = 0x00008000, 57693fab30f7STamizh chelvam WMI_10_2_PEER_LDPC = 0x00010000, 57703fab30f7STamizh chelvam WMI_10_2_PEER_DYN_MIMOPS = 0x00020000, 57713fab30f7STamizh chelvam WMI_10_2_PEER_STATIC_MIMOPS = 0x00040000, 57723fab30f7STamizh chelvam WMI_10_2_PEER_SPATIAL_MUX = 0x00200000, 57733fab30f7STamizh chelvam WMI_10_2_PEER_VHT = 0x02000000, 57743fab30f7STamizh chelvam WMI_10_2_PEER_80MHZ = 0x04000000, 57753fab30f7STamizh chelvam WMI_10_2_PEER_VHT_2G = 0x08000000, 57763fab30f7STamizh chelvam WMI_10_2_PEER_PMF = 0x10000000, 57773fab30f7STamizh chelvam }; 57785e3dd157SKalle Valo 57795e3dd157SKalle Valo /* 57805e3dd157SKalle Valo * Peer rate capabilities. 57815e3dd157SKalle Valo * 57825e3dd157SKalle Valo * This is of interest to the ratecontrol 57835e3dd157SKalle Valo * module which resides in the firmware. The bit definitions are 57845e3dd157SKalle Valo * consistent with that defined in if_athrate.c. 57855e3dd157SKalle Valo */ 57865e3dd157SKalle Valo #define WMI_RC_DS_FLAG 0x01 57875e3dd157SKalle Valo #define WMI_RC_CW40_FLAG 0x02 57885e3dd157SKalle Valo #define WMI_RC_SGI_FLAG 0x04 57895e3dd157SKalle Valo #define WMI_RC_HT_FLAG 0x08 57905e3dd157SKalle Valo #define WMI_RC_RTSCTS_FLAG 0x10 57915e3dd157SKalle Valo #define WMI_RC_TX_STBC_FLAG 0x20 57925e3dd157SKalle Valo #define WMI_RC_RX_STBC_FLAG 0xC0 57935e3dd157SKalle Valo #define WMI_RC_RX_STBC_FLAG_S 6 57945e3dd157SKalle Valo #define WMI_RC_WEP_TKIP_FLAG 0x100 57955e3dd157SKalle Valo #define WMI_RC_TS_FLAG 0x200 57965e3dd157SKalle Valo #define WMI_RC_UAPSD_FLAG 0x400 57975e3dd157SKalle Valo 57985e3dd157SKalle Valo /* Maximum listen interval supported by hw in units of beacon interval */ 57995e3dd157SKalle Valo #define ATH10K_MAX_HW_LISTEN_INTERVAL 5 58005e3dd157SKalle Valo 580124c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd { 58025e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 58035e3dd157SKalle Valo __le32 vdev_id; 58045e3dd157SKalle Valo __le32 peer_new_assoc; /* 1=assoc, 0=reassoc */ 58055e3dd157SKalle Valo __le32 peer_associd; /* 16 LSBs */ 58065e3dd157SKalle Valo __le32 peer_flags; 58075e3dd157SKalle Valo __le32 peer_caps; /* 16 LSBs */ 58085e3dd157SKalle Valo __le32 peer_listen_intval; 58095e3dd157SKalle Valo __le32 peer_ht_caps; 58105e3dd157SKalle Valo __le32 peer_max_mpdu; 58115e3dd157SKalle Valo __le32 peer_mpdu_density; /* 0..16 */ 58125e3dd157SKalle Valo __le32 peer_rate_caps; 58135e3dd157SKalle Valo struct wmi_rate_set peer_legacy_rates; 58145e3dd157SKalle Valo struct wmi_rate_set peer_ht_rates; 58155e3dd157SKalle Valo __le32 peer_nss; /* num of spatial streams */ 58165e3dd157SKalle Valo __le32 peer_vht_caps; 58175e3dd157SKalle Valo __le32 peer_phymode; 58185e3dd157SKalle Valo struct wmi_vht_rate_set peer_vht_rates; 581924c88f78SMichal Kazior }; 582024c88f78SMichal Kazior 582124c88f78SMichal Kazior struct wmi_main_peer_assoc_complete_cmd { 582224c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd cmd; 582324c88f78SMichal Kazior 58245e3dd157SKalle Valo /* HT Operation Element of the peer. Five bytes packed in 2 58255e3dd157SKalle Valo * INT32 array and filled from lsb to msb. */ 58265e3dd157SKalle Valo __le32 peer_ht_info[2]; 58275e3dd157SKalle Valo } __packed; 58285e3dd157SKalle Valo 582924c88f78SMichal Kazior struct wmi_10_1_peer_assoc_complete_cmd { 583024c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd cmd; 583124c88f78SMichal Kazior } __packed; 583224c88f78SMichal Kazior 583324c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0 583424c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f 583524c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4 583624c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0 583724c88f78SMichal Kazior 583824c88f78SMichal Kazior struct wmi_10_2_peer_assoc_complete_cmd { 583924c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd cmd; 584024c88f78SMichal Kazior __le32 info0; /* WMI_PEER_ASSOC_INFO0_ */ 584124c88f78SMichal Kazior } __packed; 584224c88f78SMichal Kazior 5843b54e16f1SVasanthakumar Thiagarajan struct wmi_10_4_peer_assoc_complete_cmd { 5844b54e16f1SVasanthakumar Thiagarajan struct wmi_10_2_peer_assoc_complete_cmd cmd; 5845b54e16f1SVasanthakumar Thiagarajan __le32 peer_bw_rxnss_override; 5846b54e16f1SVasanthakumar Thiagarajan } __packed; 5847b54e16f1SVasanthakumar Thiagarajan 58485e3dd157SKalle Valo struct wmi_peer_assoc_complete_arg { 58495e3dd157SKalle Valo u8 addr[ETH_ALEN]; 58505e3dd157SKalle Valo u32 vdev_id; 58515e3dd157SKalle Valo bool peer_reassoc; 58525e3dd157SKalle Valo u16 peer_aid; 58535e3dd157SKalle Valo u32 peer_flags; /* see %WMI_PEER_ */ 58545e3dd157SKalle Valo u16 peer_caps; 58555e3dd157SKalle Valo u32 peer_listen_intval; 58565e3dd157SKalle Valo u32 peer_ht_caps; 58575e3dd157SKalle Valo u32 peer_max_mpdu; 58585e3dd157SKalle Valo u32 peer_mpdu_density; /* 0..16 */ 58595e3dd157SKalle Valo u32 peer_rate_caps; /* see %WMI_RC_ */ 58605e3dd157SKalle Valo struct wmi_rate_set_arg peer_legacy_rates; 58615e3dd157SKalle Valo struct wmi_rate_set_arg peer_ht_rates; 58625e3dd157SKalle Valo u32 peer_num_spatial_streams; 58635e3dd157SKalle Valo u32 peer_vht_caps; 58645e3dd157SKalle Valo enum wmi_phy_mode peer_phymode; 58655e3dd157SKalle Valo struct wmi_vht_rate_set_arg peer_vht_rates; 58665e3dd157SKalle Valo }; 58675e3dd157SKalle Valo 58685e3dd157SKalle Valo struct wmi_peer_add_wds_entry_cmd { 58695e3dd157SKalle Valo /* peer MAC address */ 58705e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 58715e3dd157SKalle Valo /* wds MAC addr */ 58725e3dd157SKalle Valo struct wmi_mac_addr wds_macaddr; 58735e3dd157SKalle Valo } __packed; 58745e3dd157SKalle Valo 58755e3dd157SKalle Valo struct wmi_peer_remove_wds_entry_cmd { 58765e3dd157SKalle Valo /* wds MAC addr */ 58775e3dd157SKalle Valo struct wmi_mac_addr wds_macaddr; 58785e3dd157SKalle Valo } __packed; 58795e3dd157SKalle Valo 58805e3dd157SKalle Valo struct wmi_peer_q_empty_callback_event { 58815e3dd157SKalle Valo /* peer MAC address */ 58825e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 58835e3dd157SKalle Valo } __packed; 58845e3dd157SKalle Valo 58855e3dd157SKalle Valo /* 58865e3dd157SKalle Valo * Channel info WMI event 58875e3dd157SKalle Valo */ 58885e3dd157SKalle Valo struct wmi_chan_info_event { 58895e3dd157SKalle Valo __le32 err_code; 58905e3dd157SKalle Valo __le32 freq; 58915e3dd157SKalle Valo __le32 cmd_flags; 58925e3dd157SKalle Valo __le32 noise_floor; 58935e3dd157SKalle Valo __le32 rx_clear_count; 58945e3dd157SKalle Valo __le32 cycle_count; 58955e3dd157SKalle Valo } __packed; 58965e3dd157SKalle Valo 5897b2297baaSRaja Mani struct wmi_10_4_chan_info_event { 5898b2297baaSRaja Mani __le32 err_code; 5899b2297baaSRaja Mani __le32 freq; 5900b2297baaSRaja Mani __le32 cmd_flags; 5901b2297baaSRaja Mani __le32 noise_floor; 5902b2297baaSRaja Mani __le32 rx_clear_count; 5903b2297baaSRaja Mani __le32 cycle_count; 5904b2297baaSRaja Mani __le32 chan_tx_pwr_range; 5905b2297baaSRaja Mani __le32 chan_tx_pwr_tp; 5906b2297baaSRaja Mani __le32 rx_frame_count; 5907b2297baaSRaja Mani } __packed; 5908b2297baaSRaja Mani 59095a13e76eSKalle Valo struct wmi_peer_sta_kickout_event { 59105a13e76eSKalle Valo struct wmi_mac_addr peer_macaddr; 59115a13e76eSKalle Valo } __packed; 59125a13e76eSKalle Valo 59132e1dea40SMichal Kazior #define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0) 59143d2a2e29SVasanthakumar Thiagarajan #define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1) 59152e1dea40SMichal Kazior 59165e3dd157SKalle Valo /* Beacon filter wmi command info */ 59175e3dd157SKalle Valo #define BCN_FLT_MAX_SUPPORTED_IES 256 59185e3dd157SKalle Valo #define BCN_FLT_MAX_ELEMS_IE_LIST (BCN_FLT_MAX_SUPPORTED_IES / 32) 59195e3dd157SKalle Valo 59205e3dd157SKalle Valo struct bss_bcn_stats { 59215e3dd157SKalle Valo __le32 vdev_id; 59225e3dd157SKalle Valo __le32 bss_bcnsdropped; 59235e3dd157SKalle Valo __le32 bss_bcnsdelivered; 59245e3dd157SKalle Valo } __packed; 59255e3dd157SKalle Valo 59265e3dd157SKalle Valo struct bcn_filter_stats { 59275e3dd157SKalle Valo __le32 bcns_dropped; 59285e3dd157SKalle Valo __le32 bcns_delivered; 59295e3dd157SKalle Valo __le32 activefilters; 59305e3dd157SKalle Valo struct bss_bcn_stats bss_stats; 59315e3dd157SKalle Valo } __packed; 59325e3dd157SKalle Valo 59335e3dd157SKalle Valo struct wmi_add_bcn_filter_cmd { 59345e3dd157SKalle Valo u32 vdev_id; 59355e3dd157SKalle Valo u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST]; 59365e3dd157SKalle Valo } __packed; 59375e3dd157SKalle Valo 59385e3dd157SKalle Valo enum wmi_sta_keepalive_method { 59395e3dd157SKalle Valo WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1, 59405e3dd157SKalle Valo WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2, 59415e3dd157SKalle Valo }; 59425e3dd157SKalle Valo 594346725b15SMichal Kazior #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0 594446725b15SMichal Kazior 594546725b15SMichal Kazior /* Firmware crashes if keepalive interval exceeds this limit */ 594646725b15SMichal Kazior #define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff 594746725b15SMichal Kazior 59485e3dd157SKalle Valo /* note: ip4 addresses are in network byte order, i.e. big endian */ 59495e3dd157SKalle Valo struct wmi_sta_keepalive_arp_resp { 59505e3dd157SKalle Valo __be32 src_ip4_addr; 59515e3dd157SKalle Valo __be32 dest_ip4_addr; 59525e3dd157SKalle Valo struct wmi_mac_addr dest_mac_addr; 59535e3dd157SKalle Valo } __packed; 59545e3dd157SKalle Valo 59555e3dd157SKalle Valo struct wmi_sta_keepalive_cmd { 59565e3dd157SKalle Valo __le32 vdev_id; 59575e3dd157SKalle Valo __le32 enabled; 59585e3dd157SKalle Valo __le32 method; /* WMI_STA_KEEPALIVE_METHOD_ */ 59595e3dd157SKalle Valo __le32 interval; /* in seconds */ 59605e3dd157SKalle Valo struct wmi_sta_keepalive_arp_resp arp_resp; 59615e3dd157SKalle Valo } __packed; 59625e3dd157SKalle Valo 59636e8b188bSJanusz Dziedzic struct wmi_sta_keepalive_arg { 59646e8b188bSJanusz Dziedzic u32 vdev_id; 59656e8b188bSJanusz Dziedzic u32 enabled; 59666e8b188bSJanusz Dziedzic u32 method; 59676e8b188bSJanusz Dziedzic u32 interval; 59686e8b188bSJanusz Dziedzic __be32 src_ip4_addr; 59696e8b188bSJanusz Dziedzic __be32 dest_ip4_addr; 59706e8b188bSJanusz Dziedzic const u8 dest_mac_addr[ETH_ALEN]; 59716e8b188bSJanusz Dziedzic }; 59726e8b188bSJanusz Dziedzic 59739cfbce75SMichal Kazior enum wmi_force_fw_hang_type { 59749cfbce75SMichal Kazior WMI_FORCE_FW_HANG_ASSERT = 1, 59759cfbce75SMichal Kazior WMI_FORCE_FW_HANG_NO_DETECT, 59769cfbce75SMichal Kazior WMI_FORCE_FW_HANG_CTRL_EP_FULL, 59779cfbce75SMichal Kazior WMI_FORCE_FW_HANG_EMPTY_POINT, 59789cfbce75SMichal Kazior WMI_FORCE_FW_HANG_STACK_OVERFLOW, 59799cfbce75SMichal Kazior WMI_FORCE_FW_HANG_INFINITE_LOOP, 59809cfbce75SMichal Kazior }; 59819cfbce75SMichal Kazior 59829cfbce75SMichal Kazior #define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF 59839cfbce75SMichal Kazior 59849cfbce75SMichal Kazior struct wmi_force_fw_hang_cmd { 59859cfbce75SMichal Kazior __le32 type; 59869cfbce75SMichal Kazior __le32 delay_ms; 59879cfbce75SMichal Kazior } __packed; 59889cfbce75SMichal Kazior 5989f118a3e5SKalle Valo enum ath10k_dbglog_level { 5990f118a3e5SKalle Valo ATH10K_DBGLOG_LEVEL_VERBOSE = 0, 5991f118a3e5SKalle Valo ATH10K_DBGLOG_LEVEL_INFO = 1, 5992f118a3e5SKalle Valo ATH10K_DBGLOG_LEVEL_WARN = 2, 5993f118a3e5SKalle Valo ATH10K_DBGLOG_LEVEL_ERR = 3, 5994f118a3e5SKalle Valo }; 5995f118a3e5SKalle Valo 5996f118a3e5SKalle Valo /* VAP ids to enable dbglog */ 5997f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_VAP_LOG_LSB 0 5998f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_VAP_LOG_MASK 0x0000ffff 5999f118a3e5SKalle Valo 6000f118a3e5SKalle Valo /* to enable dbglog in the firmware */ 6001f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB 16 6002f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK 0x00010000 6003f118a3e5SKalle Valo 6004f118a3e5SKalle Valo /* timestamp resolution */ 6005f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_RESOLUTION_LSB 17 6006f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_RESOLUTION_MASK 0x000E0000 6007f118a3e5SKalle Valo 6008f118a3e5SKalle Valo /* number of queued messages before sending them to the host */ 6009f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB 20 6010f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK 0x0ff00000 6011f118a3e5SKalle Valo 6012f118a3e5SKalle Valo /* 6013f118a3e5SKalle Valo * Log levels to enable. This defines the minimum level to enable, this is 6014f118a3e5SKalle Valo * not a bitmask. See enum ath10k_dbglog_level for the values. 6015f118a3e5SKalle Valo */ 6016f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_LOG_LVL_LSB 28 6017f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_LOG_LVL_MASK 0x70000000 6018f118a3e5SKalle Valo 6019f118a3e5SKalle Valo /* 6020f118a3e5SKalle Valo * Note: this is a cleaned up version of a struct firmware uses. For 6021f118a3e5SKalle Valo * example, config_valid was hidden inside an array. 6022f118a3e5SKalle Valo */ 6023f118a3e5SKalle Valo struct wmi_dbglog_cfg_cmd { 6024f118a3e5SKalle Valo /* bitmask to hold mod id config*/ 6025f118a3e5SKalle Valo __le32 module_enable; 6026f118a3e5SKalle Valo 6027f118a3e5SKalle Valo /* see ATH10K_DBGLOG_CFG_ */ 6028f118a3e5SKalle Valo __le32 config_enable; 6029f118a3e5SKalle Valo 6030f118a3e5SKalle Valo /* mask of module id bits to be changed */ 6031f118a3e5SKalle Valo __le32 module_valid; 6032f118a3e5SKalle Valo 6033f118a3e5SKalle Valo /* mask of config bits to be changed, see ATH10K_DBGLOG_CFG_ */ 6034f118a3e5SKalle Valo __le32 config_valid; 6035f118a3e5SKalle Valo } __packed; 6036f118a3e5SKalle Valo 6037c1a4654aSMichal Kazior enum wmi_roam_reason { 6038c1a4654aSMichal Kazior WMI_ROAM_REASON_BETTER_AP = 1, 6039c1a4654aSMichal Kazior WMI_ROAM_REASON_BEACON_MISS = 2, 6040c1a4654aSMichal Kazior WMI_ROAM_REASON_LOW_RSSI = 3, 6041c1a4654aSMichal Kazior WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 6042c1a4654aSMichal Kazior WMI_ROAM_REASON_HO_FAILED = 5, 6043c1a4654aSMichal Kazior 6044c1a4654aSMichal Kazior /* keep last */ 6045c1a4654aSMichal Kazior WMI_ROAM_REASON_MAX, 6046c1a4654aSMichal Kazior }; 6047c1a4654aSMichal Kazior 6048c1a4654aSMichal Kazior struct wmi_roam_ev { 6049c1a4654aSMichal Kazior __le32 vdev_id; 6050c1a4654aSMichal Kazior __le32 reason; 6051c1a4654aSMichal Kazior } __packed; 6052c1a4654aSMichal Kazior 60535e3dd157SKalle Valo #define ATH10K_FRAGMT_THRESHOLD_MIN 540 60545e3dd157SKalle Valo #define ATH10K_FRAGMT_THRESHOLD_MAX 2346 60555e3dd157SKalle Valo 60565e3dd157SKalle Valo #define WMI_MAX_EVENT 0x1000 60575e3dd157SKalle Valo /* Maximum number of pending TXed WMI packets */ 60585e3dd157SKalle Valo #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 60595e3dd157SKalle Valo 60605e3dd157SKalle Valo /* By default disable power save for IBSS */ 60615e3dd157SKalle Valo #define ATH10K_DEFAULT_ATIM 0 60625e3dd157SKalle Valo 60635c01aa3dSMichal Kazior #define WMI_MAX_MEM_REQS 16 60645c01aa3dSMichal Kazior 606532653cf1SMichal Kazior struct wmi_scan_ev_arg { 606632653cf1SMichal Kazior __le32 event_type; /* %WMI_SCAN_EVENT_ */ 606732653cf1SMichal Kazior __le32 reason; /* %WMI_SCAN_REASON_ */ 606832653cf1SMichal Kazior __le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 606932653cf1SMichal Kazior __le32 scan_req_id; 607032653cf1SMichal Kazior __le32 scan_id; 607132653cf1SMichal Kazior __le32 vdev_id; 607232653cf1SMichal Kazior }; 607332653cf1SMichal Kazior 607432653cf1SMichal Kazior struct wmi_mgmt_rx_ev_arg { 607532653cf1SMichal Kazior __le32 channel; 607632653cf1SMichal Kazior __le32 snr; 607732653cf1SMichal Kazior __le32 rate; 607832653cf1SMichal Kazior __le32 phy_mode; 607932653cf1SMichal Kazior __le32 buf_len; 608032653cf1SMichal Kazior __le32 status; /* %WMI_RX_STATUS_ */ 608132653cf1SMichal Kazior }; 608232653cf1SMichal Kazior 608332653cf1SMichal Kazior struct wmi_ch_info_ev_arg { 608432653cf1SMichal Kazior __le32 err_code; 608532653cf1SMichal Kazior __le32 freq; 608632653cf1SMichal Kazior __le32 cmd_flags; 608732653cf1SMichal Kazior __le32 noise_floor; 608832653cf1SMichal Kazior __le32 rx_clear_count; 608932653cf1SMichal Kazior __le32 cycle_count; 6090b2297baaSRaja Mani __le32 chan_tx_pwr_range; 6091b2297baaSRaja Mani __le32 chan_tx_pwr_tp; 6092b2297baaSRaja Mani __le32 rx_frame_count; 609332653cf1SMichal Kazior }; 609432653cf1SMichal Kazior 609532653cf1SMichal Kazior struct wmi_vdev_start_ev_arg { 609632653cf1SMichal Kazior __le32 vdev_id; 609732653cf1SMichal Kazior __le32 req_id; 609832653cf1SMichal Kazior __le32 resp_type; /* %WMI_VDEV_RESP_ */ 609932653cf1SMichal Kazior __le32 status; 610032653cf1SMichal Kazior }; 610132653cf1SMichal Kazior 610232653cf1SMichal Kazior struct wmi_peer_kick_ev_arg { 610332653cf1SMichal Kazior const u8 *mac_addr; 610432653cf1SMichal Kazior }; 610532653cf1SMichal Kazior 610632653cf1SMichal Kazior struct wmi_swba_ev_arg { 610732653cf1SMichal Kazior __le32 vdev_map; 6108a03fee34SRaja Mani struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV]; 610932653cf1SMichal Kazior const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV]; 611032653cf1SMichal Kazior }; 611132653cf1SMichal Kazior 611232653cf1SMichal Kazior struct wmi_phyerr_ev_arg { 6113991adf71SRaja Mani u32 tsf_timestamp; 6114991adf71SRaja Mani u16 freq1; 6115991adf71SRaja Mani u16 freq2; 6116991adf71SRaja Mani u8 rssi_combined; 6117991adf71SRaja Mani u8 chan_width_mhz; 6118991adf71SRaja Mani u8 phy_err_code; 6119991adf71SRaja Mani u16 nf_chains[4]; 6120991adf71SRaja Mani u32 buf_len; 6121991adf71SRaja Mani const u8 *buf; 6122991adf71SRaja Mani u8 hdr_len; 6123991adf71SRaja Mani }; 6124991adf71SRaja Mani 6125991adf71SRaja Mani struct wmi_phyerr_hdr_arg { 6126991adf71SRaja Mani u32 num_phyerrs; 6127991adf71SRaja Mani u32 tsf_l32; 6128991adf71SRaja Mani u32 tsf_u32; 6129991adf71SRaja Mani u32 buf_len; 6130991adf71SRaja Mani const void *phyerrs; 613132653cf1SMichal Kazior }; 613232653cf1SMichal Kazior 61335c01aa3dSMichal Kazior struct wmi_svc_rdy_ev_arg { 61345c01aa3dSMichal Kazior __le32 min_tx_power; 61355c01aa3dSMichal Kazior __le32 max_tx_power; 61365c01aa3dSMichal Kazior __le32 ht_cap; 61375c01aa3dSMichal Kazior __le32 vht_cap; 61385c01aa3dSMichal Kazior __le32 sw_ver0; 61395c01aa3dSMichal Kazior __le32 sw_ver1; 6140ca996ec5SMichal Kazior __le32 fw_build; 61415c01aa3dSMichal Kazior __le32 phy_capab; 61425c01aa3dSMichal Kazior __le32 num_rf_chains; 61435c01aa3dSMichal Kazior __le32 eeprom_rd; 61445c01aa3dSMichal Kazior __le32 num_mem_reqs; 61455c01aa3dSMichal Kazior const __le32 *service_map; 61462a3e60d3SMichal Kazior size_t service_map_len; 61475c01aa3dSMichal Kazior const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS]; 61485c01aa3dSMichal Kazior }; 61495c01aa3dSMichal Kazior 615032653cf1SMichal Kazior struct wmi_rdy_ev_arg { 615132653cf1SMichal Kazior __le32 sw_version; 615232653cf1SMichal Kazior __le32 abi_version; 615332653cf1SMichal Kazior __le32 status; 615432653cf1SMichal Kazior const u8 *mac_addr; 615532653cf1SMichal Kazior }; 615632653cf1SMichal Kazior 6157c1a4654aSMichal Kazior struct wmi_roam_ev_arg { 6158c1a4654aSMichal Kazior __le32 vdev_id; 6159c1a4654aSMichal Kazior __le32 reason; 6160c1a4654aSMichal Kazior __le32 rssi; 6161c1a4654aSMichal Kazior }; 6162c1a4654aSMichal Kazior 6163a57a6a27SRajkumar Manoharan struct wmi_pdev_temperature_event { 6164a57a6a27SRajkumar Manoharan /* temperature value in Celcius degree */ 6165a57a6a27SRajkumar Manoharan __le32 temperature; 6166a57a6a27SRajkumar Manoharan } __packed; 6167a57a6a27SRajkumar Manoharan 6168f5431e87SJanusz Dziedzic /* WOW structures */ 6169f5431e87SJanusz Dziedzic enum wmi_wow_wakeup_event { 6170f5431e87SJanusz Dziedzic WOW_BMISS_EVENT = 0, 6171f5431e87SJanusz Dziedzic WOW_BETTER_AP_EVENT, 6172f5431e87SJanusz Dziedzic WOW_DEAUTH_RECVD_EVENT, 6173f5431e87SJanusz Dziedzic WOW_MAGIC_PKT_RECVD_EVENT, 6174f5431e87SJanusz Dziedzic WOW_GTK_ERR_EVENT, 6175f5431e87SJanusz Dziedzic WOW_FOURWAY_HSHAKE_EVENT, 6176f5431e87SJanusz Dziedzic WOW_EAPOL_RECVD_EVENT, 6177f5431e87SJanusz Dziedzic WOW_NLO_DETECTED_EVENT, 6178f5431e87SJanusz Dziedzic WOW_DISASSOC_RECVD_EVENT, 6179f5431e87SJanusz Dziedzic WOW_PATTERN_MATCH_EVENT, 6180f5431e87SJanusz Dziedzic WOW_CSA_IE_EVENT, 6181f5431e87SJanusz Dziedzic WOW_PROBE_REQ_WPS_IE_EVENT, 6182f5431e87SJanusz Dziedzic WOW_AUTH_REQ_EVENT, 6183f5431e87SJanusz Dziedzic WOW_ASSOC_REQ_EVENT, 6184f5431e87SJanusz Dziedzic WOW_HTT_EVENT, 6185f5431e87SJanusz Dziedzic WOW_RA_MATCH_EVENT, 6186f5431e87SJanusz Dziedzic WOW_HOST_AUTO_SHUTDOWN_EVENT, 6187f5431e87SJanusz Dziedzic WOW_IOAC_MAGIC_EVENT, 6188f5431e87SJanusz Dziedzic WOW_IOAC_SHORT_EVENT, 6189f5431e87SJanusz Dziedzic WOW_IOAC_EXTEND_EVENT, 6190f5431e87SJanusz Dziedzic WOW_IOAC_TIMER_EVENT, 6191f5431e87SJanusz Dziedzic WOW_DFS_PHYERR_RADAR_EVENT, 6192f5431e87SJanusz Dziedzic WOW_BEACON_EVENT, 6193f5431e87SJanusz Dziedzic WOW_CLIENT_KICKOUT_EVENT, 6194f5431e87SJanusz Dziedzic WOW_EVENT_MAX, 6195f5431e87SJanusz Dziedzic }; 6196f5431e87SJanusz Dziedzic 6197f5431e87SJanusz Dziedzic #define C2S(x) case x: return #x 6198f5431e87SJanusz Dziedzic 6199f5431e87SJanusz Dziedzic static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev) 6200f5431e87SJanusz Dziedzic { 6201f5431e87SJanusz Dziedzic switch (ev) { 6202f5431e87SJanusz Dziedzic C2S(WOW_BMISS_EVENT); 6203f5431e87SJanusz Dziedzic C2S(WOW_BETTER_AP_EVENT); 6204f5431e87SJanusz Dziedzic C2S(WOW_DEAUTH_RECVD_EVENT); 6205f5431e87SJanusz Dziedzic C2S(WOW_MAGIC_PKT_RECVD_EVENT); 6206f5431e87SJanusz Dziedzic C2S(WOW_GTK_ERR_EVENT); 6207f5431e87SJanusz Dziedzic C2S(WOW_FOURWAY_HSHAKE_EVENT); 6208f5431e87SJanusz Dziedzic C2S(WOW_EAPOL_RECVD_EVENT); 6209f5431e87SJanusz Dziedzic C2S(WOW_NLO_DETECTED_EVENT); 6210f5431e87SJanusz Dziedzic C2S(WOW_DISASSOC_RECVD_EVENT); 6211f5431e87SJanusz Dziedzic C2S(WOW_PATTERN_MATCH_EVENT); 6212f5431e87SJanusz Dziedzic C2S(WOW_CSA_IE_EVENT); 6213f5431e87SJanusz Dziedzic C2S(WOW_PROBE_REQ_WPS_IE_EVENT); 6214f5431e87SJanusz Dziedzic C2S(WOW_AUTH_REQ_EVENT); 6215f5431e87SJanusz Dziedzic C2S(WOW_ASSOC_REQ_EVENT); 6216f5431e87SJanusz Dziedzic C2S(WOW_HTT_EVENT); 6217f5431e87SJanusz Dziedzic C2S(WOW_RA_MATCH_EVENT); 6218f5431e87SJanusz Dziedzic C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT); 6219f5431e87SJanusz Dziedzic C2S(WOW_IOAC_MAGIC_EVENT); 6220f5431e87SJanusz Dziedzic C2S(WOW_IOAC_SHORT_EVENT); 6221f5431e87SJanusz Dziedzic C2S(WOW_IOAC_EXTEND_EVENT); 6222f5431e87SJanusz Dziedzic C2S(WOW_IOAC_TIMER_EVENT); 6223f5431e87SJanusz Dziedzic C2S(WOW_DFS_PHYERR_RADAR_EVENT); 6224f5431e87SJanusz Dziedzic C2S(WOW_BEACON_EVENT); 6225f5431e87SJanusz Dziedzic C2S(WOW_CLIENT_KICKOUT_EVENT); 6226f5431e87SJanusz Dziedzic C2S(WOW_EVENT_MAX); 6227f5431e87SJanusz Dziedzic default: 6228f5431e87SJanusz Dziedzic return NULL; 6229f5431e87SJanusz Dziedzic } 6230f5431e87SJanusz Dziedzic } 6231f5431e87SJanusz Dziedzic 6232f5431e87SJanusz Dziedzic enum wmi_wow_wake_reason { 6233f5431e87SJanusz Dziedzic WOW_REASON_UNSPECIFIED = -1, 6234f5431e87SJanusz Dziedzic WOW_REASON_NLOD = 0, 6235f5431e87SJanusz Dziedzic WOW_REASON_AP_ASSOC_LOST, 6236f5431e87SJanusz Dziedzic WOW_REASON_LOW_RSSI, 6237f5431e87SJanusz Dziedzic WOW_REASON_DEAUTH_RECVD, 6238f5431e87SJanusz Dziedzic WOW_REASON_DISASSOC_RECVD, 6239f5431e87SJanusz Dziedzic WOW_REASON_GTK_HS_ERR, 6240f5431e87SJanusz Dziedzic WOW_REASON_EAP_REQ, 6241f5431e87SJanusz Dziedzic WOW_REASON_FOURWAY_HS_RECV, 6242f5431e87SJanusz Dziedzic WOW_REASON_TIMER_INTR_RECV, 6243f5431e87SJanusz Dziedzic WOW_REASON_PATTERN_MATCH_FOUND, 6244f5431e87SJanusz Dziedzic WOW_REASON_RECV_MAGIC_PATTERN, 6245f5431e87SJanusz Dziedzic WOW_REASON_P2P_DISC, 6246f5431e87SJanusz Dziedzic WOW_REASON_WLAN_HB, 6247f5431e87SJanusz Dziedzic WOW_REASON_CSA_EVENT, 6248f5431e87SJanusz Dziedzic WOW_REASON_PROBE_REQ_WPS_IE_RECV, 6249f5431e87SJanusz Dziedzic WOW_REASON_AUTH_REQ_RECV, 6250f5431e87SJanusz Dziedzic WOW_REASON_ASSOC_REQ_RECV, 6251f5431e87SJanusz Dziedzic WOW_REASON_HTT_EVENT, 6252f5431e87SJanusz Dziedzic WOW_REASON_RA_MATCH, 6253f5431e87SJanusz Dziedzic WOW_REASON_HOST_AUTO_SHUTDOWN, 6254f5431e87SJanusz Dziedzic WOW_REASON_IOAC_MAGIC_EVENT, 6255f5431e87SJanusz Dziedzic WOW_REASON_IOAC_SHORT_EVENT, 6256f5431e87SJanusz Dziedzic WOW_REASON_IOAC_EXTEND_EVENT, 6257f5431e87SJanusz Dziedzic WOW_REASON_IOAC_TIMER_EVENT, 6258f5431e87SJanusz Dziedzic WOW_REASON_ROAM_HO, 6259f5431e87SJanusz Dziedzic WOW_REASON_DFS_PHYERR_RADADR_EVENT, 6260f5431e87SJanusz Dziedzic WOW_REASON_BEACON_RECV, 6261f5431e87SJanusz Dziedzic WOW_REASON_CLIENT_KICKOUT_EVENT, 6262f5431e87SJanusz Dziedzic WOW_REASON_DEBUG_TEST = 0xFF, 6263f5431e87SJanusz Dziedzic }; 6264f5431e87SJanusz Dziedzic 6265f5431e87SJanusz Dziedzic static inline const char *wow_reason(enum wmi_wow_wake_reason reason) 6266f5431e87SJanusz Dziedzic { 6267f5431e87SJanusz Dziedzic switch (reason) { 6268f5431e87SJanusz Dziedzic C2S(WOW_REASON_UNSPECIFIED); 6269f5431e87SJanusz Dziedzic C2S(WOW_REASON_NLOD); 6270f5431e87SJanusz Dziedzic C2S(WOW_REASON_AP_ASSOC_LOST); 6271f5431e87SJanusz Dziedzic C2S(WOW_REASON_LOW_RSSI); 6272f5431e87SJanusz Dziedzic C2S(WOW_REASON_DEAUTH_RECVD); 6273f5431e87SJanusz Dziedzic C2S(WOW_REASON_DISASSOC_RECVD); 6274f5431e87SJanusz Dziedzic C2S(WOW_REASON_GTK_HS_ERR); 6275f5431e87SJanusz Dziedzic C2S(WOW_REASON_EAP_REQ); 6276f5431e87SJanusz Dziedzic C2S(WOW_REASON_FOURWAY_HS_RECV); 6277f5431e87SJanusz Dziedzic C2S(WOW_REASON_TIMER_INTR_RECV); 6278f5431e87SJanusz Dziedzic C2S(WOW_REASON_PATTERN_MATCH_FOUND); 6279f5431e87SJanusz Dziedzic C2S(WOW_REASON_RECV_MAGIC_PATTERN); 6280f5431e87SJanusz Dziedzic C2S(WOW_REASON_P2P_DISC); 6281f5431e87SJanusz Dziedzic C2S(WOW_REASON_WLAN_HB); 6282f5431e87SJanusz Dziedzic C2S(WOW_REASON_CSA_EVENT); 6283f5431e87SJanusz Dziedzic C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV); 6284f5431e87SJanusz Dziedzic C2S(WOW_REASON_AUTH_REQ_RECV); 6285f5431e87SJanusz Dziedzic C2S(WOW_REASON_ASSOC_REQ_RECV); 6286f5431e87SJanusz Dziedzic C2S(WOW_REASON_HTT_EVENT); 6287f5431e87SJanusz Dziedzic C2S(WOW_REASON_RA_MATCH); 6288f5431e87SJanusz Dziedzic C2S(WOW_REASON_HOST_AUTO_SHUTDOWN); 6289f5431e87SJanusz Dziedzic C2S(WOW_REASON_IOAC_MAGIC_EVENT); 6290f5431e87SJanusz Dziedzic C2S(WOW_REASON_IOAC_SHORT_EVENT); 6291f5431e87SJanusz Dziedzic C2S(WOW_REASON_IOAC_EXTEND_EVENT); 6292f5431e87SJanusz Dziedzic C2S(WOW_REASON_IOAC_TIMER_EVENT); 6293f5431e87SJanusz Dziedzic C2S(WOW_REASON_ROAM_HO); 6294f5431e87SJanusz Dziedzic C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT); 6295f5431e87SJanusz Dziedzic C2S(WOW_REASON_BEACON_RECV); 6296f5431e87SJanusz Dziedzic C2S(WOW_REASON_CLIENT_KICKOUT_EVENT); 6297f5431e87SJanusz Dziedzic C2S(WOW_REASON_DEBUG_TEST); 6298f5431e87SJanusz Dziedzic default: 6299f5431e87SJanusz Dziedzic return NULL; 6300f5431e87SJanusz Dziedzic } 6301f5431e87SJanusz Dziedzic } 6302f5431e87SJanusz Dziedzic 6303f5431e87SJanusz Dziedzic #undef C2S 6304f5431e87SJanusz Dziedzic 6305f5431e87SJanusz Dziedzic struct wmi_wow_ev_arg { 6306f5431e87SJanusz Dziedzic u32 vdev_id; 6307f5431e87SJanusz Dziedzic u32 flag; 6308f5431e87SJanusz Dziedzic enum wmi_wow_wake_reason wake_reason; 6309f5431e87SJanusz Dziedzic u32 data_len; 6310f5431e87SJanusz Dziedzic }; 6311f5431e87SJanusz Dziedzic 631225c86619SJanusz Dziedzic #define WOW_MIN_PATTERN_SIZE 1 631325c86619SJanusz Dziedzic #define WOW_MAX_PATTERN_SIZE 148 631425c86619SJanusz Dziedzic #define WOW_MAX_PKT_OFFSET 128 631525c86619SJanusz Dziedzic 6316ad45c888SMarek Puzyniak enum wmi_tdls_state { 6317ad45c888SMarek Puzyniak WMI_TDLS_DISABLE, 6318ad45c888SMarek Puzyniak WMI_TDLS_ENABLE_PASSIVE, 6319ad45c888SMarek Puzyniak WMI_TDLS_ENABLE_ACTIVE, 6320ad45c888SMarek Puzyniak }; 6321ad45c888SMarek Puzyniak 6322ad45c888SMarek Puzyniak enum wmi_tdls_peer_state { 6323ad45c888SMarek Puzyniak WMI_TDLS_PEER_STATE_PEERING, 6324ad45c888SMarek Puzyniak WMI_TDLS_PEER_STATE_CONNECTED, 6325ad45c888SMarek Puzyniak WMI_TDLS_PEER_STATE_TEARDOWN, 6326ad45c888SMarek Puzyniak }; 6327ad45c888SMarek Puzyniak 6328ad45c888SMarek Puzyniak struct wmi_tdls_peer_update_cmd_arg { 6329ad45c888SMarek Puzyniak u32 vdev_id; 6330ad45c888SMarek Puzyniak enum wmi_tdls_peer_state peer_state; 6331ad45c888SMarek Puzyniak u8 addr[ETH_ALEN]; 6332ad45c888SMarek Puzyniak }; 6333ad45c888SMarek Puzyniak 6334ad45c888SMarek Puzyniak #define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32 6335ad45c888SMarek Puzyniak 6336ad45c888SMarek Puzyniak struct wmi_tdls_peer_capab_arg { 6337ad45c888SMarek Puzyniak u8 peer_uapsd_queues; 6338ad45c888SMarek Puzyniak u8 peer_max_sp; 6339ad45c888SMarek Puzyniak u32 buff_sta_support; 6340ad45c888SMarek Puzyniak u32 off_chan_support; 6341ad45c888SMarek Puzyniak u32 peer_curr_operclass; 6342ad45c888SMarek Puzyniak u32 self_curr_operclass; 6343ad45c888SMarek Puzyniak u32 peer_chan_len; 6344ad45c888SMarek Puzyniak u32 peer_operclass_len; 6345ad45c888SMarek Puzyniak u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES]; 6346ad45c888SMarek Puzyniak u32 is_peer_responder; 6347ad45c888SMarek Puzyniak u32 pref_offchan_num; 6348ad45c888SMarek Puzyniak u32 pref_offchan_bw; 6349ad45c888SMarek Puzyniak }; 6350ad45c888SMarek Puzyniak 635108e75ea8SVivek Natarajan enum wmi_txbf_conf { 635208e75ea8SVivek Natarajan WMI_TXBF_CONF_UNSUPPORTED, 635308e75ea8SVivek Natarajan WMI_TXBF_CONF_BEFORE_ASSOC, 635408e75ea8SVivek Natarajan WMI_TXBF_CONF_AFTER_ASSOC, 635508e75ea8SVivek Natarajan }; 635608e75ea8SVivek Natarajan 635762f77f09SMaharaja #define WMI_CCA_DETECT_LEVEL_AUTO 0 635862f77f09SMaharaja #define WMI_CCA_DETECT_MARGIN_AUTO 0 635962f77f09SMaharaja 636062f77f09SMaharaja struct wmi_pdev_set_adaptive_cca_params { 636162f77f09SMaharaja __le32 enable; 636262f77f09SMaharaja __le32 cca_detect_level; 636362f77f09SMaharaja __le32 cca_detect_margin; 636462f77f09SMaharaja } __packed; 636562f77f09SMaharaja 63665e3dd157SKalle Valo struct ath10k; 63675e3dd157SKalle Valo struct ath10k_vif; 63680226d602SMichal Kazior struct ath10k_fw_stats_pdev; 63690226d602SMichal Kazior struct ath10k_fw_stats_peer; 6370bc6f9ae6SManikanta Pubbisetty struct ath10k_fw_stats; 63715e3dd157SKalle Valo 63725e3dd157SKalle Valo int ath10k_wmi_attach(struct ath10k *ar); 63735e3dd157SKalle Valo void ath10k_wmi_detach(struct ath10k *ar); 6374a925a376SVasanthakumar Thiagarajan void ath10k_wmi_free_host_mem(struct ath10k *ar); 63755e3dd157SKalle Valo int ath10k_wmi_wait_for_service_ready(struct ath10k *ar); 63765e3dd157SKalle Valo int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar); 63775e3dd157SKalle Valo 63780226d602SMichal Kazior struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len); 637995bf21f9SMichal Kazior int ath10k_wmi_connect(struct ath10k *ar); 6380666a73f3SKalle Valo 6381666a73f3SKalle Valo struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len); 6382666a73f3SKalle Valo int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id); 6383d7579d12SMichal Kazior int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb, 6384d7579d12SMichal Kazior u32 cmd_id); 63855e3dd157SKalle Valo void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *); 63865e3dd157SKalle Valo 6387b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src, 6388b91251fbSMichal Kazior struct ath10k_fw_stats_pdev *dst); 6389b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src, 6390b91251fbSMichal Kazior struct ath10k_fw_stats_pdev *dst); 6391b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src, 6392b91251fbSMichal Kazior struct ath10k_fw_stats_pdev *dst); 6393b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src, 63940226d602SMichal Kazior struct ath10k_fw_stats_pdev *dst); 63950226d602SMichal Kazior void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src, 63960226d602SMichal Kazior struct ath10k_fw_stats_peer *dst); 63970226d602SMichal Kazior void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar, 63980226d602SMichal Kazior struct wmi_host_mem_chunks *chunks); 63990226d602SMichal Kazior void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn, 64000226d602SMichal Kazior const struct wmi_start_scan_arg *arg); 64015e752e42SMichal Kazior void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params, 64020226d602SMichal Kazior const struct wmi_wmm_params_arg *arg); 64030226d602SMichal Kazior void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch, 64040226d602SMichal Kazior const struct wmi_channel_arg *arg); 64050226d602SMichal Kazior int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg); 64060226d602SMichal Kazior 64070226d602SMichal Kazior int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb); 64080226d602SMichal Kazior int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb); 64090226d602SMichal Kazior void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb); 64100226d602SMichal Kazior void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb); 64110226d602SMichal Kazior int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb); 64120226d602SMichal Kazior void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb); 64130226d602SMichal Kazior void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb); 64140226d602SMichal Kazior void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb); 64150226d602SMichal Kazior void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb); 64160226d602SMichal Kazior void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb); 64170226d602SMichal Kazior void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb); 64180226d602SMichal Kazior void ath10k_wmi_event_dfs(struct ath10k *ar, 6419991adf71SRaja Mani struct wmi_phyerr_ev_arg *phyerr, u64 tsf); 64200226d602SMichal Kazior void ath10k_wmi_event_spectral_scan(struct ath10k *ar, 6421991adf71SRaja Mani struct wmi_phyerr_ev_arg *phyerr, 64220226d602SMichal Kazior u64 tsf); 64230226d602SMichal Kazior void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb); 64240226d602SMichal Kazior void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb); 64250226d602SMichal Kazior void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb); 64260226d602SMichal Kazior void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb); 64270226d602SMichal Kazior void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb); 64280226d602SMichal Kazior void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb); 64290226d602SMichal Kazior void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar, 64300226d602SMichal Kazior struct sk_buff *skb); 64310226d602SMichal Kazior void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar, 64320226d602SMichal Kazior struct sk_buff *skb); 64330226d602SMichal Kazior void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb); 64340226d602SMichal Kazior void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb); 64350226d602SMichal Kazior void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb); 64360226d602SMichal Kazior void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb); 64370226d602SMichal Kazior void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb); 64380226d602SMichal Kazior void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, 64390226d602SMichal Kazior struct sk_buff *skb); 64400226d602SMichal Kazior void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb); 64410226d602SMichal Kazior void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb); 64420226d602SMichal Kazior void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb); 64430226d602SMichal Kazior void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar, 64440226d602SMichal Kazior struct sk_buff *skb); 64450226d602SMichal Kazior void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb); 64460226d602SMichal Kazior void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb); 64470226d602SMichal Kazior void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb); 64480226d602SMichal Kazior void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb); 64490226d602SMichal Kazior int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb); 6450991adf71SRaja Mani int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf, 6451991adf71SRaja Mani int left_len, struct wmi_phyerr_ev_arg *arg); 6452bc6f9ae6SManikanta Pubbisetty void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar, 6453bc6f9ae6SManikanta Pubbisetty struct ath10k_fw_stats *fw_stats, 6454bc6f9ae6SManikanta Pubbisetty char *buf); 6455bc6f9ae6SManikanta Pubbisetty void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar, 6456bc6f9ae6SManikanta Pubbisetty struct ath10k_fw_stats *fw_stats, 6457bc6f9ae6SManikanta Pubbisetty char *buf); 6458bc6f9ae6SManikanta Pubbisetty size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head); 6459bc6f9ae6SManikanta Pubbisetty size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head); 646098dd2b92SManikanta Pubbisetty void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar, 646198dd2b92SManikanta Pubbisetty struct ath10k_fw_stats *fw_stats, 646298dd2b92SManikanta Pubbisetty char *buf); 6463bc6f9ae6SManikanta Pubbisetty 64645e3dd157SKalle Valo #endif /* _WMI_H_ */ 6465