15e3dd157SKalle Valo /* 25e3dd157SKalle Valo * Copyright (c) 2005-2011 Atheros Communications Inc. 35e3dd157SKalle Valo * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 45e3dd157SKalle Valo * 55e3dd157SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 65e3dd157SKalle Valo * purpose with or without fee is hereby granted, provided that the above 75e3dd157SKalle Valo * copyright notice and this permission notice appear in all copies. 85e3dd157SKalle Valo * 95e3dd157SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 105e3dd157SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 115e3dd157SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 125e3dd157SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 135e3dd157SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 145e3dd157SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 155e3dd157SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 165e3dd157SKalle Valo */ 175e3dd157SKalle Valo 185e3dd157SKalle Valo #ifndef _WMI_H_ 195e3dd157SKalle Valo #define _WMI_H_ 205e3dd157SKalle Valo 215e3dd157SKalle Valo #include <linux/types.h> 225e3dd157SKalle Valo #include <net/mac80211.h> 235e3dd157SKalle Valo 245e3dd157SKalle Valo /* 255e3dd157SKalle Valo * This file specifies the WMI interface for the Unified Software 265e3dd157SKalle Valo * Architecture. 275e3dd157SKalle Valo * 285e3dd157SKalle Valo * It includes definitions of all the commands and events. Commands are 295e3dd157SKalle Valo * messages from the host to the target. Events and Replies are messages 305e3dd157SKalle Valo * from the target to the host. 315e3dd157SKalle Valo * 325e3dd157SKalle Valo * Ownership of correctness in regards to WMI commands belongs to the host 335e3dd157SKalle Valo * driver and the target is not required to validate parameters for value, 345e3dd157SKalle Valo * proper range, or any other checking. 355e3dd157SKalle Valo * 365e3dd157SKalle Valo * Guidelines for extending this interface are below. 375e3dd157SKalle Valo * 385e3dd157SKalle Valo * 1. Add new WMI commands ONLY within the specified range - 0x9000 - 0x9fff 395e3dd157SKalle Valo * 405e3dd157SKalle Valo * 2. Use ONLY u32 type for defining member variables within WMI 415e3dd157SKalle Valo * command/event structures. Do not use u8, u16, bool or 425e3dd157SKalle Valo * enum types within these structures. 435e3dd157SKalle Valo * 445e3dd157SKalle Valo * 3. DO NOT define bit fields within structures. Implement bit fields 455e3dd157SKalle Valo * using masks if necessary. Do not use the programming language's bit 465e3dd157SKalle Valo * field definition. 475e3dd157SKalle Valo * 485e3dd157SKalle Valo * 4. Define macros for encode/decode of u8, u16 fields within 495e3dd157SKalle Valo * the u32 variables. Use these macros for set/get of these fields. 505e3dd157SKalle Valo * Try to use this to optimize the structure without bloating it with 515e3dd157SKalle Valo * u32 variables for every lower sized field. 525e3dd157SKalle Valo * 535e3dd157SKalle Valo * 5. Do not use PACK/UNPACK attributes for the structures as each member 545e3dd157SKalle Valo * variable is already 4-byte aligned by virtue of being a u32 555e3dd157SKalle Valo * type. 565e3dd157SKalle Valo * 575e3dd157SKalle Valo * 6. Comment each parameter part of the WMI command/event structure by 585e3dd157SKalle Valo * using the 2 stars at the begining of C comment instead of one star to 595e3dd157SKalle Valo * enable HTML document generation using Doxygen. 605e3dd157SKalle Valo * 615e3dd157SKalle Valo */ 625e3dd157SKalle Valo 635e3dd157SKalle Valo /* Control Path */ 645e3dd157SKalle Valo struct wmi_cmd_hdr { 655e3dd157SKalle Valo __le32 cmd_id; 665e3dd157SKalle Valo } __packed; 675e3dd157SKalle Valo 685e3dd157SKalle Valo #define WMI_CMD_HDR_CMD_ID_MASK 0x00FFFFFF 695e3dd157SKalle Valo #define WMI_CMD_HDR_CMD_ID_LSB 0 705e3dd157SKalle Valo #define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000 715e3dd157SKalle Valo #define WMI_CMD_HDR_PLT_PRIV_LSB 24 725e3dd157SKalle Valo 735e3dd157SKalle Valo #define HTC_PROTOCOL_VERSION 0x0002 745e3dd157SKalle Valo #define WMI_PROTOCOL_VERSION 0x0002 755e3dd157SKalle Valo 76cff990ceSMichal Kazior enum wmi_service { 77cff990ceSMichal Kazior WMI_SERVICE_BEACON_OFFLOAD = 0, 78cff990ceSMichal Kazior WMI_SERVICE_SCAN_OFFLOAD, 79cff990ceSMichal Kazior WMI_SERVICE_ROAM_OFFLOAD, 80cff990ceSMichal Kazior WMI_SERVICE_BCN_MISS_OFFLOAD, 81cff990ceSMichal Kazior WMI_SERVICE_STA_PWRSAVE, 82cff990ceSMichal Kazior WMI_SERVICE_STA_ADVANCED_PWRSAVE, 83cff990ceSMichal Kazior WMI_SERVICE_AP_UAPSD, 84cff990ceSMichal Kazior WMI_SERVICE_AP_DFS, 85cff990ceSMichal Kazior WMI_SERVICE_11AC, 86cff990ceSMichal Kazior WMI_SERVICE_BLOCKACK, 87cff990ceSMichal Kazior WMI_SERVICE_PHYERR, 88cff990ceSMichal Kazior WMI_SERVICE_BCN_FILTER, 89cff990ceSMichal Kazior WMI_SERVICE_RTT, 90cff990ceSMichal Kazior WMI_SERVICE_RATECTRL, 91cff990ceSMichal Kazior WMI_SERVICE_WOW, 92cff990ceSMichal Kazior WMI_SERVICE_RATECTRL_CACHE, 93cff990ceSMichal Kazior WMI_SERVICE_IRAM_TIDS, 94cff990ceSMichal Kazior WMI_SERVICE_ARPNS_OFFLOAD, 95cff990ceSMichal Kazior WMI_SERVICE_NLO, 96cff990ceSMichal Kazior WMI_SERVICE_GTK_OFFLOAD, 97cff990ceSMichal Kazior WMI_SERVICE_SCAN_SCH, 98cff990ceSMichal Kazior WMI_SERVICE_CSA_OFFLOAD, 99cff990ceSMichal Kazior WMI_SERVICE_CHATTER, 100cff990ceSMichal Kazior WMI_SERVICE_COEX_FREQAVOID, 101cff990ceSMichal Kazior WMI_SERVICE_PACKET_POWER_SAVE, 102cff990ceSMichal Kazior WMI_SERVICE_FORCE_FW_HANG, 103cff990ceSMichal Kazior WMI_SERVICE_GPIO, 104cff990ceSMichal Kazior WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, 105cff990ceSMichal Kazior WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, 106cff990ceSMichal Kazior WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, 107cff990ceSMichal Kazior WMI_SERVICE_STA_KEEP_ALIVE, 108cff990ceSMichal Kazior WMI_SERVICE_TX_ENCAP, 109cff990ceSMichal Kazior WMI_SERVICE_BURST, 110cff990ceSMichal Kazior WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, 111cff990ceSMichal Kazior WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, 112c4f8c836SMichal Kazior 113c4f8c836SMichal Kazior /* keep last */ 114c4f8c836SMichal Kazior WMI_SERVICE_MAX, 115cff990ceSMichal Kazior }; 1165e3dd157SKalle Valo 117cff990ceSMichal Kazior enum wmi_10x_service { 118cff990ceSMichal Kazior WMI_10X_SERVICE_BEACON_OFFLOAD = 0, 119cff990ceSMichal Kazior WMI_10X_SERVICE_SCAN_OFFLOAD, 120cff990ceSMichal Kazior WMI_10X_SERVICE_ROAM_OFFLOAD, 121cff990ceSMichal Kazior WMI_10X_SERVICE_BCN_MISS_OFFLOAD, 122cff990ceSMichal Kazior WMI_10X_SERVICE_STA_PWRSAVE, 123cff990ceSMichal Kazior WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE, 124cff990ceSMichal Kazior WMI_10X_SERVICE_AP_UAPSD, 125cff990ceSMichal Kazior WMI_10X_SERVICE_AP_DFS, 126cff990ceSMichal Kazior WMI_10X_SERVICE_11AC, 127cff990ceSMichal Kazior WMI_10X_SERVICE_BLOCKACK, 128cff990ceSMichal Kazior WMI_10X_SERVICE_PHYERR, 129cff990ceSMichal Kazior WMI_10X_SERVICE_BCN_FILTER, 130cff990ceSMichal Kazior WMI_10X_SERVICE_RTT, 131cff990ceSMichal Kazior WMI_10X_SERVICE_RATECTRL, 132cff990ceSMichal Kazior WMI_10X_SERVICE_WOW, 133cff990ceSMichal Kazior WMI_10X_SERVICE_RATECTRL_CACHE, 134cff990ceSMichal Kazior WMI_10X_SERVICE_IRAM_TIDS, 135cff990ceSMichal Kazior WMI_10X_SERVICE_BURST, 136cff990ceSMichal Kazior 137cff990ceSMichal Kazior /* introduced in 10.2 */ 138cff990ceSMichal Kazior WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT, 139cff990ceSMichal Kazior WMI_10X_SERVICE_FORCE_FW_HANG, 140cff990ceSMichal Kazior WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT, 141cff990ceSMichal Kazior }; 142cff990ceSMichal Kazior 143cff990ceSMichal Kazior enum wmi_main_service { 144cff990ceSMichal Kazior WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0, 145cff990ceSMichal Kazior WMI_MAIN_SERVICE_SCAN_OFFLOAD, 146cff990ceSMichal Kazior WMI_MAIN_SERVICE_ROAM_OFFLOAD, 147cff990ceSMichal Kazior WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD, 148cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_PWRSAVE, 149cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE, 150cff990ceSMichal Kazior WMI_MAIN_SERVICE_AP_UAPSD, 151cff990ceSMichal Kazior WMI_MAIN_SERVICE_AP_DFS, 152cff990ceSMichal Kazior WMI_MAIN_SERVICE_11AC, 153cff990ceSMichal Kazior WMI_MAIN_SERVICE_BLOCKACK, 154cff990ceSMichal Kazior WMI_MAIN_SERVICE_PHYERR, 155cff990ceSMichal Kazior WMI_MAIN_SERVICE_BCN_FILTER, 156cff990ceSMichal Kazior WMI_MAIN_SERVICE_RTT, 157cff990ceSMichal Kazior WMI_MAIN_SERVICE_RATECTRL, 158cff990ceSMichal Kazior WMI_MAIN_SERVICE_WOW, 159cff990ceSMichal Kazior WMI_MAIN_SERVICE_RATECTRL_CACHE, 160cff990ceSMichal Kazior WMI_MAIN_SERVICE_IRAM_TIDS, 161cff990ceSMichal Kazior WMI_MAIN_SERVICE_ARPNS_OFFLOAD, 162cff990ceSMichal Kazior WMI_MAIN_SERVICE_NLO, 163cff990ceSMichal Kazior WMI_MAIN_SERVICE_GTK_OFFLOAD, 164cff990ceSMichal Kazior WMI_MAIN_SERVICE_SCAN_SCH, 165cff990ceSMichal Kazior WMI_MAIN_SERVICE_CSA_OFFLOAD, 166cff990ceSMichal Kazior WMI_MAIN_SERVICE_CHATTER, 167cff990ceSMichal Kazior WMI_MAIN_SERVICE_COEX_FREQAVOID, 168cff990ceSMichal Kazior WMI_MAIN_SERVICE_PACKET_POWER_SAVE, 169cff990ceSMichal Kazior WMI_MAIN_SERVICE_FORCE_FW_HANG, 170cff990ceSMichal Kazior WMI_MAIN_SERVICE_GPIO, 171cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM, 172cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, 173cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, 174cff990ceSMichal Kazior WMI_MAIN_SERVICE_STA_KEEP_ALIVE, 175cff990ceSMichal Kazior WMI_MAIN_SERVICE_TX_ENCAP, 1765e3dd157SKalle Valo }; 1775e3dd157SKalle Valo 1785e3dd157SKalle Valo static inline char *wmi_service_name(int service_id) 1795e3dd157SKalle Valo { 180cff990ceSMichal Kazior #define SVCSTR(x) case x: return #x 181cff990ceSMichal Kazior 1825e3dd157SKalle Valo switch (service_id) { 183cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BEACON_OFFLOAD); 184cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_SCAN_OFFLOAD); 185cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_ROAM_OFFLOAD); 186cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD); 187cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_PWRSAVE); 188cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE); 189cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_AP_UAPSD); 190cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_AP_DFS); 191cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_11AC); 192cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BLOCKACK); 193cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_PHYERR); 194cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BCN_FILTER); 195cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_RTT); 196cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_RATECTRL); 197cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_WOW); 198cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_RATECTRL_CACHE); 199cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_IRAM_TIDS); 200cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD); 201cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_NLO); 202cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_GTK_OFFLOAD); 203cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_SCAN_SCH); 204cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_CSA_OFFLOAD); 205cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_CHATTER); 206cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_COEX_FREQAVOID); 207cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE); 208cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_FORCE_FW_HANG); 209cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_GPIO); 210cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM); 211cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG); 212cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG); 213cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE); 214cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_TX_ENCAP); 215cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_BURST); 216cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT); 217cff990ceSMichal Kazior SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT); 2185e3dd157SKalle Valo default: 219cff990ceSMichal Kazior return NULL; 2205e3dd157SKalle Valo } 2215e3dd157SKalle Valo 222cff990ceSMichal Kazior #undef SVCSTR 223cff990ceSMichal Kazior } 224cff990ceSMichal Kazior 22537b9f933SMichal Kazior #define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \ 22637b9f933SMichal Kazior ((svc_id) < (len) && \ 22737b9f933SMichal Kazior __le32_to_cpu((wmi_svc_bmap)[(svc_id)/(sizeof(u32))]) & \ 228cff990ceSMichal Kazior BIT((svc_id)%(sizeof(u32)))) 229cff990ceSMichal Kazior 23037b9f933SMichal Kazior #define SVCMAP(x, y, len) \ 231cff990ceSMichal Kazior do { \ 23237b9f933SMichal Kazior if (WMI_SERVICE_IS_ENABLED((in), (x), (len))) \ 233cff990ceSMichal Kazior __set_bit(y, out); \ 234cff990ceSMichal Kazior } while (0) 235cff990ceSMichal Kazior 23637b9f933SMichal Kazior static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out, 23737b9f933SMichal Kazior size_t len) 238cff990ceSMichal Kazior { 239cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD, 24037b9f933SMichal Kazior WMI_SERVICE_BEACON_OFFLOAD, len); 241cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD, 24237b9f933SMichal Kazior WMI_SERVICE_SCAN_OFFLOAD, len); 243cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD, 24437b9f933SMichal Kazior WMI_SERVICE_ROAM_OFFLOAD, len); 245cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD, 24637b9f933SMichal Kazior WMI_SERVICE_BCN_MISS_OFFLOAD, len); 247cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE, 24837b9f933SMichal Kazior WMI_SERVICE_STA_PWRSAVE, len); 249cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE, 25037b9f933SMichal Kazior WMI_SERVICE_STA_ADVANCED_PWRSAVE, len); 251cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_AP_UAPSD, 25237b9f933SMichal Kazior WMI_SERVICE_AP_UAPSD, len); 253cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_AP_DFS, 25437b9f933SMichal Kazior WMI_SERVICE_AP_DFS, len); 255cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_11AC, 25637b9f933SMichal Kazior WMI_SERVICE_11AC, len); 257cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BLOCKACK, 25837b9f933SMichal Kazior WMI_SERVICE_BLOCKACK, len); 259cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_PHYERR, 26037b9f933SMichal Kazior WMI_SERVICE_PHYERR, len); 261cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BCN_FILTER, 26237b9f933SMichal Kazior WMI_SERVICE_BCN_FILTER, len); 263cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_RTT, 26437b9f933SMichal Kazior WMI_SERVICE_RTT, len); 265cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_RATECTRL, 26637b9f933SMichal Kazior WMI_SERVICE_RATECTRL, len); 267cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_WOW, 26837b9f933SMichal Kazior WMI_SERVICE_WOW, len); 269cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE, 27037b9f933SMichal Kazior WMI_SERVICE_RATECTRL_CACHE, len); 271cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_IRAM_TIDS, 27237b9f933SMichal Kazior WMI_SERVICE_IRAM_TIDS, len); 273cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_BURST, 27437b9f933SMichal Kazior WMI_SERVICE_BURST, len); 275cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT, 27637b9f933SMichal Kazior WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len); 277cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG, 27837b9f933SMichal Kazior WMI_SERVICE_FORCE_FW_HANG, len); 279cff990ceSMichal Kazior SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT, 28037b9f933SMichal Kazior WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len); 281cff990ceSMichal Kazior } 282cff990ceSMichal Kazior 28337b9f933SMichal Kazior static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out, 28437b9f933SMichal Kazior size_t len) 285cff990ceSMichal Kazior { 286cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD, 28737b9f933SMichal Kazior WMI_SERVICE_BEACON_OFFLOAD, len); 288cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD, 28937b9f933SMichal Kazior WMI_SERVICE_SCAN_OFFLOAD, len); 290cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD, 29137b9f933SMichal Kazior WMI_SERVICE_ROAM_OFFLOAD, len); 292cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD, 29337b9f933SMichal Kazior WMI_SERVICE_BCN_MISS_OFFLOAD, len); 294cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE, 29537b9f933SMichal Kazior WMI_SERVICE_STA_PWRSAVE, len); 296cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE, 29737b9f933SMichal Kazior WMI_SERVICE_STA_ADVANCED_PWRSAVE, len); 298cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD, 29937b9f933SMichal Kazior WMI_SERVICE_AP_UAPSD, len); 300cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_AP_DFS, 30137b9f933SMichal Kazior WMI_SERVICE_AP_DFS, len); 302cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_11AC, 30337b9f933SMichal Kazior WMI_SERVICE_11AC, len); 304cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_BLOCKACK, 30537b9f933SMichal Kazior WMI_SERVICE_BLOCKACK, len); 306cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_PHYERR, 30737b9f933SMichal Kazior WMI_SERVICE_PHYERR, len); 308cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER, 30937b9f933SMichal Kazior WMI_SERVICE_BCN_FILTER, len); 310cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_RTT, 31137b9f933SMichal Kazior WMI_SERVICE_RTT, len); 312cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_RATECTRL, 31337b9f933SMichal Kazior WMI_SERVICE_RATECTRL, len); 314cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_WOW, 31537b9f933SMichal Kazior WMI_SERVICE_WOW, len); 316cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE, 31737b9f933SMichal Kazior WMI_SERVICE_RATECTRL_CACHE, len); 318cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS, 31937b9f933SMichal Kazior WMI_SERVICE_IRAM_TIDS, len); 320cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD, 32137b9f933SMichal Kazior WMI_SERVICE_ARPNS_OFFLOAD, len); 322cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_NLO, 32337b9f933SMichal Kazior WMI_SERVICE_NLO, len); 324cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD, 32537b9f933SMichal Kazior WMI_SERVICE_GTK_OFFLOAD, len); 326cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH, 32737b9f933SMichal Kazior WMI_SERVICE_SCAN_SCH, len); 328cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD, 32937b9f933SMichal Kazior WMI_SERVICE_CSA_OFFLOAD, len); 330cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_CHATTER, 33137b9f933SMichal Kazior WMI_SERVICE_CHATTER, len); 332cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID, 33337b9f933SMichal Kazior WMI_SERVICE_COEX_FREQAVOID, len); 334cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE, 33537b9f933SMichal Kazior WMI_SERVICE_PACKET_POWER_SAVE, len); 336cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG, 33737b9f933SMichal Kazior WMI_SERVICE_FORCE_FW_HANG, len); 338cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_GPIO, 33937b9f933SMichal Kazior WMI_SERVICE_GPIO, len); 340cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM, 34137b9f933SMichal Kazior WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len); 342cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, 34337b9f933SMichal Kazior WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len); 344cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, 34537b9f933SMichal Kazior WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len); 346cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE, 34737b9f933SMichal Kazior WMI_SERVICE_STA_KEEP_ALIVE, len); 348cff990ceSMichal Kazior SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP, 34937b9f933SMichal Kazior WMI_SERVICE_TX_ENCAP, len); 350cff990ceSMichal Kazior } 351cff990ceSMichal Kazior 352cff990ceSMichal Kazior #undef SVCMAP 3535e3dd157SKalle Valo 3545e3dd157SKalle Valo /* 2 word representation of MAC addr */ 3555e3dd157SKalle Valo struct wmi_mac_addr { 3565e3dd157SKalle Valo union { 3575e3dd157SKalle Valo u8 addr[6]; 3585e3dd157SKalle Valo struct { 3595e3dd157SKalle Valo u32 word0; 3605e3dd157SKalle Valo u32 word1; 3615e3dd157SKalle Valo } __packed; 3625e3dd157SKalle Valo } __packed; 3635e3dd157SKalle Valo } __packed; 3645e3dd157SKalle Valo 365ce42870eSBartosz Markowski struct wmi_cmd_map { 366ce42870eSBartosz Markowski u32 init_cmdid; 367ce42870eSBartosz Markowski u32 start_scan_cmdid; 368ce42870eSBartosz Markowski u32 stop_scan_cmdid; 369ce42870eSBartosz Markowski u32 scan_chan_list_cmdid; 370ce42870eSBartosz Markowski u32 scan_sch_prio_tbl_cmdid; 371ce42870eSBartosz Markowski u32 pdev_set_regdomain_cmdid; 372ce42870eSBartosz Markowski u32 pdev_set_channel_cmdid; 373ce42870eSBartosz Markowski u32 pdev_set_param_cmdid; 374ce42870eSBartosz Markowski u32 pdev_pktlog_enable_cmdid; 375ce42870eSBartosz Markowski u32 pdev_pktlog_disable_cmdid; 376ce42870eSBartosz Markowski u32 pdev_set_wmm_params_cmdid; 377ce42870eSBartosz Markowski u32 pdev_set_ht_cap_ie_cmdid; 378ce42870eSBartosz Markowski u32 pdev_set_vht_cap_ie_cmdid; 379ce42870eSBartosz Markowski u32 pdev_set_dscp_tid_map_cmdid; 380ce42870eSBartosz Markowski u32 pdev_set_quiet_mode_cmdid; 381ce42870eSBartosz Markowski u32 pdev_green_ap_ps_enable_cmdid; 382ce42870eSBartosz Markowski u32 pdev_get_tpc_config_cmdid; 383ce42870eSBartosz Markowski u32 pdev_set_base_macaddr_cmdid; 384ce42870eSBartosz Markowski u32 vdev_create_cmdid; 385ce42870eSBartosz Markowski u32 vdev_delete_cmdid; 386ce42870eSBartosz Markowski u32 vdev_start_request_cmdid; 387ce42870eSBartosz Markowski u32 vdev_restart_request_cmdid; 388ce42870eSBartosz Markowski u32 vdev_up_cmdid; 389ce42870eSBartosz Markowski u32 vdev_stop_cmdid; 390ce42870eSBartosz Markowski u32 vdev_down_cmdid; 391ce42870eSBartosz Markowski u32 vdev_set_param_cmdid; 392ce42870eSBartosz Markowski u32 vdev_install_key_cmdid; 393ce42870eSBartosz Markowski u32 peer_create_cmdid; 394ce42870eSBartosz Markowski u32 peer_delete_cmdid; 395ce42870eSBartosz Markowski u32 peer_flush_tids_cmdid; 396ce42870eSBartosz Markowski u32 peer_set_param_cmdid; 397ce42870eSBartosz Markowski u32 peer_assoc_cmdid; 398ce42870eSBartosz Markowski u32 peer_add_wds_entry_cmdid; 399ce42870eSBartosz Markowski u32 peer_remove_wds_entry_cmdid; 400ce42870eSBartosz Markowski u32 peer_mcast_group_cmdid; 401ce42870eSBartosz Markowski u32 bcn_tx_cmdid; 402ce42870eSBartosz Markowski u32 pdev_send_bcn_cmdid; 403ce42870eSBartosz Markowski u32 bcn_tmpl_cmdid; 404ce42870eSBartosz Markowski u32 bcn_filter_rx_cmdid; 405ce42870eSBartosz Markowski u32 prb_req_filter_rx_cmdid; 406ce42870eSBartosz Markowski u32 mgmt_tx_cmdid; 407ce42870eSBartosz Markowski u32 prb_tmpl_cmdid; 408ce42870eSBartosz Markowski u32 addba_clear_resp_cmdid; 409ce42870eSBartosz Markowski u32 addba_send_cmdid; 410ce42870eSBartosz Markowski u32 addba_status_cmdid; 411ce42870eSBartosz Markowski u32 delba_send_cmdid; 412ce42870eSBartosz Markowski u32 addba_set_resp_cmdid; 413ce42870eSBartosz Markowski u32 send_singleamsdu_cmdid; 414ce42870eSBartosz Markowski u32 sta_powersave_mode_cmdid; 415ce42870eSBartosz Markowski u32 sta_powersave_param_cmdid; 416ce42870eSBartosz Markowski u32 sta_mimo_ps_mode_cmdid; 417ce42870eSBartosz Markowski u32 pdev_dfs_enable_cmdid; 418ce42870eSBartosz Markowski u32 pdev_dfs_disable_cmdid; 419ce42870eSBartosz Markowski u32 roam_scan_mode; 420ce42870eSBartosz Markowski u32 roam_scan_rssi_threshold; 421ce42870eSBartosz Markowski u32 roam_scan_period; 422ce42870eSBartosz Markowski u32 roam_scan_rssi_change_threshold; 423ce42870eSBartosz Markowski u32 roam_ap_profile; 424ce42870eSBartosz Markowski u32 ofl_scan_add_ap_profile; 425ce42870eSBartosz Markowski u32 ofl_scan_remove_ap_profile; 426ce42870eSBartosz Markowski u32 ofl_scan_period; 427ce42870eSBartosz Markowski u32 p2p_dev_set_device_info; 428ce42870eSBartosz Markowski u32 p2p_dev_set_discoverability; 429ce42870eSBartosz Markowski u32 p2p_go_set_beacon_ie; 430ce42870eSBartosz Markowski u32 p2p_go_set_probe_resp_ie; 431ce42870eSBartosz Markowski u32 p2p_set_vendor_ie_data_cmdid; 432ce42870eSBartosz Markowski u32 ap_ps_peer_param_cmdid; 433ce42870eSBartosz Markowski u32 ap_ps_peer_uapsd_coex_cmdid; 434ce42870eSBartosz Markowski u32 peer_rate_retry_sched_cmdid; 435ce42870eSBartosz Markowski u32 wlan_profile_trigger_cmdid; 436ce42870eSBartosz Markowski u32 wlan_profile_set_hist_intvl_cmdid; 437ce42870eSBartosz Markowski u32 wlan_profile_get_profile_data_cmdid; 438ce42870eSBartosz Markowski u32 wlan_profile_enable_profile_id_cmdid; 439ce42870eSBartosz Markowski u32 wlan_profile_list_profile_id_cmdid; 440ce42870eSBartosz Markowski u32 pdev_suspend_cmdid; 441ce42870eSBartosz Markowski u32 pdev_resume_cmdid; 442ce42870eSBartosz Markowski u32 add_bcn_filter_cmdid; 443ce42870eSBartosz Markowski u32 rmv_bcn_filter_cmdid; 444ce42870eSBartosz Markowski u32 wow_add_wake_pattern_cmdid; 445ce42870eSBartosz Markowski u32 wow_del_wake_pattern_cmdid; 446ce42870eSBartosz Markowski u32 wow_enable_disable_wake_event_cmdid; 447ce42870eSBartosz Markowski u32 wow_enable_cmdid; 448ce42870eSBartosz Markowski u32 wow_hostwakeup_from_sleep_cmdid; 449ce42870eSBartosz Markowski u32 rtt_measreq_cmdid; 450ce42870eSBartosz Markowski u32 rtt_tsf_cmdid; 451ce42870eSBartosz Markowski u32 vdev_spectral_scan_configure_cmdid; 452ce42870eSBartosz Markowski u32 vdev_spectral_scan_enable_cmdid; 453ce42870eSBartosz Markowski u32 request_stats_cmdid; 454ce42870eSBartosz Markowski u32 set_arp_ns_offload_cmdid; 455ce42870eSBartosz Markowski u32 network_list_offload_config_cmdid; 456ce42870eSBartosz Markowski u32 gtk_offload_cmdid; 457ce42870eSBartosz Markowski u32 csa_offload_enable_cmdid; 458ce42870eSBartosz Markowski u32 csa_offload_chanswitch_cmdid; 459ce42870eSBartosz Markowski u32 chatter_set_mode_cmdid; 460ce42870eSBartosz Markowski u32 peer_tid_addba_cmdid; 461ce42870eSBartosz Markowski u32 peer_tid_delba_cmdid; 462ce42870eSBartosz Markowski u32 sta_dtim_ps_method_cmdid; 463ce42870eSBartosz Markowski u32 sta_uapsd_auto_trig_cmdid; 464ce42870eSBartosz Markowski u32 sta_keepalive_cmd; 465ce42870eSBartosz Markowski u32 echo_cmdid; 466ce42870eSBartosz Markowski u32 pdev_utf_cmdid; 467ce42870eSBartosz Markowski u32 dbglog_cfg_cmdid; 468ce42870eSBartosz Markowski u32 pdev_qvit_cmdid; 469ce42870eSBartosz Markowski u32 pdev_ftm_intg_cmdid; 470ce42870eSBartosz Markowski u32 vdev_set_keepalive_cmdid; 471ce42870eSBartosz Markowski u32 vdev_get_keepalive_cmdid; 472ce42870eSBartosz Markowski u32 force_fw_hang_cmdid; 473ce42870eSBartosz Markowski u32 gpio_config_cmdid; 474ce42870eSBartosz Markowski u32 gpio_output_cmdid; 475ce42870eSBartosz Markowski }; 476ce42870eSBartosz Markowski 4775e3dd157SKalle Valo /* 4785e3dd157SKalle Valo * wmi command groups. 4795e3dd157SKalle Valo */ 4805e3dd157SKalle Valo enum wmi_cmd_group { 4815e3dd157SKalle Valo /* 0 to 2 are reserved */ 4825e3dd157SKalle Valo WMI_GRP_START = 0x3, 4835e3dd157SKalle Valo WMI_GRP_SCAN = WMI_GRP_START, 4845e3dd157SKalle Valo WMI_GRP_PDEV, 4855e3dd157SKalle Valo WMI_GRP_VDEV, 4865e3dd157SKalle Valo WMI_GRP_PEER, 4875e3dd157SKalle Valo WMI_GRP_MGMT, 4885e3dd157SKalle Valo WMI_GRP_BA_NEG, 4895e3dd157SKalle Valo WMI_GRP_STA_PS, 4905e3dd157SKalle Valo WMI_GRP_DFS, 4915e3dd157SKalle Valo WMI_GRP_ROAM, 4925e3dd157SKalle Valo WMI_GRP_OFL_SCAN, 4935e3dd157SKalle Valo WMI_GRP_P2P, 4945e3dd157SKalle Valo WMI_GRP_AP_PS, 4955e3dd157SKalle Valo WMI_GRP_RATE_CTRL, 4965e3dd157SKalle Valo WMI_GRP_PROFILE, 4975e3dd157SKalle Valo WMI_GRP_SUSPEND, 4985e3dd157SKalle Valo WMI_GRP_BCN_FILTER, 4995e3dd157SKalle Valo WMI_GRP_WOW, 5005e3dd157SKalle Valo WMI_GRP_RTT, 5015e3dd157SKalle Valo WMI_GRP_SPECTRAL, 5025e3dd157SKalle Valo WMI_GRP_STATS, 5035e3dd157SKalle Valo WMI_GRP_ARP_NS_OFL, 5045e3dd157SKalle Valo WMI_GRP_NLO_OFL, 5055e3dd157SKalle Valo WMI_GRP_GTK_OFL, 5065e3dd157SKalle Valo WMI_GRP_CSA_OFL, 5075e3dd157SKalle Valo WMI_GRP_CHATTER, 5085e3dd157SKalle Valo WMI_GRP_TID_ADDBA, 5095e3dd157SKalle Valo WMI_GRP_MISC, 5105e3dd157SKalle Valo WMI_GRP_GPIO, 5115e3dd157SKalle Valo }; 5125e3dd157SKalle Valo 5135e3dd157SKalle Valo #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 5145e3dd157SKalle Valo #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 5155e3dd157SKalle Valo 51634957b25SBartosz Markowski #define WMI_CMD_UNSUPPORTED 0 517b7e3adf9SBartosz Markowski 518b7e3adf9SBartosz Markowski /* Command IDs and command events for MAIN FW. */ 5195e3dd157SKalle Valo enum wmi_cmd_id { 5205e3dd157SKalle Valo WMI_INIT_CMDID = 0x1, 5215e3dd157SKalle Valo 5225e3dd157SKalle Valo /* Scan specific commands */ 5235e3dd157SKalle Valo WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN), 5245e3dd157SKalle Valo WMI_STOP_SCAN_CMDID, 5255e3dd157SKalle Valo WMI_SCAN_CHAN_LIST_CMDID, 5265e3dd157SKalle Valo WMI_SCAN_SCH_PRIO_TBL_CMDID, 5275e3dd157SKalle Valo 5285e3dd157SKalle Valo /* PDEV (physical device) specific commands */ 5295e3dd157SKalle Valo WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV), 5305e3dd157SKalle Valo WMI_PDEV_SET_CHANNEL_CMDID, 5315e3dd157SKalle Valo WMI_PDEV_SET_PARAM_CMDID, 5325e3dd157SKalle Valo WMI_PDEV_PKTLOG_ENABLE_CMDID, 5335e3dd157SKalle Valo WMI_PDEV_PKTLOG_DISABLE_CMDID, 5345e3dd157SKalle Valo WMI_PDEV_SET_WMM_PARAMS_CMDID, 5355e3dd157SKalle Valo WMI_PDEV_SET_HT_CAP_IE_CMDID, 5365e3dd157SKalle Valo WMI_PDEV_SET_VHT_CAP_IE_CMDID, 5375e3dd157SKalle Valo WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 5385e3dd157SKalle Valo WMI_PDEV_SET_QUIET_MODE_CMDID, 5395e3dd157SKalle Valo WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 5405e3dd157SKalle Valo WMI_PDEV_GET_TPC_CONFIG_CMDID, 5415e3dd157SKalle Valo WMI_PDEV_SET_BASE_MACADDR_CMDID, 5425e3dd157SKalle Valo 5435e3dd157SKalle Valo /* VDEV (virtual device) specific commands */ 5445e3dd157SKalle Valo WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV), 5455e3dd157SKalle Valo WMI_VDEV_DELETE_CMDID, 5465e3dd157SKalle Valo WMI_VDEV_START_REQUEST_CMDID, 5475e3dd157SKalle Valo WMI_VDEV_RESTART_REQUEST_CMDID, 5485e3dd157SKalle Valo WMI_VDEV_UP_CMDID, 5495e3dd157SKalle Valo WMI_VDEV_STOP_CMDID, 5505e3dd157SKalle Valo WMI_VDEV_DOWN_CMDID, 5515e3dd157SKalle Valo WMI_VDEV_SET_PARAM_CMDID, 5525e3dd157SKalle Valo WMI_VDEV_INSTALL_KEY_CMDID, 5535e3dd157SKalle Valo 5545e3dd157SKalle Valo /* peer specific commands */ 5555e3dd157SKalle Valo WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER), 5565e3dd157SKalle Valo WMI_PEER_DELETE_CMDID, 5575e3dd157SKalle Valo WMI_PEER_FLUSH_TIDS_CMDID, 5585e3dd157SKalle Valo WMI_PEER_SET_PARAM_CMDID, 5595e3dd157SKalle Valo WMI_PEER_ASSOC_CMDID, 5605e3dd157SKalle Valo WMI_PEER_ADD_WDS_ENTRY_CMDID, 5615e3dd157SKalle Valo WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 5625e3dd157SKalle Valo WMI_PEER_MCAST_GROUP_CMDID, 5635e3dd157SKalle Valo 5645e3dd157SKalle Valo /* beacon/management specific commands */ 5655e3dd157SKalle Valo WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT), 5665e3dd157SKalle Valo WMI_PDEV_SEND_BCN_CMDID, 5675e3dd157SKalle Valo WMI_BCN_TMPL_CMDID, 5685e3dd157SKalle Valo WMI_BCN_FILTER_RX_CMDID, 5695e3dd157SKalle Valo WMI_PRB_REQ_FILTER_RX_CMDID, 5705e3dd157SKalle Valo WMI_MGMT_TX_CMDID, 5715e3dd157SKalle Valo WMI_PRB_TMPL_CMDID, 5725e3dd157SKalle Valo 5735e3dd157SKalle Valo /* commands to directly control BA negotiation directly from host. */ 5745e3dd157SKalle Valo WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG), 5755e3dd157SKalle Valo WMI_ADDBA_SEND_CMDID, 5765e3dd157SKalle Valo WMI_ADDBA_STATUS_CMDID, 5775e3dd157SKalle Valo WMI_DELBA_SEND_CMDID, 5785e3dd157SKalle Valo WMI_ADDBA_SET_RESP_CMDID, 5795e3dd157SKalle Valo WMI_SEND_SINGLEAMSDU_CMDID, 5805e3dd157SKalle Valo 5815e3dd157SKalle Valo /* Station power save specific config */ 5825e3dd157SKalle Valo WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS), 5835e3dd157SKalle Valo WMI_STA_POWERSAVE_PARAM_CMDID, 5845e3dd157SKalle Valo WMI_STA_MIMO_PS_MODE_CMDID, 5855e3dd157SKalle Valo 5865e3dd157SKalle Valo /** DFS-specific commands */ 5875e3dd157SKalle Valo WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS), 5885e3dd157SKalle Valo WMI_PDEV_DFS_DISABLE_CMDID, 5895e3dd157SKalle Valo 5905e3dd157SKalle Valo /* Roaming specific commands */ 5915e3dd157SKalle Valo WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM), 5925e3dd157SKalle Valo WMI_ROAM_SCAN_RSSI_THRESHOLD, 5935e3dd157SKalle Valo WMI_ROAM_SCAN_PERIOD, 5945e3dd157SKalle Valo WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 5955e3dd157SKalle Valo WMI_ROAM_AP_PROFILE, 5965e3dd157SKalle Valo 5975e3dd157SKalle Valo /* offload scan specific commands */ 5985e3dd157SKalle Valo WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN), 5995e3dd157SKalle Valo WMI_OFL_SCAN_REMOVE_AP_PROFILE, 6005e3dd157SKalle Valo WMI_OFL_SCAN_PERIOD, 6015e3dd157SKalle Valo 6025e3dd157SKalle Valo /* P2P specific commands */ 6035e3dd157SKalle Valo WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P), 6045e3dd157SKalle Valo WMI_P2P_DEV_SET_DISCOVERABILITY, 6055e3dd157SKalle Valo WMI_P2P_GO_SET_BEACON_IE, 6065e3dd157SKalle Valo WMI_P2P_GO_SET_PROBE_RESP_IE, 6075e3dd157SKalle Valo WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 6085e3dd157SKalle Valo 6095e3dd157SKalle Valo /* AP power save specific config */ 6105e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS), 6115e3dd157SKalle Valo WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 6125e3dd157SKalle Valo 6135e3dd157SKalle Valo /* Rate-control specific commands */ 6145e3dd157SKalle Valo WMI_PEER_RATE_RETRY_SCHED_CMDID = 6155e3dd157SKalle Valo WMI_CMD_GRP(WMI_GRP_RATE_CTRL), 6165e3dd157SKalle Valo 6175e3dd157SKalle Valo /* WLAN Profiling commands. */ 6185e3dd157SKalle Valo WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE), 6195e3dd157SKalle Valo WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 6205e3dd157SKalle Valo WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 6215e3dd157SKalle Valo WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 6225e3dd157SKalle Valo WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 6235e3dd157SKalle Valo 6245e3dd157SKalle Valo /* Suspend resume command Ids */ 6255e3dd157SKalle Valo WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND), 6265e3dd157SKalle Valo WMI_PDEV_RESUME_CMDID, 6275e3dd157SKalle Valo 6285e3dd157SKalle Valo /* Beacon filter commands */ 6295e3dd157SKalle Valo WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER), 6305e3dd157SKalle Valo WMI_RMV_BCN_FILTER_CMDID, 6315e3dd157SKalle Valo 6325e3dd157SKalle Valo /* WOW Specific WMI commands*/ 6335e3dd157SKalle Valo WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW), 6345e3dd157SKalle Valo WMI_WOW_DEL_WAKE_PATTERN_CMDID, 6355e3dd157SKalle Valo WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 6365e3dd157SKalle Valo WMI_WOW_ENABLE_CMDID, 6375e3dd157SKalle Valo WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 6385e3dd157SKalle Valo 6395e3dd157SKalle Valo /* RTT measurement related cmd */ 6405e3dd157SKalle Valo WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT), 6415e3dd157SKalle Valo WMI_RTT_TSF_CMDID, 6425e3dd157SKalle Valo 6435e3dd157SKalle Valo /* spectral scan commands */ 6445e3dd157SKalle Valo WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL), 6455e3dd157SKalle Valo WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 6465e3dd157SKalle Valo 6475e3dd157SKalle Valo /* F/W stats */ 6485e3dd157SKalle Valo WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS), 6495e3dd157SKalle Valo 6505e3dd157SKalle Valo /* ARP OFFLOAD REQUEST*/ 6515e3dd157SKalle Valo WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL), 6525e3dd157SKalle Valo 6535e3dd157SKalle Valo /* NS offload confid*/ 6545e3dd157SKalle Valo WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL), 6555e3dd157SKalle Valo 6565e3dd157SKalle Valo /* GTK offload Specific WMI commands*/ 6575e3dd157SKalle Valo WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL), 6585e3dd157SKalle Valo 6595e3dd157SKalle Valo /* CSA offload Specific WMI commands*/ 6605e3dd157SKalle Valo WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL), 6615e3dd157SKalle Valo WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 6625e3dd157SKalle Valo 6635e3dd157SKalle Valo /* Chatter commands*/ 6645e3dd157SKalle Valo WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER), 6655e3dd157SKalle Valo 6665e3dd157SKalle Valo /* addba specific commands */ 6675e3dd157SKalle Valo WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA), 6685e3dd157SKalle Valo WMI_PEER_TID_DELBA_CMDID, 6695e3dd157SKalle Valo 6705e3dd157SKalle Valo /* set station mimo powersave method */ 6715e3dd157SKalle Valo WMI_STA_DTIM_PS_METHOD_CMDID, 6725e3dd157SKalle Valo /* Configure the Station UAPSD AC Auto Trigger Parameters */ 6735e3dd157SKalle Valo WMI_STA_UAPSD_AUTO_TRIG_CMDID, 6745e3dd157SKalle Valo 6755e3dd157SKalle Valo /* STA Keep alive parameter configuration, 6765e3dd157SKalle Valo Requires WMI_SERVICE_STA_KEEP_ALIVE */ 6775e3dd157SKalle Valo WMI_STA_KEEPALIVE_CMD, 6785e3dd157SKalle Valo 6795e3dd157SKalle Valo /* misc command group */ 6805e3dd157SKalle Valo WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC), 6815e3dd157SKalle Valo WMI_PDEV_UTF_CMDID, 6825e3dd157SKalle Valo WMI_DBGLOG_CFG_CMDID, 6835e3dd157SKalle Valo WMI_PDEV_QVIT_CMDID, 6845e3dd157SKalle Valo WMI_PDEV_FTM_INTG_CMDID, 6855e3dd157SKalle Valo WMI_VDEV_SET_KEEPALIVE_CMDID, 6865e3dd157SKalle Valo WMI_VDEV_GET_KEEPALIVE_CMDID, 6879cfbce75SMichal Kazior WMI_FORCE_FW_HANG_CMDID, 6885e3dd157SKalle Valo 6895e3dd157SKalle Valo /* GPIO Configuration */ 6905e3dd157SKalle Valo WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO), 6915e3dd157SKalle Valo WMI_GPIO_OUTPUT_CMDID, 6925e3dd157SKalle Valo }; 6935e3dd157SKalle Valo 6945e3dd157SKalle Valo enum wmi_event_id { 6955e3dd157SKalle Valo WMI_SERVICE_READY_EVENTID = 0x1, 6965e3dd157SKalle Valo WMI_READY_EVENTID, 6975e3dd157SKalle Valo 6985e3dd157SKalle Valo /* Scan specific events */ 6995e3dd157SKalle Valo WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 7005e3dd157SKalle Valo 7015e3dd157SKalle Valo /* PDEV specific events */ 7025e3dd157SKalle Valo WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV), 7035e3dd157SKalle Valo WMI_CHAN_INFO_EVENTID, 7045e3dd157SKalle Valo WMI_PHYERR_EVENTID, 7055e3dd157SKalle Valo 7065e3dd157SKalle Valo /* VDEV specific events */ 7075e3dd157SKalle Valo WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV), 7085e3dd157SKalle Valo WMI_VDEV_STOPPED_EVENTID, 7095e3dd157SKalle Valo WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 7105e3dd157SKalle Valo 7115e3dd157SKalle Valo /* peer specific events */ 7125e3dd157SKalle Valo WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER), 7135e3dd157SKalle Valo 7145e3dd157SKalle Valo /* beacon/mgmt specific events */ 7155e3dd157SKalle Valo WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT), 7165e3dd157SKalle Valo WMI_HOST_SWBA_EVENTID, 7175e3dd157SKalle Valo WMI_TBTTOFFSET_UPDATE_EVENTID, 7185e3dd157SKalle Valo 7195e3dd157SKalle Valo /* ADDBA Related WMI Events*/ 7205e3dd157SKalle Valo WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG), 7215e3dd157SKalle Valo WMI_TX_ADDBA_COMPLETE_EVENTID, 7225e3dd157SKalle Valo 7235e3dd157SKalle Valo /* Roam event to trigger roaming on host */ 7245e3dd157SKalle Valo WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM), 7255e3dd157SKalle Valo WMI_PROFILE_MATCH, 7265e3dd157SKalle Valo 7275e3dd157SKalle Valo /* WoW */ 7285e3dd157SKalle Valo WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW), 7295e3dd157SKalle Valo 7305e3dd157SKalle Valo /* RTT */ 7315e3dd157SKalle Valo WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT), 7325e3dd157SKalle Valo WMI_TSF_MEASUREMENT_REPORT_EVENTID, 7335e3dd157SKalle Valo WMI_RTT_ERROR_REPORT_EVENTID, 7345e3dd157SKalle Valo 7355e3dd157SKalle Valo /* GTK offload */ 7365e3dd157SKalle Valo WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL), 7375e3dd157SKalle Valo WMI_GTK_REKEY_FAIL_EVENTID, 7385e3dd157SKalle Valo 7395e3dd157SKalle Valo /* CSA IE received event */ 7405e3dd157SKalle Valo WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL), 7415e3dd157SKalle Valo 7425e3dd157SKalle Valo /* Misc events */ 7435e3dd157SKalle Valo WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC), 7445e3dd157SKalle Valo WMI_PDEV_UTF_EVENTID, 7455e3dd157SKalle Valo WMI_DEBUG_MESG_EVENTID, 7465e3dd157SKalle Valo WMI_UPDATE_STATS_EVENTID, 7475e3dd157SKalle Valo WMI_DEBUG_PRINT_EVENTID, 7485e3dd157SKalle Valo WMI_DCS_INTERFERENCE_EVENTID, 7495e3dd157SKalle Valo WMI_PDEV_QVIT_EVENTID, 7505e3dd157SKalle Valo WMI_WLAN_PROFILE_DATA_EVENTID, 7515e3dd157SKalle Valo WMI_PDEV_FTM_INTG_EVENTID, 7525e3dd157SKalle Valo WMI_WLAN_FREQ_AVOID_EVENTID, 7535e3dd157SKalle Valo WMI_VDEV_GET_KEEPALIVE_EVENTID, 7545e3dd157SKalle Valo 7555e3dd157SKalle Valo /* GPIO Event */ 7565e3dd157SKalle Valo WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO), 7575e3dd157SKalle Valo }; 7585e3dd157SKalle Valo 759b7e3adf9SBartosz Markowski /* Command IDs and command events for 10.X firmware */ 760b7e3adf9SBartosz Markowski enum wmi_10x_cmd_id { 761b7e3adf9SBartosz Markowski WMI_10X_START_CMDID = 0x9000, 762b7e3adf9SBartosz Markowski WMI_10X_END_CMDID = 0x9FFF, 763b7e3adf9SBartosz Markowski 764b7e3adf9SBartosz Markowski /* initialize the wlan sub system */ 765b7e3adf9SBartosz Markowski WMI_10X_INIT_CMDID, 766b7e3adf9SBartosz Markowski 767b7e3adf9SBartosz Markowski /* Scan specific commands */ 768b7e3adf9SBartosz Markowski 769b7e3adf9SBartosz Markowski WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID, 770b7e3adf9SBartosz Markowski WMI_10X_STOP_SCAN_CMDID, 771b7e3adf9SBartosz Markowski WMI_10X_SCAN_CHAN_LIST_CMDID, 772b7e3adf9SBartosz Markowski WMI_10X_ECHO_CMDID, 773b7e3adf9SBartosz Markowski 774b7e3adf9SBartosz Markowski /* PDEV(physical device) specific commands */ 775b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_REGDOMAIN_CMDID, 776b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_CHANNEL_CMDID, 777b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_PARAM_CMDID, 778b7e3adf9SBartosz Markowski WMI_10X_PDEV_PKTLOG_ENABLE_CMDID, 779b7e3adf9SBartosz Markowski WMI_10X_PDEV_PKTLOG_DISABLE_CMDID, 780b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_WMM_PARAMS_CMDID, 781b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_HT_CAP_IE_CMDID, 782b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID, 783b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_BASE_MACADDR_CMDID, 784b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID, 785b7e3adf9SBartosz Markowski WMI_10X_PDEV_SET_QUIET_MODE_CMDID, 786b7e3adf9SBartosz Markowski WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID, 787b7e3adf9SBartosz Markowski WMI_10X_PDEV_GET_TPC_CONFIG_CMDID, 788b7e3adf9SBartosz Markowski 789b7e3adf9SBartosz Markowski /* VDEV(virtual device) specific commands */ 790b7e3adf9SBartosz Markowski WMI_10X_VDEV_CREATE_CMDID, 791b7e3adf9SBartosz Markowski WMI_10X_VDEV_DELETE_CMDID, 792b7e3adf9SBartosz Markowski WMI_10X_VDEV_START_REQUEST_CMDID, 793b7e3adf9SBartosz Markowski WMI_10X_VDEV_RESTART_REQUEST_CMDID, 794b7e3adf9SBartosz Markowski WMI_10X_VDEV_UP_CMDID, 795b7e3adf9SBartosz Markowski WMI_10X_VDEV_STOP_CMDID, 796b7e3adf9SBartosz Markowski WMI_10X_VDEV_DOWN_CMDID, 797b7e3adf9SBartosz Markowski WMI_10X_VDEV_STANDBY_RESPONSE_CMDID, 798b7e3adf9SBartosz Markowski WMI_10X_VDEV_RESUME_RESPONSE_CMDID, 799b7e3adf9SBartosz Markowski WMI_10X_VDEV_SET_PARAM_CMDID, 800b7e3adf9SBartosz Markowski WMI_10X_VDEV_INSTALL_KEY_CMDID, 801b7e3adf9SBartosz Markowski 802b7e3adf9SBartosz Markowski /* peer specific commands */ 803b7e3adf9SBartosz Markowski WMI_10X_PEER_CREATE_CMDID, 804b7e3adf9SBartosz Markowski WMI_10X_PEER_DELETE_CMDID, 805b7e3adf9SBartosz Markowski WMI_10X_PEER_FLUSH_TIDS_CMDID, 806b7e3adf9SBartosz Markowski WMI_10X_PEER_SET_PARAM_CMDID, 807b7e3adf9SBartosz Markowski WMI_10X_PEER_ASSOC_CMDID, 808b7e3adf9SBartosz Markowski WMI_10X_PEER_ADD_WDS_ENTRY_CMDID, 809b7e3adf9SBartosz Markowski WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID, 810b7e3adf9SBartosz Markowski WMI_10X_PEER_MCAST_GROUP_CMDID, 811b7e3adf9SBartosz Markowski 812b7e3adf9SBartosz Markowski /* beacon/management specific commands */ 813b7e3adf9SBartosz Markowski 814b7e3adf9SBartosz Markowski WMI_10X_BCN_TX_CMDID, 815b7e3adf9SBartosz Markowski WMI_10X_BCN_PRB_TMPL_CMDID, 816b7e3adf9SBartosz Markowski WMI_10X_BCN_FILTER_RX_CMDID, 817b7e3adf9SBartosz Markowski WMI_10X_PRB_REQ_FILTER_RX_CMDID, 818b7e3adf9SBartosz Markowski WMI_10X_MGMT_TX_CMDID, 819b7e3adf9SBartosz Markowski 820b7e3adf9SBartosz Markowski /* commands to directly control ba negotiation directly from host. */ 821b7e3adf9SBartosz Markowski WMI_10X_ADDBA_CLEAR_RESP_CMDID, 822b7e3adf9SBartosz Markowski WMI_10X_ADDBA_SEND_CMDID, 823b7e3adf9SBartosz Markowski WMI_10X_ADDBA_STATUS_CMDID, 824b7e3adf9SBartosz Markowski WMI_10X_DELBA_SEND_CMDID, 825b7e3adf9SBartosz Markowski WMI_10X_ADDBA_SET_RESP_CMDID, 826b7e3adf9SBartosz Markowski WMI_10X_SEND_SINGLEAMSDU_CMDID, 827b7e3adf9SBartosz Markowski 828b7e3adf9SBartosz Markowski /* Station power save specific config */ 829b7e3adf9SBartosz Markowski WMI_10X_STA_POWERSAVE_MODE_CMDID, 830b7e3adf9SBartosz Markowski WMI_10X_STA_POWERSAVE_PARAM_CMDID, 831b7e3adf9SBartosz Markowski WMI_10X_STA_MIMO_PS_MODE_CMDID, 832b7e3adf9SBartosz Markowski 833b7e3adf9SBartosz Markowski /* set debug log config */ 834b7e3adf9SBartosz Markowski WMI_10X_DBGLOG_CFG_CMDID, 835b7e3adf9SBartosz Markowski 836b7e3adf9SBartosz Markowski /* DFS-specific commands */ 837b7e3adf9SBartosz Markowski WMI_10X_PDEV_DFS_ENABLE_CMDID, 838b7e3adf9SBartosz Markowski WMI_10X_PDEV_DFS_DISABLE_CMDID, 839b7e3adf9SBartosz Markowski 840b7e3adf9SBartosz Markowski /* QVIT specific command id */ 841b7e3adf9SBartosz Markowski WMI_10X_PDEV_QVIT_CMDID, 842b7e3adf9SBartosz Markowski 843b7e3adf9SBartosz Markowski /* Offload Scan and Roaming related commands */ 844b7e3adf9SBartosz Markowski WMI_10X_ROAM_SCAN_MODE, 845b7e3adf9SBartosz Markowski WMI_10X_ROAM_SCAN_RSSI_THRESHOLD, 846b7e3adf9SBartosz Markowski WMI_10X_ROAM_SCAN_PERIOD, 847b7e3adf9SBartosz Markowski WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 848b7e3adf9SBartosz Markowski WMI_10X_ROAM_AP_PROFILE, 849b7e3adf9SBartosz Markowski WMI_10X_OFL_SCAN_ADD_AP_PROFILE, 850b7e3adf9SBartosz Markowski WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE, 851b7e3adf9SBartosz Markowski WMI_10X_OFL_SCAN_PERIOD, 852b7e3adf9SBartosz Markowski 853b7e3adf9SBartosz Markowski /* P2P specific commands */ 854b7e3adf9SBartosz Markowski WMI_10X_P2P_DEV_SET_DEVICE_INFO, 855b7e3adf9SBartosz Markowski WMI_10X_P2P_DEV_SET_DISCOVERABILITY, 856b7e3adf9SBartosz Markowski WMI_10X_P2P_GO_SET_BEACON_IE, 857b7e3adf9SBartosz Markowski WMI_10X_P2P_GO_SET_PROBE_RESP_IE, 858b7e3adf9SBartosz Markowski 859b7e3adf9SBartosz Markowski /* AP power save specific config */ 860b7e3adf9SBartosz Markowski WMI_10X_AP_PS_PEER_PARAM_CMDID, 861b7e3adf9SBartosz Markowski WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID, 862b7e3adf9SBartosz Markowski 863b7e3adf9SBartosz Markowski /* Rate-control specific commands */ 864b7e3adf9SBartosz Markowski WMI_10X_PEER_RATE_RETRY_SCHED_CMDID, 865b7e3adf9SBartosz Markowski 866b7e3adf9SBartosz Markowski /* WLAN Profiling commands. */ 867b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_TRIGGER_CMDID, 868b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 869b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 870b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 871b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 872b7e3adf9SBartosz Markowski 873b7e3adf9SBartosz Markowski /* Suspend resume command Ids */ 874b7e3adf9SBartosz Markowski WMI_10X_PDEV_SUSPEND_CMDID, 875b7e3adf9SBartosz Markowski WMI_10X_PDEV_RESUME_CMDID, 876b7e3adf9SBartosz Markowski 877b7e3adf9SBartosz Markowski /* Beacon filter commands */ 878b7e3adf9SBartosz Markowski WMI_10X_ADD_BCN_FILTER_CMDID, 879b7e3adf9SBartosz Markowski WMI_10X_RMV_BCN_FILTER_CMDID, 880b7e3adf9SBartosz Markowski 881b7e3adf9SBartosz Markowski /* WOW Specific WMI commands*/ 882b7e3adf9SBartosz Markowski WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID, 883b7e3adf9SBartosz Markowski WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID, 884b7e3adf9SBartosz Markowski WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 885b7e3adf9SBartosz Markowski WMI_10X_WOW_ENABLE_CMDID, 886b7e3adf9SBartosz Markowski WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 887b7e3adf9SBartosz Markowski 888b7e3adf9SBartosz Markowski /* RTT measurement related cmd */ 889b7e3adf9SBartosz Markowski WMI_10X_RTT_MEASREQ_CMDID, 890b7e3adf9SBartosz Markowski WMI_10X_RTT_TSF_CMDID, 891b7e3adf9SBartosz Markowski 892b7e3adf9SBartosz Markowski /* transmit beacon by value */ 893b7e3adf9SBartosz Markowski WMI_10X_PDEV_SEND_BCN_CMDID, 894b7e3adf9SBartosz Markowski 895b7e3adf9SBartosz Markowski /* F/W stats */ 896b7e3adf9SBartosz Markowski WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 897b7e3adf9SBartosz Markowski WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 898b7e3adf9SBartosz Markowski WMI_10X_REQUEST_STATS_CMDID, 899b7e3adf9SBartosz Markowski 900b7e3adf9SBartosz Markowski /* GPIO Configuration */ 901b7e3adf9SBartosz Markowski WMI_10X_GPIO_CONFIG_CMDID, 902b7e3adf9SBartosz Markowski WMI_10X_GPIO_OUTPUT_CMDID, 903b7e3adf9SBartosz Markowski 904b7e3adf9SBartosz Markowski WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1, 905b7e3adf9SBartosz Markowski }; 906b7e3adf9SBartosz Markowski 907b7e3adf9SBartosz Markowski enum wmi_10x_event_id { 908b7e3adf9SBartosz Markowski WMI_10X_SERVICE_READY_EVENTID = 0x8000, 909b7e3adf9SBartosz Markowski WMI_10X_READY_EVENTID, 910b7e3adf9SBartosz Markowski WMI_10X_START_EVENTID = 0x9000, 911b7e3adf9SBartosz Markowski WMI_10X_END_EVENTID = 0x9FFF, 912b7e3adf9SBartosz Markowski 913b7e3adf9SBartosz Markowski /* Scan specific events */ 914b7e3adf9SBartosz Markowski WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID, 915b7e3adf9SBartosz Markowski WMI_10X_ECHO_EVENTID, 916b7e3adf9SBartosz Markowski WMI_10X_DEBUG_MESG_EVENTID, 917b7e3adf9SBartosz Markowski WMI_10X_UPDATE_STATS_EVENTID, 918b7e3adf9SBartosz Markowski 919b7e3adf9SBartosz Markowski /* Instantaneous RSSI event */ 920b7e3adf9SBartosz Markowski WMI_10X_INST_RSSI_STATS_EVENTID, 921b7e3adf9SBartosz Markowski 922b7e3adf9SBartosz Markowski /* VDEV specific events */ 923b7e3adf9SBartosz Markowski WMI_10X_VDEV_START_RESP_EVENTID, 924b7e3adf9SBartosz Markowski WMI_10X_VDEV_STANDBY_REQ_EVENTID, 925b7e3adf9SBartosz Markowski WMI_10X_VDEV_RESUME_REQ_EVENTID, 926b7e3adf9SBartosz Markowski WMI_10X_VDEV_STOPPED_EVENTID, 927b7e3adf9SBartosz Markowski 928b7e3adf9SBartosz Markowski /* peer specific events */ 929b7e3adf9SBartosz Markowski WMI_10X_PEER_STA_KICKOUT_EVENTID, 930b7e3adf9SBartosz Markowski 931b7e3adf9SBartosz Markowski /* beacon/mgmt specific events */ 932b7e3adf9SBartosz Markowski WMI_10X_HOST_SWBA_EVENTID, 933b7e3adf9SBartosz Markowski WMI_10X_TBTTOFFSET_UPDATE_EVENTID, 934b7e3adf9SBartosz Markowski WMI_10X_MGMT_RX_EVENTID, 935b7e3adf9SBartosz Markowski 936b7e3adf9SBartosz Markowski /* Channel stats event */ 937b7e3adf9SBartosz Markowski WMI_10X_CHAN_INFO_EVENTID, 938b7e3adf9SBartosz Markowski 939b7e3adf9SBartosz Markowski /* PHY Error specific WMI event */ 940b7e3adf9SBartosz Markowski WMI_10X_PHYERR_EVENTID, 941b7e3adf9SBartosz Markowski 942b7e3adf9SBartosz Markowski /* Roam event to trigger roaming on host */ 943b7e3adf9SBartosz Markowski WMI_10X_ROAM_EVENTID, 944b7e3adf9SBartosz Markowski 945b7e3adf9SBartosz Markowski /* matching AP found from list of profiles */ 946b7e3adf9SBartosz Markowski WMI_10X_PROFILE_MATCH, 947b7e3adf9SBartosz Markowski 948b7e3adf9SBartosz Markowski /* debug print message used for tracing FW code while debugging */ 949b7e3adf9SBartosz Markowski WMI_10X_DEBUG_PRINT_EVENTID, 950b7e3adf9SBartosz Markowski /* VI spoecific event */ 951b7e3adf9SBartosz Markowski WMI_10X_PDEV_QVIT_EVENTID, 952b7e3adf9SBartosz Markowski /* FW code profile data in response to profile request */ 953b7e3adf9SBartosz Markowski WMI_10X_WLAN_PROFILE_DATA_EVENTID, 954b7e3adf9SBartosz Markowski 955b7e3adf9SBartosz Markowski /*RTT related event ID*/ 956b7e3adf9SBartosz Markowski WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID, 957b7e3adf9SBartosz Markowski WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID, 958b7e3adf9SBartosz Markowski WMI_10X_RTT_ERROR_REPORT_EVENTID, 959b7e3adf9SBartosz Markowski 960b7e3adf9SBartosz Markowski WMI_10X_WOW_WAKEUP_HOST_EVENTID, 961b7e3adf9SBartosz Markowski WMI_10X_DCS_INTERFERENCE_EVENTID, 962b7e3adf9SBartosz Markowski 963b7e3adf9SBartosz Markowski /* TPC config for the current operating channel */ 964b7e3adf9SBartosz Markowski WMI_10X_PDEV_TPC_CONFIG_EVENTID, 965b7e3adf9SBartosz Markowski 966b7e3adf9SBartosz Markowski WMI_10X_GPIO_INPUT_EVENTID, 967b7e3adf9SBartosz Markowski WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID-1, 968b7e3adf9SBartosz Markowski }; 969b7e3adf9SBartosz Markowski 97024c88f78SMichal Kazior enum wmi_10_2_cmd_id { 97124c88f78SMichal Kazior WMI_10_2_START_CMDID = 0x9000, 97224c88f78SMichal Kazior WMI_10_2_END_CMDID = 0x9FFF, 97324c88f78SMichal Kazior WMI_10_2_INIT_CMDID, 97424c88f78SMichal Kazior WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID, 97524c88f78SMichal Kazior WMI_10_2_STOP_SCAN_CMDID, 97624c88f78SMichal Kazior WMI_10_2_SCAN_CHAN_LIST_CMDID, 97724c88f78SMichal Kazior WMI_10_2_ECHO_CMDID, 97824c88f78SMichal Kazior WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, 97924c88f78SMichal Kazior WMI_10_2_PDEV_SET_CHANNEL_CMDID, 98024c88f78SMichal Kazior WMI_10_2_PDEV_SET_PARAM_CMDID, 98124c88f78SMichal Kazior WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, 98224c88f78SMichal Kazior WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, 98324c88f78SMichal Kazior WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, 98424c88f78SMichal Kazior WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, 98524c88f78SMichal Kazior WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, 98624c88f78SMichal Kazior WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, 98724c88f78SMichal Kazior WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, 98824c88f78SMichal Kazior WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, 98924c88f78SMichal Kazior WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, 99024c88f78SMichal Kazior WMI_10_2_VDEV_CREATE_CMDID, 99124c88f78SMichal Kazior WMI_10_2_VDEV_DELETE_CMDID, 99224c88f78SMichal Kazior WMI_10_2_VDEV_START_REQUEST_CMDID, 99324c88f78SMichal Kazior WMI_10_2_VDEV_RESTART_REQUEST_CMDID, 99424c88f78SMichal Kazior WMI_10_2_VDEV_UP_CMDID, 99524c88f78SMichal Kazior WMI_10_2_VDEV_STOP_CMDID, 99624c88f78SMichal Kazior WMI_10_2_VDEV_DOWN_CMDID, 99724c88f78SMichal Kazior WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID, 99824c88f78SMichal Kazior WMI_10_2_VDEV_RESUME_RESPONSE_CMDID, 99924c88f78SMichal Kazior WMI_10_2_VDEV_SET_PARAM_CMDID, 100024c88f78SMichal Kazior WMI_10_2_VDEV_INSTALL_KEY_CMDID, 100124c88f78SMichal Kazior WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID, 100224c88f78SMichal Kazior WMI_10_2_PEER_CREATE_CMDID, 100324c88f78SMichal Kazior WMI_10_2_PEER_DELETE_CMDID, 100424c88f78SMichal Kazior WMI_10_2_PEER_FLUSH_TIDS_CMDID, 100524c88f78SMichal Kazior WMI_10_2_PEER_SET_PARAM_CMDID, 100624c88f78SMichal Kazior WMI_10_2_PEER_ASSOC_CMDID, 100724c88f78SMichal Kazior WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, 100824c88f78SMichal Kazior WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID, 100924c88f78SMichal Kazior WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, 101024c88f78SMichal Kazior WMI_10_2_PEER_MCAST_GROUP_CMDID, 101124c88f78SMichal Kazior WMI_10_2_BCN_TX_CMDID, 101224c88f78SMichal Kazior WMI_10_2_BCN_PRB_TMPL_CMDID, 101324c88f78SMichal Kazior WMI_10_2_BCN_FILTER_RX_CMDID, 101424c88f78SMichal Kazior WMI_10_2_PRB_REQ_FILTER_RX_CMDID, 101524c88f78SMichal Kazior WMI_10_2_MGMT_TX_CMDID, 101624c88f78SMichal Kazior WMI_10_2_ADDBA_CLEAR_RESP_CMDID, 101724c88f78SMichal Kazior WMI_10_2_ADDBA_SEND_CMDID, 101824c88f78SMichal Kazior WMI_10_2_ADDBA_STATUS_CMDID, 101924c88f78SMichal Kazior WMI_10_2_DELBA_SEND_CMDID, 102024c88f78SMichal Kazior WMI_10_2_ADDBA_SET_RESP_CMDID, 102124c88f78SMichal Kazior WMI_10_2_SEND_SINGLEAMSDU_CMDID, 102224c88f78SMichal Kazior WMI_10_2_STA_POWERSAVE_MODE_CMDID, 102324c88f78SMichal Kazior WMI_10_2_STA_POWERSAVE_PARAM_CMDID, 102424c88f78SMichal Kazior WMI_10_2_STA_MIMO_PS_MODE_CMDID, 102524c88f78SMichal Kazior WMI_10_2_DBGLOG_CFG_CMDID, 102624c88f78SMichal Kazior WMI_10_2_PDEV_DFS_ENABLE_CMDID, 102724c88f78SMichal Kazior WMI_10_2_PDEV_DFS_DISABLE_CMDID, 102824c88f78SMichal Kazior WMI_10_2_PDEV_QVIT_CMDID, 102924c88f78SMichal Kazior WMI_10_2_ROAM_SCAN_MODE, 103024c88f78SMichal Kazior WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, 103124c88f78SMichal Kazior WMI_10_2_ROAM_SCAN_PERIOD, 103224c88f78SMichal Kazior WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 103324c88f78SMichal Kazior WMI_10_2_ROAM_AP_PROFILE, 103424c88f78SMichal Kazior WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, 103524c88f78SMichal Kazior WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, 103624c88f78SMichal Kazior WMI_10_2_OFL_SCAN_PERIOD, 103724c88f78SMichal Kazior WMI_10_2_P2P_DEV_SET_DEVICE_INFO, 103824c88f78SMichal Kazior WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, 103924c88f78SMichal Kazior WMI_10_2_P2P_GO_SET_BEACON_IE, 104024c88f78SMichal Kazior WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, 104124c88f78SMichal Kazior WMI_10_2_AP_PS_PEER_PARAM_CMDID, 104224c88f78SMichal Kazior WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID, 104324c88f78SMichal Kazior WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, 104424c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, 104524c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 104624c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 104724c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 104824c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 104924c88f78SMichal Kazior WMI_10_2_PDEV_SUSPEND_CMDID, 105024c88f78SMichal Kazior WMI_10_2_PDEV_RESUME_CMDID, 105124c88f78SMichal Kazior WMI_10_2_ADD_BCN_FILTER_CMDID, 105224c88f78SMichal Kazior WMI_10_2_RMV_BCN_FILTER_CMDID, 105324c88f78SMichal Kazior WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, 105424c88f78SMichal Kazior WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, 105524c88f78SMichal Kazior WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 105624c88f78SMichal Kazior WMI_10_2_WOW_ENABLE_CMDID, 105724c88f78SMichal Kazior WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 105824c88f78SMichal Kazior WMI_10_2_RTT_MEASREQ_CMDID, 105924c88f78SMichal Kazior WMI_10_2_RTT_TSF_CMDID, 106024c88f78SMichal Kazior WMI_10_2_RTT_KEEPALIVE_CMDID, 106124c88f78SMichal Kazior WMI_10_2_PDEV_SEND_BCN_CMDID, 106224c88f78SMichal Kazior WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 106324c88f78SMichal Kazior WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 106424c88f78SMichal Kazior WMI_10_2_REQUEST_STATS_CMDID, 106524c88f78SMichal Kazior WMI_10_2_GPIO_CONFIG_CMDID, 106624c88f78SMichal Kazior WMI_10_2_GPIO_OUTPUT_CMDID, 106724c88f78SMichal Kazior WMI_10_2_VDEV_RATEMASK_CMDID, 106824c88f78SMichal Kazior WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID, 106924c88f78SMichal Kazior WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 107024c88f78SMichal Kazior WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 107124c88f78SMichal Kazior WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 107224c88f78SMichal Kazior WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 107324c88f78SMichal Kazior WMI_10_2_FORCE_FW_HANG_CMDID, 107424c88f78SMichal Kazior WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 107524c88f78SMichal Kazior WMI_10_2_PDEV_SET_CTL_TABLE_CMDID, 107624c88f78SMichal Kazior WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID, 107724c88f78SMichal Kazior WMI_10_2_PDEV_RATEPWR_TABLE_CMDID, 107824c88f78SMichal Kazior WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID, 107924c88f78SMichal Kazior WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1, 108024c88f78SMichal Kazior }; 108124c88f78SMichal Kazior 108224c88f78SMichal Kazior enum wmi_10_2_event_id { 108324c88f78SMichal Kazior WMI_10_2_SERVICE_READY_EVENTID = 0x8000, 108424c88f78SMichal Kazior WMI_10_2_READY_EVENTID, 108524c88f78SMichal Kazior WMI_10_2_DEBUG_MESG_EVENTID, 108624c88f78SMichal Kazior WMI_10_2_START_EVENTID = 0x9000, 108724c88f78SMichal Kazior WMI_10_2_END_EVENTID = 0x9FFF, 108824c88f78SMichal Kazior WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID, 108924c88f78SMichal Kazior WMI_10_2_ECHO_EVENTID, 109024c88f78SMichal Kazior WMI_10_2_UPDATE_STATS_EVENTID, 109124c88f78SMichal Kazior WMI_10_2_INST_RSSI_STATS_EVENTID, 109224c88f78SMichal Kazior WMI_10_2_VDEV_START_RESP_EVENTID, 109324c88f78SMichal Kazior WMI_10_2_VDEV_STANDBY_REQ_EVENTID, 109424c88f78SMichal Kazior WMI_10_2_VDEV_RESUME_REQ_EVENTID, 109524c88f78SMichal Kazior WMI_10_2_VDEV_STOPPED_EVENTID, 109624c88f78SMichal Kazior WMI_10_2_PEER_STA_KICKOUT_EVENTID, 109724c88f78SMichal Kazior WMI_10_2_HOST_SWBA_EVENTID, 109824c88f78SMichal Kazior WMI_10_2_TBTTOFFSET_UPDATE_EVENTID, 109924c88f78SMichal Kazior WMI_10_2_MGMT_RX_EVENTID, 110024c88f78SMichal Kazior WMI_10_2_CHAN_INFO_EVENTID, 110124c88f78SMichal Kazior WMI_10_2_PHYERR_EVENTID, 110224c88f78SMichal Kazior WMI_10_2_ROAM_EVENTID, 110324c88f78SMichal Kazior WMI_10_2_PROFILE_MATCH, 110424c88f78SMichal Kazior WMI_10_2_DEBUG_PRINT_EVENTID, 110524c88f78SMichal Kazior WMI_10_2_PDEV_QVIT_EVENTID, 110624c88f78SMichal Kazior WMI_10_2_WLAN_PROFILE_DATA_EVENTID, 110724c88f78SMichal Kazior WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID, 110824c88f78SMichal Kazior WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID, 110924c88f78SMichal Kazior WMI_10_2_RTT_ERROR_REPORT_EVENTID, 111024c88f78SMichal Kazior WMI_10_2_RTT_KEEPALIVE_EVENTID, 111124c88f78SMichal Kazior WMI_10_2_WOW_WAKEUP_HOST_EVENTID, 111224c88f78SMichal Kazior WMI_10_2_DCS_INTERFERENCE_EVENTID, 111324c88f78SMichal Kazior WMI_10_2_PDEV_TPC_CONFIG_EVENTID, 111424c88f78SMichal Kazior WMI_10_2_GPIO_INPUT_EVENTID, 111524c88f78SMichal Kazior WMI_10_2_PEER_RATECODE_LIST_EVENTID, 111624c88f78SMichal Kazior WMI_10_2_GENERIC_BUFFER_EVENTID, 111724c88f78SMichal Kazior WMI_10_2_MCAST_BUF_RELEASE_EVENTID, 111824c88f78SMichal Kazior WMI_10_2_MCAST_LIST_AGEOUT_EVENTID, 111924c88f78SMichal Kazior WMI_10_2_WDS_PEER_EVENTID, 112024c88f78SMichal Kazior WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1, 112124c88f78SMichal Kazior }; 112224c88f78SMichal Kazior 11235e3dd157SKalle Valo enum wmi_phy_mode { 11245e3dd157SKalle Valo MODE_11A = 0, /* 11a Mode */ 11255e3dd157SKalle Valo MODE_11G = 1, /* 11b/g Mode */ 11265e3dd157SKalle Valo MODE_11B = 2, /* 11b Mode */ 11275e3dd157SKalle Valo MODE_11GONLY = 3, /* 11g only Mode */ 11285e3dd157SKalle Valo MODE_11NA_HT20 = 4, /* 11a HT20 mode */ 11295e3dd157SKalle Valo MODE_11NG_HT20 = 5, /* 11g HT20 mode */ 11305e3dd157SKalle Valo MODE_11NA_HT40 = 6, /* 11a HT40 mode */ 11315e3dd157SKalle Valo MODE_11NG_HT40 = 7, /* 11g HT40 mode */ 11325e3dd157SKalle Valo MODE_11AC_VHT20 = 8, 11335e3dd157SKalle Valo MODE_11AC_VHT40 = 9, 11345e3dd157SKalle Valo MODE_11AC_VHT80 = 10, 11355e3dd157SKalle Valo /* MODE_11AC_VHT160 = 11, */ 11365e3dd157SKalle Valo MODE_11AC_VHT20_2G = 11, 11375e3dd157SKalle Valo MODE_11AC_VHT40_2G = 12, 11385e3dd157SKalle Valo MODE_11AC_VHT80_2G = 13, 11395e3dd157SKalle Valo MODE_UNKNOWN = 14, 11405e3dd157SKalle Valo MODE_MAX = 14 11415e3dd157SKalle Valo }; 11425e3dd157SKalle Valo 114338a1d47eSKalle Valo static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode) 114438a1d47eSKalle Valo { 114538a1d47eSKalle Valo switch (mode) { 114638a1d47eSKalle Valo case MODE_11A: 114738a1d47eSKalle Valo return "11a"; 114838a1d47eSKalle Valo case MODE_11G: 114938a1d47eSKalle Valo return "11g"; 115038a1d47eSKalle Valo case MODE_11B: 115138a1d47eSKalle Valo return "11b"; 115238a1d47eSKalle Valo case MODE_11GONLY: 115338a1d47eSKalle Valo return "11gonly"; 115438a1d47eSKalle Valo case MODE_11NA_HT20: 115538a1d47eSKalle Valo return "11na-ht20"; 115638a1d47eSKalle Valo case MODE_11NG_HT20: 115738a1d47eSKalle Valo return "11ng-ht20"; 115838a1d47eSKalle Valo case MODE_11NA_HT40: 115938a1d47eSKalle Valo return "11na-ht40"; 116038a1d47eSKalle Valo case MODE_11NG_HT40: 116138a1d47eSKalle Valo return "11ng-ht40"; 116238a1d47eSKalle Valo case MODE_11AC_VHT20: 116338a1d47eSKalle Valo return "11ac-vht20"; 116438a1d47eSKalle Valo case MODE_11AC_VHT40: 116538a1d47eSKalle Valo return "11ac-vht40"; 116638a1d47eSKalle Valo case MODE_11AC_VHT80: 116738a1d47eSKalle Valo return "11ac-vht80"; 116838a1d47eSKalle Valo case MODE_11AC_VHT20_2G: 116938a1d47eSKalle Valo return "11ac-vht20-2g"; 117038a1d47eSKalle Valo case MODE_11AC_VHT40_2G: 117138a1d47eSKalle Valo return "11ac-vht40-2g"; 117238a1d47eSKalle Valo case MODE_11AC_VHT80_2G: 117338a1d47eSKalle Valo return "11ac-vht80-2g"; 117438a1d47eSKalle Valo case MODE_UNKNOWN: 117538a1d47eSKalle Valo /* skip */ 117638a1d47eSKalle Valo break; 117738a1d47eSKalle Valo 117838a1d47eSKalle Valo /* no default handler to allow compiler to check that the 117938a1d47eSKalle Valo * enum is fully handled */ 118038a1d47eSKalle Valo }; 118138a1d47eSKalle Valo 118238a1d47eSKalle Valo return "<unknown>"; 118338a1d47eSKalle Valo } 118438a1d47eSKalle Valo 11855e3dd157SKalle Valo #define WMI_CHAN_LIST_TAG 0x1 11865e3dd157SKalle Valo #define WMI_SSID_LIST_TAG 0x2 11875e3dd157SKalle Valo #define WMI_BSSID_LIST_TAG 0x3 11885e3dd157SKalle Valo #define WMI_IE_TAG 0x4 11895e3dd157SKalle Valo 11905e3dd157SKalle Valo struct wmi_channel { 11915e3dd157SKalle Valo __le32 mhz; 11925e3dd157SKalle Valo __le32 band_center_freq1; 11935e3dd157SKalle Valo __le32 band_center_freq2; /* valid for 11ac, 80plus80 */ 11945e3dd157SKalle Valo union { 11955e3dd157SKalle Valo __le32 flags; /* WMI_CHAN_FLAG_ */ 11965e3dd157SKalle Valo struct { 11975e3dd157SKalle Valo u8 mode; /* only 6 LSBs */ 11985e3dd157SKalle Valo } __packed; 11995e3dd157SKalle Valo } __packed; 12005e3dd157SKalle Valo union { 12015e3dd157SKalle Valo __le32 reginfo0; 12025e3dd157SKalle Valo struct { 120302256930SMichal Kazior /* note: power unit is 0.5 dBm */ 12045e3dd157SKalle Valo u8 min_power; 12055e3dd157SKalle Valo u8 max_power; 12065e3dd157SKalle Valo u8 reg_power; 12075e3dd157SKalle Valo u8 reg_classid; 12085e3dd157SKalle Valo } __packed; 12095e3dd157SKalle Valo } __packed; 12105e3dd157SKalle Valo union { 12115e3dd157SKalle Valo __le32 reginfo1; 12125e3dd157SKalle Valo struct { 12135e3dd157SKalle Valo u8 antenna_max; 12145e3dd157SKalle Valo } __packed; 12155e3dd157SKalle Valo } __packed; 12165e3dd157SKalle Valo } __packed; 12175e3dd157SKalle Valo 12185e3dd157SKalle Valo struct wmi_channel_arg { 12195e3dd157SKalle Valo u32 freq; 12205e3dd157SKalle Valo u32 band_center_freq1; 12215e3dd157SKalle Valo bool passive; 12225e3dd157SKalle Valo bool allow_ibss; 12235e3dd157SKalle Valo bool allow_ht; 12245e3dd157SKalle Valo bool allow_vht; 12255e3dd157SKalle Valo bool ht40plus; 1226e8a50f8bSMarek Puzyniak bool chan_radar; 122702256930SMichal Kazior /* note: power unit is 0.5 dBm */ 12285e3dd157SKalle Valo u32 min_power; 12295e3dd157SKalle Valo u32 max_power; 12305e3dd157SKalle Valo u32 max_reg_power; 12315e3dd157SKalle Valo u32 max_antenna_gain; 12325e3dd157SKalle Valo u32 reg_class_id; 12335e3dd157SKalle Valo enum wmi_phy_mode mode; 12345e3dd157SKalle Valo }; 12355e3dd157SKalle Valo 12365e3dd157SKalle Valo enum wmi_channel_change_cause { 12375e3dd157SKalle Valo WMI_CHANNEL_CHANGE_CAUSE_NONE = 0, 12385e3dd157SKalle Valo WMI_CHANNEL_CHANGE_CAUSE_CSA, 12395e3dd157SKalle Valo }; 12405e3dd157SKalle Valo 12415e3dd157SKalle Valo #define WMI_CHAN_FLAG_HT40_PLUS (1 << 6) 12425e3dd157SKalle Valo #define WMI_CHAN_FLAG_PASSIVE (1 << 7) 12435e3dd157SKalle Valo #define WMI_CHAN_FLAG_ADHOC_ALLOWED (1 << 8) 12445e3dd157SKalle Valo #define WMI_CHAN_FLAG_AP_DISABLED (1 << 9) 12455e3dd157SKalle Valo #define WMI_CHAN_FLAG_DFS (1 << 10) 12465e3dd157SKalle Valo #define WMI_CHAN_FLAG_ALLOW_HT (1 << 11) 12475e3dd157SKalle Valo #define WMI_CHAN_FLAG_ALLOW_VHT (1 << 12) 12485e3dd157SKalle Valo 12495e3dd157SKalle Valo /* Indicate reason for channel switch */ 12505e3dd157SKalle Valo #define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13) 12515e3dd157SKalle Valo 12525e3dd157SKalle Valo #define WMI_MAX_SPATIAL_STREAM 3 12535e3dd157SKalle Valo 12545e3dd157SKalle Valo /* HT Capabilities*/ 12555e3dd157SKalle Valo #define WMI_HT_CAP_ENABLED 0x0001 /* HT Enabled/ disabled */ 12565e3dd157SKalle Valo #define WMI_HT_CAP_HT20_SGI 0x0002 /* Short Guard Interval with HT20 */ 12575e3dd157SKalle Valo #define WMI_HT_CAP_DYNAMIC_SMPS 0x0004 /* Dynamic MIMO powersave */ 12585e3dd157SKalle Valo #define WMI_HT_CAP_TX_STBC 0x0008 /* B3 TX STBC */ 12595e3dd157SKalle Valo #define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3 12605e3dd157SKalle Valo #define WMI_HT_CAP_RX_STBC 0x0030 /* B4-B5 RX STBC */ 12615e3dd157SKalle Valo #define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4 12625e3dd157SKalle Valo #define WMI_HT_CAP_LDPC 0x0040 /* LDPC supported */ 12635e3dd157SKalle Valo #define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080 /* L-SIG TXOP Protection */ 12645e3dd157SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY 0x0700 /* MPDU Density */ 12655e3dd157SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8 12665e3dd157SKalle Valo #define WMI_HT_CAP_HT40_SGI 0x0800 12675e3dd157SKalle Valo 12685e3dd157SKalle Valo #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \ 12695e3dd157SKalle Valo WMI_HT_CAP_HT20_SGI | \ 12705e3dd157SKalle Valo WMI_HT_CAP_HT40_SGI | \ 12715e3dd157SKalle Valo WMI_HT_CAP_TX_STBC | \ 12725e3dd157SKalle Valo WMI_HT_CAP_RX_STBC | \ 12735e3dd157SKalle Valo WMI_HT_CAP_LDPC) 12745e3dd157SKalle Valo 12755e3dd157SKalle Valo /* 12765e3dd157SKalle Valo * WMI_VHT_CAP_* these maps to ieee 802.11ac vht capability information 12775e3dd157SKalle Valo * field. The fields not defined here are not supported, or reserved. 12785e3dd157SKalle Valo * Do not change these masks and if you have to add new one follow the 12795e3dd157SKalle Valo * bitmask as specified by 802.11ac draft. 12805e3dd157SKalle Valo */ 12815e3dd157SKalle Valo 12825e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003 12835e3dd157SKalle Valo #define WMI_VHT_CAP_RX_LDPC 0x00000010 12845e3dd157SKalle Valo #define WMI_VHT_CAP_SGI_80MHZ 0x00000020 12855e3dd157SKalle Valo #define WMI_VHT_CAP_TX_STBC 0x00000080 12865e3dd157SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK 0x00000300 12875e3dd157SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8 12885e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000 12895e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT 23 12905e3dd157SKalle Valo #define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000 12915e3dd157SKalle Valo #define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000 12925e3dd157SKalle Valo 12935e3dd157SKalle Valo /* The following also refer for max HT AMSDU */ 12945e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_3839 0x00000000 12955e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_7935 0x00000001 12965e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002 12975e3dd157SKalle Valo 12985e3dd157SKalle Valo #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \ 12995e3dd157SKalle Valo WMI_VHT_CAP_RX_LDPC | \ 13005e3dd157SKalle Valo WMI_VHT_CAP_SGI_80MHZ | \ 13015e3dd157SKalle Valo WMI_VHT_CAP_TX_STBC | \ 13025e3dd157SKalle Valo WMI_VHT_CAP_RX_STBC_MASK | \ 13035e3dd157SKalle Valo WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \ 13045e3dd157SKalle Valo WMI_VHT_CAP_RX_FIXED_ANT | \ 13055e3dd157SKalle Valo WMI_VHT_CAP_TX_FIXED_ANT) 13065e3dd157SKalle Valo 13075e3dd157SKalle Valo /* 13085e3dd157SKalle Valo * Interested readers refer to Rx/Tx MCS Map definition as defined in 13095e3dd157SKalle Valo * 802.11ac 13105e3dd157SKalle Valo */ 13115e3dd157SKalle Valo #define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1)) 13125e3dd157SKalle Valo #define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000 13135e3dd157SKalle Valo #define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16 13145e3dd157SKalle Valo 13155e3dd157SKalle Valo enum { 13165e3dd157SKalle Valo REGDMN_MODE_11A = 0x00001, /* 11a channels */ 13175e3dd157SKalle Valo REGDMN_MODE_TURBO = 0x00002, /* 11a turbo-only channels */ 13185e3dd157SKalle Valo REGDMN_MODE_11B = 0x00004, /* 11b channels */ 13195e3dd157SKalle Valo REGDMN_MODE_PUREG = 0x00008, /* 11g channels (OFDM only) */ 13205e3dd157SKalle Valo REGDMN_MODE_11G = 0x00008, /* XXX historical */ 13215e3dd157SKalle Valo REGDMN_MODE_108G = 0x00020, /* 11a+Turbo channels */ 13225e3dd157SKalle Valo REGDMN_MODE_108A = 0x00040, /* 11g+Turbo channels */ 13235e3dd157SKalle Valo REGDMN_MODE_XR = 0x00100, /* XR channels */ 13245e3dd157SKalle Valo REGDMN_MODE_11A_HALF_RATE = 0x00200, /* 11A half rate channels */ 13255e3dd157SKalle Valo REGDMN_MODE_11A_QUARTER_RATE = 0x00400, /* 11A quarter rate channels */ 13265e3dd157SKalle Valo REGDMN_MODE_11NG_HT20 = 0x00800, /* 11N-G HT20 channels */ 13275e3dd157SKalle Valo REGDMN_MODE_11NA_HT20 = 0x01000, /* 11N-A HT20 channels */ 13285e3dd157SKalle Valo REGDMN_MODE_11NG_HT40PLUS = 0x02000, /* 11N-G HT40 + channels */ 13295e3dd157SKalle Valo REGDMN_MODE_11NG_HT40MINUS = 0x04000, /* 11N-G HT40 - channels */ 13305e3dd157SKalle Valo REGDMN_MODE_11NA_HT40PLUS = 0x08000, /* 11N-A HT40 + channels */ 13315e3dd157SKalle Valo REGDMN_MODE_11NA_HT40MINUS = 0x10000, /* 11N-A HT40 - channels */ 13325e3dd157SKalle Valo REGDMN_MODE_11AC_VHT20 = 0x20000, /* 5Ghz, VHT20 */ 13335e3dd157SKalle Valo REGDMN_MODE_11AC_VHT40PLUS = 0x40000, /* 5Ghz, VHT40 + channels */ 13345e3dd157SKalle Valo REGDMN_MODE_11AC_VHT40MINUS = 0x80000, /* 5Ghz VHT40 - channels */ 13355e3dd157SKalle Valo REGDMN_MODE_11AC_VHT80 = 0x100000, /* 5Ghz, VHT80 channels */ 13365e3dd157SKalle Valo REGDMN_MODE_ALL = 0xffffffff 13375e3dd157SKalle Valo }; 13385e3dd157SKalle Valo 13395e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001 13405e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002 13415e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004 13425e3dd157SKalle Valo 13435e3dd157SKalle Valo /* regulatory capabilities */ 13445e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040 13455e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080 13465e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100 13475e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200 13485e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400 13495e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800 13505e3dd157SKalle Valo 13515e3dd157SKalle Valo struct hal_reg_capabilities { 13525e3dd157SKalle Valo /* regdomain value specified in EEPROM */ 13535e3dd157SKalle Valo __le32 eeprom_rd; 13545e3dd157SKalle Valo /*regdomain */ 13555e3dd157SKalle Valo __le32 eeprom_rd_ext; 13565e3dd157SKalle Valo /* CAP1 capabilities bit map. */ 13575e3dd157SKalle Valo __le32 regcap1; 13585e3dd157SKalle Valo /* REGDMN EEPROM CAP. */ 13595e3dd157SKalle Valo __le32 regcap2; 13605e3dd157SKalle Valo /* REGDMN MODE */ 13615e3dd157SKalle Valo __le32 wireless_modes; 13625e3dd157SKalle Valo __le32 low_2ghz_chan; 13635e3dd157SKalle Valo __le32 high_2ghz_chan; 13645e3dd157SKalle Valo __le32 low_5ghz_chan; 13655e3dd157SKalle Valo __le32 high_5ghz_chan; 13665e3dd157SKalle Valo } __packed; 13675e3dd157SKalle Valo 13685e3dd157SKalle Valo enum wlan_mode_capability { 13695e3dd157SKalle Valo WHAL_WLAN_11A_CAPABILITY = 0x1, 13705e3dd157SKalle Valo WHAL_WLAN_11G_CAPABILITY = 0x2, 13715e3dd157SKalle Valo WHAL_WLAN_11AG_CAPABILITY = 0x3, 13725e3dd157SKalle Valo }; 13735e3dd157SKalle Valo 13745e3dd157SKalle Valo /* structure used by FW for requesting host memory */ 13755e3dd157SKalle Valo struct wlan_host_mem_req { 13765e3dd157SKalle Valo /* ID of the request */ 13775e3dd157SKalle Valo __le32 req_id; 13785e3dd157SKalle Valo /* size of the of each unit */ 13795e3dd157SKalle Valo __le32 unit_size; 13805e3dd157SKalle Valo /* flags to indicate that 13815e3dd157SKalle Valo * the number units is dependent 13825e3dd157SKalle Valo * on number of resources(num vdevs num peers .. etc) 13835e3dd157SKalle Valo */ 13845e3dd157SKalle Valo __le32 num_unit_info; 13855e3dd157SKalle Valo /* 13865e3dd157SKalle Valo * actual number of units to allocate . if flags in the num_unit_info 13875e3dd157SKalle Valo * indicate that number of units is tied to number of a particular 13885e3dd157SKalle Valo * resource to allocate then num_units filed is set to 0 and host 13895e3dd157SKalle Valo * will derive the number units from number of the resources it is 13905e3dd157SKalle Valo * requesting. 13915e3dd157SKalle Valo */ 13925e3dd157SKalle Valo __le32 num_units; 13935e3dd157SKalle Valo } __packed; 13945e3dd157SKalle Valo 13955e3dd157SKalle Valo /* 13965e3dd157SKalle Valo * The following struct holds optional payload for 13975e3dd157SKalle Valo * wmi_service_ready_event,e.g., 11ac pass some of the 13985e3dd157SKalle Valo * device capability to the host. 13995e3dd157SKalle Valo */ 14005e3dd157SKalle Valo struct wmi_service_ready_event { 14015e3dd157SKalle Valo __le32 sw_version; 14025e3dd157SKalle Valo __le32 sw_version_1; 14035e3dd157SKalle Valo __le32 abi_version; 14045e3dd157SKalle Valo /* WMI_PHY_CAPABILITY */ 14055e3dd157SKalle Valo __le32 phy_capability; 14065e3dd157SKalle Valo /* Maximum number of frag table entries that SW will populate less 1 */ 14075e3dd157SKalle Valo __le32 max_frag_entry; 1408c4f8c836SMichal Kazior __le32 wmi_service_bitmap[16]; 14095e3dd157SKalle Valo __le32 num_rf_chains; 14105e3dd157SKalle Valo /* 14115e3dd157SKalle Valo * The following field is only valid for service type 14125e3dd157SKalle Valo * WMI_SERVICE_11AC 14135e3dd157SKalle Valo */ 14145e3dd157SKalle Valo __le32 ht_cap_info; /* WMI HT Capability */ 14155e3dd157SKalle Valo __le32 vht_cap_info; /* VHT capability info field of 802.11ac */ 14165e3dd157SKalle Valo __le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */ 14175e3dd157SKalle Valo __le32 hw_min_tx_power; 14185e3dd157SKalle Valo __le32 hw_max_tx_power; 14195e3dd157SKalle Valo struct hal_reg_capabilities hal_reg_capabilities; 14205e3dd157SKalle Valo __le32 sys_cap_info; 14215e3dd157SKalle Valo __le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */ 14225e3dd157SKalle Valo /* 14235e3dd157SKalle Valo * Max beacon and Probe Response IE offload size 14245e3dd157SKalle Valo * (includes optional P2P IEs) 14255e3dd157SKalle Valo */ 14265e3dd157SKalle Valo __le32 max_bcn_ie_size; 14275e3dd157SKalle Valo /* 14285e3dd157SKalle Valo * request to host to allocate a chuck of memory and pss it down to FW 14295e3dd157SKalle Valo * via WM_INIT. FW uses this as FW extesnsion memory for saving its 14305e3dd157SKalle Valo * data structures. Only valid for low latency interfaces like PCIE 14315e3dd157SKalle Valo * where FW can access this memory directly (or) by DMA. 14325e3dd157SKalle Valo */ 14335e3dd157SKalle Valo __le32 num_mem_reqs; 14345c01aa3dSMichal Kazior struct wlan_host_mem_req mem_reqs[0]; 14355e3dd157SKalle Valo } __packed; 14365e3dd157SKalle Valo 14376f97d256SBartosz Markowski /* This is the definition from 10.X firmware branch */ 14385c01aa3dSMichal Kazior struct wmi_10x_service_ready_event { 14396f97d256SBartosz Markowski __le32 sw_version; 14406f97d256SBartosz Markowski __le32 abi_version; 14416f97d256SBartosz Markowski 14426f97d256SBartosz Markowski /* WMI_PHY_CAPABILITY */ 14436f97d256SBartosz Markowski __le32 phy_capability; 14446f97d256SBartosz Markowski 14456f97d256SBartosz Markowski /* Maximum number of frag table entries that SW will populate less 1 */ 14466f97d256SBartosz Markowski __le32 max_frag_entry; 1447c4f8c836SMichal Kazior __le32 wmi_service_bitmap[16]; 14486f97d256SBartosz Markowski __le32 num_rf_chains; 14496f97d256SBartosz Markowski 14506f97d256SBartosz Markowski /* 14516f97d256SBartosz Markowski * The following field is only valid for service type 14526f97d256SBartosz Markowski * WMI_SERVICE_11AC 14536f97d256SBartosz Markowski */ 14546f97d256SBartosz Markowski __le32 ht_cap_info; /* WMI HT Capability */ 14556f97d256SBartosz Markowski __le32 vht_cap_info; /* VHT capability info field of 802.11ac */ 14566f97d256SBartosz Markowski __le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */ 14576f97d256SBartosz Markowski __le32 hw_min_tx_power; 14586f97d256SBartosz Markowski __le32 hw_max_tx_power; 14596f97d256SBartosz Markowski 14606f97d256SBartosz Markowski struct hal_reg_capabilities hal_reg_capabilities; 14616f97d256SBartosz Markowski 14626f97d256SBartosz Markowski __le32 sys_cap_info; 14636f97d256SBartosz Markowski __le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */ 14646f97d256SBartosz Markowski 14656f97d256SBartosz Markowski /* 14666f97d256SBartosz Markowski * request to host to allocate a chuck of memory and pss it down to FW 14676f97d256SBartosz Markowski * via WM_INIT. FW uses this as FW extesnsion memory for saving its 14686f97d256SBartosz Markowski * data structures. Only valid for low latency interfaces like PCIE 14696f97d256SBartosz Markowski * where FW can access this memory directly (or) by DMA. 14706f97d256SBartosz Markowski */ 14716f97d256SBartosz Markowski __le32 num_mem_reqs; 14726f97d256SBartosz Markowski 14735c01aa3dSMichal Kazior struct wlan_host_mem_req mem_reqs[0]; 14746f97d256SBartosz Markowski } __packed; 14756f97d256SBartosz Markowski 14765e3dd157SKalle Valo #define WMI_SERVICE_READY_TIMEOUT_HZ (5*HZ) 14775e3dd157SKalle Valo #define WMI_UNIFIED_READY_TIMEOUT_HZ (5*HZ) 14785e3dd157SKalle Valo 14795e3dd157SKalle Valo struct wmi_ready_event { 14805e3dd157SKalle Valo __le32 sw_version; 14815e3dd157SKalle Valo __le32 abi_version; 14825e3dd157SKalle Valo struct wmi_mac_addr mac_addr; 14835e3dd157SKalle Valo __le32 status; 14845e3dd157SKalle Valo } __packed; 14855e3dd157SKalle Valo 14865e3dd157SKalle Valo struct wmi_resource_config { 14875e3dd157SKalle Valo /* number of virtual devices (VAPs) to support */ 14885e3dd157SKalle Valo __le32 num_vdevs; 14895e3dd157SKalle Valo 14905e3dd157SKalle Valo /* number of peer nodes to support */ 14915e3dd157SKalle Valo __le32 num_peers; 14925e3dd157SKalle Valo 14935e3dd157SKalle Valo /* 14945e3dd157SKalle Valo * In offload mode target supports features like WOW, chatter and 14955e3dd157SKalle Valo * other protocol offloads. In order to support them some 14965e3dd157SKalle Valo * functionalities like reorder buffering, PN checking need to be 14975e3dd157SKalle Valo * done in target. This determines maximum number of peers suported 14985e3dd157SKalle Valo * by target in offload mode 14995e3dd157SKalle Valo */ 15005e3dd157SKalle Valo __le32 num_offload_peers; 15015e3dd157SKalle Valo 15025e3dd157SKalle Valo /* For target-based RX reordering */ 15035e3dd157SKalle Valo __le32 num_offload_reorder_bufs; 15045e3dd157SKalle Valo 15055e3dd157SKalle Valo /* number of keys per peer */ 15065e3dd157SKalle Valo __le32 num_peer_keys; 15075e3dd157SKalle Valo 15085e3dd157SKalle Valo /* total number of TX/RX data TIDs */ 15095e3dd157SKalle Valo __le32 num_tids; 15105e3dd157SKalle Valo 15115e3dd157SKalle Valo /* 15125e3dd157SKalle Valo * max skid for resolving hash collisions 15135e3dd157SKalle Valo * 15145e3dd157SKalle Valo * The address search table is sparse, so that if two MAC addresses 15155e3dd157SKalle Valo * result in the same hash value, the second of these conflicting 15165e3dd157SKalle Valo * entries can slide to the next index in the address search table, 15175e3dd157SKalle Valo * and use it, if it is unoccupied. This ast_skid_limit parameter 15185e3dd157SKalle Valo * specifies the upper bound on how many subsequent indices to search 15195e3dd157SKalle Valo * over to find an unoccupied space. 15205e3dd157SKalle Valo */ 15215e3dd157SKalle Valo __le32 ast_skid_limit; 15225e3dd157SKalle Valo 15235e3dd157SKalle Valo /* 15245e3dd157SKalle Valo * the nominal chain mask for transmit 15255e3dd157SKalle Valo * 15265e3dd157SKalle Valo * The chain mask may be modified dynamically, e.g. to operate AP 15275e3dd157SKalle Valo * tx with a reduced number of chains if no clients are associated. 15285e3dd157SKalle Valo * This configuration parameter specifies the nominal chain-mask that 15295e3dd157SKalle Valo * should be used when not operating with a reduced set of tx chains. 15305e3dd157SKalle Valo */ 15315e3dd157SKalle Valo __le32 tx_chain_mask; 15325e3dd157SKalle Valo 15335e3dd157SKalle Valo /* 15345e3dd157SKalle Valo * the nominal chain mask for receive 15355e3dd157SKalle Valo * 15365e3dd157SKalle Valo * The chain mask may be modified dynamically, e.g. for a client 15375e3dd157SKalle Valo * to use a reduced number of chains for receive if the traffic to 15385e3dd157SKalle Valo * the client is low enough that it doesn't require downlink MIMO 15395e3dd157SKalle Valo * or antenna diversity. 15405e3dd157SKalle Valo * This configuration parameter specifies the nominal chain-mask that 15415e3dd157SKalle Valo * should be used when not operating with a reduced set of rx chains. 15425e3dd157SKalle Valo */ 15435e3dd157SKalle Valo __le32 rx_chain_mask; 15445e3dd157SKalle Valo 15455e3dd157SKalle Valo /* 15465e3dd157SKalle Valo * what rx reorder timeout (ms) to use for the AC 15475e3dd157SKalle Valo * 15485e3dd157SKalle Valo * Each WMM access class (voice, video, best-effort, background) will 15495e3dd157SKalle Valo * have its own timeout value to dictate how long to wait for missing 15505e3dd157SKalle Valo * rx MPDUs to arrive before flushing subsequent MPDUs that have 15515e3dd157SKalle Valo * already been received. 15525e3dd157SKalle Valo * This parameter specifies the timeout in milliseconds for each 15535e3dd157SKalle Valo * class. 15545e3dd157SKalle Valo */ 15555e3dd157SKalle Valo __le32 rx_timeout_pri_vi; 15565e3dd157SKalle Valo __le32 rx_timeout_pri_vo; 15575e3dd157SKalle Valo __le32 rx_timeout_pri_be; 15585e3dd157SKalle Valo __le32 rx_timeout_pri_bk; 15595e3dd157SKalle Valo 15605e3dd157SKalle Valo /* 15615e3dd157SKalle Valo * what mode the rx should decap packets to 15625e3dd157SKalle Valo * 15635e3dd157SKalle Valo * MAC can decap to RAW (no decap), native wifi or Ethernet types 15645e3dd157SKalle Valo * THis setting also determines the default TX behavior, however TX 15655e3dd157SKalle Valo * behavior can be modified on a per VAP basis during VAP init 15665e3dd157SKalle Valo */ 15675e3dd157SKalle Valo __le32 rx_decap_mode; 15685e3dd157SKalle Valo 15698e4a4f5dSGeert Uytterhoeven /* what is the maximum number of scan requests that can be queued */ 15705e3dd157SKalle Valo __le32 scan_max_pending_reqs; 15715e3dd157SKalle Valo 15725e3dd157SKalle Valo /* maximum VDEV that could use BMISS offload */ 15735e3dd157SKalle Valo __le32 bmiss_offload_max_vdev; 15745e3dd157SKalle Valo 15755e3dd157SKalle Valo /* maximum VDEV that could use offload roaming */ 15765e3dd157SKalle Valo __le32 roam_offload_max_vdev; 15775e3dd157SKalle Valo 15785e3dd157SKalle Valo /* maximum AP profiles that would push to offload roaming */ 15795e3dd157SKalle Valo __le32 roam_offload_max_ap_profiles; 15805e3dd157SKalle Valo 15815e3dd157SKalle Valo /* 15825e3dd157SKalle Valo * how many groups to use for mcast->ucast conversion 15835e3dd157SKalle Valo * 15845e3dd157SKalle Valo * The target's WAL maintains a table to hold information regarding 15855e3dd157SKalle Valo * which peers belong to a given multicast group, so that if 15865e3dd157SKalle Valo * multicast->unicast conversion is enabled, the target can convert 15875e3dd157SKalle Valo * multicast tx frames to a series of unicast tx frames, to each 15885e3dd157SKalle Valo * peer within the multicast group. 15895e3dd157SKalle Valo This num_mcast_groups configuration parameter tells the target how 15905e3dd157SKalle Valo * many multicast groups to provide storage for within its multicast 15915e3dd157SKalle Valo * group membership table. 15925e3dd157SKalle Valo */ 15935e3dd157SKalle Valo __le32 num_mcast_groups; 15945e3dd157SKalle Valo 15955e3dd157SKalle Valo /* 15965e3dd157SKalle Valo * size to alloc for the mcast membership table 15975e3dd157SKalle Valo * 15985e3dd157SKalle Valo * This num_mcast_table_elems configuration parameter tells the 15995e3dd157SKalle Valo * target how many peer elements it needs to provide storage for in 16005e3dd157SKalle Valo * its multicast group membership table. 16015e3dd157SKalle Valo * These multicast group membership table elements are shared by the 16025e3dd157SKalle Valo * multicast groups stored within the table. 16035e3dd157SKalle Valo */ 16045e3dd157SKalle Valo __le32 num_mcast_table_elems; 16055e3dd157SKalle Valo 16065e3dd157SKalle Valo /* 16075e3dd157SKalle Valo * whether/how to do multicast->unicast conversion 16085e3dd157SKalle Valo * 16095e3dd157SKalle Valo * This configuration parameter specifies whether the target should 16105e3dd157SKalle Valo * perform multicast --> unicast conversion on transmit, and if so, 16115e3dd157SKalle Valo * what to do if it finds no entries in its multicast group 16125e3dd157SKalle Valo * membership table for the multicast IP address in the tx frame. 16135e3dd157SKalle Valo * Configuration value: 16145e3dd157SKalle Valo * 0 -> Do not perform multicast to unicast conversion. 16155e3dd157SKalle Valo * 1 -> Convert multicast frames to unicast, if the IP multicast 16165e3dd157SKalle Valo * address from the tx frame is found in the multicast group 16175e3dd157SKalle Valo * membership table. If the IP multicast address is not found, 16185e3dd157SKalle Valo * drop the frame. 16195e3dd157SKalle Valo * 2 -> Convert multicast frames to unicast, if the IP multicast 16205e3dd157SKalle Valo * address from the tx frame is found in the multicast group 16215e3dd157SKalle Valo * membership table. If the IP multicast address is not found, 16225e3dd157SKalle Valo * transmit the frame as multicast. 16235e3dd157SKalle Valo */ 16245e3dd157SKalle Valo __le32 mcast2ucast_mode; 16255e3dd157SKalle Valo 16265e3dd157SKalle Valo /* 16275e3dd157SKalle Valo * how much memory to allocate for a tx PPDU dbg log 16285e3dd157SKalle Valo * 16295e3dd157SKalle Valo * This parameter controls how much memory the target will allocate 16305e3dd157SKalle Valo * to store a log of tx PPDU meta-information (how large the PPDU 16315e3dd157SKalle Valo * was, when it was sent, whether it was successful, etc.) 16325e3dd157SKalle Valo */ 16335e3dd157SKalle Valo __le32 tx_dbg_log_size; 16345e3dd157SKalle Valo 16355e3dd157SKalle Valo /* how many AST entries to be allocated for WDS */ 16365e3dd157SKalle Valo __le32 num_wds_entries; 16375e3dd157SKalle Valo 16385e3dd157SKalle Valo /* 16395e3dd157SKalle Valo * MAC DMA burst size, e.g., For target PCI limit can be 16405e3dd157SKalle Valo * 0 -default, 1 256B 16415e3dd157SKalle Valo */ 16425e3dd157SKalle Valo __le32 dma_burst_size; 16435e3dd157SKalle Valo 16445e3dd157SKalle Valo /* 16455e3dd157SKalle Valo * Fixed delimiters to be inserted after every MPDU to 16465e3dd157SKalle Valo * account for interface latency to avoid underrun. 16475e3dd157SKalle Valo */ 16485e3dd157SKalle Valo __le32 mac_aggr_delim; 16495e3dd157SKalle Valo 16505e3dd157SKalle Valo /* 16515e3dd157SKalle Valo * determine whether target is responsible for detecting duplicate 16525e3dd157SKalle Valo * non-aggregate MPDU and timing out stale fragments. 16535e3dd157SKalle Valo * 16545e3dd157SKalle Valo * A-MPDU reordering is always performed on the target. 16555e3dd157SKalle Valo * 16565e3dd157SKalle Valo * 0: target responsible for frag timeout and dup checking 16575e3dd157SKalle Valo * 1: host responsible for frag timeout and dup checking 16585e3dd157SKalle Valo */ 16595e3dd157SKalle Valo __le32 rx_skip_defrag_timeout_dup_detection_check; 16605e3dd157SKalle Valo 16615e3dd157SKalle Valo /* 16625e3dd157SKalle Valo * Configuration for VoW : 16635e3dd157SKalle Valo * No of Video Nodes to be supported 16645e3dd157SKalle Valo * and Max no of descriptors for each Video link (node). 16655e3dd157SKalle Valo */ 16665e3dd157SKalle Valo __le32 vow_config; 16675e3dd157SKalle Valo 16685e3dd157SKalle Valo /* maximum VDEV that could use GTK offload */ 16695e3dd157SKalle Valo __le32 gtk_offload_max_vdev; 16705e3dd157SKalle Valo 16715e3dd157SKalle Valo /* Number of msdu descriptors target should use */ 16725e3dd157SKalle Valo __le32 num_msdu_desc; 16735e3dd157SKalle Valo 16745e3dd157SKalle Valo /* 16755e3dd157SKalle Valo * Max. number of Tx fragments per MSDU 16765e3dd157SKalle Valo * This parameter controls the max number of Tx fragments per MSDU. 16775e3dd157SKalle Valo * This is sent by the target as part of the WMI_SERVICE_READY event 16785e3dd157SKalle Valo * and is overriden by the OS shim as required. 16795e3dd157SKalle Valo */ 16805e3dd157SKalle Valo __le32 max_frag_entries; 16815e3dd157SKalle Valo } __packed; 16825e3dd157SKalle Valo 168312b2b9e3SBartosz Markowski struct wmi_resource_config_10x { 168412b2b9e3SBartosz Markowski /* number of virtual devices (VAPs) to support */ 168512b2b9e3SBartosz Markowski __le32 num_vdevs; 168612b2b9e3SBartosz Markowski 168712b2b9e3SBartosz Markowski /* number of peer nodes to support */ 168812b2b9e3SBartosz Markowski __le32 num_peers; 168912b2b9e3SBartosz Markowski 169012b2b9e3SBartosz Markowski /* number of keys per peer */ 169112b2b9e3SBartosz Markowski __le32 num_peer_keys; 169212b2b9e3SBartosz Markowski 169312b2b9e3SBartosz Markowski /* total number of TX/RX data TIDs */ 169412b2b9e3SBartosz Markowski __le32 num_tids; 169512b2b9e3SBartosz Markowski 169612b2b9e3SBartosz Markowski /* 169712b2b9e3SBartosz Markowski * max skid for resolving hash collisions 169812b2b9e3SBartosz Markowski * 169912b2b9e3SBartosz Markowski * The address search table is sparse, so that if two MAC addresses 170012b2b9e3SBartosz Markowski * result in the same hash value, the second of these conflicting 170112b2b9e3SBartosz Markowski * entries can slide to the next index in the address search table, 170212b2b9e3SBartosz Markowski * and use it, if it is unoccupied. This ast_skid_limit parameter 170312b2b9e3SBartosz Markowski * specifies the upper bound on how many subsequent indices to search 170412b2b9e3SBartosz Markowski * over to find an unoccupied space. 170512b2b9e3SBartosz Markowski */ 170612b2b9e3SBartosz Markowski __le32 ast_skid_limit; 170712b2b9e3SBartosz Markowski 170812b2b9e3SBartosz Markowski /* 170912b2b9e3SBartosz Markowski * the nominal chain mask for transmit 171012b2b9e3SBartosz Markowski * 171112b2b9e3SBartosz Markowski * The chain mask may be modified dynamically, e.g. to operate AP 171212b2b9e3SBartosz Markowski * tx with a reduced number of chains if no clients are associated. 171312b2b9e3SBartosz Markowski * This configuration parameter specifies the nominal chain-mask that 171412b2b9e3SBartosz Markowski * should be used when not operating with a reduced set of tx chains. 171512b2b9e3SBartosz Markowski */ 171612b2b9e3SBartosz Markowski __le32 tx_chain_mask; 171712b2b9e3SBartosz Markowski 171812b2b9e3SBartosz Markowski /* 171912b2b9e3SBartosz Markowski * the nominal chain mask for receive 172012b2b9e3SBartosz Markowski * 172112b2b9e3SBartosz Markowski * The chain mask may be modified dynamically, e.g. for a client 172212b2b9e3SBartosz Markowski * to use a reduced number of chains for receive if the traffic to 172312b2b9e3SBartosz Markowski * the client is low enough that it doesn't require downlink MIMO 172412b2b9e3SBartosz Markowski * or antenna diversity. 172512b2b9e3SBartosz Markowski * This configuration parameter specifies the nominal chain-mask that 172612b2b9e3SBartosz Markowski * should be used when not operating with a reduced set of rx chains. 172712b2b9e3SBartosz Markowski */ 172812b2b9e3SBartosz Markowski __le32 rx_chain_mask; 172912b2b9e3SBartosz Markowski 173012b2b9e3SBartosz Markowski /* 173112b2b9e3SBartosz Markowski * what rx reorder timeout (ms) to use for the AC 173212b2b9e3SBartosz Markowski * 173312b2b9e3SBartosz Markowski * Each WMM access class (voice, video, best-effort, background) will 173412b2b9e3SBartosz Markowski * have its own timeout value to dictate how long to wait for missing 173512b2b9e3SBartosz Markowski * rx MPDUs to arrive before flushing subsequent MPDUs that have 173612b2b9e3SBartosz Markowski * already been received. 173712b2b9e3SBartosz Markowski * This parameter specifies the timeout in milliseconds for each 173812b2b9e3SBartosz Markowski * class. 173912b2b9e3SBartosz Markowski */ 174012b2b9e3SBartosz Markowski __le32 rx_timeout_pri_vi; 174112b2b9e3SBartosz Markowski __le32 rx_timeout_pri_vo; 174212b2b9e3SBartosz Markowski __le32 rx_timeout_pri_be; 174312b2b9e3SBartosz Markowski __le32 rx_timeout_pri_bk; 174412b2b9e3SBartosz Markowski 174512b2b9e3SBartosz Markowski /* 174612b2b9e3SBartosz Markowski * what mode the rx should decap packets to 174712b2b9e3SBartosz Markowski * 174812b2b9e3SBartosz Markowski * MAC can decap to RAW (no decap), native wifi or Ethernet types 174912b2b9e3SBartosz Markowski * THis setting also determines the default TX behavior, however TX 175012b2b9e3SBartosz Markowski * behavior can be modified on a per VAP basis during VAP init 175112b2b9e3SBartosz Markowski */ 175212b2b9e3SBartosz Markowski __le32 rx_decap_mode; 175312b2b9e3SBartosz Markowski 17548e4a4f5dSGeert Uytterhoeven /* what is the maximum number of scan requests that can be queued */ 175512b2b9e3SBartosz Markowski __le32 scan_max_pending_reqs; 175612b2b9e3SBartosz Markowski 175712b2b9e3SBartosz Markowski /* maximum VDEV that could use BMISS offload */ 175812b2b9e3SBartosz Markowski __le32 bmiss_offload_max_vdev; 175912b2b9e3SBartosz Markowski 176012b2b9e3SBartosz Markowski /* maximum VDEV that could use offload roaming */ 176112b2b9e3SBartosz Markowski __le32 roam_offload_max_vdev; 176212b2b9e3SBartosz Markowski 176312b2b9e3SBartosz Markowski /* maximum AP profiles that would push to offload roaming */ 176412b2b9e3SBartosz Markowski __le32 roam_offload_max_ap_profiles; 176512b2b9e3SBartosz Markowski 176612b2b9e3SBartosz Markowski /* 176712b2b9e3SBartosz Markowski * how many groups to use for mcast->ucast conversion 176812b2b9e3SBartosz Markowski * 176912b2b9e3SBartosz Markowski * The target's WAL maintains a table to hold information regarding 177012b2b9e3SBartosz Markowski * which peers belong to a given multicast group, so that if 177112b2b9e3SBartosz Markowski * multicast->unicast conversion is enabled, the target can convert 177212b2b9e3SBartosz Markowski * multicast tx frames to a series of unicast tx frames, to each 177312b2b9e3SBartosz Markowski * peer within the multicast group. 177412b2b9e3SBartosz Markowski This num_mcast_groups configuration parameter tells the target how 177512b2b9e3SBartosz Markowski * many multicast groups to provide storage for within its multicast 177612b2b9e3SBartosz Markowski * group membership table. 177712b2b9e3SBartosz Markowski */ 177812b2b9e3SBartosz Markowski __le32 num_mcast_groups; 177912b2b9e3SBartosz Markowski 178012b2b9e3SBartosz Markowski /* 178112b2b9e3SBartosz Markowski * size to alloc for the mcast membership table 178212b2b9e3SBartosz Markowski * 178312b2b9e3SBartosz Markowski * This num_mcast_table_elems configuration parameter tells the 178412b2b9e3SBartosz Markowski * target how many peer elements it needs to provide storage for in 178512b2b9e3SBartosz Markowski * its multicast group membership table. 178612b2b9e3SBartosz Markowski * These multicast group membership table elements are shared by the 178712b2b9e3SBartosz Markowski * multicast groups stored within the table. 178812b2b9e3SBartosz Markowski */ 178912b2b9e3SBartosz Markowski __le32 num_mcast_table_elems; 179012b2b9e3SBartosz Markowski 179112b2b9e3SBartosz Markowski /* 179212b2b9e3SBartosz Markowski * whether/how to do multicast->unicast conversion 179312b2b9e3SBartosz Markowski * 179412b2b9e3SBartosz Markowski * This configuration parameter specifies whether the target should 179512b2b9e3SBartosz Markowski * perform multicast --> unicast conversion on transmit, and if so, 179612b2b9e3SBartosz Markowski * what to do if it finds no entries in its multicast group 179712b2b9e3SBartosz Markowski * membership table for the multicast IP address in the tx frame. 179812b2b9e3SBartosz Markowski * Configuration value: 179912b2b9e3SBartosz Markowski * 0 -> Do not perform multicast to unicast conversion. 180012b2b9e3SBartosz Markowski * 1 -> Convert multicast frames to unicast, if the IP multicast 180112b2b9e3SBartosz Markowski * address from the tx frame is found in the multicast group 180212b2b9e3SBartosz Markowski * membership table. If the IP multicast address is not found, 180312b2b9e3SBartosz Markowski * drop the frame. 180412b2b9e3SBartosz Markowski * 2 -> Convert multicast frames to unicast, if the IP multicast 180512b2b9e3SBartosz Markowski * address from the tx frame is found in the multicast group 180612b2b9e3SBartosz Markowski * membership table. If the IP multicast address is not found, 180712b2b9e3SBartosz Markowski * transmit the frame as multicast. 180812b2b9e3SBartosz Markowski */ 180912b2b9e3SBartosz Markowski __le32 mcast2ucast_mode; 181012b2b9e3SBartosz Markowski 181112b2b9e3SBartosz Markowski /* 181212b2b9e3SBartosz Markowski * how much memory to allocate for a tx PPDU dbg log 181312b2b9e3SBartosz Markowski * 181412b2b9e3SBartosz Markowski * This parameter controls how much memory the target will allocate 181512b2b9e3SBartosz Markowski * to store a log of tx PPDU meta-information (how large the PPDU 181612b2b9e3SBartosz Markowski * was, when it was sent, whether it was successful, etc.) 181712b2b9e3SBartosz Markowski */ 181812b2b9e3SBartosz Markowski __le32 tx_dbg_log_size; 181912b2b9e3SBartosz Markowski 182012b2b9e3SBartosz Markowski /* how many AST entries to be allocated for WDS */ 182112b2b9e3SBartosz Markowski __le32 num_wds_entries; 182212b2b9e3SBartosz Markowski 182312b2b9e3SBartosz Markowski /* 182412b2b9e3SBartosz Markowski * MAC DMA burst size, e.g., For target PCI limit can be 182512b2b9e3SBartosz Markowski * 0 -default, 1 256B 182612b2b9e3SBartosz Markowski */ 182712b2b9e3SBartosz Markowski __le32 dma_burst_size; 182812b2b9e3SBartosz Markowski 182912b2b9e3SBartosz Markowski /* 183012b2b9e3SBartosz Markowski * Fixed delimiters to be inserted after every MPDU to 183112b2b9e3SBartosz Markowski * account for interface latency to avoid underrun. 183212b2b9e3SBartosz Markowski */ 183312b2b9e3SBartosz Markowski __le32 mac_aggr_delim; 183412b2b9e3SBartosz Markowski 183512b2b9e3SBartosz Markowski /* 183612b2b9e3SBartosz Markowski * determine whether target is responsible for detecting duplicate 183712b2b9e3SBartosz Markowski * non-aggregate MPDU and timing out stale fragments. 183812b2b9e3SBartosz Markowski * 183912b2b9e3SBartosz Markowski * A-MPDU reordering is always performed on the target. 184012b2b9e3SBartosz Markowski * 184112b2b9e3SBartosz Markowski * 0: target responsible for frag timeout and dup checking 184212b2b9e3SBartosz Markowski * 1: host responsible for frag timeout and dup checking 184312b2b9e3SBartosz Markowski */ 184412b2b9e3SBartosz Markowski __le32 rx_skip_defrag_timeout_dup_detection_check; 184512b2b9e3SBartosz Markowski 184612b2b9e3SBartosz Markowski /* 184712b2b9e3SBartosz Markowski * Configuration for VoW : 184812b2b9e3SBartosz Markowski * No of Video Nodes to be supported 184912b2b9e3SBartosz Markowski * and Max no of descriptors for each Video link (node). 185012b2b9e3SBartosz Markowski */ 185112b2b9e3SBartosz Markowski __le32 vow_config; 185212b2b9e3SBartosz Markowski 185312b2b9e3SBartosz Markowski /* Number of msdu descriptors target should use */ 185412b2b9e3SBartosz Markowski __le32 num_msdu_desc; 185512b2b9e3SBartosz Markowski 185612b2b9e3SBartosz Markowski /* 185712b2b9e3SBartosz Markowski * Max. number of Tx fragments per MSDU 185812b2b9e3SBartosz Markowski * This parameter controls the max number of Tx fragments per MSDU. 185912b2b9e3SBartosz Markowski * This is sent by the target as part of the WMI_SERVICE_READY event 186012b2b9e3SBartosz Markowski * and is overriden by the OS shim as required. 186112b2b9e3SBartosz Markowski */ 186212b2b9e3SBartosz Markowski __le32 max_frag_entries; 186312b2b9e3SBartosz Markowski } __packed; 186412b2b9e3SBartosz Markowski 186524c88f78SMichal Kazior struct wmi_resource_config_10_2 { 186624c88f78SMichal Kazior struct wmi_resource_config_10x common; 186724c88f78SMichal Kazior __le32 max_peer_ext_stats; 186824c88f78SMichal Kazior __le32 smart_ant_cap; /* 0-disable, 1-enable */ 186924c88f78SMichal Kazior __le32 bk_min_free; 187024c88f78SMichal Kazior __le32 be_min_free; 187124c88f78SMichal Kazior __le32 vi_min_free; 187224c88f78SMichal Kazior __le32 vo_min_free; 187324c88f78SMichal Kazior __le32 rx_batchmode; /* 0-disable, 1-enable */ 187424c88f78SMichal Kazior } __packed; 187512b2b9e3SBartosz Markowski 1876b3effe61SBartosz Markowski #define NUM_UNITS_IS_NUM_VDEVS 0x1 1877b3effe61SBartosz Markowski #define NUM_UNITS_IS_NUM_PEERS 0x2 1878b3effe61SBartosz Markowski 18795e3dd157SKalle Valo /* strucutre describing host memory chunk. */ 18805e3dd157SKalle Valo struct host_memory_chunk { 18815e3dd157SKalle Valo /* id of the request that is passed up in service ready */ 18825e3dd157SKalle Valo __le32 req_id; 18835e3dd157SKalle Valo /* the physical address the memory chunk */ 18845e3dd157SKalle Valo __le32 ptr; 18855e3dd157SKalle Valo /* size of the chunk */ 18865e3dd157SKalle Valo __le32 size; 18875e3dd157SKalle Valo } __packed; 18885e3dd157SKalle Valo 1889cf9fca8fSMichal Kazior struct wmi_host_mem_chunks { 1890cf9fca8fSMichal Kazior __le32 count; 1891cf9fca8fSMichal Kazior /* some fw revisions require at least 1 chunk regardless of count */ 1892cf9fca8fSMichal Kazior struct host_memory_chunk items[1]; 1893cf9fca8fSMichal Kazior } __packed; 1894cf9fca8fSMichal Kazior 18955e3dd157SKalle Valo struct wmi_init_cmd { 18965e3dd157SKalle Valo struct wmi_resource_config resource_config; 1897cf9fca8fSMichal Kazior struct wmi_host_mem_chunks mem_chunks; 18985e3dd157SKalle Valo } __packed; 18995e3dd157SKalle Valo 190012b2b9e3SBartosz Markowski /* _10x stucture is from 10.X FW API */ 190112b2b9e3SBartosz Markowski struct wmi_init_cmd_10x { 190212b2b9e3SBartosz Markowski struct wmi_resource_config_10x resource_config; 1903cf9fca8fSMichal Kazior struct wmi_host_mem_chunks mem_chunks; 190412b2b9e3SBartosz Markowski } __packed; 190512b2b9e3SBartosz Markowski 190624c88f78SMichal Kazior struct wmi_init_cmd_10_2 { 190724c88f78SMichal Kazior struct wmi_resource_config_10_2 resource_config; 1908cf9fca8fSMichal Kazior struct wmi_host_mem_chunks mem_chunks; 190924c88f78SMichal Kazior } __packed; 191024c88f78SMichal Kazior 191124c88f78SMichal Kazior struct wmi_chan_list_entry { 191224c88f78SMichal Kazior __le16 freq; 191324c88f78SMichal Kazior u8 phy_mode; /* valid for 10.2 only */ 191424c88f78SMichal Kazior u8 reserved; 191524c88f78SMichal Kazior } __packed; 191624c88f78SMichal Kazior 19175e3dd157SKalle Valo /* TLV for channel list */ 19185e3dd157SKalle Valo struct wmi_chan_list { 19195e3dd157SKalle Valo __le32 tag; /* WMI_CHAN_LIST_TAG */ 19205e3dd157SKalle Valo __le32 num_chan; 192124c88f78SMichal Kazior struct wmi_chan_list_entry channel_list[0]; 19225e3dd157SKalle Valo } __packed; 19235e3dd157SKalle Valo 19245e3dd157SKalle Valo struct wmi_bssid_list { 19255e3dd157SKalle Valo __le32 tag; /* WMI_BSSID_LIST_TAG */ 19265e3dd157SKalle Valo __le32 num_bssid; 19275e3dd157SKalle Valo struct wmi_mac_addr bssid_list[0]; 19285e3dd157SKalle Valo } __packed; 19295e3dd157SKalle Valo 19305e3dd157SKalle Valo struct wmi_ie_data { 19315e3dd157SKalle Valo __le32 tag; /* WMI_IE_TAG */ 19325e3dd157SKalle Valo __le32 ie_len; 19335e3dd157SKalle Valo u8 ie_data[0]; 19345e3dd157SKalle Valo } __packed; 19355e3dd157SKalle Valo 19365e3dd157SKalle Valo struct wmi_ssid { 19375e3dd157SKalle Valo __le32 ssid_len; 19385e3dd157SKalle Valo u8 ssid[32]; 19395e3dd157SKalle Valo } __packed; 19405e3dd157SKalle Valo 19415e3dd157SKalle Valo struct wmi_ssid_list { 19425e3dd157SKalle Valo __le32 tag; /* WMI_SSID_LIST_TAG */ 19435e3dd157SKalle Valo __le32 num_ssids; 19445e3dd157SKalle Valo struct wmi_ssid ssids[0]; 19455e3dd157SKalle Valo } __packed; 19465e3dd157SKalle Valo 19475e3dd157SKalle Valo /* prefix used by scan requestor ids on the host */ 19485e3dd157SKalle Valo #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 19495e3dd157SKalle Valo 19505e3dd157SKalle Valo /* prefix used by scan request ids generated on the host */ 19515e3dd157SKalle Valo /* host cycles through the lower 12 bits to generate ids */ 19525e3dd157SKalle Valo #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 19535e3dd157SKalle Valo 19545e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_SSID 16 19555e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_BSSID 4 19565e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_IE_LEN 256 19575e3dd157SKalle Valo 1958dcca0bdbSMichal Kazior /* Values lower than this may be refused by some firmware revisions with a scan 1959dcca0bdbSMichal Kazior * completion with a timedout reason. 1960dcca0bdbSMichal Kazior */ 1961dcca0bdbSMichal Kazior #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 1962dcca0bdbSMichal Kazior 19635e3dd157SKalle Valo /* Scan priority numbers must be sequential, starting with 0 */ 19645e3dd157SKalle Valo enum wmi_scan_priority { 19655e3dd157SKalle Valo WMI_SCAN_PRIORITY_VERY_LOW = 0, 19665e3dd157SKalle Valo WMI_SCAN_PRIORITY_LOW, 19675e3dd157SKalle Valo WMI_SCAN_PRIORITY_MEDIUM, 19685e3dd157SKalle Valo WMI_SCAN_PRIORITY_HIGH, 19695e3dd157SKalle Valo WMI_SCAN_PRIORITY_VERY_HIGH, 19705e3dd157SKalle Valo WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 19715e3dd157SKalle Valo }; 19725e3dd157SKalle Valo 1973a6aa5da3SMichal Kazior struct wmi_start_scan_common { 19745e3dd157SKalle Valo /* Scan ID */ 19755e3dd157SKalle Valo __le32 scan_id; 19765e3dd157SKalle Valo /* Scan requestor ID */ 19775e3dd157SKalle Valo __le32 scan_req_id; 19785e3dd157SKalle Valo /* VDEV id(interface) that is requesting scan */ 19795e3dd157SKalle Valo __le32 vdev_id; 19805e3dd157SKalle Valo /* Scan Priority, input to scan scheduler */ 19815e3dd157SKalle Valo __le32 scan_priority; 19825e3dd157SKalle Valo /* Scan events subscription */ 19835e3dd157SKalle Valo __le32 notify_scan_events; 19845e3dd157SKalle Valo /* dwell time in msec on active channels */ 19855e3dd157SKalle Valo __le32 dwell_time_active; 19865e3dd157SKalle Valo /* dwell time in msec on passive channels */ 19875e3dd157SKalle Valo __le32 dwell_time_passive; 19885e3dd157SKalle Valo /* 19895e3dd157SKalle Valo * min time in msec on the BSS channel,only valid if atleast one 19905e3dd157SKalle Valo * VDEV is active 19915e3dd157SKalle Valo */ 19925e3dd157SKalle Valo __le32 min_rest_time; 19935e3dd157SKalle Valo /* 19945e3dd157SKalle Valo * max rest time in msec on the BSS channel,only valid if at least 19955e3dd157SKalle Valo * one VDEV is active 19965e3dd157SKalle Valo */ 19975e3dd157SKalle Valo /* 19985e3dd157SKalle Valo * the scanner will rest on the bss channel at least min_rest_time 19995e3dd157SKalle Valo * after min_rest_time the scanner will start checking for tx/rx 20005e3dd157SKalle Valo * activity on all VDEVs. if there is no activity the scanner will 20015e3dd157SKalle Valo * switch to off channel. if there is activity the scanner will let 20025e3dd157SKalle Valo * the radio on the bss channel until max_rest_time expires.at 20035e3dd157SKalle Valo * max_rest_time scanner will switch to off channel irrespective of 20045e3dd157SKalle Valo * activity. activity is determined by the idle_time parameter. 20055e3dd157SKalle Valo */ 20065e3dd157SKalle Valo __le32 max_rest_time; 20075e3dd157SKalle Valo /* 20085e3dd157SKalle Valo * time before sending next set of probe requests. 20095e3dd157SKalle Valo * The scanner keeps repeating probe requests transmission with 20105e3dd157SKalle Valo * period specified by repeat_probe_time. 20115e3dd157SKalle Valo * The number of probe requests specified depends on the ssid_list 20125e3dd157SKalle Valo * and bssid_list 20135e3dd157SKalle Valo */ 20145e3dd157SKalle Valo __le32 repeat_probe_time; 20155e3dd157SKalle Valo /* time in msec between 2 consequetive probe requests with in a set. */ 20165e3dd157SKalle Valo __le32 probe_spacing_time; 20175e3dd157SKalle Valo /* 20185e3dd157SKalle Valo * data inactivity time in msec on bss channel that will be used by 20195e3dd157SKalle Valo * scanner for measuring the inactivity. 20205e3dd157SKalle Valo */ 20215e3dd157SKalle Valo __le32 idle_time; 20225e3dd157SKalle Valo /* maximum time in msec allowed for scan */ 20235e3dd157SKalle Valo __le32 max_scan_time; 20245e3dd157SKalle Valo /* 20255e3dd157SKalle Valo * delay in msec before sending first probe request after switching 20265e3dd157SKalle Valo * to a channel 20275e3dd157SKalle Valo */ 20285e3dd157SKalle Valo __le32 probe_delay; 20295e3dd157SKalle Valo /* Scan control flags */ 20305e3dd157SKalle Valo __le32 scan_ctrl_flags; 2031a6aa5da3SMichal Kazior } __packed; 20325e3dd157SKalle Valo 2033a6aa5da3SMichal Kazior struct wmi_start_scan_tlvs { 2034a6aa5da3SMichal Kazior /* TLV parameters. These includes channel list, ssid list, bssid list, 2035a6aa5da3SMichal Kazior * extra ies. 20365e3dd157SKalle Valo */ 2037a6aa5da3SMichal Kazior u8 tlvs[0]; 2038a6aa5da3SMichal Kazior } __packed; 2039a6aa5da3SMichal Kazior 2040a6aa5da3SMichal Kazior struct wmi_start_scan_cmd { 2041a6aa5da3SMichal Kazior struct wmi_start_scan_common common; 2042a6aa5da3SMichal Kazior __le32 burst_duration_ms; 2043a6aa5da3SMichal Kazior struct wmi_start_scan_tlvs tlvs; 20445e3dd157SKalle Valo } __packed; 20455e3dd157SKalle Valo 204689b7e766SBartosz Markowski /* This is the definition from 10.X firmware branch */ 2047a6aa5da3SMichal Kazior struct wmi_10x_start_scan_cmd { 2048a6aa5da3SMichal Kazior struct wmi_start_scan_common common; 2049a6aa5da3SMichal Kazior struct wmi_start_scan_tlvs tlvs; 205089b7e766SBartosz Markowski } __packed; 205189b7e766SBartosz Markowski 20525e3dd157SKalle Valo struct wmi_ssid_arg { 20535e3dd157SKalle Valo int len; 20545e3dd157SKalle Valo const u8 *ssid; 20555e3dd157SKalle Valo }; 20565e3dd157SKalle Valo 20575e3dd157SKalle Valo struct wmi_bssid_arg { 20585e3dd157SKalle Valo const u8 *bssid; 20595e3dd157SKalle Valo }; 20605e3dd157SKalle Valo 20615e3dd157SKalle Valo struct wmi_start_scan_arg { 20625e3dd157SKalle Valo u32 scan_id; 20635e3dd157SKalle Valo u32 scan_req_id; 20645e3dd157SKalle Valo u32 vdev_id; 20655e3dd157SKalle Valo u32 scan_priority; 20665e3dd157SKalle Valo u32 notify_scan_events; 20675e3dd157SKalle Valo u32 dwell_time_active; 20685e3dd157SKalle Valo u32 dwell_time_passive; 20695e3dd157SKalle Valo u32 min_rest_time; 20705e3dd157SKalle Valo u32 max_rest_time; 20715e3dd157SKalle Valo u32 repeat_probe_time; 20725e3dd157SKalle Valo u32 probe_spacing_time; 20735e3dd157SKalle Valo u32 idle_time; 20745e3dd157SKalle Valo u32 max_scan_time; 20755e3dd157SKalle Valo u32 probe_delay; 20765e3dd157SKalle Valo u32 scan_ctrl_flags; 20775e3dd157SKalle Valo 20785e3dd157SKalle Valo u32 ie_len; 20795e3dd157SKalle Valo u32 n_channels; 20805e3dd157SKalle Valo u32 n_ssids; 20815e3dd157SKalle Valo u32 n_bssids; 20825e3dd157SKalle Valo 20835e3dd157SKalle Valo u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN]; 208424c88f78SMichal Kazior u16 channels[64]; 20855e3dd157SKalle Valo struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID]; 20865e3dd157SKalle Valo struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID]; 20875e3dd157SKalle Valo }; 20885e3dd157SKalle Valo 20895e3dd157SKalle Valo /* scan control flags */ 20905e3dd157SKalle Valo 20915e3dd157SKalle Valo /* passively scan all channels including active channels */ 20925e3dd157SKalle Valo #define WMI_SCAN_FLAG_PASSIVE 0x1 20935e3dd157SKalle Valo /* add wild card ssid probe request even though ssid_list is specified. */ 20945e3dd157SKalle Valo #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 20955e3dd157SKalle Valo /* add cck rates to rates/xrate ie for the generated probe request */ 20965e3dd157SKalle Valo #define WMI_SCAN_ADD_CCK_RATES 0x4 20975e3dd157SKalle Valo /* add ofdm rates to rates/xrate ie for the generated probe request */ 20985e3dd157SKalle Valo #define WMI_SCAN_ADD_OFDM_RATES 0x8 20995e3dd157SKalle Valo /* To enable indication of Chan load and Noise floor to host */ 21005e3dd157SKalle Valo #define WMI_SCAN_CHAN_STAT_EVENT 0x10 21015e3dd157SKalle Valo /* Filter Probe request frames */ 21025e3dd157SKalle Valo #define WMI_SCAN_FILTER_PROBE_REQ 0x20 21035e3dd157SKalle Valo /* When set, DFS channels will not be scanned */ 21045e3dd157SKalle Valo #define WMI_SCAN_BYPASS_DFS_CHN 0x40 21055e3dd157SKalle Valo /* Different FW scan engine may choose to bail out on errors. 21065e3dd157SKalle Valo * Allow the driver to have influence over that. */ 21075e3dd157SKalle Valo #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 21085e3dd157SKalle Valo 21095e3dd157SKalle Valo /* WMI_SCAN_CLASS_MASK must be the same value as IEEE80211_SCAN_CLASS_MASK */ 21105e3dd157SKalle Valo #define WMI_SCAN_CLASS_MASK 0xFF000000 21115e3dd157SKalle Valo 21125e3dd157SKalle Valo enum wmi_stop_scan_type { 21135e3dd157SKalle Valo WMI_SCAN_STOP_ONE = 0x00000000, /* stop by scan_id */ 21145e3dd157SKalle Valo WMI_SCAN_STOP_VDEV_ALL = 0x01000000, /* stop by vdev_id */ 21155e3dd157SKalle Valo WMI_SCAN_STOP_ALL = 0x04000000, /* stop all scans */ 21165e3dd157SKalle Valo }; 21175e3dd157SKalle Valo 21185e3dd157SKalle Valo struct wmi_stop_scan_cmd { 21195e3dd157SKalle Valo __le32 scan_req_id; 21205e3dd157SKalle Valo __le32 scan_id; 21215e3dd157SKalle Valo __le32 req_type; 21225e3dd157SKalle Valo __le32 vdev_id; 21235e3dd157SKalle Valo } __packed; 21245e3dd157SKalle Valo 21255e3dd157SKalle Valo struct wmi_stop_scan_arg { 21265e3dd157SKalle Valo u32 req_id; 21275e3dd157SKalle Valo enum wmi_stop_scan_type req_type; 21285e3dd157SKalle Valo union { 21295e3dd157SKalle Valo u32 scan_id; 21305e3dd157SKalle Valo u32 vdev_id; 21315e3dd157SKalle Valo } u; 21325e3dd157SKalle Valo }; 21335e3dd157SKalle Valo 21345e3dd157SKalle Valo struct wmi_scan_chan_list_cmd { 21355e3dd157SKalle Valo __le32 num_scan_chans; 21365e3dd157SKalle Valo struct wmi_channel chan_info[0]; 21375e3dd157SKalle Valo } __packed; 21385e3dd157SKalle Valo 21395e3dd157SKalle Valo struct wmi_scan_chan_list_arg { 21405e3dd157SKalle Valo u32 n_channels; 21415e3dd157SKalle Valo struct wmi_channel_arg *channels; 21425e3dd157SKalle Valo }; 21435e3dd157SKalle Valo 21445e3dd157SKalle Valo enum wmi_bss_filter { 21455e3dd157SKalle Valo WMI_BSS_FILTER_NONE = 0, /* no beacons forwarded */ 21465e3dd157SKalle Valo WMI_BSS_FILTER_ALL, /* all beacons forwarded */ 21475e3dd157SKalle Valo WMI_BSS_FILTER_PROFILE, /* only beacons matching profile */ 21485e3dd157SKalle Valo WMI_BSS_FILTER_ALL_BUT_PROFILE, /* all but beacons matching profile */ 21495e3dd157SKalle Valo WMI_BSS_FILTER_CURRENT_BSS, /* only beacons matching current BSS */ 21505e3dd157SKalle Valo WMI_BSS_FILTER_ALL_BUT_BSS, /* all but beacons matching BSS */ 21515e3dd157SKalle Valo WMI_BSS_FILTER_PROBED_SSID, /* beacons matching probed ssid */ 21525e3dd157SKalle Valo WMI_BSS_FILTER_LAST_BSS, /* marker only */ 21535e3dd157SKalle Valo }; 21545e3dd157SKalle Valo 21555e3dd157SKalle Valo enum wmi_scan_event_type { 21565e3dd157SKalle Valo WMI_SCAN_EVENT_STARTED = 0x1, 21575e3dd157SKalle Valo WMI_SCAN_EVENT_COMPLETED = 0x2, 21585e3dd157SKalle Valo WMI_SCAN_EVENT_BSS_CHANNEL = 0x4, 21595e3dd157SKalle Valo WMI_SCAN_EVENT_FOREIGN_CHANNEL = 0x8, 21605e3dd157SKalle Valo WMI_SCAN_EVENT_DEQUEUED = 0x10, 21615e3dd157SKalle Valo WMI_SCAN_EVENT_PREEMPTED = 0x20, /* possibly by high-prio scan */ 21625e3dd157SKalle Valo WMI_SCAN_EVENT_START_FAILED = 0x40, 21635e3dd157SKalle Valo WMI_SCAN_EVENT_RESTARTED = 0x80, 21645e3dd157SKalle Valo WMI_SCAN_EVENT_MAX = 0x8000 21655e3dd157SKalle Valo }; 21665e3dd157SKalle Valo 21675e3dd157SKalle Valo enum wmi_scan_completion_reason { 21685e3dd157SKalle Valo WMI_SCAN_REASON_COMPLETED, 21695e3dd157SKalle Valo WMI_SCAN_REASON_CANCELLED, 21705e3dd157SKalle Valo WMI_SCAN_REASON_PREEMPTED, 21715e3dd157SKalle Valo WMI_SCAN_REASON_TIMEDOUT, 21725e3dd157SKalle Valo WMI_SCAN_REASON_MAX, 21735e3dd157SKalle Valo }; 21745e3dd157SKalle Valo 21755e3dd157SKalle Valo struct wmi_scan_event { 21765e3dd157SKalle Valo __le32 event_type; /* %WMI_SCAN_EVENT_ */ 21775e3dd157SKalle Valo __le32 reason; /* %WMI_SCAN_REASON_ */ 21785e3dd157SKalle Valo __le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 21795e3dd157SKalle Valo __le32 scan_req_id; 21805e3dd157SKalle Valo __le32 scan_id; 21815e3dd157SKalle Valo __le32 vdev_id; 21825e3dd157SKalle Valo } __packed; 21835e3dd157SKalle Valo 21845e3dd157SKalle Valo /* 21855e3dd157SKalle Valo * This defines how much headroom is kept in the 21865e3dd157SKalle Valo * receive frame between the descriptor and the 21875e3dd157SKalle Valo * payload, in order for the WMI PHY error and 21885e3dd157SKalle Valo * management handler to insert header contents. 21895e3dd157SKalle Valo * 21905e3dd157SKalle Valo * This is in bytes. 21915e3dd157SKalle Valo */ 21925e3dd157SKalle Valo #define WMI_MGMT_RX_HDR_HEADROOM 52 21935e3dd157SKalle Valo 21945e3dd157SKalle Valo /* 21955e3dd157SKalle Valo * This event will be used for sending scan results 21965e3dd157SKalle Valo * as well as rx mgmt frames to the host. The rx buffer 21975e3dd157SKalle Valo * will be sent as part of this WMI event. It would be a 21985e3dd157SKalle Valo * good idea to pass all the fields in the RX status 21995e3dd157SKalle Valo * descriptor up to the host. 22005e3dd157SKalle Valo */ 22010d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v1 { 22025e3dd157SKalle Valo __le32 channel; 22035e3dd157SKalle Valo __le32 snr; 22045e3dd157SKalle Valo __le32 rate; 22055e3dd157SKalle Valo __le32 phy_mode; 22065e3dd157SKalle Valo __le32 buf_len; 22075e3dd157SKalle Valo __le32 status; /* %WMI_RX_STATUS_ */ 22085e3dd157SKalle Valo } __packed; 22095e3dd157SKalle Valo 22100d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v2 { 22110d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v1 v1; 22120d9b0438SMichal Kazior __le32 rssi_ctl[4]; 22130d9b0438SMichal Kazior } __packed; 22140d9b0438SMichal Kazior 22150d9b0438SMichal Kazior struct wmi_mgmt_rx_event_v1 { 22160d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v1 hdr; 22170d9b0438SMichal Kazior u8 buf[0]; 22180d9b0438SMichal Kazior } __packed; 22190d9b0438SMichal Kazior 22200d9b0438SMichal Kazior struct wmi_mgmt_rx_event_v2 { 22210d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v2 hdr; 22225e3dd157SKalle Valo u8 buf[0]; 22235e3dd157SKalle Valo } __packed; 22245e3dd157SKalle Valo 22255e3dd157SKalle Valo #define WMI_RX_STATUS_OK 0x00 22265e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_CRC 0x01 22275e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_DECRYPT 0x08 22285e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_MIC 0x10 22295e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 22305e3dd157SKalle Valo 22319702c686SJanusz Dziedzic #define PHY_ERROR_SPECTRAL_SCAN 0x26 22329702c686SJanusz Dziedzic #define PHY_ERROR_FALSE_RADAR_EXT 0x24 22339702c686SJanusz Dziedzic #define PHY_ERROR_RADAR 0x05 22349702c686SJanusz Dziedzic 22352332d0aeSMichal Kazior struct wmi_phyerr { 22365e3dd157SKalle Valo __le32 tsf_timestamp; 22375e3dd157SKalle Valo __le16 freq1; 22385e3dd157SKalle Valo __le16 freq2; 22395e3dd157SKalle Valo u8 rssi_combined; 22405e3dd157SKalle Valo u8 chan_width_mhz; 22415e3dd157SKalle Valo u8 phy_err_code; 22425e3dd157SKalle Valo u8 rsvd0; 22432332d0aeSMichal Kazior __le32 rssi_chains[4]; 22442332d0aeSMichal Kazior __le16 nf_chains[4]; 22455e3dd157SKalle Valo __le32 buf_len; 22462332d0aeSMichal Kazior u8 buf[0]; 22475e3dd157SKalle Valo } __packed; 22485e3dd157SKalle Valo 22492332d0aeSMichal Kazior struct wmi_phyerr_event { 22502332d0aeSMichal Kazior __le32 num_phyerrs; 22515e3dd157SKalle Valo __le32 tsf_l32; 22525e3dd157SKalle Valo __le32 tsf_u32; 22532332d0aeSMichal Kazior struct wmi_phyerr phyerrs[0]; 22545e3dd157SKalle Valo } __packed; 22555e3dd157SKalle Valo 22569702c686SJanusz Dziedzic #define PHYERR_TLV_SIG 0xBB 22579702c686SJanusz Dziedzic #define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB 22589702c686SJanusz Dziedzic #define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8 2259855aed12SSimon Wunderlich #define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT 0xF9 22609702c686SJanusz Dziedzic 22619702c686SJanusz Dziedzic struct phyerr_radar_report { 22629702c686SJanusz Dziedzic __le32 reg0; /* RADAR_REPORT_REG0_* */ 22639702c686SJanusz Dziedzic __le32 reg1; /* REDAR_REPORT_REG1_* */ 22649702c686SJanusz Dziedzic } __packed; 22659702c686SJanusz Dziedzic 22669702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000 22679702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31 22689702c686SJanusz Dziedzic 22699702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000 22709702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30 22719702c686SJanusz Dziedzic 22729702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000 22739702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20 22749702c686SJanusz Dziedzic 22759702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000 22769702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16 22779702c686SJanusz Dziedzic 22789702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00 22799702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10 22809702c686SJanusz Dziedzic 22819702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF 22829702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0 22839702c686SJanusz Dziedzic 22849702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000 22859702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31 22869702c686SJanusz Dziedzic 22879702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000 22889702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24 22899702c686SJanusz Dziedzic 22909702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000 22919702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16 22929702c686SJanusz Dziedzic 22939702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00 22949702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8 22959702c686SJanusz Dziedzic 22969702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF 22979702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_DUR_LSB 0 22989702c686SJanusz Dziedzic 22999702c686SJanusz Dziedzic struct phyerr_fft_report { 23009702c686SJanusz Dziedzic __le32 reg0; /* SEARCH_FFT_REPORT_REG0_ * */ 23019702c686SJanusz Dziedzic __le32 reg1; /* SEARCH_FFT_REPORT_REG1_ * */ 23029702c686SJanusz Dziedzic } __packed; 23039702c686SJanusz Dziedzic 23049702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000 23059702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23 23069702c686SJanusz Dziedzic 23079702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000 23089702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14 23099702c686SJanusz Dziedzic 23109702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000 23119702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12 23129702c686SJanusz Dziedzic 23139702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF 23149702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0 23159702c686SJanusz Dziedzic 23169702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000 23179702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26 23189702c686SJanusz Dziedzic 23199702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000 23209702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18 23219702c686SJanusz Dziedzic 23229702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00 23239702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8 23249702c686SJanusz Dziedzic 23259702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF 23269702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0 23279702c686SJanusz Dziedzic 23289702c686SJanusz Dziedzic struct phyerr_tlv { 23299702c686SJanusz Dziedzic __le16 len; 23309702c686SJanusz Dziedzic u8 tag; 23319702c686SJanusz Dziedzic u8 sig; 23329702c686SJanusz Dziedzic } __packed; 23339702c686SJanusz Dziedzic 23349702c686SJanusz Dziedzic #define DFS_RSSI_POSSIBLY_FALSE 50 23359702c686SJanusz Dziedzic #define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40 23369702c686SJanusz Dziedzic 23375e3dd157SKalle Valo struct wmi_mgmt_tx_hdr { 23385e3dd157SKalle Valo __le32 vdev_id; 23395e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 23405e3dd157SKalle Valo __le32 tx_rate; 23415e3dd157SKalle Valo __le32 tx_power; 23425e3dd157SKalle Valo __le32 buf_len; 23435e3dd157SKalle Valo } __packed; 23445e3dd157SKalle Valo 23455e3dd157SKalle Valo struct wmi_mgmt_tx_cmd { 23465e3dd157SKalle Valo struct wmi_mgmt_tx_hdr hdr; 23475e3dd157SKalle Valo u8 buf[0]; 23485e3dd157SKalle Valo } __packed; 23495e3dd157SKalle Valo 23505e3dd157SKalle Valo struct wmi_echo_event { 23515e3dd157SKalle Valo __le32 value; 23525e3dd157SKalle Valo } __packed; 23535e3dd157SKalle Valo 23545e3dd157SKalle Valo struct wmi_echo_cmd { 23555e3dd157SKalle Valo __le32 value; 23565e3dd157SKalle Valo } __packed; 23575e3dd157SKalle Valo 23585e3dd157SKalle Valo struct wmi_pdev_set_regdomain_cmd { 23595e3dd157SKalle Valo __le32 reg_domain; 23605e3dd157SKalle Valo __le32 reg_domain_2G; 23615e3dd157SKalle Valo __le32 reg_domain_5G; 23625e3dd157SKalle Valo __le32 conformance_test_limit_2G; 23635e3dd157SKalle Valo __le32 conformance_test_limit_5G; 23645e3dd157SKalle Valo } __packed; 23655e3dd157SKalle Valo 2366821af6aeSMarek Puzyniak enum wmi_dfs_region { 2367821af6aeSMarek Puzyniak /* Uninitialized dfs domain */ 2368821af6aeSMarek Puzyniak WMI_UNINIT_DFS_DOMAIN = 0, 2369821af6aeSMarek Puzyniak 2370821af6aeSMarek Puzyniak /* FCC3 dfs domain */ 2371821af6aeSMarek Puzyniak WMI_FCC_DFS_DOMAIN = 1, 2372821af6aeSMarek Puzyniak 2373821af6aeSMarek Puzyniak /* ETSI dfs domain */ 2374821af6aeSMarek Puzyniak WMI_ETSI_DFS_DOMAIN = 2, 2375821af6aeSMarek Puzyniak 2376821af6aeSMarek Puzyniak /*Japan dfs domain */ 2377821af6aeSMarek Puzyniak WMI_MKK4_DFS_DOMAIN = 3, 2378821af6aeSMarek Puzyniak }; 2379821af6aeSMarek Puzyniak 2380821af6aeSMarek Puzyniak struct wmi_pdev_set_regdomain_cmd_10x { 2381821af6aeSMarek Puzyniak __le32 reg_domain; 2382821af6aeSMarek Puzyniak __le32 reg_domain_2G; 2383821af6aeSMarek Puzyniak __le32 reg_domain_5G; 2384821af6aeSMarek Puzyniak __le32 conformance_test_limit_2G; 2385821af6aeSMarek Puzyniak __le32 conformance_test_limit_5G; 2386821af6aeSMarek Puzyniak 2387821af6aeSMarek Puzyniak /* dfs domain from wmi_dfs_region */ 2388821af6aeSMarek Puzyniak __le32 dfs_domain; 2389821af6aeSMarek Puzyniak } __packed; 2390821af6aeSMarek Puzyniak 23915e3dd157SKalle Valo /* Command to set/unset chip in quiet mode */ 23925e3dd157SKalle Valo struct wmi_pdev_set_quiet_cmd { 23935e3dd157SKalle Valo /* period in TUs */ 23945e3dd157SKalle Valo __le32 period; 23955e3dd157SKalle Valo 23965e3dd157SKalle Valo /* duration in TUs */ 23975e3dd157SKalle Valo __le32 duration; 23985e3dd157SKalle Valo 23995e3dd157SKalle Valo /* offset in TUs */ 24005e3dd157SKalle Valo __le32 next_start; 24015e3dd157SKalle Valo 24025e3dd157SKalle Valo /* enable/disable */ 24035e3dd157SKalle Valo __le32 enabled; 24045e3dd157SKalle Valo } __packed; 24055e3dd157SKalle Valo 24065e3dd157SKalle Valo /* 24075e3dd157SKalle Valo * 802.11g protection mode. 24085e3dd157SKalle Valo */ 24095e3dd157SKalle Valo enum ath10k_protmode { 24105e3dd157SKalle Valo ATH10K_PROT_NONE = 0, /* no protection */ 24115e3dd157SKalle Valo ATH10K_PROT_CTSONLY = 1, /* CTS to self */ 24125e3dd157SKalle Valo ATH10K_PROT_RTSCTS = 2, /* RTS-CTS */ 24135e3dd157SKalle Valo }; 24145e3dd157SKalle Valo 2415e81bd104SMarek Kwaczynski enum wmi_rtscts_profile { 2416e81bd104SMarek Kwaczynski WMI_RTSCTS_FOR_NO_RATESERIES = 0, 2417e81bd104SMarek Kwaczynski WMI_RTSCTS_FOR_SECOND_RATESERIES, 2418e81bd104SMarek Kwaczynski WMI_RTSCTS_ACROSS_SW_RETRIES 2419e81bd104SMarek Kwaczynski }; 2420e81bd104SMarek Kwaczynski 2421e81bd104SMarek Kwaczynski #define WMI_RTSCTS_ENABLED 1 2422e81bd104SMarek Kwaczynski #define WMI_RTSCTS_SET_MASK 0x0f 2423e81bd104SMarek Kwaczynski #define WMI_RTSCTS_SET_LSB 0 2424e81bd104SMarek Kwaczynski 2425e81bd104SMarek Kwaczynski #define WMI_RTSCTS_PROFILE_MASK 0xf0 2426e81bd104SMarek Kwaczynski #define WMI_RTSCTS_PROFILE_LSB 4 2427e81bd104SMarek Kwaczynski 24285e3dd157SKalle Valo enum wmi_beacon_gen_mode { 24295e3dd157SKalle Valo WMI_BEACON_STAGGERED_MODE = 0, 24305e3dd157SKalle Valo WMI_BEACON_BURST_MODE = 1 24315e3dd157SKalle Valo }; 24325e3dd157SKalle Valo 24335e3dd157SKalle Valo enum wmi_csa_event_ies_present_flag { 24345e3dd157SKalle Valo WMI_CSA_IE_PRESENT = 0x00000001, 24355e3dd157SKalle Valo WMI_XCSA_IE_PRESENT = 0x00000002, 24365e3dd157SKalle Valo WMI_WBW_IE_PRESENT = 0x00000004, 24375e3dd157SKalle Valo WMI_CSWARP_IE_PRESENT = 0x00000008, 24385e3dd157SKalle Valo }; 24395e3dd157SKalle Valo 24405e3dd157SKalle Valo /* wmi CSA receive event from beacon frame */ 24415e3dd157SKalle Valo struct wmi_csa_event { 24425e3dd157SKalle Valo __le32 i_fc_dur; 24435e3dd157SKalle Valo /* Bit 0-15: FC */ 24445e3dd157SKalle Valo /* Bit 16-31: DUR */ 24455e3dd157SKalle Valo struct wmi_mac_addr i_addr1; 24465e3dd157SKalle Valo struct wmi_mac_addr i_addr2; 24475e3dd157SKalle Valo __le32 csa_ie[2]; 24485e3dd157SKalle Valo __le32 xcsa_ie[2]; 24495e3dd157SKalle Valo __le32 wb_ie[2]; 24505e3dd157SKalle Valo __le32 cswarp_ie; 24515e3dd157SKalle Valo __le32 ies_present_flag; /* wmi_csa_event_ies_present_flag */ 24525e3dd157SKalle Valo } __packed; 24535e3dd157SKalle Valo 24545e3dd157SKalle Valo /* the definition of different PDEV parameters */ 24555e3dd157SKalle Valo #define PDEV_DEFAULT_STATS_UPDATE_PERIOD 500 24565e3dd157SKalle Valo #define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500 24575e3dd157SKalle Valo #define PEER_DEFAULT_STATS_UPDATE_PERIOD 500 24585e3dd157SKalle Valo 2459226a339bSBartosz Markowski struct wmi_pdev_param_map { 2460226a339bSBartosz Markowski u32 tx_chain_mask; 2461226a339bSBartosz Markowski u32 rx_chain_mask; 2462226a339bSBartosz Markowski u32 txpower_limit2g; 2463226a339bSBartosz Markowski u32 txpower_limit5g; 2464226a339bSBartosz Markowski u32 txpower_scale; 2465226a339bSBartosz Markowski u32 beacon_gen_mode; 2466226a339bSBartosz Markowski u32 beacon_tx_mode; 2467226a339bSBartosz Markowski u32 resmgr_offchan_mode; 2468226a339bSBartosz Markowski u32 protection_mode; 2469226a339bSBartosz Markowski u32 dynamic_bw; 2470226a339bSBartosz Markowski u32 non_agg_sw_retry_th; 2471226a339bSBartosz Markowski u32 agg_sw_retry_th; 2472226a339bSBartosz Markowski u32 sta_kickout_th; 2473226a339bSBartosz Markowski u32 ac_aggrsize_scaling; 2474226a339bSBartosz Markowski u32 ltr_enable; 2475226a339bSBartosz Markowski u32 ltr_ac_latency_be; 2476226a339bSBartosz Markowski u32 ltr_ac_latency_bk; 2477226a339bSBartosz Markowski u32 ltr_ac_latency_vi; 2478226a339bSBartosz Markowski u32 ltr_ac_latency_vo; 2479226a339bSBartosz Markowski u32 ltr_ac_latency_timeout; 2480226a339bSBartosz Markowski u32 ltr_sleep_override; 2481226a339bSBartosz Markowski u32 ltr_rx_override; 2482226a339bSBartosz Markowski u32 ltr_tx_activity_timeout; 2483226a339bSBartosz Markowski u32 l1ss_enable; 2484226a339bSBartosz Markowski u32 dsleep_enable; 2485226a339bSBartosz Markowski u32 pcielp_txbuf_flush; 2486226a339bSBartosz Markowski u32 pcielp_txbuf_watermark; 2487226a339bSBartosz Markowski u32 pcielp_txbuf_tmo_en; 2488226a339bSBartosz Markowski u32 pcielp_txbuf_tmo_value; 2489226a339bSBartosz Markowski u32 pdev_stats_update_period; 2490226a339bSBartosz Markowski u32 vdev_stats_update_period; 2491226a339bSBartosz Markowski u32 peer_stats_update_period; 2492226a339bSBartosz Markowski u32 bcnflt_stats_update_period; 2493226a339bSBartosz Markowski u32 pmf_qos; 2494226a339bSBartosz Markowski u32 arp_ac_override; 2495226a339bSBartosz Markowski u32 dcs; 2496226a339bSBartosz Markowski u32 ani_enable; 2497226a339bSBartosz Markowski u32 ani_poll_period; 2498226a339bSBartosz Markowski u32 ani_listen_period; 2499226a339bSBartosz Markowski u32 ani_ofdm_level; 2500226a339bSBartosz Markowski u32 ani_cck_level; 2501226a339bSBartosz Markowski u32 dyntxchain; 2502226a339bSBartosz Markowski u32 proxy_sta; 2503226a339bSBartosz Markowski u32 idle_ps_config; 2504226a339bSBartosz Markowski u32 power_gating_sleep; 2505226a339bSBartosz Markowski u32 fast_channel_reset; 2506226a339bSBartosz Markowski u32 burst_dur; 2507226a339bSBartosz Markowski u32 burst_enable; 2508226a339bSBartosz Markowski }; 2509226a339bSBartosz Markowski 2510226a339bSBartosz Markowski #define WMI_PDEV_PARAM_UNSUPPORTED 0 2511226a339bSBartosz Markowski 25125e3dd157SKalle Valo enum wmi_pdev_param { 2513d0e0a552SBen Greear /* TX chain mask */ 25145e3dd157SKalle Valo WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 2515d0e0a552SBen Greear /* RX chain mask */ 25165e3dd157SKalle Valo WMI_PDEV_PARAM_RX_CHAIN_MASK, 25175e3dd157SKalle Valo /* TX power limit for 2G Radio */ 25185e3dd157SKalle Valo WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 25195e3dd157SKalle Valo /* TX power limit for 5G Radio */ 25205e3dd157SKalle Valo WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 25215e3dd157SKalle Valo /* TX power scale */ 25225e3dd157SKalle Valo WMI_PDEV_PARAM_TXPOWER_SCALE, 25235e3dd157SKalle Valo /* Beacon generation mode . 0: host, 1: target */ 25245e3dd157SKalle Valo WMI_PDEV_PARAM_BEACON_GEN_MODE, 25255e3dd157SKalle Valo /* Beacon generation mode . 0: staggered 1: bursted */ 25265e3dd157SKalle Valo WMI_PDEV_PARAM_BEACON_TX_MODE, 25275e3dd157SKalle Valo /* 25285e3dd157SKalle Valo * Resource manager off chan mode . 25295e3dd157SKalle Valo * 0: turn off off chan mode. 1: turn on offchan mode 25305e3dd157SKalle Valo */ 25315e3dd157SKalle Valo WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 25325e3dd157SKalle Valo /* 25335e3dd157SKalle Valo * Protection mode: 25345e3dd157SKalle Valo * 0: no protection 1:use CTS-to-self 2: use RTS/CTS 25355e3dd157SKalle Valo */ 25365e3dd157SKalle Valo WMI_PDEV_PARAM_PROTECTION_MODE, 2537c4dd0d01SMichal Kazior /* 2538c4dd0d01SMichal Kazior * Dynamic bandwidth - 0: disable, 1: enable 2539c4dd0d01SMichal Kazior * 2540c4dd0d01SMichal Kazior * When enabled HW rate control tries different bandwidths when 2541c4dd0d01SMichal Kazior * retransmitting frames. 2542c4dd0d01SMichal Kazior */ 25435e3dd157SKalle Valo WMI_PDEV_PARAM_DYNAMIC_BW, 25445e3dd157SKalle Valo /* Non aggregrate/ 11g sw retry threshold.0-disable */ 25455e3dd157SKalle Valo WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 25465e3dd157SKalle Valo /* aggregrate sw retry threshold. 0-disable*/ 25475e3dd157SKalle Valo WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 25485e3dd157SKalle Valo /* Station kickout threshold (non of consecutive failures).0-disable */ 25495e3dd157SKalle Valo WMI_PDEV_PARAM_STA_KICKOUT_TH, 25505e3dd157SKalle Valo /* Aggerate size scaling configuration per AC */ 25515e3dd157SKalle Valo WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 25525e3dd157SKalle Valo /* LTR enable */ 25535e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_ENABLE, 25545e3dd157SKalle Valo /* LTR latency for BE, in us */ 25555e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 25565e3dd157SKalle Valo /* LTR latency for BK, in us */ 25575e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 25585e3dd157SKalle Valo /* LTR latency for VI, in us */ 25595e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 25605e3dd157SKalle Valo /* LTR latency for VO, in us */ 25615e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 25625e3dd157SKalle Valo /* LTR AC latency timeout, in ms */ 25635e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 25645e3dd157SKalle Valo /* LTR platform latency override, in us */ 25655e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 25665e3dd157SKalle Valo /* LTR-RX override, in us */ 25675e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 25685e3dd157SKalle Valo /* Tx activity timeout for LTR, in us */ 25695e3dd157SKalle Valo WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 25705e3dd157SKalle Valo /* L1SS state machine enable */ 25715e3dd157SKalle Valo WMI_PDEV_PARAM_L1SS_ENABLE, 25725e3dd157SKalle Valo /* Deep sleep state machine enable */ 25735e3dd157SKalle Valo WMI_PDEV_PARAM_DSLEEP_ENABLE, 25745e3dd157SKalle Valo /* RX buffering flush enable */ 25755e3dd157SKalle Valo WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 25765e3dd157SKalle Valo /* RX buffering matermark */ 25775e3dd157SKalle Valo WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 25785e3dd157SKalle Valo /* RX buffering timeout enable */ 25795e3dd157SKalle Valo WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 25805e3dd157SKalle Valo /* RX buffering timeout value */ 25815e3dd157SKalle Valo WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 25825e3dd157SKalle Valo /* pdev level stats update period in ms */ 25835e3dd157SKalle Valo WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 25845e3dd157SKalle Valo /* vdev level stats update period in ms */ 25855e3dd157SKalle Valo WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 25865e3dd157SKalle Valo /* peer level stats update period in ms */ 25875e3dd157SKalle Valo WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 25885e3dd157SKalle Valo /* beacon filter status update period */ 25895e3dd157SKalle Valo WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 25905e3dd157SKalle Valo /* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */ 25915e3dd157SKalle Valo WMI_PDEV_PARAM_PMF_QOS, 25925e3dd157SKalle Valo /* Access category on which ARP frames are sent */ 25935e3dd157SKalle Valo WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 25945e3dd157SKalle Valo /* DCS configuration */ 25955e3dd157SKalle Valo WMI_PDEV_PARAM_DCS, 25965e3dd157SKalle Valo /* Enable/Disable ANI on target */ 25975e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_ENABLE, 25985e3dd157SKalle Valo /* configure the ANI polling period */ 25995e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_POLL_PERIOD, 26005e3dd157SKalle Valo /* configure the ANI listening period */ 26015e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 26025e3dd157SKalle Valo /* configure OFDM immunity level */ 26035e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 26045e3dd157SKalle Valo /* configure CCK immunity level */ 26055e3dd157SKalle Valo WMI_PDEV_PARAM_ANI_CCK_LEVEL, 26065e3dd157SKalle Valo /* Enable/Disable CDD for 1x1 STAs in rate control module */ 26075e3dd157SKalle Valo WMI_PDEV_PARAM_DYNTXCHAIN, 26085e3dd157SKalle Valo /* Enable/Disable proxy STA */ 26095e3dd157SKalle Valo WMI_PDEV_PARAM_PROXY_STA, 26105e3dd157SKalle Valo /* Enable/Disable low power state when all VDEVs are inactive/idle. */ 26115e3dd157SKalle Valo WMI_PDEV_PARAM_IDLE_PS_CONFIG, 26125e3dd157SKalle Valo /* Enable/Disable power gating sleep */ 26135e3dd157SKalle Valo WMI_PDEV_PARAM_POWER_GATING_SLEEP, 26145e3dd157SKalle Valo }; 26155e3dd157SKalle Valo 2616226a339bSBartosz Markowski enum wmi_10x_pdev_param { 2617226a339bSBartosz Markowski /* TX chian mask */ 2618226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 2619226a339bSBartosz Markowski /* RX chian mask */ 2620226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, 2621226a339bSBartosz Markowski /* TX power limit for 2G Radio */ 2622226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, 2623226a339bSBartosz Markowski /* TX power limit for 5G Radio */ 2624226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, 2625226a339bSBartosz Markowski /* TX power scale */ 2626226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_TXPOWER_SCALE, 2627226a339bSBartosz Markowski /* Beacon generation mode . 0: host, 1: target */ 2628226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, 2629226a339bSBartosz Markowski /* Beacon generation mode . 0: staggered 1: bursted */ 2630226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BEACON_TX_MODE, 2631226a339bSBartosz Markowski /* 2632226a339bSBartosz Markowski * Resource manager off chan mode . 2633226a339bSBartosz Markowski * 0: turn off off chan mode. 1: turn on offchan mode 2634226a339bSBartosz Markowski */ 2635226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 2636226a339bSBartosz Markowski /* 2637226a339bSBartosz Markowski * Protection mode: 2638226a339bSBartosz Markowski * 0: no protection 1:use CTS-to-self 2: use RTS/CTS 2639226a339bSBartosz Markowski */ 2640226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_PROTECTION_MODE, 2641226a339bSBartosz Markowski /* Dynamic bandwidth 0: disable 1: enable */ 2642226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_DYNAMIC_BW, 2643226a339bSBartosz Markowski /* Non aggregrate/ 11g sw retry threshold.0-disable */ 2644226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 2645226a339bSBartosz Markowski /* aggregrate sw retry threshold. 0-disable*/ 2646226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, 2647226a339bSBartosz Markowski /* Station kickout threshold (non of consecutive failures).0-disable */ 2648226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, 2649226a339bSBartosz Markowski /* Aggerate size scaling configuration per AC */ 2650226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, 2651226a339bSBartosz Markowski /* LTR enable */ 2652226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_ENABLE, 2653226a339bSBartosz Markowski /* LTR latency for BE, in us */ 2654226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, 2655226a339bSBartosz Markowski /* LTR latency for BK, in us */ 2656226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, 2657226a339bSBartosz Markowski /* LTR latency for VI, in us */ 2658226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, 2659226a339bSBartosz Markowski /* LTR latency for VO, in us */ 2660226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, 2661226a339bSBartosz Markowski /* LTR AC latency timeout, in ms */ 2662226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 2663226a339bSBartosz Markowski /* LTR platform latency override, in us */ 2664226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 2665226a339bSBartosz Markowski /* LTR-RX override, in us */ 2666226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, 2667226a339bSBartosz Markowski /* Tx activity timeout for LTR, in us */ 2668226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 2669226a339bSBartosz Markowski /* L1SS state machine enable */ 2670226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_L1SS_ENABLE, 2671226a339bSBartosz Markowski /* Deep sleep state machine enable */ 2672226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, 2673226a339bSBartosz Markowski /* pdev level stats update period in ms */ 2674226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 2675226a339bSBartosz Markowski /* vdev level stats update period in ms */ 2676226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 2677226a339bSBartosz Markowski /* peer level stats update period in ms */ 2678226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 2679226a339bSBartosz Markowski /* beacon filter status update period */ 2680226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 2681226a339bSBartosz Markowski /* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */ 2682226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_PMF_QOS, 2683226a339bSBartosz Markowski /* Access category on which ARP and DHCP frames are sent */ 2684226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, 2685226a339bSBartosz Markowski /* DCS configuration */ 2686226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_DCS, 2687226a339bSBartosz Markowski /* Enable/Disable ANI on target */ 2688226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_ENABLE, 2689226a339bSBartosz Markowski /* configure the ANI polling period */ 2690226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, 2691226a339bSBartosz Markowski /* configure the ANI listening period */ 2692226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, 2693226a339bSBartosz Markowski /* configure OFDM immunity level */ 2694226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, 2695226a339bSBartosz Markowski /* configure CCK immunity level */ 2696226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, 2697226a339bSBartosz Markowski /* Enable/Disable CDD for 1x1 STAs in rate control module */ 2698226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_DYNTXCHAIN, 2699226a339bSBartosz Markowski /* Enable/Disable Fast channel reset*/ 2700226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, 2701226a339bSBartosz Markowski /* Set Bursting DUR */ 2702226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BURST_DUR, 2703226a339bSBartosz Markowski /* Set Bursting Enable*/ 2704226a339bSBartosz Markowski WMI_10X_PDEV_PARAM_BURST_ENABLE, 270524c88f78SMichal Kazior 270624c88f78SMichal Kazior /* following are available as of firmware 10.2 */ 270724c88f78SMichal Kazior WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 270824c88f78SMichal Kazior WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE, 270924c88f78SMichal Kazior WMI_10X_PDEV_PARAM_IGMPMLD_TID, 271024c88f78SMichal Kazior WMI_10X_PDEV_PARAM_ANTENNA_GAIN, 271124c88f78SMichal Kazior WMI_10X_PDEV_PARAM_RX_DECAP_MODE, 271224c88f78SMichal Kazior WMI_10X_PDEV_PARAM_RX_FILTER, 271324c88f78SMichal Kazior WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID, 271424c88f78SMichal Kazior WMI_10X_PDEV_PARAM_PROXY_STA_MODE, 271524c88f78SMichal Kazior WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE, 271624c88f78SMichal Kazior WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 271724c88f78SMichal Kazior WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 2718226a339bSBartosz Markowski }; 2719226a339bSBartosz Markowski 27205e3dd157SKalle Valo struct wmi_pdev_set_param_cmd { 27215e3dd157SKalle Valo __le32 param_id; 27225e3dd157SKalle Valo __le32 param_value; 27235e3dd157SKalle Valo } __packed; 27245e3dd157SKalle Valo 27255e3dd157SKalle Valo struct wmi_pdev_get_tpc_config_cmd { 27265e3dd157SKalle Valo /* parameter */ 27275e3dd157SKalle Valo __le32 param; 27285e3dd157SKalle Valo } __packed; 27295e3dd157SKalle Valo 27305e3dd157SKalle Valo #define WMI_TPC_RATE_MAX 160 27315e3dd157SKalle Valo #define WMI_TPC_TX_N_CHAIN 4 27325e3dd157SKalle Valo 27335e3dd157SKalle Valo enum wmi_tpc_config_event_flag { 27345e3dd157SKalle Valo WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1, 27355e3dd157SKalle Valo WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2, 27365e3dd157SKalle Valo WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4, 27375e3dd157SKalle Valo }; 27385e3dd157SKalle Valo 27395e3dd157SKalle Valo struct wmi_pdev_tpc_config_event { 27405e3dd157SKalle Valo __le32 reg_domain; 27415e3dd157SKalle Valo __le32 chan_freq; 27425e3dd157SKalle Valo __le32 phy_mode; 27435e3dd157SKalle Valo __le32 twice_antenna_reduction; 27445e3dd157SKalle Valo __le32 twice_max_rd_power; 27455e3dd157SKalle Valo s32 twice_antenna_gain; 27465e3dd157SKalle Valo __le32 power_limit; 27475e3dd157SKalle Valo __le32 rate_max; 27485e3dd157SKalle Valo __le32 num_tx_chain; 27495e3dd157SKalle Valo __le32 ctl; 27505e3dd157SKalle Valo __le32 flags; 27515e3dd157SKalle Valo s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN]; 27525e3dd157SKalle Valo s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN]; 27535e3dd157SKalle Valo s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN]; 27545e3dd157SKalle Valo s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN]; 27555e3dd157SKalle Valo u8 rates_array[WMI_TPC_RATE_MAX]; 27565e3dd157SKalle Valo } __packed; 27575e3dd157SKalle Valo 27585e3dd157SKalle Valo /* Transmit power scale factor. */ 27595e3dd157SKalle Valo enum wmi_tp_scale { 27605e3dd157SKalle Valo WMI_TP_SCALE_MAX = 0, /* no scaling (default) */ 27615e3dd157SKalle Valo WMI_TP_SCALE_50 = 1, /* 50% of max (-3 dBm) */ 27625e3dd157SKalle Valo WMI_TP_SCALE_25 = 2, /* 25% of max (-6 dBm) */ 27635e3dd157SKalle Valo WMI_TP_SCALE_12 = 3, /* 12% of max (-9 dBm) */ 27645e3dd157SKalle Valo WMI_TP_SCALE_MIN = 4, /* min, but still on */ 27655e3dd157SKalle Valo WMI_TP_SCALE_SIZE = 5, /* max num of enum */ 27665e3dd157SKalle Valo }; 27675e3dd157SKalle Valo 27685e3dd157SKalle Valo struct wmi_pdev_chanlist_update_event { 27695e3dd157SKalle Valo /* number of channels */ 27705e3dd157SKalle Valo __le32 num_chan; 27715e3dd157SKalle Valo /* array of channels */ 27725e3dd157SKalle Valo struct wmi_channel channel_list[1]; 27735e3dd157SKalle Valo } __packed; 27745e3dd157SKalle Valo 27755e3dd157SKalle Valo #define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32) 27765e3dd157SKalle Valo 27775e3dd157SKalle Valo struct wmi_debug_mesg_event { 27785e3dd157SKalle Valo /* message buffer, NULL terminated */ 27795e3dd157SKalle Valo char bufp[WMI_MAX_DEBUG_MESG]; 27805e3dd157SKalle Valo } __packed; 27815e3dd157SKalle Valo 27825e3dd157SKalle Valo enum { 27835e3dd157SKalle Valo /* P2P device */ 27845e3dd157SKalle Valo VDEV_SUBTYPE_P2PDEV = 0, 27855e3dd157SKalle Valo /* P2P client */ 27865e3dd157SKalle Valo VDEV_SUBTYPE_P2PCLI, 27875e3dd157SKalle Valo /* P2P GO */ 27885e3dd157SKalle Valo VDEV_SUBTYPE_P2PGO, 27895e3dd157SKalle Valo /* BT3.0 HS */ 27905e3dd157SKalle Valo VDEV_SUBTYPE_BT, 27915e3dd157SKalle Valo }; 27925e3dd157SKalle Valo 27935e3dd157SKalle Valo struct wmi_pdev_set_channel_cmd { 27945e3dd157SKalle Valo /* idnore power , only use flags , mode and freq */ 27955e3dd157SKalle Valo struct wmi_channel chan; 27965e3dd157SKalle Valo } __packed; 27975e3dd157SKalle Valo 279890174455SRajkumar Manoharan struct wmi_pdev_pktlog_enable_cmd { 279990174455SRajkumar Manoharan __le32 ev_bitmap; 280090174455SRajkumar Manoharan } __packed; 280190174455SRajkumar Manoharan 28025e3dd157SKalle Valo /* Customize the DSCP (bit) to TID (0-7) mapping for QOS */ 28035e3dd157SKalle Valo #define WMI_DSCP_MAP_MAX (64) 28045e3dd157SKalle Valo struct wmi_pdev_set_dscp_tid_map_cmd { 28055e3dd157SKalle Valo /* map indicating DSCP to TID conversion */ 28065e3dd157SKalle Valo __le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX]; 28075e3dd157SKalle Valo } __packed; 28085e3dd157SKalle Valo 28095e3dd157SKalle Valo enum mcast_bcast_rate_id { 28105e3dd157SKalle Valo WMI_SET_MCAST_RATE, 28115e3dd157SKalle Valo WMI_SET_BCAST_RATE 28125e3dd157SKalle Valo }; 28135e3dd157SKalle Valo 28145e3dd157SKalle Valo struct mcast_bcast_rate { 28155e3dd157SKalle Valo enum mcast_bcast_rate_id rate_id; 28165e3dd157SKalle Valo __le32 rate; 28175e3dd157SKalle Valo } __packed; 28185e3dd157SKalle Valo 28195e3dd157SKalle Valo struct wmi_wmm_params { 28205e3dd157SKalle Valo __le32 cwmin; 28215e3dd157SKalle Valo __le32 cwmax; 28225e3dd157SKalle Valo __le32 aifs; 28235e3dd157SKalle Valo __le32 txop; 28245e3dd157SKalle Valo __le32 acm; 28255e3dd157SKalle Valo __le32 no_ack; 28265e3dd157SKalle Valo } __packed; 28275e3dd157SKalle Valo 28285e3dd157SKalle Valo struct wmi_pdev_set_wmm_params { 28295e3dd157SKalle Valo struct wmi_wmm_params ac_be; 28305e3dd157SKalle Valo struct wmi_wmm_params ac_bk; 28315e3dd157SKalle Valo struct wmi_wmm_params ac_vi; 28325e3dd157SKalle Valo struct wmi_wmm_params ac_vo; 28335e3dd157SKalle Valo } __packed; 28345e3dd157SKalle Valo 28355e3dd157SKalle Valo struct wmi_wmm_params_arg { 28365e3dd157SKalle Valo u32 cwmin; 28375e3dd157SKalle Valo u32 cwmax; 28385e3dd157SKalle Valo u32 aifs; 28395e3dd157SKalle Valo u32 txop; 28405e3dd157SKalle Valo u32 acm; 28415e3dd157SKalle Valo u32 no_ack; 28425e3dd157SKalle Valo }; 28435e3dd157SKalle Valo 28445e3dd157SKalle Valo struct wmi_pdev_set_wmm_params_arg { 28455e3dd157SKalle Valo struct wmi_wmm_params_arg ac_be; 28465e3dd157SKalle Valo struct wmi_wmm_params_arg ac_bk; 28475e3dd157SKalle Valo struct wmi_wmm_params_arg ac_vi; 28485e3dd157SKalle Valo struct wmi_wmm_params_arg ac_vo; 28495e3dd157SKalle Valo }; 28505e3dd157SKalle Valo 28515e3dd157SKalle Valo struct wal_dbg_tx_stats { 28525e3dd157SKalle Valo /* Num HTT cookies queued to dispatch list */ 28535e3dd157SKalle Valo __le32 comp_queued; 28545e3dd157SKalle Valo 28555e3dd157SKalle Valo /* Num HTT cookies dispatched */ 28565e3dd157SKalle Valo __le32 comp_delivered; 28575e3dd157SKalle Valo 28585e3dd157SKalle Valo /* Num MSDU queued to WAL */ 28595e3dd157SKalle Valo __le32 msdu_enqued; 28605e3dd157SKalle Valo 28615e3dd157SKalle Valo /* Num MPDU queue to WAL */ 28625e3dd157SKalle Valo __le32 mpdu_enqued; 28635e3dd157SKalle Valo 28645e3dd157SKalle Valo /* Num MSDUs dropped by WMM limit */ 28655e3dd157SKalle Valo __le32 wmm_drop; 28665e3dd157SKalle Valo 28675e3dd157SKalle Valo /* Num Local frames queued */ 28685e3dd157SKalle Valo __le32 local_enqued; 28695e3dd157SKalle Valo 28705e3dd157SKalle Valo /* Num Local frames done */ 28715e3dd157SKalle Valo __le32 local_freed; 28725e3dd157SKalle Valo 28735e3dd157SKalle Valo /* Num queued to HW */ 28745e3dd157SKalle Valo __le32 hw_queued; 28755e3dd157SKalle Valo 28765e3dd157SKalle Valo /* Num PPDU reaped from HW */ 28775e3dd157SKalle Valo __le32 hw_reaped; 28785e3dd157SKalle Valo 28795e3dd157SKalle Valo /* Num underruns */ 28805e3dd157SKalle Valo __le32 underrun; 28815e3dd157SKalle Valo 28825e3dd157SKalle Valo /* Num PPDUs cleaned up in TX abort */ 28835e3dd157SKalle Valo __le32 tx_abort; 28845e3dd157SKalle Valo 28855e3dd157SKalle Valo /* Num MPDUs requed by SW */ 28865e3dd157SKalle Valo __le32 mpdus_requed; 28875e3dd157SKalle Valo 28885e3dd157SKalle Valo /* excessive retries */ 28895e3dd157SKalle Valo __le32 tx_ko; 28905e3dd157SKalle Valo 28915e3dd157SKalle Valo /* data hw rate code */ 28925e3dd157SKalle Valo __le32 data_rc; 28935e3dd157SKalle Valo 28945e3dd157SKalle Valo /* Scheduler self triggers */ 28955e3dd157SKalle Valo __le32 self_triggers; 28965e3dd157SKalle Valo 28975e3dd157SKalle Valo /* frames dropped due to excessive sw retries */ 28985e3dd157SKalle Valo __le32 sw_retry_failure; 28995e3dd157SKalle Valo 29005e3dd157SKalle Valo /* illegal rate phy errors */ 29015e3dd157SKalle Valo __le32 illgl_rate_phy_err; 29025e3dd157SKalle Valo 29035e3dd157SKalle Valo /* wal pdev continous xretry */ 29045e3dd157SKalle Valo __le32 pdev_cont_xretry; 29055e3dd157SKalle Valo 29065e3dd157SKalle Valo /* wal pdev continous xretry */ 29075e3dd157SKalle Valo __le32 pdev_tx_timeout; 29085e3dd157SKalle Valo 29095e3dd157SKalle Valo /* wal pdev resets */ 29105e3dd157SKalle Valo __le32 pdev_resets; 29115e3dd157SKalle Valo 291234d714e0SBartosz Markowski /* frames dropped due to non-availability of stateless TIDs */ 291334d714e0SBartosz Markowski __le32 stateless_tid_alloc_failure; 291434d714e0SBartosz Markowski 29155e3dd157SKalle Valo __le32 phy_underrun; 29165e3dd157SKalle Valo 29175e3dd157SKalle Valo /* MPDU is more than txop limit */ 29185e3dd157SKalle Valo __le32 txop_ovf; 29195e3dd157SKalle Valo } __packed; 29205e3dd157SKalle Valo 29215e3dd157SKalle Valo struct wal_dbg_rx_stats { 29225e3dd157SKalle Valo /* Cnts any change in ring routing mid-ppdu */ 29235e3dd157SKalle Valo __le32 mid_ppdu_route_change; 29245e3dd157SKalle Valo 29255e3dd157SKalle Valo /* Total number of statuses processed */ 29265e3dd157SKalle Valo __le32 status_rcvd; 29275e3dd157SKalle Valo 29285e3dd157SKalle Valo /* Extra frags on rings 0-3 */ 29295e3dd157SKalle Valo __le32 r0_frags; 29305e3dd157SKalle Valo __le32 r1_frags; 29315e3dd157SKalle Valo __le32 r2_frags; 29325e3dd157SKalle Valo __le32 r3_frags; 29335e3dd157SKalle Valo 29345e3dd157SKalle Valo /* MSDUs / MPDUs delivered to HTT */ 29355e3dd157SKalle Valo __le32 htt_msdus; 29365e3dd157SKalle Valo __le32 htt_mpdus; 29375e3dd157SKalle Valo 29385e3dd157SKalle Valo /* MSDUs / MPDUs delivered to local stack */ 29395e3dd157SKalle Valo __le32 loc_msdus; 29405e3dd157SKalle Valo __le32 loc_mpdus; 29415e3dd157SKalle Valo 29425e3dd157SKalle Valo /* AMSDUs that have more MSDUs than the status ring size */ 29435e3dd157SKalle Valo __le32 oversize_amsdu; 29445e3dd157SKalle Valo 29455e3dd157SKalle Valo /* Number of PHY errors */ 29465e3dd157SKalle Valo __le32 phy_errs; 29475e3dd157SKalle Valo 29485e3dd157SKalle Valo /* Number of PHY errors drops */ 29495e3dd157SKalle Valo __le32 phy_err_drop; 29505e3dd157SKalle Valo 29515e3dd157SKalle Valo /* Number of mpdu errors - FCS, MIC, ENC etc. */ 29525e3dd157SKalle Valo __le32 mpdu_errs; 29535e3dd157SKalle Valo } __packed; 29545e3dd157SKalle Valo 29555e3dd157SKalle Valo struct wal_dbg_peer_stats { 29565e3dd157SKalle Valo /* REMOVE THIS ONCE REAL PEER STAT COUNTERS ARE ADDED */ 29575e3dd157SKalle Valo __le32 dummy; 29585e3dd157SKalle Valo } __packed; 29595e3dd157SKalle Valo 29605e3dd157SKalle Valo struct wal_dbg_stats { 29615e3dd157SKalle Valo struct wal_dbg_tx_stats tx; 29625e3dd157SKalle Valo struct wal_dbg_rx_stats rx; 29635e3dd157SKalle Valo struct wal_dbg_peer_stats peer; 29645e3dd157SKalle Valo } __packed; 29655e3dd157SKalle Valo 29665e3dd157SKalle Valo enum wmi_stats_id { 29675e3dd157SKalle Valo WMI_REQUEST_PEER_STAT = 0x01, 29685e3dd157SKalle Valo WMI_REQUEST_AP_STAT = 0x02 29695e3dd157SKalle Valo }; 29705e3dd157SKalle Valo 2971db9cdda6SBen Greear struct wlan_inst_rssi_args { 2972db9cdda6SBen Greear __le16 cfg_retry_count; 2973db9cdda6SBen Greear __le16 retry_count; 2974db9cdda6SBen Greear }; 2975db9cdda6SBen Greear 29765e3dd157SKalle Valo struct wmi_request_stats_cmd { 29775e3dd157SKalle Valo __le32 stats_id; 29785e3dd157SKalle Valo 2979db9cdda6SBen Greear __le32 vdev_id; 2980db9cdda6SBen Greear 2981db9cdda6SBen Greear /* peer MAC address */ 2982db9cdda6SBen Greear struct wmi_mac_addr peer_macaddr; 2983db9cdda6SBen Greear 2984db9cdda6SBen Greear /* Instantaneous RSSI arguments */ 2985db9cdda6SBen Greear struct wlan_inst_rssi_args inst_rssi_args; 29865e3dd157SKalle Valo } __packed; 29875e3dd157SKalle Valo 29885e3dd157SKalle Valo /* Suspend option */ 29895e3dd157SKalle Valo enum { 29905e3dd157SKalle Valo /* suspend */ 29915e3dd157SKalle Valo WMI_PDEV_SUSPEND, 29925e3dd157SKalle Valo 29935e3dd157SKalle Valo /* suspend and disable all interrupts */ 29945e3dd157SKalle Valo WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 29955e3dd157SKalle Valo }; 29965e3dd157SKalle Valo 29975e3dd157SKalle Valo struct wmi_pdev_suspend_cmd { 29985e3dd157SKalle Valo /* suspend option sent to target */ 29995e3dd157SKalle Valo __le32 suspend_opt; 30005e3dd157SKalle Valo } __packed; 30015e3dd157SKalle Valo 30025e3dd157SKalle Valo struct wmi_stats_event { 30035e3dd157SKalle Valo __le32 stats_id; /* %WMI_REQUEST_ */ 30045e3dd157SKalle Valo /* 30055e3dd157SKalle Valo * number of pdev stats event structures 30065e3dd157SKalle Valo * (wmi_pdev_stats) 0 or 1 30075e3dd157SKalle Valo */ 30085e3dd157SKalle Valo __le32 num_pdev_stats; 30095e3dd157SKalle Valo /* 30105e3dd157SKalle Valo * number of vdev stats event structures 30115e3dd157SKalle Valo * (wmi_vdev_stats) 0 or max vdevs 30125e3dd157SKalle Valo */ 30135e3dd157SKalle Valo __le32 num_vdev_stats; 30145e3dd157SKalle Valo /* 30155e3dd157SKalle Valo * number of peer stats event structures 30165e3dd157SKalle Valo * (wmi_peer_stats) 0 or max peers 30175e3dd157SKalle Valo */ 30185e3dd157SKalle Valo __le32 num_peer_stats; 30195e3dd157SKalle Valo __le32 num_bcnflt_stats; 30205e3dd157SKalle Valo /* 30215e3dd157SKalle Valo * followed by 30225e3dd157SKalle Valo * num_pdev_stats * size of(struct wmi_pdev_stats) 30235e3dd157SKalle Valo * num_vdev_stats * size of(struct wmi_vdev_stats) 30245e3dd157SKalle Valo * num_peer_stats * size of(struct wmi_peer_stats) 30255e3dd157SKalle Valo * 30265e3dd157SKalle Valo * By having a zero sized array, the pointer to data area 30275e3dd157SKalle Valo * becomes available without increasing the struct size 30285e3dd157SKalle Valo */ 30295e3dd157SKalle Valo u8 data[0]; 30305e3dd157SKalle Valo } __packed; 30315e3dd157SKalle Valo 30325e3dd157SKalle Valo /* 30335e3dd157SKalle Valo * PDEV statistics 30345e3dd157SKalle Valo * TODO: add all PDEV stats here 30355e3dd157SKalle Valo */ 3036d15fb520SMichal Kazior struct wmi_pdev_stats { 30375e3dd157SKalle Valo __le32 chan_nf; /* Channel noise floor */ 30385e3dd157SKalle Valo __le32 tx_frame_count; /* TX frame count */ 30395e3dd157SKalle Valo __le32 rx_frame_count; /* RX frame count */ 30405e3dd157SKalle Valo __le32 rx_clear_count; /* rx clear count */ 30415e3dd157SKalle Valo __le32 cycle_count; /* cycle count */ 30425e3dd157SKalle Valo __le32 phy_err_count; /* Phy error count */ 30435e3dd157SKalle Valo __le32 chan_tx_pwr; /* channel tx power */ 30445e3dd157SKalle Valo struct wal_dbg_stats wal; /* WAL dbg stats */ 30455e3dd157SKalle Valo } __packed; 30465e3dd157SKalle Valo 3047d15fb520SMichal Kazior struct wmi_10x_pdev_stats { 3048d15fb520SMichal Kazior struct wmi_pdev_stats old; 304952e346d1SChun-Yeow Yeoh __le32 ack_rx_bad; 305052e346d1SChun-Yeow Yeoh __le32 rts_bad; 305152e346d1SChun-Yeow Yeoh __le32 rts_good; 305252e346d1SChun-Yeow Yeoh __le32 fcs_bad; 305352e346d1SChun-Yeow Yeoh __le32 no_beacons; 305452e346d1SChun-Yeow Yeoh __le32 mib_int_count; 305552e346d1SChun-Yeow Yeoh } __packed; 305652e346d1SChun-Yeow Yeoh 30575e3dd157SKalle Valo /* 30585e3dd157SKalle Valo * VDEV statistics 30595e3dd157SKalle Valo * TODO: add all VDEV stats here 30605e3dd157SKalle Valo */ 30615e3dd157SKalle Valo struct wmi_vdev_stats { 30625e3dd157SKalle Valo __le32 vdev_id; 30635e3dd157SKalle Valo } __packed; 30645e3dd157SKalle Valo 30655e3dd157SKalle Valo /* 30665e3dd157SKalle Valo * peer statistics. 30675e3dd157SKalle Valo * TODO: add more stats 30685e3dd157SKalle Valo */ 3069d15fb520SMichal Kazior struct wmi_peer_stats { 30705e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 30715e3dd157SKalle Valo __le32 peer_rssi; 30725e3dd157SKalle Valo __le32 peer_tx_rate; 30735e3dd157SKalle Valo } __packed; 30745e3dd157SKalle Valo 3075d15fb520SMichal Kazior struct wmi_10x_peer_stats { 3076d15fb520SMichal Kazior struct wmi_peer_stats old; 307723c3aae4SBen Greear __le32 peer_rx_rate; 307823c3aae4SBen Greear } __packed; 307923c3aae4SBen Greear 30805e3dd157SKalle Valo struct wmi_vdev_create_cmd { 30815e3dd157SKalle Valo __le32 vdev_id; 30825e3dd157SKalle Valo __le32 vdev_type; 30835e3dd157SKalle Valo __le32 vdev_subtype; 30845e3dd157SKalle Valo struct wmi_mac_addr vdev_macaddr; 30855e3dd157SKalle Valo } __packed; 30865e3dd157SKalle Valo 30875e3dd157SKalle Valo enum wmi_vdev_type { 30885e3dd157SKalle Valo WMI_VDEV_TYPE_AP = 1, 30895e3dd157SKalle Valo WMI_VDEV_TYPE_STA = 2, 30905e3dd157SKalle Valo WMI_VDEV_TYPE_IBSS = 3, 30915e3dd157SKalle Valo WMI_VDEV_TYPE_MONITOR = 4, 30925e3dd157SKalle Valo }; 30935e3dd157SKalle Valo 30945e3dd157SKalle Valo enum wmi_vdev_subtype { 30955e3dd157SKalle Valo WMI_VDEV_SUBTYPE_NONE = 0, 30965e3dd157SKalle Valo WMI_VDEV_SUBTYPE_P2P_DEVICE = 1, 30975e3dd157SKalle Valo WMI_VDEV_SUBTYPE_P2P_CLIENT = 2, 30985e3dd157SKalle Valo WMI_VDEV_SUBTYPE_P2P_GO = 3, 30995e3dd157SKalle Valo }; 31005e3dd157SKalle Valo 31015e3dd157SKalle Valo /* values for vdev_subtype */ 31025e3dd157SKalle Valo 31035e3dd157SKalle Valo /* values for vdev_start_request flags */ 31045e3dd157SKalle Valo /* 31055e3dd157SKalle Valo * Indicates that AP VDEV uses hidden ssid. only valid for 31065e3dd157SKalle Valo * AP/GO */ 31075e3dd157SKalle Valo #define WMI_VDEV_START_HIDDEN_SSID (1<<0) 31085e3dd157SKalle Valo /* 31095e3dd157SKalle Valo * Indicates if robust management frame/management frame 31105e3dd157SKalle Valo * protection is enabled. For GO/AP vdevs, it indicates that 31115e3dd157SKalle Valo * it may support station/client associations with RMF enabled. 31125e3dd157SKalle Valo * For STA/client vdevs, it indicates that sta will 31135e3dd157SKalle Valo * associate with AP with RMF enabled. */ 31145e3dd157SKalle Valo #define WMI_VDEV_START_PMF_ENABLED (1<<1) 31155e3dd157SKalle Valo 31165e3dd157SKalle Valo struct wmi_p2p_noa_descriptor { 31175e3dd157SKalle Valo __le32 type_count; /* 255: continuous schedule, 0: reserved */ 31185e3dd157SKalle Valo __le32 duration; /* Absent period duration in micro seconds */ 31195e3dd157SKalle Valo __le32 interval; /* Absent period interval in micro seconds */ 31205e3dd157SKalle Valo __le32 start_time; /* 32 bit tsf time when in starts */ 31215e3dd157SKalle Valo } __packed; 31225e3dd157SKalle Valo 31235e3dd157SKalle Valo struct wmi_vdev_start_request_cmd { 31245e3dd157SKalle Valo /* WMI channel */ 31255e3dd157SKalle Valo struct wmi_channel chan; 31265e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 31275e3dd157SKalle Valo __le32 vdev_id; 31285e3dd157SKalle Valo /* requestor id identifying the caller module */ 31295e3dd157SKalle Valo __le32 requestor_id; 31305e3dd157SKalle Valo /* beacon interval from received beacon */ 31315e3dd157SKalle Valo __le32 beacon_interval; 31325e3dd157SKalle Valo /* DTIM Period from the received beacon */ 31335e3dd157SKalle Valo __le32 dtim_period; 31345e3dd157SKalle Valo /* Flags */ 31355e3dd157SKalle Valo __le32 flags; 31365e3dd157SKalle Valo /* ssid field. Only valid for AP/GO/IBSS/BTAmp VDEV type. */ 31375e3dd157SKalle Valo struct wmi_ssid ssid; 31385e3dd157SKalle Valo /* beacon/probe reponse xmit rate. Applicable for SoftAP. */ 31395e3dd157SKalle Valo __le32 bcn_tx_rate; 31405e3dd157SKalle Valo /* beacon/probe reponse xmit power. Applicable for SoftAP. */ 31415e3dd157SKalle Valo __le32 bcn_tx_power; 31425e3dd157SKalle Valo /* number of p2p NOA descriptor(s) from scan entry */ 31435e3dd157SKalle Valo __le32 num_noa_descriptors; 31445e3dd157SKalle Valo /* 31455e3dd157SKalle Valo * Disable H/W ack. This used by WMI_VDEV_RESTART_REQUEST_CMDID. 31465e3dd157SKalle Valo * During CAC, Our HW shouldn't ack ditected frames 31475e3dd157SKalle Valo */ 31485e3dd157SKalle Valo __le32 disable_hw_ack; 31495e3dd157SKalle Valo /* actual p2p NOA descriptor from scan entry */ 31505e3dd157SKalle Valo struct wmi_p2p_noa_descriptor noa_descriptors[2]; 31515e3dd157SKalle Valo } __packed; 31525e3dd157SKalle Valo 31535e3dd157SKalle Valo struct wmi_vdev_restart_request_cmd { 31545e3dd157SKalle Valo struct wmi_vdev_start_request_cmd vdev_start_request_cmd; 31555e3dd157SKalle Valo } __packed; 31565e3dd157SKalle Valo 31575e3dd157SKalle Valo struct wmi_vdev_start_request_arg { 31585e3dd157SKalle Valo u32 vdev_id; 31595e3dd157SKalle Valo struct wmi_channel_arg channel; 31605e3dd157SKalle Valo u32 bcn_intval; 31615e3dd157SKalle Valo u32 dtim_period; 31625e3dd157SKalle Valo u8 *ssid; 31635e3dd157SKalle Valo u32 ssid_len; 31645e3dd157SKalle Valo u32 bcn_tx_rate; 31655e3dd157SKalle Valo u32 bcn_tx_power; 31665e3dd157SKalle Valo bool disable_hw_ack; 31675e3dd157SKalle Valo bool hidden_ssid; 31685e3dd157SKalle Valo bool pmf_enabled; 31695e3dd157SKalle Valo }; 31705e3dd157SKalle Valo 31715e3dd157SKalle Valo struct wmi_vdev_delete_cmd { 31725e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 31735e3dd157SKalle Valo __le32 vdev_id; 31745e3dd157SKalle Valo } __packed; 31755e3dd157SKalle Valo 31765e3dd157SKalle Valo struct wmi_vdev_up_cmd { 31775e3dd157SKalle Valo __le32 vdev_id; 31785e3dd157SKalle Valo __le32 vdev_assoc_id; 31795e3dd157SKalle Valo struct wmi_mac_addr vdev_bssid; 31805e3dd157SKalle Valo } __packed; 31815e3dd157SKalle Valo 31825e3dd157SKalle Valo struct wmi_vdev_stop_cmd { 31835e3dd157SKalle Valo __le32 vdev_id; 31845e3dd157SKalle Valo } __packed; 31855e3dd157SKalle Valo 31865e3dd157SKalle Valo struct wmi_vdev_down_cmd { 31875e3dd157SKalle Valo __le32 vdev_id; 31885e3dd157SKalle Valo } __packed; 31895e3dd157SKalle Valo 31905e3dd157SKalle Valo struct wmi_vdev_standby_response_cmd { 31915e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 31925e3dd157SKalle Valo __le32 vdev_id; 31935e3dd157SKalle Valo } __packed; 31945e3dd157SKalle Valo 31955e3dd157SKalle Valo struct wmi_vdev_resume_response_cmd { 31965e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 31975e3dd157SKalle Valo __le32 vdev_id; 31985e3dd157SKalle Valo } __packed; 31995e3dd157SKalle Valo 32005e3dd157SKalle Valo struct wmi_vdev_set_param_cmd { 32015e3dd157SKalle Valo __le32 vdev_id; 32025e3dd157SKalle Valo __le32 param_id; 32035e3dd157SKalle Valo __le32 param_value; 32045e3dd157SKalle Valo } __packed; 32055e3dd157SKalle Valo 32065e3dd157SKalle Valo #define WMI_MAX_KEY_INDEX 3 32075e3dd157SKalle Valo #define WMI_MAX_KEY_LEN 32 32085e3dd157SKalle Valo 32095e3dd157SKalle Valo #define WMI_KEY_PAIRWISE 0x00 32105e3dd157SKalle Valo #define WMI_KEY_GROUP 0x01 32115e3dd157SKalle Valo #define WMI_KEY_TX_USAGE 0x02 /* default tx key - static wep */ 32125e3dd157SKalle Valo 32135e3dd157SKalle Valo struct wmi_key_seq_counter { 32145e3dd157SKalle Valo __le32 key_seq_counter_l; 32155e3dd157SKalle Valo __le32 key_seq_counter_h; 32165e3dd157SKalle Valo } __packed; 32175e3dd157SKalle Valo 32185e3dd157SKalle Valo #define WMI_CIPHER_NONE 0x0 /* clear key */ 32195e3dd157SKalle Valo #define WMI_CIPHER_WEP 0x1 32205e3dd157SKalle Valo #define WMI_CIPHER_TKIP 0x2 32215e3dd157SKalle Valo #define WMI_CIPHER_AES_OCB 0x3 32225e3dd157SKalle Valo #define WMI_CIPHER_AES_CCM 0x4 32235e3dd157SKalle Valo #define WMI_CIPHER_WAPI 0x5 32245e3dd157SKalle Valo #define WMI_CIPHER_CKIP 0x6 32255e3dd157SKalle Valo #define WMI_CIPHER_AES_CMAC 0x7 32265e3dd157SKalle Valo 32275e3dd157SKalle Valo struct wmi_vdev_install_key_cmd { 32285e3dd157SKalle Valo __le32 vdev_id; 32295e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 32305e3dd157SKalle Valo __le32 key_idx; 32315e3dd157SKalle Valo __le32 key_flags; 32325e3dd157SKalle Valo __le32 key_cipher; /* %WMI_CIPHER_ */ 32335e3dd157SKalle Valo struct wmi_key_seq_counter key_rsc_counter; 32345e3dd157SKalle Valo struct wmi_key_seq_counter key_global_rsc_counter; 32355e3dd157SKalle Valo struct wmi_key_seq_counter key_tsc_counter; 32365e3dd157SKalle Valo u8 wpi_key_rsc_counter[16]; 32375e3dd157SKalle Valo u8 wpi_key_tsc_counter[16]; 32385e3dd157SKalle Valo __le32 key_len; 32395e3dd157SKalle Valo __le32 key_txmic_len; 32405e3dd157SKalle Valo __le32 key_rxmic_len; 32415e3dd157SKalle Valo 32425e3dd157SKalle Valo /* contains key followed by tx mic followed by rx mic */ 32435e3dd157SKalle Valo u8 key_data[0]; 32445e3dd157SKalle Valo } __packed; 32455e3dd157SKalle Valo 32465e3dd157SKalle Valo struct wmi_vdev_install_key_arg { 32475e3dd157SKalle Valo u32 vdev_id; 32485e3dd157SKalle Valo const u8 *macaddr; 32495e3dd157SKalle Valo u32 key_idx; 32505e3dd157SKalle Valo u32 key_flags; 32515e3dd157SKalle Valo u32 key_cipher; 32525e3dd157SKalle Valo u32 key_len; 32535e3dd157SKalle Valo u32 key_txmic_len; 32545e3dd157SKalle Valo u32 key_rxmic_len; 32555e3dd157SKalle Valo const void *key_data; 32565e3dd157SKalle Valo }; 32575e3dd157SKalle Valo 325851ab1a0aSJanusz Dziedzic /* 325951ab1a0aSJanusz Dziedzic * vdev fixed rate format: 326051ab1a0aSJanusz Dziedzic * - preamble - b7:b6 - see WMI_RATE_PREMABLE_ 326151ab1a0aSJanusz Dziedzic * - nss - b5:b4 - ss number (0 mean 1ss) 326251ab1a0aSJanusz Dziedzic * - rate_mcs - b3:b0 - as below 326351ab1a0aSJanusz Dziedzic * CCK: 0 - 11Mbps, 1 - 5,5Mbps, 2 - 2Mbps, 3 - 1Mbps, 326451ab1a0aSJanusz Dziedzic * 4 - 11Mbps (s), 5 - 5,5Mbps (s), 6 - 2Mbps (s) 326551ab1a0aSJanusz Dziedzic * OFDM: 0 - 48Mbps, 1 - 24Mbps, 2 - 12Mbps, 3 - 6Mbps, 326651ab1a0aSJanusz Dziedzic * 4 - 54Mbps, 5 - 36Mbps, 6 - 18Mbps, 7 - 9Mbps 326751ab1a0aSJanusz Dziedzic * HT/VHT: MCS index 326851ab1a0aSJanusz Dziedzic */ 326951ab1a0aSJanusz Dziedzic 32705e3dd157SKalle Valo /* Preamble types to be used with VDEV fixed rate configuration */ 32715e3dd157SKalle Valo enum wmi_rate_preamble { 32725e3dd157SKalle Valo WMI_RATE_PREAMBLE_OFDM, 32735e3dd157SKalle Valo WMI_RATE_PREAMBLE_CCK, 32745e3dd157SKalle Valo WMI_RATE_PREAMBLE_HT, 32755e3dd157SKalle Valo WMI_RATE_PREAMBLE_VHT, 32765e3dd157SKalle Valo }; 32775e3dd157SKalle Valo 32785e3dd157SKalle Valo /* Value to disable fixed rate setting */ 32795e3dd157SKalle Valo #define WMI_FIXED_RATE_NONE (0xff) 32805e3dd157SKalle Valo 32816d1506e7SBartosz Markowski struct wmi_vdev_param_map { 32826d1506e7SBartosz Markowski u32 rts_threshold; 32836d1506e7SBartosz Markowski u32 fragmentation_threshold; 32846d1506e7SBartosz Markowski u32 beacon_interval; 32856d1506e7SBartosz Markowski u32 listen_interval; 32866d1506e7SBartosz Markowski u32 multicast_rate; 32876d1506e7SBartosz Markowski u32 mgmt_tx_rate; 32886d1506e7SBartosz Markowski u32 slot_time; 32896d1506e7SBartosz Markowski u32 preamble; 32906d1506e7SBartosz Markowski u32 swba_time; 32916d1506e7SBartosz Markowski u32 wmi_vdev_stats_update_period; 32926d1506e7SBartosz Markowski u32 wmi_vdev_pwrsave_ageout_time; 32936d1506e7SBartosz Markowski u32 wmi_vdev_host_swba_interval; 32946d1506e7SBartosz Markowski u32 dtim_period; 32956d1506e7SBartosz Markowski u32 wmi_vdev_oc_scheduler_air_time_limit; 32966d1506e7SBartosz Markowski u32 wds; 32976d1506e7SBartosz Markowski u32 atim_window; 32986d1506e7SBartosz Markowski u32 bmiss_count_max; 32996d1506e7SBartosz Markowski u32 bmiss_first_bcnt; 33006d1506e7SBartosz Markowski u32 bmiss_final_bcnt; 33016d1506e7SBartosz Markowski u32 feature_wmm; 33026d1506e7SBartosz Markowski u32 chwidth; 33036d1506e7SBartosz Markowski u32 chextoffset; 33046d1506e7SBartosz Markowski u32 disable_htprotection; 33056d1506e7SBartosz Markowski u32 sta_quickkickout; 33066d1506e7SBartosz Markowski u32 mgmt_rate; 33076d1506e7SBartosz Markowski u32 protection_mode; 33086d1506e7SBartosz Markowski u32 fixed_rate; 33096d1506e7SBartosz Markowski u32 sgi; 33106d1506e7SBartosz Markowski u32 ldpc; 33116d1506e7SBartosz Markowski u32 tx_stbc; 33126d1506e7SBartosz Markowski u32 rx_stbc; 33136d1506e7SBartosz Markowski u32 intra_bss_fwd; 33146d1506e7SBartosz Markowski u32 def_keyid; 33156d1506e7SBartosz Markowski u32 nss; 33166d1506e7SBartosz Markowski u32 bcast_data_rate; 33176d1506e7SBartosz Markowski u32 mcast_data_rate; 33186d1506e7SBartosz Markowski u32 mcast_indicate; 33196d1506e7SBartosz Markowski u32 dhcp_indicate; 33206d1506e7SBartosz Markowski u32 unknown_dest_indicate; 33216d1506e7SBartosz Markowski u32 ap_keepalive_min_idle_inactive_time_secs; 33226d1506e7SBartosz Markowski u32 ap_keepalive_max_idle_inactive_time_secs; 33236d1506e7SBartosz Markowski u32 ap_keepalive_max_unresponsive_time_secs; 33246d1506e7SBartosz Markowski u32 ap_enable_nawds; 33256d1506e7SBartosz Markowski u32 mcast2ucast_set; 33266d1506e7SBartosz Markowski u32 enable_rtscts; 33276d1506e7SBartosz Markowski u32 txbf; 33286d1506e7SBartosz Markowski u32 packet_powersave; 33296d1506e7SBartosz Markowski u32 drop_unencry; 33306d1506e7SBartosz Markowski u32 tx_encap_type; 33316d1506e7SBartosz Markowski u32 ap_detect_out_of_sync_sleeping_sta_time_secs; 33326d1506e7SBartosz Markowski }; 33336d1506e7SBartosz Markowski 33346d1506e7SBartosz Markowski #define WMI_VDEV_PARAM_UNSUPPORTED 0 33356d1506e7SBartosz Markowski 33365e3dd157SKalle Valo /* the definition of different VDEV parameters */ 33375e3dd157SKalle Valo enum wmi_vdev_param { 33385e3dd157SKalle Valo /* RTS Threshold */ 33395e3dd157SKalle Valo WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 33405e3dd157SKalle Valo /* Fragmentation threshold */ 33415e3dd157SKalle Valo WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 33425e3dd157SKalle Valo /* beacon interval in TUs */ 33435e3dd157SKalle Valo WMI_VDEV_PARAM_BEACON_INTERVAL, 33445e3dd157SKalle Valo /* Listen interval in TUs */ 33455e3dd157SKalle Valo WMI_VDEV_PARAM_LISTEN_INTERVAL, 33465e3dd157SKalle Valo /* muticast rate in Mbps */ 33475e3dd157SKalle Valo WMI_VDEV_PARAM_MULTICAST_RATE, 33485e3dd157SKalle Valo /* management frame rate in Mbps */ 33495e3dd157SKalle Valo WMI_VDEV_PARAM_MGMT_TX_RATE, 33505e3dd157SKalle Valo /* slot time (long vs short) */ 33515e3dd157SKalle Valo WMI_VDEV_PARAM_SLOT_TIME, 33525e3dd157SKalle Valo /* preamble (long vs short) */ 33535e3dd157SKalle Valo WMI_VDEV_PARAM_PREAMBLE, 33545e3dd157SKalle Valo /* SWBA time (time before tbtt in msec) */ 33555e3dd157SKalle Valo WMI_VDEV_PARAM_SWBA_TIME, 33565e3dd157SKalle Valo /* time period for updating VDEV stats */ 33575e3dd157SKalle Valo WMI_VDEV_STATS_UPDATE_PERIOD, 33585e3dd157SKalle Valo /* age out time in msec for frames queued for station in power save */ 33595e3dd157SKalle Valo WMI_VDEV_PWRSAVE_AGEOUT_TIME, 33605e3dd157SKalle Valo /* 33615e3dd157SKalle Valo * Host SWBA interval (time in msec before tbtt for SWBA event 33625e3dd157SKalle Valo * generation). 33635e3dd157SKalle Valo */ 33645e3dd157SKalle Valo WMI_VDEV_HOST_SWBA_INTERVAL, 33655e3dd157SKalle Valo /* DTIM period (specified in units of num beacon intervals) */ 33665e3dd157SKalle Valo WMI_VDEV_PARAM_DTIM_PERIOD, 33675e3dd157SKalle Valo /* 33685e3dd157SKalle Valo * scheduler air time limit for this VDEV. used by off chan 33695e3dd157SKalle Valo * scheduler. 33705e3dd157SKalle Valo */ 33715e3dd157SKalle Valo WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 33725e3dd157SKalle Valo /* enable/dsiable WDS for this VDEV */ 33735e3dd157SKalle Valo WMI_VDEV_PARAM_WDS, 33745e3dd157SKalle Valo /* ATIM Window */ 33755e3dd157SKalle Valo WMI_VDEV_PARAM_ATIM_WINDOW, 33765e3dd157SKalle Valo /* BMISS max */ 33775e3dd157SKalle Valo WMI_VDEV_PARAM_BMISS_COUNT_MAX, 33785e3dd157SKalle Valo /* BMISS first time */ 33795e3dd157SKalle Valo WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 33805e3dd157SKalle Valo /* BMISS final time */ 33815e3dd157SKalle Valo WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 33825e3dd157SKalle Valo /* WMM enables/disabled */ 33835e3dd157SKalle Valo WMI_VDEV_PARAM_FEATURE_WMM, 33845e3dd157SKalle Valo /* Channel width */ 33855e3dd157SKalle Valo WMI_VDEV_PARAM_CHWIDTH, 33865e3dd157SKalle Valo /* Channel Offset */ 33875e3dd157SKalle Valo WMI_VDEV_PARAM_CHEXTOFFSET, 33885e3dd157SKalle Valo /* Disable HT Protection */ 33895e3dd157SKalle Valo WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 33905e3dd157SKalle Valo /* Quick STA Kickout */ 33915e3dd157SKalle Valo WMI_VDEV_PARAM_STA_QUICKKICKOUT, 33925e3dd157SKalle Valo /* Rate to be used with Management frames */ 33935e3dd157SKalle Valo WMI_VDEV_PARAM_MGMT_RATE, 33945e3dd157SKalle Valo /* Protection Mode */ 33955e3dd157SKalle Valo WMI_VDEV_PARAM_PROTECTION_MODE, 33965e3dd157SKalle Valo /* Fixed rate setting */ 33975e3dd157SKalle Valo WMI_VDEV_PARAM_FIXED_RATE, 33985e3dd157SKalle Valo /* Short GI Enable/Disable */ 33995e3dd157SKalle Valo WMI_VDEV_PARAM_SGI, 34005e3dd157SKalle Valo /* Enable LDPC */ 34015e3dd157SKalle Valo WMI_VDEV_PARAM_LDPC, 34025e3dd157SKalle Valo /* Enable Tx STBC */ 34035e3dd157SKalle Valo WMI_VDEV_PARAM_TX_STBC, 34045e3dd157SKalle Valo /* Enable Rx STBC */ 34055e3dd157SKalle Valo WMI_VDEV_PARAM_RX_STBC, 34065e3dd157SKalle Valo /* Intra BSS forwarding */ 34075e3dd157SKalle Valo WMI_VDEV_PARAM_INTRA_BSS_FWD, 34085e3dd157SKalle Valo /* Setting Default xmit key for Vdev */ 34095e3dd157SKalle Valo WMI_VDEV_PARAM_DEF_KEYID, 34105e3dd157SKalle Valo /* NSS width */ 34115e3dd157SKalle Valo WMI_VDEV_PARAM_NSS, 34125e3dd157SKalle Valo /* Set the custom rate for the broadcast data frames */ 34135e3dd157SKalle Valo WMI_VDEV_PARAM_BCAST_DATA_RATE, 34145e3dd157SKalle Valo /* Set the custom rate (rate-code) for multicast data frames */ 34155e3dd157SKalle Valo WMI_VDEV_PARAM_MCAST_DATA_RATE, 34165e3dd157SKalle Valo /* Tx multicast packet indicate Enable/Disable */ 34175e3dd157SKalle Valo WMI_VDEV_PARAM_MCAST_INDICATE, 34185e3dd157SKalle Valo /* Tx DHCP packet indicate Enable/Disable */ 34195e3dd157SKalle Valo WMI_VDEV_PARAM_DHCP_INDICATE, 34205e3dd157SKalle Valo /* Enable host inspection of Tx unicast packet to unknown destination */ 34215e3dd157SKalle Valo WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 34225e3dd157SKalle Valo 34235e3dd157SKalle Valo /* The minimum amount of time AP begins to consider STA inactive */ 34245e3dd157SKalle Valo WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 34255e3dd157SKalle Valo 34265e3dd157SKalle Valo /* 34275e3dd157SKalle Valo * An associated STA is considered inactive when there is no recent 34285e3dd157SKalle Valo * TX/RX activity and no downlink frames are buffered for it. Once a 34295e3dd157SKalle Valo * STA exceeds the maximum idle inactive time, the AP will send an 34305e3dd157SKalle Valo * 802.11 data-null as a keep alive to verify the STA is still 34315e3dd157SKalle Valo * associated. If the STA does ACK the data-null, or if the data-null 34325e3dd157SKalle Valo * is buffered and the STA does not retrieve it, the STA will be 34335e3dd157SKalle Valo * considered unresponsive 34345e3dd157SKalle Valo * (see WMI_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS). 34355e3dd157SKalle Valo */ 34365e3dd157SKalle Valo WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 34375e3dd157SKalle Valo 34385e3dd157SKalle Valo /* 34395e3dd157SKalle Valo * An associated STA is considered unresponsive if there is no recent 34405e3dd157SKalle Valo * TX/RX activity and downlink frames are buffered for it. Once a STA 34415e3dd157SKalle Valo * exceeds the maximum unresponsive time, the AP will send a 34425e3dd157SKalle Valo * WMI_STA_KICKOUT event to the host so the STA can be deleted. */ 34435e3dd157SKalle Valo WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 34445e3dd157SKalle Valo 34455e3dd157SKalle Valo /* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */ 34465e3dd157SKalle Valo WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 34475e3dd157SKalle Valo /* Enable/Disable RTS-CTS */ 34485e3dd157SKalle Valo WMI_VDEV_PARAM_ENABLE_RTSCTS, 34495e3dd157SKalle Valo /* Enable TXBFee/er */ 34505e3dd157SKalle Valo WMI_VDEV_PARAM_TXBF, 34515e3dd157SKalle Valo 34525e3dd157SKalle Valo /* Set packet power save */ 34535e3dd157SKalle Valo WMI_VDEV_PARAM_PACKET_POWERSAVE, 34545e3dd157SKalle Valo 34555e3dd157SKalle Valo /* 34565e3dd157SKalle Valo * Drops un-encrypted packets if eceived in an encrypted connection 34575e3dd157SKalle Valo * otherwise forwards to host. 34585e3dd157SKalle Valo */ 34595e3dd157SKalle Valo WMI_VDEV_PARAM_DROP_UNENCRY, 34605e3dd157SKalle Valo 34615e3dd157SKalle Valo /* 34625e3dd157SKalle Valo * Set the encapsulation type for frames. 34635e3dd157SKalle Valo */ 34645e3dd157SKalle Valo WMI_VDEV_PARAM_TX_ENCAP_TYPE, 34655e3dd157SKalle Valo }; 34665e3dd157SKalle Valo 34676d1506e7SBartosz Markowski /* the definition of different VDEV parameters */ 34686d1506e7SBartosz Markowski enum wmi_10x_vdev_param { 34696d1506e7SBartosz Markowski /* RTS Threshold */ 34706d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1, 34716d1506e7SBartosz Markowski /* Fragmentation threshold */ 34726d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 34736d1506e7SBartosz Markowski /* beacon interval in TUs */ 34746d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_BEACON_INTERVAL, 34756d1506e7SBartosz Markowski /* Listen interval in TUs */ 34766d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, 34776d1506e7SBartosz Markowski /* muticast rate in Mbps */ 34786d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MULTICAST_RATE, 34796d1506e7SBartosz Markowski /* management frame rate in Mbps */ 34806d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MGMT_TX_RATE, 34816d1506e7SBartosz Markowski /* slot time (long vs short) */ 34826d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_SLOT_TIME, 34836d1506e7SBartosz Markowski /* preamble (long vs short) */ 34846d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_PREAMBLE, 34856d1506e7SBartosz Markowski /* SWBA time (time before tbtt in msec) */ 34866d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_SWBA_TIME, 34876d1506e7SBartosz Markowski /* time period for updating VDEV stats */ 34886d1506e7SBartosz Markowski WMI_10X_VDEV_STATS_UPDATE_PERIOD, 34896d1506e7SBartosz Markowski /* age out time in msec for frames queued for station in power save */ 34906d1506e7SBartosz Markowski WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, 34916d1506e7SBartosz Markowski /* 34926d1506e7SBartosz Markowski * Host SWBA interval (time in msec before tbtt for SWBA event 34936d1506e7SBartosz Markowski * generation). 34946d1506e7SBartosz Markowski */ 34956d1506e7SBartosz Markowski WMI_10X_VDEV_HOST_SWBA_INTERVAL, 34966d1506e7SBartosz Markowski /* DTIM period (specified in units of num beacon intervals) */ 34976d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_DTIM_PERIOD, 34986d1506e7SBartosz Markowski /* 34996d1506e7SBartosz Markowski * scheduler air time limit for this VDEV. used by off chan 35006d1506e7SBartosz Markowski * scheduler. 35016d1506e7SBartosz Markowski */ 35026d1506e7SBartosz Markowski WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 35036d1506e7SBartosz Markowski /* enable/dsiable WDS for this VDEV */ 35046d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_WDS, 35056d1506e7SBartosz Markowski /* ATIM Window */ 35066d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_ATIM_WINDOW, 35076d1506e7SBartosz Markowski /* BMISS max */ 35086d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, 35096d1506e7SBartosz Markowski /* WMM enables/disabled */ 35106d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_FEATURE_WMM, 35116d1506e7SBartosz Markowski /* Channel width */ 35126d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_CHWIDTH, 35136d1506e7SBartosz Markowski /* Channel Offset */ 35146d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_CHEXTOFFSET, 35156d1506e7SBartosz Markowski /* Disable HT Protection */ 35166d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, 35176d1506e7SBartosz Markowski /* Quick STA Kickout */ 35186d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, 35196d1506e7SBartosz Markowski /* Rate to be used with Management frames */ 35206d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MGMT_RATE, 35216d1506e7SBartosz Markowski /* Protection Mode */ 35226d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_PROTECTION_MODE, 35236d1506e7SBartosz Markowski /* Fixed rate setting */ 35246d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_FIXED_RATE, 35256d1506e7SBartosz Markowski /* Short GI Enable/Disable */ 35266d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_SGI, 35276d1506e7SBartosz Markowski /* Enable LDPC */ 35286d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_LDPC, 35296d1506e7SBartosz Markowski /* Enable Tx STBC */ 35306d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_TX_STBC, 35316d1506e7SBartosz Markowski /* Enable Rx STBC */ 35326d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_RX_STBC, 35336d1506e7SBartosz Markowski /* Intra BSS forwarding */ 35346d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, 35356d1506e7SBartosz Markowski /* Setting Default xmit key for Vdev */ 35366d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_DEF_KEYID, 35376d1506e7SBartosz Markowski /* NSS width */ 35386d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_NSS, 35396d1506e7SBartosz Markowski /* Set the custom rate for the broadcast data frames */ 35406d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, 35416d1506e7SBartosz Markowski /* Set the custom rate (rate-code) for multicast data frames */ 35426d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, 35436d1506e7SBartosz Markowski /* Tx multicast packet indicate Enable/Disable */ 35446d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MCAST_INDICATE, 35456d1506e7SBartosz Markowski /* Tx DHCP packet indicate Enable/Disable */ 35466d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_DHCP_INDICATE, 35476d1506e7SBartosz Markowski /* Enable host inspection of Tx unicast packet to unknown destination */ 35486d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 35496d1506e7SBartosz Markowski 35506d1506e7SBartosz Markowski /* The minimum amount of time AP begins to consider STA inactive */ 35516d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 35526d1506e7SBartosz Markowski 35536d1506e7SBartosz Markowski /* 35546d1506e7SBartosz Markowski * An associated STA is considered inactive when there is no recent 35556d1506e7SBartosz Markowski * TX/RX activity and no downlink frames are buffered for it. Once a 35566d1506e7SBartosz Markowski * STA exceeds the maximum idle inactive time, the AP will send an 35576d1506e7SBartosz Markowski * 802.11 data-null as a keep alive to verify the STA is still 35586d1506e7SBartosz Markowski * associated. If the STA does ACK the data-null, or if the data-null 35596d1506e7SBartosz Markowski * is buffered and the STA does not retrieve it, the STA will be 35606d1506e7SBartosz Markowski * considered unresponsive 35616d1506e7SBartosz Markowski * (see WMI_10X_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS). 35626d1506e7SBartosz Markowski */ 35636d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 35646d1506e7SBartosz Markowski 35656d1506e7SBartosz Markowski /* 35666d1506e7SBartosz Markowski * An associated STA is considered unresponsive if there is no recent 35676d1506e7SBartosz Markowski * TX/RX activity and downlink frames are buffered for it. Once a STA 35686d1506e7SBartosz Markowski * exceeds the maximum unresponsive time, the AP will send a 35696d1506e7SBartosz Markowski * WMI_10X_STA_KICKOUT event to the host so the STA can be deleted. */ 35706d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 35716d1506e7SBartosz Markowski 35726d1506e7SBartosz Markowski /* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */ 35736d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, 35746d1506e7SBartosz Markowski 35756d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, 35766d1506e7SBartosz Markowski /* Enable/Disable RTS-CTS */ 35776d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, 35786d1506e7SBartosz Markowski 35796d1506e7SBartosz Markowski WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 358024c88f78SMichal Kazior 358124c88f78SMichal Kazior /* following are available as of firmware 10.2 */ 358224c88f78SMichal Kazior WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE, 358324c88f78SMichal Kazior WMI_10X_VDEV_PARAM_CABQ_MAXDUR, 358424c88f78SMichal Kazior WMI_10X_VDEV_PARAM_MFPTEST_SET, 358524c88f78SMichal Kazior WMI_10X_VDEV_PARAM_RTS_FIXED_RATE, 358624c88f78SMichal Kazior WMI_10X_VDEV_PARAM_VHT_SGIMASK, 358724c88f78SMichal Kazior WMI_10X_VDEV_PARAM_VHT80_RATEMASK, 35886d1506e7SBartosz Markowski }; 35896d1506e7SBartosz Markowski 35905e3dd157SKalle Valo /* slot time long */ 35915e3dd157SKalle Valo #define WMI_VDEV_SLOT_TIME_LONG 0x1 35925e3dd157SKalle Valo /* slot time short */ 35935e3dd157SKalle Valo #define WMI_VDEV_SLOT_TIME_SHORT 0x2 35945e3dd157SKalle Valo /* preablbe long */ 35955e3dd157SKalle Valo #define WMI_VDEV_PREAMBLE_LONG 0x1 35965e3dd157SKalle Valo /* preablbe short */ 35975e3dd157SKalle Valo #define WMI_VDEV_PREAMBLE_SHORT 0x2 35985e3dd157SKalle Valo 35995e3dd157SKalle Valo enum wmi_start_event_param { 36005e3dd157SKalle Valo WMI_VDEV_RESP_START_EVENT = 0, 36015e3dd157SKalle Valo WMI_VDEV_RESP_RESTART_EVENT, 36025e3dd157SKalle Valo }; 36035e3dd157SKalle Valo 36045e3dd157SKalle Valo struct wmi_vdev_start_response_event { 36055e3dd157SKalle Valo __le32 vdev_id; 36065e3dd157SKalle Valo __le32 req_id; 36075e3dd157SKalle Valo __le32 resp_type; /* %WMI_VDEV_RESP_ */ 36085e3dd157SKalle Valo __le32 status; 36095e3dd157SKalle Valo } __packed; 36105e3dd157SKalle Valo 36115e3dd157SKalle Valo struct wmi_vdev_standby_req_event { 36125e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 36135e3dd157SKalle Valo __le32 vdev_id; 36145e3dd157SKalle Valo } __packed; 36155e3dd157SKalle Valo 36165e3dd157SKalle Valo struct wmi_vdev_resume_req_event { 36175e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 36185e3dd157SKalle Valo __le32 vdev_id; 36195e3dd157SKalle Valo } __packed; 36205e3dd157SKalle Valo 36215e3dd157SKalle Valo struct wmi_vdev_stopped_event { 36225e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 36235e3dd157SKalle Valo __le32 vdev_id; 36245e3dd157SKalle Valo } __packed; 36255e3dd157SKalle Valo 36265e3dd157SKalle Valo /* 36275e3dd157SKalle Valo * common structure used for simple events 36285e3dd157SKalle Valo * (stopped, resume_req, standby response) 36295e3dd157SKalle Valo */ 36305e3dd157SKalle Valo struct wmi_vdev_simple_event { 36315e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 36325e3dd157SKalle Valo __le32 vdev_id; 36335e3dd157SKalle Valo } __packed; 36345e3dd157SKalle Valo 36355e3dd157SKalle Valo /* VDEV start response status codes */ 36365e3dd157SKalle Valo /* VDEV succesfully started */ 36375e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0 36385e3dd157SKalle Valo 36395e3dd157SKalle Valo /* requested VDEV not found */ 36405e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID 0x1 36415e3dd157SKalle Valo 36425e3dd157SKalle Valo /* unsupported VDEV combination */ 36435e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED 0x2 36445e3dd157SKalle Valo 3645855aed12SSimon Wunderlich /* TODO: please add more comments if you have in-depth information */ 3646855aed12SSimon Wunderlich struct wmi_vdev_spectral_conf_cmd { 3647855aed12SSimon Wunderlich __le32 vdev_id; 3648855aed12SSimon Wunderlich 3649855aed12SSimon Wunderlich /* number of fft samples to send (0 for infinite) */ 3650855aed12SSimon Wunderlich __le32 scan_count; 3651855aed12SSimon Wunderlich __le32 scan_period; 3652855aed12SSimon Wunderlich __le32 scan_priority; 3653855aed12SSimon Wunderlich 3654855aed12SSimon Wunderlich /* number of bins in the FFT: 2^(fft_size - bin_scale) */ 3655855aed12SSimon Wunderlich __le32 scan_fft_size; 3656855aed12SSimon Wunderlich __le32 scan_gc_ena; 3657855aed12SSimon Wunderlich __le32 scan_restart_ena; 3658855aed12SSimon Wunderlich __le32 scan_noise_floor_ref; 3659855aed12SSimon Wunderlich __le32 scan_init_delay; 3660855aed12SSimon Wunderlich __le32 scan_nb_tone_thr; 3661855aed12SSimon Wunderlich __le32 scan_str_bin_thr; 3662855aed12SSimon Wunderlich __le32 scan_wb_rpt_mode; 3663855aed12SSimon Wunderlich __le32 scan_rssi_rpt_mode; 3664855aed12SSimon Wunderlich __le32 scan_rssi_thr; 3665855aed12SSimon Wunderlich __le32 scan_pwr_format; 3666855aed12SSimon Wunderlich 3667855aed12SSimon Wunderlich /* rpt_mode: Format of FFT report to software for spectral scan 3668855aed12SSimon Wunderlich * triggered FFTs: 3669855aed12SSimon Wunderlich * 0: No FFT report (only spectral scan summary report) 3670855aed12SSimon Wunderlich * 1: 2-dword summary of metrics for each completed FFT + spectral 3671855aed12SSimon Wunderlich * scan summary report 3672855aed12SSimon Wunderlich * 2: 2-dword summary of metrics for each completed FFT + 3673855aed12SSimon Wunderlich * 1x- oversampled bins(in-band) per FFT + spectral scan summary 3674855aed12SSimon Wunderlich * report 3675855aed12SSimon Wunderlich * 3: 2-dword summary of metrics for each completed FFT + 3676855aed12SSimon Wunderlich * 2x- oversampled bins (all) per FFT + spectral scan summary 3677855aed12SSimon Wunderlich */ 3678855aed12SSimon Wunderlich __le32 scan_rpt_mode; 3679855aed12SSimon Wunderlich __le32 scan_bin_scale; 3680855aed12SSimon Wunderlich __le32 scan_dbm_adj; 3681855aed12SSimon Wunderlich __le32 scan_chn_mask; 3682855aed12SSimon Wunderlich } __packed; 3683855aed12SSimon Wunderlich 3684855aed12SSimon Wunderlich struct wmi_vdev_spectral_conf_arg { 3685855aed12SSimon Wunderlich u32 vdev_id; 3686855aed12SSimon Wunderlich u32 scan_count; 3687855aed12SSimon Wunderlich u32 scan_period; 3688855aed12SSimon Wunderlich u32 scan_priority; 3689855aed12SSimon Wunderlich u32 scan_fft_size; 3690855aed12SSimon Wunderlich u32 scan_gc_ena; 3691855aed12SSimon Wunderlich u32 scan_restart_ena; 3692855aed12SSimon Wunderlich u32 scan_noise_floor_ref; 3693855aed12SSimon Wunderlich u32 scan_init_delay; 3694855aed12SSimon Wunderlich u32 scan_nb_tone_thr; 3695855aed12SSimon Wunderlich u32 scan_str_bin_thr; 3696855aed12SSimon Wunderlich u32 scan_wb_rpt_mode; 3697855aed12SSimon Wunderlich u32 scan_rssi_rpt_mode; 3698855aed12SSimon Wunderlich u32 scan_rssi_thr; 3699855aed12SSimon Wunderlich u32 scan_pwr_format; 3700855aed12SSimon Wunderlich u32 scan_rpt_mode; 3701855aed12SSimon Wunderlich u32 scan_bin_scale; 3702855aed12SSimon Wunderlich u32 scan_dbm_adj; 3703855aed12SSimon Wunderlich u32 scan_chn_mask; 3704855aed12SSimon Wunderlich }; 3705855aed12SSimon Wunderlich 3706855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_DEFAULT 0 3707855aed12SSimon Wunderlich #define WMI_SPECTRAL_COUNT_DEFAULT 0 3708855aed12SSimon Wunderlich #define WMI_SPECTRAL_PERIOD_DEFAULT 35 3709855aed12SSimon Wunderlich #define WMI_SPECTRAL_PRIORITY_DEFAULT 1 3710855aed12SSimon Wunderlich #define WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 3711855aed12SSimon Wunderlich #define WMI_SPECTRAL_GC_ENA_DEFAULT 1 3712855aed12SSimon Wunderlich #define WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 3713855aed12SSimon Wunderlich #define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 3714855aed12SSimon Wunderlich #define WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 3715855aed12SSimon Wunderlich #define WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 3716855aed12SSimon Wunderlich #define WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 3717855aed12SSimon Wunderlich #define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 3718855aed12SSimon Wunderlich #define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 3719855aed12SSimon Wunderlich #define WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 3720855aed12SSimon Wunderlich #define WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 3721855aed12SSimon Wunderlich #define WMI_SPECTRAL_RPT_MODE_DEFAULT 2 3722855aed12SSimon Wunderlich #define WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 3723855aed12SSimon Wunderlich #define WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 3724855aed12SSimon Wunderlich #define WMI_SPECTRAL_CHN_MASK_DEFAULT 1 3725855aed12SSimon Wunderlich 3726855aed12SSimon Wunderlich struct wmi_vdev_spectral_enable_cmd { 3727855aed12SSimon Wunderlich __le32 vdev_id; 3728855aed12SSimon Wunderlich __le32 trigger_cmd; 3729855aed12SSimon Wunderlich __le32 enable_cmd; 3730855aed12SSimon Wunderlich } __packed; 3731855aed12SSimon Wunderlich 3732855aed12SSimon Wunderlich #define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 3733855aed12SSimon Wunderlich #define WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 3734855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 3735855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 3736855aed12SSimon Wunderlich 37375e3dd157SKalle Valo /* Beacon processing related command and event structures */ 37385e3dd157SKalle Valo struct wmi_bcn_tx_hdr { 37395e3dd157SKalle Valo __le32 vdev_id; 37405e3dd157SKalle Valo __le32 tx_rate; 37415e3dd157SKalle Valo __le32 tx_power; 37425e3dd157SKalle Valo __le32 bcn_len; 37435e3dd157SKalle Valo } __packed; 37445e3dd157SKalle Valo 37455e3dd157SKalle Valo struct wmi_bcn_tx_cmd { 37465e3dd157SKalle Valo struct wmi_bcn_tx_hdr hdr; 37475e3dd157SKalle Valo u8 *bcn[0]; 37485e3dd157SKalle Valo } __packed; 37495e3dd157SKalle Valo 37505e3dd157SKalle Valo struct wmi_bcn_tx_arg { 37515e3dd157SKalle Valo u32 vdev_id; 37525e3dd157SKalle Valo u32 tx_rate; 37535e3dd157SKalle Valo u32 tx_power; 37545e3dd157SKalle Valo u32 bcn_len; 37555e3dd157SKalle Valo const void *bcn; 37565e3dd157SKalle Valo }; 37575e3dd157SKalle Valo 3758748afc47SMichal Kazior enum wmi_bcn_tx_ref_flags { 3759748afc47SMichal Kazior WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1, 3760748afc47SMichal Kazior WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2, 3761748afc47SMichal Kazior }; 3762748afc47SMichal Kazior 376324c88f78SMichal Kazior /* TODO: It is unclear why "no antenna" works while any other seemingly valid 376424c88f78SMichal Kazior * chainmask yields no beacons on the air at all. 376524c88f78SMichal Kazior */ 376624c88f78SMichal Kazior #define WMI_BCN_TX_REF_DEF_ANTENNA 0 376724c88f78SMichal Kazior 3768748afc47SMichal Kazior struct wmi_bcn_tx_ref_cmd { 3769748afc47SMichal Kazior __le32 vdev_id; 3770748afc47SMichal Kazior __le32 data_len; 3771748afc47SMichal Kazior /* physical address of the frame - dma pointer */ 3772748afc47SMichal Kazior __le32 data_ptr; 3773748afc47SMichal Kazior /* id for host to track */ 3774748afc47SMichal Kazior __le32 msdu_id; 3775748afc47SMichal Kazior /* frame ctrl to setup PPDU desc */ 3776748afc47SMichal Kazior __le32 frame_control; 3777748afc47SMichal Kazior /* to control CABQ traffic: WMI_BCN_TX_REF_FLAG_ */ 3778748afc47SMichal Kazior __le32 flags; 377924c88f78SMichal Kazior /* introduced in 10.2 */ 378024c88f78SMichal Kazior __le32 antenna_mask; 3781748afc47SMichal Kazior } __packed; 3782748afc47SMichal Kazior 37835e3dd157SKalle Valo /* Beacon filter */ 37845e3dd157SKalle Valo #define WMI_BCN_FILTER_ALL 0 /* Filter all beacons */ 37855e3dd157SKalle Valo #define WMI_BCN_FILTER_NONE 1 /* Pass all beacons */ 37865e3dd157SKalle Valo #define WMI_BCN_FILTER_RSSI 2 /* Pass Beacons RSSI >= RSSI threshold */ 37875e3dd157SKalle Valo #define WMI_BCN_FILTER_BSSID 3 /* Pass Beacons with matching BSSID */ 37885e3dd157SKalle Valo #define WMI_BCN_FILTER_SSID 4 /* Pass Beacons with matching SSID */ 37895e3dd157SKalle Valo 37905e3dd157SKalle Valo struct wmi_bcn_filter_rx_cmd { 37915e3dd157SKalle Valo /* Filter ID */ 37925e3dd157SKalle Valo __le32 bcn_filter_id; 37935e3dd157SKalle Valo /* Filter type - wmi_bcn_filter */ 37945e3dd157SKalle Valo __le32 bcn_filter; 37955e3dd157SKalle Valo /* Buffer len */ 37965e3dd157SKalle Valo __le32 bcn_filter_len; 37975e3dd157SKalle Valo /* Filter info (threshold, BSSID, RSSI) */ 37985e3dd157SKalle Valo u8 *bcn_filter_buf; 37995e3dd157SKalle Valo } __packed; 38005e3dd157SKalle Valo 38015e3dd157SKalle Valo /* Capabilities and IEs to be passed to firmware */ 38025e3dd157SKalle Valo struct wmi_bcn_prb_info { 38035e3dd157SKalle Valo /* Capabilities */ 38045e3dd157SKalle Valo __le32 caps; 38055e3dd157SKalle Valo /* ERP info */ 38065e3dd157SKalle Valo __le32 erp; 38075e3dd157SKalle Valo /* Advanced capabilities */ 38085e3dd157SKalle Valo /* HT capabilities */ 38095e3dd157SKalle Valo /* HT Info */ 38105e3dd157SKalle Valo /* ibss_dfs */ 38115e3dd157SKalle Valo /* wpa Info */ 38125e3dd157SKalle Valo /* rsn Info */ 38135e3dd157SKalle Valo /* rrm info */ 38145e3dd157SKalle Valo /* ath_ext */ 38155e3dd157SKalle Valo /* app IE */ 38165e3dd157SKalle Valo } __packed; 38175e3dd157SKalle Valo 38185e3dd157SKalle Valo struct wmi_bcn_tmpl_cmd { 38195e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 38205e3dd157SKalle Valo __le32 vdev_id; 38215e3dd157SKalle Valo /* TIM IE offset from the beginning of the template. */ 38225e3dd157SKalle Valo __le32 tim_ie_offset; 38235e3dd157SKalle Valo /* beacon probe capabilities and IEs */ 38245e3dd157SKalle Valo struct wmi_bcn_prb_info bcn_prb_info; 38255e3dd157SKalle Valo /* beacon buffer length */ 38265e3dd157SKalle Valo __le32 buf_len; 38275e3dd157SKalle Valo /* variable length data */ 38285e3dd157SKalle Valo u8 data[1]; 38295e3dd157SKalle Valo } __packed; 38305e3dd157SKalle Valo 38315e3dd157SKalle Valo struct wmi_prb_tmpl_cmd { 38325e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 38335e3dd157SKalle Valo __le32 vdev_id; 38345e3dd157SKalle Valo /* beacon probe capabilities and IEs */ 38355e3dd157SKalle Valo struct wmi_bcn_prb_info bcn_prb_info; 38365e3dd157SKalle Valo /* beacon buffer length */ 38375e3dd157SKalle Valo __le32 buf_len; 38385e3dd157SKalle Valo /* Variable length data */ 38395e3dd157SKalle Valo u8 data[1]; 38405e3dd157SKalle Valo } __packed; 38415e3dd157SKalle Valo 38425e3dd157SKalle Valo enum wmi_sta_ps_mode { 38435e3dd157SKalle Valo /* enable power save for the given STA VDEV */ 38445e3dd157SKalle Valo WMI_STA_PS_MODE_DISABLED = 0, 38455e3dd157SKalle Valo /* disable power save for a given STA VDEV */ 38465e3dd157SKalle Valo WMI_STA_PS_MODE_ENABLED = 1, 38475e3dd157SKalle Valo }; 38485e3dd157SKalle Valo 38495e3dd157SKalle Valo struct wmi_sta_powersave_mode_cmd { 38505e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 38515e3dd157SKalle Valo __le32 vdev_id; 38525e3dd157SKalle Valo 38535e3dd157SKalle Valo /* 38545e3dd157SKalle Valo * Power save mode 38555e3dd157SKalle Valo * (see enum wmi_sta_ps_mode) 38565e3dd157SKalle Valo */ 38575e3dd157SKalle Valo __le32 sta_ps_mode; 38585e3dd157SKalle Valo } __packed; 38595e3dd157SKalle Valo 38605e3dd157SKalle Valo enum wmi_csa_offload_en { 38615e3dd157SKalle Valo WMI_CSA_OFFLOAD_DISABLE = 0, 38625e3dd157SKalle Valo WMI_CSA_OFFLOAD_ENABLE = 1, 38635e3dd157SKalle Valo }; 38645e3dd157SKalle Valo 38655e3dd157SKalle Valo struct wmi_csa_offload_enable_cmd { 38665e3dd157SKalle Valo __le32 vdev_id; 38675e3dd157SKalle Valo __le32 csa_offload_enable; 38685e3dd157SKalle Valo } __packed; 38695e3dd157SKalle Valo 38705e3dd157SKalle Valo struct wmi_csa_offload_chanswitch_cmd { 38715e3dd157SKalle Valo __le32 vdev_id; 38725e3dd157SKalle Valo struct wmi_channel chan; 38735e3dd157SKalle Valo } __packed; 38745e3dd157SKalle Valo 38755e3dd157SKalle Valo /* 38765e3dd157SKalle Valo * This parameter controls the policy for retrieving frames from AP while the 38775e3dd157SKalle Valo * STA is in sleep state. 38785e3dd157SKalle Valo * 38795e3dd157SKalle Valo * Only takes affect if the sta_ps_mode is enabled 38805e3dd157SKalle Valo */ 38815e3dd157SKalle Valo enum wmi_sta_ps_param_rx_wake_policy { 38825e3dd157SKalle Valo /* 38835e3dd157SKalle Valo * Wake up when ever there is an RX activity on the VDEV. In this mode 38845e3dd157SKalle Valo * the Power save SM(state machine) will come out of sleep by either 38855e3dd157SKalle Valo * sending null frame (or) a data frame (with PS==0) in response to TIM 38865e3dd157SKalle Valo * bit set in the received beacon frame from AP. 38875e3dd157SKalle Valo */ 38885e3dd157SKalle Valo WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 38895e3dd157SKalle Valo 38905e3dd157SKalle Valo /* 38915e3dd157SKalle Valo * Here the power save state machine will not wakeup in response to TIM 38925e3dd157SKalle Valo * bit, instead it will send a PSPOLL (or) UASPD trigger based on UAPSD 38935e3dd157SKalle Valo * configuration setup by WMISET_PS_SET_UAPSD WMI command. When all 38945e3dd157SKalle Valo * access categories are delivery-enabled, the station will send a 38955e3dd157SKalle Valo * UAPSD trigger frame, otherwise it will send a PS-Poll. 38965e3dd157SKalle Valo */ 38975e3dd157SKalle Valo WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 38985e3dd157SKalle Valo }; 38995e3dd157SKalle Valo 39005e3dd157SKalle Valo /* 39015e3dd157SKalle Valo * Number of tx frames/beacon that cause the power save SM to wake up. 39025e3dd157SKalle Valo * 39035e3dd157SKalle Valo * Value 1 causes the SM to wake up for every TX. Value 0 has a special 39045e3dd157SKalle Valo * meaning, It will cause the SM to never wake up. This is useful if you want 39055e3dd157SKalle Valo * to keep the system to sleep all the time for some kind of test mode . host 39065e3dd157SKalle Valo * can change this parameter any time. It will affect at the next tx frame. 39075e3dd157SKalle Valo */ 39085e3dd157SKalle Valo enum wmi_sta_ps_param_tx_wake_threshold { 39095e3dd157SKalle Valo WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 39105e3dd157SKalle Valo WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 39115e3dd157SKalle Valo 39125e3dd157SKalle Valo /* 39135e3dd157SKalle Valo * Values greater than one indicate that many TX attempts per beacon 39145e3dd157SKalle Valo * interval before the STA will wake up 39155e3dd157SKalle Valo */ 39165e3dd157SKalle Valo }; 39175e3dd157SKalle Valo 39185e3dd157SKalle Valo /* 39195e3dd157SKalle Valo * The maximum number of PS-Poll frames the FW will send in response to 39205e3dd157SKalle Valo * traffic advertised in TIM before waking up (by sending a null frame with PS 39215e3dd157SKalle Valo * = 0). Value 0 has a special meaning: there is no maximum count and the FW 39225e3dd157SKalle Valo * will send as many PS-Poll as are necessary to retrieve buffered BU. This 39235e3dd157SKalle Valo * parameter is used when the RX wake policy is 39245e3dd157SKalle Valo * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 39255e3dd157SKalle Valo * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 39265e3dd157SKalle Valo */ 39275e3dd157SKalle Valo enum wmi_sta_ps_param_pspoll_count { 39285e3dd157SKalle Valo WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 39295e3dd157SKalle Valo /* 39305e3dd157SKalle Valo * Values greater than 0 indicate the maximum numer of PS-Poll frames 39315e3dd157SKalle Valo * FW will send before waking up. 39325e3dd157SKalle Valo */ 39335e3dd157SKalle Valo }; 39345e3dd157SKalle Valo 39355e3dd157SKalle Valo /* 39365e3dd157SKalle Valo * This will include the delivery and trigger enabled state for every AC. 39375e3dd157SKalle Valo * This is the negotiated state with AP. The host MLME needs to set this based 39385e3dd157SKalle Valo * on AP capability and the state Set in the association request by the 39395e3dd157SKalle Valo * station MLME.Lower 8 bits of the value specify the UAPSD configuration. 39405e3dd157SKalle Valo */ 39415e3dd157SKalle Valo #define WMI_UAPSD_AC_TYPE_DELI 0 39425e3dd157SKalle Valo #define WMI_UAPSD_AC_TYPE_TRIG 1 39435e3dd157SKalle Valo 39445e3dd157SKalle Valo #define WMI_UAPSD_AC_BIT_MASK(ac, type) \ 39455e3dd157SKalle Valo ((type == WMI_UAPSD_AC_TYPE_DELI) ? (1<<(ac<<1)) : (1<<((ac<<1)+1))) 39465e3dd157SKalle Valo 39475e3dd157SKalle Valo enum wmi_sta_ps_param_uapsd { 39485e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 39495e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 39505e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 39515e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 39525e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 39535e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 39545e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 39555e3dd157SKalle Valo WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 39565e3dd157SKalle Valo }; 39575e3dd157SKalle Valo 39585e3dd157SKalle Valo enum wmi_sta_powersave_param { 39595e3dd157SKalle Valo /* 39605e3dd157SKalle Valo * Controls how frames are retrievd from AP while STA is sleeping 39615e3dd157SKalle Valo * 39625e3dd157SKalle Valo * (see enum wmi_sta_ps_param_rx_wake_policy) 39635e3dd157SKalle Valo */ 39645e3dd157SKalle Valo WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 39655e3dd157SKalle Valo 39665e3dd157SKalle Valo /* 39675e3dd157SKalle Valo * The STA will go active after this many TX 39685e3dd157SKalle Valo * 39695e3dd157SKalle Valo * (see enum wmi_sta_ps_param_tx_wake_threshold) 39705e3dd157SKalle Valo */ 39715e3dd157SKalle Valo WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 39725e3dd157SKalle Valo 39735e3dd157SKalle Valo /* 39745e3dd157SKalle Valo * Number of PS-Poll to send before STA wakes up 39755e3dd157SKalle Valo * 39765e3dd157SKalle Valo * (see enum wmi_sta_ps_param_pspoll_count) 39775e3dd157SKalle Valo * 39785e3dd157SKalle Valo */ 39795e3dd157SKalle Valo WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 39805e3dd157SKalle Valo 39815e3dd157SKalle Valo /* 39825e3dd157SKalle Valo * TX/RX inactivity time in msec before going to sleep. 39835e3dd157SKalle Valo * 39845e3dd157SKalle Valo * The power save SM will monitor tx/rx activity on the VDEV, if no 39855e3dd157SKalle Valo * activity for the specified msec of the parameter the Power save 39865e3dd157SKalle Valo * SM will go to sleep. 39875e3dd157SKalle Valo */ 39885e3dd157SKalle Valo WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 39895e3dd157SKalle Valo 39905e3dd157SKalle Valo /* 39915e3dd157SKalle Valo * Set uapsd configuration. 39925e3dd157SKalle Valo * 39935e3dd157SKalle Valo * (see enum wmi_sta_ps_param_uapsd) 39945e3dd157SKalle Valo */ 39955e3dd157SKalle Valo WMI_STA_PS_PARAM_UAPSD = 4, 39965e3dd157SKalle Valo }; 39975e3dd157SKalle Valo 39985e3dd157SKalle Valo struct wmi_sta_powersave_param_cmd { 39995e3dd157SKalle Valo __le32 vdev_id; 40005e3dd157SKalle Valo __le32 param_id; /* %WMI_STA_PS_PARAM_ */ 40015e3dd157SKalle Valo __le32 param_value; 40025e3dd157SKalle Valo } __packed; 40035e3dd157SKalle Valo 40045e3dd157SKalle Valo /* No MIMO power save */ 40055e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_DISABLE 40065e3dd157SKalle Valo /* mimo powersave mode static*/ 40075e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_STATIC 40085e3dd157SKalle Valo /* mimo powersave mode dynamic */ 40095e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_DYNAMIC 40105e3dd157SKalle Valo 40115e3dd157SKalle Valo struct wmi_sta_mimo_ps_mode_cmd { 40125e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 40135e3dd157SKalle Valo __le32 vdev_id; 40145e3dd157SKalle Valo /* mimo powersave mode as defined above */ 40155e3dd157SKalle Valo __le32 mimo_pwrsave_mode; 40165e3dd157SKalle Valo } __packed; 40175e3dd157SKalle Valo 40185e3dd157SKalle Valo /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 40195e3dd157SKalle Valo enum wmi_ap_ps_param_uapsd { 40205e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 40215e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 40225e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 40235e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 40245e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 40255e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 40265e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 40275e3dd157SKalle Valo WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 40285e3dd157SKalle Valo }; 40295e3dd157SKalle Valo 40305e3dd157SKalle Valo /* U-APSD maximum service period of peer station */ 40315e3dd157SKalle Valo enum wmi_ap_ps_peer_param_max_sp { 40325e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 40335e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 40345e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 40355e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 40365e3dd157SKalle Valo MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 40375e3dd157SKalle Valo }; 40385e3dd157SKalle Valo 40395e3dd157SKalle Valo /* 40405e3dd157SKalle Valo * AP power save parameter 40415e3dd157SKalle Valo * Set a power save specific parameter for a peer station 40425e3dd157SKalle Valo */ 40435e3dd157SKalle Valo enum wmi_ap_ps_peer_param { 40445e3dd157SKalle Valo /* Set uapsd configuration for a given peer. 40455e3dd157SKalle Valo * 40465e3dd157SKalle Valo * Include the delivery and trigger enabled state for every AC. 40475e3dd157SKalle Valo * The host MLME needs to set this based on AP capability and stations 40485e3dd157SKalle Valo * request Set in the association request received from the station. 40495e3dd157SKalle Valo * 40505e3dd157SKalle Valo * Lower 8 bits of the value specify the UAPSD configuration. 40515e3dd157SKalle Valo * 40525e3dd157SKalle Valo * (see enum wmi_ap_ps_param_uapsd) 40535e3dd157SKalle Valo * The default value is 0. 40545e3dd157SKalle Valo */ 40555e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_UAPSD = 0, 40565e3dd157SKalle Valo 40575e3dd157SKalle Valo /* 40585e3dd157SKalle Valo * Set the service period for a UAPSD capable station 40595e3dd157SKalle Valo * 40605e3dd157SKalle Valo * The service period from wme ie in the (re)assoc request frame. 40615e3dd157SKalle Valo * 40625e3dd157SKalle Valo * (see enum wmi_ap_ps_peer_param_max_sp) 40635e3dd157SKalle Valo */ 40645e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 40655e3dd157SKalle Valo 40665e3dd157SKalle Valo /* Time in seconds for aging out buffered frames for STA in PS */ 40675e3dd157SKalle Valo WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 40685e3dd157SKalle Valo }; 40695e3dd157SKalle Valo 40705e3dd157SKalle Valo struct wmi_ap_ps_peer_cmd { 40715e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 40725e3dd157SKalle Valo __le32 vdev_id; 40735e3dd157SKalle Valo 40745e3dd157SKalle Valo /* peer MAC address */ 40755e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 40765e3dd157SKalle Valo 40775e3dd157SKalle Valo /* AP powersave param (see enum wmi_ap_ps_peer_param) */ 40785e3dd157SKalle Valo __le32 param_id; 40795e3dd157SKalle Valo 40805e3dd157SKalle Valo /* AP powersave param value */ 40815e3dd157SKalle Valo __le32 param_value; 40825e3dd157SKalle Valo } __packed; 40835e3dd157SKalle Valo 40845e3dd157SKalle Valo /* 128 clients = 4 words */ 40855e3dd157SKalle Valo #define WMI_TIM_BITMAP_ARRAY_SIZE 4 40865e3dd157SKalle Valo 40875e3dd157SKalle Valo struct wmi_tim_info { 40885e3dd157SKalle Valo __le32 tim_len; 40895e3dd157SKalle Valo __le32 tim_mcast; 40905e3dd157SKalle Valo __le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE]; 40915e3dd157SKalle Valo __le32 tim_changed; 40925e3dd157SKalle Valo __le32 tim_num_ps_pending; 40935e3dd157SKalle Valo } __packed; 40945e3dd157SKalle Valo 40955e3dd157SKalle Valo /* Maximum number of NOA Descriptors supported */ 40965e3dd157SKalle Valo #define WMI_P2P_MAX_NOA_DESCRIPTORS 4 40975e3dd157SKalle Valo #define WMI_P2P_OPPPS_ENABLE_BIT BIT(0) 40985e3dd157SKalle Valo #define WMI_P2P_OPPPS_CTWINDOW_OFFSET 1 40995e3dd157SKalle Valo #define WMI_P2P_NOA_CHANGED_BIT BIT(0) 41005e3dd157SKalle Valo 41015e3dd157SKalle Valo struct wmi_p2p_noa_info { 41025e3dd157SKalle Valo /* Bit 0 - Flag to indicate an update in NOA schedule 41035e3dd157SKalle Valo Bits 7-1 - Reserved */ 41045e3dd157SKalle Valo u8 changed; 41055e3dd157SKalle Valo /* NOA index */ 41065e3dd157SKalle Valo u8 index; 41075e3dd157SKalle Valo /* Bit 0 - Opp PS state of the AP 41085e3dd157SKalle Valo Bits 1-7 - Ctwindow in TUs */ 41095e3dd157SKalle Valo u8 ctwindow_oppps; 41105e3dd157SKalle Valo /* Number of NOA descriptors */ 41115e3dd157SKalle Valo u8 num_descriptors; 41125e3dd157SKalle Valo 41135e3dd157SKalle Valo struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS]; 41145e3dd157SKalle Valo } __packed; 41155e3dd157SKalle Valo 41165e3dd157SKalle Valo struct wmi_bcn_info { 41175e3dd157SKalle Valo struct wmi_tim_info tim_info; 41185e3dd157SKalle Valo struct wmi_p2p_noa_info p2p_noa_info; 41195e3dd157SKalle Valo } __packed; 41205e3dd157SKalle Valo 41215e3dd157SKalle Valo struct wmi_host_swba_event { 41225e3dd157SKalle Valo __le32 vdev_map; 412332653cf1SMichal Kazior struct wmi_bcn_info bcn_info[0]; 41245e3dd157SKalle Valo } __packed; 41255e3dd157SKalle Valo 41265e3dd157SKalle Valo #define WMI_MAX_AP_VDEV 16 41275e3dd157SKalle Valo 41285e3dd157SKalle Valo struct wmi_tbtt_offset_event { 41295e3dd157SKalle Valo __le32 vdev_map; 41305e3dd157SKalle Valo __le32 tbttoffset_list[WMI_MAX_AP_VDEV]; 41315e3dd157SKalle Valo } __packed; 41325e3dd157SKalle Valo 41335e3dd157SKalle Valo struct wmi_peer_create_cmd { 41345e3dd157SKalle Valo __le32 vdev_id; 41355e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 41365e3dd157SKalle Valo } __packed; 41375e3dd157SKalle Valo 41385e3dd157SKalle Valo struct wmi_peer_delete_cmd { 41395e3dd157SKalle Valo __le32 vdev_id; 41405e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 41415e3dd157SKalle Valo } __packed; 41425e3dd157SKalle Valo 41435e3dd157SKalle Valo struct wmi_peer_flush_tids_cmd { 41445e3dd157SKalle Valo __le32 vdev_id; 41455e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 41465e3dd157SKalle Valo __le32 peer_tid_bitmap; 41475e3dd157SKalle Valo } __packed; 41485e3dd157SKalle Valo 41495e3dd157SKalle Valo struct wmi_fixed_rate { 41505e3dd157SKalle Valo /* 41515e3dd157SKalle Valo * rate mode . 0: disable fixed rate (auto rate) 41525e3dd157SKalle Valo * 1: legacy (non 11n) rate specified as ieee rate 2*Mbps 41535e3dd157SKalle Valo * 2: ht20 11n rate specified as mcs index 41545e3dd157SKalle Valo * 3: ht40 11n rate specified as mcs index 41555e3dd157SKalle Valo */ 41565e3dd157SKalle Valo __le32 rate_mode; 41575e3dd157SKalle Valo /* 41585e3dd157SKalle Valo * 4 rate values for 4 rate series. series 0 is stored in byte 0 (LSB) 41595e3dd157SKalle Valo * and series 3 is stored at byte 3 (MSB) 41605e3dd157SKalle Valo */ 41615e3dd157SKalle Valo __le32 rate_series; 41625e3dd157SKalle Valo /* 41635e3dd157SKalle Valo * 4 retry counts for 4 rate series. retry count for rate 0 is stored 41645e3dd157SKalle Valo * in byte 0 (LSB) and retry count for rate 3 is stored at byte 3 41655e3dd157SKalle Valo * (MSB) 41665e3dd157SKalle Valo */ 41675e3dd157SKalle Valo __le32 rate_retries; 41685e3dd157SKalle Valo } __packed; 41695e3dd157SKalle Valo 41705e3dd157SKalle Valo struct wmi_peer_fixed_rate_cmd { 41715e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 41725e3dd157SKalle Valo __le32 vdev_id; 41735e3dd157SKalle Valo /* peer MAC address */ 41745e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 41755e3dd157SKalle Valo /* fixed rate */ 41765e3dd157SKalle Valo struct wmi_fixed_rate peer_fixed_rate; 41775e3dd157SKalle Valo } __packed; 41785e3dd157SKalle Valo 41795e3dd157SKalle Valo #define WMI_MGMT_TID 17 41805e3dd157SKalle Valo 41815e3dd157SKalle Valo struct wmi_addba_clear_resp_cmd { 41825e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 41835e3dd157SKalle Valo __le32 vdev_id; 41845e3dd157SKalle Valo /* peer MAC address */ 41855e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 41865e3dd157SKalle Valo } __packed; 41875e3dd157SKalle Valo 41885e3dd157SKalle Valo struct wmi_addba_send_cmd { 41895e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 41905e3dd157SKalle Valo __le32 vdev_id; 41915e3dd157SKalle Valo /* peer MAC address */ 41925e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 41935e3dd157SKalle Valo /* Tid number */ 41945e3dd157SKalle Valo __le32 tid; 41955e3dd157SKalle Valo /* Buffer/Window size*/ 41965e3dd157SKalle Valo __le32 buffersize; 41975e3dd157SKalle Valo } __packed; 41985e3dd157SKalle Valo 41995e3dd157SKalle Valo struct wmi_delba_send_cmd { 42005e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 42015e3dd157SKalle Valo __le32 vdev_id; 42025e3dd157SKalle Valo /* peer MAC address */ 42035e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 42045e3dd157SKalle Valo /* Tid number */ 42055e3dd157SKalle Valo __le32 tid; 42065e3dd157SKalle Valo /* Is Initiator */ 42075e3dd157SKalle Valo __le32 initiator; 42085e3dd157SKalle Valo /* Reason code */ 42095e3dd157SKalle Valo __le32 reasoncode; 42105e3dd157SKalle Valo } __packed; 42115e3dd157SKalle Valo 42125e3dd157SKalle Valo struct wmi_addba_setresponse_cmd { 42135e3dd157SKalle Valo /* unique id identifying the vdev, generated by the caller */ 42145e3dd157SKalle Valo __le32 vdev_id; 42155e3dd157SKalle Valo /* peer mac address */ 42165e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 42175e3dd157SKalle Valo /* Tid number */ 42185e3dd157SKalle Valo __le32 tid; 42195e3dd157SKalle Valo /* status code */ 42205e3dd157SKalle Valo __le32 statuscode; 42215e3dd157SKalle Valo } __packed; 42225e3dd157SKalle Valo 42235e3dd157SKalle Valo struct wmi_send_singleamsdu_cmd { 42245e3dd157SKalle Valo /* unique id identifying the vdev, generated by the caller */ 42255e3dd157SKalle Valo __le32 vdev_id; 42265e3dd157SKalle Valo /* peer mac address */ 42275e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 42285e3dd157SKalle Valo /* Tid number */ 42295e3dd157SKalle Valo __le32 tid; 42305e3dd157SKalle Valo } __packed; 42315e3dd157SKalle Valo 42325e3dd157SKalle Valo enum wmi_peer_smps_state { 42335e3dd157SKalle Valo WMI_PEER_SMPS_PS_NONE = 0x0, 42345e3dd157SKalle Valo WMI_PEER_SMPS_STATIC = 0x1, 42355e3dd157SKalle Valo WMI_PEER_SMPS_DYNAMIC = 0x2 42365e3dd157SKalle Valo }; 42375e3dd157SKalle Valo 42389797febcSMichal Kazior enum wmi_peer_chwidth { 42399797febcSMichal Kazior WMI_PEER_CHWIDTH_20MHZ = 0, 42409797febcSMichal Kazior WMI_PEER_CHWIDTH_40MHZ = 1, 42419797febcSMichal Kazior WMI_PEER_CHWIDTH_80MHZ = 2, 42429797febcSMichal Kazior }; 42439797febcSMichal Kazior 42445e3dd157SKalle Valo enum wmi_peer_param { 42455e3dd157SKalle Valo WMI_PEER_SMPS_STATE = 0x1, /* see %wmi_peer_smps_state */ 42465e3dd157SKalle Valo WMI_PEER_AMPDU = 0x2, 42475e3dd157SKalle Valo WMI_PEER_AUTHORIZE = 0x3, 42485e3dd157SKalle Valo WMI_PEER_CHAN_WIDTH = 0x4, 42495e3dd157SKalle Valo WMI_PEER_NSS = 0x5, 42505e3dd157SKalle Valo WMI_PEER_USE_4ADDR = 0x6 42515e3dd157SKalle Valo }; 42525e3dd157SKalle Valo 42535e3dd157SKalle Valo struct wmi_peer_set_param_cmd { 42545e3dd157SKalle Valo __le32 vdev_id; 42555e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 42565e3dd157SKalle Valo __le32 param_id; 42575e3dd157SKalle Valo __le32 param_value; 42585e3dd157SKalle Valo } __packed; 42595e3dd157SKalle Valo 42605e3dd157SKalle Valo #define MAX_SUPPORTED_RATES 128 42615e3dd157SKalle Valo 42625e3dd157SKalle Valo struct wmi_rate_set { 42635e3dd157SKalle Valo /* total number of rates */ 42645e3dd157SKalle Valo __le32 num_rates; 42655e3dd157SKalle Valo /* 42665e3dd157SKalle Valo * rates (each 8bit value) packed into a 32 bit word. 42675e3dd157SKalle Valo * the rates are filled from least significant byte to most 42685e3dd157SKalle Valo * significant byte. 42695e3dd157SKalle Valo */ 42705e3dd157SKalle Valo __le32 rates[(MAX_SUPPORTED_RATES/4)+1]; 42715e3dd157SKalle Valo } __packed; 42725e3dd157SKalle Valo 42735e3dd157SKalle Valo struct wmi_rate_set_arg { 42745e3dd157SKalle Valo unsigned int num_rates; 42755e3dd157SKalle Valo u8 rates[MAX_SUPPORTED_RATES]; 42765e3dd157SKalle Valo }; 42775e3dd157SKalle Valo 42785e3dd157SKalle Valo /* 42795e3dd157SKalle Valo * NOTE: It would bea good idea to represent the Tx MCS 42805e3dd157SKalle Valo * info in one word and Rx in another word. This is split 42815e3dd157SKalle Valo * into multiple words for convenience 42825e3dd157SKalle Valo */ 42835e3dd157SKalle Valo struct wmi_vht_rate_set { 42845e3dd157SKalle Valo __le32 rx_max_rate; /* Max Rx data rate */ 42855e3dd157SKalle Valo __le32 rx_mcs_set; /* Negotiated RX VHT rates */ 42865e3dd157SKalle Valo __le32 tx_max_rate; /* Max Tx data rate */ 42875e3dd157SKalle Valo __le32 tx_mcs_set; /* Negotiated TX VHT rates */ 42885e3dd157SKalle Valo } __packed; 42895e3dd157SKalle Valo 42905e3dd157SKalle Valo struct wmi_vht_rate_set_arg { 42915e3dd157SKalle Valo u32 rx_max_rate; 42925e3dd157SKalle Valo u32 rx_mcs_set; 42935e3dd157SKalle Valo u32 tx_max_rate; 42945e3dd157SKalle Valo u32 tx_mcs_set; 42955e3dd157SKalle Valo }; 42965e3dd157SKalle Valo 42975e3dd157SKalle Valo struct wmi_peer_set_rates_cmd { 42985e3dd157SKalle Valo /* peer MAC address */ 42995e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 43005e3dd157SKalle Valo /* legacy rate set */ 43015e3dd157SKalle Valo struct wmi_rate_set peer_legacy_rates; 43025e3dd157SKalle Valo /* ht rate set */ 43035e3dd157SKalle Valo struct wmi_rate_set peer_ht_rates; 43045e3dd157SKalle Valo } __packed; 43055e3dd157SKalle Valo 43065e3dd157SKalle Valo struct wmi_peer_set_q_empty_callback_cmd { 43075e3dd157SKalle Valo /* unique id identifying the VDEV, generated by the caller */ 43085e3dd157SKalle Valo __le32 vdev_id; 43095e3dd157SKalle Valo /* peer MAC address */ 43105e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 43115e3dd157SKalle Valo __le32 callback_enable; 43125e3dd157SKalle Valo } __packed; 43135e3dd157SKalle Valo 43145e3dd157SKalle Valo #define WMI_PEER_AUTH 0x00000001 43155e3dd157SKalle Valo #define WMI_PEER_QOS 0x00000002 43165e3dd157SKalle Valo #define WMI_PEER_NEED_PTK_4_WAY 0x00000004 43175e3dd157SKalle Valo #define WMI_PEER_NEED_GTK_2_WAY 0x00000010 43185e3dd157SKalle Valo #define WMI_PEER_APSD 0x00000800 43195e3dd157SKalle Valo #define WMI_PEER_HT 0x00001000 43205e3dd157SKalle Valo #define WMI_PEER_40MHZ 0x00002000 43215e3dd157SKalle Valo #define WMI_PEER_STBC 0x00008000 43225e3dd157SKalle Valo #define WMI_PEER_LDPC 0x00010000 43235e3dd157SKalle Valo #define WMI_PEER_DYN_MIMOPS 0x00020000 43245e3dd157SKalle Valo #define WMI_PEER_STATIC_MIMOPS 0x00040000 43255e3dd157SKalle Valo #define WMI_PEER_SPATIAL_MUX 0x00200000 43265e3dd157SKalle Valo #define WMI_PEER_VHT 0x02000000 43275e3dd157SKalle Valo #define WMI_PEER_80MHZ 0x04000000 43285e3dd157SKalle Valo #define WMI_PEER_PMF 0x08000000 43295e3dd157SKalle Valo 43305e3dd157SKalle Valo /* 43315e3dd157SKalle Valo * Peer rate capabilities. 43325e3dd157SKalle Valo * 43335e3dd157SKalle Valo * This is of interest to the ratecontrol 43345e3dd157SKalle Valo * module which resides in the firmware. The bit definitions are 43355e3dd157SKalle Valo * consistent with that defined in if_athrate.c. 43365e3dd157SKalle Valo */ 43375e3dd157SKalle Valo #define WMI_RC_DS_FLAG 0x01 43385e3dd157SKalle Valo #define WMI_RC_CW40_FLAG 0x02 43395e3dd157SKalle Valo #define WMI_RC_SGI_FLAG 0x04 43405e3dd157SKalle Valo #define WMI_RC_HT_FLAG 0x08 43415e3dd157SKalle Valo #define WMI_RC_RTSCTS_FLAG 0x10 43425e3dd157SKalle Valo #define WMI_RC_TX_STBC_FLAG 0x20 43435e3dd157SKalle Valo #define WMI_RC_RX_STBC_FLAG 0xC0 43445e3dd157SKalle Valo #define WMI_RC_RX_STBC_FLAG_S 6 43455e3dd157SKalle Valo #define WMI_RC_WEP_TKIP_FLAG 0x100 43465e3dd157SKalle Valo #define WMI_RC_TS_FLAG 0x200 43475e3dd157SKalle Valo #define WMI_RC_UAPSD_FLAG 0x400 43485e3dd157SKalle Valo 43495e3dd157SKalle Valo /* Maximum listen interval supported by hw in units of beacon interval */ 43505e3dd157SKalle Valo #define ATH10K_MAX_HW_LISTEN_INTERVAL 5 43515e3dd157SKalle Valo 435224c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd { 43535e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 43545e3dd157SKalle Valo __le32 vdev_id; 43555e3dd157SKalle Valo __le32 peer_new_assoc; /* 1=assoc, 0=reassoc */ 43565e3dd157SKalle Valo __le32 peer_associd; /* 16 LSBs */ 43575e3dd157SKalle Valo __le32 peer_flags; 43585e3dd157SKalle Valo __le32 peer_caps; /* 16 LSBs */ 43595e3dd157SKalle Valo __le32 peer_listen_intval; 43605e3dd157SKalle Valo __le32 peer_ht_caps; 43615e3dd157SKalle Valo __le32 peer_max_mpdu; 43625e3dd157SKalle Valo __le32 peer_mpdu_density; /* 0..16 */ 43635e3dd157SKalle Valo __le32 peer_rate_caps; 43645e3dd157SKalle Valo struct wmi_rate_set peer_legacy_rates; 43655e3dd157SKalle Valo struct wmi_rate_set peer_ht_rates; 43665e3dd157SKalle Valo __le32 peer_nss; /* num of spatial streams */ 43675e3dd157SKalle Valo __le32 peer_vht_caps; 43685e3dd157SKalle Valo __le32 peer_phymode; 43695e3dd157SKalle Valo struct wmi_vht_rate_set peer_vht_rates; 437024c88f78SMichal Kazior }; 437124c88f78SMichal Kazior 437224c88f78SMichal Kazior struct wmi_main_peer_assoc_complete_cmd { 437324c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd cmd; 437424c88f78SMichal Kazior 43755e3dd157SKalle Valo /* HT Operation Element of the peer. Five bytes packed in 2 43765e3dd157SKalle Valo * INT32 array and filled from lsb to msb. */ 43775e3dd157SKalle Valo __le32 peer_ht_info[2]; 43785e3dd157SKalle Valo } __packed; 43795e3dd157SKalle Valo 438024c88f78SMichal Kazior struct wmi_10_1_peer_assoc_complete_cmd { 438124c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd cmd; 438224c88f78SMichal Kazior } __packed; 438324c88f78SMichal Kazior 438424c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0 438524c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f 438624c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4 438724c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0 438824c88f78SMichal Kazior 438924c88f78SMichal Kazior struct wmi_10_2_peer_assoc_complete_cmd { 439024c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd cmd; 439124c88f78SMichal Kazior __le32 info0; /* WMI_PEER_ASSOC_INFO0_ */ 439224c88f78SMichal Kazior } __packed; 439324c88f78SMichal Kazior 43945e3dd157SKalle Valo struct wmi_peer_assoc_complete_arg { 43955e3dd157SKalle Valo u8 addr[ETH_ALEN]; 43965e3dd157SKalle Valo u32 vdev_id; 43975e3dd157SKalle Valo bool peer_reassoc; 43985e3dd157SKalle Valo u16 peer_aid; 43995e3dd157SKalle Valo u32 peer_flags; /* see %WMI_PEER_ */ 44005e3dd157SKalle Valo u16 peer_caps; 44015e3dd157SKalle Valo u32 peer_listen_intval; 44025e3dd157SKalle Valo u32 peer_ht_caps; 44035e3dd157SKalle Valo u32 peer_max_mpdu; 44045e3dd157SKalle Valo u32 peer_mpdu_density; /* 0..16 */ 44055e3dd157SKalle Valo u32 peer_rate_caps; /* see %WMI_RC_ */ 44065e3dd157SKalle Valo struct wmi_rate_set_arg peer_legacy_rates; 44075e3dd157SKalle Valo struct wmi_rate_set_arg peer_ht_rates; 44085e3dd157SKalle Valo u32 peer_num_spatial_streams; 44095e3dd157SKalle Valo u32 peer_vht_caps; 44105e3dd157SKalle Valo enum wmi_phy_mode peer_phymode; 44115e3dd157SKalle Valo struct wmi_vht_rate_set_arg peer_vht_rates; 44125e3dd157SKalle Valo }; 44135e3dd157SKalle Valo 44145e3dd157SKalle Valo struct wmi_peer_add_wds_entry_cmd { 44155e3dd157SKalle Valo /* peer MAC address */ 44165e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 44175e3dd157SKalle Valo /* wds MAC addr */ 44185e3dd157SKalle Valo struct wmi_mac_addr wds_macaddr; 44195e3dd157SKalle Valo } __packed; 44205e3dd157SKalle Valo 44215e3dd157SKalle Valo struct wmi_peer_remove_wds_entry_cmd { 44225e3dd157SKalle Valo /* wds MAC addr */ 44235e3dd157SKalle Valo struct wmi_mac_addr wds_macaddr; 44245e3dd157SKalle Valo } __packed; 44255e3dd157SKalle Valo 44265e3dd157SKalle Valo struct wmi_peer_q_empty_callback_event { 44275e3dd157SKalle Valo /* peer MAC address */ 44285e3dd157SKalle Valo struct wmi_mac_addr peer_macaddr; 44295e3dd157SKalle Valo } __packed; 44305e3dd157SKalle Valo 44315e3dd157SKalle Valo /* 44325e3dd157SKalle Valo * Channel info WMI event 44335e3dd157SKalle Valo */ 44345e3dd157SKalle Valo struct wmi_chan_info_event { 44355e3dd157SKalle Valo __le32 err_code; 44365e3dd157SKalle Valo __le32 freq; 44375e3dd157SKalle Valo __le32 cmd_flags; 44385e3dd157SKalle Valo __le32 noise_floor; 44395e3dd157SKalle Valo __le32 rx_clear_count; 44405e3dd157SKalle Valo __le32 cycle_count; 44415e3dd157SKalle Valo } __packed; 44425e3dd157SKalle Valo 44435a13e76eSKalle Valo struct wmi_peer_sta_kickout_event { 44445a13e76eSKalle Valo struct wmi_mac_addr peer_macaddr; 44455a13e76eSKalle Valo } __packed; 44465a13e76eSKalle Valo 44472e1dea40SMichal Kazior #define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0) 44482e1dea40SMichal Kazior 44492e1dea40SMichal Kazior /* FIXME: empirically extrapolated */ 44502e1dea40SMichal Kazior #define WMI_CHAN_INFO_MSEC(x) ((x) / 76595) 44512e1dea40SMichal Kazior 44525e3dd157SKalle Valo /* Beacon filter wmi command info */ 44535e3dd157SKalle Valo #define BCN_FLT_MAX_SUPPORTED_IES 256 44545e3dd157SKalle Valo #define BCN_FLT_MAX_ELEMS_IE_LIST (BCN_FLT_MAX_SUPPORTED_IES / 32) 44555e3dd157SKalle Valo 44565e3dd157SKalle Valo struct bss_bcn_stats { 44575e3dd157SKalle Valo __le32 vdev_id; 44585e3dd157SKalle Valo __le32 bss_bcnsdropped; 44595e3dd157SKalle Valo __le32 bss_bcnsdelivered; 44605e3dd157SKalle Valo } __packed; 44615e3dd157SKalle Valo 44625e3dd157SKalle Valo struct bcn_filter_stats { 44635e3dd157SKalle Valo __le32 bcns_dropped; 44645e3dd157SKalle Valo __le32 bcns_delivered; 44655e3dd157SKalle Valo __le32 activefilters; 44665e3dd157SKalle Valo struct bss_bcn_stats bss_stats; 44675e3dd157SKalle Valo } __packed; 44685e3dd157SKalle Valo 44695e3dd157SKalle Valo struct wmi_add_bcn_filter_cmd { 44705e3dd157SKalle Valo u32 vdev_id; 44715e3dd157SKalle Valo u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST]; 44725e3dd157SKalle Valo } __packed; 44735e3dd157SKalle Valo 44745e3dd157SKalle Valo enum wmi_sta_keepalive_method { 44755e3dd157SKalle Valo WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1, 44765e3dd157SKalle Valo WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2, 44775e3dd157SKalle Valo }; 44785e3dd157SKalle Valo 44795e3dd157SKalle Valo /* note: ip4 addresses are in network byte order, i.e. big endian */ 44805e3dd157SKalle Valo struct wmi_sta_keepalive_arp_resp { 44815e3dd157SKalle Valo __be32 src_ip4_addr; 44825e3dd157SKalle Valo __be32 dest_ip4_addr; 44835e3dd157SKalle Valo struct wmi_mac_addr dest_mac_addr; 44845e3dd157SKalle Valo } __packed; 44855e3dd157SKalle Valo 44865e3dd157SKalle Valo struct wmi_sta_keepalive_cmd { 44875e3dd157SKalle Valo __le32 vdev_id; 44885e3dd157SKalle Valo __le32 enabled; 44895e3dd157SKalle Valo __le32 method; /* WMI_STA_KEEPALIVE_METHOD_ */ 44905e3dd157SKalle Valo __le32 interval; /* in seconds */ 44915e3dd157SKalle Valo struct wmi_sta_keepalive_arp_resp arp_resp; 44925e3dd157SKalle Valo } __packed; 44935e3dd157SKalle Valo 44949cfbce75SMichal Kazior enum wmi_force_fw_hang_type { 44959cfbce75SMichal Kazior WMI_FORCE_FW_HANG_ASSERT = 1, 44969cfbce75SMichal Kazior WMI_FORCE_FW_HANG_NO_DETECT, 44979cfbce75SMichal Kazior WMI_FORCE_FW_HANG_CTRL_EP_FULL, 44989cfbce75SMichal Kazior WMI_FORCE_FW_HANG_EMPTY_POINT, 44999cfbce75SMichal Kazior WMI_FORCE_FW_HANG_STACK_OVERFLOW, 45009cfbce75SMichal Kazior WMI_FORCE_FW_HANG_INFINITE_LOOP, 45019cfbce75SMichal Kazior }; 45029cfbce75SMichal Kazior 45039cfbce75SMichal Kazior #define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF 45049cfbce75SMichal Kazior 45059cfbce75SMichal Kazior struct wmi_force_fw_hang_cmd { 45069cfbce75SMichal Kazior __le32 type; 45079cfbce75SMichal Kazior __le32 delay_ms; 45089cfbce75SMichal Kazior } __packed; 45099cfbce75SMichal Kazior 4510f118a3e5SKalle Valo enum ath10k_dbglog_level { 4511f118a3e5SKalle Valo ATH10K_DBGLOG_LEVEL_VERBOSE = 0, 4512f118a3e5SKalle Valo ATH10K_DBGLOG_LEVEL_INFO = 1, 4513f118a3e5SKalle Valo ATH10K_DBGLOG_LEVEL_WARN = 2, 4514f118a3e5SKalle Valo ATH10K_DBGLOG_LEVEL_ERR = 3, 4515f118a3e5SKalle Valo }; 4516f118a3e5SKalle Valo 4517f118a3e5SKalle Valo /* VAP ids to enable dbglog */ 4518f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_VAP_LOG_LSB 0 4519f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_VAP_LOG_MASK 0x0000ffff 4520f118a3e5SKalle Valo 4521f118a3e5SKalle Valo /* to enable dbglog in the firmware */ 4522f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB 16 4523f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK 0x00010000 4524f118a3e5SKalle Valo 4525f118a3e5SKalle Valo /* timestamp resolution */ 4526f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_RESOLUTION_LSB 17 4527f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_RESOLUTION_MASK 0x000E0000 4528f118a3e5SKalle Valo 4529f118a3e5SKalle Valo /* number of queued messages before sending them to the host */ 4530f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB 20 4531f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK 0x0ff00000 4532f118a3e5SKalle Valo 4533f118a3e5SKalle Valo /* 4534f118a3e5SKalle Valo * Log levels to enable. This defines the minimum level to enable, this is 4535f118a3e5SKalle Valo * not a bitmask. See enum ath10k_dbglog_level for the values. 4536f118a3e5SKalle Valo */ 4537f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_LOG_LVL_LSB 28 4538f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_LOG_LVL_MASK 0x70000000 4539f118a3e5SKalle Valo 4540f118a3e5SKalle Valo /* 4541f118a3e5SKalle Valo * Note: this is a cleaned up version of a struct firmware uses. For 4542f118a3e5SKalle Valo * example, config_valid was hidden inside an array. 4543f118a3e5SKalle Valo */ 4544f118a3e5SKalle Valo struct wmi_dbglog_cfg_cmd { 4545f118a3e5SKalle Valo /* bitmask to hold mod id config*/ 4546f118a3e5SKalle Valo __le32 module_enable; 4547f118a3e5SKalle Valo 4548f118a3e5SKalle Valo /* see ATH10K_DBGLOG_CFG_ */ 4549f118a3e5SKalle Valo __le32 config_enable; 4550f118a3e5SKalle Valo 4551f118a3e5SKalle Valo /* mask of module id bits to be changed */ 4552f118a3e5SKalle Valo __le32 module_valid; 4553f118a3e5SKalle Valo 4554f118a3e5SKalle Valo /* mask of config bits to be changed, see ATH10K_DBGLOG_CFG_ */ 4555f118a3e5SKalle Valo __le32 config_valid; 4556f118a3e5SKalle Valo } __packed; 4557f118a3e5SKalle Valo 45585e3dd157SKalle Valo #define ATH10K_FRAGMT_THRESHOLD_MIN 540 45595e3dd157SKalle Valo #define ATH10K_FRAGMT_THRESHOLD_MAX 2346 45605e3dd157SKalle Valo 45615e3dd157SKalle Valo #define WMI_MAX_EVENT 0x1000 45625e3dd157SKalle Valo /* Maximum number of pending TXed WMI packets */ 45635e3dd157SKalle Valo #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 45645e3dd157SKalle Valo 45655e3dd157SKalle Valo /* By default disable power save for IBSS */ 45665e3dd157SKalle Valo #define ATH10K_DEFAULT_ATIM 0 45675e3dd157SKalle Valo 45685c01aa3dSMichal Kazior #define WMI_MAX_MEM_REQS 16 45695c01aa3dSMichal Kazior 457032653cf1SMichal Kazior struct wmi_scan_ev_arg { 457132653cf1SMichal Kazior __le32 event_type; /* %WMI_SCAN_EVENT_ */ 457232653cf1SMichal Kazior __le32 reason; /* %WMI_SCAN_REASON_ */ 457332653cf1SMichal Kazior __le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 457432653cf1SMichal Kazior __le32 scan_req_id; 457532653cf1SMichal Kazior __le32 scan_id; 457632653cf1SMichal Kazior __le32 vdev_id; 457732653cf1SMichal Kazior }; 457832653cf1SMichal Kazior 457932653cf1SMichal Kazior struct wmi_mgmt_rx_ev_arg { 458032653cf1SMichal Kazior __le32 channel; 458132653cf1SMichal Kazior __le32 snr; 458232653cf1SMichal Kazior __le32 rate; 458332653cf1SMichal Kazior __le32 phy_mode; 458432653cf1SMichal Kazior __le32 buf_len; 458532653cf1SMichal Kazior __le32 status; /* %WMI_RX_STATUS_ */ 458632653cf1SMichal Kazior }; 458732653cf1SMichal Kazior 458832653cf1SMichal Kazior struct wmi_ch_info_ev_arg { 458932653cf1SMichal Kazior __le32 err_code; 459032653cf1SMichal Kazior __le32 freq; 459132653cf1SMichal Kazior __le32 cmd_flags; 459232653cf1SMichal Kazior __le32 noise_floor; 459332653cf1SMichal Kazior __le32 rx_clear_count; 459432653cf1SMichal Kazior __le32 cycle_count; 459532653cf1SMichal Kazior }; 459632653cf1SMichal Kazior 459732653cf1SMichal Kazior struct wmi_vdev_start_ev_arg { 459832653cf1SMichal Kazior __le32 vdev_id; 459932653cf1SMichal Kazior __le32 req_id; 460032653cf1SMichal Kazior __le32 resp_type; /* %WMI_VDEV_RESP_ */ 460132653cf1SMichal Kazior __le32 status; 460232653cf1SMichal Kazior }; 460332653cf1SMichal Kazior 460432653cf1SMichal Kazior struct wmi_peer_kick_ev_arg { 460532653cf1SMichal Kazior const u8 *mac_addr; 460632653cf1SMichal Kazior }; 460732653cf1SMichal Kazior 460832653cf1SMichal Kazior struct wmi_swba_ev_arg { 460932653cf1SMichal Kazior __le32 vdev_map; 461032653cf1SMichal Kazior const struct wmi_tim_info *tim_info[WMI_MAX_AP_VDEV]; 461132653cf1SMichal Kazior const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV]; 461232653cf1SMichal Kazior }; 461332653cf1SMichal Kazior 461432653cf1SMichal Kazior struct wmi_phyerr_ev_arg { 461532653cf1SMichal Kazior __le32 num_phyerrs; 461632653cf1SMichal Kazior __le32 tsf_l32; 461732653cf1SMichal Kazior __le32 tsf_u32; 461832653cf1SMichal Kazior __le32 buf_len; 461932653cf1SMichal Kazior const struct wmi_phyerr *phyerrs; 462032653cf1SMichal Kazior }; 462132653cf1SMichal Kazior 46225c01aa3dSMichal Kazior struct wmi_svc_rdy_ev_arg { 46235c01aa3dSMichal Kazior __le32 min_tx_power; 46245c01aa3dSMichal Kazior __le32 max_tx_power; 46255c01aa3dSMichal Kazior __le32 ht_cap; 46265c01aa3dSMichal Kazior __le32 vht_cap; 46275c01aa3dSMichal Kazior __le32 sw_ver0; 46285c01aa3dSMichal Kazior __le32 sw_ver1; 46295c01aa3dSMichal Kazior __le32 phy_capab; 46305c01aa3dSMichal Kazior __le32 num_rf_chains; 46315c01aa3dSMichal Kazior __le32 eeprom_rd; 46325c01aa3dSMichal Kazior __le32 num_mem_reqs; 46335c01aa3dSMichal Kazior const __le32 *service_map; 46342a3e60d3SMichal Kazior size_t service_map_len; 46355c01aa3dSMichal Kazior const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS]; 46365c01aa3dSMichal Kazior }; 46375c01aa3dSMichal Kazior 463832653cf1SMichal Kazior struct wmi_rdy_ev_arg { 463932653cf1SMichal Kazior __le32 sw_version; 464032653cf1SMichal Kazior __le32 abi_version; 464132653cf1SMichal Kazior __le32 status; 464232653cf1SMichal Kazior const u8 *mac_addr; 464332653cf1SMichal Kazior }; 464432653cf1SMichal Kazior 46455e3dd157SKalle Valo struct ath10k; 46465e3dd157SKalle Valo struct ath10k_vif; 46470226d602SMichal Kazior struct ath10k_fw_stats_pdev; 46480226d602SMichal Kazior struct ath10k_fw_stats_peer; 46495e3dd157SKalle Valo 46505e3dd157SKalle Valo int ath10k_wmi_attach(struct ath10k *ar); 46515e3dd157SKalle Valo void ath10k_wmi_detach(struct ath10k *ar); 46525e3dd157SKalle Valo int ath10k_wmi_wait_for_service_ready(struct ath10k *ar); 46535e3dd157SKalle Valo int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar); 46545e3dd157SKalle Valo 46550226d602SMichal Kazior struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len); 465695bf21f9SMichal Kazior int ath10k_wmi_connect(struct ath10k *ar); 4657666a73f3SKalle Valo 4658666a73f3SKalle Valo struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len); 4659666a73f3SKalle Valo int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id); 4660d7579d12SMichal Kazior int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb, 4661d7579d12SMichal Kazior u32 cmd_id); 46625e3dd157SKalle Valo void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *); 46635e3dd157SKalle Valo 46640226d602SMichal Kazior void ath10k_wmi_pull_pdev_stats(const struct wmi_pdev_stats *src, 46650226d602SMichal Kazior struct ath10k_fw_stats_pdev *dst); 46660226d602SMichal Kazior void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src, 46670226d602SMichal Kazior struct ath10k_fw_stats_peer *dst); 46680226d602SMichal Kazior void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar, 46690226d602SMichal Kazior struct wmi_host_mem_chunks *chunks); 46700226d602SMichal Kazior void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn, 46710226d602SMichal Kazior const struct wmi_start_scan_arg *arg); 46720226d602SMichal Kazior void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params, 46730226d602SMichal Kazior const struct wmi_wmm_params_arg *arg); 46740226d602SMichal Kazior void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch, 46750226d602SMichal Kazior const struct wmi_channel_arg *arg); 46760226d602SMichal Kazior int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg); 46770226d602SMichal Kazior 46780226d602SMichal Kazior int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb); 46790226d602SMichal Kazior int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb); 46800226d602SMichal Kazior void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb); 46810226d602SMichal Kazior void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb); 46820226d602SMichal Kazior int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb); 46830226d602SMichal Kazior void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb); 46840226d602SMichal Kazior void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb); 46850226d602SMichal Kazior void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb); 46860226d602SMichal Kazior void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb); 46870226d602SMichal Kazior void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb); 46880226d602SMichal Kazior void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb); 46890226d602SMichal Kazior void ath10k_wmi_event_dfs(struct ath10k *ar, 46900226d602SMichal Kazior const struct wmi_phyerr *phyerr, u64 tsf); 46910226d602SMichal Kazior void ath10k_wmi_event_spectral_scan(struct ath10k *ar, 46920226d602SMichal Kazior const struct wmi_phyerr *phyerr, 46930226d602SMichal Kazior u64 tsf); 46940226d602SMichal Kazior void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb); 46950226d602SMichal Kazior void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb); 46960226d602SMichal Kazior void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb); 46970226d602SMichal Kazior void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb); 46980226d602SMichal Kazior void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb); 46990226d602SMichal Kazior void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb); 47000226d602SMichal Kazior void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar, 47010226d602SMichal Kazior struct sk_buff *skb); 47020226d602SMichal Kazior void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar, 47030226d602SMichal Kazior struct sk_buff *skb); 47040226d602SMichal Kazior void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb); 47050226d602SMichal Kazior void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb); 47060226d602SMichal Kazior void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb); 47070226d602SMichal Kazior void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb); 47080226d602SMichal Kazior void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb); 47090226d602SMichal Kazior void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, 47100226d602SMichal Kazior struct sk_buff *skb); 47110226d602SMichal Kazior void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb); 47120226d602SMichal Kazior void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb); 47130226d602SMichal Kazior void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb); 47140226d602SMichal Kazior void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar, 47150226d602SMichal Kazior struct sk_buff *skb); 47160226d602SMichal Kazior void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb); 47170226d602SMichal Kazior void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb); 47180226d602SMichal Kazior void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb); 47190226d602SMichal Kazior void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb); 47200226d602SMichal Kazior int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb); 47210226d602SMichal Kazior 47225e3dd157SKalle Valo #endif /* _WMI_H_ */ 4723