xref: /openbmc/linux/drivers/net/wireless/ath/ath10k/wmi.h (revision 3ced3904)
1f0553ca9SKalle Valo /* SPDX-License-Identifier: ISC */
25e3dd157SKalle Valo /*
35e3dd157SKalle Valo  * Copyright (c) 2005-2011 Atheros Communications Inc.
48b1083d6SKalle Valo  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5fe36e70fSRakesh Pillai  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
65e3dd157SKalle Valo  */
75e3dd157SKalle Valo 
85e3dd157SKalle Valo #ifndef _WMI_H_
95e3dd157SKalle Valo #define _WMI_H_
105e3dd157SKalle Valo 
115e3dd157SKalle Valo #include <linux/types.h>
12db3b6280SKalle Valo #include <linux/ieee80211.h>
135e3dd157SKalle Valo 
145e3dd157SKalle Valo /*
155e3dd157SKalle Valo  * This file specifies the WMI interface for the Unified Software
165e3dd157SKalle Valo  * Architecture.
175e3dd157SKalle Valo  *
185e3dd157SKalle Valo  * It includes definitions of all the commands and events. Commands are
195e3dd157SKalle Valo  * messages from the host to the target. Events and Replies are messages
205e3dd157SKalle Valo  * from the target to the host.
215e3dd157SKalle Valo  *
225e3dd157SKalle Valo  * Ownership of correctness in regards to WMI commands belongs to the host
235e3dd157SKalle Valo  * driver and the target is not required to validate parameters for value,
245e3dd157SKalle Valo  * proper range, or any other checking.
255e3dd157SKalle Valo  *
265e3dd157SKalle Valo  * Guidelines for extending this interface are below.
275e3dd157SKalle Valo  *
285e3dd157SKalle Valo  * 1. Add new WMI commands ONLY within the specified range - 0x9000 - 0x9fff
295e3dd157SKalle Valo  *
305e3dd157SKalle Valo  * 2. Use ONLY u32 type for defining member variables within WMI
315e3dd157SKalle Valo  *    command/event structures. Do not use u8, u16, bool or
325e3dd157SKalle Valo  *    enum types within these structures.
335e3dd157SKalle Valo  *
345e3dd157SKalle Valo  * 3. DO NOT define bit fields within structures. Implement bit fields
355e3dd157SKalle Valo  *    using masks if necessary. Do not use the programming language's bit
365e3dd157SKalle Valo  *    field definition.
375e3dd157SKalle Valo  *
385e3dd157SKalle Valo  * 4. Define macros for encode/decode of u8, u16 fields within
395e3dd157SKalle Valo  *    the u32 variables. Use these macros for set/get of these fields.
405e3dd157SKalle Valo  *    Try to use this to optimize the structure without bloating it with
415e3dd157SKalle Valo  *    u32 variables for every lower sized field.
425e3dd157SKalle Valo  *
435e3dd157SKalle Valo  * 5. Do not use PACK/UNPACK attributes for the structures as each member
445e3dd157SKalle Valo  *    variable is already 4-byte aligned by virtue of being a u32
455e3dd157SKalle Valo  *    type.
465e3dd157SKalle Valo  *
475e3dd157SKalle Valo  * 6. Comment each parameter part of the WMI command/event structure by
48e13dbeadSJoe Perches  *    using the 2 stars at the beginning of C comment instead of one star to
495e3dd157SKalle Valo  *    enable HTML document generation using Doxygen.
505e3dd157SKalle Valo  *
515e3dd157SKalle Valo  */
525e3dd157SKalle Valo 
535e3dd157SKalle Valo /* Control Path */
545e3dd157SKalle Valo struct wmi_cmd_hdr {
555e3dd157SKalle Valo 	__le32 cmd_id;
565e3dd157SKalle Valo } __packed;
575e3dd157SKalle Valo 
585e3dd157SKalle Valo #define WMI_CMD_HDR_CMD_ID_MASK   0x00FFFFFF
595e3dd157SKalle Valo #define WMI_CMD_HDR_CMD_ID_LSB    0
605e3dd157SKalle Valo #define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000
615e3dd157SKalle Valo #define WMI_CMD_HDR_PLT_PRIV_LSB  24
625e3dd157SKalle Valo 
635e3dd157SKalle Valo #define HTC_PROTOCOL_VERSION    0x0002
645e3dd157SKalle Valo #define WMI_PROTOCOL_VERSION    0x0002
655e3dd157SKalle Valo 
663b8fc902SKalle Valo /*
673b8fc902SKalle Valo  * There is no signed version of __le32, so for a temporary solution come
686d219113SAmadeusz Sławiński  * up with our own version. The idea is from fs/ntfs/endian.h.
693b8fc902SKalle Valo  *
703b8fc902SKalle Valo  * Use a_ prefix so that it doesn't conflict if we get proper support to
713b8fc902SKalle Valo  * linux/types.h.
723b8fc902SKalle Valo  */
733b8fc902SKalle Valo typedef __s32 __bitwise a_sle32;
743b8fc902SKalle Valo 
a_cpu_to_sle32(s32 val)753b8fc902SKalle Valo static inline a_sle32 a_cpu_to_sle32(s32 val)
763b8fc902SKalle Valo {
773b8fc902SKalle Valo 	return (__force a_sle32)cpu_to_le32(val);
783b8fc902SKalle Valo }
793b8fc902SKalle Valo 
a_sle32_to_cpu(a_sle32 val)803b8fc902SKalle Valo static inline s32 a_sle32_to_cpu(a_sle32 val)
813b8fc902SKalle Valo {
823b8fc902SKalle Valo 	return le32_to_cpu((__force __le32)val);
833b8fc902SKalle Valo }
843b8fc902SKalle Valo 
85cff990ceSMichal Kazior enum wmi_service {
86cff990ceSMichal Kazior 	WMI_SERVICE_BEACON_OFFLOAD = 0,
87cff990ceSMichal Kazior 	WMI_SERVICE_SCAN_OFFLOAD,
88cff990ceSMichal Kazior 	WMI_SERVICE_ROAM_OFFLOAD,
89cff990ceSMichal Kazior 	WMI_SERVICE_BCN_MISS_OFFLOAD,
90cff990ceSMichal Kazior 	WMI_SERVICE_STA_PWRSAVE,
91cff990ceSMichal Kazior 	WMI_SERVICE_STA_ADVANCED_PWRSAVE,
92cff990ceSMichal Kazior 	WMI_SERVICE_AP_UAPSD,
93cff990ceSMichal Kazior 	WMI_SERVICE_AP_DFS,
94cff990ceSMichal Kazior 	WMI_SERVICE_11AC,
95cff990ceSMichal Kazior 	WMI_SERVICE_BLOCKACK,
96cff990ceSMichal Kazior 	WMI_SERVICE_PHYERR,
97cff990ceSMichal Kazior 	WMI_SERVICE_BCN_FILTER,
98cff990ceSMichal Kazior 	WMI_SERVICE_RTT,
99cff990ceSMichal Kazior 	WMI_SERVICE_RATECTRL,
100cff990ceSMichal Kazior 	WMI_SERVICE_WOW,
101cff990ceSMichal Kazior 	WMI_SERVICE_RATECTRL_CACHE,
102cff990ceSMichal Kazior 	WMI_SERVICE_IRAM_TIDS,
103cff990ceSMichal Kazior 	WMI_SERVICE_ARPNS_OFFLOAD,
104cff990ceSMichal Kazior 	WMI_SERVICE_NLO,
105cff990ceSMichal Kazior 	WMI_SERVICE_GTK_OFFLOAD,
106cff990ceSMichal Kazior 	WMI_SERVICE_SCAN_SCH,
107cff990ceSMichal Kazior 	WMI_SERVICE_CSA_OFFLOAD,
108cff990ceSMichal Kazior 	WMI_SERVICE_CHATTER,
109cff990ceSMichal Kazior 	WMI_SERVICE_COEX_FREQAVOID,
110cff990ceSMichal Kazior 	WMI_SERVICE_PACKET_POWER_SAVE,
111cff990ceSMichal Kazior 	WMI_SERVICE_FORCE_FW_HANG,
112cff990ceSMichal Kazior 	WMI_SERVICE_GPIO,
113cff990ceSMichal Kazior 	WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
114cff990ceSMichal Kazior 	WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
115cff990ceSMichal Kazior 	WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
116cff990ceSMichal Kazior 	WMI_SERVICE_STA_KEEP_ALIVE,
117cff990ceSMichal Kazior 	WMI_SERVICE_TX_ENCAP,
118cff990ceSMichal Kazior 	WMI_SERVICE_BURST,
119cff990ceSMichal Kazior 	WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT,
120cff990ceSMichal Kazior 	WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT,
121ca996ec5SMichal Kazior 	WMI_SERVICE_ROAM_SCAN_OFFLOAD,
122ca996ec5SMichal Kazior 	WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
123ca996ec5SMichal Kazior 	WMI_SERVICE_EARLY_RX,
124ca996ec5SMichal Kazior 	WMI_SERVICE_STA_SMPS,
125ca996ec5SMichal Kazior 	WMI_SERVICE_FWTEST,
126ca996ec5SMichal Kazior 	WMI_SERVICE_STA_WMMAC,
127ca996ec5SMichal Kazior 	WMI_SERVICE_TDLS,
128ca996ec5SMichal Kazior 	WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,
129ca996ec5SMichal Kazior 	WMI_SERVICE_ADAPTIVE_OCS,
130ca996ec5SMichal Kazior 	WMI_SERVICE_BA_SSN_SUPPORT,
131ca996ec5SMichal Kazior 	WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
132ca996ec5SMichal Kazior 	WMI_SERVICE_WLAN_HB,
133ca996ec5SMichal Kazior 	WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,
134ca996ec5SMichal Kazior 	WMI_SERVICE_BATCH_SCAN,
135ca996ec5SMichal Kazior 	WMI_SERVICE_QPOWER,
136ca996ec5SMichal Kazior 	WMI_SERVICE_PLMREQ,
137ca996ec5SMichal Kazior 	WMI_SERVICE_THERMAL_MGMT,
138ca996ec5SMichal Kazior 	WMI_SERVICE_RMC,
139ca996ec5SMichal Kazior 	WMI_SERVICE_MHF_OFFLOAD,
140ca996ec5SMichal Kazior 	WMI_SERVICE_COEX_SAR,
141ca996ec5SMichal Kazior 	WMI_SERVICE_BCN_TXRATE_OVERRIDE,
142ca996ec5SMichal Kazior 	WMI_SERVICE_NAN,
143ca996ec5SMichal Kazior 	WMI_SERVICE_L1SS_STAT,
144ca996ec5SMichal Kazior 	WMI_SERVICE_ESTIMATE_LINKSPEED,
145ca996ec5SMichal Kazior 	WMI_SERVICE_OBSS_SCAN,
146ca996ec5SMichal Kazior 	WMI_SERVICE_TDLS_OFFCHAN,
147ca996ec5SMichal Kazior 	WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
148ca996ec5SMichal Kazior 	WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,
149ca996ec5SMichal Kazior 	WMI_SERVICE_IBSS_PWRSAVE,
150ca996ec5SMichal Kazior 	WMI_SERVICE_LPASS,
151ca996ec5SMichal Kazior 	WMI_SERVICE_EXTSCAN,
152ca996ec5SMichal Kazior 	WMI_SERVICE_D0WOW,
153ca996ec5SMichal Kazior 	WMI_SERVICE_HSOFFLOAD,
154ca996ec5SMichal Kazior 	WMI_SERVICE_ROAM_HO_OFFLOAD,
155ca996ec5SMichal Kazior 	WMI_SERVICE_RX_FULL_REORDER,
156ca996ec5SMichal Kazior 	WMI_SERVICE_DHCP_OFFLOAD,
157ca996ec5SMichal Kazior 	WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,
158ca996ec5SMichal Kazior 	WMI_SERVICE_MDNS_OFFLOAD,
159ca996ec5SMichal Kazior 	WMI_SERVICE_SAP_AUTH_OFFLOAD,
16052c22a63SYanbo Li 	WMI_SERVICE_ATF,
161de0c789bSYanbo Li 	WMI_SERVICE_COEX_GPIO,
162840357ccSRaja Mani 	WMI_SERVICE_ENHANCED_PROXY_STA,
163840357ccSRaja Mani 	WMI_SERVICE_TT,
164840357ccSRaja Mani 	WMI_SERVICE_PEER_CACHING,
165840357ccSRaja Mani 	WMI_SERVICE_AUX_SPECTRAL_INTF,
166840357ccSRaja Mani 	WMI_SERVICE_AUX_CHAN_LOAD_INTF,
167840357ccSRaja Mani 	WMI_SERVICE_BSS_CHANNEL_INFO_64,
168e3c6225dSVasanthakumar Thiagarajan 	WMI_SERVICE_EXT_RES_CFG_SUPPORT,
1690b3d76e9SPeter Oh 	WMI_SERVICE_MESH_11S,
1700b3d76e9SPeter Oh 	WMI_SERVICE_MESH_NON_11S,
171de46c015SMohammed Shafi Shajakhan 	WMI_SERVICE_PEER_STATS,
172e70e9ba9SPeter Oh 	WMI_SERVICE_RESTRT_CHNL_SUPPORT,
17364ed5771STamizh chelvam 	WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
1747e247a9eSRaja Mani 	WMI_SERVICE_TX_MODE_PUSH_ONLY,
1757e247a9eSRaja Mani 	WMI_SERVICE_TX_MODE_PUSH_PULL,
1767e247a9eSRaja Mani 	WMI_SERVICE_TX_MODE_DYNAMIC,
177add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_VDEV_RX_FILTER,
178add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_BTCOEX,
179add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_CHECK_CAL_VERSION,
180add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_DBGLOG_WARN2,
181add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_BTCOEX_DUTY_CYCLE,
182add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_4_WIRE_COEX_SUPPORT,
183add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_EXTENDED_NSS_SUPPORT,
184add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_PROG_GPIO_BAND_SELECT,
185add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_SMART_LOGGING_SUPPORT,
186add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
187add6cd8dSManikanta Pubbisetty 	WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
188229329ffSRakesh Pillai 	WMI_SERVICE_MGMT_TX_WMI,
18914d65775SBalaji Pothunoori 	WMI_SERVICE_TDLS_WIDER_BANDWIDTH,
190bc64d052SMaharaja Kennadyrajan 	WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
191bc64d052SMaharaja Kennadyrajan 	WMI_SERVICE_HOST_DFS_CHECK_SUPPORT,
192bc64d052SMaharaja Kennadyrajan 	WMI_SERVICE_TPC_STATS_FINAL,
193235b9c42SVenkateswara Naralasetty 	WMI_SERVICE_RESET_CHIP,
194cea19a6cSCarl Huang 	WMI_SERVICE_SPOOF_MAC_SUPPORT,
195c7fd8d23SBalaji Pothunoori 	WMI_SERVICE_TX_DATA_ACK_RSSI,
1964600563fSMaharaja Kennadyrajan 	WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
19768c295f2SSathishkumar Muruganandam 	WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
19884758d4dSBhagavathi Perumal S 	WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT,
19953884577SRakesh Pillai 	WMI_SERVICE_THERM_THROT,
200059104bfSPradeep Kumar Chitrapu 	WMI_SERVICE_RTT_RESPONDER_ROLE,
2014920ce3bSManikanta Pubbisetty 	WMI_SERVICE_PER_PACKET_SW_ENCRYPT,
202bb31b7cbSManikanta Pubbisetty 	WMI_SERVICE_REPORT_AIRTIME,
203fe36e70fSRakesh Pillai 	WMI_SERVICE_SYNC_DELETE_CMDS,
20433410a51SAshok Raj Nagarajan 	WMI_SERVICE_TX_PWR_PER_PEER,
20540f4ef5eSSurabhi Vishnoi 	WMI_SERVICE_SUPPORT_EXTEND_ADDRESS,
2065d582be0STamizh Chelvam 	WMI_SERVICE_PEER_TID_CONFIGS_SUPPORT,
2077b2531d9STamizh Chelvam 	WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
208c4f8c836SMichal Kazior 
20995cccf4dSKalle Valo 	/* Remember to add the new value to wmi_service_name()! */
21095cccf4dSKalle Valo 
211c4f8c836SMichal Kazior 	/* keep last */
212c4f8c836SMichal Kazior 	WMI_SERVICE_MAX,
213cff990ceSMichal Kazior };
2145e3dd157SKalle Valo 
215cff990ceSMichal Kazior enum wmi_10x_service {
216cff990ceSMichal Kazior 	WMI_10X_SERVICE_BEACON_OFFLOAD = 0,
217cff990ceSMichal Kazior 	WMI_10X_SERVICE_SCAN_OFFLOAD,
218cff990ceSMichal Kazior 	WMI_10X_SERVICE_ROAM_OFFLOAD,
219cff990ceSMichal Kazior 	WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
220cff990ceSMichal Kazior 	WMI_10X_SERVICE_STA_PWRSAVE,
221cff990ceSMichal Kazior 	WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
222cff990ceSMichal Kazior 	WMI_10X_SERVICE_AP_UAPSD,
223cff990ceSMichal Kazior 	WMI_10X_SERVICE_AP_DFS,
224cff990ceSMichal Kazior 	WMI_10X_SERVICE_11AC,
225cff990ceSMichal Kazior 	WMI_10X_SERVICE_BLOCKACK,
226cff990ceSMichal Kazior 	WMI_10X_SERVICE_PHYERR,
227cff990ceSMichal Kazior 	WMI_10X_SERVICE_BCN_FILTER,
228cff990ceSMichal Kazior 	WMI_10X_SERVICE_RTT,
229cff990ceSMichal Kazior 	WMI_10X_SERVICE_RATECTRL,
230cff990ceSMichal Kazior 	WMI_10X_SERVICE_WOW,
231cff990ceSMichal Kazior 	WMI_10X_SERVICE_RATECTRL_CACHE,
232cff990ceSMichal Kazior 	WMI_10X_SERVICE_IRAM_TIDS,
233cff990ceSMichal Kazior 	WMI_10X_SERVICE_BURST,
234cff990ceSMichal Kazior 
235cff990ceSMichal Kazior 	/* introduced in 10.2 */
236cff990ceSMichal Kazior 	WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
237cff990ceSMichal Kazior 	WMI_10X_SERVICE_FORCE_FW_HANG,
238cff990ceSMichal Kazior 	WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
23952c22a63SYanbo Li 	WMI_10X_SERVICE_ATF,
240de0c789bSYanbo Li 	WMI_10X_SERVICE_COEX_GPIO,
24120fa2f7fSPeter Oh 	WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
24220fa2f7fSPeter Oh 	WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
24320fa2f7fSPeter Oh 	WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
24420fa2f7fSPeter Oh 	WMI_10X_SERVICE_MESH,
24520fa2f7fSPeter Oh 	WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
246de46c015SMohammed Shafi Shajakhan 	WMI_10X_SERVICE_PEER_STATS,
247235b9c42SVenkateswara Naralasetty 	WMI_10X_SERVICE_RESET_CHIP,
248235b9c42SVenkateswara Naralasetty 	WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
24984758d4dSBhagavathi Perumal S 	WMI_10X_SERVICE_VDEV_BCN_RATE_CONTROL,
25084758d4dSBhagavathi Perumal S 	WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT,
25184758d4dSBhagavathi Perumal S 	WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT,
252cff990ceSMichal Kazior };
253cff990ceSMichal Kazior 
254cff990ceSMichal Kazior enum wmi_main_service {
255cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0,
256cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_SCAN_OFFLOAD,
257cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_ROAM_OFFLOAD,
258cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
259cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_PWRSAVE,
260cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
261cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_AP_UAPSD,
262cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_AP_DFS,
263cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_11AC,
264cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_BLOCKACK,
265cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_PHYERR,
266cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_BCN_FILTER,
267cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_RTT,
268cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_RATECTRL,
269cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_WOW,
270cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_RATECTRL_CACHE,
271cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_IRAM_TIDS,
272cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
273cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_NLO,
274cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_GTK_OFFLOAD,
275cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_SCAN_SCH,
276cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_CSA_OFFLOAD,
277cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_CHATTER,
278cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_COEX_FREQAVOID,
279cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
280cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_FORCE_FW_HANG,
281cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_GPIO,
282cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
283cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
284cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
285cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
286cff990ceSMichal Kazior 	WMI_MAIN_SERVICE_TX_ENCAP,
2875e3dd157SKalle Valo };
2885e3dd157SKalle Valo 
289840357ccSRaja Mani enum wmi_10_4_service {
290840357ccSRaja Mani 	WMI_10_4_SERVICE_BEACON_OFFLOAD = 0,
291840357ccSRaja Mani 	WMI_10_4_SERVICE_SCAN_OFFLOAD,
292840357ccSRaja Mani 	WMI_10_4_SERVICE_ROAM_OFFLOAD,
293840357ccSRaja Mani 	WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
294840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_PWRSAVE,
295840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
296840357ccSRaja Mani 	WMI_10_4_SERVICE_AP_UAPSD,
297840357ccSRaja Mani 	WMI_10_4_SERVICE_AP_DFS,
298840357ccSRaja Mani 	WMI_10_4_SERVICE_11AC,
299840357ccSRaja Mani 	WMI_10_4_SERVICE_BLOCKACK,
300840357ccSRaja Mani 	WMI_10_4_SERVICE_PHYERR,
301840357ccSRaja Mani 	WMI_10_4_SERVICE_BCN_FILTER,
302840357ccSRaja Mani 	WMI_10_4_SERVICE_RTT,
303840357ccSRaja Mani 	WMI_10_4_SERVICE_RATECTRL,
304840357ccSRaja Mani 	WMI_10_4_SERVICE_WOW,
305840357ccSRaja Mani 	WMI_10_4_SERVICE_RATECTRL_CACHE,
306840357ccSRaja Mani 	WMI_10_4_SERVICE_IRAM_TIDS,
307840357ccSRaja Mani 	WMI_10_4_SERVICE_BURST,
308840357ccSRaja Mani 	WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
309840357ccSRaja Mani 	WMI_10_4_SERVICE_GTK_OFFLOAD,
310840357ccSRaja Mani 	WMI_10_4_SERVICE_SCAN_SCH,
311840357ccSRaja Mani 	WMI_10_4_SERVICE_CSA_OFFLOAD,
312840357ccSRaja Mani 	WMI_10_4_SERVICE_CHATTER,
313840357ccSRaja Mani 	WMI_10_4_SERVICE_COEX_FREQAVOID,
314840357ccSRaja Mani 	WMI_10_4_SERVICE_PACKET_POWER_SAVE,
315840357ccSRaja Mani 	WMI_10_4_SERVICE_FORCE_FW_HANG,
316840357ccSRaja Mani 	WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
317840357ccSRaja Mani 	WMI_10_4_SERVICE_GPIO,
318840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
319840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
320840357ccSRaja Mani 	WMI_10_4_SERVICE_STA_KEEP_ALIVE,
321840357ccSRaja Mani 	WMI_10_4_SERVICE_TX_ENCAP,
322840357ccSRaja Mani 	WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
323840357ccSRaja Mani 	WMI_10_4_SERVICE_EARLY_RX,
324840357ccSRaja Mani 	WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
325840357ccSRaja Mani 	WMI_10_4_SERVICE_TT,
326840357ccSRaja Mani 	WMI_10_4_SERVICE_ATF,
327840357ccSRaja Mani 	WMI_10_4_SERVICE_PEER_CACHING,
328840357ccSRaja Mani 	WMI_10_4_SERVICE_COEX_GPIO,
329840357ccSRaja Mani 	WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
330840357ccSRaja Mani 	WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
331840357ccSRaja Mani 	WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
332e3c6225dSVasanthakumar Thiagarajan 	WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
3330b3d76e9SPeter Oh 	WMI_10_4_SERVICE_MESH_NON_11S,
334e70e9ba9SPeter Oh 	WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
335e70e9ba9SPeter Oh 	WMI_10_4_SERVICE_PEER_STATS,
336e70e9ba9SPeter Oh 	WMI_10_4_SERVICE_MESH_11S,
33764ed5771STamizh chelvam 	WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
3387e247a9eSRaja Mani 	WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
3397e247a9eSRaja Mani 	WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
3407e247a9eSRaja Mani 	WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
341add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_VDEV_RX_FILTER,
342add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_BTCOEX,
343add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_CHECK_CAL_VERSION,
344add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_DBGLOG_WARN2,
345add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
346add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
347add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
348add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
349add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
350add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS,
351add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_OFFCHAN,
352add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
353add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
354add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
355add6cd8dSManikanta Pubbisetty 	WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
35614d65775SBalaji Pothunoori 	WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
357bc64d052SMaharaja Kennadyrajan 	WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
358bc64d052SMaharaja Kennadyrajan 	WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
359bc64d052SMaharaja Kennadyrajan 	WMI_10_4_SERVICE_TPC_STATS_FINAL,
360c7fd8d23SBalaji Pothunoori 	WMI_10_4_SERVICE_CFR_CAPTURE_SUPPORT,
361c7fd8d23SBalaji Pothunoori 	WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
3624600563fSMaharaja Kennadyrajan 	WMI_10_4_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_LEGACY,
3634600563fSMaharaja Kennadyrajan 	WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT,
3644600563fSMaharaja Kennadyrajan 	WMI_10_4_SERVICE_PEER_TID_CONFIGS_SUPPORT,
3654600563fSMaharaja Kennadyrajan 	WMI_10_4_SERVICE_VDEV_BCN_RATE_CONTROL,
3664600563fSMaharaja Kennadyrajan 	WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
36768c295f2SSathishkumar Muruganandam 	WMI_10_4_SERVICE_HTT_ASSERT_TRIGGER_SUPPORT,
36868c295f2SSathishkumar Muruganandam 	WMI_10_4_SERVICE_VDEV_FILTER_NEIGHBOR_RX_PACKETS,
36968c295f2SSathishkumar Muruganandam 	WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
370059104bfSPradeep Kumar Chitrapu 	WMI_10_4_SERVICE_PEER_CHWIDTH_CHANGE,
371059104bfSPradeep Kumar Chitrapu 	WMI_10_4_SERVICE_RX_FILTER_OUT_COUNT,
372059104bfSPradeep Kumar Chitrapu 	WMI_10_4_SERVICE_RTT_RESPONDER_ROLE,
373059104bfSPradeep Kumar Chitrapu 	WMI_10_4_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
374bb31b7cbSManikanta Pubbisetty 	WMI_10_4_SERVICE_REPORT_AIRTIME,
37533410a51SAshok Raj Nagarajan 	WMI_10_4_SERVICE_TX_PWR_PER_PEER,
376bbdc8c5aSYingying Tang 	WMI_10_4_SERVICE_FETCH_PEER_TX_PN,
377bbdc8c5aSYingying Tang 	WMI_10_4_SERVICE_MULTIPLE_VDEV_RESTART,
378bbdc8c5aSYingying Tang 	WMI_10_4_SERVICE_ENHANCED_RADIO_COUNTERS,
379bbdc8c5aSYingying Tang 	WMI_10_4_SERVICE_QINQ_SUPPORT,
380bbdc8c5aSYingying Tang 	WMI_10_4_SERVICE_RESET_CHIP,
381840357ccSRaja Mani };
382840357ccSRaja Mani 
wmi_service_name(enum wmi_service service_id)38395cccf4dSKalle Valo static inline char *wmi_service_name(enum wmi_service service_id)
3845e3dd157SKalle Valo {
385cff990ceSMichal Kazior #define SVCSTR(x) case x: return #x
386cff990ceSMichal Kazior 
3875e3dd157SKalle Valo 	switch (service_id) {
388cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BEACON_OFFLOAD);
389cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_SCAN_OFFLOAD);
390cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_ROAM_OFFLOAD);
391cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD);
392cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_PWRSAVE);
393cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE);
394cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_AP_UAPSD);
395cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_AP_DFS);
396cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_11AC);
397cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BLOCKACK);
398cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_PHYERR);
399cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BCN_FILTER);
400cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_RTT);
401cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_RATECTRL);
402cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_WOW);
403cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_RATECTRL_CACHE);
404cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_IRAM_TIDS);
405cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD);
406cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_NLO);
407cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_GTK_OFFLOAD);
408cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_SCAN_SCH);
409cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_CSA_OFFLOAD);
410cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_CHATTER);
411cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_COEX_FREQAVOID);
412cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE);
413cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_FORCE_FW_HANG);
414cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_GPIO);
415cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM);
416cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG);
417cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG);
418cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE);
419cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_TX_ENCAP);
420cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_BURST);
421cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT);
422cff990ceSMichal Kazior 	SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT);
423ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD);
424ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC);
425ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_EARLY_RX);
426ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_STA_SMPS);
427ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_FWTEST);
428ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_STA_WMMAC);
429ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_TDLS);
430ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE);
431ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_ADAPTIVE_OCS);
432ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT);
433ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE);
434ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_WLAN_HB);
435ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT);
436ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_BATCH_SCAN);
437ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_QPOWER);
438ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_PLMREQ);
439ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_THERMAL_MGMT);
440ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_RMC);
441ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_MHF_OFFLOAD);
442ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_COEX_SAR);
443ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE);
444ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_NAN);
445ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_L1SS_STAT);
446ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED);
447ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_OBSS_SCAN);
448ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_TDLS_OFFCHAN);
449ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA);
450ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA);
451ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_IBSS_PWRSAVE);
452ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_LPASS);
453ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_EXTSCAN);
454ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_D0WOW);
455ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_HSOFFLOAD);
456ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD);
457ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_RX_FULL_REORDER);
458ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_DHCP_OFFLOAD);
459ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT);
460ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_MDNS_OFFLOAD);
461ca996ec5SMichal Kazior 	SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD);
46252c22a63SYanbo Li 	SVCSTR(WMI_SERVICE_ATF);
463de0c789bSYanbo Li 	SVCSTR(WMI_SERVICE_COEX_GPIO);
464840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA);
465840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_TT);
466840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_PEER_CACHING);
467840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF);
468840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF);
469840357ccSRaja Mani 	SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64);
470e3c6225dSVasanthakumar Thiagarajan 	SVCSTR(WMI_SERVICE_EXT_RES_CFG_SUPPORT);
4710b3d76e9SPeter Oh 	SVCSTR(WMI_SERVICE_MESH_11S);
4720b3d76e9SPeter Oh 	SVCSTR(WMI_SERVICE_MESH_NON_11S);
473de46c015SMohammed Shafi Shajakhan 	SVCSTR(WMI_SERVICE_PEER_STATS);
474e70e9ba9SPeter Oh 	SVCSTR(WMI_SERVICE_RESTRT_CHNL_SUPPORT);
47564ed5771STamizh chelvam 	SVCSTR(WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT);
4767e247a9eSRaja Mani 	SVCSTR(WMI_SERVICE_TX_MODE_PUSH_ONLY);
4777e247a9eSRaja Mani 	SVCSTR(WMI_SERVICE_TX_MODE_PUSH_PULL);
4787e247a9eSRaja Mani 	SVCSTR(WMI_SERVICE_TX_MODE_DYNAMIC);
479add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_VDEV_RX_FILTER);
4802321dd5dSKalle Valo 	SVCSTR(WMI_SERVICE_BTCOEX);
481add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_CHECK_CAL_VERSION);
482add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_DBGLOG_WARN2);
483add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_BTCOEX_DUTY_CYCLE);
484add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_4_WIRE_COEX_SUPPORT);
485add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_EXTENDED_NSS_SUPPORT);
486add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_PROG_GPIO_BAND_SELECT);
487add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_SMART_LOGGING_SUPPORT);
488add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE);
489add6cd8dSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY);
4902321dd5dSKalle Valo 	SVCSTR(WMI_SERVICE_MGMT_TX_WMI);
49114d65775SBalaji Pothunoori 	SVCSTR(WMI_SERVICE_TDLS_WIDER_BANDWIDTH);
492bc64d052SMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS);
493bc64d052SMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT);
494bc64d052SMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_TPC_STATS_FINAL);
495db251d7dSMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_RESET_CHIP);
4962321dd5dSKalle Valo 	SVCSTR(WMI_SERVICE_SPOOF_MAC_SUPPORT);
497c7fd8d23SBalaji Pothunoori 	SVCSTR(WMI_SERVICE_TX_DATA_ACK_RSSI);
4984600563fSMaharaja Kennadyrajan 	SVCSTR(WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT);
4992321dd5dSKalle Valo 	SVCSTR(WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT);
5002321dd5dSKalle Valo 	SVCSTR(WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT);
5012321dd5dSKalle Valo 	SVCSTR(WMI_SERVICE_THERM_THROT);
502059104bfSPradeep Kumar Chitrapu 	SVCSTR(WMI_SERVICE_RTT_RESPONDER_ROLE);
5034920ce3bSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_PER_PACKET_SW_ENCRYPT);
504bb31b7cbSManikanta Pubbisetty 	SVCSTR(WMI_SERVICE_REPORT_AIRTIME);
505fe36e70fSRakesh Pillai 	SVCSTR(WMI_SERVICE_SYNC_DELETE_CMDS);
50633410a51SAshok Raj Nagarajan 	SVCSTR(WMI_SERVICE_TX_PWR_PER_PEER);
50740f4ef5eSSurabhi Vishnoi 	SVCSTR(WMI_SERVICE_SUPPORT_EXTEND_ADDRESS);
5085d582be0STamizh Chelvam 	SVCSTR(WMI_SERVICE_PEER_TID_CONFIGS_SUPPORT);
5097b2531d9STamizh Chelvam 	SVCSTR(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT);
510059104bfSPradeep Kumar Chitrapu 
51195cccf4dSKalle Valo 	case WMI_SERVICE_MAX:
512cff990ceSMichal Kazior 		return NULL;
5135e3dd157SKalle Valo 	}
5145e3dd157SKalle Valo 
515cff990ceSMichal Kazior #undef SVCSTR
51695cccf4dSKalle Valo 
51795cccf4dSKalle Valo 	return NULL;
518cff990ceSMichal Kazior }
519cff990ceSMichal Kazior 
52037b9f933SMichal Kazior #define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
52137b9f933SMichal Kazior 	((svc_id) < (len) && \
52237b9f933SMichal Kazior 	 __le32_to_cpu((wmi_svc_bmap)[(svc_id) / (sizeof(u32))]) & \
523cff990ceSMichal Kazior 	 BIT((svc_id) % (sizeof(u32))))
524cff990ceSMichal Kazior 
525810fe818SManikanta Pubbisetty /* This extension is required to accommodate new services, current limit
526810fe818SManikanta Pubbisetty  * for wmi_services is 64 as target is using only 4-bits of each 32-bit
527810fe818SManikanta Pubbisetty  * wmi_service word. Extending this to make use of remaining unused bits
528810fe818SManikanta Pubbisetty  * for new services.
529810fe818SManikanta Pubbisetty  */
530810fe818SManikanta Pubbisetty #define WMI_EXT_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
531810fe818SManikanta Pubbisetty 	((svc_id) >= (len) && \
532810fe818SManikanta Pubbisetty 	__le32_to_cpu((wmi_svc_bmap)[((svc_id) - (len)) / 28]) & \
533810fe818SManikanta Pubbisetty 	BIT(((((svc_id) - (len)) % 28) & 0x1f) + 4))
534810fe818SManikanta Pubbisetty 
53537b9f933SMichal Kazior #define SVCMAP(x, y, len) \
536cff990ceSMichal Kazior 	do { \
537810fe818SManikanta Pubbisetty 		if ((WMI_SERVICE_IS_ENABLED((in), (x), (len))) || \
538810fe818SManikanta Pubbisetty 		    (WMI_EXT_SERVICE_IS_ENABLED((in), (x), (len)))) \
539cff990ceSMichal Kazior 			__set_bit(y, out); \
540cff990ceSMichal Kazior 	} while (0)
541cff990ceSMichal Kazior 
wmi_10x_svc_map(const __le32 * in,unsigned long * out,size_t len)54237b9f933SMichal Kazior static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out,
54337b9f933SMichal Kazior 				   size_t len)
544cff990ceSMichal Kazior {
545cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD,
54637b9f933SMichal Kazior 	       WMI_SERVICE_BEACON_OFFLOAD, len);
547cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD,
54837b9f933SMichal Kazior 	       WMI_SERVICE_SCAN_OFFLOAD, len);
549cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD,
55037b9f933SMichal Kazior 	       WMI_SERVICE_ROAM_OFFLOAD, len);
551cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
55237b9f933SMichal Kazior 	       WMI_SERVICE_BCN_MISS_OFFLOAD, len);
553cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE,
55437b9f933SMichal Kazior 	       WMI_SERVICE_STA_PWRSAVE, len);
555cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
55637b9f933SMichal Kazior 	       WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
557cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_AP_UAPSD,
55837b9f933SMichal Kazior 	       WMI_SERVICE_AP_UAPSD, len);
559cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_AP_DFS,
56037b9f933SMichal Kazior 	       WMI_SERVICE_AP_DFS, len);
561cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_11AC,
56237b9f933SMichal Kazior 	       WMI_SERVICE_11AC, len);
563cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BLOCKACK,
56437b9f933SMichal Kazior 	       WMI_SERVICE_BLOCKACK, len);
565cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_PHYERR,
56637b9f933SMichal Kazior 	       WMI_SERVICE_PHYERR, len);
567cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BCN_FILTER,
56837b9f933SMichal Kazior 	       WMI_SERVICE_BCN_FILTER, len);
569cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_RTT,
57037b9f933SMichal Kazior 	       WMI_SERVICE_RTT, len);
571cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_RATECTRL,
57237b9f933SMichal Kazior 	       WMI_SERVICE_RATECTRL, len);
573cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_WOW,
57437b9f933SMichal Kazior 	       WMI_SERVICE_WOW, len);
575cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE,
57637b9f933SMichal Kazior 	       WMI_SERVICE_RATECTRL_CACHE, len);
577cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_IRAM_TIDS,
57837b9f933SMichal Kazior 	       WMI_SERVICE_IRAM_TIDS, len);
579cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_BURST,
58037b9f933SMichal Kazior 	       WMI_SERVICE_BURST, len);
581cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
58237b9f933SMichal Kazior 	       WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
583cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG,
58437b9f933SMichal Kazior 	       WMI_SERVICE_FORCE_FW_HANG, len);
585cff990ceSMichal Kazior 	SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
58637b9f933SMichal Kazior 	       WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
58752c22a63SYanbo Li 	SVCMAP(WMI_10X_SERVICE_ATF,
58852c22a63SYanbo Li 	       WMI_SERVICE_ATF, len);
589de0c789bSYanbo Li 	SVCMAP(WMI_10X_SERVICE_COEX_GPIO,
590de0c789bSYanbo Li 	       WMI_SERVICE_COEX_GPIO, len);
59120fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
59220fa2f7fSPeter Oh 	       WMI_SERVICE_AUX_SPECTRAL_INTF, len);
59320fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
59420fa2f7fSPeter Oh 	       WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
59520fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
59620fa2f7fSPeter Oh 	       WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
59720fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_MESH,
5980b3d76e9SPeter Oh 	       WMI_SERVICE_MESH_11S, len);
59920fa2f7fSPeter Oh 	SVCMAP(WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
60020fa2f7fSPeter Oh 	       WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
601de46c015SMohammed Shafi Shajakhan 	SVCMAP(WMI_10X_SERVICE_PEER_STATS,
602de46c015SMohammed Shafi Shajakhan 	       WMI_SERVICE_PEER_STATS, len);
603235b9c42SVenkateswara Naralasetty 	SVCMAP(WMI_10X_SERVICE_RESET_CHIP,
604235b9c42SVenkateswara Naralasetty 	       WMI_SERVICE_RESET_CHIP, len);
605235b9c42SVenkateswara Naralasetty 	SVCMAP(WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
606235b9c42SVenkateswara Naralasetty 	       WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
60784758d4dSBhagavathi Perumal S 	SVCMAP(WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT,
60884758d4dSBhagavathi Perumal S 	       WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT, len);
6094920ce3bSManikanta Pubbisetty 	SVCMAP(WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT,
6104920ce3bSManikanta Pubbisetty 	       WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len);
611cff990ceSMichal Kazior }
612cff990ceSMichal Kazior 
wmi_main_svc_map(const __le32 * in,unsigned long * out,size_t len)61337b9f933SMichal Kazior static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out,
61437b9f933SMichal Kazior 				    size_t len)
615cff990ceSMichal Kazior {
616cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD,
61737b9f933SMichal Kazior 	       WMI_SERVICE_BEACON_OFFLOAD, len);
618cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD,
61937b9f933SMichal Kazior 	       WMI_SERVICE_SCAN_OFFLOAD, len);
620cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD,
62137b9f933SMichal Kazior 	       WMI_SERVICE_ROAM_OFFLOAD, len);
622cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
62337b9f933SMichal Kazior 	       WMI_SERVICE_BCN_MISS_OFFLOAD, len);
624cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE,
62537b9f933SMichal Kazior 	       WMI_SERVICE_STA_PWRSAVE, len);
626cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
62737b9f933SMichal Kazior 	       WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
628cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD,
62937b9f933SMichal Kazior 	       WMI_SERVICE_AP_UAPSD, len);
630cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_AP_DFS,
63137b9f933SMichal Kazior 	       WMI_SERVICE_AP_DFS, len);
632cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_11AC,
63337b9f933SMichal Kazior 	       WMI_SERVICE_11AC, len);
634cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_BLOCKACK,
63537b9f933SMichal Kazior 	       WMI_SERVICE_BLOCKACK, len);
636cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_PHYERR,
63737b9f933SMichal Kazior 	       WMI_SERVICE_PHYERR, len);
638cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER,
63937b9f933SMichal Kazior 	       WMI_SERVICE_BCN_FILTER, len);
640cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_RTT,
64137b9f933SMichal Kazior 	       WMI_SERVICE_RTT, len);
642cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_RATECTRL,
64337b9f933SMichal Kazior 	       WMI_SERVICE_RATECTRL, len);
644cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_WOW,
64537b9f933SMichal Kazior 	       WMI_SERVICE_WOW, len);
646cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE,
64737b9f933SMichal Kazior 	       WMI_SERVICE_RATECTRL_CACHE, len);
648cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS,
64937b9f933SMichal Kazior 	       WMI_SERVICE_IRAM_TIDS, len);
650cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
65137b9f933SMichal Kazior 	       WMI_SERVICE_ARPNS_OFFLOAD, len);
652cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_NLO,
65337b9f933SMichal Kazior 	       WMI_SERVICE_NLO, len);
654cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD,
65537b9f933SMichal Kazior 	       WMI_SERVICE_GTK_OFFLOAD, len);
656cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH,
65737b9f933SMichal Kazior 	       WMI_SERVICE_SCAN_SCH, len);
658cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD,
65937b9f933SMichal Kazior 	       WMI_SERVICE_CSA_OFFLOAD, len);
660cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_CHATTER,
66137b9f933SMichal Kazior 	       WMI_SERVICE_CHATTER, len);
662cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID,
66337b9f933SMichal Kazior 	       WMI_SERVICE_COEX_FREQAVOID, len);
664cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
66537b9f933SMichal Kazior 	       WMI_SERVICE_PACKET_POWER_SAVE, len);
666cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG,
66737b9f933SMichal Kazior 	       WMI_SERVICE_FORCE_FW_HANG, len);
668cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_GPIO,
66937b9f933SMichal Kazior 	       WMI_SERVICE_GPIO, len);
670cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
67137b9f933SMichal Kazior 	       WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len);
672cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
67337b9f933SMichal Kazior 	       WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
674cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
67537b9f933SMichal Kazior 	       WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
676cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
67737b9f933SMichal Kazior 	       WMI_SERVICE_STA_KEEP_ALIVE, len);
678cff990ceSMichal Kazior 	SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP,
67937b9f933SMichal Kazior 	       WMI_SERVICE_TX_ENCAP, len);
680cff990ceSMichal Kazior }
681cff990ceSMichal Kazior 
wmi_10_4_svc_map(const __le32 * in,unsigned long * out,size_t len)682840357ccSRaja Mani static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out,
683840357ccSRaja Mani 				    size_t len)
684840357ccSRaja Mani {
685840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD,
686840357ccSRaja Mani 	       WMI_SERVICE_BEACON_OFFLOAD, len);
687840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD,
688840357ccSRaja Mani 	       WMI_SERVICE_SCAN_OFFLOAD, len);
689840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD,
690840357ccSRaja Mani 	       WMI_SERVICE_ROAM_OFFLOAD, len);
691840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
692840357ccSRaja Mani 	       WMI_SERVICE_BCN_MISS_OFFLOAD, len);
693840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE,
694840357ccSRaja Mani 	       WMI_SERVICE_STA_PWRSAVE, len);
695840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
696840357ccSRaja Mani 	       WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
697840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AP_UAPSD,
698840357ccSRaja Mani 	       WMI_SERVICE_AP_UAPSD, len);
699840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AP_DFS,
700840357ccSRaja Mani 	       WMI_SERVICE_AP_DFS, len);
701840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_11AC,
702840357ccSRaja Mani 	       WMI_SERVICE_11AC, len);
703840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BLOCKACK,
704840357ccSRaja Mani 	       WMI_SERVICE_BLOCKACK, len);
705840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_PHYERR,
706840357ccSRaja Mani 	       WMI_SERVICE_PHYERR, len);
707840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BCN_FILTER,
708840357ccSRaja Mani 	       WMI_SERVICE_BCN_FILTER, len);
709840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_RTT,
710840357ccSRaja Mani 	       WMI_SERVICE_RTT, len);
711840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_RATECTRL,
712840357ccSRaja Mani 	       WMI_SERVICE_RATECTRL, len);
713840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_WOW,
714840357ccSRaja Mani 	       WMI_SERVICE_WOW, len);
715840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE,
716840357ccSRaja Mani 	       WMI_SERVICE_RATECTRL_CACHE, len);
717840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS,
718840357ccSRaja Mani 	       WMI_SERVICE_IRAM_TIDS, len);
719840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BURST,
720840357ccSRaja Mani 	       WMI_SERVICE_BURST, len);
721840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
722840357ccSRaja Mani 	       WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
723840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD,
724840357ccSRaja Mani 	       WMI_SERVICE_GTK_OFFLOAD, len);
725840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_SCAN_SCH,
726840357ccSRaja Mani 	       WMI_SERVICE_SCAN_SCH, len);
727840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD,
728840357ccSRaja Mani 	       WMI_SERVICE_CSA_OFFLOAD, len);
729840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_CHATTER,
730840357ccSRaja Mani 	       WMI_SERVICE_CHATTER, len);
731840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID,
732840357ccSRaja Mani 	       WMI_SERVICE_COEX_FREQAVOID, len);
733840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE,
734840357ccSRaja Mani 	       WMI_SERVICE_PACKET_POWER_SAVE, len);
735840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG,
736840357ccSRaja Mani 	       WMI_SERVICE_FORCE_FW_HANG, len);
737840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
738840357ccSRaja Mani 	       WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
739840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_GPIO,
740840357ccSRaja Mani 	       WMI_SERVICE_GPIO, len);
741840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
742840357ccSRaja Mani 	       WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
743840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
744840357ccSRaja Mani 	       WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
745840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE,
746840357ccSRaja Mani 	       WMI_SERVICE_STA_KEEP_ALIVE, len);
747840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TX_ENCAP,
748840357ccSRaja Mani 	       WMI_SERVICE_TX_ENCAP, len);
749840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
750840357ccSRaja Mani 	       WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len);
751840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_EARLY_RX,
752840357ccSRaja Mani 	       WMI_SERVICE_EARLY_RX, len);
753840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
754840357ccSRaja Mani 	       WMI_SERVICE_ENHANCED_PROXY_STA, len);
755840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TT,
756840357ccSRaja Mani 	       WMI_SERVICE_TT, len);
757840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_ATF,
758840357ccSRaja Mani 	       WMI_SERVICE_ATF, len);
759840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_PEER_CACHING,
760840357ccSRaja Mani 	       WMI_SERVICE_PEER_CACHING, len);
761840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_COEX_GPIO,
762840357ccSRaja Mani 	       WMI_SERVICE_COEX_GPIO, len);
763840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
764840357ccSRaja Mani 	       WMI_SERVICE_AUX_SPECTRAL_INTF, len);
765840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
766840357ccSRaja Mani 	       WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
767840357ccSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
768840357ccSRaja Mani 	       WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
769e3c6225dSVasanthakumar Thiagarajan 	SVCMAP(WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
770e3c6225dSVasanthakumar Thiagarajan 	       WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
7710b3d76e9SPeter Oh 	SVCMAP(WMI_10_4_SERVICE_MESH_NON_11S,
7720b3d76e9SPeter Oh 	       WMI_SERVICE_MESH_NON_11S, len);
773e70e9ba9SPeter Oh 	SVCMAP(WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
774e70e9ba9SPeter Oh 	       WMI_SERVICE_RESTRT_CHNL_SUPPORT, len);
775e70e9ba9SPeter Oh 	SVCMAP(WMI_10_4_SERVICE_PEER_STATS,
776e70e9ba9SPeter Oh 	       WMI_SERVICE_PEER_STATS, len);
777e70e9ba9SPeter Oh 	SVCMAP(WMI_10_4_SERVICE_MESH_11S,
778e70e9ba9SPeter Oh 	       WMI_SERVICE_MESH_11S, len);
77964ed5771STamizh chelvam 	SVCMAP(WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
78064ed5771STamizh chelvam 	       WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, len);
7817e247a9eSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
7827e247a9eSRaja Mani 	       WMI_SERVICE_TX_MODE_PUSH_ONLY, len);
7837e247a9eSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
7847e247a9eSRaja Mani 	       WMI_SERVICE_TX_MODE_PUSH_PULL, len);
7857e247a9eSRaja Mani 	SVCMAP(WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
7867e247a9eSRaja Mani 	       WMI_SERVICE_TX_MODE_DYNAMIC, len);
787add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_VDEV_RX_FILTER,
788add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_VDEV_RX_FILTER, len);
789add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_BTCOEX,
790add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_BTCOEX, len);
791add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_CHECK_CAL_VERSION,
792add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_CHECK_CAL_VERSION, len);
793add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_DBGLOG_WARN2,
794add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_DBGLOG_WARN2, len);
795add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
796add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_BTCOEX_DUTY_CYCLE, len);
797add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
798add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_4_WIRE_COEX_SUPPORT, len);
799add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
800add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_EXTENDED_NSS_SUPPORT, len);
801add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
802add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_PROG_GPIO_BAND_SELECT, len);
803add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
804add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_SMART_LOGGING_SUPPORT, len);
805add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS,
806add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS, len);
807add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_OFFCHAN,
808add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_OFFCHAN, len);
809add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
810add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, len);
811add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
812add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, len);
813add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
814add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE, len);
815add6cd8dSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
816add6cd8dSManikanta Pubbisetty 	       WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, len);
81714d65775SBalaji Pothunoori 	SVCMAP(WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
81814d65775SBalaji Pothunoori 	       WMI_SERVICE_TDLS_WIDER_BANDWIDTH, len);
819bc64d052SMaharaja Kennadyrajan 	SVCMAP(WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
820bc64d052SMaharaja Kennadyrajan 	       WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
821bc64d052SMaharaja Kennadyrajan 	SVCMAP(WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
822bc64d052SMaharaja Kennadyrajan 	       WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, len);
823bc64d052SMaharaja Kennadyrajan 	SVCMAP(WMI_10_4_SERVICE_TPC_STATS_FINAL,
824bc64d052SMaharaja Kennadyrajan 	       WMI_SERVICE_TPC_STATS_FINAL, len);
825c7fd8d23SBalaji Pothunoori 	SVCMAP(WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
826c7fd8d23SBalaji Pothunoori 	       WMI_SERVICE_TX_DATA_ACK_RSSI, len);
8274600563fSMaharaja Kennadyrajan 	SVCMAP(WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
8284600563fSMaharaja Kennadyrajan 	       WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT, len);
82968c295f2SSathishkumar Muruganandam 	SVCMAP(WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
83068c295f2SSathishkumar Muruganandam 	       WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT, len);
831059104bfSPradeep Kumar Chitrapu 	SVCMAP(WMI_10_4_SERVICE_RTT_RESPONDER_ROLE,
832059104bfSPradeep Kumar Chitrapu 	       WMI_SERVICE_RTT_RESPONDER_ROLE, len);
8334920ce3bSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT,
8344920ce3bSManikanta Pubbisetty 	       WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len);
835bb31b7cbSManikanta Pubbisetty 	SVCMAP(WMI_10_4_SERVICE_REPORT_AIRTIME,
836bb31b7cbSManikanta Pubbisetty 	       WMI_SERVICE_REPORT_AIRTIME, len);
83733410a51SAshok Raj Nagarajan 	SVCMAP(WMI_10_4_SERVICE_TX_PWR_PER_PEER,
83833410a51SAshok Raj Nagarajan 	       WMI_SERVICE_TX_PWR_PER_PEER, len);
839bbdc8c5aSYingying Tang 	SVCMAP(WMI_10_4_SERVICE_RESET_CHIP,
840bbdc8c5aSYingying Tang 	       WMI_SERVICE_RESET_CHIP, len);
8415d582be0STamizh Chelvam 	SVCMAP(WMI_10_4_SERVICE_PEER_TID_CONFIGS_SUPPORT,
8425d582be0STamizh Chelvam 	       WMI_SERVICE_PEER_TID_CONFIGS_SUPPORT, len);
8437b2531d9STamizh Chelvam 	SVCMAP(WMI_10_4_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
8447b2531d9STamizh Chelvam 	       WMI_SERVICE_PEER_TID_CONFIGS_SUPPORT, len);
845840357ccSRaja Mani }
846840357ccSRaja Mani 
847cff990ceSMichal Kazior #undef SVCMAP
8485e3dd157SKalle Valo 
8495e3dd157SKalle Valo /* 2 word representation of MAC addr */
8505e3dd157SKalle Valo struct wmi_mac_addr {
8515e3dd157SKalle Valo 	union {
8525e3dd157SKalle Valo 		u8 addr[6];
8535e3dd157SKalle Valo 		struct {
8545e3dd157SKalle Valo 			u32 word0;
8555e3dd157SKalle Valo 			u32 word1;
8565e3dd157SKalle Valo 		} __packed;
8575e3dd157SKalle Valo 	} __packed;
8585e3dd157SKalle Valo } __packed;
8595e3dd157SKalle Valo 
860ce42870eSBartosz Markowski struct wmi_cmd_map {
861ce42870eSBartosz Markowski 	u32 init_cmdid;
862ce42870eSBartosz Markowski 	u32 start_scan_cmdid;
863ce42870eSBartosz Markowski 	u32 stop_scan_cmdid;
864ce42870eSBartosz Markowski 	u32 scan_chan_list_cmdid;
865ce42870eSBartosz Markowski 	u32 scan_sch_prio_tbl_cmdid;
86660e1d0fbSCarl Huang 	u32 scan_prob_req_oui_cmdid;
867ce42870eSBartosz Markowski 	u32 pdev_set_regdomain_cmdid;
868ce42870eSBartosz Markowski 	u32 pdev_set_channel_cmdid;
869ce42870eSBartosz Markowski 	u32 pdev_set_param_cmdid;
870ce42870eSBartosz Markowski 	u32 pdev_pktlog_enable_cmdid;
871ce42870eSBartosz Markowski 	u32 pdev_pktlog_disable_cmdid;
872ce42870eSBartosz Markowski 	u32 pdev_set_wmm_params_cmdid;
873ce42870eSBartosz Markowski 	u32 pdev_set_ht_cap_ie_cmdid;
874ce42870eSBartosz Markowski 	u32 pdev_set_vht_cap_ie_cmdid;
875ce42870eSBartosz Markowski 	u32 pdev_set_dscp_tid_map_cmdid;
876ce42870eSBartosz Markowski 	u32 pdev_set_quiet_mode_cmdid;
877ce42870eSBartosz Markowski 	u32 pdev_green_ap_ps_enable_cmdid;
878ce42870eSBartosz Markowski 	u32 pdev_get_tpc_config_cmdid;
879ce42870eSBartosz Markowski 	u32 pdev_set_base_macaddr_cmdid;
880ce42870eSBartosz Markowski 	u32 vdev_create_cmdid;
881ce42870eSBartosz Markowski 	u32 vdev_delete_cmdid;
882ce42870eSBartosz Markowski 	u32 vdev_start_request_cmdid;
883ce42870eSBartosz Markowski 	u32 vdev_restart_request_cmdid;
884ce42870eSBartosz Markowski 	u32 vdev_up_cmdid;
885ce42870eSBartosz Markowski 	u32 vdev_stop_cmdid;
886ce42870eSBartosz Markowski 	u32 vdev_down_cmdid;
887ce42870eSBartosz Markowski 	u32 vdev_set_param_cmdid;
888ce42870eSBartosz Markowski 	u32 vdev_install_key_cmdid;
889ce42870eSBartosz Markowski 	u32 peer_create_cmdid;
890ce42870eSBartosz Markowski 	u32 peer_delete_cmdid;
891ce42870eSBartosz Markowski 	u32 peer_flush_tids_cmdid;
892ce42870eSBartosz Markowski 	u32 peer_set_param_cmdid;
893ce42870eSBartosz Markowski 	u32 peer_assoc_cmdid;
894ce42870eSBartosz Markowski 	u32 peer_add_wds_entry_cmdid;
895ce42870eSBartosz Markowski 	u32 peer_remove_wds_entry_cmdid;
896ce42870eSBartosz Markowski 	u32 peer_mcast_group_cmdid;
897ce42870eSBartosz Markowski 	u32 bcn_tx_cmdid;
898ce42870eSBartosz Markowski 	u32 pdev_send_bcn_cmdid;
899ce42870eSBartosz Markowski 	u32 bcn_tmpl_cmdid;
900ce42870eSBartosz Markowski 	u32 bcn_filter_rx_cmdid;
901ce42870eSBartosz Markowski 	u32 prb_req_filter_rx_cmdid;
902ce42870eSBartosz Markowski 	u32 mgmt_tx_cmdid;
9031807da49SRakesh Pillai 	u32 mgmt_tx_send_cmdid;
904ce42870eSBartosz Markowski 	u32 prb_tmpl_cmdid;
905ce42870eSBartosz Markowski 	u32 addba_clear_resp_cmdid;
906ce42870eSBartosz Markowski 	u32 addba_send_cmdid;
907ce42870eSBartosz Markowski 	u32 addba_status_cmdid;
908ce42870eSBartosz Markowski 	u32 delba_send_cmdid;
909ce42870eSBartosz Markowski 	u32 addba_set_resp_cmdid;
910ce42870eSBartosz Markowski 	u32 send_singleamsdu_cmdid;
911ce42870eSBartosz Markowski 	u32 sta_powersave_mode_cmdid;
912ce42870eSBartosz Markowski 	u32 sta_powersave_param_cmdid;
913ce42870eSBartosz Markowski 	u32 sta_mimo_ps_mode_cmdid;
914ce42870eSBartosz Markowski 	u32 pdev_dfs_enable_cmdid;
915ce42870eSBartosz Markowski 	u32 pdev_dfs_disable_cmdid;
916ce42870eSBartosz Markowski 	u32 roam_scan_mode;
917ce42870eSBartosz Markowski 	u32 roam_scan_rssi_threshold;
918ce42870eSBartosz Markowski 	u32 roam_scan_period;
919ce42870eSBartosz Markowski 	u32 roam_scan_rssi_change_threshold;
920ce42870eSBartosz Markowski 	u32 roam_ap_profile;
921ce42870eSBartosz Markowski 	u32 ofl_scan_add_ap_profile;
922ce42870eSBartosz Markowski 	u32 ofl_scan_remove_ap_profile;
923ce42870eSBartosz Markowski 	u32 ofl_scan_period;
924ce42870eSBartosz Markowski 	u32 p2p_dev_set_device_info;
925ce42870eSBartosz Markowski 	u32 p2p_dev_set_discoverability;
926ce42870eSBartosz Markowski 	u32 p2p_go_set_beacon_ie;
927ce42870eSBartosz Markowski 	u32 p2p_go_set_probe_resp_ie;
928ce42870eSBartosz Markowski 	u32 p2p_set_vendor_ie_data_cmdid;
929ce42870eSBartosz Markowski 	u32 ap_ps_peer_param_cmdid;
930ce42870eSBartosz Markowski 	u32 ap_ps_peer_uapsd_coex_cmdid;
931ce42870eSBartosz Markowski 	u32 peer_rate_retry_sched_cmdid;
932ce42870eSBartosz Markowski 	u32 wlan_profile_trigger_cmdid;
933ce42870eSBartosz Markowski 	u32 wlan_profile_set_hist_intvl_cmdid;
934ce42870eSBartosz Markowski 	u32 wlan_profile_get_profile_data_cmdid;
935ce42870eSBartosz Markowski 	u32 wlan_profile_enable_profile_id_cmdid;
936ce42870eSBartosz Markowski 	u32 wlan_profile_list_profile_id_cmdid;
937ce42870eSBartosz Markowski 	u32 pdev_suspend_cmdid;
938ce42870eSBartosz Markowski 	u32 pdev_resume_cmdid;
939ce42870eSBartosz Markowski 	u32 add_bcn_filter_cmdid;
940ce42870eSBartosz Markowski 	u32 rmv_bcn_filter_cmdid;
941ce42870eSBartosz Markowski 	u32 wow_add_wake_pattern_cmdid;
942ce42870eSBartosz Markowski 	u32 wow_del_wake_pattern_cmdid;
943ce42870eSBartosz Markowski 	u32 wow_enable_disable_wake_event_cmdid;
944ce42870eSBartosz Markowski 	u32 wow_enable_cmdid;
945ce42870eSBartosz Markowski 	u32 wow_hostwakeup_from_sleep_cmdid;
946ce42870eSBartosz Markowski 	u32 rtt_measreq_cmdid;
947ce42870eSBartosz Markowski 	u32 rtt_tsf_cmdid;
948ce42870eSBartosz Markowski 	u32 vdev_spectral_scan_configure_cmdid;
949ce42870eSBartosz Markowski 	u32 vdev_spectral_scan_enable_cmdid;
950ce42870eSBartosz Markowski 	u32 request_stats_cmdid;
9510f7cb268SWen Gong 	u32 request_peer_stats_info_cmdid;
952ce42870eSBartosz Markowski 	u32 set_arp_ns_offload_cmdid;
953ce42870eSBartosz Markowski 	u32 network_list_offload_config_cmdid;
954ce42870eSBartosz Markowski 	u32 gtk_offload_cmdid;
955ce42870eSBartosz Markowski 	u32 csa_offload_enable_cmdid;
956ce42870eSBartosz Markowski 	u32 csa_offload_chanswitch_cmdid;
957ce42870eSBartosz Markowski 	u32 chatter_set_mode_cmdid;
958ce42870eSBartosz Markowski 	u32 peer_tid_addba_cmdid;
959ce42870eSBartosz Markowski 	u32 peer_tid_delba_cmdid;
960ce42870eSBartosz Markowski 	u32 sta_dtim_ps_method_cmdid;
961ce42870eSBartosz Markowski 	u32 sta_uapsd_auto_trig_cmdid;
962ce42870eSBartosz Markowski 	u32 sta_keepalive_cmd;
963ce42870eSBartosz Markowski 	u32 echo_cmdid;
964ce42870eSBartosz Markowski 	u32 pdev_utf_cmdid;
965ce42870eSBartosz Markowski 	u32 dbglog_cfg_cmdid;
966ce42870eSBartosz Markowski 	u32 pdev_qvit_cmdid;
967ce42870eSBartosz Markowski 	u32 pdev_ftm_intg_cmdid;
968ce42870eSBartosz Markowski 	u32 vdev_set_keepalive_cmdid;
969ce42870eSBartosz Markowski 	u32 vdev_get_keepalive_cmdid;
970ce42870eSBartosz Markowski 	u32 force_fw_hang_cmdid;
971ce42870eSBartosz Markowski 	u32 gpio_config_cmdid;
972ce42870eSBartosz Markowski 	u32 gpio_output_cmdid;
973a57a6a27SRajkumar Manoharan 	u32 pdev_get_temperature_cmdid;
9746d492fe2SMichal Kazior 	u32 vdev_set_wmm_params_cmdid;
975ad45c888SMarek Puzyniak 	u32 tdls_set_state_cmdid;
976ad45c888SMarek Puzyniak 	u32 tdls_peer_update_cmdid;
9775b272e30SMichal Kazior 	u32 adaptive_qcs_cmdid;
9782d491e69SRaja Mani 	u32 scan_update_request_cmdid;
9792d491e69SRaja Mani 	u32 vdev_standby_response_cmdid;
9802d491e69SRaja Mani 	u32 vdev_resume_response_cmdid;
9812d491e69SRaja Mani 	u32 wlan_peer_caching_add_peer_cmdid;
9822d491e69SRaja Mani 	u32 wlan_peer_caching_evict_peer_cmdid;
9832d491e69SRaja Mani 	u32 wlan_peer_caching_restore_peer_cmdid;
9842d491e69SRaja Mani 	u32 wlan_peer_caching_print_all_peers_info_cmdid;
9852d491e69SRaja Mani 	u32 peer_update_wds_entry_cmdid;
9862d491e69SRaja Mani 	u32 peer_add_proxy_sta_entry_cmdid;
9872d491e69SRaja Mani 	u32 rtt_keepalive_cmdid;
9882d491e69SRaja Mani 	u32 oem_req_cmdid;
9892d491e69SRaja Mani 	u32 nan_cmdid;
9902d491e69SRaja Mani 	u32 vdev_ratemask_cmdid;
9912d491e69SRaja Mani 	u32 qboost_cfg_cmdid;
9922d491e69SRaja Mani 	u32 pdev_smart_ant_enable_cmdid;
9932d491e69SRaja Mani 	u32 pdev_smart_ant_set_rx_antenna_cmdid;
9942d491e69SRaja Mani 	u32 peer_smart_ant_set_tx_antenna_cmdid;
9952d491e69SRaja Mani 	u32 peer_smart_ant_set_train_info_cmdid;
9962d491e69SRaja Mani 	u32 peer_smart_ant_set_node_config_ops_cmdid;
9972d491e69SRaja Mani 	u32 pdev_set_antenna_switch_table_cmdid;
9982d491e69SRaja Mani 	u32 pdev_set_ctl_table_cmdid;
9992d491e69SRaja Mani 	u32 pdev_set_mimogain_table_cmdid;
10002d491e69SRaja Mani 	u32 pdev_ratepwr_table_cmdid;
10012d491e69SRaja Mani 	u32 pdev_ratepwr_chainmsk_table_cmdid;
10022d491e69SRaja Mani 	u32 pdev_fips_cmdid;
10032d491e69SRaja Mani 	u32 tt_set_conf_cmdid;
10042d491e69SRaja Mani 	u32 fwtest_cmdid;
10052d491e69SRaja Mani 	u32 vdev_atf_request_cmdid;
10062d491e69SRaja Mani 	u32 peer_atf_request_cmdid;
10072d491e69SRaja Mani 	u32 pdev_get_ani_cck_config_cmdid;
10082d491e69SRaja Mani 	u32 pdev_get_ani_ofdm_config_cmdid;
10092d491e69SRaja Mani 	u32 pdev_reserve_ast_entry_cmdid;
10102d491e69SRaja Mani 	u32 pdev_get_nfcal_power_cmdid;
10112d491e69SRaja Mani 	u32 pdev_get_tpc_cmdid;
10122d491e69SRaja Mani 	u32 pdev_get_ast_info_cmdid;
10132d491e69SRaja Mani 	u32 vdev_set_dscp_tid_map_cmdid;
10142d491e69SRaja Mani 	u32 pdev_get_info_cmdid;
10152d491e69SRaja Mani 	u32 vdev_get_info_cmdid;
10162d491e69SRaja Mani 	u32 vdev_filter_neighbor_rx_packets_cmdid;
10172d491e69SRaja Mani 	u32 mu_cal_start_cmdid;
10182d491e69SRaja Mani 	u32 set_cca_params_cmdid;
10192d491e69SRaja Mani 	u32 pdev_bss_chan_info_request_cmdid;
102062f77f09SMaharaja 	u32 pdev_enable_adaptive_cca_cmdid;
102147771902SRaja Mani 	u32 ext_resource_cfg_cmdid;
1022add6cd8dSManikanta Pubbisetty 	u32 vdev_set_ie_cmdid;
1023add6cd8dSManikanta Pubbisetty 	u32 set_lteu_config_cmdid;
1024add6cd8dSManikanta Pubbisetty 	u32 atf_ssid_grouping_request_cmdid;
1025add6cd8dSManikanta Pubbisetty 	u32 peer_atf_ext_request_cmdid;
1026add6cd8dSManikanta Pubbisetty 	u32 set_periodic_channel_stats_cfg_cmdid;
1027add6cd8dSManikanta Pubbisetty 	u32 peer_bwf_request_cmdid;
1028add6cd8dSManikanta Pubbisetty 	u32 btcoex_cfg_cmdid;
1029add6cd8dSManikanta Pubbisetty 	u32 peer_tx_mu_txmit_count_cmdid;
1030add6cd8dSManikanta Pubbisetty 	u32 peer_tx_mu_txmit_rstcnt_cmdid;
1031add6cd8dSManikanta Pubbisetty 	u32 peer_gid_userpos_list_cmdid;
1032add6cd8dSManikanta Pubbisetty 	u32 pdev_check_cal_version_cmdid;
1033add6cd8dSManikanta Pubbisetty 	u32 coex_version_cfg_cmid;
1034add6cd8dSManikanta Pubbisetty 	u32 pdev_get_rx_filter_cmdid;
1035add6cd8dSManikanta Pubbisetty 	u32 pdev_extended_nss_cfg_cmdid;
1036add6cd8dSManikanta Pubbisetty 	u32 vdev_set_scan_nac_rssi_cmdid;
1037add6cd8dSManikanta Pubbisetty 	u32 prog_gpio_band_select_cmdid;
1038add6cd8dSManikanta Pubbisetty 	u32 config_smart_logging_cmdid;
1039add6cd8dSManikanta Pubbisetty 	u32 debug_fatal_condition_cmdid;
1040add6cd8dSManikanta Pubbisetty 	u32 get_tsf_timer_cmdid;
1041add6cd8dSManikanta Pubbisetty 	u32 pdev_get_tpc_table_cmdid;
1042add6cd8dSManikanta Pubbisetty 	u32 vdev_sifs_trigger_time_cmdid;
1043add6cd8dSManikanta Pubbisetty 	u32 pdev_wds_entry_list_cmdid;
1044add6cd8dSManikanta Pubbisetty 	u32 tdls_set_offchan_mode_cmdid;
10456f6eb1bcSSriram R 	u32 radar_found_cmdid;
104684758d4dSBhagavathi Perumal S 	u32 set_bb_timing_cmdid;
10475d582be0STamizh Chelvam 	u32 per_peer_per_tid_config_cmdid;
1048ce42870eSBartosz Markowski };
1049ce42870eSBartosz Markowski 
10505e3dd157SKalle Valo /*
10515e3dd157SKalle Valo  * wmi command groups.
10525e3dd157SKalle Valo  */
10535e3dd157SKalle Valo enum wmi_cmd_group {
10545e3dd157SKalle Valo 	/* 0 to 2 are reserved */
10555e3dd157SKalle Valo 	WMI_GRP_START = 0x3,
10565e3dd157SKalle Valo 	WMI_GRP_SCAN = WMI_GRP_START,
10575e3dd157SKalle Valo 	WMI_GRP_PDEV,
10585e3dd157SKalle Valo 	WMI_GRP_VDEV,
10595e3dd157SKalle Valo 	WMI_GRP_PEER,
10605e3dd157SKalle Valo 	WMI_GRP_MGMT,
10615e3dd157SKalle Valo 	WMI_GRP_BA_NEG,
10625e3dd157SKalle Valo 	WMI_GRP_STA_PS,
10635e3dd157SKalle Valo 	WMI_GRP_DFS,
10645e3dd157SKalle Valo 	WMI_GRP_ROAM,
10655e3dd157SKalle Valo 	WMI_GRP_OFL_SCAN,
10665e3dd157SKalle Valo 	WMI_GRP_P2P,
10675e3dd157SKalle Valo 	WMI_GRP_AP_PS,
10685e3dd157SKalle Valo 	WMI_GRP_RATE_CTRL,
10695e3dd157SKalle Valo 	WMI_GRP_PROFILE,
10705e3dd157SKalle Valo 	WMI_GRP_SUSPEND,
10715e3dd157SKalle Valo 	WMI_GRP_BCN_FILTER,
10725e3dd157SKalle Valo 	WMI_GRP_WOW,
10735e3dd157SKalle Valo 	WMI_GRP_RTT,
10745e3dd157SKalle Valo 	WMI_GRP_SPECTRAL,
10755e3dd157SKalle Valo 	WMI_GRP_STATS,
10765e3dd157SKalle Valo 	WMI_GRP_ARP_NS_OFL,
10775e3dd157SKalle Valo 	WMI_GRP_NLO_OFL,
10785e3dd157SKalle Valo 	WMI_GRP_GTK_OFL,
10795e3dd157SKalle Valo 	WMI_GRP_CSA_OFL,
10805e3dd157SKalle Valo 	WMI_GRP_CHATTER,
10815e3dd157SKalle Valo 	WMI_GRP_TID_ADDBA,
10825e3dd157SKalle Valo 	WMI_GRP_MISC,
10835e3dd157SKalle Valo 	WMI_GRP_GPIO,
10845e3dd157SKalle Valo };
10855e3dd157SKalle Valo 
10865e3dd157SKalle Valo #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
10875e3dd157SKalle Valo #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
10885e3dd157SKalle Valo 
108934957b25SBartosz Markowski #define WMI_CMD_UNSUPPORTED 0
1090b7e3adf9SBartosz Markowski 
1091b7e3adf9SBartosz Markowski /* Command IDs and command events for MAIN FW. */
10925e3dd157SKalle Valo enum wmi_cmd_id {
10935e3dd157SKalle Valo 	WMI_INIT_CMDID = 0x1,
10945e3dd157SKalle Valo 
10955e3dd157SKalle Valo 	/* Scan specific commands */
10965e3dd157SKalle Valo 	WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN),
10975e3dd157SKalle Valo 	WMI_STOP_SCAN_CMDID,
10985e3dd157SKalle Valo 	WMI_SCAN_CHAN_LIST_CMDID,
10995e3dd157SKalle Valo 	WMI_SCAN_SCH_PRIO_TBL_CMDID,
11005e3dd157SKalle Valo 
11015e3dd157SKalle Valo 	/* PDEV (physical device) specific commands */
11025e3dd157SKalle Valo 	WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV),
11035e3dd157SKalle Valo 	WMI_PDEV_SET_CHANNEL_CMDID,
11045e3dd157SKalle Valo 	WMI_PDEV_SET_PARAM_CMDID,
11055e3dd157SKalle Valo 	WMI_PDEV_PKTLOG_ENABLE_CMDID,
11065e3dd157SKalle Valo 	WMI_PDEV_PKTLOG_DISABLE_CMDID,
11075e3dd157SKalle Valo 	WMI_PDEV_SET_WMM_PARAMS_CMDID,
11085e3dd157SKalle Valo 	WMI_PDEV_SET_HT_CAP_IE_CMDID,
11095e3dd157SKalle Valo 	WMI_PDEV_SET_VHT_CAP_IE_CMDID,
11105e3dd157SKalle Valo 	WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
11115e3dd157SKalle Valo 	WMI_PDEV_SET_QUIET_MODE_CMDID,
11125e3dd157SKalle Valo 	WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
11135e3dd157SKalle Valo 	WMI_PDEV_GET_TPC_CONFIG_CMDID,
11145e3dd157SKalle Valo 	WMI_PDEV_SET_BASE_MACADDR_CMDID,
11155e3dd157SKalle Valo 
11165e3dd157SKalle Valo 	/* VDEV (virtual device) specific commands */
11175e3dd157SKalle Valo 	WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV),
11185e3dd157SKalle Valo 	WMI_VDEV_DELETE_CMDID,
11195e3dd157SKalle Valo 	WMI_VDEV_START_REQUEST_CMDID,
11205e3dd157SKalle Valo 	WMI_VDEV_RESTART_REQUEST_CMDID,
11215e3dd157SKalle Valo 	WMI_VDEV_UP_CMDID,
11225e3dd157SKalle Valo 	WMI_VDEV_STOP_CMDID,
11235e3dd157SKalle Valo 	WMI_VDEV_DOWN_CMDID,
11245e3dd157SKalle Valo 	WMI_VDEV_SET_PARAM_CMDID,
11255e3dd157SKalle Valo 	WMI_VDEV_INSTALL_KEY_CMDID,
11265e3dd157SKalle Valo 
11275e3dd157SKalle Valo 	/* peer specific commands */
11285e3dd157SKalle Valo 	WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER),
11295e3dd157SKalle Valo 	WMI_PEER_DELETE_CMDID,
11305e3dd157SKalle Valo 	WMI_PEER_FLUSH_TIDS_CMDID,
11315e3dd157SKalle Valo 	WMI_PEER_SET_PARAM_CMDID,
11325e3dd157SKalle Valo 	WMI_PEER_ASSOC_CMDID,
11335e3dd157SKalle Valo 	WMI_PEER_ADD_WDS_ENTRY_CMDID,
11345e3dd157SKalle Valo 	WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
11355e3dd157SKalle Valo 	WMI_PEER_MCAST_GROUP_CMDID,
11365e3dd157SKalle Valo 
11375e3dd157SKalle Valo 	/* beacon/management specific commands */
11385e3dd157SKalle Valo 	WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT),
11395e3dd157SKalle Valo 	WMI_PDEV_SEND_BCN_CMDID,
11405e3dd157SKalle Valo 	WMI_BCN_TMPL_CMDID,
11415e3dd157SKalle Valo 	WMI_BCN_FILTER_RX_CMDID,
11425e3dd157SKalle Valo 	WMI_PRB_REQ_FILTER_RX_CMDID,
11435e3dd157SKalle Valo 	WMI_MGMT_TX_CMDID,
11445e3dd157SKalle Valo 	WMI_PRB_TMPL_CMDID,
11455e3dd157SKalle Valo 
11465e3dd157SKalle Valo 	/* commands to directly control BA negotiation directly from host. */
11475e3dd157SKalle Valo 	WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG),
11485e3dd157SKalle Valo 	WMI_ADDBA_SEND_CMDID,
11495e3dd157SKalle Valo 	WMI_ADDBA_STATUS_CMDID,
11505e3dd157SKalle Valo 	WMI_DELBA_SEND_CMDID,
11515e3dd157SKalle Valo 	WMI_ADDBA_SET_RESP_CMDID,
11525e3dd157SKalle Valo 	WMI_SEND_SINGLEAMSDU_CMDID,
11535e3dd157SKalle Valo 
11545e3dd157SKalle Valo 	/* Station power save specific config */
11555e3dd157SKalle Valo 	WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS),
11565e3dd157SKalle Valo 	WMI_STA_POWERSAVE_PARAM_CMDID,
11575e3dd157SKalle Valo 	WMI_STA_MIMO_PS_MODE_CMDID,
11585e3dd157SKalle Valo 
11595e3dd157SKalle Valo 	/** DFS-specific commands */
11605e3dd157SKalle Valo 	WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS),
11615e3dd157SKalle Valo 	WMI_PDEV_DFS_DISABLE_CMDID,
11625e3dd157SKalle Valo 
11635e3dd157SKalle Valo 	/* Roaming specific  commands */
11645e3dd157SKalle Valo 	WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM),
11655e3dd157SKalle Valo 	WMI_ROAM_SCAN_RSSI_THRESHOLD,
11665e3dd157SKalle Valo 	WMI_ROAM_SCAN_PERIOD,
11675e3dd157SKalle Valo 	WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
11685e3dd157SKalle Valo 	WMI_ROAM_AP_PROFILE,
11695e3dd157SKalle Valo 
11705e3dd157SKalle Valo 	/* offload scan specific commands */
11715e3dd157SKalle Valo 	WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN),
11725e3dd157SKalle Valo 	WMI_OFL_SCAN_REMOVE_AP_PROFILE,
11735e3dd157SKalle Valo 	WMI_OFL_SCAN_PERIOD,
11745e3dd157SKalle Valo 
11755e3dd157SKalle Valo 	/* P2P specific commands */
11765e3dd157SKalle Valo 	WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P),
11775e3dd157SKalle Valo 	WMI_P2P_DEV_SET_DISCOVERABILITY,
11785e3dd157SKalle Valo 	WMI_P2P_GO_SET_BEACON_IE,
11795e3dd157SKalle Valo 	WMI_P2P_GO_SET_PROBE_RESP_IE,
11805e3dd157SKalle Valo 	WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
11815e3dd157SKalle Valo 
11825e3dd157SKalle Valo 	/* AP power save specific config */
11835e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS),
11845e3dd157SKalle Valo 	WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
11855e3dd157SKalle Valo 
11865e3dd157SKalle Valo 	/* Rate-control specific commands */
11875e3dd157SKalle Valo 	WMI_PEER_RATE_RETRY_SCHED_CMDID =
11885e3dd157SKalle Valo 	WMI_CMD_GRP(WMI_GRP_RATE_CTRL),
11895e3dd157SKalle Valo 
11905e3dd157SKalle Valo 	/* WLAN Profiling commands. */
11915e3dd157SKalle Valo 	WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE),
11925e3dd157SKalle Valo 	WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
11935e3dd157SKalle Valo 	WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
11945e3dd157SKalle Valo 	WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
11955e3dd157SKalle Valo 	WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
11965e3dd157SKalle Valo 
11975e3dd157SKalle Valo 	/* Suspend resume command Ids */
11985e3dd157SKalle Valo 	WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND),
11995e3dd157SKalle Valo 	WMI_PDEV_RESUME_CMDID,
12005e3dd157SKalle Valo 
12015e3dd157SKalle Valo 	/* Beacon filter commands */
12025e3dd157SKalle Valo 	WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER),
12035e3dd157SKalle Valo 	WMI_RMV_BCN_FILTER_CMDID,
12045e3dd157SKalle Valo 
12055e3dd157SKalle Valo 	/* WOW Specific WMI commands*/
12065e3dd157SKalle Valo 	WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW),
12075e3dd157SKalle Valo 	WMI_WOW_DEL_WAKE_PATTERN_CMDID,
12085e3dd157SKalle Valo 	WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
12095e3dd157SKalle Valo 	WMI_WOW_ENABLE_CMDID,
12105e3dd157SKalle Valo 	WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
12115e3dd157SKalle Valo 
12125e3dd157SKalle Valo 	/* RTT measurement related cmd */
12135e3dd157SKalle Valo 	WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT),
12145e3dd157SKalle Valo 	WMI_RTT_TSF_CMDID,
12155e3dd157SKalle Valo 
12165e3dd157SKalle Valo 	/* spectral scan commands */
12175e3dd157SKalle Valo 	WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL),
12185e3dd157SKalle Valo 	WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
12195e3dd157SKalle Valo 
12205e3dd157SKalle Valo 	/* F/W stats */
12215e3dd157SKalle Valo 	WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS),
12225e3dd157SKalle Valo 
12235e3dd157SKalle Valo 	/* ARP OFFLOAD REQUEST*/
12245e3dd157SKalle Valo 	WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL),
12255e3dd157SKalle Valo 
12265e3dd157SKalle Valo 	/* NS offload confid*/
12275e3dd157SKalle Valo 	WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL),
12285e3dd157SKalle Valo 
12295e3dd157SKalle Valo 	/* GTK offload Specific WMI commands*/
12305e3dd157SKalle Valo 	WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL),
12315e3dd157SKalle Valo 
12325e3dd157SKalle Valo 	/* CSA offload Specific WMI commands*/
12335e3dd157SKalle Valo 	WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL),
12345e3dd157SKalle Valo 	WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
12355e3dd157SKalle Valo 
12365e3dd157SKalle Valo 	/* Chatter commands*/
12375e3dd157SKalle Valo 	WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER),
12385e3dd157SKalle Valo 
12395e3dd157SKalle Valo 	/* addba specific commands */
12405e3dd157SKalle Valo 	WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA),
12415e3dd157SKalle Valo 	WMI_PEER_TID_DELBA_CMDID,
12425e3dd157SKalle Valo 
12435e3dd157SKalle Valo 	/* set station mimo powersave method */
12445e3dd157SKalle Valo 	WMI_STA_DTIM_PS_METHOD_CMDID,
12455e3dd157SKalle Valo 	/* Configure the Station UAPSD AC Auto Trigger Parameters */
12465e3dd157SKalle Valo 	WMI_STA_UAPSD_AUTO_TRIG_CMDID,
12475e3dd157SKalle Valo 
12485e3dd157SKalle Valo 	/* STA Keep alive parameter configuration,
124937ff1b0dSMarcin Rokicki 	 * Requires WMI_SERVICE_STA_KEEP_ALIVE
125037ff1b0dSMarcin Rokicki 	 */
12515e3dd157SKalle Valo 	WMI_STA_KEEPALIVE_CMD,
12525e3dd157SKalle Valo 
12535e3dd157SKalle Valo 	/* misc command group */
12545e3dd157SKalle Valo 	WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC),
12555e3dd157SKalle Valo 	WMI_PDEV_UTF_CMDID,
12565e3dd157SKalle Valo 	WMI_DBGLOG_CFG_CMDID,
12575e3dd157SKalle Valo 	WMI_PDEV_QVIT_CMDID,
12585e3dd157SKalle Valo 	WMI_PDEV_FTM_INTG_CMDID,
12595e3dd157SKalle Valo 	WMI_VDEV_SET_KEEPALIVE_CMDID,
12605e3dd157SKalle Valo 	WMI_VDEV_GET_KEEPALIVE_CMDID,
12619cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_CMDID,
12625e3dd157SKalle Valo 
12635e3dd157SKalle Valo 	/* GPIO Configuration */
12645e3dd157SKalle Valo 	WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO),
12655e3dd157SKalle Valo 	WMI_GPIO_OUTPUT_CMDID,
12665e3dd157SKalle Valo };
12675e3dd157SKalle Valo 
12685e3dd157SKalle Valo enum wmi_event_id {
12695e3dd157SKalle Valo 	WMI_SERVICE_READY_EVENTID = 0x1,
12705e3dd157SKalle Valo 	WMI_READY_EVENTID,
1271cea19a6cSCarl Huang 	WMI_SERVICE_AVAILABLE_EVENTID,
12725e3dd157SKalle Valo 
12735e3dd157SKalle Valo 	/* Scan specific events */
12745e3dd157SKalle Valo 	WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
12755e3dd157SKalle Valo 
12765e3dd157SKalle Valo 	/* PDEV specific events */
12775e3dd157SKalle Valo 	WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
12785e3dd157SKalle Valo 	WMI_CHAN_INFO_EVENTID,
12795e3dd157SKalle Valo 	WMI_PHYERR_EVENTID,
12805e3dd157SKalle Valo 
12815e3dd157SKalle Valo 	/* VDEV specific events */
12825e3dd157SKalle Valo 	WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
12835e3dd157SKalle Valo 	WMI_VDEV_STOPPED_EVENTID,
12845e3dd157SKalle Valo 	WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
12855e3dd157SKalle Valo 
12865e3dd157SKalle Valo 	/* peer specific events */
12875e3dd157SKalle Valo 	WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
12885e3dd157SKalle Valo 
12895e3dd157SKalle Valo 	/* beacon/mgmt specific events */
12905e3dd157SKalle Valo 	WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
12915e3dd157SKalle Valo 	WMI_HOST_SWBA_EVENTID,
12925e3dd157SKalle Valo 	WMI_TBTTOFFSET_UPDATE_EVENTID,
12935e3dd157SKalle Valo 
12945e3dd157SKalle Valo 	/* ADDBA Related WMI Events*/
12955e3dd157SKalle Valo 	WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
12965e3dd157SKalle Valo 	WMI_TX_ADDBA_COMPLETE_EVENTID,
12975e3dd157SKalle Valo 
12985e3dd157SKalle Valo 	/* Roam event to trigger roaming on host */
12995e3dd157SKalle Valo 	WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
13005e3dd157SKalle Valo 	WMI_PROFILE_MATCH,
13015e3dd157SKalle Valo 
13025e3dd157SKalle Valo 	/* WoW */
13035e3dd157SKalle Valo 	WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
13045e3dd157SKalle Valo 
13055e3dd157SKalle Valo 	/* RTT */
13065e3dd157SKalle Valo 	WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
13075e3dd157SKalle Valo 	WMI_TSF_MEASUREMENT_REPORT_EVENTID,
13085e3dd157SKalle Valo 	WMI_RTT_ERROR_REPORT_EVENTID,
13095e3dd157SKalle Valo 
13105e3dd157SKalle Valo 	/* GTK offload */
13115e3dd157SKalle Valo 	WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
13125e3dd157SKalle Valo 	WMI_GTK_REKEY_FAIL_EVENTID,
13135e3dd157SKalle Valo 
13145e3dd157SKalle Valo 	/* CSA IE received event */
13155e3dd157SKalle Valo 	WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
13165e3dd157SKalle Valo 
13175e3dd157SKalle Valo 	/* Misc events */
13185e3dd157SKalle Valo 	WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
13195e3dd157SKalle Valo 	WMI_PDEV_UTF_EVENTID,
13205e3dd157SKalle Valo 	WMI_DEBUG_MESG_EVENTID,
13215e3dd157SKalle Valo 	WMI_UPDATE_STATS_EVENTID,
13225e3dd157SKalle Valo 	WMI_DEBUG_PRINT_EVENTID,
13235e3dd157SKalle Valo 	WMI_DCS_INTERFERENCE_EVENTID,
13245e3dd157SKalle Valo 	WMI_PDEV_QVIT_EVENTID,
13255e3dd157SKalle Valo 	WMI_WLAN_PROFILE_DATA_EVENTID,
13265e3dd157SKalle Valo 	WMI_PDEV_FTM_INTG_EVENTID,
13275e3dd157SKalle Valo 	WMI_WLAN_FREQ_AVOID_EVENTID,
13285e3dd157SKalle Valo 	WMI_VDEV_GET_KEEPALIVE_EVENTID,
13295e3dd157SKalle Valo 
13305e3dd157SKalle Valo 	/* GPIO Event */
13315e3dd157SKalle Valo 	WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
13325e3dd157SKalle Valo };
13335e3dd157SKalle Valo 
1334b7e3adf9SBartosz Markowski /* Command IDs and command events for 10.X firmware */
1335b7e3adf9SBartosz Markowski enum wmi_10x_cmd_id {
1336b7e3adf9SBartosz Markowski 	WMI_10X_START_CMDID = 0x9000,
1337b7e3adf9SBartosz Markowski 	WMI_10X_END_CMDID = 0x9FFF,
1338b7e3adf9SBartosz Markowski 
1339b7e3adf9SBartosz Markowski 	/* initialize the wlan sub system */
1340b7e3adf9SBartosz Markowski 	WMI_10X_INIT_CMDID,
1341b7e3adf9SBartosz Markowski 
1342b7e3adf9SBartosz Markowski 	/* Scan specific commands */
1343b7e3adf9SBartosz Markowski 
1344b7e3adf9SBartosz Markowski 	WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID,
1345b7e3adf9SBartosz Markowski 	WMI_10X_STOP_SCAN_CMDID,
1346b7e3adf9SBartosz Markowski 	WMI_10X_SCAN_CHAN_LIST_CMDID,
1347b7e3adf9SBartosz Markowski 	WMI_10X_ECHO_CMDID,
1348b7e3adf9SBartosz Markowski 
1349b7e3adf9SBartosz Markowski 	/* PDEV(physical device) specific commands */
1350b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
1351b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_CHANNEL_CMDID,
1352b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_PARAM_CMDID,
1353b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
1354b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
1355b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
1356b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
1357b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
1358b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
1359b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
1360b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
1361b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1362b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
1363b7e3adf9SBartosz Markowski 
1364b7e3adf9SBartosz Markowski 	/* VDEV(virtual device) specific commands */
1365b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_CREATE_CMDID,
1366b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_DELETE_CMDID,
1367b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_START_REQUEST_CMDID,
1368b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_RESTART_REQUEST_CMDID,
1369b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_UP_CMDID,
1370b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_STOP_CMDID,
1371b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_DOWN_CMDID,
1372b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_STANDBY_RESPONSE_CMDID,
1373b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_RESUME_RESPONSE_CMDID,
1374b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_SET_PARAM_CMDID,
1375b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_INSTALL_KEY_CMDID,
1376b7e3adf9SBartosz Markowski 
1377b7e3adf9SBartosz Markowski 	/* peer specific commands */
1378b7e3adf9SBartosz Markowski 	WMI_10X_PEER_CREATE_CMDID,
1379b7e3adf9SBartosz Markowski 	WMI_10X_PEER_DELETE_CMDID,
1380b7e3adf9SBartosz Markowski 	WMI_10X_PEER_FLUSH_TIDS_CMDID,
1381b7e3adf9SBartosz Markowski 	WMI_10X_PEER_SET_PARAM_CMDID,
1382b7e3adf9SBartosz Markowski 	WMI_10X_PEER_ASSOC_CMDID,
1383b7e3adf9SBartosz Markowski 	WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
1384b7e3adf9SBartosz Markowski 	WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
1385b7e3adf9SBartosz Markowski 	WMI_10X_PEER_MCAST_GROUP_CMDID,
1386b7e3adf9SBartosz Markowski 
1387b7e3adf9SBartosz Markowski 	/* beacon/management specific commands */
1388b7e3adf9SBartosz Markowski 
1389b7e3adf9SBartosz Markowski 	WMI_10X_BCN_TX_CMDID,
1390b7e3adf9SBartosz Markowski 	WMI_10X_BCN_PRB_TMPL_CMDID,
1391b7e3adf9SBartosz Markowski 	WMI_10X_BCN_FILTER_RX_CMDID,
1392b7e3adf9SBartosz Markowski 	WMI_10X_PRB_REQ_FILTER_RX_CMDID,
1393b7e3adf9SBartosz Markowski 	WMI_10X_MGMT_TX_CMDID,
1394b7e3adf9SBartosz Markowski 
1395b7e3adf9SBartosz Markowski 	/* commands to directly control ba negotiation directly from host. */
1396b7e3adf9SBartosz Markowski 	WMI_10X_ADDBA_CLEAR_RESP_CMDID,
1397b7e3adf9SBartosz Markowski 	WMI_10X_ADDBA_SEND_CMDID,
1398b7e3adf9SBartosz Markowski 	WMI_10X_ADDBA_STATUS_CMDID,
1399b7e3adf9SBartosz Markowski 	WMI_10X_DELBA_SEND_CMDID,
1400b7e3adf9SBartosz Markowski 	WMI_10X_ADDBA_SET_RESP_CMDID,
1401b7e3adf9SBartosz Markowski 	WMI_10X_SEND_SINGLEAMSDU_CMDID,
1402b7e3adf9SBartosz Markowski 
1403b7e3adf9SBartosz Markowski 	/* Station power save specific config */
1404b7e3adf9SBartosz Markowski 	WMI_10X_STA_POWERSAVE_MODE_CMDID,
1405b7e3adf9SBartosz Markowski 	WMI_10X_STA_POWERSAVE_PARAM_CMDID,
1406b7e3adf9SBartosz Markowski 	WMI_10X_STA_MIMO_PS_MODE_CMDID,
1407b7e3adf9SBartosz Markowski 
1408b7e3adf9SBartosz Markowski 	/* set debug log config */
1409b7e3adf9SBartosz Markowski 	WMI_10X_DBGLOG_CFG_CMDID,
1410b7e3adf9SBartosz Markowski 
1411b7e3adf9SBartosz Markowski 	/* DFS-specific commands */
1412b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_DFS_ENABLE_CMDID,
1413b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_DFS_DISABLE_CMDID,
1414b7e3adf9SBartosz Markowski 
1415b7e3adf9SBartosz Markowski 	/* QVIT specific command id */
1416b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_QVIT_CMDID,
1417b7e3adf9SBartosz Markowski 
1418b7e3adf9SBartosz Markowski 	/* Offload Scan and Roaming related  commands */
1419b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_SCAN_MODE,
1420b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
1421b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_SCAN_PERIOD,
1422b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1423b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_AP_PROFILE,
1424b7e3adf9SBartosz Markowski 	WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
1425b7e3adf9SBartosz Markowski 	WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
1426b7e3adf9SBartosz Markowski 	WMI_10X_OFL_SCAN_PERIOD,
1427b7e3adf9SBartosz Markowski 
1428b7e3adf9SBartosz Markowski 	/* P2P specific commands */
1429b7e3adf9SBartosz Markowski 	WMI_10X_P2P_DEV_SET_DEVICE_INFO,
1430b7e3adf9SBartosz Markowski 	WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
1431b7e3adf9SBartosz Markowski 	WMI_10X_P2P_GO_SET_BEACON_IE,
1432b7e3adf9SBartosz Markowski 	WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
1433b7e3adf9SBartosz Markowski 
1434b7e3adf9SBartosz Markowski 	/* AP power save specific config */
1435b7e3adf9SBartosz Markowski 	WMI_10X_AP_PS_PEER_PARAM_CMDID,
1436b7e3adf9SBartosz Markowski 	WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID,
1437b7e3adf9SBartosz Markowski 
1438b7e3adf9SBartosz Markowski 	/* Rate-control specific commands */
1439b7e3adf9SBartosz Markowski 	WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
1440b7e3adf9SBartosz Markowski 
1441b7e3adf9SBartosz Markowski 	/* WLAN Profiling commands. */
1442b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
1443b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1444b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1445b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1446b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1447b7e3adf9SBartosz Markowski 
1448b7e3adf9SBartosz Markowski 	/* Suspend resume command Ids */
1449b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SUSPEND_CMDID,
1450b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_RESUME_CMDID,
1451b7e3adf9SBartosz Markowski 
1452b7e3adf9SBartosz Markowski 	/* Beacon filter commands */
1453b7e3adf9SBartosz Markowski 	WMI_10X_ADD_BCN_FILTER_CMDID,
1454b7e3adf9SBartosz Markowski 	WMI_10X_RMV_BCN_FILTER_CMDID,
1455b7e3adf9SBartosz Markowski 
1456b7e3adf9SBartosz Markowski 	/* WOW Specific WMI commands*/
1457b7e3adf9SBartosz Markowski 	WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
1458b7e3adf9SBartosz Markowski 	WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
1459b7e3adf9SBartosz Markowski 	WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1460b7e3adf9SBartosz Markowski 	WMI_10X_WOW_ENABLE_CMDID,
1461b7e3adf9SBartosz Markowski 	WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1462b7e3adf9SBartosz Markowski 
1463b7e3adf9SBartosz Markowski 	/* RTT measurement related cmd */
1464b7e3adf9SBartosz Markowski 	WMI_10X_RTT_MEASREQ_CMDID,
1465b7e3adf9SBartosz Markowski 	WMI_10X_RTT_TSF_CMDID,
1466b7e3adf9SBartosz Markowski 
1467b7e3adf9SBartosz Markowski 	/* transmit beacon by value */
1468b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_SEND_BCN_CMDID,
1469b7e3adf9SBartosz Markowski 
1470b7e3adf9SBartosz Markowski 	/* F/W stats */
1471b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1472b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1473b7e3adf9SBartosz Markowski 	WMI_10X_REQUEST_STATS_CMDID,
1474b7e3adf9SBartosz Markowski 
1475b7e3adf9SBartosz Markowski 	/* GPIO Configuration */
1476b7e3adf9SBartosz Markowski 	WMI_10X_GPIO_CONFIG_CMDID,
1477b7e3adf9SBartosz Markowski 	WMI_10X_GPIO_OUTPUT_CMDID,
1478b7e3adf9SBartosz Markowski 
1479b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1,
1480b7e3adf9SBartosz Markowski };
1481b7e3adf9SBartosz Markowski 
1482b7e3adf9SBartosz Markowski enum wmi_10x_event_id {
1483b7e3adf9SBartosz Markowski 	WMI_10X_SERVICE_READY_EVENTID = 0x8000,
1484b7e3adf9SBartosz Markowski 	WMI_10X_READY_EVENTID,
1485b7e3adf9SBartosz Markowski 	WMI_10X_START_EVENTID = 0x9000,
1486b7e3adf9SBartosz Markowski 	WMI_10X_END_EVENTID = 0x9FFF,
1487b7e3adf9SBartosz Markowski 
1488b7e3adf9SBartosz Markowski 	/* Scan specific events */
1489b7e3adf9SBartosz Markowski 	WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID,
1490b7e3adf9SBartosz Markowski 	WMI_10X_ECHO_EVENTID,
1491b7e3adf9SBartosz Markowski 	WMI_10X_DEBUG_MESG_EVENTID,
1492b7e3adf9SBartosz Markowski 	WMI_10X_UPDATE_STATS_EVENTID,
1493b7e3adf9SBartosz Markowski 
1494b7e3adf9SBartosz Markowski 	/* Instantaneous RSSI event */
1495b7e3adf9SBartosz Markowski 	WMI_10X_INST_RSSI_STATS_EVENTID,
1496b7e3adf9SBartosz Markowski 
1497b7e3adf9SBartosz Markowski 	/* VDEV specific events */
1498b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_START_RESP_EVENTID,
1499b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_STANDBY_REQ_EVENTID,
1500b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_RESUME_REQ_EVENTID,
1501b7e3adf9SBartosz Markowski 	WMI_10X_VDEV_STOPPED_EVENTID,
1502b7e3adf9SBartosz Markowski 
1503b7e3adf9SBartosz Markowski 	/* peer  specific events */
1504b7e3adf9SBartosz Markowski 	WMI_10X_PEER_STA_KICKOUT_EVENTID,
1505b7e3adf9SBartosz Markowski 
1506b7e3adf9SBartosz Markowski 	/* beacon/mgmt specific events */
1507b7e3adf9SBartosz Markowski 	WMI_10X_HOST_SWBA_EVENTID,
1508b7e3adf9SBartosz Markowski 	WMI_10X_TBTTOFFSET_UPDATE_EVENTID,
1509b7e3adf9SBartosz Markowski 	WMI_10X_MGMT_RX_EVENTID,
1510b7e3adf9SBartosz Markowski 
1511b7e3adf9SBartosz Markowski 	/* Channel stats event */
1512b7e3adf9SBartosz Markowski 	WMI_10X_CHAN_INFO_EVENTID,
1513b7e3adf9SBartosz Markowski 
1514b7e3adf9SBartosz Markowski 	/* PHY Error specific WMI event */
1515b7e3adf9SBartosz Markowski 	WMI_10X_PHYERR_EVENTID,
1516b7e3adf9SBartosz Markowski 
1517b7e3adf9SBartosz Markowski 	/* Roam event to trigger roaming on host */
1518b7e3adf9SBartosz Markowski 	WMI_10X_ROAM_EVENTID,
1519b7e3adf9SBartosz Markowski 
1520b7e3adf9SBartosz Markowski 	/* matching AP found from list of profiles */
1521b7e3adf9SBartosz Markowski 	WMI_10X_PROFILE_MATCH,
1522b7e3adf9SBartosz Markowski 
1523b7e3adf9SBartosz Markowski 	/* debug print message used for tracing FW code while debugging */
1524b7e3adf9SBartosz Markowski 	WMI_10X_DEBUG_PRINT_EVENTID,
1525b7e3adf9SBartosz Markowski 	/* VI spoecific event */
1526b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_QVIT_EVENTID,
1527b7e3adf9SBartosz Markowski 	/* FW code profile data in response to profile request */
1528b7e3adf9SBartosz Markowski 	WMI_10X_WLAN_PROFILE_DATA_EVENTID,
1529b7e3adf9SBartosz Markowski 
1530b7e3adf9SBartosz Markowski 	/*RTT related event ID*/
1531b7e3adf9SBartosz Markowski 	WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID,
1532b7e3adf9SBartosz Markowski 	WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID,
1533b7e3adf9SBartosz Markowski 	WMI_10X_RTT_ERROR_REPORT_EVENTID,
1534b7e3adf9SBartosz Markowski 
1535b7e3adf9SBartosz Markowski 	WMI_10X_WOW_WAKEUP_HOST_EVENTID,
1536b7e3adf9SBartosz Markowski 	WMI_10X_DCS_INTERFERENCE_EVENTID,
1537b7e3adf9SBartosz Markowski 
1538b7e3adf9SBartosz Markowski 	/* TPC config for the current operating channel */
1539b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_TPC_CONFIG_EVENTID,
1540b7e3adf9SBartosz Markowski 
1541b7e3adf9SBartosz Markowski 	WMI_10X_GPIO_INPUT_EVENTID,
1542b7e3adf9SBartosz Markowski 	WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID - 1,
1543b7e3adf9SBartosz Markowski };
1544b7e3adf9SBartosz Markowski 
154524c88f78SMichal Kazior enum wmi_10_2_cmd_id {
154624c88f78SMichal Kazior 	WMI_10_2_START_CMDID = 0x9000,
154724c88f78SMichal Kazior 	WMI_10_2_END_CMDID = 0x9FFF,
154824c88f78SMichal Kazior 	WMI_10_2_INIT_CMDID,
154924c88f78SMichal Kazior 	WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID,
155024c88f78SMichal Kazior 	WMI_10_2_STOP_SCAN_CMDID,
155124c88f78SMichal Kazior 	WMI_10_2_SCAN_CHAN_LIST_CMDID,
155224c88f78SMichal Kazior 	WMI_10_2_ECHO_CMDID,
155324c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
155424c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_CHANNEL_CMDID,
155524c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_PARAM_CMDID,
155624c88f78SMichal Kazior 	WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
155724c88f78SMichal Kazior 	WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
155824c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
155924c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
156024c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
156124c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
156224c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
156324c88f78SMichal Kazior 	WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
156424c88f78SMichal Kazior 	WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
156524c88f78SMichal Kazior 	WMI_10_2_VDEV_CREATE_CMDID,
156624c88f78SMichal Kazior 	WMI_10_2_VDEV_DELETE_CMDID,
156724c88f78SMichal Kazior 	WMI_10_2_VDEV_START_REQUEST_CMDID,
156824c88f78SMichal Kazior 	WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
156924c88f78SMichal Kazior 	WMI_10_2_VDEV_UP_CMDID,
157024c88f78SMichal Kazior 	WMI_10_2_VDEV_STOP_CMDID,
157124c88f78SMichal Kazior 	WMI_10_2_VDEV_DOWN_CMDID,
157224c88f78SMichal Kazior 	WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID,
157324c88f78SMichal Kazior 	WMI_10_2_VDEV_RESUME_RESPONSE_CMDID,
157424c88f78SMichal Kazior 	WMI_10_2_VDEV_SET_PARAM_CMDID,
157524c88f78SMichal Kazior 	WMI_10_2_VDEV_INSTALL_KEY_CMDID,
157624c88f78SMichal Kazior 	WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID,
157724c88f78SMichal Kazior 	WMI_10_2_PEER_CREATE_CMDID,
157824c88f78SMichal Kazior 	WMI_10_2_PEER_DELETE_CMDID,
157924c88f78SMichal Kazior 	WMI_10_2_PEER_FLUSH_TIDS_CMDID,
158024c88f78SMichal Kazior 	WMI_10_2_PEER_SET_PARAM_CMDID,
158124c88f78SMichal Kazior 	WMI_10_2_PEER_ASSOC_CMDID,
158224c88f78SMichal Kazior 	WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
158324c88f78SMichal Kazior 	WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID,
158424c88f78SMichal Kazior 	WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
158524c88f78SMichal Kazior 	WMI_10_2_PEER_MCAST_GROUP_CMDID,
158624c88f78SMichal Kazior 	WMI_10_2_BCN_TX_CMDID,
158724c88f78SMichal Kazior 	WMI_10_2_BCN_PRB_TMPL_CMDID,
158824c88f78SMichal Kazior 	WMI_10_2_BCN_FILTER_RX_CMDID,
158924c88f78SMichal Kazior 	WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
159024c88f78SMichal Kazior 	WMI_10_2_MGMT_TX_CMDID,
159124c88f78SMichal Kazior 	WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
159224c88f78SMichal Kazior 	WMI_10_2_ADDBA_SEND_CMDID,
159324c88f78SMichal Kazior 	WMI_10_2_ADDBA_STATUS_CMDID,
159424c88f78SMichal Kazior 	WMI_10_2_DELBA_SEND_CMDID,
159524c88f78SMichal Kazior 	WMI_10_2_ADDBA_SET_RESP_CMDID,
159624c88f78SMichal Kazior 	WMI_10_2_SEND_SINGLEAMSDU_CMDID,
159724c88f78SMichal Kazior 	WMI_10_2_STA_POWERSAVE_MODE_CMDID,
159824c88f78SMichal Kazior 	WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
159924c88f78SMichal Kazior 	WMI_10_2_STA_MIMO_PS_MODE_CMDID,
160024c88f78SMichal Kazior 	WMI_10_2_DBGLOG_CFG_CMDID,
160124c88f78SMichal Kazior 	WMI_10_2_PDEV_DFS_ENABLE_CMDID,
160224c88f78SMichal Kazior 	WMI_10_2_PDEV_DFS_DISABLE_CMDID,
160324c88f78SMichal Kazior 	WMI_10_2_PDEV_QVIT_CMDID,
160424c88f78SMichal Kazior 	WMI_10_2_ROAM_SCAN_MODE,
160524c88f78SMichal Kazior 	WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
160624c88f78SMichal Kazior 	WMI_10_2_ROAM_SCAN_PERIOD,
160724c88f78SMichal Kazior 	WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
160824c88f78SMichal Kazior 	WMI_10_2_ROAM_AP_PROFILE,
160924c88f78SMichal Kazior 	WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
161024c88f78SMichal Kazior 	WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
161124c88f78SMichal Kazior 	WMI_10_2_OFL_SCAN_PERIOD,
161224c88f78SMichal Kazior 	WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
161324c88f78SMichal Kazior 	WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
161424c88f78SMichal Kazior 	WMI_10_2_P2P_GO_SET_BEACON_IE,
161524c88f78SMichal Kazior 	WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
161624c88f78SMichal Kazior 	WMI_10_2_AP_PS_PEER_PARAM_CMDID,
161724c88f78SMichal Kazior 	WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID,
161824c88f78SMichal Kazior 	WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
161924c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
162024c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
162124c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
162224c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
162324c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
162424c88f78SMichal Kazior 	WMI_10_2_PDEV_SUSPEND_CMDID,
162524c88f78SMichal Kazior 	WMI_10_2_PDEV_RESUME_CMDID,
162624c88f78SMichal Kazior 	WMI_10_2_ADD_BCN_FILTER_CMDID,
162724c88f78SMichal Kazior 	WMI_10_2_RMV_BCN_FILTER_CMDID,
162824c88f78SMichal Kazior 	WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
162924c88f78SMichal Kazior 	WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
163024c88f78SMichal Kazior 	WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
163124c88f78SMichal Kazior 	WMI_10_2_WOW_ENABLE_CMDID,
163224c88f78SMichal Kazior 	WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
163324c88f78SMichal Kazior 	WMI_10_2_RTT_MEASREQ_CMDID,
163424c88f78SMichal Kazior 	WMI_10_2_RTT_TSF_CMDID,
163524c88f78SMichal Kazior 	WMI_10_2_RTT_KEEPALIVE_CMDID,
163624c88f78SMichal Kazior 	WMI_10_2_PDEV_SEND_BCN_CMDID,
163724c88f78SMichal Kazior 	WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
163824c88f78SMichal Kazior 	WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
163924c88f78SMichal Kazior 	WMI_10_2_REQUEST_STATS_CMDID,
164024c88f78SMichal Kazior 	WMI_10_2_GPIO_CONFIG_CMDID,
164124c88f78SMichal Kazior 	WMI_10_2_GPIO_OUTPUT_CMDID,
164224c88f78SMichal Kazior 	WMI_10_2_VDEV_RATEMASK_CMDID,
164324c88f78SMichal Kazior 	WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID,
164424c88f78SMichal Kazior 	WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
164524c88f78SMichal Kazior 	WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
164624c88f78SMichal Kazior 	WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
164724c88f78SMichal Kazior 	WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
164824c88f78SMichal Kazior 	WMI_10_2_FORCE_FW_HANG_CMDID,
164924c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
165024c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_CTL_TABLE_CMDID,
165124c88f78SMichal Kazior 	WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID,
165224c88f78SMichal Kazior 	WMI_10_2_PDEV_RATEPWR_TABLE_CMDID,
165324c88f78SMichal Kazior 	WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1654a57a6a27SRajkumar Manoharan 	WMI_10_2_PDEV_GET_INFO,
1655a57a6a27SRajkumar Manoharan 	WMI_10_2_VDEV_GET_INFO,
1656a57a6a27SRajkumar Manoharan 	WMI_10_2_VDEV_ATF_REQUEST_CMDID,
1657a57a6a27SRajkumar Manoharan 	WMI_10_2_PEER_ATF_REQUEST_CMDID,
1658a57a6a27SRajkumar Manoharan 	WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
165962f77f09SMaharaja 	WMI_10_2_MU_CAL_START_CMDID,
166062f77f09SMaharaja 	WMI_10_2_SET_LTEU_CONFIG_CMDID,
166162f77f09SMaharaja 	WMI_10_2_SET_CCA_PARAMS,
1662dd2c5fcbSRajkumar Manoharan 	WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
166384758d4dSBhagavathi Perumal S 	WMI_10_2_FWTEST_CMDID,
166484758d4dSBhagavathi Perumal S 	WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID,
166524c88f78SMichal Kazior 	WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1,
166624c88f78SMichal Kazior };
166724c88f78SMichal Kazior 
166824c88f78SMichal Kazior enum wmi_10_2_event_id {
166924c88f78SMichal Kazior 	WMI_10_2_SERVICE_READY_EVENTID = 0x8000,
167024c88f78SMichal Kazior 	WMI_10_2_READY_EVENTID,
167124c88f78SMichal Kazior 	WMI_10_2_DEBUG_MESG_EVENTID,
167224c88f78SMichal Kazior 	WMI_10_2_START_EVENTID = 0x9000,
167324c88f78SMichal Kazior 	WMI_10_2_END_EVENTID = 0x9FFF,
167424c88f78SMichal Kazior 	WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID,
167524c88f78SMichal Kazior 	WMI_10_2_ECHO_EVENTID,
167624c88f78SMichal Kazior 	WMI_10_2_UPDATE_STATS_EVENTID,
167724c88f78SMichal Kazior 	WMI_10_2_INST_RSSI_STATS_EVENTID,
167824c88f78SMichal Kazior 	WMI_10_2_VDEV_START_RESP_EVENTID,
167924c88f78SMichal Kazior 	WMI_10_2_VDEV_STANDBY_REQ_EVENTID,
168024c88f78SMichal Kazior 	WMI_10_2_VDEV_RESUME_REQ_EVENTID,
168124c88f78SMichal Kazior 	WMI_10_2_VDEV_STOPPED_EVENTID,
168224c88f78SMichal Kazior 	WMI_10_2_PEER_STA_KICKOUT_EVENTID,
168324c88f78SMichal Kazior 	WMI_10_2_HOST_SWBA_EVENTID,
168424c88f78SMichal Kazior 	WMI_10_2_TBTTOFFSET_UPDATE_EVENTID,
168524c88f78SMichal Kazior 	WMI_10_2_MGMT_RX_EVENTID,
168624c88f78SMichal Kazior 	WMI_10_2_CHAN_INFO_EVENTID,
168724c88f78SMichal Kazior 	WMI_10_2_PHYERR_EVENTID,
168824c88f78SMichal Kazior 	WMI_10_2_ROAM_EVENTID,
168924c88f78SMichal Kazior 	WMI_10_2_PROFILE_MATCH,
169024c88f78SMichal Kazior 	WMI_10_2_DEBUG_PRINT_EVENTID,
169124c88f78SMichal Kazior 	WMI_10_2_PDEV_QVIT_EVENTID,
169224c88f78SMichal Kazior 	WMI_10_2_WLAN_PROFILE_DATA_EVENTID,
169324c88f78SMichal Kazior 	WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID,
169424c88f78SMichal Kazior 	WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID,
169524c88f78SMichal Kazior 	WMI_10_2_RTT_ERROR_REPORT_EVENTID,
169624c88f78SMichal Kazior 	WMI_10_2_RTT_KEEPALIVE_EVENTID,
169724c88f78SMichal Kazior 	WMI_10_2_WOW_WAKEUP_HOST_EVENTID,
169824c88f78SMichal Kazior 	WMI_10_2_DCS_INTERFERENCE_EVENTID,
169924c88f78SMichal Kazior 	WMI_10_2_PDEV_TPC_CONFIG_EVENTID,
170024c88f78SMichal Kazior 	WMI_10_2_GPIO_INPUT_EVENTID,
170124c88f78SMichal Kazior 	WMI_10_2_PEER_RATECODE_LIST_EVENTID,
170224c88f78SMichal Kazior 	WMI_10_2_GENERIC_BUFFER_EVENTID,
170324c88f78SMichal Kazior 	WMI_10_2_MCAST_BUF_RELEASE_EVENTID,
170424c88f78SMichal Kazior 	WMI_10_2_MCAST_LIST_AGEOUT_EVENTID,
170524c88f78SMichal Kazior 	WMI_10_2_WDS_PEER_EVENTID,
1706a57a6a27SRajkumar Manoharan 	WMI_10_2_PEER_STA_PS_STATECHG_EVENTID,
1707a57a6a27SRajkumar Manoharan 	WMI_10_2_PDEV_TEMPERATURE_EVENTID,
1708dd2c5fcbSRajkumar Manoharan 	WMI_10_2_MU_REPORT_EVENTID,
1709dd2c5fcbSRajkumar Manoharan 	WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID,
171024c88f78SMichal Kazior 	WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1,
171124c88f78SMichal Kazior };
171224c88f78SMichal Kazior 
17132d491e69SRaja Mani enum wmi_10_4_cmd_id {
17142d491e69SRaja Mani 	WMI_10_4_START_CMDID = 0x9000,
17152d491e69SRaja Mani 	WMI_10_4_END_CMDID = 0x9FFF,
17162d491e69SRaja Mani 	WMI_10_4_INIT_CMDID,
17172d491e69SRaja Mani 	WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID,
17182d491e69SRaja Mani 	WMI_10_4_STOP_SCAN_CMDID,
17192d491e69SRaja Mani 	WMI_10_4_SCAN_CHAN_LIST_CMDID,
17202d491e69SRaja Mani 	WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
17212d491e69SRaja Mani 	WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
17222d491e69SRaja Mani 	WMI_10_4_ECHO_CMDID,
17232d491e69SRaja Mani 	WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
17242d491e69SRaja Mani 	WMI_10_4_PDEV_SET_CHANNEL_CMDID,
17252d491e69SRaja Mani 	WMI_10_4_PDEV_SET_PARAM_CMDID,
17262d491e69SRaja Mani 	WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
17272d491e69SRaja Mani 	WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
17282d491e69SRaja Mani 	WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
17292d491e69SRaja Mani 	WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
17302d491e69SRaja Mani 	WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
17312d491e69SRaja Mani 	WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
17322d491e69SRaja Mani 	WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
17332d491e69SRaja Mani 	WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
17342d491e69SRaja Mani 	WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
17352d491e69SRaja Mani 	WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
17362d491e69SRaja Mani 	WMI_10_4_VDEV_CREATE_CMDID,
17372d491e69SRaja Mani 	WMI_10_4_VDEV_DELETE_CMDID,
17382d491e69SRaja Mani 	WMI_10_4_VDEV_START_REQUEST_CMDID,
17392d491e69SRaja Mani 	WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
17402d491e69SRaja Mani 	WMI_10_4_VDEV_UP_CMDID,
17412d491e69SRaja Mani 	WMI_10_4_VDEV_STOP_CMDID,
17422d491e69SRaja Mani 	WMI_10_4_VDEV_DOWN_CMDID,
17432d491e69SRaja Mani 	WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
17442d491e69SRaja Mani 	WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
17452d491e69SRaja Mani 	WMI_10_4_VDEV_SET_PARAM_CMDID,
17462d491e69SRaja Mani 	WMI_10_4_VDEV_INSTALL_KEY_CMDID,
17472d491e69SRaja Mani 	WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
17482d491e69SRaja Mani 	WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
17492d491e69SRaja Mani 	WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
17502d491e69SRaja Mani 	WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
17512d491e69SRaja Mani 	WMI_10_4_PEER_CREATE_CMDID,
17522d491e69SRaja Mani 	WMI_10_4_PEER_DELETE_CMDID,
17532d491e69SRaja Mani 	WMI_10_4_PEER_FLUSH_TIDS_CMDID,
17542d491e69SRaja Mani 	WMI_10_4_PEER_SET_PARAM_CMDID,
17552d491e69SRaja Mani 	WMI_10_4_PEER_ASSOC_CMDID,
17562d491e69SRaja Mani 	WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
17572d491e69SRaja Mani 	WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
17582d491e69SRaja Mani 	WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
17592d491e69SRaja Mani 	WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
17602d491e69SRaja Mani 	WMI_10_4_PEER_MCAST_GROUP_CMDID,
17612d491e69SRaja Mani 	WMI_10_4_BCN_TX_CMDID,
17622d491e69SRaja Mani 	WMI_10_4_PDEV_SEND_BCN_CMDID,
17632d491e69SRaja Mani 	WMI_10_4_BCN_PRB_TMPL_CMDID,
17642d491e69SRaja Mani 	WMI_10_4_BCN_FILTER_RX_CMDID,
17652d491e69SRaja Mani 	WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
17662d491e69SRaja Mani 	WMI_10_4_MGMT_TX_CMDID,
17672d491e69SRaja Mani 	WMI_10_4_PRB_TMPL_CMDID,
17682d491e69SRaja Mani 	WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
17692d491e69SRaja Mani 	WMI_10_4_ADDBA_SEND_CMDID,
17702d491e69SRaja Mani 	WMI_10_4_ADDBA_STATUS_CMDID,
17712d491e69SRaja Mani 	WMI_10_4_DELBA_SEND_CMDID,
17722d491e69SRaja Mani 	WMI_10_4_ADDBA_SET_RESP_CMDID,
17732d491e69SRaja Mani 	WMI_10_4_SEND_SINGLEAMSDU_CMDID,
17742d491e69SRaja Mani 	WMI_10_4_STA_POWERSAVE_MODE_CMDID,
17752d491e69SRaja Mani 	WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
17762d491e69SRaja Mani 	WMI_10_4_STA_MIMO_PS_MODE_CMDID,
17772d491e69SRaja Mani 	WMI_10_4_DBGLOG_CFG_CMDID,
17782d491e69SRaja Mani 	WMI_10_4_PDEV_DFS_ENABLE_CMDID,
17792d491e69SRaja Mani 	WMI_10_4_PDEV_DFS_DISABLE_CMDID,
17802d491e69SRaja Mani 	WMI_10_4_PDEV_QVIT_CMDID,
17812d491e69SRaja Mani 	WMI_10_4_ROAM_SCAN_MODE,
17822d491e69SRaja Mani 	WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
17832d491e69SRaja Mani 	WMI_10_4_ROAM_SCAN_PERIOD,
17842d491e69SRaja Mani 	WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
17852d491e69SRaja Mani 	WMI_10_4_ROAM_AP_PROFILE,
17862d491e69SRaja Mani 	WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
17872d491e69SRaja Mani 	WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
17882d491e69SRaja Mani 	WMI_10_4_OFL_SCAN_PERIOD,
17892d491e69SRaja Mani 	WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
17902d491e69SRaja Mani 	WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
17912d491e69SRaja Mani 	WMI_10_4_P2P_GO_SET_BEACON_IE,
17922d491e69SRaja Mani 	WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
17932d491e69SRaja Mani 	WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
17942d491e69SRaja Mani 	WMI_10_4_AP_PS_PEER_PARAM_CMDID,
17952d491e69SRaja Mani 	WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
17962d491e69SRaja Mani 	WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
17972d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
17982d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
17992d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
18002d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
18012d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
18022d491e69SRaja Mani 	WMI_10_4_PDEV_SUSPEND_CMDID,
18032d491e69SRaja Mani 	WMI_10_4_PDEV_RESUME_CMDID,
18042d491e69SRaja Mani 	WMI_10_4_ADD_BCN_FILTER_CMDID,
18052d491e69SRaja Mani 	WMI_10_4_RMV_BCN_FILTER_CMDID,
18062d491e69SRaja Mani 	WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
18072d491e69SRaja Mani 	WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
18082d491e69SRaja Mani 	WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
18092d491e69SRaja Mani 	WMI_10_4_WOW_ENABLE_CMDID,
18102d491e69SRaja Mani 	WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
18112d491e69SRaja Mani 	WMI_10_4_RTT_MEASREQ_CMDID,
18122d491e69SRaja Mani 	WMI_10_4_RTT_TSF_CMDID,
18132d491e69SRaja Mani 	WMI_10_4_RTT_KEEPALIVE_CMDID,
18142d491e69SRaja Mani 	WMI_10_4_OEM_REQ_CMDID,
18152d491e69SRaja Mani 	WMI_10_4_NAN_CMDID,
18162d491e69SRaja Mani 	WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
18172d491e69SRaja Mani 	WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
18182d491e69SRaja Mani 	WMI_10_4_REQUEST_STATS_CMDID,
18192d491e69SRaja Mani 	WMI_10_4_GPIO_CONFIG_CMDID,
18202d491e69SRaja Mani 	WMI_10_4_GPIO_OUTPUT_CMDID,
18212d491e69SRaja Mani 	WMI_10_4_VDEV_RATEMASK_CMDID,
18222d491e69SRaja Mani 	WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
18232d491e69SRaja Mani 	WMI_10_4_GTK_OFFLOAD_CMDID,
18242d491e69SRaja Mani 	WMI_10_4_QBOOST_CFG_CMDID,
18252d491e69SRaja Mani 	WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
18262d491e69SRaja Mani 	WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
18272d491e69SRaja Mani 	WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
18282d491e69SRaja Mani 	WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
18292d491e69SRaja Mani 	WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
18302d491e69SRaja Mani 	WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
18312d491e69SRaja Mani 	WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
18322d491e69SRaja Mani 	WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
18332d491e69SRaja Mani 	WMI_10_4_FORCE_FW_HANG_CMDID,
18342d491e69SRaja Mani 	WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
18352d491e69SRaja Mani 	WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
18362d491e69SRaja Mani 	WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
18372d491e69SRaja Mani 	WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
18382d491e69SRaja Mani 	WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
18392d491e69SRaja Mani 	WMI_10_4_PDEV_FIPS_CMDID,
18402d491e69SRaja Mani 	WMI_10_4_TT_SET_CONF_CMDID,
18412d491e69SRaja Mani 	WMI_10_4_FWTEST_CMDID,
18422d491e69SRaja Mani 	WMI_10_4_VDEV_ATF_REQUEST_CMDID,
18432d491e69SRaja Mani 	WMI_10_4_PEER_ATF_REQUEST_CMDID,
18442d491e69SRaja Mani 	WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
18452d491e69SRaja Mani 	WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
18462d491e69SRaja Mani 	WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
18472d491e69SRaja Mani 	WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
18482d491e69SRaja Mani 	WMI_10_4_PDEV_GET_TPC_CMDID,
18492d491e69SRaja Mani 	WMI_10_4_PDEV_GET_AST_INFO_CMDID,
18502d491e69SRaja Mani 	WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
18512d491e69SRaja Mani 	WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
18522d491e69SRaja Mani 	WMI_10_4_PDEV_GET_INFO_CMDID,
18532d491e69SRaja Mani 	WMI_10_4_VDEV_GET_INFO_CMDID,
18542d491e69SRaja Mani 	WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
18552d491e69SRaja Mani 	WMI_10_4_MU_CAL_START_CMDID,
18562d491e69SRaja Mani 	WMI_10_4_SET_CCA_PARAMS_CMDID,
18572d491e69SRaja Mani 	WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
185869d4315cSVasanthakumar Thiagarajan 	WMI_10_4_EXT_RESOURCE_CFG_CMDID,
185969d4315cSVasanthakumar Thiagarajan 	WMI_10_4_VDEV_SET_IE_CMDID,
186069d4315cSVasanthakumar Thiagarajan 	WMI_10_4_SET_LTEU_CONFIG_CMDID,
1861add6cd8dSManikanta Pubbisetty 	WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
1862add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
1863add6cd8dSManikanta Pubbisetty 	WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1864add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_BWF_REQUEST_CMDID,
1865add6cd8dSManikanta Pubbisetty 	WMI_10_4_BTCOEX_CFG_CMDID,
1866add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
1867add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
1868add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
1869add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
1870add6cd8dSManikanta Pubbisetty 	WMI_10_4_COEX_VERSION_CFG_CMID,
1871add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
1872add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
1873add6cd8dSManikanta Pubbisetty 	WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
1874add6cd8dSManikanta Pubbisetty 	WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
1875add6cd8dSManikanta Pubbisetty 	WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
1876add6cd8dSManikanta Pubbisetty 	WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
1877add6cd8dSManikanta Pubbisetty 	WMI_10_4_GET_TSF_TIMER_CMDID,
1878add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
1879add6cd8dSManikanta Pubbisetty 	WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
1880add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
1881add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_SET_STATE_CMDID,
1882add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_PEER_UPDATE_CMDID,
1883add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
18846f6eb1bcSSriram R 	WMI_10_4_PDEV_SEND_FD_CMDID,
18856f6eb1bcSSriram R 	WMI_10_4_ENABLE_FILS_CMDID,
18866f6eb1bcSSriram R 	WMI_10_4_PDEV_SET_BRIDGE_MACADDR_CMDID,
18876f6eb1bcSSriram R 	WMI_10_4_ATF_GROUP_WMM_AC_CONFIG_REQUEST_CMDID,
18886f6eb1bcSSriram R 	WMI_10_4_RADAR_FOUND_CMDID,
18895d582be0STamizh Chelvam 	WMI_10_4_PEER_CFR_CAPTURE_CMDID,
18905d582be0STamizh Chelvam 	WMI_10_4_PER_PEER_PER_TID_CONFIG_CMDID,
18912d491e69SRaja Mani 	WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1,
18922d491e69SRaja Mani };
18932d491e69SRaja Mani 
18942d491e69SRaja Mani enum wmi_10_4_event_id {
18952d491e69SRaja Mani 	WMI_10_4_SERVICE_READY_EVENTID = 0x8000,
18962d491e69SRaja Mani 	WMI_10_4_READY_EVENTID,
18972d491e69SRaja Mani 	WMI_10_4_DEBUG_MESG_EVENTID,
18982d491e69SRaja Mani 	WMI_10_4_START_EVENTID = 0x9000,
18992d491e69SRaja Mani 	WMI_10_4_END_EVENTID = 0x9FFF,
19002d491e69SRaja Mani 	WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID,
19012d491e69SRaja Mani 	WMI_10_4_ECHO_EVENTID,
19022d491e69SRaja Mani 	WMI_10_4_UPDATE_STATS_EVENTID,
19032d491e69SRaja Mani 	WMI_10_4_INST_RSSI_STATS_EVENTID,
19042d491e69SRaja Mani 	WMI_10_4_VDEV_START_RESP_EVENTID,
19052d491e69SRaja Mani 	WMI_10_4_VDEV_STANDBY_REQ_EVENTID,
19062d491e69SRaja Mani 	WMI_10_4_VDEV_RESUME_REQ_EVENTID,
19072d491e69SRaja Mani 	WMI_10_4_VDEV_STOPPED_EVENTID,
19082d491e69SRaja Mani 	WMI_10_4_PEER_STA_KICKOUT_EVENTID,
19092d491e69SRaja Mani 	WMI_10_4_HOST_SWBA_EVENTID,
19102d491e69SRaja Mani 	WMI_10_4_TBTTOFFSET_UPDATE_EVENTID,
19112d491e69SRaja Mani 	WMI_10_4_MGMT_RX_EVENTID,
19122d491e69SRaja Mani 	WMI_10_4_CHAN_INFO_EVENTID,
19132d491e69SRaja Mani 	WMI_10_4_PHYERR_EVENTID,
19142d491e69SRaja Mani 	WMI_10_4_ROAM_EVENTID,
19152d491e69SRaja Mani 	WMI_10_4_PROFILE_MATCH,
19162d491e69SRaja Mani 	WMI_10_4_DEBUG_PRINT_EVENTID,
19172d491e69SRaja Mani 	WMI_10_4_PDEV_QVIT_EVENTID,
19182d491e69SRaja Mani 	WMI_10_4_WLAN_PROFILE_DATA_EVENTID,
19192d491e69SRaja Mani 	WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID,
19202d491e69SRaja Mani 	WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID,
19212d491e69SRaja Mani 	WMI_10_4_RTT_ERROR_REPORT_EVENTID,
19222d491e69SRaja Mani 	WMI_10_4_RTT_KEEPALIVE_EVENTID,
19232d491e69SRaja Mani 	WMI_10_4_OEM_CAPABILITY_EVENTID,
19242d491e69SRaja Mani 	WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID,
19252d491e69SRaja Mani 	WMI_10_4_OEM_ERROR_REPORT_EVENTID,
19262d491e69SRaja Mani 	WMI_10_4_NAN_EVENTID,
19272d491e69SRaja Mani 	WMI_10_4_WOW_WAKEUP_HOST_EVENTID,
19282d491e69SRaja Mani 	WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID,
19292d491e69SRaja Mani 	WMI_10_4_GTK_REKEY_FAIL_EVENTID,
19302d491e69SRaja Mani 	WMI_10_4_DCS_INTERFERENCE_EVENTID,
19312d491e69SRaja Mani 	WMI_10_4_PDEV_TPC_CONFIG_EVENTID,
19322d491e69SRaja Mani 	WMI_10_4_CSA_HANDLING_EVENTID,
19332d491e69SRaja Mani 	WMI_10_4_GPIO_INPUT_EVENTID,
19342d491e69SRaja Mani 	WMI_10_4_PEER_RATECODE_LIST_EVENTID,
19352d491e69SRaja Mani 	WMI_10_4_GENERIC_BUFFER_EVENTID,
19362d491e69SRaja Mani 	WMI_10_4_MCAST_BUF_RELEASE_EVENTID,
19372d491e69SRaja Mani 	WMI_10_4_MCAST_LIST_AGEOUT_EVENTID,
19382d491e69SRaja Mani 	WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID,
19392d491e69SRaja Mani 	WMI_10_4_WDS_PEER_EVENTID,
19402d491e69SRaja Mani 	WMI_10_4_PEER_STA_PS_STATECHG_EVENTID,
19412d491e69SRaja Mani 	WMI_10_4_PDEV_FIPS_EVENTID,
19422d491e69SRaja Mani 	WMI_10_4_TT_STATS_EVENTID,
19432d491e69SRaja Mani 	WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID,
19442d491e69SRaja Mani 	WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID,
19452d491e69SRaja Mani 	WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID,
19462d491e69SRaja Mani 	WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID,
19472d491e69SRaja Mani 	WMI_10_4_PDEV_NFCAL_POWER_EVENTID,
19482d491e69SRaja Mani 	WMI_10_4_PDEV_TPC_EVENTID,
19492d491e69SRaja Mani 	WMI_10_4_PDEV_GET_AST_INFO_EVENTID,
19502d491e69SRaja Mani 	WMI_10_4_PDEV_TEMPERATURE_EVENTID,
19512d491e69SRaja Mani 	WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
19522d491e69SRaja Mani 	WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID,
195369d4315cSVasanthakumar Thiagarajan 	WMI_10_4_MU_REPORT_EVENTID,
1954add6cd8dSManikanta Pubbisetty 	WMI_10_4_TX_DATA_TRAFFIC_CTRL_EVENTID,
1955add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_TX_MU_TXMIT_COUNT_EVENTID,
1956add6cd8dSManikanta Pubbisetty 	WMI_10_4_PEER_GID_USERPOS_LIST_EVENTID,
1957add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_CHECK_CAL_VERSION_EVENTID,
1958add6cd8dSManikanta Pubbisetty 	WMI_10_4_ATF_PEER_STATS_EVENTID,
1959add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_GET_RX_FILTER_EVENTID,
1960add6cd8dSManikanta Pubbisetty 	WMI_10_4_NAC_RSSI_EVENTID,
1961add6cd8dSManikanta Pubbisetty 	WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID,
1962add6cd8dSManikanta Pubbisetty 	WMI_10_4_GET_TSF_TIMER_RESP_EVENTID,
1963add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_TPC_TABLE_EVENTID,
1964add6cd8dSManikanta Pubbisetty 	WMI_10_4_PDEV_WDS_ENTRY_LIST_EVENTID,
1965add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_PEER_EVENTID,
19666f6eb1bcSSriram R 	WMI_10_4_HOST_SWFDA_EVENTID,
19676f6eb1bcSSriram R 	WMI_10_4_ESP_ESTIMATE_EVENTID,
19686f6eb1bcSSriram R 	WMI_10_4_DFS_STATUS_CHECK_EVENTID,
19692d491e69SRaja Mani 	WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1,
19702d491e69SRaja Mani };
19712d491e69SRaja Mani 
19725e3dd157SKalle Valo enum wmi_phy_mode {
19735e3dd157SKalle Valo 	MODE_11A        = 0,   /* 11a Mode */
19745e3dd157SKalle Valo 	MODE_11G        = 1,   /* 11b/g Mode */
19755e3dd157SKalle Valo 	MODE_11B        = 2,   /* 11b Mode */
19765e3dd157SKalle Valo 	MODE_11GONLY    = 3,   /* 11g only Mode */
19775e3dd157SKalle Valo 	MODE_11NA_HT20   = 4,  /* 11a HT20 mode */
19785e3dd157SKalle Valo 	MODE_11NG_HT20   = 5,  /* 11g HT20 mode */
19795e3dd157SKalle Valo 	MODE_11NA_HT40   = 6,  /* 11a HT40 mode */
19805e3dd157SKalle Valo 	MODE_11NG_HT40   = 7,  /* 11g HT40 mode */
19815e3dd157SKalle Valo 	MODE_11AC_VHT20 = 8,
19825e3dd157SKalle Valo 	MODE_11AC_VHT40 = 9,
19835e3dd157SKalle Valo 	MODE_11AC_VHT80 = 10,
19845e3dd157SKalle Valo 	/*    MODE_11AC_VHT160 = 11, */
19855e3dd157SKalle Valo 	MODE_11AC_VHT20_2G = 11,
19865e3dd157SKalle Valo 	MODE_11AC_VHT40_2G = 12,
19875e3dd157SKalle Valo 	MODE_11AC_VHT80_2G = 13,
1988bc1efd73SSebastian Gottschall 	MODE_11AC_VHT80_80 = 14,
1989bc1efd73SSebastian Gottschall 	MODE_11AC_VHT160 = 15,
1990bc1efd73SSebastian Gottschall 	MODE_UNKNOWN    = 16,
1991bc1efd73SSebastian Gottschall 	MODE_MAX        = 16
19925e3dd157SKalle Valo };
19935e3dd157SKalle Valo 
ath10k_wmi_phymode_str(enum wmi_phy_mode mode)199438a1d47eSKalle Valo static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode)
199538a1d47eSKalle Valo {
199638a1d47eSKalle Valo 	switch (mode) {
199738a1d47eSKalle Valo 	case MODE_11A:
199838a1d47eSKalle Valo 		return "11a";
199938a1d47eSKalle Valo 	case MODE_11G:
200038a1d47eSKalle Valo 		return "11g";
200138a1d47eSKalle Valo 	case MODE_11B:
200238a1d47eSKalle Valo 		return "11b";
200338a1d47eSKalle Valo 	case MODE_11GONLY:
200438a1d47eSKalle Valo 		return "11gonly";
200538a1d47eSKalle Valo 	case MODE_11NA_HT20:
200638a1d47eSKalle Valo 		return "11na-ht20";
200738a1d47eSKalle Valo 	case MODE_11NG_HT20:
200838a1d47eSKalle Valo 		return "11ng-ht20";
200938a1d47eSKalle Valo 	case MODE_11NA_HT40:
201038a1d47eSKalle Valo 		return "11na-ht40";
201138a1d47eSKalle Valo 	case MODE_11NG_HT40:
201238a1d47eSKalle Valo 		return "11ng-ht40";
201338a1d47eSKalle Valo 	case MODE_11AC_VHT20:
201438a1d47eSKalle Valo 		return "11ac-vht20";
201538a1d47eSKalle Valo 	case MODE_11AC_VHT40:
201638a1d47eSKalle Valo 		return "11ac-vht40";
201738a1d47eSKalle Valo 	case MODE_11AC_VHT80:
201838a1d47eSKalle Valo 		return "11ac-vht80";
2019bc1efd73SSebastian Gottschall 	case MODE_11AC_VHT160:
2020bc1efd73SSebastian Gottschall 		return "11ac-vht160";
2021bc1efd73SSebastian Gottschall 	case MODE_11AC_VHT80_80:
2022bc1efd73SSebastian Gottschall 		return "11ac-vht80+80";
202338a1d47eSKalle Valo 	case MODE_11AC_VHT20_2G:
202438a1d47eSKalle Valo 		return "11ac-vht20-2g";
202538a1d47eSKalle Valo 	case MODE_11AC_VHT40_2G:
202638a1d47eSKalle Valo 		return "11ac-vht40-2g";
202738a1d47eSKalle Valo 	case MODE_11AC_VHT80_2G:
202838a1d47eSKalle Valo 		return "11ac-vht80-2g";
202938a1d47eSKalle Valo 	case MODE_UNKNOWN:
203038a1d47eSKalle Valo 		/* skip */
203138a1d47eSKalle Valo 		break;
203238a1d47eSKalle Valo 
203338a1d47eSKalle Valo 		/* no default handler to allow compiler to check that the
203437ff1b0dSMarcin Rokicki 		 * enum is fully handled
203537ff1b0dSMarcin Rokicki 		 */
2036999eb686SYueHaibing 	}
203738a1d47eSKalle Valo 
203838a1d47eSKalle Valo 	return "<unknown>";
203938a1d47eSKalle Valo }
204038a1d47eSKalle Valo 
20415e3dd157SKalle Valo #define WMI_CHAN_LIST_TAG	0x1
20425e3dd157SKalle Valo #define WMI_SSID_LIST_TAG	0x2
20435e3dd157SKalle Valo #define WMI_BSSID_LIST_TAG	0x3
20445e3dd157SKalle Valo #define WMI_IE_TAG		0x4
20455e3dd157SKalle Valo 
20465e3dd157SKalle Valo struct wmi_channel {
20475e3dd157SKalle Valo 	__le32 mhz;
20485e3dd157SKalle Valo 	__le32 band_center_freq1;
20495e3dd157SKalle Valo 	__le32 band_center_freq2; /* valid for 11ac, 80plus80 */
20505e3dd157SKalle Valo 	union {
20515e3dd157SKalle Valo 		__le32 flags; /* WMI_CHAN_FLAG_ */
20525e3dd157SKalle Valo 		struct {
20535e3dd157SKalle Valo 			u8 mode; /* only 6 LSBs */
20545e3dd157SKalle Valo 		} __packed;
20555e3dd157SKalle Valo 	} __packed;
20565e3dd157SKalle Valo 	union {
20575e3dd157SKalle Valo 		__le32 reginfo0;
20585e3dd157SKalle Valo 		struct {
205902256930SMichal Kazior 			/* note: power unit is 0.5 dBm */
20605e3dd157SKalle Valo 			u8 min_power;
20615e3dd157SKalle Valo 			u8 max_power;
20625e3dd157SKalle Valo 			u8 reg_power;
20635e3dd157SKalle Valo 			u8 reg_classid;
20645e3dd157SKalle Valo 		} __packed;
20655e3dd157SKalle Valo 	} __packed;
20665e3dd157SKalle Valo 	union {
20675e3dd157SKalle Valo 		__le32 reginfo1;
20685e3dd157SKalle Valo 		struct {
20690a491167SSven Eckelmann 			/* note: power unit is 1 dBm */
20705e3dd157SKalle Valo 			u8 antenna_max;
20710a491167SSven Eckelmann 			/* note: power unit is 0.5 dBm */
2072513527c8SAlan Liu 			u8 max_tx_power;
20735e3dd157SKalle Valo 		} __packed;
20745e3dd157SKalle Valo 	} __packed;
20755e3dd157SKalle Valo } __packed;
20765e3dd157SKalle Valo 
20775e3dd157SKalle Valo struct wmi_channel_arg {
20785e3dd157SKalle Valo 	u32 freq;
20795e3dd157SKalle Valo 	u32 band_center_freq1;
2080bc1efd73SSebastian Gottschall 	u32 band_center_freq2;
20815e3dd157SKalle Valo 	bool passive;
20825e3dd157SKalle Valo 	bool allow_ibss;
20835e3dd157SKalle Valo 	bool allow_ht;
20845e3dd157SKalle Valo 	bool allow_vht;
20855e3dd157SKalle Valo 	bool ht40plus;
2086e8a50f8bSMarek Puzyniak 	bool chan_radar;
208702256930SMichal Kazior 	/* note: power unit is 0.5 dBm */
20885e3dd157SKalle Valo 	u32 min_power;
20895e3dd157SKalle Valo 	u32 max_power;
20905e3dd157SKalle Valo 	u32 max_reg_power;
20910a491167SSven Eckelmann 	/* note: power unit is 1 dBm */
20925e3dd157SKalle Valo 	u32 max_antenna_gain;
20935e3dd157SKalle Valo 	u32 reg_class_id;
20945e3dd157SKalle Valo 	enum wmi_phy_mode mode;
20955e3dd157SKalle Valo };
20965e3dd157SKalle Valo 
20975e3dd157SKalle Valo enum wmi_channel_change_cause {
20985e3dd157SKalle Valo 	WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
20995e3dd157SKalle Valo 	WMI_CHANNEL_CHANGE_CAUSE_CSA,
21005e3dd157SKalle Valo };
21015e3dd157SKalle Valo 
21025e3dd157SKalle Valo #define WMI_CHAN_FLAG_HT40_PLUS      (1 << 6)
21035e3dd157SKalle Valo #define WMI_CHAN_FLAG_PASSIVE        (1 << 7)
21045e3dd157SKalle Valo #define WMI_CHAN_FLAG_ADHOC_ALLOWED  (1 << 8)
21055e3dd157SKalle Valo #define WMI_CHAN_FLAG_AP_DISABLED    (1 << 9)
21065e3dd157SKalle Valo #define WMI_CHAN_FLAG_DFS            (1 << 10)
21075e3dd157SKalle Valo #define WMI_CHAN_FLAG_ALLOW_HT       (1 << 11)
21085e3dd157SKalle Valo #define WMI_CHAN_FLAG_ALLOW_VHT      (1 << 12)
21095e3dd157SKalle Valo 
21105e3dd157SKalle Valo /* Indicate reason for channel switch */
21115e3dd157SKalle Valo #define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13)
2112795def8bSLei Wang /* DFS required on channel for 2nd segment of VHT160 and VHT80+80*/
2113795def8bSLei Wang #define WMI_CHAN_FLAG_DFS_CFREQ2  (1 << 15)
21145c8726ecSRaja Mani #define WMI_MAX_SPATIAL_STREAM        3 /* default max ss */
21155e3dd157SKalle Valo 
21165e3dd157SKalle Valo /* HT Capabilities*/
21175e3dd157SKalle Valo #define WMI_HT_CAP_ENABLED                0x0001   /* HT Enabled/ disabled */
21185e3dd157SKalle Valo #define WMI_HT_CAP_HT20_SGI       0x0002   /* Short Guard Interval with HT20 */
21195e3dd157SKalle Valo #define WMI_HT_CAP_DYNAMIC_SMPS           0x0004   /* Dynamic MIMO powersave */
21205e3dd157SKalle Valo #define WMI_HT_CAP_TX_STBC                0x0008   /* B3 TX STBC */
21215e3dd157SKalle Valo #define WMI_HT_CAP_TX_STBC_MASK_SHIFT     3
21225e3dd157SKalle Valo #define WMI_HT_CAP_RX_STBC                0x0030   /* B4-B5 RX STBC */
21235e3dd157SKalle Valo #define WMI_HT_CAP_RX_STBC_MASK_SHIFT     4
21245e3dd157SKalle Valo #define WMI_HT_CAP_LDPC                   0x0040   /* LDPC supported */
21255e3dd157SKalle Valo #define WMI_HT_CAP_L_SIG_TXOP_PROT        0x0080   /* L-SIG TXOP Protection */
21265e3dd157SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY           0x0700   /* MPDU Density */
21275e3dd157SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
21285e3dd157SKalle Valo #define WMI_HT_CAP_HT40_SGI               0x0800
2129ff488d0eSSurabhi Vishnoi #define WMI_HT_CAP_RX_LDPC                0x1000   /* LDPC RX support */
2130ff488d0eSSurabhi Vishnoi #define WMI_HT_CAP_TX_LDPC                0x2000   /* LDPC TX support */
21315e3dd157SKalle Valo 
21325e3dd157SKalle Valo #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED       | \
21335e3dd157SKalle Valo 				WMI_HT_CAP_HT20_SGI      | \
21345e3dd157SKalle Valo 				WMI_HT_CAP_HT40_SGI      | \
21355e3dd157SKalle Valo 				WMI_HT_CAP_TX_STBC       | \
21365e3dd157SKalle Valo 				WMI_HT_CAP_RX_STBC       | \
21375e3dd157SKalle Valo 				WMI_HT_CAP_LDPC)
21385e3dd157SKalle Valo 
21395e3dd157SKalle Valo /*
21405e3dd157SKalle Valo  * WMI_VHT_CAP_* these maps to ieee 802.11ac vht capability information
21415e3dd157SKalle Valo  * field. The fields not defined here are not supported, or reserved.
21425e3dd157SKalle Valo  * Do not change these masks and if you have to add new one follow the
21435e3dd157SKalle Valo  * bitmask as specified by 802.11ac draft.
21445e3dd157SKalle Valo  */
21455e3dd157SKalle Valo 
21465e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK            0x00000003
21475e3dd157SKalle Valo #define WMI_VHT_CAP_RX_LDPC                      0x00000010
21485e3dd157SKalle Valo #define WMI_VHT_CAP_SGI_80MHZ                    0x00000020
2149bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_SGI_160MHZ                   0x00000040
21505e3dd157SKalle Valo #define WMI_VHT_CAP_TX_STBC                      0x00000080
21515e3dd157SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK                 0x00000300
21525e3dd157SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT           8
2153bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_SU_BFER                      0x00000800
2154bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_SU_BFEE                      0x00001000
2155bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_CS_ANT_MASK              0x0000E000
2156bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT        13
2157bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_SND_DIM_MASK             0x00070000
2158bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT       16
2159bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MU_BFER                      0x00080000
2160bc1efd73SSebastian Gottschall #define WMI_VHT_CAP_MU_BFEE                      0x00100000
21615e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP            0x03800000
21625e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT      23
21635e3dd157SKalle Valo #define WMI_VHT_CAP_RX_FIXED_ANT                 0x10000000
21645e3dd157SKalle Valo #define WMI_VHT_CAP_TX_FIXED_ANT                 0x20000000
21655e3dd157SKalle Valo 
21665e3dd157SKalle Valo /* The following also refer for max HT AMSDU */
21675e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_3839            0x00000000
21685e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_7935            0x00000001
21695e3dd157SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_11454           0x00000002
21705e3dd157SKalle Valo 
21715e3dd157SKalle Valo #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454  | \
21725e3dd157SKalle Valo 				 WMI_VHT_CAP_RX_LDPC             | \
21735e3dd157SKalle Valo 				 WMI_VHT_CAP_SGI_80MHZ           | \
21745e3dd157SKalle Valo 				 WMI_VHT_CAP_TX_STBC             | \
21755e3dd157SKalle Valo 				 WMI_VHT_CAP_RX_STBC_MASK        | \
21765e3dd157SKalle Valo 				 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP   | \
21775e3dd157SKalle Valo 				 WMI_VHT_CAP_RX_FIXED_ANT        | \
21785e3dd157SKalle Valo 				 WMI_VHT_CAP_TX_FIXED_ANT)
21795e3dd157SKalle Valo 
21805e3dd157SKalle Valo /*
21815e3dd157SKalle Valo  * Interested readers refer to Rx/Tx MCS Map definition as defined in
21825e3dd157SKalle Valo  * 802.11ac
21835e3dd157SKalle Valo  */
21845e3dd157SKalle Valo #define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss)      ((3 & (r)) << (((ss) - 1) << 1))
21855e3dd157SKalle Valo #define WMI_VHT_MAX_SUPP_RATE_MASK           0x1fff0000
21865e3dd157SKalle Valo #define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT     16
21875e3dd157SKalle Valo 
21885e3dd157SKalle Valo enum {
21895e3dd157SKalle Valo 	REGDMN_MODE_11A              = 0x00001, /* 11a channels */
21905e3dd157SKalle Valo 	REGDMN_MODE_TURBO            = 0x00002, /* 11a turbo-only channels */
21915e3dd157SKalle Valo 	REGDMN_MODE_11B              = 0x00004, /* 11b channels */
21925e3dd157SKalle Valo 	REGDMN_MODE_PUREG            = 0x00008, /* 11g channels (OFDM only) */
21935e3dd157SKalle Valo 	REGDMN_MODE_11G              = 0x00008, /* XXX historical */
21945e3dd157SKalle Valo 	REGDMN_MODE_108G             = 0x00020, /* 11a+Turbo channels */
21955e3dd157SKalle Valo 	REGDMN_MODE_108A             = 0x00040, /* 11g+Turbo channels */
21965e3dd157SKalle Valo 	REGDMN_MODE_XR               = 0x00100, /* XR channels */
21975e3dd157SKalle Valo 	REGDMN_MODE_11A_HALF_RATE    = 0x00200, /* 11A half rate channels */
21985e3dd157SKalle Valo 	REGDMN_MODE_11A_QUARTER_RATE = 0x00400, /* 11A quarter rate channels */
21995e3dd157SKalle Valo 	REGDMN_MODE_11NG_HT20        = 0x00800, /* 11N-G HT20 channels */
22005e3dd157SKalle Valo 	REGDMN_MODE_11NA_HT20        = 0x01000, /* 11N-A HT20 channels */
22015e3dd157SKalle Valo 	REGDMN_MODE_11NG_HT40PLUS    = 0x02000, /* 11N-G HT40 + channels */
22025e3dd157SKalle Valo 	REGDMN_MODE_11NG_HT40MINUS   = 0x04000, /* 11N-G HT40 - channels */
22035e3dd157SKalle Valo 	REGDMN_MODE_11NA_HT40PLUS    = 0x08000, /* 11N-A HT40 + channels */
22045e3dd157SKalle Valo 	REGDMN_MODE_11NA_HT40MINUS   = 0x10000, /* 11N-A HT40 - channels */
22055e3dd157SKalle Valo 	REGDMN_MODE_11AC_VHT20       = 0x20000, /* 5Ghz, VHT20 */
22065e3dd157SKalle Valo 	REGDMN_MODE_11AC_VHT40PLUS   = 0x40000, /* 5Ghz, VHT40 + channels */
22075e3dd157SKalle Valo 	REGDMN_MODE_11AC_VHT40MINUS  = 0x80000, /* 5Ghz  VHT40 - channels */
22085e3dd157SKalle Valo 	REGDMN_MODE_11AC_VHT80       = 0x100000, /* 5Ghz, VHT80 channels */
2209bc1efd73SSebastian Gottschall 	REGDMN_MODE_11AC_VHT160      = 0x200000,     /* 5Ghz, VHT160 channels */
2210bc1efd73SSebastian Gottschall 	REGDMN_MODE_11AC_VHT80_80    = 0x400000,     /* 5Ghz, VHT80+80 channels */
22115e3dd157SKalle Valo 	REGDMN_MODE_ALL              = 0xffffffff
22125e3dd157SKalle Valo };
22135e3dd157SKalle Valo 
22145e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_HALF_RATE        0x00000001
22155e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_QUARTER_RATE     0x00000002
22165e3dd157SKalle Valo #define REGDMN_CAP1_CHAN_HAL49GHZ         0x00000004
22175e3dd157SKalle Valo 
22185e3dd157SKalle Valo /* regulatory capabilities */
22195e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND   0x0040
22205e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN    0x0080
22215e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U2         0x0100
22225e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND    0x0200
22235e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD     0x0400
22245e3dd157SKalle Valo #define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A    0x0800
22255e3dd157SKalle Valo 
22265e3dd157SKalle Valo struct hal_reg_capabilities {
22275e3dd157SKalle Valo 	/* regdomain value specified in EEPROM */
22285e3dd157SKalle Valo 	__le32 eeprom_rd;
22295e3dd157SKalle Valo 	/*regdomain */
22305e3dd157SKalle Valo 	__le32 eeprom_rd_ext;
22315e3dd157SKalle Valo 	/* CAP1 capabilities bit map. */
22325e3dd157SKalle Valo 	__le32 regcap1;
22335e3dd157SKalle Valo 	/* REGDMN EEPROM CAP. */
22345e3dd157SKalle Valo 	__le32 regcap2;
22355e3dd157SKalle Valo 	/* REGDMN MODE */
22365e3dd157SKalle Valo 	__le32 wireless_modes;
22375e3dd157SKalle Valo 	__le32 low_2ghz_chan;
22385e3dd157SKalle Valo 	__le32 high_2ghz_chan;
22395e3dd157SKalle Valo 	__le32 low_5ghz_chan;
22405e3dd157SKalle Valo 	__le32 high_5ghz_chan;
22415e3dd157SKalle Valo } __packed;
22425e3dd157SKalle Valo 
22435e3dd157SKalle Valo enum wlan_mode_capability {
22445e3dd157SKalle Valo 	WHAL_WLAN_11A_CAPABILITY   = 0x1,
22455e3dd157SKalle Valo 	WHAL_WLAN_11G_CAPABILITY   = 0x2,
22465e3dd157SKalle Valo 	WHAL_WLAN_11AG_CAPABILITY  = 0x3,
22475e3dd157SKalle Valo };
22485e3dd157SKalle Valo 
22495e3dd157SKalle Valo /* structure used by FW for requesting host memory */
22505e3dd157SKalle Valo struct wlan_host_mem_req {
22515e3dd157SKalle Valo 	/* ID of the request */
22525e3dd157SKalle Valo 	__le32 req_id;
22535e3dd157SKalle Valo 	/* size of the  of each unit */
22545e3dd157SKalle Valo 	__le32 unit_size;
22555e3dd157SKalle Valo 	/* flags to  indicate that
22565e3dd157SKalle Valo 	 * the number units is dependent
22575e3dd157SKalle Valo 	 * on number of resources(num vdevs num peers .. etc)
22585e3dd157SKalle Valo 	 */
22595e3dd157SKalle Valo 	__le32 num_unit_info;
22605e3dd157SKalle Valo 	/*
22615e3dd157SKalle Valo 	 * actual number of units to allocate . if flags in the num_unit_info
22625e3dd157SKalle Valo 	 * indicate that number of units is tied to number of a particular
22635e3dd157SKalle Valo 	 * resource to allocate then  num_units filed is set to 0 and host
22645e3dd157SKalle Valo 	 * will derive the number units from number of the resources it is
22655e3dd157SKalle Valo 	 * requesting.
22665e3dd157SKalle Valo 	 */
22675e3dd157SKalle Valo 	__le32 num_units;
22685e3dd157SKalle Valo } __packed;
22695e3dd157SKalle Valo 
22705e3dd157SKalle Valo /*
22715e3dd157SKalle Valo  * The following struct holds optional payload for
22725e3dd157SKalle Valo  * wmi_service_ready_event,e.g., 11ac pass some of the
22735e3dd157SKalle Valo  * device capability to the host.
22745e3dd157SKalle Valo  */
22755e3dd157SKalle Valo struct wmi_service_ready_event {
22765e3dd157SKalle Valo 	__le32 sw_version;
22775e3dd157SKalle Valo 	__le32 sw_version_1;
22785e3dd157SKalle Valo 	__le32 abi_version;
22795e3dd157SKalle Valo 	/* WMI_PHY_CAPABILITY */
22805e3dd157SKalle Valo 	__le32 phy_capability;
22815e3dd157SKalle Valo 	/* Maximum number of frag table entries that SW will populate less 1 */
22825e3dd157SKalle Valo 	__le32 max_frag_entry;
2283c4f8c836SMichal Kazior 	__le32 wmi_service_bitmap[16];
22845e3dd157SKalle Valo 	__le32 num_rf_chains;
22855e3dd157SKalle Valo 	/*
22865e3dd157SKalle Valo 	 * The following field is only valid for service type
22875e3dd157SKalle Valo 	 * WMI_SERVICE_11AC
22885e3dd157SKalle Valo 	 */
22895e3dd157SKalle Valo 	__le32 ht_cap_info; /* WMI HT Capability */
22905e3dd157SKalle Valo 	__le32 vht_cap_info; /* VHT capability info field of 802.11ac */
22915e3dd157SKalle Valo 	__le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */
22925e3dd157SKalle Valo 	__le32 hw_min_tx_power;
22935e3dd157SKalle Valo 	__le32 hw_max_tx_power;
22945e3dd157SKalle Valo 	struct hal_reg_capabilities hal_reg_capabilities;
22955e3dd157SKalle Valo 	__le32 sys_cap_info;
22965e3dd157SKalle Valo 	__le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */
22975e3dd157SKalle Valo 	/*
22985e3dd157SKalle Valo 	 * Max beacon and Probe Response IE offload size
22995e3dd157SKalle Valo 	 * (includes optional P2P IEs)
23005e3dd157SKalle Valo 	 */
23015e3dd157SKalle Valo 	__le32 max_bcn_ie_size;
23025e3dd157SKalle Valo 	/*
23035e3dd157SKalle Valo 	 * request to host to allocate a chuck of memory and pss it down to FW
23045e3dd157SKalle Valo 	 * via WM_INIT. FW uses this as FW extesnsion memory for saving its
23055e3dd157SKalle Valo 	 * data structures. Only valid for low latency interfaces like PCIE
23065e3dd157SKalle Valo 	 * where FW can access this memory directly (or) by DMA.
23075e3dd157SKalle Valo 	 */
23085e3dd157SKalle Valo 	__le32 num_mem_reqs;
2309d3ed0cf0SGustavo A. R. Silva 	struct wlan_host_mem_req mem_reqs[];
23105e3dd157SKalle Valo } __packed;
23115e3dd157SKalle Valo 
23126f97d256SBartosz Markowski /* This is the definition from 10.X firmware branch */
23135c01aa3dSMichal Kazior struct wmi_10x_service_ready_event {
23146f97d256SBartosz Markowski 	__le32 sw_version;
23156f97d256SBartosz Markowski 	__le32 abi_version;
23166f97d256SBartosz Markowski 
23176f97d256SBartosz Markowski 	/* WMI_PHY_CAPABILITY */
23186f97d256SBartosz Markowski 	__le32 phy_capability;
23196f97d256SBartosz Markowski 
23206f97d256SBartosz Markowski 	/* Maximum number of frag table entries that SW will populate less 1 */
23216f97d256SBartosz Markowski 	__le32 max_frag_entry;
2322c4f8c836SMichal Kazior 	__le32 wmi_service_bitmap[16];
23236f97d256SBartosz Markowski 	__le32 num_rf_chains;
23246f97d256SBartosz Markowski 
23256f97d256SBartosz Markowski 	/*
23266f97d256SBartosz Markowski 	 * The following field is only valid for service type
23276f97d256SBartosz Markowski 	 * WMI_SERVICE_11AC
23286f97d256SBartosz Markowski 	 */
23296f97d256SBartosz Markowski 	__le32 ht_cap_info; /* WMI HT Capability */
23306f97d256SBartosz Markowski 	__le32 vht_cap_info; /* VHT capability info field of 802.11ac */
23316f97d256SBartosz Markowski 	__le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */
23326f97d256SBartosz Markowski 	__le32 hw_min_tx_power;
23336f97d256SBartosz Markowski 	__le32 hw_max_tx_power;
23346f97d256SBartosz Markowski 
23356f97d256SBartosz Markowski 	struct hal_reg_capabilities hal_reg_capabilities;
23366f97d256SBartosz Markowski 
23376f97d256SBartosz Markowski 	__le32 sys_cap_info;
23386f97d256SBartosz Markowski 	__le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */
23396f97d256SBartosz Markowski 
23406f97d256SBartosz Markowski 	/*
23416f97d256SBartosz Markowski 	 * request to host to allocate a chuck of memory and pss it down to FW
23426f97d256SBartosz Markowski 	 * via WM_INIT. FW uses this as FW extesnsion memory for saving its
23436f97d256SBartosz Markowski 	 * data structures. Only valid for low latency interfaces like PCIE
23446f97d256SBartosz Markowski 	 * where FW can access this memory directly (or) by DMA.
23456f97d256SBartosz Markowski 	 */
23466f97d256SBartosz Markowski 	__le32 num_mem_reqs;
23476f97d256SBartosz Markowski 
2348d3ed0cf0SGustavo A. R. Silva 	struct wlan_host_mem_req mem_reqs[];
23496f97d256SBartosz Markowski } __packed;
23506f97d256SBartosz Markowski 
23515e3dd157SKalle Valo #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
23525e3dd157SKalle Valo #define WMI_UNIFIED_READY_TIMEOUT_HZ (5 * HZ)
23535e3dd157SKalle Valo 
23545e3dd157SKalle Valo struct wmi_ready_event {
23555e3dd157SKalle Valo 	__le32 sw_version;
23565e3dd157SKalle Valo 	__le32 abi_version;
23575e3dd157SKalle Valo 	struct wmi_mac_addr mac_addr;
23585e3dd157SKalle Valo 	__le32 status;
23595e3dd157SKalle Valo } __packed;
23605e3dd157SKalle Valo 
23615e3dd157SKalle Valo struct wmi_resource_config {
23625e3dd157SKalle Valo 	/* number of virtual devices (VAPs) to support */
23635e3dd157SKalle Valo 	__le32 num_vdevs;
23645e3dd157SKalle Valo 
23655e3dd157SKalle Valo 	/* number of peer nodes to support */
23665e3dd157SKalle Valo 	__le32 num_peers;
23675e3dd157SKalle Valo 
23685e3dd157SKalle Valo 	/*
23695e3dd157SKalle Valo 	 * In offload mode target supports features like WOW, chatter and
23705e3dd157SKalle Valo 	 * other protocol offloads. In order to support them some
23715e3dd157SKalle Valo 	 * functionalities like reorder buffering, PN checking need to be
2372e13dbeadSJoe Perches 	 * done in target. This determines maximum number of peers supported
23735e3dd157SKalle Valo 	 * by target in offload mode
23745e3dd157SKalle Valo 	 */
23755e3dd157SKalle Valo 	__le32 num_offload_peers;
23765e3dd157SKalle Valo 
23775e3dd157SKalle Valo 	/* For target-based RX reordering */
23785e3dd157SKalle Valo 	__le32 num_offload_reorder_bufs;
23795e3dd157SKalle Valo 
23805e3dd157SKalle Valo 	/* number of keys per peer */
23815e3dd157SKalle Valo 	__le32 num_peer_keys;
23825e3dd157SKalle Valo 
23835e3dd157SKalle Valo 	/* total number of TX/RX data TIDs */
23845e3dd157SKalle Valo 	__le32 num_tids;
23855e3dd157SKalle Valo 
23865e3dd157SKalle Valo 	/*
23875e3dd157SKalle Valo 	 * max skid for resolving hash collisions
23885e3dd157SKalle Valo 	 *
23895e3dd157SKalle Valo 	 *   The address search table is sparse, so that if two MAC addresses
23905e3dd157SKalle Valo 	 *   result in the same hash value, the second of these conflicting
23915e3dd157SKalle Valo 	 *   entries can slide to the next index in the address search table,
23925e3dd157SKalle Valo 	 *   and use it, if it is unoccupied.  This ast_skid_limit parameter
23935e3dd157SKalle Valo 	 *   specifies the upper bound on how many subsequent indices to search
23945e3dd157SKalle Valo 	 *   over to find an unoccupied space.
23955e3dd157SKalle Valo 	 */
23965e3dd157SKalle Valo 	__le32 ast_skid_limit;
23975e3dd157SKalle Valo 
23985e3dd157SKalle Valo 	/*
23995e3dd157SKalle Valo 	 * the nominal chain mask for transmit
24005e3dd157SKalle Valo 	 *
24015e3dd157SKalle Valo 	 *   The chain mask may be modified dynamically, e.g. to operate AP
24025e3dd157SKalle Valo 	 *   tx with a reduced number of chains if no clients are associated.
24035e3dd157SKalle Valo 	 *   This configuration parameter specifies the nominal chain-mask that
24045e3dd157SKalle Valo 	 *   should be used when not operating with a reduced set of tx chains.
24055e3dd157SKalle Valo 	 */
24065e3dd157SKalle Valo 	__le32 tx_chain_mask;
24075e3dd157SKalle Valo 
24085e3dd157SKalle Valo 	/*
24095e3dd157SKalle Valo 	 * the nominal chain mask for receive
24105e3dd157SKalle Valo 	 *
24115e3dd157SKalle Valo 	 *   The chain mask may be modified dynamically, e.g. for a client
24125e3dd157SKalle Valo 	 *   to use a reduced number of chains for receive if the traffic to
24135e3dd157SKalle Valo 	 *   the client is low enough that it doesn't require downlink MIMO
24145e3dd157SKalle Valo 	 *   or antenna diversity.
24155e3dd157SKalle Valo 	 *   This configuration parameter specifies the nominal chain-mask that
24165e3dd157SKalle Valo 	 *   should be used when not operating with a reduced set of rx chains.
24175e3dd157SKalle Valo 	 */
24185e3dd157SKalle Valo 	__le32 rx_chain_mask;
24195e3dd157SKalle Valo 
24205e3dd157SKalle Valo 	/*
24215e3dd157SKalle Valo 	 * what rx reorder timeout (ms) to use for the AC
24225e3dd157SKalle Valo 	 *
24235e3dd157SKalle Valo 	 *   Each WMM access class (voice, video, best-effort, background) will
24245e3dd157SKalle Valo 	 *   have its own timeout value to dictate how long to wait for missing
24255e3dd157SKalle Valo 	 *   rx MPDUs to arrive before flushing subsequent MPDUs that have
24265e3dd157SKalle Valo 	 *   already been received.
24275e3dd157SKalle Valo 	 *   This parameter specifies the timeout in milliseconds for each
24285e3dd157SKalle Valo 	 *   class.
24295e3dd157SKalle Valo 	 */
24305e3dd157SKalle Valo 	__le32 rx_timeout_pri_vi;
24315e3dd157SKalle Valo 	__le32 rx_timeout_pri_vo;
24325e3dd157SKalle Valo 	__le32 rx_timeout_pri_be;
24335e3dd157SKalle Valo 	__le32 rx_timeout_pri_bk;
24345e3dd157SKalle Valo 
24355e3dd157SKalle Valo 	/*
24365e3dd157SKalle Valo 	 * what mode the rx should decap packets to
24375e3dd157SKalle Valo 	 *
24385e3dd157SKalle Valo 	 *   MAC can decap to RAW (no decap), native wifi or Ethernet types
24395e3dd157SKalle Valo 	 *   THis setting also determines the default TX behavior, however TX
24405e3dd157SKalle Valo 	 *   behavior can be modified on a per VAP basis during VAP init
24415e3dd157SKalle Valo 	 */
24425e3dd157SKalle Valo 	__le32 rx_decap_mode;
24435e3dd157SKalle Valo 
24448e4a4f5dSGeert Uytterhoeven 	/* what is the maximum number of scan requests that can be queued */
24455e3dd157SKalle Valo 	__le32 scan_max_pending_reqs;
24465e3dd157SKalle Valo 
24475e3dd157SKalle Valo 	/* maximum VDEV that could use BMISS offload */
24485e3dd157SKalle Valo 	__le32 bmiss_offload_max_vdev;
24495e3dd157SKalle Valo 
24505e3dd157SKalle Valo 	/* maximum VDEV that could use offload roaming */
24515e3dd157SKalle Valo 	__le32 roam_offload_max_vdev;
24525e3dd157SKalle Valo 
24535e3dd157SKalle Valo 	/* maximum AP profiles that would push to offload roaming */
24545e3dd157SKalle Valo 	__le32 roam_offload_max_ap_profiles;
24555e3dd157SKalle Valo 
24565e3dd157SKalle Valo 	/*
24575e3dd157SKalle Valo 	 * how many groups to use for mcast->ucast conversion
24585e3dd157SKalle Valo 	 *
24595e3dd157SKalle Valo 	 *   The target's WAL maintains a table to hold information regarding
24605e3dd157SKalle Valo 	 *   which peers belong to a given multicast group, so that if
24615e3dd157SKalle Valo 	 *   multicast->unicast conversion is enabled, the target can convert
24625e3dd157SKalle Valo 	 *   multicast tx frames to a series of unicast tx frames, to each
24635e3dd157SKalle Valo 	 *   peer within the multicast group.
24645e3dd157SKalle Valo 	     This num_mcast_groups configuration parameter tells the target how
24655e3dd157SKalle Valo 	 *   many multicast groups to provide storage for within its multicast
24665e3dd157SKalle Valo 	 *   group membership table.
24675e3dd157SKalle Valo 	 */
24685e3dd157SKalle Valo 	__le32 num_mcast_groups;
24695e3dd157SKalle Valo 
24705e3dd157SKalle Valo 	/*
24715e3dd157SKalle Valo 	 * size to alloc for the mcast membership table
24725e3dd157SKalle Valo 	 *
24735e3dd157SKalle Valo 	 *   This num_mcast_table_elems configuration parameter tells the
24745e3dd157SKalle Valo 	 *   target how many peer elements it needs to provide storage for in
24755e3dd157SKalle Valo 	 *   its multicast group membership table.
24765e3dd157SKalle Valo 	 *   These multicast group membership table elements are shared by the
24775e3dd157SKalle Valo 	 *   multicast groups stored within the table.
24785e3dd157SKalle Valo 	 */
24795e3dd157SKalle Valo 	__le32 num_mcast_table_elems;
24805e3dd157SKalle Valo 
24815e3dd157SKalle Valo 	/*
24825e3dd157SKalle Valo 	 * whether/how to do multicast->unicast conversion
24835e3dd157SKalle Valo 	 *
24845e3dd157SKalle Valo 	 *   This configuration parameter specifies whether the target should
24855e3dd157SKalle Valo 	 *   perform multicast --> unicast conversion on transmit, and if so,
24865e3dd157SKalle Valo 	 *   what to do if it finds no entries in its multicast group
24875e3dd157SKalle Valo 	 *   membership table for the multicast IP address in the tx frame.
24885e3dd157SKalle Valo 	 *   Configuration value:
24895e3dd157SKalle Valo 	 *   0 -> Do not perform multicast to unicast conversion.
24905e3dd157SKalle Valo 	 *   1 -> Convert multicast frames to unicast, if the IP multicast
24915e3dd157SKalle Valo 	 *        address from the tx frame is found in the multicast group
24925e3dd157SKalle Valo 	 *        membership table.  If the IP multicast address is not found,
24935e3dd157SKalle Valo 	 *        drop the frame.
24945e3dd157SKalle Valo 	 *   2 -> Convert multicast frames to unicast, if the IP multicast
24955e3dd157SKalle Valo 	 *        address from the tx frame is found in the multicast group
24965e3dd157SKalle Valo 	 *        membership table.  If the IP multicast address is not found,
24975e3dd157SKalle Valo 	 *        transmit the frame as multicast.
24985e3dd157SKalle Valo 	 */
24995e3dd157SKalle Valo 	__le32 mcast2ucast_mode;
25005e3dd157SKalle Valo 
25015e3dd157SKalle Valo 	/*
25025e3dd157SKalle Valo 	 * how much memory to allocate for a tx PPDU dbg log
25035e3dd157SKalle Valo 	 *
25045e3dd157SKalle Valo 	 *   This parameter controls how much memory the target will allocate
25055e3dd157SKalle Valo 	 *   to store a log of tx PPDU meta-information (how large the PPDU
25065e3dd157SKalle Valo 	 *   was, when it was sent, whether it was successful, etc.)
25075e3dd157SKalle Valo 	 */
25085e3dd157SKalle Valo 	__le32 tx_dbg_log_size;
25095e3dd157SKalle Valo 
25105e3dd157SKalle Valo 	/* how many AST entries to be allocated for WDS */
25115e3dd157SKalle Valo 	__le32 num_wds_entries;
25125e3dd157SKalle Valo 
25135e3dd157SKalle Valo 	/*
25145e3dd157SKalle Valo 	 * MAC DMA burst size, e.g., For target PCI limit can be
25155e3dd157SKalle Valo 	 * 0 -default, 1 256B
25165e3dd157SKalle Valo 	 */
25175e3dd157SKalle Valo 	__le32 dma_burst_size;
25185e3dd157SKalle Valo 
25195e3dd157SKalle Valo 	/*
25205e3dd157SKalle Valo 	 * Fixed delimiters to be inserted after every MPDU to
25215e3dd157SKalle Valo 	 * account for interface latency to avoid underrun.
25225e3dd157SKalle Valo 	 */
25235e3dd157SKalle Valo 	__le32 mac_aggr_delim;
25245e3dd157SKalle Valo 
25255e3dd157SKalle Valo 	/*
25265e3dd157SKalle Valo 	 *   determine whether target is responsible for detecting duplicate
25275e3dd157SKalle Valo 	 *   non-aggregate MPDU and timing out stale fragments.
25285e3dd157SKalle Valo 	 *
25295e3dd157SKalle Valo 	 *   A-MPDU reordering is always performed on the target.
25305e3dd157SKalle Valo 	 *
25315e3dd157SKalle Valo 	 *   0: target responsible for frag timeout and dup checking
25325e3dd157SKalle Valo 	 *   1: host responsible for frag timeout and dup checking
25335e3dd157SKalle Valo 	 */
25345e3dd157SKalle Valo 	__le32 rx_skip_defrag_timeout_dup_detection_check;
25355e3dd157SKalle Valo 
25365e3dd157SKalle Valo 	/*
25375e3dd157SKalle Valo 	 * Configuration for VoW :
25385e3dd157SKalle Valo 	 * No of Video Nodes to be supported
25395e3dd157SKalle Valo 	 * and Max no of descriptors for each Video link (node).
25405e3dd157SKalle Valo 	 */
25415e3dd157SKalle Valo 	__le32 vow_config;
25425e3dd157SKalle Valo 
25435e3dd157SKalle Valo 	/* maximum VDEV that could use GTK offload */
25445e3dd157SKalle Valo 	__le32 gtk_offload_max_vdev;
25455e3dd157SKalle Valo 
25465e3dd157SKalle Valo 	/* Number of msdu descriptors target should use */
25475e3dd157SKalle Valo 	__le32 num_msdu_desc;
25485e3dd157SKalle Valo 
25495e3dd157SKalle Valo 	/*
25505e3dd157SKalle Valo 	 * Max. number of Tx fragments per MSDU
25515e3dd157SKalle Valo 	 *  This parameter controls the max number of Tx fragments per MSDU.
25525e3dd157SKalle Valo 	 *  This is sent by the target as part of the WMI_SERVICE_READY event
2553e13dbeadSJoe Perches 	 *  and is overridden by the OS shim as required.
25545e3dd157SKalle Valo 	 */
25555e3dd157SKalle Valo 	__le32 max_frag_entries;
25565e3dd157SKalle Valo } __packed;
25575e3dd157SKalle Valo 
255812b2b9e3SBartosz Markowski struct wmi_resource_config_10x {
255912b2b9e3SBartosz Markowski 	/* number of virtual devices (VAPs) to support */
256012b2b9e3SBartosz Markowski 	__le32 num_vdevs;
256112b2b9e3SBartosz Markowski 
256212b2b9e3SBartosz Markowski 	/* number of peer nodes to support */
256312b2b9e3SBartosz Markowski 	__le32 num_peers;
256412b2b9e3SBartosz Markowski 
256512b2b9e3SBartosz Markowski 	/* number of keys per peer */
256612b2b9e3SBartosz Markowski 	__le32 num_peer_keys;
256712b2b9e3SBartosz Markowski 
256812b2b9e3SBartosz Markowski 	/* total number of TX/RX data TIDs */
256912b2b9e3SBartosz Markowski 	__le32 num_tids;
257012b2b9e3SBartosz Markowski 
257112b2b9e3SBartosz Markowski 	/*
257212b2b9e3SBartosz Markowski 	 * max skid for resolving hash collisions
257312b2b9e3SBartosz Markowski 	 *
257412b2b9e3SBartosz Markowski 	 *   The address search table is sparse, so that if two MAC addresses
257512b2b9e3SBartosz Markowski 	 *   result in the same hash value, the second of these conflicting
257612b2b9e3SBartosz Markowski 	 *   entries can slide to the next index in the address search table,
257712b2b9e3SBartosz Markowski 	 *   and use it, if it is unoccupied.  This ast_skid_limit parameter
257812b2b9e3SBartosz Markowski 	 *   specifies the upper bound on how many subsequent indices to search
257912b2b9e3SBartosz Markowski 	 *   over to find an unoccupied space.
258012b2b9e3SBartosz Markowski 	 */
258112b2b9e3SBartosz Markowski 	__le32 ast_skid_limit;
258212b2b9e3SBartosz Markowski 
258312b2b9e3SBartosz Markowski 	/*
258412b2b9e3SBartosz Markowski 	 * the nominal chain mask for transmit
258512b2b9e3SBartosz Markowski 	 *
258612b2b9e3SBartosz Markowski 	 *   The chain mask may be modified dynamically, e.g. to operate AP
258712b2b9e3SBartosz Markowski 	 *   tx with a reduced number of chains if no clients are associated.
258812b2b9e3SBartosz Markowski 	 *   This configuration parameter specifies the nominal chain-mask that
258912b2b9e3SBartosz Markowski 	 *   should be used when not operating with a reduced set of tx chains.
259012b2b9e3SBartosz Markowski 	 */
259112b2b9e3SBartosz Markowski 	__le32 tx_chain_mask;
259212b2b9e3SBartosz Markowski 
259312b2b9e3SBartosz Markowski 	/*
259412b2b9e3SBartosz Markowski 	 * the nominal chain mask for receive
259512b2b9e3SBartosz Markowski 	 *
259612b2b9e3SBartosz Markowski 	 *   The chain mask may be modified dynamically, e.g. for a client
259712b2b9e3SBartosz Markowski 	 *   to use a reduced number of chains for receive if the traffic to
259812b2b9e3SBartosz Markowski 	 *   the client is low enough that it doesn't require downlink MIMO
259912b2b9e3SBartosz Markowski 	 *   or antenna diversity.
260012b2b9e3SBartosz Markowski 	 *   This configuration parameter specifies the nominal chain-mask that
260112b2b9e3SBartosz Markowski 	 *   should be used when not operating with a reduced set of rx chains.
260212b2b9e3SBartosz Markowski 	 */
260312b2b9e3SBartosz Markowski 	__le32 rx_chain_mask;
260412b2b9e3SBartosz Markowski 
260512b2b9e3SBartosz Markowski 	/*
260612b2b9e3SBartosz Markowski 	 * what rx reorder timeout (ms) to use for the AC
260712b2b9e3SBartosz Markowski 	 *
260812b2b9e3SBartosz Markowski 	 *   Each WMM access class (voice, video, best-effort, background) will
260912b2b9e3SBartosz Markowski 	 *   have its own timeout value to dictate how long to wait for missing
261012b2b9e3SBartosz Markowski 	 *   rx MPDUs to arrive before flushing subsequent MPDUs that have
261112b2b9e3SBartosz Markowski 	 *   already been received.
261212b2b9e3SBartosz Markowski 	 *   This parameter specifies the timeout in milliseconds for each
261312b2b9e3SBartosz Markowski 	 *   class.
261412b2b9e3SBartosz Markowski 	 */
261512b2b9e3SBartosz Markowski 	__le32 rx_timeout_pri_vi;
261612b2b9e3SBartosz Markowski 	__le32 rx_timeout_pri_vo;
261712b2b9e3SBartosz Markowski 	__le32 rx_timeout_pri_be;
261812b2b9e3SBartosz Markowski 	__le32 rx_timeout_pri_bk;
261912b2b9e3SBartosz Markowski 
262012b2b9e3SBartosz Markowski 	/*
262112b2b9e3SBartosz Markowski 	 * what mode the rx should decap packets to
262212b2b9e3SBartosz Markowski 	 *
262312b2b9e3SBartosz Markowski 	 *   MAC can decap to RAW (no decap), native wifi or Ethernet types
262412b2b9e3SBartosz Markowski 	 *   THis setting also determines the default TX behavior, however TX
262512b2b9e3SBartosz Markowski 	 *   behavior can be modified on a per VAP basis during VAP init
262612b2b9e3SBartosz Markowski 	 */
262712b2b9e3SBartosz Markowski 	__le32 rx_decap_mode;
262812b2b9e3SBartosz Markowski 
26298e4a4f5dSGeert Uytterhoeven 	/* what is the maximum number of scan requests that can be queued */
263012b2b9e3SBartosz Markowski 	__le32 scan_max_pending_reqs;
263112b2b9e3SBartosz Markowski 
263212b2b9e3SBartosz Markowski 	/* maximum VDEV that could use BMISS offload */
263312b2b9e3SBartosz Markowski 	__le32 bmiss_offload_max_vdev;
263412b2b9e3SBartosz Markowski 
263512b2b9e3SBartosz Markowski 	/* maximum VDEV that could use offload roaming */
263612b2b9e3SBartosz Markowski 	__le32 roam_offload_max_vdev;
263712b2b9e3SBartosz Markowski 
263812b2b9e3SBartosz Markowski 	/* maximum AP profiles that would push to offload roaming */
263912b2b9e3SBartosz Markowski 	__le32 roam_offload_max_ap_profiles;
264012b2b9e3SBartosz Markowski 
264112b2b9e3SBartosz Markowski 	/*
264212b2b9e3SBartosz Markowski 	 * how many groups to use for mcast->ucast conversion
264312b2b9e3SBartosz Markowski 	 *
264412b2b9e3SBartosz Markowski 	 *   The target's WAL maintains a table to hold information regarding
264512b2b9e3SBartosz Markowski 	 *   which peers belong to a given multicast group, so that if
264612b2b9e3SBartosz Markowski 	 *   multicast->unicast conversion is enabled, the target can convert
264712b2b9e3SBartosz Markowski 	 *   multicast tx frames to a series of unicast tx frames, to each
264812b2b9e3SBartosz Markowski 	 *   peer within the multicast group.
264912b2b9e3SBartosz Markowski 	     This num_mcast_groups configuration parameter tells the target how
265012b2b9e3SBartosz Markowski 	 *   many multicast groups to provide storage for within its multicast
265112b2b9e3SBartosz Markowski 	 *   group membership table.
265212b2b9e3SBartosz Markowski 	 */
265312b2b9e3SBartosz Markowski 	__le32 num_mcast_groups;
265412b2b9e3SBartosz Markowski 
265512b2b9e3SBartosz Markowski 	/*
265612b2b9e3SBartosz Markowski 	 * size to alloc for the mcast membership table
265712b2b9e3SBartosz Markowski 	 *
265812b2b9e3SBartosz Markowski 	 *   This num_mcast_table_elems configuration parameter tells the
265912b2b9e3SBartosz Markowski 	 *   target how many peer elements it needs to provide storage for in
266012b2b9e3SBartosz Markowski 	 *   its multicast group membership table.
266112b2b9e3SBartosz Markowski 	 *   These multicast group membership table elements are shared by the
266212b2b9e3SBartosz Markowski 	 *   multicast groups stored within the table.
266312b2b9e3SBartosz Markowski 	 */
266412b2b9e3SBartosz Markowski 	__le32 num_mcast_table_elems;
266512b2b9e3SBartosz Markowski 
266612b2b9e3SBartosz Markowski 	/*
266712b2b9e3SBartosz Markowski 	 * whether/how to do multicast->unicast conversion
266812b2b9e3SBartosz Markowski 	 *
266912b2b9e3SBartosz Markowski 	 *   This configuration parameter specifies whether the target should
267012b2b9e3SBartosz Markowski 	 *   perform multicast --> unicast conversion on transmit, and if so,
267112b2b9e3SBartosz Markowski 	 *   what to do if it finds no entries in its multicast group
267212b2b9e3SBartosz Markowski 	 *   membership table for the multicast IP address in the tx frame.
267312b2b9e3SBartosz Markowski 	 *   Configuration value:
267412b2b9e3SBartosz Markowski 	 *   0 -> Do not perform multicast to unicast conversion.
267512b2b9e3SBartosz Markowski 	 *   1 -> Convert multicast frames to unicast, if the IP multicast
267612b2b9e3SBartosz Markowski 	 *        address from the tx frame is found in the multicast group
267712b2b9e3SBartosz Markowski 	 *        membership table.  If the IP multicast address is not found,
267812b2b9e3SBartosz Markowski 	 *        drop the frame.
267912b2b9e3SBartosz Markowski 	 *   2 -> Convert multicast frames to unicast, if the IP multicast
268012b2b9e3SBartosz Markowski 	 *        address from the tx frame is found in the multicast group
268112b2b9e3SBartosz Markowski 	 *        membership table.  If the IP multicast address is not found,
268212b2b9e3SBartosz Markowski 	 *        transmit the frame as multicast.
268312b2b9e3SBartosz Markowski 	 */
268412b2b9e3SBartosz Markowski 	__le32 mcast2ucast_mode;
268512b2b9e3SBartosz Markowski 
268612b2b9e3SBartosz Markowski 	/*
268712b2b9e3SBartosz Markowski 	 * how much memory to allocate for a tx PPDU dbg log
268812b2b9e3SBartosz Markowski 	 *
268912b2b9e3SBartosz Markowski 	 *   This parameter controls how much memory the target will allocate
269012b2b9e3SBartosz Markowski 	 *   to store a log of tx PPDU meta-information (how large the PPDU
269112b2b9e3SBartosz Markowski 	 *   was, when it was sent, whether it was successful, etc.)
269212b2b9e3SBartosz Markowski 	 */
269312b2b9e3SBartosz Markowski 	__le32 tx_dbg_log_size;
269412b2b9e3SBartosz Markowski 
269512b2b9e3SBartosz Markowski 	/* how many AST entries to be allocated for WDS */
269612b2b9e3SBartosz Markowski 	__le32 num_wds_entries;
269712b2b9e3SBartosz Markowski 
269812b2b9e3SBartosz Markowski 	/*
269912b2b9e3SBartosz Markowski 	 * MAC DMA burst size, e.g., For target PCI limit can be
270012b2b9e3SBartosz Markowski 	 * 0 -default, 1 256B
270112b2b9e3SBartosz Markowski 	 */
270212b2b9e3SBartosz Markowski 	__le32 dma_burst_size;
270312b2b9e3SBartosz Markowski 
270412b2b9e3SBartosz Markowski 	/*
270512b2b9e3SBartosz Markowski 	 * Fixed delimiters to be inserted after every MPDU to
270612b2b9e3SBartosz Markowski 	 * account for interface latency to avoid underrun.
270712b2b9e3SBartosz Markowski 	 */
270812b2b9e3SBartosz Markowski 	__le32 mac_aggr_delim;
270912b2b9e3SBartosz Markowski 
271012b2b9e3SBartosz Markowski 	/*
271112b2b9e3SBartosz Markowski 	 *   determine whether target is responsible for detecting duplicate
271212b2b9e3SBartosz Markowski 	 *   non-aggregate MPDU and timing out stale fragments.
271312b2b9e3SBartosz Markowski 	 *
271412b2b9e3SBartosz Markowski 	 *   A-MPDU reordering is always performed on the target.
271512b2b9e3SBartosz Markowski 	 *
271612b2b9e3SBartosz Markowski 	 *   0: target responsible for frag timeout and dup checking
271712b2b9e3SBartosz Markowski 	 *   1: host responsible for frag timeout and dup checking
271812b2b9e3SBartosz Markowski 	 */
271912b2b9e3SBartosz Markowski 	__le32 rx_skip_defrag_timeout_dup_detection_check;
272012b2b9e3SBartosz Markowski 
272112b2b9e3SBartosz Markowski 	/*
272212b2b9e3SBartosz Markowski 	 * Configuration for VoW :
272312b2b9e3SBartosz Markowski 	 * No of Video Nodes to be supported
272412b2b9e3SBartosz Markowski 	 * and Max no of descriptors for each Video link (node).
272512b2b9e3SBartosz Markowski 	 */
272612b2b9e3SBartosz Markowski 	__le32 vow_config;
272712b2b9e3SBartosz Markowski 
272812b2b9e3SBartosz Markowski 	/* Number of msdu descriptors target should use */
272912b2b9e3SBartosz Markowski 	__le32 num_msdu_desc;
273012b2b9e3SBartosz Markowski 
273112b2b9e3SBartosz Markowski 	/*
273212b2b9e3SBartosz Markowski 	 * Max. number of Tx fragments per MSDU
273312b2b9e3SBartosz Markowski 	 *  This parameter controls the max number of Tx fragments per MSDU.
273412b2b9e3SBartosz Markowski 	 *  This is sent by the target as part of the WMI_SERVICE_READY event
2735e13dbeadSJoe Perches 	 *  and is overridden by the OS shim as required.
273612b2b9e3SBartosz Markowski 	 */
273712b2b9e3SBartosz Markowski 	__le32 max_frag_entries;
273812b2b9e3SBartosz Markowski } __packed;
273912b2b9e3SBartosz Markowski 
27404a16fbecSRajkumar Manoharan enum wmi_10_2_feature_mask {
27414a16fbecSRajkumar Manoharan 	WMI_10_2_RX_BATCH_MODE = BIT(0),
27424a16fbecSRajkumar Manoharan 	WMI_10_2_ATF_CONFIG    = BIT(1),
2743de0c789bSYanbo Li 	WMI_10_2_COEX_GPIO     = BIT(3),
2744dd2c5fcbSRajkumar Manoharan 	WMI_10_2_BSS_CHAN_INFO = BIT(6),
2745de46c015SMohammed Shafi Shajakhan 	WMI_10_2_PEER_STATS    = BIT(7),
27464a16fbecSRajkumar Manoharan };
27474a16fbecSRajkumar Manoharan 
274824c88f78SMichal Kazior struct wmi_resource_config_10_2 {
274924c88f78SMichal Kazior 	struct wmi_resource_config_10x common;
275024c88f78SMichal Kazior 	__le32 max_peer_ext_stats;
275124c88f78SMichal Kazior 	__le32 smart_ant_cap; /* 0-disable, 1-enable */
275224c88f78SMichal Kazior 	__le32 bk_min_free;
275324c88f78SMichal Kazior 	__le32 be_min_free;
275424c88f78SMichal Kazior 	__le32 vi_min_free;
275524c88f78SMichal Kazior 	__le32 vo_min_free;
27564a16fbecSRajkumar Manoharan 	__le32 feature_mask;
275724c88f78SMichal Kazior } __packed;
275812b2b9e3SBartosz Markowski 
2759b0399417SRaja Mani #define NUM_UNITS_IS_NUM_VDEVS         BIT(0)
2760b0399417SRaja Mani #define NUM_UNITS_IS_NUM_PEERS         BIT(1)
2761b0399417SRaja Mani #define NUM_UNITS_IS_NUM_ACTIVE_PEERS  BIT(2)
2762b3effe61SBartosz Markowski 
2763d1e52a8eSRaja Mani struct wmi_resource_config_10_4 {
2764d1e52a8eSRaja Mani 	/* Number of virtual devices (VAPs) to support */
2765d1e52a8eSRaja Mani 	__le32 num_vdevs;
2766d1e52a8eSRaja Mani 
2767d1e52a8eSRaja Mani 	/* Number of peer nodes to support */
2768d1e52a8eSRaja Mani 	__le32 num_peers;
2769d1e52a8eSRaja Mani 
2770d1e52a8eSRaja Mani 	/* Number of active peer nodes to support */
2771d1e52a8eSRaja Mani 	__le32 num_active_peers;
2772d1e52a8eSRaja Mani 
2773d1e52a8eSRaja Mani 	/* In offload mode, target supports features like WOW, chatter and other
2774d1e52a8eSRaja Mani 	 * protocol offloads. In order to support them some functionalities like
2775d1e52a8eSRaja Mani 	 * reorder buffering, PN checking need to be done in target.
2776d1e52a8eSRaja Mani 	 * This determines maximum number of peers supported by target in
2777d1e52a8eSRaja Mani 	 * offload mode.
2778d1e52a8eSRaja Mani 	 */
2779d1e52a8eSRaja Mani 	__le32 num_offload_peers;
2780d1e52a8eSRaja Mani 
2781d1e52a8eSRaja Mani 	/* Number of reorder buffers available for doing target based reorder
2782d1e52a8eSRaja Mani 	 * Rx reorder buffering
2783d1e52a8eSRaja Mani 	 */
2784d1e52a8eSRaja Mani 	__le32 num_offload_reorder_buffs;
2785d1e52a8eSRaja Mani 
2786d1e52a8eSRaja Mani 	/* Number of keys per peer */
2787d1e52a8eSRaja Mani 	__le32 num_peer_keys;
2788d1e52a8eSRaja Mani 
2789d1e52a8eSRaja Mani 	/* Total number of TX/RX data TIDs */
2790d1e52a8eSRaja Mani 	__le32 num_tids;
2791d1e52a8eSRaja Mani 
2792d1e52a8eSRaja Mani 	/* Max skid for resolving hash collisions.
2793d1e52a8eSRaja Mani 	 * The address search table is sparse, so that if two MAC addresses
2794d1e52a8eSRaja Mani 	 * result in the same hash value, the second of these conflicting
2795d1e52a8eSRaja Mani 	 * entries can slide to the next index in the address search table,
2796d1e52a8eSRaja Mani 	 * and use it, if it is unoccupied.  This ast_skid_limit parameter
2797d1e52a8eSRaja Mani 	 * specifies the upper bound on how many subsequent indices to search
2798d1e52a8eSRaja Mani 	 * over to find an unoccupied space.
2799d1e52a8eSRaja Mani 	 */
2800d1e52a8eSRaja Mani 	__le32 ast_skid_limit;
2801d1e52a8eSRaja Mani 
2802d1e52a8eSRaja Mani 	/* The nominal chain mask for transmit.
2803d1e52a8eSRaja Mani 	 * The chain mask may be modified dynamically, e.g. to operate AP tx
2804d1e52a8eSRaja Mani 	 * with a reduced number of chains if no clients are associated.
2805d1e52a8eSRaja Mani 	 * This configuration parameter specifies the nominal chain-mask that
2806d1e52a8eSRaja Mani 	 * should be used when not operating with a reduced set of tx chains.
2807d1e52a8eSRaja Mani 	 */
2808d1e52a8eSRaja Mani 	__le32 tx_chain_mask;
2809d1e52a8eSRaja Mani 
2810d1e52a8eSRaja Mani 	/* The nominal chain mask for receive.
2811d1e52a8eSRaja Mani 	 * The chain mask may be modified dynamically, e.g. for a client to use
2812d1e52a8eSRaja Mani 	 * a reduced number of chains for receive if the traffic to the client
2813d1e52a8eSRaja Mani 	 * is low enough that it doesn't require downlink MIMO or antenna
2814d1e52a8eSRaja Mani 	 * diversity. This configuration parameter specifies the nominal
2815d1e52a8eSRaja Mani 	 * chain-mask that should be used when not operating with a reduced
2816d1e52a8eSRaja Mani 	 * set of rx chains.
2817d1e52a8eSRaja Mani 	 */
2818d1e52a8eSRaja Mani 	__le32 rx_chain_mask;
2819d1e52a8eSRaja Mani 
2820d1e52a8eSRaja Mani 	/* What rx reorder timeout (ms) to use for the AC.
2821d1e52a8eSRaja Mani 	 * Each WMM access class (voice, video, best-effort, background) will
2822d1e52a8eSRaja Mani 	 * have its own timeout value to dictate how long to wait for missing
2823d1e52a8eSRaja Mani 	 * rx MPDUs to arrive before flushing subsequent MPDUs that have already
2824d1e52a8eSRaja Mani 	 * been received. This parameter specifies the timeout in milliseconds
2825d1e52a8eSRaja Mani 	 * for each class.
2826d1e52a8eSRaja Mani 	 */
2827d1e52a8eSRaja Mani 	__le32 rx_timeout_pri[4];
2828d1e52a8eSRaja Mani 
2829d1e52a8eSRaja Mani 	/* What mode the rx should decap packets to.
2830d1e52a8eSRaja Mani 	 * MAC can decap to RAW (no decap), native wifi or Ethernet types.
2831d1e52a8eSRaja Mani 	 * This setting also determines the default TX behavior, however TX
2832d1e52a8eSRaja Mani 	 * behavior can be modified on a per VAP basis during VAP init
2833d1e52a8eSRaja Mani 	 */
2834d1e52a8eSRaja Mani 	__le32 rx_decap_mode;
2835d1e52a8eSRaja Mani 
2836d1e52a8eSRaja Mani 	__le32 scan_max_pending_req;
2837d1e52a8eSRaja Mani 
2838d1e52a8eSRaja Mani 	__le32 bmiss_offload_max_vdev;
2839d1e52a8eSRaja Mani 
2840d1e52a8eSRaja Mani 	__le32 roam_offload_max_vdev;
2841d1e52a8eSRaja Mani 
2842d1e52a8eSRaja Mani 	__le32 roam_offload_max_ap_profiles;
2843d1e52a8eSRaja Mani 
2844d1e52a8eSRaja Mani 	/* How many groups to use for mcast->ucast conversion.
2845d1e52a8eSRaja Mani 	 * The target's WAL maintains a table to hold information regarding
2846d1e52a8eSRaja Mani 	 * which peers belong to a given multicast group, so that if
2847d1e52a8eSRaja Mani 	 * multicast->unicast conversion is enabled, the target can convert
2848d1e52a8eSRaja Mani 	 * multicast tx frames to a series of unicast tx frames, to each peer
2849d1e52a8eSRaja Mani 	 * within the multicast group. This num_mcast_groups configuration
2850d1e52a8eSRaja Mani 	 * parameter tells the target how many multicast groups to provide
2851d1e52a8eSRaja Mani 	 * storage for within its multicast group membership table.
2852d1e52a8eSRaja Mani 	 */
2853d1e52a8eSRaja Mani 	__le32 num_mcast_groups;
2854d1e52a8eSRaja Mani 
2855d1e52a8eSRaja Mani 	/* Size to alloc for the mcast membership table.
2856d1e52a8eSRaja Mani 	 * This num_mcast_table_elems configuration parameter tells the target
2857d1e52a8eSRaja Mani 	 * how many peer elements it needs to provide storage for in its
2858d1e52a8eSRaja Mani 	 * multicast group membership table. These multicast group membership
2859d1e52a8eSRaja Mani 	 * table elements are shared by the multicast groups stored within
2860d1e52a8eSRaja Mani 	 * the table.
2861d1e52a8eSRaja Mani 	 */
2862d1e52a8eSRaja Mani 	__le32 num_mcast_table_elems;
2863d1e52a8eSRaja Mani 
2864d1e52a8eSRaja Mani 	/* Whether/how to do multicast->unicast conversion.
2865d1e52a8eSRaja Mani 	 * This configuration parameter specifies whether the target should
2866d1e52a8eSRaja Mani 	 * perform multicast --> unicast conversion on transmit, and if so,
2867d1e52a8eSRaja Mani 	 * what to do if it finds no entries in its multicast group membership
2868d1e52a8eSRaja Mani 	 * table for the multicast IP address in the tx frame.
2869d1e52a8eSRaja Mani 	 * Configuration value:
2870d1e52a8eSRaja Mani 	 * 0 -> Do not perform multicast to unicast conversion.
2871d1e52a8eSRaja Mani 	 * 1 -> Convert multicast frames to unicast, if the IP multicast address
2872d1e52a8eSRaja Mani 	 *      from the tx frame is found in the multicast group membership
2873d1e52a8eSRaja Mani 	 *      table.  If the IP multicast address is not found, drop the frame
2874d1e52a8eSRaja Mani 	 * 2 -> Convert multicast frames to unicast, if the IP multicast address
2875d1e52a8eSRaja Mani 	 *      from the tx frame is found in the multicast group membership
2876d1e52a8eSRaja Mani 	 *      table.  If the IP multicast address is not found, transmit the
2877d1e52a8eSRaja Mani 	 *      frame as multicast.
2878d1e52a8eSRaja Mani 	 */
2879d1e52a8eSRaja Mani 	__le32 mcast2ucast_mode;
2880d1e52a8eSRaja Mani 
2881d1e52a8eSRaja Mani 	/* How much memory to allocate for a tx PPDU dbg log.
2882d1e52a8eSRaja Mani 	 * This parameter controls how much memory the target will allocate to
2883d1e52a8eSRaja Mani 	 * store a log of tx PPDU meta-information (how large the PPDU was,
2884d1e52a8eSRaja Mani 	 * when it was sent, whether it was successful, etc.)
2885d1e52a8eSRaja Mani 	 */
2886d1e52a8eSRaja Mani 	__le32 tx_dbg_log_size;
2887d1e52a8eSRaja Mani 
2888d1e52a8eSRaja Mani 	/* How many AST entries to be allocated for WDS */
2889d1e52a8eSRaja Mani 	__le32 num_wds_entries;
2890d1e52a8eSRaja Mani 
2891d1e52a8eSRaja Mani 	/* MAC DMA burst size. 0 -default, 1 -256B */
2892d1e52a8eSRaja Mani 	__le32 dma_burst_size;
2893d1e52a8eSRaja Mani 
2894d1e52a8eSRaja Mani 	/* Fixed delimiters to be inserted after every MPDU to account for
2895d1e52a8eSRaja Mani 	 * interface latency to avoid underrun.
2896d1e52a8eSRaja Mani 	 */
2897d1e52a8eSRaja Mani 	__le32 mac_aggr_delim;
2898d1e52a8eSRaja Mani 
2899d1e52a8eSRaja Mani 	/* Determine whether target is responsible for detecting duplicate
2900d1e52a8eSRaja Mani 	 * non-aggregate MPDU and timing out stale fragments. A-MPDU reordering
2901d1e52a8eSRaja Mani 	 * is always performed on the target.
2902d1e52a8eSRaja Mani 	 *
2903d1e52a8eSRaja Mani 	 * 0: target responsible for frag timeout and dup checking
2904d1e52a8eSRaja Mani 	 * 1: host responsible for frag timeout and dup checking
2905d1e52a8eSRaja Mani 	 */
2906d1e52a8eSRaja Mani 	__le32 rx_skip_defrag_timeout_dup_detection_check;
2907d1e52a8eSRaja Mani 
2908d1e52a8eSRaja Mani 	/* Configuration for VoW : No of Video nodes to be supported and max
2909d1e52a8eSRaja Mani 	 * no of descriptors for each video link (node).
2910d1e52a8eSRaja Mani 	 */
2911d1e52a8eSRaja Mani 	__le32 vow_config;
2912d1e52a8eSRaja Mani 
2913d1e52a8eSRaja Mani 	/* Maximum vdev that could use gtk offload */
2914d1e52a8eSRaja Mani 	__le32 gtk_offload_max_vdev;
2915d1e52a8eSRaja Mani 
2916d1e52a8eSRaja Mani 	/* Number of msdu descriptors target should use */
2917d1e52a8eSRaja Mani 	__le32 num_msdu_desc;
2918d1e52a8eSRaja Mani 
2919d1e52a8eSRaja Mani 	/* Max number of tx fragments per MSDU.
2920d1e52a8eSRaja Mani 	 * This parameter controls the max number of tx fragments per MSDU.
2921d1e52a8eSRaja Mani 	 * This will passed by target as part of the WMI_SERVICE_READY event
2922d1e52a8eSRaja Mani 	 * and is overridden by the OS shim as required.
2923d1e52a8eSRaja Mani 	 */
2924d1e52a8eSRaja Mani 	__le32 max_frag_entries;
2925d1e52a8eSRaja Mani 
2926d1e52a8eSRaja Mani 	/* Max number of extended peer stats.
2927d1e52a8eSRaja Mani 	 * This parameter controls the max number of peers for which extended
2928d1e52a8eSRaja Mani 	 * statistics are supported by target
2929d1e52a8eSRaja Mani 	 */
2930d1e52a8eSRaja Mani 	__le32 max_peer_ext_stats;
2931d1e52a8eSRaja Mani 
2932d1e52a8eSRaja Mani 	/* Smart antenna capabilities information.
2933d1e52a8eSRaja Mani 	 * 1 - Smart antenna is enabled
2934d1e52a8eSRaja Mani 	 * 0 - Smart antenna is disabled
2935d1e52a8eSRaja Mani 	 * In future this can contain smart antenna specific capabilities.
2936d1e52a8eSRaja Mani 	 */
2937d1e52a8eSRaja Mani 	__le32 smart_ant_cap;
2938d1e52a8eSRaja Mani 
2939d1e52a8eSRaja Mani 	/* User can configure the buffers allocated for each AC (BE, BK, VI, VO)
2940d1e52a8eSRaja Mani 	 * during init.
2941d1e52a8eSRaja Mani 	 */
2942d1e52a8eSRaja Mani 	__le32 bk_minfree;
2943d1e52a8eSRaja Mani 	__le32 be_minfree;
2944d1e52a8eSRaja Mani 	__le32 vi_minfree;
2945d1e52a8eSRaja Mani 	__le32 vo_minfree;
2946d1e52a8eSRaja Mani 
2947d1e52a8eSRaja Mani 	/* Rx batch mode capability.
2948d1e52a8eSRaja Mani 	 * 1 - Rx batch mode enabled
2949d1e52a8eSRaja Mani 	 * 0 - Rx batch mode disabled
2950d1e52a8eSRaja Mani 	 */
2951d1e52a8eSRaja Mani 	__le32 rx_batchmode;
2952d1e52a8eSRaja Mani 
2953d1e52a8eSRaja Mani 	/* Thermal throttling capability.
2954d1e52a8eSRaja Mani 	 * 1 - Capable of thermal throttling
2955d1e52a8eSRaja Mani 	 * 0 - Not capable of thermal throttling
2956d1e52a8eSRaja Mani 	 */
2957d1e52a8eSRaja Mani 	__le32 tt_support;
2958d1e52a8eSRaja Mani 
2959d1e52a8eSRaja Mani 	/* ATF configuration.
2960d1e52a8eSRaja Mani 	 * 1  - Enable ATF
2961d1e52a8eSRaja Mani 	 * 0  - Disable ATF
2962d1e52a8eSRaja Mani 	 */
2963d1e52a8eSRaja Mani 	__le32 atf_config;
2964d1e52a8eSRaja Mani 
2965d1e52a8eSRaja Mani 	/* Configure padding to manage IP header un-alignment
2966d1e52a8eSRaja Mani 	 * 1  - Enable padding
2967d1e52a8eSRaja Mani 	 * 0  - Disable padding
2968d1e52a8eSRaja Mani 	 */
2969d1e52a8eSRaja Mani 	__le32 iphdr_pad_config;
2970d1e52a8eSRaja Mani 
2971169ff6dbSBen Greear 	/* qwrap configuration (bits 15-0)
2972d1e52a8eSRaja Mani 	 * 1  - This is qwrap configuration
2973d1e52a8eSRaja Mani 	 * 0  - This is not qwrap
2974169ff6dbSBen Greear 	 *
2975169ff6dbSBen Greear 	 * Bits 31-16 is alloc_frag_desc_for_data_pkt (1 enables, 0 disables)
2976169ff6dbSBen Greear 	 * In order to get ack-RSSI reporting and to specify the tx-rate for
2977169ff6dbSBen Greear 	 * individual frames, this option must be enabled.  This uses an extra
2978169ff6dbSBen Greear 	 * 4 bytes per tx-msdu descriptor, so don't enable it unless you need it.
2979d1e52a8eSRaja Mani 	 */
2980d1e52a8eSRaja Mani 	__le32 qwrap_config;
2981d1e52a8eSRaja Mani } __packed;
2982d1e52a8eSRaja Mani 
2983add6cd8dSManikanta Pubbisetty enum wmi_coex_version {
2984add6cd8dSManikanta Pubbisetty 	WMI_NO_COEX_VERSION_SUPPORT	= 0,
2985add6cd8dSManikanta Pubbisetty 	/* 3 wire coex support*/
2986add6cd8dSManikanta Pubbisetty 	WMI_COEX_VERSION_1		= 1,
2987add6cd8dSManikanta Pubbisetty 	/* 2.5 wire coex support*/
2988add6cd8dSManikanta Pubbisetty 	WMI_COEX_VERSION_2		= 2,
2989add6cd8dSManikanta Pubbisetty 	/* 2.5 wire coex with duty cycle support */
2990add6cd8dSManikanta Pubbisetty 	WMI_COEX_VERSION_3		= 3,
2991add6cd8dSManikanta Pubbisetty 	/* 4 wire coex support*/
2992add6cd8dSManikanta Pubbisetty 	WMI_COEX_VERSION_4		= 4,
2993add6cd8dSManikanta Pubbisetty };
2994add6cd8dSManikanta Pubbisetty 
299547771902SRaja Mani /**
299647771902SRaja Mani  * enum wmi_10_4_feature_mask - WMI 10.4 feature enable/disable flags
299747771902SRaja Mani  * @WMI_10_4_LTEU_SUPPORT: LTEU config
299847771902SRaja Mani  * @WMI_10_4_COEX_GPIO_SUPPORT: COEX GPIO config
299947771902SRaja Mani  * @WMI_10_4_AUX_RADIO_SPECTRAL_INTF: AUX Radio Enhancement for spectral scan
300047771902SRaja Mani  * @WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF: AUX Radio Enhancement for chan load scan
300147771902SRaja Mani  * @WMI_10_4_BSS_CHANNEL_INFO_64: BSS channel info stats
300247771902SRaja Mani  * @WMI_10_4_PEER_STATS: Per station stats
3003add6cd8dSManikanta Pubbisetty  * @WMI_10_4_VDEV_STATS: Per vdev stats
3004add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS: Implicit TDLS support in firmware enable/disable
3005add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_OFFCHAN: TDLS offchannel support enable/disable
3006add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_UAPSD_BUFFER_STA: TDLS buffer sta support enable/disable
3007add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_UAPSD_SLEEP_STA: TDLS sleep sta support enable/disable
3008add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_CONN_TRACKER_IN_HOST_MODE: TDLS connection tracker in host
3009add6cd8dSManikanta Pubbisetty  *	enable/disable
3010add6cd8dSManikanta Pubbisetty  * @WMI_10_4_TDLS_EXPLICIT_MODE_ONLY:Explicit TDLS mode enable/disable
3011c7fd8d23SBalaji Pothunoori  * @WMI_10_4_TX_DATA_ACK_RSSI: Enable DATA ACK RSSI if firmware is capable
301247771902SRaja Mani  */
301347771902SRaja Mani enum wmi_10_4_feature_mask {
301447771902SRaja Mani 	WMI_10_4_LTEU_SUPPORT			= BIT(0),
301547771902SRaja Mani 	WMI_10_4_COEX_GPIO_SUPPORT		= BIT(1),
301647771902SRaja Mani 	WMI_10_4_AUX_RADIO_SPECTRAL_INTF	= BIT(2),
301747771902SRaja Mani 	WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF	= BIT(3),
301847771902SRaja Mani 	WMI_10_4_BSS_CHANNEL_INFO_64		= BIT(4),
301947771902SRaja Mani 	WMI_10_4_PEER_STATS			= BIT(5),
3020add6cd8dSManikanta Pubbisetty 	WMI_10_4_VDEV_STATS			= BIT(6),
3021add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS				= BIT(7),
3022add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_OFFCHAN			= BIT(8),
3023add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_UAPSD_BUFFER_STA		= BIT(9),
3024add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_UAPSD_SLEEP_STA		= BIT(10),
3025add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_CONN_TRACKER_IN_HOST_MODE = BIT(11),
3026add6cd8dSManikanta Pubbisetty 	WMI_10_4_TDLS_EXPLICIT_MODE_ONLY	= BIT(12),
3027c7fd8d23SBalaji Pothunoori 	WMI_10_4_TX_DATA_ACK_RSSI               = BIT(16),
3028bb31b7cbSManikanta Pubbisetty 	WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT	= BIT(17),
3029bb31b7cbSManikanta Pubbisetty 	WMI_10_4_REPORT_AIRTIME			= BIT(18),
3030add6cd8dSManikanta Pubbisetty 
303147771902SRaja Mani };
303247771902SRaja Mani 
303347771902SRaja Mani struct wmi_ext_resource_config_10_4_cmd {
303447771902SRaja Mani 	/* contains enum wmi_host_platform_type */
303547771902SRaja Mani 	__le32 host_platform_config;
303647771902SRaja Mani 	/* see enum wmi_10_4_feature_mask */
303747771902SRaja Mani 	__le32 fw_feature_bitmap;
3038add6cd8dSManikanta Pubbisetty 	/* WLAN priority GPIO number */
3039add6cd8dSManikanta Pubbisetty 	__le32 wlan_gpio_priority;
3040add6cd8dSManikanta Pubbisetty 	/* see enum wmi_coex_version */
3041add6cd8dSManikanta Pubbisetty 	__le32 coex_version;
3042add6cd8dSManikanta Pubbisetty 	/* COEX GPIO config */
3043add6cd8dSManikanta Pubbisetty 	__le32 coex_gpio_pin1;
3044add6cd8dSManikanta Pubbisetty 	__le32 coex_gpio_pin2;
3045add6cd8dSManikanta Pubbisetty 	__le32 coex_gpio_pin3;
3046add6cd8dSManikanta Pubbisetty 	/* number of vdevs allowed to perform tdls */
3047add6cd8dSManikanta Pubbisetty 	__le32 num_tdls_vdevs;
3048add6cd8dSManikanta Pubbisetty 	/* number of peers to track per TDLS vdev */
3049add6cd8dSManikanta Pubbisetty 	__le32 num_tdls_conn_table_entries;
3050add6cd8dSManikanta Pubbisetty 	/* number of tdls sleep sta supported */
3051add6cd8dSManikanta Pubbisetty 	__le32 max_tdls_concurrent_sleep_sta;
3052add6cd8dSManikanta Pubbisetty 	/* number of tdls buffer sta supported */
3053add6cd8dSManikanta Pubbisetty 	__le32 max_tdls_concurrent_buffer_sta;
305447771902SRaja Mani };
305547771902SRaja Mani 
30565c9f0713SErik Stromdahl /* structure describing host memory chunk. */
30575e3dd157SKalle Valo struct host_memory_chunk {
30585e3dd157SKalle Valo 	/* id of the request that is passed up in service ready */
30595e3dd157SKalle Valo 	__le32 req_id;
30605e3dd157SKalle Valo 	/* the physical address the memory chunk */
30615e3dd157SKalle Valo 	__le32 ptr;
30625e3dd157SKalle Valo 	/* size of the chunk */
30635e3dd157SKalle Valo 	__le32 size;
30645e3dd157SKalle Valo } __packed;
30655e3dd157SKalle Valo 
30669af7c32cSVenkateswara Naralasetty #define WMI_IRAM_RECOVERY_HOST_MEM_REQ_ID 8
30679af7c32cSVenkateswara Naralasetty 
3068cf9fca8fSMichal Kazior struct wmi_host_mem_chunks {
3069cf9fca8fSMichal Kazior 	__le32 count;
3070cf9fca8fSMichal Kazior 	/* some fw revisions require at least 1 chunk regardless of count */
3071cf9fca8fSMichal Kazior 	struct host_memory_chunk items[1];
3072cf9fca8fSMichal Kazior } __packed;
3073cf9fca8fSMichal Kazior 
30745e3dd157SKalle Valo struct wmi_init_cmd {
30755e3dd157SKalle Valo 	struct wmi_resource_config resource_config;
3076cf9fca8fSMichal Kazior 	struct wmi_host_mem_chunks mem_chunks;
30775e3dd157SKalle Valo } __packed;
30785e3dd157SKalle Valo 
3079e13dbeadSJoe Perches /* _10x structure is from 10.X FW API */
308012b2b9e3SBartosz Markowski struct wmi_init_cmd_10x {
308112b2b9e3SBartosz Markowski 	struct wmi_resource_config_10x resource_config;
3082cf9fca8fSMichal Kazior 	struct wmi_host_mem_chunks mem_chunks;
308312b2b9e3SBartosz Markowski } __packed;
308412b2b9e3SBartosz Markowski 
308524c88f78SMichal Kazior struct wmi_init_cmd_10_2 {
308624c88f78SMichal Kazior 	struct wmi_resource_config_10_2 resource_config;
3087cf9fca8fSMichal Kazior 	struct wmi_host_mem_chunks mem_chunks;
308824c88f78SMichal Kazior } __packed;
308924c88f78SMichal Kazior 
3090d1e52a8eSRaja Mani struct wmi_init_cmd_10_4 {
3091d1e52a8eSRaja Mani 	struct wmi_resource_config_10_4 resource_config;
3092d1e52a8eSRaja Mani 	struct wmi_host_mem_chunks mem_chunks;
3093d1e52a8eSRaja Mani } __packed;
3094d1e52a8eSRaja Mani 
309524c88f78SMichal Kazior struct wmi_chan_list_entry {
309624c88f78SMichal Kazior 	__le16 freq;
309724c88f78SMichal Kazior 	u8 phy_mode; /* valid for 10.2 only */
309824c88f78SMichal Kazior 	u8 reserved;
309924c88f78SMichal Kazior } __packed;
310024c88f78SMichal Kazior 
31015e3dd157SKalle Valo /* TLV for channel list */
31025e3dd157SKalle Valo struct wmi_chan_list {
31035e3dd157SKalle Valo 	__le32 tag; /* WMI_CHAN_LIST_TAG */
31045e3dd157SKalle Valo 	__le32 num_chan;
3105d3ed0cf0SGustavo A. R. Silva 	struct wmi_chan_list_entry channel_list[];
31065e3dd157SKalle Valo } __packed;
31075e3dd157SKalle Valo 
31085e3dd157SKalle Valo struct wmi_bssid_list {
31095e3dd157SKalle Valo 	__le32 tag; /* WMI_BSSID_LIST_TAG */
31105e3dd157SKalle Valo 	__le32 num_bssid;
3111d3ed0cf0SGustavo A. R. Silva 	struct wmi_mac_addr bssid_list[];
31125e3dd157SKalle Valo } __packed;
31135e3dd157SKalle Valo 
31145e3dd157SKalle Valo struct wmi_ie_data {
31155e3dd157SKalle Valo 	__le32 tag; /* WMI_IE_TAG */
31165e3dd157SKalle Valo 	__le32 ie_len;
3117d3ed0cf0SGustavo A. R. Silva 	u8 ie_data[];
31185e3dd157SKalle Valo } __packed;
31195e3dd157SKalle Valo 
31205e3dd157SKalle Valo struct wmi_ssid {
31215e3dd157SKalle Valo 	__le32 ssid_len;
31225e3dd157SKalle Valo 	u8 ssid[32];
31235e3dd157SKalle Valo } __packed;
31245e3dd157SKalle Valo 
31255e3dd157SKalle Valo struct wmi_ssid_list {
31265e3dd157SKalle Valo 	__le32 tag; /* WMI_SSID_LIST_TAG */
31275e3dd157SKalle Valo 	__le32 num_ssids;
3128d3ed0cf0SGustavo A. R. Silva 	struct wmi_ssid ssids[];
31295e3dd157SKalle Valo } __packed;
31305e3dd157SKalle Valo 
31315e3dd157SKalle Valo /* prefix used by scan requestor ids on the host */
31325e3dd157SKalle Valo #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
31335e3dd157SKalle Valo 
31345e3dd157SKalle Valo /* prefix used by scan request ids generated on the host */
31355e3dd157SKalle Valo /* host cycles through the lower 12 bits to generate ids */
31365e3dd157SKalle Valo #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
31375e3dd157SKalle Valo 
31385e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_SSID    16
31395e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_BSSID   4
31405e3dd157SKalle Valo #define WLAN_SCAN_PARAMS_MAX_IE_LEN  256
31415e3dd157SKalle Valo 
3142dcca0bdbSMichal Kazior /* Values lower than this may be refused by some firmware revisions with a scan
3143dcca0bdbSMichal Kazior  * completion with a timedout reason.
3144dcca0bdbSMichal Kazior  */
3145dcca0bdbSMichal Kazior #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3146dcca0bdbSMichal Kazior 
31475e3dd157SKalle Valo /* Scan priority numbers must be sequential, starting with 0 */
31485e3dd157SKalle Valo enum wmi_scan_priority {
31495e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_VERY_LOW = 0,
31505e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_LOW,
31515e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_MEDIUM,
31525e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_HIGH,
31535e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_VERY_HIGH,
31545e3dd157SKalle Valo 	WMI_SCAN_PRIORITY_COUNT   /* number of priorities supported */
31555e3dd157SKalle Valo };
31565e3dd157SKalle Valo 
3157a6aa5da3SMichal Kazior struct wmi_start_scan_common {
31585e3dd157SKalle Valo 	/* Scan ID */
31595e3dd157SKalle Valo 	__le32 scan_id;
31605e3dd157SKalle Valo 	/* Scan requestor ID */
31615e3dd157SKalle Valo 	__le32 scan_req_id;
31625e3dd157SKalle Valo 	/* VDEV id(interface) that is requesting scan */
31635e3dd157SKalle Valo 	__le32 vdev_id;
31645e3dd157SKalle Valo 	/* Scan Priority, input to scan scheduler */
31655e3dd157SKalle Valo 	__le32 scan_priority;
31665e3dd157SKalle Valo 	/* Scan events subscription */
31675e3dd157SKalle Valo 	__le32 notify_scan_events;
31685e3dd157SKalle Valo 	/* dwell time in msec on active channels */
31695e3dd157SKalle Valo 	__le32 dwell_time_active;
31705e3dd157SKalle Valo 	/* dwell time in msec on passive channels */
31715e3dd157SKalle Valo 	__le32 dwell_time_passive;
31725e3dd157SKalle Valo 	/*
31735e3dd157SKalle Valo 	 * min time in msec on the BSS channel,only valid if at least one
31745e3dd157SKalle Valo 	 * VDEV is active
31755e3dd157SKalle Valo 	 */
31765e3dd157SKalle Valo 	__le32 min_rest_time;
31775e3dd157SKalle Valo 	/*
31785e3dd157SKalle Valo 	 * max rest time in msec on the BSS channel,only valid if at least
31795e3dd157SKalle Valo 	 * one VDEV is active
31805e3dd157SKalle Valo 	 */
31815e3dd157SKalle Valo 	/*
31825e3dd157SKalle Valo 	 * the scanner will rest on the bss channel at least min_rest_time
31835e3dd157SKalle Valo 	 * after min_rest_time the scanner will start checking for tx/rx
31845e3dd157SKalle Valo 	 * activity on all VDEVs. if there is no activity the scanner will
31855e3dd157SKalle Valo 	 * switch to off channel. if there is activity the scanner will let
31865e3dd157SKalle Valo 	 * the radio on the bss channel until max_rest_time expires.at
31875e3dd157SKalle Valo 	 * max_rest_time scanner will switch to off channel irrespective of
31885e3dd157SKalle Valo 	 * activity. activity is determined by the idle_time parameter.
31895e3dd157SKalle Valo 	 */
31905e3dd157SKalle Valo 	__le32 max_rest_time;
31915e3dd157SKalle Valo 	/*
31925e3dd157SKalle Valo 	 * time before sending next set of probe requests.
31935e3dd157SKalle Valo 	 * The scanner keeps repeating probe requests transmission with
31945e3dd157SKalle Valo 	 * period specified by repeat_probe_time.
31955e3dd157SKalle Valo 	 * The number of probe requests specified depends on the ssid_list
31965e3dd157SKalle Valo 	 * and bssid_list
31975e3dd157SKalle Valo 	 */
31985e3dd157SKalle Valo 	__le32 repeat_probe_time;
3199b8a71b95SJeff Johnson 	/* time in msec between 2 consecutive probe requests with in a set. */
32005e3dd157SKalle Valo 	__le32 probe_spacing_time;
32015e3dd157SKalle Valo 	/*
32025e3dd157SKalle Valo 	 * data inactivity time in msec on bss channel that will be used by
32035e3dd157SKalle Valo 	 * scanner for measuring the inactivity.
32045e3dd157SKalle Valo 	 */
32055e3dd157SKalle Valo 	__le32 idle_time;
32065e3dd157SKalle Valo 	/* maximum time in msec allowed for scan  */
32075e3dd157SKalle Valo 	__le32 max_scan_time;
32085e3dd157SKalle Valo 	/*
32095e3dd157SKalle Valo 	 * delay in msec before sending first probe request after switching
32105e3dd157SKalle Valo 	 * to a channel
32115e3dd157SKalle Valo 	 */
32125e3dd157SKalle Valo 	__le32 probe_delay;
32135e3dd157SKalle Valo 	/* Scan control flags */
32145e3dd157SKalle Valo 	__le32 scan_ctrl_flags;
3215a6aa5da3SMichal Kazior } __packed;
32165e3dd157SKalle Valo 
3217a6aa5da3SMichal Kazior struct wmi_start_scan_tlvs {
3218a6aa5da3SMichal Kazior 	/* TLV parameters. These includes channel list, ssid list, bssid list,
3219a6aa5da3SMichal Kazior 	 * extra ies.
32205e3dd157SKalle Valo 	 */
3221a6aa5da3SMichal Kazior 	u8 tlvs[0];
3222a6aa5da3SMichal Kazior } __packed;
3223a6aa5da3SMichal Kazior 
3224a6aa5da3SMichal Kazior struct wmi_start_scan_cmd {
3225a6aa5da3SMichal Kazior 	struct wmi_start_scan_common common;
3226a6aa5da3SMichal Kazior 	__le32 burst_duration_ms;
3227a6aa5da3SMichal Kazior 	struct wmi_start_scan_tlvs tlvs;
32285e3dd157SKalle Valo } __packed;
32295e3dd157SKalle Valo 
323089b7e766SBartosz Markowski /* This is the definition from 10.X firmware branch */
3231a6aa5da3SMichal Kazior struct wmi_10x_start_scan_cmd {
3232a6aa5da3SMichal Kazior 	struct wmi_start_scan_common common;
3233a6aa5da3SMichal Kazior 	struct wmi_start_scan_tlvs tlvs;
323489b7e766SBartosz Markowski } __packed;
323589b7e766SBartosz Markowski 
32365e3dd157SKalle Valo struct wmi_ssid_arg {
32375e3dd157SKalle Valo 	int len;
32385e3dd157SKalle Valo 	const u8 *ssid;
32395e3dd157SKalle Valo };
32405e3dd157SKalle Valo 
32415e3dd157SKalle Valo struct wmi_bssid_arg {
32425e3dd157SKalle Valo 	const u8 *bssid;
32435e3dd157SKalle Valo };
32445e3dd157SKalle Valo 
32455e3dd157SKalle Valo struct wmi_start_scan_arg {
32465e3dd157SKalle Valo 	u32 scan_id;
32475e3dd157SKalle Valo 	u32 scan_req_id;
32485e3dd157SKalle Valo 	u32 vdev_id;
32495e3dd157SKalle Valo 	u32 scan_priority;
32505e3dd157SKalle Valo 	u32 notify_scan_events;
32515e3dd157SKalle Valo 	u32 dwell_time_active;
32525e3dd157SKalle Valo 	u32 dwell_time_passive;
32535e3dd157SKalle Valo 	u32 min_rest_time;
32545e3dd157SKalle Valo 	u32 max_rest_time;
32555e3dd157SKalle Valo 	u32 repeat_probe_time;
32565e3dd157SKalle Valo 	u32 probe_spacing_time;
32575e3dd157SKalle Valo 	u32 idle_time;
32585e3dd157SKalle Valo 	u32 max_scan_time;
32595e3dd157SKalle Valo 	u32 probe_delay;
32605e3dd157SKalle Valo 	u32 scan_ctrl_flags;
3261dbd3f9f3SMichal Kazior 	u32 burst_duration_ms;
32625e3dd157SKalle Valo 
32635e3dd157SKalle Valo 	u32 ie_len;
32645e3dd157SKalle Valo 	u32 n_channels;
32655e3dd157SKalle Valo 	u32 n_ssids;
32665e3dd157SKalle Valo 	u32 n_bssids;
32675e3dd157SKalle Valo 
32685e3dd157SKalle Valo 	u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
326924c88f78SMichal Kazior 	u16 channels[64];
32705e3dd157SKalle Valo 	struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
32715e3dd157SKalle Valo 	struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
327260e1d0fbSCarl Huang 	struct wmi_mac_addr mac_addr;
327360e1d0fbSCarl Huang 	struct wmi_mac_addr mac_mask;
32745e3dd157SKalle Valo };
32755e3dd157SKalle Valo 
32765e3dd157SKalle Valo /* scan control flags */
32775e3dd157SKalle Valo 
32785e3dd157SKalle Valo /* passively scan all channels including active channels */
32795e3dd157SKalle Valo #define WMI_SCAN_FLAG_PASSIVE        0x1
32805e3dd157SKalle Valo /* add wild card ssid probe request even though ssid_list is specified. */
32815e3dd157SKalle Valo #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
32825e3dd157SKalle Valo /* add cck rates to rates/xrate ie for the generated probe request */
32835e3dd157SKalle Valo #define WMI_SCAN_ADD_CCK_RATES 0x4
32845e3dd157SKalle Valo /* add ofdm rates to rates/xrate ie for the generated probe request */
32855e3dd157SKalle Valo #define WMI_SCAN_ADD_OFDM_RATES 0x8
32865e3dd157SKalle Valo /* To enable indication of Chan load and Noise floor to host */
32875e3dd157SKalle Valo #define WMI_SCAN_CHAN_STAT_EVENT 0x10
32885e3dd157SKalle Valo /* Filter Probe request frames  */
32895e3dd157SKalle Valo #define WMI_SCAN_FILTER_PROBE_REQ 0x20
32905e3dd157SKalle Valo /* When set, DFS channels will not be scanned */
32915e3dd157SKalle Valo #define WMI_SCAN_BYPASS_DFS_CHN 0x40
32925e3dd157SKalle Valo /* Different FW scan engine may choose to bail out on errors.
329337ff1b0dSMarcin Rokicki  * Allow the driver to have influence over that.
329437ff1b0dSMarcin Rokicki  */
32955e3dd157SKalle Valo #define WMI_SCAN_CONTINUE_ON_ERROR 0x80
32965e3dd157SKalle Valo 
329760e1d0fbSCarl Huang /* Use random MAC address for TA for Probe Request frame and add
329860e1d0fbSCarl Huang  * OUI specified by WMI_SCAN_PROB_REQ_OUI_CMDID to the Probe Request frame.
329960e1d0fbSCarl Huang  * if OUI is not set by WMI_SCAN_PROB_REQ_OUI_CMDID then the flag is ignored.
330060e1d0fbSCarl Huang  */
330160e1d0fbSCarl Huang #define WMI_SCAN_ADD_SPOOFED_MAC_IN_PROBE_REQ   0x1000
330260e1d0fbSCarl Huang 
33035e3dd157SKalle Valo /* WMI_SCAN_CLASS_MASK must be the same value as IEEE80211_SCAN_CLASS_MASK */
33045e3dd157SKalle Valo #define WMI_SCAN_CLASS_MASK 0xFF000000
33055e3dd157SKalle Valo 
33065e3dd157SKalle Valo enum wmi_stop_scan_type {
33075e3dd157SKalle Valo 	WMI_SCAN_STOP_ONE	= 0x00000000, /* stop by scan_id */
33085e3dd157SKalle Valo 	WMI_SCAN_STOP_VDEV_ALL	= 0x01000000, /* stop by vdev_id */
33095e3dd157SKalle Valo 	WMI_SCAN_STOP_ALL	= 0x04000000, /* stop all scans */
33105e3dd157SKalle Valo };
33115e3dd157SKalle Valo 
33125e3dd157SKalle Valo struct wmi_stop_scan_cmd {
33135e3dd157SKalle Valo 	__le32 scan_req_id;
33145e3dd157SKalle Valo 	__le32 scan_id;
33155e3dd157SKalle Valo 	__le32 req_type;
33165e3dd157SKalle Valo 	__le32 vdev_id;
33175e3dd157SKalle Valo } __packed;
33185e3dd157SKalle Valo 
33195e3dd157SKalle Valo struct wmi_stop_scan_arg {
33205e3dd157SKalle Valo 	u32 req_id;
33215e3dd157SKalle Valo 	enum wmi_stop_scan_type req_type;
33225e3dd157SKalle Valo 	union {
33235e3dd157SKalle Valo 		u32 scan_id;
33245e3dd157SKalle Valo 		u32 vdev_id;
33255e3dd157SKalle Valo 	} u;
33265e3dd157SKalle Valo };
33275e3dd157SKalle Valo 
33285e3dd157SKalle Valo struct wmi_scan_chan_list_cmd {
33295e3dd157SKalle Valo 	__le32 num_scan_chans;
3330d3ed0cf0SGustavo A. R. Silva 	struct wmi_channel chan_info[];
33315e3dd157SKalle Valo } __packed;
33325e3dd157SKalle Valo 
33335e3dd157SKalle Valo struct wmi_scan_chan_list_arg {
33345e3dd157SKalle Valo 	u32 n_channels;
33355e3dd157SKalle Valo 	struct wmi_channel_arg *channels;
33365e3dd157SKalle Valo };
33375e3dd157SKalle Valo 
33385e3dd157SKalle Valo enum wmi_bss_filter {
33395e3dd157SKalle Valo 	WMI_BSS_FILTER_NONE = 0,        /* no beacons forwarded */
33405e3dd157SKalle Valo 	WMI_BSS_FILTER_ALL,             /* all beacons forwarded */
33415e3dd157SKalle Valo 	WMI_BSS_FILTER_PROFILE,         /* only beacons matching profile */
33425e3dd157SKalle Valo 	WMI_BSS_FILTER_ALL_BUT_PROFILE, /* all but beacons matching profile */
33435e3dd157SKalle Valo 	WMI_BSS_FILTER_CURRENT_BSS,     /* only beacons matching current BSS */
33445e3dd157SKalle Valo 	WMI_BSS_FILTER_ALL_BUT_BSS,     /* all but beacons matching BSS */
33455e3dd157SKalle Valo 	WMI_BSS_FILTER_PROBED_SSID,     /* beacons matching probed ssid */
33465e3dd157SKalle Valo 	WMI_BSS_FILTER_LAST_BSS,        /* marker only */
33475e3dd157SKalle Valo };
33485e3dd157SKalle Valo 
33495e3dd157SKalle Valo enum wmi_scan_event_type {
3350b2297baaSRaja Mani 	WMI_SCAN_EVENT_STARTED              = BIT(0),
3351b2297baaSRaja Mani 	WMI_SCAN_EVENT_COMPLETED            = BIT(1),
3352b2297baaSRaja Mani 	WMI_SCAN_EVENT_BSS_CHANNEL          = BIT(2),
3353b2297baaSRaja Mani 	WMI_SCAN_EVENT_FOREIGN_CHANNEL      = BIT(3),
3354b2297baaSRaja Mani 	WMI_SCAN_EVENT_DEQUEUED             = BIT(4),
3355b2297baaSRaja Mani 	/* possibly by high-prio scan */
3356b2297baaSRaja Mani 	WMI_SCAN_EVENT_PREEMPTED            = BIT(5),
3357b2297baaSRaja Mani 	WMI_SCAN_EVENT_START_FAILED         = BIT(6),
3358b2297baaSRaja Mani 	WMI_SCAN_EVENT_RESTARTED            = BIT(7),
3359b2297baaSRaja Mani 	WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8),
3360b2297baaSRaja Mani 	WMI_SCAN_EVENT_MAX                  = BIT(15),
33615e3dd157SKalle Valo };
33625e3dd157SKalle Valo 
33635e3dd157SKalle Valo enum wmi_scan_completion_reason {
33645e3dd157SKalle Valo 	WMI_SCAN_REASON_COMPLETED,
33655e3dd157SKalle Valo 	WMI_SCAN_REASON_CANCELLED,
33665e3dd157SKalle Valo 	WMI_SCAN_REASON_PREEMPTED,
33675e3dd157SKalle Valo 	WMI_SCAN_REASON_TIMEDOUT,
3368b2297baaSRaja Mani 	WMI_SCAN_REASON_INTERNAL_FAILURE,
33695e3dd157SKalle Valo 	WMI_SCAN_REASON_MAX,
33705e3dd157SKalle Valo };
33715e3dd157SKalle Valo 
33725e3dd157SKalle Valo struct wmi_scan_event {
33735e3dd157SKalle Valo 	__le32 event_type; /* %WMI_SCAN_EVENT_ */
33745e3dd157SKalle Valo 	__le32 reason; /* %WMI_SCAN_REASON_ */
33755e3dd157SKalle Valo 	__le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
33765e3dd157SKalle Valo 	__le32 scan_req_id;
33775e3dd157SKalle Valo 	__le32 scan_id;
33785e3dd157SKalle Valo 	__le32 vdev_id;
33795e3dd157SKalle Valo } __packed;
33805e3dd157SKalle Valo 
33815e3dd157SKalle Valo /*
33825e3dd157SKalle Valo  * This defines how much headroom is kept in the
33835e3dd157SKalle Valo  * receive frame between the descriptor and the
33845e3dd157SKalle Valo  * payload, in order for the WMI PHY error and
33855e3dd157SKalle Valo  * management handler to insert header contents.
33865e3dd157SKalle Valo  *
33875e3dd157SKalle Valo  * This is in bytes.
33885e3dd157SKalle Valo  */
33895e3dd157SKalle Valo #define WMI_MGMT_RX_HDR_HEADROOM    52
33905e3dd157SKalle Valo 
33915e3dd157SKalle Valo /*
33925e3dd157SKalle Valo  * This event will be used for sending scan results
33935e3dd157SKalle Valo  * as well as rx mgmt frames to the host. The rx buffer
33945e3dd157SKalle Valo  * will be sent as part of this WMI event. It would be a
33955e3dd157SKalle Valo  * good idea to pass all the fields in the RX status
33965e3dd157SKalle Valo  * descriptor up to the host.
33975e3dd157SKalle Valo  */
33980d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v1 {
33995e3dd157SKalle Valo 	__le32 channel;
34005e3dd157SKalle Valo 	__le32 snr;
34015e3dd157SKalle Valo 	__le32 rate;
34025e3dd157SKalle Valo 	__le32 phy_mode;
34035e3dd157SKalle Valo 	__le32 buf_len;
34045e3dd157SKalle Valo 	__le32 status; /* %WMI_RX_STATUS_ */
34055e3dd157SKalle Valo } __packed;
34065e3dd157SKalle Valo 
34070d9b0438SMichal Kazior struct wmi_mgmt_rx_hdr_v2 {
34080d9b0438SMichal Kazior 	struct wmi_mgmt_rx_hdr_v1 v1;
34090d9b0438SMichal Kazior 	__le32 rssi_ctl[4];
34100d9b0438SMichal Kazior } __packed;
34110d9b0438SMichal Kazior 
34120d9b0438SMichal Kazior struct wmi_mgmt_rx_event_v1 {
34130d9b0438SMichal Kazior 	struct wmi_mgmt_rx_hdr_v1 hdr;
3414d3ed0cf0SGustavo A. R. Silva 	u8 buf[];
34150d9b0438SMichal Kazior } __packed;
34160d9b0438SMichal Kazior 
34170d9b0438SMichal Kazior struct wmi_mgmt_rx_event_v2 {
34180d9b0438SMichal Kazior 	struct wmi_mgmt_rx_hdr_v2 hdr;
3419d3ed0cf0SGustavo A. R. Silva 	u8 buf[];
34205e3dd157SKalle Valo } __packed;
34215e3dd157SKalle Valo 
34221c092961SRaja Mani struct wmi_10_4_mgmt_rx_hdr {
34231c092961SRaja Mani 	__le32 channel;
34241c092961SRaja Mani 	__le32 snr;
34251c092961SRaja Mani 	    u8 rssi_ctl[4];
34261c092961SRaja Mani 	__le32 rate;
34271c092961SRaja Mani 	__le32 phy_mode;
34281c092961SRaja Mani 	__le32 buf_len;
34291c092961SRaja Mani 	__le32 status;
34301c092961SRaja Mani } __packed;
34311c092961SRaja Mani 
34321c092961SRaja Mani struct wmi_10_4_mgmt_rx_event {
34331c092961SRaja Mani 	struct wmi_10_4_mgmt_rx_hdr hdr;
3434d3ed0cf0SGustavo A. R. Silva 	u8 buf[];
34351c092961SRaja Mani } __packed;
34361c092961SRaja Mani 
34378d130963SPeter Oh struct wmi_mgmt_rx_ext_info {
34388d130963SPeter Oh 	__le64 rx_mac_timestamp;
34398d130963SPeter Oh } __packed __aligned(4);
34408d130963SPeter Oh 
34415e3dd157SKalle Valo #define WMI_RX_STATUS_OK			0x00
34425e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_CRC			0x01
34435e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_DECRYPT		0x08
34445e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_MIC			0x10
34455e3dd157SKalle Valo #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS	0x20
34468d130963SPeter Oh /* Extension data at the end of mgmt frame */
34478d130963SPeter Oh #define WMI_RX_STATUS_EXT_INFO		0x40
34485e3dd157SKalle Valo 
3449991adf71SRaja Mani #define PHY_ERROR_GEN_SPECTRAL_SCAN		0x26
3450991adf71SRaja Mani #define PHY_ERROR_GEN_FALSE_RADAR_EXT		0x24
3451991adf71SRaja Mani #define PHY_ERROR_GEN_RADAR			0x05
3452991adf71SRaja Mani 
34532b0a2e0dSRaja Mani #define PHY_ERROR_10_4_RADAR_MASK               0x4
34542b0a2e0dSRaja Mani #define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK       0x4000000
34552b0a2e0dSRaja Mani 
3456991adf71SRaja Mani enum phy_err_type {
3457991adf71SRaja Mani 	PHY_ERROR_UNKNOWN,
3458991adf71SRaja Mani 	PHY_ERROR_SPECTRAL_SCAN,
3459991adf71SRaja Mani 	PHY_ERROR_FALSE_RADAR_EXT,
3460991adf71SRaja Mani 	PHY_ERROR_RADAR
3461991adf71SRaja Mani };
34629702c686SJanusz Dziedzic 
34632332d0aeSMichal Kazior struct wmi_phyerr {
34645e3dd157SKalle Valo 	__le32 tsf_timestamp;
34655e3dd157SKalle Valo 	__le16 freq1;
34665e3dd157SKalle Valo 	__le16 freq2;
34675e3dd157SKalle Valo 	u8 rssi_combined;
34685e3dd157SKalle Valo 	u8 chan_width_mhz;
34695e3dd157SKalle Valo 	u8 phy_err_code;
34705e3dd157SKalle Valo 	u8 rsvd0;
34712332d0aeSMichal Kazior 	__le32 rssi_chains[4];
34722332d0aeSMichal Kazior 	__le16 nf_chains[4];
34735e3dd157SKalle Valo 	__le32 buf_len;
3474d3ed0cf0SGustavo A. R. Silva 	u8 buf[];
34755e3dd157SKalle Valo } __packed;
34765e3dd157SKalle Valo 
34772332d0aeSMichal Kazior struct wmi_phyerr_event {
34782332d0aeSMichal Kazior 	__le32 num_phyerrs;
34795e3dd157SKalle Valo 	__le32 tsf_l32;
34805e3dd157SKalle Valo 	__le32 tsf_u32;
34815341d57bSKalle Valo 
34825341d57bSKalle Valo 	/* array of struct wmi_phyerr */
34835341d57bSKalle Valo 	u8 phyerrs[];
34845e3dd157SKalle Valo } __packed;
34855e3dd157SKalle Valo 
34862b0a2e0dSRaja Mani struct wmi_10_4_phyerr_event {
34872b0a2e0dSRaja Mani 	__le32 tsf_l32;
34882b0a2e0dSRaja Mani 	__le32 tsf_u32;
34892b0a2e0dSRaja Mani 	__le16 freq1;
34902b0a2e0dSRaja Mani 	__le16 freq2;
34912b0a2e0dSRaja Mani 	u8 rssi_combined;
34922b0a2e0dSRaja Mani 	u8 chan_width_mhz;
34932b0a2e0dSRaja Mani 	u8 phy_err_code;
34942b0a2e0dSRaja Mani 	u8 rsvd0;
34952b0a2e0dSRaja Mani 	__le32 rssi_chains[4];
34962b0a2e0dSRaja Mani 	__le16 nf_chains[4];
34972b0a2e0dSRaja Mani 	__le32 phy_err_mask[2];
34982b0a2e0dSRaja Mani 	__le32 tsf_timestamp;
34992b0a2e0dSRaja Mani 	__le32 buf_len;
3500d3ed0cf0SGustavo A. R. Silva 	u8 buf[];
35012b0a2e0dSRaja Mani } __packed;
35022b0a2e0dSRaja Mani 
35036f6eb1bcSSriram R struct wmi_radar_found_info {
35046f6eb1bcSSriram R 	__le32 pri_min;
35056f6eb1bcSSriram R 	__le32 pri_max;
35066f6eb1bcSSriram R 	__le32 width_min;
35076f6eb1bcSSriram R 	__le32 width_max;
35086f6eb1bcSSriram R 	__le32 sidx_min;
35096f6eb1bcSSriram R 	__le32 sidx_max;
35106f6eb1bcSSriram R } __packed;
35116f6eb1bcSSriram R 
35126f6eb1bcSSriram R enum wmi_radar_confirmation_status {
35136f6eb1bcSSriram R 	/* Detected radar was due to SW pulses */
35146f6eb1bcSSriram R 	WMI_SW_RADAR_DETECTED    = 0,
35156f6eb1bcSSriram R 
35166f6eb1bcSSriram R 	WMI_RADAR_DETECTION_FAIL = 1,
35176f6eb1bcSSriram R 
35186f6eb1bcSSriram R 	/* Real radar detected */
35196f6eb1bcSSriram R 	WMI_HW_RADAR_DETECTED    = 2,
35206f6eb1bcSSriram R };
35216f6eb1bcSSriram R 
35229702c686SJanusz Dziedzic #define PHYERR_TLV_SIG				0xBB
35239702c686SJanusz Dziedzic #define PHYERR_TLV_TAG_SEARCH_FFT_REPORT	0xFB
35249702c686SJanusz Dziedzic #define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY	0xF8
3525855aed12SSimon Wunderlich #define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT	0xF9
35269702c686SJanusz Dziedzic 
35279702c686SJanusz Dziedzic struct phyerr_radar_report {
35289702c686SJanusz Dziedzic 	__le32 reg0; /* RADAR_REPORT_REG0_* */
35290a7d88e4SMohammed Shafi Shajakhan 	__le32 reg1; /* RADAR_REPORT_REG1_* */
35309702c686SJanusz Dziedzic } __packed;
35319702c686SJanusz Dziedzic 
35329702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK		0x80000000
35339702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB		31
35349702c686SJanusz Dziedzic 
35359702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK	0x40000000
35369702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB	30
35379702c686SJanusz Dziedzic 
35389702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK		0x3FF00000
35399702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB		20
35409702c686SJanusz Dziedzic 
35419702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK		0x000F0000
35429702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB		16
35439702c686SJanusz Dziedzic 
35449702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK		0x0000FC00
35459702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB		10
35469702c686SJanusz Dziedzic 
35479702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_SIDX_MASK		0x000003FF
35489702c686SJanusz Dziedzic #define RADAR_REPORT_REG0_PULSE_SIDX_LSB		0
35499702c686SJanusz Dziedzic 
35509702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK	0x80000000
35519702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB	31
35529702c686SJanusz Dziedzic 
35539702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK	0x7F000000
35549702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB		24
35559702c686SJanusz Dziedzic 
35569702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK	0x00FF0000
35579702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB	16
35589702c686SJanusz Dziedzic 
35599702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK		0x0000FF00
35609702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB		8
35619702c686SJanusz Dziedzic 
35629702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_DUR_MASK		0x000000FF
35639702c686SJanusz Dziedzic #define RADAR_REPORT_REG1_PULSE_DUR_LSB			0
35649702c686SJanusz Dziedzic 
35659702c686SJanusz Dziedzic struct phyerr_fft_report {
35669702c686SJanusz Dziedzic 	__le32 reg0; /* SEARCH_FFT_REPORT_REG0_ * */
35679702c686SJanusz Dziedzic 	__le32 reg1; /* SEARCH_FFT_REPORT_REG1_ * */
35689702c686SJanusz Dziedzic } __packed;
35699702c686SJanusz Dziedzic 
35709702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK	0xFF800000
35719702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB	23
35729702c686SJanusz Dziedzic 
35739702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK		0x007FC000
35749702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB		14
35759702c686SJanusz Dziedzic 
35769702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK		0x00003000
35779702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB		12
35789702c686SJanusz Dziedzic 
35799702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK		0x00000FFF
35809702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB		0
35819702c686SJanusz Dziedzic 
35829702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK		0xFC000000
35839702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB		26
35849702c686SJanusz Dziedzic 
35859702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK		0x03FC0000
35869702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB		18
35879702c686SJanusz Dziedzic 
35889702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK		0x0003FF00
35899702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB		8
35909702c686SJanusz Dziedzic 
35919702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK	0x000000FF
35929702c686SJanusz Dziedzic #define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB	0
35939702c686SJanusz Dziedzic 
35949702c686SJanusz Dziedzic struct phyerr_tlv {
35959702c686SJanusz Dziedzic 	__le16 len;
35969702c686SJanusz Dziedzic 	u8 tag;
35979702c686SJanusz Dziedzic 	u8 sig;
35989702c686SJanusz Dziedzic } __packed;
35999702c686SJanusz Dziedzic 
36009702c686SJanusz Dziedzic #define DFS_RSSI_POSSIBLY_FALSE			50
36019702c686SJanusz Dziedzic #define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE	40
36029702c686SJanusz Dziedzic 
36035e3dd157SKalle Valo struct wmi_mgmt_tx_hdr {
36045e3dd157SKalle Valo 	__le32 vdev_id;
36055e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
36065e3dd157SKalle Valo 	__le32 tx_rate;
36075e3dd157SKalle Valo 	__le32 tx_power;
36085e3dd157SKalle Valo 	__le32 buf_len;
36095e3dd157SKalle Valo } __packed;
36105e3dd157SKalle Valo 
36115e3dd157SKalle Valo struct wmi_mgmt_tx_cmd {
36125e3dd157SKalle Valo 	struct wmi_mgmt_tx_hdr hdr;
3613d3ed0cf0SGustavo A. R. Silva 	u8 buf[];
36145e3dd157SKalle Valo } __packed;
36155e3dd157SKalle Valo 
36165e3dd157SKalle Valo struct wmi_echo_event {
36175e3dd157SKalle Valo 	__le32 value;
36185e3dd157SKalle Valo } __packed;
36195e3dd157SKalle Valo 
36205e3dd157SKalle Valo struct wmi_echo_cmd {
36215e3dd157SKalle Valo 	__le32 value;
36225e3dd157SKalle Valo } __packed;
36235e3dd157SKalle Valo 
36245e3dd157SKalle Valo struct wmi_pdev_set_regdomain_cmd {
36255e3dd157SKalle Valo 	__le32 reg_domain;
36265e3dd157SKalle Valo 	__le32 reg_domain_2G;
36275e3dd157SKalle Valo 	__le32 reg_domain_5G;
36285e3dd157SKalle Valo 	__le32 conformance_test_limit_2G;
36295e3dd157SKalle Valo 	__le32 conformance_test_limit_5G;
36305e3dd157SKalle Valo } __packed;
36315e3dd157SKalle Valo 
3632821af6aeSMarek Puzyniak enum wmi_dfs_region {
3633821af6aeSMarek Puzyniak 	/* Uninitialized dfs domain */
3634821af6aeSMarek Puzyniak 	WMI_UNINIT_DFS_DOMAIN = 0,
3635821af6aeSMarek Puzyniak 
3636821af6aeSMarek Puzyniak 	/* FCC3 dfs domain */
3637821af6aeSMarek Puzyniak 	WMI_FCC_DFS_DOMAIN = 1,
3638821af6aeSMarek Puzyniak 
3639821af6aeSMarek Puzyniak 	/* ETSI dfs domain */
3640821af6aeSMarek Puzyniak 	WMI_ETSI_DFS_DOMAIN = 2,
3641821af6aeSMarek Puzyniak 
3642821af6aeSMarek Puzyniak 	/*Japan dfs domain */
3643821af6aeSMarek Puzyniak 	WMI_MKK4_DFS_DOMAIN = 3,
3644821af6aeSMarek Puzyniak };
3645821af6aeSMarek Puzyniak 
3646821af6aeSMarek Puzyniak struct wmi_pdev_set_regdomain_cmd_10x {
3647821af6aeSMarek Puzyniak 	__le32 reg_domain;
3648821af6aeSMarek Puzyniak 	__le32 reg_domain_2G;
3649821af6aeSMarek Puzyniak 	__le32 reg_domain_5G;
3650821af6aeSMarek Puzyniak 	__le32 conformance_test_limit_2G;
3651821af6aeSMarek Puzyniak 	__le32 conformance_test_limit_5G;
3652821af6aeSMarek Puzyniak 
3653821af6aeSMarek Puzyniak 	/* dfs domain from wmi_dfs_region */
3654821af6aeSMarek Puzyniak 	__le32 dfs_domain;
3655821af6aeSMarek Puzyniak } __packed;
3656821af6aeSMarek Puzyniak 
36575e3dd157SKalle Valo /* Command to set/unset chip in quiet mode */
36585e3dd157SKalle Valo struct wmi_pdev_set_quiet_cmd {
36595e3dd157SKalle Valo 	/* period in TUs */
36605e3dd157SKalle Valo 	__le32 period;
36615e3dd157SKalle Valo 
36625e3dd157SKalle Valo 	/* duration in TUs */
36635e3dd157SKalle Valo 	__le32 duration;
36645e3dd157SKalle Valo 
36655e3dd157SKalle Valo 	/* offset in TUs */
36665e3dd157SKalle Valo 	__le32 next_start;
36675e3dd157SKalle Valo 
36685e3dd157SKalle Valo 	/* enable/disable */
36695e3dd157SKalle Valo 	__le32 enabled;
36705e3dd157SKalle Valo } __packed;
36715e3dd157SKalle Valo 
36725e3dd157SKalle Valo /*
36735e3dd157SKalle Valo  * 802.11g protection mode.
36745e3dd157SKalle Valo  */
36755e3dd157SKalle Valo enum ath10k_protmode {
36765e3dd157SKalle Valo 	ATH10K_PROT_NONE     = 0,    /* no protection */
36775e3dd157SKalle Valo 	ATH10K_PROT_CTSONLY  = 1,    /* CTS to self */
36785e3dd157SKalle Valo 	ATH10K_PROT_RTSCTS   = 2,    /* RTS-CTS */
36795e3dd157SKalle Valo };
36805e3dd157SKalle Valo 
3681e81bd104SMarek Kwaczynski enum wmi_rtscts_profile {
3682e81bd104SMarek Kwaczynski 	WMI_RTSCTS_FOR_NO_RATESERIES = 0,
3683e81bd104SMarek Kwaczynski 	WMI_RTSCTS_FOR_SECOND_RATESERIES,
3684e81bd104SMarek Kwaczynski 	WMI_RTSCTS_ACROSS_SW_RETRIES
3685e81bd104SMarek Kwaczynski };
3686e81bd104SMarek Kwaczynski 
3687e81bd104SMarek Kwaczynski #define WMI_RTSCTS_ENABLED		1
3688e81bd104SMarek Kwaczynski #define WMI_RTSCTS_SET_MASK		0x0f
3689e81bd104SMarek Kwaczynski #define WMI_RTSCTS_SET_LSB		0
3690e81bd104SMarek Kwaczynski 
3691e81bd104SMarek Kwaczynski #define WMI_RTSCTS_PROFILE_MASK		0xf0
3692e81bd104SMarek Kwaczynski #define WMI_RTSCTS_PROFILE_LSB		4
3693e81bd104SMarek Kwaczynski 
36945e3dd157SKalle Valo enum wmi_beacon_gen_mode {
36955e3dd157SKalle Valo 	WMI_BEACON_STAGGERED_MODE = 0,
36965e3dd157SKalle Valo 	WMI_BEACON_BURST_MODE = 1
36975e3dd157SKalle Valo };
36985e3dd157SKalle Valo 
36995e3dd157SKalle Valo enum wmi_csa_event_ies_present_flag {
37005e3dd157SKalle Valo 	WMI_CSA_IE_PRESENT = 0x00000001,
37015e3dd157SKalle Valo 	WMI_XCSA_IE_PRESENT = 0x00000002,
37025e3dd157SKalle Valo 	WMI_WBW_IE_PRESENT = 0x00000004,
37035e3dd157SKalle Valo 	WMI_CSWARP_IE_PRESENT = 0x00000008,
37045e3dd157SKalle Valo };
37055e3dd157SKalle Valo 
37065e3dd157SKalle Valo /* wmi CSA receive event from beacon frame */
37075e3dd157SKalle Valo struct wmi_csa_event {
37085e3dd157SKalle Valo 	__le32 i_fc_dur;
37095e3dd157SKalle Valo 	/* Bit 0-15: FC */
37105e3dd157SKalle Valo 	/* Bit 16-31: DUR */
37115e3dd157SKalle Valo 	struct wmi_mac_addr i_addr1;
37125e3dd157SKalle Valo 	struct wmi_mac_addr i_addr2;
37135e3dd157SKalle Valo 	__le32 csa_ie[2];
37145e3dd157SKalle Valo 	__le32 xcsa_ie[2];
37155e3dd157SKalle Valo 	__le32 wb_ie[2];
37165e3dd157SKalle Valo 	__le32 cswarp_ie;
37175e3dd157SKalle Valo 	__le32 ies_present_flag; /* wmi_csa_event_ies_present_flag */
37185e3dd157SKalle Valo } __packed;
37195e3dd157SKalle Valo 
37205e3dd157SKalle Valo /* the definition of different PDEV parameters */
37215e3dd157SKalle Valo #define PDEV_DEFAULT_STATS_UPDATE_PERIOD    500
37225e3dd157SKalle Valo #define VDEV_DEFAULT_STATS_UPDATE_PERIOD    500
37235e3dd157SKalle Valo #define PEER_DEFAULT_STATS_UPDATE_PERIOD    500
37245e3dd157SKalle Valo 
3725226a339bSBartosz Markowski struct wmi_pdev_param_map {
3726226a339bSBartosz Markowski 	u32 tx_chain_mask;
3727226a339bSBartosz Markowski 	u32 rx_chain_mask;
3728226a339bSBartosz Markowski 	u32 txpower_limit2g;
3729226a339bSBartosz Markowski 	u32 txpower_limit5g;
3730226a339bSBartosz Markowski 	u32 txpower_scale;
3731226a339bSBartosz Markowski 	u32 beacon_gen_mode;
3732226a339bSBartosz Markowski 	u32 beacon_tx_mode;
3733226a339bSBartosz Markowski 	u32 resmgr_offchan_mode;
3734226a339bSBartosz Markowski 	u32 protection_mode;
3735226a339bSBartosz Markowski 	u32 dynamic_bw;
3736226a339bSBartosz Markowski 	u32 non_agg_sw_retry_th;
3737226a339bSBartosz Markowski 	u32 agg_sw_retry_th;
3738226a339bSBartosz Markowski 	u32 sta_kickout_th;
3739226a339bSBartosz Markowski 	u32 ac_aggrsize_scaling;
3740226a339bSBartosz Markowski 	u32 ltr_enable;
3741226a339bSBartosz Markowski 	u32 ltr_ac_latency_be;
3742226a339bSBartosz Markowski 	u32 ltr_ac_latency_bk;
3743226a339bSBartosz Markowski 	u32 ltr_ac_latency_vi;
3744226a339bSBartosz Markowski 	u32 ltr_ac_latency_vo;
3745226a339bSBartosz Markowski 	u32 ltr_ac_latency_timeout;
3746226a339bSBartosz Markowski 	u32 ltr_sleep_override;
3747226a339bSBartosz Markowski 	u32 ltr_rx_override;
3748226a339bSBartosz Markowski 	u32 ltr_tx_activity_timeout;
3749226a339bSBartosz Markowski 	u32 l1ss_enable;
3750226a339bSBartosz Markowski 	u32 dsleep_enable;
3751226a339bSBartosz Markowski 	u32 pcielp_txbuf_flush;
3752226a339bSBartosz Markowski 	u32 pcielp_txbuf_watermark;
3753226a339bSBartosz Markowski 	u32 pcielp_txbuf_tmo_en;
3754226a339bSBartosz Markowski 	u32 pcielp_txbuf_tmo_value;
3755226a339bSBartosz Markowski 	u32 pdev_stats_update_period;
3756226a339bSBartosz Markowski 	u32 vdev_stats_update_period;
3757226a339bSBartosz Markowski 	u32 peer_stats_update_period;
3758226a339bSBartosz Markowski 	u32 bcnflt_stats_update_period;
3759226a339bSBartosz Markowski 	u32 pmf_qos;
3760226a339bSBartosz Markowski 	u32 arp_ac_override;
3761226a339bSBartosz Markowski 	u32 dcs;
3762226a339bSBartosz Markowski 	u32 ani_enable;
3763226a339bSBartosz Markowski 	u32 ani_poll_period;
3764226a339bSBartosz Markowski 	u32 ani_listen_period;
3765226a339bSBartosz Markowski 	u32 ani_ofdm_level;
3766226a339bSBartosz Markowski 	u32 ani_cck_level;
3767226a339bSBartosz Markowski 	u32 dyntxchain;
3768226a339bSBartosz Markowski 	u32 proxy_sta;
3769226a339bSBartosz Markowski 	u32 idle_ps_config;
3770226a339bSBartosz Markowski 	u32 power_gating_sleep;
3771226a339bSBartosz Markowski 	u32 fast_channel_reset;
3772226a339bSBartosz Markowski 	u32 burst_dur;
3773226a339bSBartosz Markowski 	u32 burst_enable;
3774a7bd3e99SPeter Oh 	u32 cal_period;
3775d86561ffSRaja Mani 	u32 aggr_burst;
3776d86561ffSRaja Mani 	u32 rx_decap_mode;
3777d86561ffSRaja Mani 	u32 smart_antenna_default_antenna;
3778d86561ffSRaja Mani 	u32 igmpmld_override;
3779d86561ffSRaja Mani 	u32 igmpmld_tid;
3780d86561ffSRaja Mani 	u32 antenna_gain;
3781d86561ffSRaja Mani 	u32 rx_filter;
3782d86561ffSRaja Mani 	u32 set_mcast_to_ucast_tid;
3783d86561ffSRaja Mani 	u32 proxy_sta_mode;
3784d86561ffSRaja Mani 	u32 set_mcast2ucast_mode;
3785d86561ffSRaja Mani 	u32 set_mcast2ucast_buffer;
3786d86561ffSRaja Mani 	u32 remove_mcast2ucast_buffer;
3787d86561ffSRaja Mani 	u32 peer_sta_ps_statechg_enable;
3788d86561ffSRaja Mani 	u32 igmpmld_ac_override;
3789d86561ffSRaja Mani 	u32 block_interbss;
3790d86561ffSRaja Mani 	u32 set_disable_reset_cmdid;
3791d86561ffSRaja Mani 	u32 set_msdu_ttl_cmdid;
3792d86561ffSRaja Mani 	u32 set_ppdu_duration_cmdid;
3793d86561ffSRaja Mani 	u32 txbf_sound_period_cmdid;
3794d86561ffSRaja Mani 	u32 set_promisc_mode_cmdid;
3795d86561ffSRaja Mani 	u32 set_burst_mode_cmdid;
3796d86561ffSRaja Mani 	u32 en_stats;
3797d86561ffSRaja Mani 	u32 mu_group_policy;
3798d86561ffSRaja Mani 	u32 noise_detection;
3799d86561ffSRaja Mani 	u32 noise_threshold;
3800d86561ffSRaja Mani 	u32 dpd_enable;
3801d86561ffSRaja Mani 	u32 set_mcast_bcast_echo;
3802d86561ffSRaja Mani 	u32 atf_strict_sch;
3803d86561ffSRaja Mani 	u32 atf_sched_duration;
3804d86561ffSRaja Mani 	u32 ant_plzn;
3805d86561ffSRaja Mani 	u32 mgmt_retry_limit;
3806d86561ffSRaja Mani 	u32 sensitivity_level;
3807d86561ffSRaja Mani 	u32 signed_txpower_2g;
3808d86561ffSRaja Mani 	u32 signed_txpower_5g;
3809d86561ffSRaja Mani 	u32 enable_per_tid_amsdu;
3810d86561ffSRaja Mani 	u32 enable_per_tid_ampdu;
3811d86561ffSRaja Mani 	u32 cca_threshold;
3812d86561ffSRaja Mani 	u32 rts_fixed_rate;
3813d86561ffSRaja Mani 	u32 pdev_reset;
3814d86561ffSRaja Mani 	u32 wapi_mbssid_offset;
3815d86561ffSRaja Mani 	u32 arp_srcaddr;
3816d86561ffSRaja Mani 	u32 arp_dstaddr;
381739136248SRajkumar Manoharan 	u32 enable_btcoex;
38181382993fSWen Gong 	u32 rfkill_config;
38191382993fSWen Gong 	u32 rfkill_enable;
38202289bef2SWen Gong 	u32 peer_stats_info_enable;
3821226a339bSBartosz Markowski };
3822226a339bSBartosz Markowski 
3823226a339bSBartosz Markowski #define WMI_PDEV_PARAM_UNSUPPORTED 0
3824226a339bSBartosz Markowski 
38255e3dd157SKalle Valo enum wmi_pdev_param {
3826d0e0a552SBen Greear 	/* TX chain mask */
38275e3dd157SKalle Valo 	WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3828d0e0a552SBen Greear 	/* RX chain mask */
38295e3dd157SKalle Valo 	WMI_PDEV_PARAM_RX_CHAIN_MASK,
38305e3dd157SKalle Valo 	/* TX power limit for 2G Radio */
38315e3dd157SKalle Valo 	WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
38325e3dd157SKalle Valo 	/* TX power limit for 5G Radio */
38335e3dd157SKalle Valo 	WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
38345e3dd157SKalle Valo 	/* TX power scale */
38355e3dd157SKalle Valo 	WMI_PDEV_PARAM_TXPOWER_SCALE,
38365e3dd157SKalle Valo 	/* Beacon generation mode . 0: host, 1: target   */
38375e3dd157SKalle Valo 	WMI_PDEV_PARAM_BEACON_GEN_MODE,
38385e3dd157SKalle Valo 	/* Beacon generation mode . 0: staggered 1: bursted   */
38395e3dd157SKalle Valo 	WMI_PDEV_PARAM_BEACON_TX_MODE,
38405e3dd157SKalle Valo 	/*
38415e3dd157SKalle Valo 	 * Resource manager off chan mode .
38425e3dd157SKalle Valo 	 * 0: turn off offchan mode. 1: turn on offchan mode
38435e3dd157SKalle Valo 	 */
38445e3dd157SKalle Valo 	WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
38455e3dd157SKalle Valo 	/*
38465e3dd157SKalle Valo 	 * Protection mode:
38475e3dd157SKalle Valo 	 * 0: no protection 1:use CTS-to-self 2: use RTS/CTS
38485e3dd157SKalle Valo 	 */
38495e3dd157SKalle Valo 	WMI_PDEV_PARAM_PROTECTION_MODE,
3850c4dd0d01SMichal Kazior 	/*
3851c4dd0d01SMichal Kazior 	 * Dynamic bandwidth - 0: disable, 1: enable
3852c4dd0d01SMichal Kazior 	 *
3853c4dd0d01SMichal Kazior 	 * When enabled HW rate control tries different bandwidths when
3854c4dd0d01SMichal Kazior 	 * retransmitting frames.
3855c4dd0d01SMichal Kazior 	 */
38565e3dd157SKalle Valo 	WMI_PDEV_PARAM_DYNAMIC_BW,
3857*3ced3904SJeff Johnson 	/* Non aggregate/ 11g sw retry threshold.0-disable */
38585e3dd157SKalle Valo 	WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3859*3ced3904SJeff Johnson 	/* aggregate sw retry threshold. 0-disable*/
38605e3dd157SKalle Valo 	WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
38615e3dd157SKalle Valo 	/* Station kickout threshold (non of consecutive failures).0-disable */
38625e3dd157SKalle Valo 	WMI_PDEV_PARAM_STA_KICKOUT_TH,
38635e3dd157SKalle Valo 	/* Aggerate size scaling configuration per AC */
38645e3dd157SKalle Valo 	WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
38655e3dd157SKalle Valo 	/* LTR enable */
38665e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_ENABLE,
38675e3dd157SKalle Valo 	/* LTR latency for BE, in us */
38685e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
38695e3dd157SKalle Valo 	/* LTR latency for BK, in us */
38705e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
38715e3dd157SKalle Valo 	/* LTR latency for VI, in us */
38725e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
38735e3dd157SKalle Valo 	/* LTR latency for VO, in us  */
38745e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
38755e3dd157SKalle Valo 	/* LTR AC latency timeout, in ms */
38765e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
38775e3dd157SKalle Valo 	/* LTR platform latency override, in us */
38785e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
38795e3dd157SKalle Valo 	/* LTR-RX override, in us */
38805e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
38815e3dd157SKalle Valo 	/* Tx activity timeout for LTR, in us */
38825e3dd157SKalle Valo 	WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
38835e3dd157SKalle Valo 	/* L1SS state machine enable */
38845e3dd157SKalle Valo 	WMI_PDEV_PARAM_L1SS_ENABLE,
38855e3dd157SKalle Valo 	/* Deep sleep state machine enable */
38865e3dd157SKalle Valo 	WMI_PDEV_PARAM_DSLEEP_ENABLE,
38875e3dd157SKalle Valo 	/* RX buffering flush enable */
38885e3dd157SKalle Valo 	WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
38895e3dd157SKalle Valo 	/* RX buffering matermark */
38905e3dd157SKalle Valo 	WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
38915e3dd157SKalle Valo 	/* RX buffering timeout enable */
38925e3dd157SKalle Valo 	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
38935e3dd157SKalle Valo 	/* RX buffering timeout value */
38945e3dd157SKalle Valo 	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
38955e3dd157SKalle Valo 	/* pdev level stats update period in ms */
38965e3dd157SKalle Valo 	WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
38975e3dd157SKalle Valo 	/* vdev level stats update period in ms */
38985e3dd157SKalle Valo 	WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
38995e3dd157SKalle Valo 	/* peer level stats update period in ms */
39005e3dd157SKalle Valo 	WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
39015e3dd157SKalle Valo 	/* beacon filter status update period */
39025e3dd157SKalle Valo 	WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
39035e3dd157SKalle Valo 	/* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */
39045e3dd157SKalle Valo 	WMI_PDEV_PARAM_PMF_QOS,
39055e3dd157SKalle Valo 	/* Access category on which ARP frames are sent */
39065e3dd157SKalle Valo 	WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
39075e3dd157SKalle Valo 	/* DCS configuration */
39085e3dd157SKalle Valo 	WMI_PDEV_PARAM_DCS,
39095e3dd157SKalle Valo 	/* Enable/Disable ANI on target */
39105e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_ENABLE,
39115e3dd157SKalle Valo 	/* configure the ANI polling period */
39125e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_POLL_PERIOD,
39135e3dd157SKalle Valo 	/* configure the ANI listening period */
39145e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
39155e3dd157SKalle Valo 	/* configure OFDM immunity level */
39165e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
39175e3dd157SKalle Valo 	/* configure CCK immunity level */
39185e3dd157SKalle Valo 	WMI_PDEV_PARAM_ANI_CCK_LEVEL,
39195e3dd157SKalle Valo 	/* Enable/Disable CDD for 1x1 STAs in rate control module */
39205e3dd157SKalle Valo 	WMI_PDEV_PARAM_DYNTXCHAIN,
39215e3dd157SKalle Valo 	/* Enable/Disable proxy STA */
39225e3dd157SKalle Valo 	WMI_PDEV_PARAM_PROXY_STA,
39235e3dd157SKalle Valo 	/* Enable/Disable low power state when all VDEVs are inactive/idle. */
39245e3dd157SKalle Valo 	WMI_PDEV_PARAM_IDLE_PS_CONFIG,
39255e3dd157SKalle Valo 	/* Enable/Disable power gating sleep */
39265e3dd157SKalle Valo 	WMI_PDEV_PARAM_POWER_GATING_SLEEP,
39275e3dd157SKalle Valo };
39285e3dd157SKalle Valo 
3929226a339bSBartosz Markowski enum wmi_10x_pdev_param {
3930226a339bSBartosz Markowski 	/* TX chian mask */
3931226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3932226a339bSBartosz Markowski 	/* RX chian mask */
3933226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
3934226a339bSBartosz Markowski 	/* TX power limit for 2G Radio */
3935226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
3936226a339bSBartosz Markowski 	/* TX power limit for 5G Radio */
3937226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
3938226a339bSBartosz Markowski 	/* TX power scale */
3939226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
3940226a339bSBartosz Markowski 	/* Beacon generation mode . 0: host, 1: target   */
3941226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
3942226a339bSBartosz Markowski 	/* Beacon generation mode . 0: staggered 1: bursted   */
3943226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
3944226a339bSBartosz Markowski 	/*
3945226a339bSBartosz Markowski 	 * Resource manager off chan mode .
3946226a339bSBartosz Markowski 	 * 0: turn off offchan mode. 1: turn on offchan mode
3947226a339bSBartosz Markowski 	 */
3948226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3949226a339bSBartosz Markowski 	/*
3950226a339bSBartosz Markowski 	 * Protection mode:
3951226a339bSBartosz Markowski 	 * 0: no protection 1:use CTS-to-self 2: use RTS/CTS
3952226a339bSBartosz Markowski 	 */
3953226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_PROTECTION_MODE,
3954226a339bSBartosz Markowski 	/* Dynamic bandwidth 0: disable 1: enable */
3955226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_DYNAMIC_BW,
3956*3ced3904SJeff Johnson 	/* Non aggregate/ 11g sw retry threshold.0-disable */
3957226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3958*3ced3904SJeff Johnson 	/* aggregate sw retry threshold. 0-disable*/
3959226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
3960226a339bSBartosz Markowski 	/* Station kickout threshold (non of consecutive failures).0-disable */
3961226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
3962226a339bSBartosz Markowski 	/* Aggerate size scaling configuration per AC */
3963226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3964226a339bSBartosz Markowski 	/* LTR enable */
3965226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_ENABLE,
3966226a339bSBartosz Markowski 	/* LTR latency for BE, in us */
3967226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
3968226a339bSBartosz Markowski 	/* LTR latency for BK, in us */
3969226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
3970226a339bSBartosz Markowski 	/* LTR latency for VI, in us */
3971226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
3972226a339bSBartosz Markowski 	/* LTR latency for VO, in us  */
3973226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
3974226a339bSBartosz Markowski 	/* LTR AC latency timeout, in ms */
3975226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3976226a339bSBartosz Markowski 	/* LTR platform latency override, in us */
3977226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3978226a339bSBartosz Markowski 	/* LTR-RX override, in us */
3979226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
3980226a339bSBartosz Markowski 	/* Tx activity timeout for LTR, in us */
3981226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3982226a339bSBartosz Markowski 	/* L1SS state machine enable */
3983226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_L1SS_ENABLE,
3984226a339bSBartosz Markowski 	/* Deep sleep state machine enable */
3985226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
3986226a339bSBartosz Markowski 	/* pdev level stats update period in ms */
3987226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3988226a339bSBartosz Markowski 	/* vdev level stats update period in ms */
3989226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3990226a339bSBartosz Markowski 	/* peer level stats update period in ms */
3991226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3992226a339bSBartosz Markowski 	/* beacon filter status update period */
3993226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3994226a339bSBartosz Markowski 	/* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */
3995226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_PMF_QOS,
3996226a339bSBartosz Markowski 	/* Access category on which ARP and DHCP frames are sent */
3997226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
3998226a339bSBartosz Markowski 	/* DCS configuration */
3999226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_DCS,
4000226a339bSBartosz Markowski 	/* Enable/Disable ANI on target */
4001226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_ENABLE,
4002226a339bSBartosz Markowski 	/* configure the ANI polling period */
4003226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
4004226a339bSBartosz Markowski 	/* configure the ANI listening period */
4005226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
4006226a339bSBartosz Markowski 	/* configure OFDM immunity level */
4007226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
4008226a339bSBartosz Markowski 	/* configure CCK immunity level */
4009226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
4010226a339bSBartosz Markowski 	/* Enable/Disable CDD for 1x1 STAs in rate control module */
4011226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_DYNTXCHAIN,
4012226a339bSBartosz Markowski 	/* Enable/Disable Fast channel reset*/
4013226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
4014226a339bSBartosz Markowski 	/* Set Bursting DUR */
4015226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BURST_DUR,
4016226a339bSBartosz Markowski 	/* Set Bursting Enable*/
4017226a339bSBartosz Markowski 	WMI_10X_PDEV_PARAM_BURST_ENABLE,
401824c88f78SMichal Kazior 
401924c88f78SMichal Kazior 	/* following are available as of firmware 10.2 */
402024c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
402124c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE,
402224c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_IGMPMLD_TID,
402324c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_ANTENNA_GAIN,
402424c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_RX_DECAP_MODE,
402524c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_RX_FILTER,
402624c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID,
402724c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_PROXY_STA_MODE,
402824c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE,
402924c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
403024c88f78SMichal Kazior 	WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
4031b43bf97eSPeter Oh 	WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
4032b43bf97eSPeter Oh 	WMI_10X_PDEV_PARAM_RTS_FIXED_RATE,
4033db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_CAL_PERIOD,
4034db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_ATF_STRICT_SCH,
4035db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_ATF_SCHED_DURATION,
4036db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
4037db251d7dSMaharaja Kennadyrajan 	WMI_10X_PDEV_PARAM_PDEV_RESET
4038226a339bSBartosz Markowski };
4039226a339bSBartosz Markowski 
4040d86561ffSRaja Mani enum wmi_10_4_pdev_param {
4041d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
4042d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
4043d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
4044d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
4045d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
4046d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
4047d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
4048d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
4049d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
4050d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
4051d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
4052d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
4053d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
4054d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
4055d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_ENABLE,
4056d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
4057d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
4058d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
4059d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
4060d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
4061d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
4062d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
4063d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
4064d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
4065d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
4066d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
4067d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
4068d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
4069d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
4070d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
4071d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
4072d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
4073d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
4074d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PMF_QOS,
4075d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
4076d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DCS,
4077d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_ENABLE,
4078d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
4079d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
4080d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
4081d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
4082d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
4083d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PROXY_STA,
4084d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
4085d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
4086d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_AGGR_BURST,
4087d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
4088d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
4089d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BURST_DUR,
4090d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BURST_ENABLE,
4091d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
4092d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
4093d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
4094d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
4095d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RX_FILTER,
4096d86561ffSRaja Mani 	WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
4097d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
4098d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
4099d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
4100d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
4101d86561ffSRaja Mani 	WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
4102d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
4103d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
4104d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
4105d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
4106d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
4107d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
4108d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
4109d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
4110d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_EN_STATS,
4111d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
4112d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
4113d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
4114d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_DPD_ENABLE,
4115d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
4116d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
4117d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
4118d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ANT_PLZN,
4119d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
4120d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
4121d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
4122d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
4123d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
4124d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
4125d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
4126d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
4127d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_CAL_PERIOD,
4128d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_PDEV_RESET,
4129d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
4130d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
4131d86561ffSRaja Mani 	WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
413252e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_TXPOWER_DECR_DB,
413352e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_RX_BATCHMODE,
413452e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_PACKET_AGGR_DELAY,
413552e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
413652e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
413752e8ce13SVasanthakumar Thiagarajan 	WMI_10_4_PDEV_PARAM_CUST_TXPOWER_SCALE,
413839136248SRajkumar Manoharan 	WMI_10_4_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
413939136248SRajkumar Manoharan 	WMI_10_4_PDEV_PARAM_ATF_SSID_GROUP_POLICY,
414039136248SRajkumar Manoharan 	WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
4141d86561ffSRaja Mani };
4142d86561ffSRaja Mani 
41435e3dd157SKalle Valo struct wmi_pdev_set_param_cmd {
41445e3dd157SKalle Valo 	__le32 param_id;
41455e3dd157SKalle Valo 	__le32 param_value;
41465e3dd157SKalle Valo } __packed;
41475e3dd157SKalle Valo 
414805e7ba24SChristian Lamparter struct wmi_pdev_set_base_macaddr_cmd {
414905e7ba24SChristian Lamparter 	struct wmi_mac_addr mac_addr;
415005e7ba24SChristian Lamparter } __packed;
415105e7ba24SChristian Lamparter 
4152a7bd3e99SPeter Oh /* valid period is 1 ~ 60000ms, unit in millisecond */
4153a7bd3e99SPeter Oh #define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000
4154a7bd3e99SPeter Oh 
41555e3dd157SKalle Valo struct wmi_pdev_get_tpc_config_cmd {
41565e3dd157SKalle Valo 	/* parameter   */
41575e3dd157SKalle Valo 	__le32 param;
41585e3dd157SKalle Valo } __packed;
41595e3dd157SKalle Valo 
416029542666SMaharaja Kennadyrajan #define WMI_TPC_CONFIG_PARAM		1
4161bc64d052SMaharaja Kennadyrajan #define WMI_TPC_FINAL_RATE_MAX		240
41625e3dd157SKalle Valo #define WMI_TPC_TX_N_CHAIN		4
41634b190675STamizh Chelvam #define WMI_TPC_RATE_MAX               (WMI_TPC_TX_N_CHAIN * 65)
416429542666SMaharaja Kennadyrajan #define WMI_TPC_PREAM_TABLE_MAX		10
416529542666SMaharaja Kennadyrajan #define WMI_TPC_FLAG			3
416629542666SMaharaja Kennadyrajan #define WMI_TPC_BUF_SIZE		10
4167bc64d052SMaharaja Kennadyrajan #define WMI_TPC_BEAMFORMING		2
416829542666SMaharaja Kennadyrajan 
416929542666SMaharaja Kennadyrajan enum wmi_tpc_table_type {
417029542666SMaharaja Kennadyrajan 	WMI_TPC_TABLE_TYPE_CDD = 0,
417129542666SMaharaja Kennadyrajan 	WMI_TPC_TABLE_TYPE_STBC = 1,
417229542666SMaharaja Kennadyrajan 	WMI_TPC_TABLE_TYPE_TXBF = 2,
417329542666SMaharaja Kennadyrajan };
41745e3dd157SKalle Valo 
41755e3dd157SKalle Valo enum wmi_tpc_config_event_flag {
41765e3dd157SKalle Valo 	WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD	= 0x1,
41775e3dd157SKalle Valo 	WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC	= 0x2,
41785e3dd157SKalle Valo 	WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF	= 0x4,
41795e3dd157SKalle Valo };
41805e3dd157SKalle Valo 
41815e3dd157SKalle Valo struct wmi_pdev_tpc_config_event {
41825e3dd157SKalle Valo 	__le32 reg_domain;
41835e3dd157SKalle Valo 	__le32 chan_freq;
41845e3dd157SKalle Valo 	__le32 phy_mode;
41855e3dd157SKalle Valo 	__le32 twice_antenna_reduction;
41865e3dd157SKalle Valo 	__le32 twice_max_rd_power;
41873b8fc902SKalle Valo 	a_sle32 twice_antenna_gain;
41885e3dd157SKalle Valo 	__le32 power_limit;
41895e3dd157SKalle Valo 	__le32 rate_max;
41905e3dd157SKalle Valo 	__le32 num_tx_chain;
41915e3dd157SKalle Valo 	__le32 ctl;
41925e3dd157SKalle Valo 	__le32 flags;
41935e3dd157SKalle Valo 	s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
41945e3dd157SKalle Valo 	s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
41955e3dd157SKalle Valo 	s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
41965e3dd157SKalle Valo 	s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
41975e3dd157SKalle Valo 	u8 rates_array[WMI_TPC_RATE_MAX];
41985e3dd157SKalle Valo } __packed;
41995e3dd157SKalle Valo 
42005e3dd157SKalle Valo /* Transmit power scale factor. */
42015e3dd157SKalle Valo enum wmi_tp_scale {
42025e3dd157SKalle Valo 	WMI_TP_SCALE_MAX    = 0,	/* no scaling (default) */
42035e3dd157SKalle Valo 	WMI_TP_SCALE_50     = 1,	/* 50% of max (-3 dBm) */
42045e3dd157SKalle Valo 	WMI_TP_SCALE_25     = 2,	/* 25% of max (-6 dBm) */
42055e3dd157SKalle Valo 	WMI_TP_SCALE_12     = 3,	/* 12% of max (-9 dBm) */
42065e3dd157SKalle Valo 	WMI_TP_SCALE_MIN    = 4,	/* min, but still on   */
42075e3dd157SKalle Valo 	WMI_TP_SCALE_SIZE   = 5,	/* max num of enum     */
42085e3dd157SKalle Valo };
42095e3dd157SKalle Valo 
4210bc64d052SMaharaja Kennadyrajan struct wmi_pdev_tpc_final_table_event {
4211bc64d052SMaharaja Kennadyrajan 	__le32 reg_domain;
4212bc64d052SMaharaja Kennadyrajan 	__le32 chan_freq;
4213bc64d052SMaharaja Kennadyrajan 	__le32 phy_mode;
4214bc64d052SMaharaja Kennadyrajan 	__le32 twice_antenna_reduction;
4215bc64d052SMaharaja Kennadyrajan 	__le32 twice_max_rd_power;
4216bc64d052SMaharaja Kennadyrajan 	a_sle32 twice_antenna_gain;
4217bc64d052SMaharaja Kennadyrajan 	__le32 power_limit;
4218bc64d052SMaharaja Kennadyrajan 	__le32 rate_max;
4219bc64d052SMaharaja Kennadyrajan 	__le32 num_tx_chain;
4220bc64d052SMaharaja Kennadyrajan 	__le32 ctl;
4221bc64d052SMaharaja Kennadyrajan 	__le32 flags;
4222bc64d052SMaharaja Kennadyrajan 	s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
4223bc64d052SMaharaja Kennadyrajan 	s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4224bc64d052SMaharaja Kennadyrajan 	s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4225bc64d052SMaharaja Kennadyrajan 	s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4226bc64d052SMaharaja Kennadyrajan 	u8 rates_array[WMI_TPC_FINAL_RATE_MAX];
4227bc64d052SMaharaja Kennadyrajan 	u8 ctl_power_table[WMI_TPC_BEAMFORMING][WMI_TPC_TX_N_CHAIN]
4228bc64d052SMaharaja Kennadyrajan 	   [WMI_TPC_TX_N_CHAIN];
4229bc64d052SMaharaja Kennadyrajan } __packed;
4230bc64d052SMaharaja Kennadyrajan 
4231bc64d052SMaharaja Kennadyrajan struct wmi_pdev_get_tpc_table_cmd {
4232bc64d052SMaharaja Kennadyrajan 	__le32 param;
4233bc64d052SMaharaja Kennadyrajan } __packed;
4234bc64d052SMaharaja Kennadyrajan 
4235bc64d052SMaharaja Kennadyrajan enum wmi_tpc_pream_2ghz {
4236bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_CCK = 0,
4237bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_OFDM,
4238bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_HT20,
4239bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_HT40,
4240bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_VHT20,
4241bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_VHT40,
4242bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_2GHZ_VHT80,
4243bc64d052SMaharaja Kennadyrajan };
4244bc64d052SMaharaja Kennadyrajan 
4245bc64d052SMaharaja Kennadyrajan enum wmi_tpc_pream_5ghz {
4246bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_OFDM = 1,
4247bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_HT20,
4248bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_HT40,
4249bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_VHT20,
4250bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_VHT40,
4251bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_VHT80,
4252bc64d052SMaharaja Kennadyrajan 	WMI_TPC_PREAM_5GHZ_HTCUP,
4253bc64d052SMaharaja Kennadyrajan };
4254bc64d052SMaharaja Kennadyrajan 
4255d70c0d46SMaharaja Kennadyrajan #define	WMI_PEER_PS_STATE_DISABLED	2
4256d70c0d46SMaharaja Kennadyrajan 
4257d70c0d46SMaharaja Kennadyrajan struct wmi_peer_sta_ps_state_chg_event {
4258d70c0d46SMaharaja Kennadyrajan 	struct wmi_mac_addr peer_macaddr;
4259d70c0d46SMaharaja Kennadyrajan 	__le32 peer_ps_state;
4260d70c0d46SMaharaja Kennadyrajan } __packed;
4261d70c0d46SMaharaja Kennadyrajan 
42625e3dd157SKalle Valo struct wmi_pdev_chanlist_update_event {
42635e3dd157SKalle Valo 	/* number of channels */
42645e3dd157SKalle Valo 	__le32 num_chan;
42655e3dd157SKalle Valo 	/* array of channels */
42665e3dd157SKalle Valo 	struct wmi_channel channel_list[1];
42675e3dd157SKalle Valo } __packed;
42685e3dd157SKalle Valo 
42695e3dd157SKalle Valo #define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32)
42705e3dd157SKalle Valo 
42715e3dd157SKalle Valo struct wmi_debug_mesg_event {
42725e3dd157SKalle Valo 	/* message buffer, NULL terminated */
42735e3dd157SKalle Valo 	char bufp[WMI_MAX_DEBUG_MESG];
42745e3dd157SKalle Valo } __packed;
42755e3dd157SKalle Valo 
42765e3dd157SKalle Valo enum {
42775e3dd157SKalle Valo 	/* P2P device */
42785e3dd157SKalle Valo 	VDEV_SUBTYPE_P2PDEV = 0,
42795e3dd157SKalle Valo 	/* P2P client */
42805e3dd157SKalle Valo 	VDEV_SUBTYPE_P2PCLI,
42815e3dd157SKalle Valo 	/* P2P GO */
42825e3dd157SKalle Valo 	VDEV_SUBTYPE_P2PGO,
42835e3dd157SKalle Valo 	/* BT3.0 HS */
42845e3dd157SKalle Valo 	VDEV_SUBTYPE_BT,
42855e3dd157SKalle Valo };
42865e3dd157SKalle Valo 
42875e3dd157SKalle Valo struct wmi_pdev_set_channel_cmd {
42885e3dd157SKalle Valo 	/* idnore power , only use flags , mode and freq */
42895e3dd157SKalle Valo 	struct wmi_channel chan;
42905e3dd157SKalle Valo } __packed;
42915e3dd157SKalle Valo 
429290174455SRajkumar Manoharan struct wmi_pdev_pktlog_enable_cmd {
429390174455SRajkumar Manoharan 	__le32 ev_bitmap;
429490174455SRajkumar Manoharan } __packed;
429590174455SRajkumar Manoharan 
42965e3dd157SKalle Valo /* Customize the DSCP (bit) to TID (0-7) mapping for QOS */
42975e3dd157SKalle Valo #define WMI_DSCP_MAP_MAX    (64)
42985e3dd157SKalle Valo struct wmi_pdev_set_dscp_tid_map_cmd {
42995e3dd157SKalle Valo 	/* map indicating DSCP to TID conversion */
43005e3dd157SKalle Valo 	__le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
43015e3dd157SKalle Valo } __packed;
43025e3dd157SKalle Valo 
43035e3dd157SKalle Valo enum mcast_bcast_rate_id {
43045e3dd157SKalle Valo 	WMI_SET_MCAST_RATE,
43055e3dd157SKalle Valo 	WMI_SET_BCAST_RATE
43065e3dd157SKalle Valo };
43075e3dd157SKalle Valo 
43085e3dd157SKalle Valo struct mcast_bcast_rate {
43095e3dd157SKalle Valo 	enum mcast_bcast_rate_id rate_id;
43105e3dd157SKalle Valo 	__le32 rate;
43115e3dd157SKalle Valo } __packed;
43125e3dd157SKalle Valo 
43135e3dd157SKalle Valo struct wmi_wmm_params {
43145e3dd157SKalle Valo 	__le32 cwmin;
43155e3dd157SKalle Valo 	__le32 cwmax;
43165e3dd157SKalle Valo 	__le32 aifs;
43175e3dd157SKalle Valo 	__le32 txop;
43185e3dd157SKalle Valo 	__le32 acm;
43195e3dd157SKalle Valo 	__le32 no_ack;
43205e3dd157SKalle Valo } __packed;
43215e3dd157SKalle Valo 
43225e3dd157SKalle Valo struct wmi_pdev_set_wmm_params {
43235e3dd157SKalle Valo 	struct wmi_wmm_params ac_be;
43245e3dd157SKalle Valo 	struct wmi_wmm_params ac_bk;
43255e3dd157SKalle Valo 	struct wmi_wmm_params ac_vi;
43265e3dd157SKalle Valo 	struct wmi_wmm_params ac_vo;
43275e3dd157SKalle Valo } __packed;
43285e3dd157SKalle Valo 
43295e3dd157SKalle Valo struct wmi_wmm_params_arg {
43305e3dd157SKalle Valo 	u32 cwmin;
43315e3dd157SKalle Valo 	u32 cwmax;
43325e3dd157SKalle Valo 	u32 aifs;
43335e3dd157SKalle Valo 	u32 txop;
43345e3dd157SKalle Valo 	u32 acm;
43355e3dd157SKalle Valo 	u32 no_ack;
43365e3dd157SKalle Valo };
43375e3dd157SKalle Valo 
43385e752e42SMichal Kazior struct wmi_wmm_params_all_arg {
43395e3dd157SKalle Valo 	struct wmi_wmm_params_arg ac_be;
43405e3dd157SKalle Valo 	struct wmi_wmm_params_arg ac_bk;
43415e3dd157SKalle Valo 	struct wmi_wmm_params_arg ac_vi;
43425e3dd157SKalle Valo 	struct wmi_wmm_params_arg ac_vo;
43435e3dd157SKalle Valo };
43445e3dd157SKalle Valo 
4345b91251fbSMichal Kazior struct wmi_pdev_stats_tx {
43465e3dd157SKalle Valo 	/* Num HTT cookies queued to dispatch list */
43475e3dd157SKalle Valo 	__le32 comp_queued;
43485e3dd157SKalle Valo 
43495e3dd157SKalle Valo 	/* Num HTT cookies dispatched */
43505e3dd157SKalle Valo 	__le32 comp_delivered;
43515e3dd157SKalle Valo 
43525e3dd157SKalle Valo 	/* Num MSDU queued to WAL */
43535e3dd157SKalle Valo 	__le32 msdu_enqued;
43545e3dd157SKalle Valo 
43555e3dd157SKalle Valo 	/* Num MPDU queue to WAL */
43565e3dd157SKalle Valo 	__le32 mpdu_enqued;
43575e3dd157SKalle Valo 
43585e3dd157SKalle Valo 	/* Num MSDUs dropped by WMM limit */
43595e3dd157SKalle Valo 	__le32 wmm_drop;
43605e3dd157SKalle Valo 
43615e3dd157SKalle Valo 	/* Num Local frames queued */
43625e3dd157SKalle Valo 	__le32 local_enqued;
43635e3dd157SKalle Valo 
43645e3dd157SKalle Valo 	/* Num Local frames done */
43655e3dd157SKalle Valo 	__le32 local_freed;
43665e3dd157SKalle Valo 
43675e3dd157SKalle Valo 	/* Num queued to HW */
43685e3dd157SKalle Valo 	__le32 hw_queued;
43695e3dd157SKalle Valo 
43705e3dd157SKalle Valo 	/* Num PPDU reaped from HW */
43715e3dd157SKalle Valo 	__le32 hw_reaped;
43725e3dd157SKalle Valo 
43735e3dd157SKalle Valo 	/* Num underruns */
43745e3dd157SKalle Valo 	__le32 underrun;
43755e3dd157SKalle Valo 
43765e3dd157SKalle Valo 	/* Num PPDUs cleaned up in TX abort */
43775e3dd157SKalle Valo 	__le32 tx_abort;
43785e3dd157SKalle Valo 
437917818dfaSColin Ian King 	/* Num MPDUs requeued by SW */
438017818dfaSColin Ian King 	__le32 mpdus_requeued;
43815e3dd157SKalle Valo 
43825e3dd157SKalle Valo 	/* excessive retries */
43835e3dd157SKalle Valo 	__le32 tx_ko;
43845e3dd157SKalle Valo 
43855e3dd157SKalle Valo 	/* data hw rate code */
43865e3dd157SKalle Valo 	__le32 data_rc;
43875e3dd157SKalle Valo 
43885e3dd157SKalle Valo 	/* Scheduler self triggers */
43895e3dd157SKalle Valo 	__le32 self_triggers;
43905e3dd157SKalle Valo 
43915e3dd157SKalle Valo 	/* frames dropped due to excessive sw retries */
43925e3dd157SKalle Valo 	__le32 sw_retry_failure;
43935e3dd157SKalle Valo 
43945e3dd157SKalle Valo 	/* illegal rate phy errors  */
43955e3dd157SKalle Valo 	__le32 illgl_rate_phy_err;
43965e3dd157SKalle Valo 
4397e13dbeadSJoe Perches 	/* wal pdev continuous xretry */
43985e3dd157SKalle Valo 	__le32 pdev_cont_xretry;
43995e3dd157SKalle Valo 
4400b8a71b95SJeff Johnson 	/* wal pdev continuous xretry */
44015e3dd157SKalle Valo 	__le32 pdev_tx_timeout;
44025e3dd157SKalle Valo 
44035e3dd157SKalle Valo 	/* wal pdev resets  */
44045e3dd157SKalle Valo 	__le32 pdev_resets;
44055e3dd157SKalle Valo 
440634d714e0SBartosz Markowski 	/* frames dropped due to non-availability of stateless TIDs */
440734d714e0SBartosz Markowski 	__le32 stateless_tid_alloc_failure;
440834d714e0SBartosz Markowski 
44095e3dd157SKalle Valo 	__le32 phy_underrun;
44105e3dd157SKalle Valo 
44115e3dd157SKalle Valo 	/* MPDU is more than txop limit */
44125e3dd157SKalle Valo 	__le32 txop_ovf;
44135e3dd157SKalle Valo } __packed;
44145e3dd157SKalle Valo 
441598dd2b92SManikanta Pubbisetty struct wmi_10_4_pdev_stats_tx {
441698dd2b92SManikanta Pubbisetty 	/* Num HTT cookies queued to dispatch list */
441798dd2b92SManikanta Pubbisetty 	__le32 comp_queued;
441898dd2b92SManikanta Pubbisetty 
441998dd2b92SManikanta Pubbisetty 	/* Num HTT cookies dispatched */
442098dd2b92SManikanta Pubbisetty 	__le32 comp_delivered;
442198dd2b92SManikanta Pubbisetty 
442298dd2b92SManikanta Pubbisetty 	/* Num MSDU queued to WAL */
442398dd2b92SManikanta Pubbisetty 	__le32 msdu_enqued;
442498dd2b92SManikanta Pubbisetty 
442598dd2b92SManikanta Pubbisetty 	/* Num MPDU queue to WAL */
442698dd2b92SManikanta Pubbisetty 	__le32 mpdu_enqued;
442798dd2b92SManikanta Pubbisetty 
442898dd2b92SManikanta Pubbisetty 	/* Num MSDUs dropped by WMM limit */
442998dd2b92SManikanta Pubbisetty 	__le32 wmm_drop;
443098dd2b92SManikanta Pubbisetty 
443198dd2b92SManikanta Pubbisetty 	/* Num Local frames queued */
443298dd2b92SManikanta Pubbisetty 	__le32 local_enqued;
443398dd2b92SManikanta Pubbisetty 
443498dd2b92SManikanta Pubbisetty 	/* Num Local frames done */
443598dd2b92SManikanta Pubbisetty 	__le32 local_freed;
443698dd2b92SManikanta Pubbisetty 
443798dd2b92SManikanta Pubbisetty 	/* Num queued to HW */
443898dd2b92SManikanta Pubbisetty 	__le32 hw_queued;
443998dd2b92SManikanta Pubbisetty 
444098dd2b92SManikanta Pubbisetty 	/* Num PPDU reaped from HW */
444198dd2b92SManikanta Pubbisetty 	__le32 hw_reaped;
444298dd2b92SManikanta Pubbisetty 
444398dd2b92SManikanta Pubbisetty 	/* Num underruns */
444498dd2b92SManikanta Pubbisetty 	__le32 underrun;
444598dd2b92SManikanta Pubbisetty 
444698dd2b92SManikanta Pubbisetty 	/* HW Paused. */
444798dd2b92SManikanta Pubbisetty 	__le32  hw_paused;
444898dd2b92SManikanta Pubbisetty 
444998dd2b92SManikanta Pubbisetty 	/* Num PPDUs cleaned up in TX abort */
445098dd2b92SManikanta Pubbisetty 	__le32 tx_abort;
445198dd2b92SManikanta Pubbisetty 
445217818dfaSColin Ian King 	/* Num MPDUs requeued by SW */
445317818dfaSColin Ian King 	__le32 mpdus_requeued;
445498dd2b92SManikanta Pubbisetty 
445598dd2b92SManikanta Pubbisetty 	/* excessive retries */
445698dd2b92SManikanta Pubbisetty 	__le32 tx_ko;
445798dd2b92SManikanta Pubbisetty 
445898dd2b92SManikanta Pubbisetty 	/* data hw rate code */
445998dd2b92SManikanta Pubbisetty 	__le32 data_rc;
446098dd2b92SManikanta Pubbisetty 
446198dd2b92SManikanta Pubbisetty 	/* Scheduler self triggers */
446298dd2b92SManikanta Pubbisetty 	__le32 self_triggers;
446398dd2b92SManikanta Pubbisetty 
446498dd2b92SManikanta Pubbisetty 	/* frames dropped due to excessive sw retries */
446598dd2b92SManikanta Pubbisetty 	__le32 sw_retry_failure;
446698dd2b92SManikanta Pubbisetty 
446798dd2b92SManikanta Pubbisetty 	/* illegal rate phy errors  */
446898dd2b92SManikanta Pubbisetty 	__le32 illgl_rate_phy_err;
446998dd2b92SManikanta Pubbisetty 
447098dd2b92SManikanta Pubbisetty 	/* wal pdev continuous xretry */
447198dd2b92SManikanta Pubbisetty 	__le32 pdev_cont_xretry;
447298dd2b92SManikanta Pubbisetty 
447398dd2b92SManikanta Pubbisetty 	/* wal pdev tx timeouts */
447498dd2b92SManikanta Pubbisetty 	__le32 pdev_tx_timeout;
447598dd2b92SManikanta Pubbisetty 
447698dd2b92SManikanta Pubbisetty 	/* wal pdev resets  */
447798dd2b92SManikanta Pubbisetty 	__le32 pdev_resets;
447898dd2b92SManikanta Pubbisetty 
447998dd2b92SManikanta Pubbisetty 	/* frames dropped due to non-availability of stateless TIDs */
448098dd2b92SManikanta Pubbisetty 	__le32 stateless_tid_alloc_failure;
448198dd2b92SManikanta Pubbisetty 
448298dd2b92SManikanta Pubbisetty 	__le32 phy_underrun;
448398dd2b92SManikanta Pubbisetty 
448498dd2b92SManikanta Pubbisetty 	/* MPDU is more than txop limit */
448598dd2b92SManikanta Pubbisetty 	__le32 txop_ovf;
448698dd2b92SManikanta Pubbisetty 
448798dd2b92SManikanta Pubbisetty 	/* Number of Sequences posted */
448898dd2b92SManikanta Pubbisetty 	__le32 seq_posted;
448998dd2b92SManikanta Pubbisetty 
449098dd2b92SManikanta Pubbisetty 	/* Number of Sequences failed queueing */
449198dd2b92SManikanta Pubbisetty 	__le32 seq_failed_queueing;
449298dd2b92SManikanta Pubbisetty 
449398dd2b92SManikanta Pubbisetty 	/* Number of Sequences completed */
449498dd2b92SManikanta Pubbisetty 	__le32 seq_completed;
449598dd2b92SManikanta Pubbisetty 
449698dd2b92SManikanta Pubbisetty 	/* Number of Sequences restarted */
449798dd2b92SManikanta Pubbisetty 	__le32 seq_restarted;
449898dd2b92SManikanta Pubbisetty 
449998dd2b92SManikanta Pubbisetty 	/* Number of MU Sequences posted */
450098dd2b92SManikanta Pubbisetty 	__le32 mu_seq_posted;
450198dd2b92SManikanta Pubbisetty 
450298dd2b92SManikanta Pubbisetty 	/* Num MPDUs flushed by SW, HWPAUSED,SW TXABORT(Reset,channel change) */
450398dd2b92SManikanta Pubbisetty 	__le32 mpdus_sw_flush;
450498dd2b92SManikanta Pubbisetty 
450598dd2b92SManikanta Pubbisetty 	/* Num MPDUs filtered by HW, all filter condition (TTL expired) */
450698dd2b92SManikanta Pubbisetty 	__le32 mpdus_hw_filter;
450798dd2b92SManikanta Pubbisetty 
450898dd2b92SManikanta Pubbisetty 	/* Num MPDUs truncated by PDG
450998dd2b92SManikanta Pubbisetty 	 * (TXOP, TBTT, PPDU_duration based on rate, dyn_bw)
451098dd2b92SManikanta Pubbisetty 	 */
451198dd2b92SManikanta Pubbisetty 	__le32 mpdus_truncated;
451298dd2b92SManikanta Pubbisetty 
451398dd2b92SManikanta Pubbisetty 	/* Num MPDUs that was tried but didn't receive ACK or BA */
451498dd2b92SManikanta Pubbisetty 	__le32 mpdus_ack_failed;
451598dd2b92SManikanta Pubbisetty 
451698dd2b92SManikanta Pubbisetty 	/* Num MPDUs that was dropped due to expiry. */
451798dd2b92SManikanta Pubbisetty 	__le32 mpdus_expired;
451898dd2b92SManikanta Pubbisetty } __packed;
451998dd2b92SManikanta Pubbisetty 
4520b91251fbSMichal Kazior struct wmi_pdev_stats_rx {
45215e3dd157SKalle Valo 	/* Cnts any change in ring routing mid-ppdu */
45225e3dd157SKalle Valo 	__le32 mid_ppdu_route_change;
45235e3dd157SKalle Valo 
45245e3dd157SKalle Valo 	/* Total number of statuses processed */
45255e3dd157SKalle Valo 	__le32 status_rcvd;
45265e3dd157SKalle Valo 
45275e3dd157SKalle Valo 	/* Extra frags on rings 0-3 */
45285e3dd157SKalle Valo 	__le32 r0_frags;
45295e3dd157SKalle Valo 	__le32 r1_frags;
45305e3dd157SKalle Valo 	__le32 r2_frags;
45315e3dd157SKalle Valo 	__le32 r3_frags;
45325e3dd157SKalle Valo 
45335e3dd157SKalle Valo 	/* MSDUs / MPDUs delivered to HTT */
45345e3dd157SKalle Valo 	__le32 htt_msdus;
45355e3dd157SKalle Valo 	__le32 htt_mpdus;
45365e3dd157SKalle Valo 
45375e3dd157SKalle Valo 	/* MSDUs / MPDUs delivered to local stack */
45385e3dd157SKalle Valo 	__le32 loc_msdus;
45395e3dd157SKalle Valo 	__le32 loc_mpdus;
45405e3dd157SKalle Valo 
45415e3dd157SKalle Valo 	/* AMSDUs that have more MSDUs than the status ring size */
45425e3dd157SKalle Valo 	__le32 oversize_amsdu;
45435e3dd157SKalle Valo 
45445e3dd157SKalle Valo 	/* Number of PHY errors */
45455e3dd157SKalle Valo 	__le32 phy_errs;
45465e3dd157SKalle Valo 
45475e3dd157SKalle Valo 	/* Number of PHY errors drops */
45485e3dd157SKalle Valo 	__le32 phy_err_drop;
45495e3dd157SKalle Valo 
45505e3dd157SKalle Valo 	/* Number of mpdu errors - FCS, MIC, ENC etc. */
45515e3dd157SKalle Valo 	__le32 mpdu_errs;
45525e3dd157SKalle Valo } __packed;
45535e3dd157SKalle Valo 
4554b91251fbSMichal Kazior struct wmi_pdev_stats_peer {
45555e3dd157SKalle Valo 	/* REMOVE THIS ONCE REAL PEER STAT COUNTERS ARE ADDED */
45565e3dd157SKalle Valo 	__le32 dummy;
45575e3dd157SKalle Valo } __packed;
45585e3dd157SKalle Valo 
45595e3dd157SKalle Valo enum wmi_stats_id {
4560eed55411SMichal Kazior 	WMI_STAT_PEER = BIT(0),
4561eed55411SMichal Kazior 	WMI_STAT_AP = BIT(1),
4562eed55411SMichal Kazior 	WMI_STAT_PDEV = BIT(2),
4563eed55411SMichal Kazior 	WMI_STAT_VDEV = BIT(3),
4564eed55411SMichal Kazior 	WMI_STAT_BCNFLT = BIT(4),
4565eed55411SMichal Kazior 	WMI_STAT_VDEV_RATE = BIT(5),
45665e3dd157SKalle Valo };
45675e3dd157SKalle Valo 
4568f9575793SMohammed Shafi Shajakhan enum wmi_10_4_stats_id {
4569f9575793SMohammed Shafi Shajakhan 	WMI_10_4_STAT_PEER		= BIT(0),
4570f9575793SMohammed Shafi Shajakhan 	WMI_10_4_STAT_AP		= BIT(1),
4571f9575793SMohammed Shafi Shajakhan 	WMI_10_4_STAT_INST		= BIT(2),
4572f9575793SMohammed Shafi Shajakhan 	WMI_10_4_STAT_PEER_EXTD		= BIT(3),
45731b3fdb50SRajkumar Manoharan 	WMI_10_4_STAT_VDEV_EXTD		= BIT(4),
4574f9575793SMohammed Shafi Shajakhan };
4575f9575793SMohammed Shafi Shajakhan 
4576f40a307eSSurabhi Vishnoi enum wmi_tlv_stats_id {
45779280f4fcSSurabhi Vishnoi 	WMI_TLV_STAT_PEER	= BIT(0),
45789280f4fcSSurabhi Vishnoi 	WMI_TLV_STAT_AP		= BIT(1),
45799280f4fcSSurabhi Vishnoi 	WMI_TLV_STAT_PDEV	= BIT(2),
45809280f4fcSSurabhi Vishnoi 	WMI_TLV_STAT_VDEV	= BIT(3),
4581f40a307eSSurabhi Vishnoi 	WMI_TLV_STAT_PEER_EXTD  = BIT(10),
4582f40a307eSSurabhi Vishnoi };
4583f40a307eSSurabhi Vishnoi 
4584db9cdda6SBen Greear struct wlan_inst_rssi_args {
4585db9cdda6SBen Greear 	__le16 cfg_retry_count;
4586db9cdda6SBen Greear 	__le16 retry_count;
4587db9cdda6SBen Greear };
4588db9cdda6SBen Greear 
45895e3dd157SKalle Valo struct wmi_request_stats_cmd {
45905e3dd157SKalle Valo 	__le32 stats_id;
45915e3dd157SKalle Valo 
4592db9cdda6SBen Greear 	__le32 vdev_id;
4593db9cdda6SBen Greear 
4594db9cdda6SBen Greear 	/* peer MAC address */
4595db9cdda6SBen Greear 	struct wmi_mac_addr peer_macaddr;
4596db9cdda6SBen Greear 
4597db9cdda6SBen Greear 	/* Instantaneous RSSI arguments */
4598db9cdda6SBen Greear 	struct wlan_inst_rssi_args inst_rssi_args;
45995e3dd157SKalle Valo } __packed;
46005e3dd157SKalle Valo 
46010f7cb268SWen Gong enum wmi_peer_stats_info_request_type {
46020f7cb268SWen Gong 	/* request stats of one specified peer */
46030f7cb268SWen Gong 	WMI_REQUEST_ONE_PEER_STATS_INFO = 0x01,
46040f7cb268SWen Gong 	/* request stats of all peers belong to specified VDEV */
46050f7cb268SWen Gong 	WMI_REQUEST_VDEV_ALL_PEER_STATS_INFO = 0x02,
46060f7cb268SWen Gong };
46070f7cb268SWen Gong 
46085e3dd157SKalle Valo /* Suspend option */
46095e3dd157SKalle Valo enum {
46105e3dd157SKalle Valo 	/* suspend */
46115e3dd157SKalle Valo 	WMI_PDEV_SUSPEND,
46125e3dd157SKalle Valo 
46135e3dd157SKalle Valo 	/* suspend and disable all interrupts */
46145e3dd157SKalle Valo 	WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
46155e3dd157SKalle Valo };
46165e3dd157SKalle Valo 
46175e3dd157SKalle Valo struct wmi_pdev_suspend_cmd {
46185e3dd157SKalle Valo 	/* suspend option sent to target */
46195e3dd157SKalle Valo 	__le32 suspend_opt;
46205e3dd157SKalle Valo } __packed;
46215e3dd157SKalle Valo 
46225e3dd157SKalle Valo struct wmi_stats_event {
4623eed55411SMichal Kazior 	__le32 stats_id; /* WMI_STAT_ */
46245e3dd157SKalle Valo 	/*
46255e3dd157SKalle Valo 	 * number of pdev stats event structures
46265e3dd157SKalle Valo 	 * (wmi_pdev_stats) 0 or 1
46275e3dd157SKalle Valo 	 */
46285e3dd157SKalle Valo 	__le32 num_pdev_stats;
46295e3dd157SKalle Valo 	/*
46305e3dd157SKalle Valo 	 * number of vdev stats event structures
46315e3dd157SKalle Valo 	 * (wmi_vdev_stats) 0 or max vdevs
46325e3dd157SKalle Valo 	 */
46335e3dd157SKalle Valo 	__le32 num_vdev_stats;
46345e3dd157SKalle Valo 	/*
46355e3dd157SKalle Valo 	 * number of peer stats event structures
46365e3dd157SKalle Valo 	 * (wmi_peer_stats) 0 or max peers
46375e3dd157SKalle Valo 	 */
46385e3dd157SKalle Valo 	__le32 num_peer_stats;
46395e3dd157SKalle Valo 	__le32 num_bcnflt_stats;
46405e3dd157SKalle Valo 	/*
46415e3dd157SKalle Valo 	 * followed by
46425e3dd157SKalle Valo 	 *   num_pdev_stats * size of(struct wmi_pdev_stats)
46435e3dd157SKalle Valo 	 *   num_vdev_stats * size of(struct wmi_vdev_stats)
46445e3dd157SKalle Valo 	 *   num_peer_stats * size of(struct wmi_peer_stats)
46455e3dd157SKalle Valo 	 *
46465e3dd157SKalle Valo 	 *  By having a zero sized array, the pointer to data area
46475e3dd157SKalle Valo 	 *  becomes available without increasing the struct size
46485e3dd157SKalle Valo 	 */
4649d3ed0cf0SGustavo A. R. Silva 	u8 data[];
46505e3dd157SKalle Valo } __packed;
46515e3dd157SKalle Valo 
465220de2229SMichal Kazior struct wmi_10_2_stats_event {
465320de2229SMichal Kazior 	__le32 stats_id; /* %WMI_REQUEST_ */
465420de2229SMichal Kazior 	__le32 num_pdev_stats;
465520de2229SMichal Kazior 	__le32 num_pdev_ext_stats;
465620de2229SMichal Kazior 	__le32 num_vdev_stats;
465720de2229SMichal Kazior 	__le32 num_peer_stats;
465820de2229SMichal Kazior 	__le32 num_bcnflt_stats;
4659d3ed0cf0SGustavo A. R. Silva 	u8 data[];
466020de2229SMichal Kazior } __packed;
466120de2229SMichal Kazior 
46625e3dd157SKalle Valo /*
46635e3dd157SKalle Valo  * PDEV statistics
46645e3dd157SKalle Valo  * TODO: add all PDEV stats here
46655e3dd157SKalle Valo  */
4666b91251fbSMichal Kazior struct wmi_pdev_stats_base {
4667b91251fbSMichal Kazior 	__le32 chan_nf;
466815138fdfSBen Greear 	__le32 tx_frame_count; /* Cycles spent transmitting frames */
466915138fdfSBen Greear 	__le32 rx_frame_count; /* Cycles spent receiving frames */
467015138fdfSBen Greear 	__le32 rx_clear_count; /* Total channel busy time, evidently */
467115138fdfSBen Greear 	__le32 cycle_count; /* Total on-channel time */
4672b91251fbSMichal Kazior 	__le32 phy_err_count;
4673b91251fbSMichal Kazior 	__le32 chan_tx_pwr;
46745e3dd157SKalle Valo } __packed;
46755e3dd157SKalle Valo 
4676b91251fbSMichal Kazior struct wmi_pdev_stats {
4677b91251fbSMichal Kazior 	struct wmi_pdev_stats_base base;
4678b91251fbSMichal Kazior 	struct wmi_pdev_stats_tx tx;
4679b91251fbSMichal Kazior 	struct wmi_pdev_stats_rx rx;
4680b91251fbSMichal Kazior 	struct wmi_pdev_stats_peer peer;
4681b91251fbSMichal Kazior } __packed;
4682b91251fbSMichal Kazior 
4683b91251fbSMichal Kazior struct wmi_pdev_stats_extra {
468452e346d1SChun-Yeow Yeoh 	__le32 ack_rx_bad;
468552e346d1SChun-Yeow Yeoh 	__le32 rts_bad;
468652e346d1SChun-Yeow Yeoh 	__le32 rts_good;
468752e346d1SChun-Yeow Yeoh 	__le32 fcs_bad;
468852e346d1SChun-Yeow Yeoh 	__le32 no_beacons;
468952e346d1SChun-Yeow Yeoh 	__le32 mib_int_count;
469052e346d1SChun-Yeow Yeoh } __packed;
469152e346d1SChun-Yeow Yeoh 
4692b91251fbSMichal Kazior struct wmi_10x_pdev_stats {
4693b91251fbSMichal Kazior 	struct wmi_pdev_stats_base base;
4694b91251fbSMichal Kazior 	struct wmi_pdev_stats_tx tx;
4695b91251fbSMichal Kazior 	struct wmi_pdev_stats_rx rx;
4696b91251fbSMichal Kazior 	struct wmi_pdev_stats_peer peer;
4697b91251fbSMichal Kazior 	struct wmi_pdev_stats_extra extra;
4698b91251fbSMichal Kazior } __packed;
4699b91251fbSMichal Kazior 
470020de2229SMichal Kazior struct wmi_pdev_stats_mem {
470120de2229SMichal Kazior 	__le32 dram_free;
470220de2229SMichal Kazior 	__le32 iram_free;
470320de2229SMichal Kazior } __packed;
470420de2229SMichal Kazior 
470520de2229SMichal Kazior struct wmi_10_2_pdev_stats {
470620de2229SMichal Kazior 	struct wmi_pdev_stats_base base;
470720de2229SMichal Kazior 	struct wmi_pdev_stats_tx tx;
470820de2229SMichal Kazior 	__le32 mc_drop;
470920de2229SMichal Kazior 	struct wmi_pdev_stats_rx rx;
471020de2229SMichal Kazior 	__le32 pdev_rx_timeout;
471120de2229SMichal Kazior 	struct wmi_pdev_stats_mem mem;
471220de2229SMichal Kazior 	struct wmi_pdev_stats_peer peer;
471320de2229SMichal Kazior 	struct wmi_pdev_stats_extra extra;
471420de2229SMichal Kazior } __packed;
471520de2229SMichal Kazior 
471698dd2b92SManikanta Pubbisetty struct wmi_10_4_pdev_stats {
471798dd2b92SManikanta Pubbisetty 	struct wmi_pdev_stats_base base;
471898dd2b92SManikanta Pubbisetty 	struct wmi_10_4_pdev_stats_tx tx;
471998dd2b92SManikanta Pubbisetty 	struct wmi_pdev_stats_rx rx;
472098dd2b92SManikanta Pubbisetty 	__le32 rx_ovfl_errs;
472198dd2b92SManikanta Pubbisetty 	struct wmi_pdev_stats_mem mem;
472298dd2b92SManikanta Pubbisetty 	__le32 sram_free_size;
472398dd2b92SManikanta Pubbisetty 	struct wmi_pdev_stats_extra extra;
472498dd2b92SManikanta Pubbisetty } __packed;
472598dd2b92SManikanta Pubbisetty 
47265e3dd157SKalle Valo /*
47275e3dd157SKalle Valo  * VDEV statistics
47285e3dd157SKalle Valo  */
47291b3fdb50SRajkumar Manoharan 
47301b3fdb50SRajkumar Manoharan #define WMI_VDEV_STATS_FTM_COUNT_VALID	BIT(31)
47311b3fdb50SRajkumar Manoharan #define WMI_VDEV_STATS_FTM_COUNT_LSB	0
47321b3fdb50SRajkumar Manoharan #define WMI_VDEV_STATS_FTM_COUNT_MASK	0x7fffffff
47331b3fdb50SRajkumar Manoharan 
47345e3dd157SKalle Valo struct wmi_vdev_stats {
47355e3dd157SKalle Valo 	__le32 vdev_id;
47365e3dd157SKalle Valo } __packed;
47375e3dd157SKalle Valo 
47381b3fdb50SRajkumar Manoharan struct wmi_vdev_stats_extd {
47391b3fdb50SRajkumar Manoharan 	__le32 vdev_id;
47401b3fdb50SRajkumar Manoharan 	__le32 ppdu_aggr_cnt;
47411b3fdb50SRajkumar Manoharan 	__le32 ppdu_noack;
47421b3fdb50SRajkumar Manoharan 	__le32 mpdu_queued;
47431b3fdb50SRajkumar Manoharan 	__le32 ppdu_nonaggr_cnt;
47441b3fdb50SRajkumar Manoharan 	__le32 mpdu_sw_requeued;
47451b3fdb50SRajkumar Manoharan 	__le32 mpdu_suc_retry;
47461b3fdb50SRajkumar Manoharan 	__le32 mpdu_suc_multitry;
47471b3fdb50SRajkumar Manoharan 	__le32 mpdu_fail_retry;
47481b3fdb50SRajkumar Manoharan 	__le32 tx_ftm_suc;
47491b3fdb50SRajkumar Manoharan 	__le32 tx_ftm_suc_retry;
47501b3fdb50SRajkumar Manoharan 	__le32 tx_ftm_fail;
47511b3fdb50SRajkumar Manoharan 	__le32 rx_ftmr_cnt;
47521b3fdb50SRajkumar Manoharan 	__le32 rx_ftmr_dup_cnt;
47531b3fdb50SRajkumar Manoharan 	__le32 rx_iftmr_cnt;
47541b3fdb50SRajkumar Manoharan 	__le32 rx_iftmr_dup_cnt;
47551b3fdb50SRajkumar Manoharan 	__le32 reserved[6];
47561b3fdb50SRajkumar Manoharan } __packed;
47571b3fdb50SRajkumar Manoharan 
47585e3dd157SKalle Valo /*
47595e3dd157SKalle Valo  * peer statistics.
47605e3dd157SKalle Valo  * TODO: add more stats
47615e3dd157SKalle Valo  */
4762d15fb520SMichal Kazior struct wmi_peer_stats {
47635e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
47645e3dd157SKalle Valo 	__le32 peer_rssi;
47655e3dd157SKalle Valo 	__le32 peer_tx_rate;
47665e3dd157SKalle Valo } __packed;
47675e3dd157SKalle Valo 
4768d15fb520SMichal Kazior struct wmi_10x_peer_stats {
4769d15fb520SMichal Kazior 	struct wmi_peer_stats old;
477023c3aae4SBen Greear 	__le32 peer_rx_rate;
477123c3aae4SBen Greear } __packed;
477223c3aae4SBen Greear 
477320de2229SMichal Kazior struct wmi_10_2_peer_stats {
477420de2229SMichal Kazior 	struct wmi_peer_stats old;
477520de2229SMichal Kazior 	__le32 peer_rx_rate;
477620de2229SMichal Kazior 	__le32 current_per;
477720de2229SMichal Kazior 	__le32 retries;
477820de2229SMichal Kazior 	__le32 tx_rate_count;
477920de2229SMichal Kazior 	__le32 max_4ms_frame_len;
478020de2229SMichal Kazior 	__le32 total_sub_frames;
478120de2229SMichal Kazior 	__le32 tx_bytes;
478220de2229SMichal Kazior 	__le32 num_pkt_loss_overflow[4];
478320de2229SMichal Kazior 	__le32 num_pkt_loss_excess_retry[4];
478420de2229SMichal Kazior } __packed;
478520de2229SMichal Kazior 
478620de2229SMichal Kazior struct wmi_10_2_4_peer_stats {
478720de2229SMichal Kazior 	struct wmi_10_2_peer_stats common;
4788774e656eSMohammed Shafi Shajakhan 	__le32 peer_rssi_changed;
478920de2229SMichal Kazior } __packed;
479020de2229SMichal Kazior 
4791de46c015SMohammed Shafi Shajakhan struct wmi_10_2_4_ext_peer_stats {
4792de46c015SMohammed Shafi Shajakhan 	struct wmi_10_2_peer_stats common;
4793de46c015SMohammed Shafi Shajakhan 	__le32 peer_rssi_changed;
4794de46c015SMohammed Shafi Shajakhan 	__le32 rx_duration;
4795de46c015SMohammed Shafi Shajakhan } __packed;
4796de46c015SMohammed Shafi Shajakhan 
479798dd2b92SManikanta Pubbisetty struct wmi_10_4_peer_stats {
479898dd2b92SManikanta Pubbisetty 	struct wmi_mac_addr peer_macaddr;
479998dd2b92SManikanta Pubbisetty 	__le32 peer_rssi;
480098dd2b92SManikanta Pubbisetty 	__le32 peer_rssi_seq_num;
480198dd2b92SManikanta Pubbisetty 	__le32 peer_tx_rate;
480298dd2b92SManikanta Pubbisetty 	__le32 peer_rx_rate;
480398dd2b92SManikanta Pubbisetty 	__le32 current_per;
480498dd2b92SManikanta Pubbisetty 	__le32 retries;
480598dd2b92SManikanta Pubbisetty 	__le32 tx_rate_count;
480698dd2b92SManikanta Pubbisetty 	__le32 max_4ms_frame_len;
480798dd2b92SManikanta Pubbisetty 	__le32 total_sub_frames;
480898dd2b92SManikanta Pubbisetty 	__le32 tx_bytes;
480998dd2b92SManikanta Pubbisetty 	__le32 num_pkt_loss_overflow[4];
481098dd2b92SManikanta Pubbisetty 	__le32 num_pkt_loss_excess_retry[4];
481198dd2b92SManikanta Pubbisetty 	__le32 peer_rssi_changed;
481298dd2b92SManikanta Pubbisetty } __packed;
481398dd2b92SManikanta Pubbisetty 
4814f9575793SMohammed Shafi Shajakhan struct wmi_10_4_peer_extd_stats {
4815f9575793SMohammed Shafi Shajakhan 	struct wmi_mac_addr peer_macaddr;
4816f9575793SMohammed Shafi Shajakhan 	__le32 inactive_time;
4817f9575793SMohammed Shafi Shajakhan 	__le32 peer_chain_rssi;
4818f9575793SMohammed Shafi Shajakhan 	__le32 rx_duration;
4819f9575793SMohammed Shafi Shajakhan 	__le32 reserved[10];
4820f9575793SMohammed Shafi Shajakhan } __packed;
4821f9575793SMohammed Shafi Shajakhan 
48224a49ae94SMohammed Shafi Shajakhan struct wmi_10_4_bss_bcn_stats {
48234a49ae94SMohammed Shafi Shajakhan 	__le32 vdev_id;
48244a49ae94SMohammed Shafi Shajakhan 	__le32 bss_bcns_dropped;
48254a49ae94SMohammed Shafi Shajakhan 	__le32 bss_bcn_delivered;
48264a49ae94SMohammed Shafi Shajakhan } __packed;
48274a49ae94SMohammed Shafi Shajakhan 
48284a49ae94SMohammed Shafi Shajakhan struct wmi_10_4_bss_bcn_filter_stats {
48294a49ae94SMohammed Shafi Shajakhan 	__le32 bcns_dropped;
48304a49ae94SMohammed Shafi Shajakhan 	__le32 bcns_delivered;
48314a49ae94SMohammed Shafi Shajakhan 	__le32 active_filters;
48324a49ae94SMohammed Shafi Shajakhan 	struct wmi_10_4_bss_bcn_stats bss_stats;
48334a49ae94SMohammed Shafi Shajakhan } __packed;
48344a49ae94SMohammed Shafi Shajakhan 
483520de2229SMichal Kazior struct wmi_10_2_pdev_ext_stats {
483620de2229SMichal Kazior 	__le32 rx_rssi_comb;
483720de2229SMichal Kazior 	__le32 rx_rssi[4];
483820de2229SMichal Kazior 	__le32 rx_mcs[10];
483920de2229SMichal Kazior 	__le32 tx_mcs[10];
484020de2229SMichal Kazior 	__le32 ack_rssi;
484120de2229SMichal Kazior } __packed;
484220de2229SMichal Kazior 
48435e3dd157SKalle Valo struct wmi_vdev_create_cmd {
48445e3dd157SKalle Valo 	__le32 vdev_id;
48455e3dd157SKalle Valo 	__le32 vdev_type;
48465e3dd157SKalle Valo 	__le32 vdev_subtype;
48475e3dd157SKalle Valo 	struct wmi_mac_addr vdev_macaddr;
48485e3dd157SKalle Valo } __packed;
48495e3dd157SKalle Valo 
48505e3dd157SKalle Valo enum wmi_vdev_type {
48515e3dd157SKalle Valo 	WMI_VDEV_TYPE_AP      = 1,
48525e3dd157SKalle Valo 	WMI_VDEV_TYPE_STA     = 2,
48535e3dd157SKalle Valo 	WMI_VDEV_TYPE_IBSS    = 3,
48545e3dd157SKalle Valo 	WMI_VDEV_TYPE_MONITOR = 4,
48555e3dd157SKalle Valo };
48565e3dd157SKalle Valo 
48575e3dd157SKalle Valo enum wmi_vdev_subtype {
48586e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_NONE,
48596e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_P2P_DEVICE,
48606e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_P2P_CLIENT,
48616e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_P2P_GO,
48626e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_PROXY_STA,
48636e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_MESH_11S,
48646e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_MESH_NON_11S,
48656e4de1a4SPeter Oh };
48666e4de1a4SPeter Oh 
48676e4de1a4SPeter Oh enum wmi_vdev_subtype_legacy {
48686e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_NONE      = 0,
48696e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV   = 1,
48706e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI   = 2,
48716e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_P2P_GO    = 3,
48726e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA = 4,
48736e4de1a4SPeter Oh };
48746e4de1a4SPeter Oh 
48756e4de1a4SPeter Oh enum wmi_vdev_subtype_10_2_4 {
48766e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_NONE      = 0,
48776e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV   = 1,
48786e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI   = 2,
48796e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_P2P_GO    = 3,
48806e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA = 4,
48816e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_2_4_MESH_11S  = 5,
48826e4de1a4SPeter Oh };
48836e4de1a4SPeter Oh 
48846e4de1a4SPeter Oh enum wmi_vdev_subtype_10_4 {
48856e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_NONE         = 0,
48866e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_P2P_DEV      = 1,
48876e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_P2P_CLI      = 2,
48886e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_P2P_GO       = 3,
48896e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_PROXY_STA    = 4,
48906e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S = 5,
48916e4de1a4SPeter Oh 	WMI_VDEV_SUBTYPE_10_4_MESH_11S     = 6,
48925e3dd157SKalle Valo };
48935e3dd157SKalle Valo 
48945e3dd157SKalle Valo /* values for vdev_subtype */
48955e3dd157SKalle Valo 
48965e3dd157SKalle Valo /* values for vdev_start_request flags */
48975e3dd157SKalle Valo /*
48985e3dd157SKalle Valo  * Indicates that AP VDEV uses hidden ssid. only valid for
489937ff1b0dSMarcin Rokicki  *  AP/GO
490037ff1b0dSMarcin Rokicki  */
49015e3dd157SKalle Valo #define WMI_VDEV_START_HIDDEN_SSID  (1 << 0)
49025e3dd157SKalle Valo /*
49035e3dd157SKalle Valo  * Indicates if robust management frame/management frame
49045e3dd157SKalle Valo  *  protection is enabled. For GO/AP vdevs, it indicates that
49055e3dd157SKalle Valo  *  it may support station/client associations with RMF enabled.
49065e3dd157SKalle Valo  *  For STA/client vdevs, it indicates that sta will
490737ff1b0dSMarcin Rokicki  *  associate with AP with RMF enabled.
490837ff1b0dSMarcin Rokicki  */
49095e3dd157SKalle Valo #define WMI_VDEV_START_PMF_ENABLED  (1 << 1)
49105e3dd157SKalle Valo 
49115e3dd157SKalle Valo struct wmi_p2p_noa_descriptor {
49125e3dd157SKalle Valo 	__le32 type_count; /* 255: continuous schedule, 0: reserved */
49135e3dd157SKalle Valo 	__le32 duration;  /* Absent period duration in micro seconds */
49145e3dd157SKalle Valo 	__le32 interval;   /* Absent period interval in micro seconds */
49155e3dd157SKalle Valo 	__le32 start_time; /* 32 bit tsf time when in starts */
49165e3dd157SKalle Valo } __packed;
49175e3dd157SKalle Valo 
49185e3dd157SKalle Valo struct wmi_vdev_start_request_cmd {
49195e3dd157SKalle Valo 	/* WMI channel */
49205e3dd157SKalle Valo 	struct wmi_channel chan;
49215e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
49225e3dd157SKalle Valo 	__le32 vdev_id;
49235e3dd157SKalle Valo 	/* requestor id identifying the caller module */
49245e3dd157SKalle Valo 	__le32 requestor_id;
49255e3dd157SKalle Valo 	/* beacon interval from received beacon */
49265e3dd157SKalle Valo 	__le32 beacon_interval;
49275e3dd157SKalle Valo 	/* DTIM Period from the received beacon */
49285e3dd157SKalle Valo 	__le32 dtim_period;
49295e3dd157SKalle Valo 	/* Flags */
49305e3dd157SKalle Valo 	__le32 flags;
49315e3dd157SKalle Valo 	/* ssid field. Only valid for AP/GO/IBSS/BTAmp VDEV type. */
49325e3dd157SKalle Valo 	struct wmi_ssid ssid;
4933e13dbeadSJoe Perches 	/* beacon/probe response xmit rate. Applicable for SoftAP. */
49345e3dd157SKalle Valo 	__le32 bcn_tx_rate;
4935e13dbeadSJoe Perches 	/* beacon/probe response xmit power. Applicable for SoftAP. */
49365e3dd157SKalle Valo 	__le32 bcn_tx_power;
49375e3dd157SKalle Valo 	/* number of p2p NOA descriptor(s) from scan entry */
49385e3dd157SKalle Valo 	__le32 num_noa_descriptors;
49395e3dd157SKalle Valo 	/*
49405e3dd157SKalle Valo 	 * Disable H/W ack. This used by WMI_VDEV_RESTART_REQUEST_CMDID.
49415e3dd157SKalle Valo 	 * During CAC, Our HW shouldn't ack ditected frames
49425e3dd157SKalle Valo 	 */
49435e3dd157SKalle Valo 	__le32 disable_hw_ack;
49445e3dd157SKalle Valo 	/* actual p2p NOA descriptor from scan entry */
49455e3dd157SKalle Valo 	struct wmi_p2p_noa_descriptor noa_descriptors[2];
49465e3dd157SKalle Valo } __packed;
49475e3dd157SKalle Valo 
49485e3dd157SKalle Valo struct wmi_vdev_restart_request_cmd {
49495e3dd157SKalle Valo 	struct wmi_vdev_start_request_cmd vdev_start_request_cmd;
49505e3dd157SKalle Valo } __packed;
49515e3dd157SKalle Valo 
49525e3dd157SKalle Valo struct wmi_vdev_start_request_arg {
49535e3dd157SKalle Valo 	u32 vdev_id;
49545e3dd157SKalle Valo 	struct wmi_channel_arg channel;
49555e3dd157SKalle Valo 	u32 bcn_intval;
49565e3dd157SKalle Valo 	u32 dtim_period;
49575e3dd157SKalle Valo 	u8 *ssid;
49585e3dd157SKalle Valo 	u32 ssid_len;
49595e3dd157SKalle Valo 	u32 bcn_tx_rate;
49605e3dd157SKalle Valo 	u32 bcn_tx_power;
49615e3dd157SKalle Valo 	bool disable_hw_ack;
49625e3dd157SKalle Valo 	bool hidden_ssid;
49635e3dd157SKalle Valo 	bool pmf_enabled;
49645e3dd157SKalle Valo };
49655e3dd157SKalle Valo 
49665e3dd157SKalle Valo struct wmi_vdev_delete_cmd {
49675e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
49685e3dd157SKalle Valo 	__le32 vdev_id;
49695e3dd157SKalle Valo } __packed;
49705e3dd157SKalle Valo 
49715e3dd157SKalle Valo struct wmi_vdev_up_cmd {
49725e3dd157SKalle Valo 	__le32 vdev_id;
49735e3dd157SKalle Valo 	__le32 vdev_assoc_id;
49745e3dd157SKalle Valo 	struct wmi_mac_addr vdev_bssid;
49755e3dd157SKalle Valo } __packed;
49765e3dd157SKalle Valo 
49775e3dd157SKalle Valo struct wmi_vdev_stop_cmd {
49785e3dd157SKalle Valo 	__le32 vdev_id;
49795e3dd157SKalle Valo } __packed;
49805e3dd157SKalle Valo 
49815e3dd157SKalle Valo struct wmi_vdev_down_cmd {
49825e3dd157SKalle Valo 	__le32 vdev_id;
49835e3dd157SKalle Valo } __packed;
49845e3dd157SKalle Valo 
49855e3dd157SKalle Valo struct wmi_vdev_standby_response_cmd {
49865e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
49875e3dd157SKalle Valo 	__le32 vdev_id;
49885e3dd157SKalle Valo } __packed;
49895e3dd157SKalle Valo 
49905e3dd157SKalle Valo struct wmi_vdev_resume_response_cmd {
49915e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
49925e3dd157SKalle Valo 	__le32 vdev_id;
49935e3dd157SKalle Valo } __packed;
49945e3dd157SKalle Valo 
49955e3dd157SKalle Valo struct wmi_vdev_set_param_cmd {
49965e3dd157SKalle Valo 	__le32 vdev_id;
49975e3dd157SKalle Valo 	__le32 param_id;
49985e3dd157SKalle Valo 	__le32 param_value;
49995e3dd157SKalle Valo } __packed;
50005e3dd157SKalle Valo 
50015e3dd157SKalle Valo #define WMI_MAX_KEY_INDEX   3
50025e3dd157SKalle Valo #define WMI_MAX_KEY_LEN     32
50035e3dd157SKalle Valo 
50045e3dd157SKalle Valo #define WMI_KEY_PAIRWISE 0x00
50055e3dd157SKalle Valo #define WMI_KEY_GROUP    0x01
50065e3dd157SKalle Valo #define WMI_KEY_TX_USAGE 0x02 /* default tx key - static wep */
50075e3dd157SKalle Valo 
50085e3dd157SKalle Valo struct wmi_key_seq_counter {
50095e3dd157SKalle Valo 	__le32 key_seq_counter_l;
50105e3dd157SKalle Valo 	__le32 key_seq_counter_h;
50115e3dd157SKalle Valo } __packed;
50125e3dd157SKalle Valo 
50137d94f862SAbhishek Ambure enum wmi_cipher_suites {
50147d94f862SAbhishek Ambure 	WMI_CIPHER_NONE,
50157d94f862SAbhishek Ambure 	WMI_CIPHER_WEP,
50167d94f862SAbhishek Ambure 	WMI_CIPHER_TKIP,
50177d94f862SAbhishek Ambure 	WMI_CIPHER_AES_OCB,
50187d94f862SAbhishek Ambure 	WMI_CIPHER_AES_CCM,
50197d94f862SAbhishek Ambure 	WMI_CIPHER_WAPI,
50207d94f862SAbhishek Ambure 	WMI_CIPHER_CKIP,
50217d94f862SAbhishek Ambure 	WMI_CIPHER_AES_CMAC,
50227d94f862SAbhishek Ambure 	WMI_CIPHER_AES_GCM,
50237d94f862SAbhishek Ambure };
50247d94f862SAbhishek Ambure 
50257d94f862SAbhishek Ambure enum wmi_tlv_cipher_suites {
50267d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_NONE,
50277d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_WEP,
50287d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_TKIP,
50297d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_AES_OCB,
50307d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_AES_CCM,
50317d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_WAPI,
50327d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_CKIP,
50337d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_AES_CMAC,
50347d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_ANY,
50357d94f862SAbhishek Ambure 	WMI_TLV_CIPHER_AES_GCM,
50367d94f862SAbhishek Ambure };
50375e3dd157SKalle Valo 
50385e3dd157SKalle Valo struct wmi_vdev_install_key_cmd {
50395e3dd157SKalle Valo 	__le32 vdev_id;
50405e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
50415e3dd157SKalle Valo 	__le32 key_idx;
50425e3dd157SKalle Valo 	__le32 key_flags;
50435e3dd157SKalle Valo 	__le32 key_cipher; /* %WMI_CIPHER_ */
50445e3dd157SKalle Valo 	struct wmi_key_seq_counter key_rsc_counter;
50455e3dd157SKalle Valo 	struct wmi_key_seq_counter key_global_rsc_counter;
50465e3dd157SKalle Valo 	struct wmi_key_seq_counter key_tsc_counter;
50475e3dd157SKalle Valo 	u8 wpi_key_rsc_counter[16];
50485e3dd157SKalle Valo 	u8 wpi_key_tsc_counter[16];
50495e3dd157SKalle Valo 	__le32 key_len;
50505e3dd157SKalle Valo 	__le32 key_txmic_len;
50515e3dd157SKalle Valo 	__le32 key_rxmic_len;
50525e3dd157SKalle Valo 
50535e3dd157SKalle Valo 	/* contains key followed by tx mic followed by rx mic */
5054d3ed0cf0SGustavo A. R. Silva 	u8 key_data[];
50555e3dd157SKalle Valo } __packed;
50565e3dd157SKalle Valo 
50575e3dd157SKalle Valo struct wmi_vdev_install_key_arg {
50585e3dd157SKalle Valo 	u32 vdev_id;
50595e3dd157SKalle Valo 	const u8 *macaddr;
50605e3dd157SKalle Valo 	u32 key_idx;
50615e3dd157SKalle Valo 	u32 key_flags;
50625e3dd157SKalle Valo 	u32 key_cipher;
50635e3dd157SKalle Valo 	u32 key_len;
50645e3dd157SKalle Valo 	u32 key_txmic_len;
50655e3dd157SKalle Valo 	u32 key_rxmic_len;
50665e3dd157SKalle Valo 	const void *key_data;
50675e3dd157SKalle Valo };
50685e3dd157SKalle Valo 
506951ab1a0aSJanusz Dziedzic /*
507051ab1a0aSJanusz Dziedzic  * vdev fixed rate format:
507151ab1a0aSJanusz Dziedzic  * - preamble - b7:b6 - see WMI_RATE_PREMABLE_
507251ab1a0aSJanusz Dziedzic  * - nss      - b5:b4 - ss number (0 mean 1ss)
507351ab1a0aSJanusz Dziedzic  * - rate_mcs - b3:b0 - as below
507451ab1a0aSJanusz Dziedzic  *    CCK:  0 - 11Mbps, 1 - 5,5Mbps, 2 - 2Mbps, 3 - 1Mbps,
507551ab1a0aSJanusz Dziedzic  *          4 - 11Mbps (s), 5 - 5,5Mbps (s), 6 - 2Mbps (s)
507651ab1a0aSJanusz Dziedzic  *    OFDM: 0 - 48Mbps, 1 - 24Mbps, 2 - 12Mbps, 3 - 6Mbps,
507751ab1a0aSJanusz Dziedzic  *          4 - 54Mbps, 5 - 36Mbps, 6 - 18Mbps, 7 - 9Mbps
507851ab1a0aSJanusz Dziedzic  *    HT/VHT: MCS index
507951ab1a0aSJanusz Dziedzic  */
508051ab1a0aSJanusz Dziedzic 
50815e3dd157SKalle Valo /* Preamble types to be used with VDEV fixed rate configuration */
50825e3dd157SKalle Valo enum wmi_rate_preamble {
50835e3dd157SKalle Valo 	WMI_RATE_PREAMBLE_OFDM,
50845e3dd157SKalle Valo 	WMI_RATE_PREAMBLE_CCK,
50855e3dd157SKalle Valo 	WMI_RATE_PREAMBLE_HT,
50865e3dd157SKalle Valo 	WMI_RATE_PREAMBLE_VHT,
50875e3dd157SKalle Valo };
50885e3dd157SKalle Valo 
508929542666SMaharaja Kennadyrajan #define ATH10K_HW_NSS(rate)		(1 + (((rate) >> 4) & 0x3))
509029542666SMaharaja Kennadyrajan #define ATH10K_HW_PREAMBLE(rate)	(((rate) >> 6) & 0x3)
5091cec17c38SAnilkumar Kolli #define ATH10K_HW_MCS_RATE(rate)	((rate) & 0xf)
5092cec17c38SAnilkumar Kolli #define ATH10K_HW_LEGACY_RATE(rate)	((rate) & 0x3f)
5093cec17c38SAnilkumar Kolli #define ATH10K_HW_BW(flags)		(((flags) >> 3) & 0x3)
5094cec17c38SAnilkumar Kolli #define ATH10K_HW_GI(flags)		(((flags) >> 5) & 0x1)
509529542666SMaharaja Kennadyrajan #define ATH10K_HW_RATECODE(rate, nss, preamble) \
509629542666SMaharaja Kennadyrajan 	(((preamble) << 6) | ((nss) << 4) | (rate))
5097a904417fSAnilkumar Kolli #define ATH10K_HW_AMPDU(flags)		((flags) & 0x1)
5098a904417fSAnilkumar Kolli #define ATH10K_HW_BA_FAIL(flags)	(((flags) >> 1) & 0x3)
50999a9cf0e6SAnilkumar Kolli #define ATH10K_FW_SKIPPED_RATE_CTRL(flags)	(((flags) >> 6) & 0x1)
510029542666SMaharaja Kennadyrajan 
5101a904417fSAnilkumar Kolli #define ATH10K_VHT_MCS_NUM	10
5102ef9051c7SSurabhi Vishnoi #define ATH10K_BW_NUM		6
5103a904417fSAnilkumar Kolli #define ATH10K_NSS_NUM		4
5104a904417fSAnilkumar Kolli #define ATH10K_LEGACY_NUM	12
5105a904417fSAnilkumar Kolli #define ATH10K_GI_NUM		2
5106a904417fSAnilkumar Kolli #define ATH10K_HT_MCS_NUM	32
5107e88975caSAnilkumar Kolli #define ATH10K_RATE_TABLE_NUM	320
51088e55fdaaSSurabhi Vishnoi #define ATH10K_RATE_INFO_FLAGS_SGI_BIT	2
5109cec17c38SAnilkumar Kolli 
51105e3dd157SKalle Valo /* Value to disable fixed rate setting */
51115e3dd157SKalle Valo #define WMI_FIXED_RATE_NONE    (0xff)
51125e3dd157SKalle Valo 
5113c0e33fe6SRakesh Pillai struct wmi_peer_param_map {
5114c0e33fe6SRakesh Pillai 	u32 smps_state;
5115c0e33fe6SRakesh Pillai 	u32 ampdu;
5116c0e33fe6SRakesh Pillai 	u32 authorize;
5117c0e33fe6SRakesh Pillai 	u32 chan_width;
5118c0e33fe6SRakesh Pillai 	u32 nss;
5119c0e33fe6SRakesh Pillai 	u32 use_4addr;
5120c0e33fe6SRakesh Pillai 	u32 membership;
5121c0e33fe6SRakesh Pillai 	u32 use_fixed_power;
5122c0e33fe6SRakesh Pillai 	u32 user_pos;
5123c0e33fe6SRakesh Pillai 	u32 crit_proto_hint_enabled;
5124c0e33fe6SRakesh Pillai 	u32 tx_fail_cnt_thr;
5125c0e33fe6SRakesh Pillai 	u32 set_hw_retry_cts2s;
5126c0e33fe6SRakesh Pillai 	u32 ibss_atim_win_len;
5127c0e33fe6SRakesh Pillai 	u32 debug;
5128c0e33fe6SRakesh Pillai 	u32 phymode;
5129c0e33fe6SRakesh Pillai 	u32 dummy_var;
5130c0e33fe6SRakesh Pillai };
5131c0e33fe6SRakesh Pillai 
51326d1506e7SBartosz Markowski struct wmi_vdev_param_map {
51336d1506e7SBartosz Markowski 	u32 rts_threshold;
51346d1506e7SBartosz Markowski 	u32 fragmentation_threshold;
51356d1506e7SBartosz Markowski 	u32 beacon_interval;
51366d1506e7SBartosz Markowski 	u32 listen_interval;
51376d1506e7SBartosz Markowski 	u32 multicast_rate;
51386d1506e7SBartosz Markowski 	u32 mgmt_tx_rate;
51396d1506e7SBartosz Markowski 	u32 slot_time;
51406d1506e7SBartosz Markowski 	u32 preamble;
51416d1506e7SBartosz Markowski 	u32 swba_time;
51426d1506e7SBartosz Markowski 	u32 wmi_vdev_stats_update_period;
51436d1506e7SBartosz Markowski 	u32 wmi_vdev_pwrsave_ageout_time;
51446d1506e7SBartosz Markowski 	u32 wmi_vdev_host_swba_interval;
51456d1506e7SBartosz Markowski 	u32 dtim_period;
51466d1506e7SBartosz Markowski 	u32 wmi_vdev_oc_scheduler_air_time_limit;
51476d1506e7SBartosz Markowski 	u32 wds;
51486d1506e7SBartosz Markowski 	u32 atim_window;
51496d1506e7SBartosz Markowski 	u32 bmiss_count_max;
51506d1506e7SBartosz Markowski 	u32 bmiss_first_bcnt;
51516d1506e7SBartosz Markowski 	u32 bmiss_final_bcnt;
51526d1506e7SBartosz Markowski 	u32 feature_wmm;
51536d1506e7SBartosz Markowski 	u32 chwidth;
51546d1506e7SBartosz Markowski 	u32 chextoffset;
51556d1506e7SBartosz Markowski 	u32 disable_htprotection;
51566d1506e7SBartosz Markowski 	u32 sta_quickkickout;
51576d1506e7SBartosz Markowski 	u32 mgmt_rate;
51586d1506e7SBartosz Markowski 	u32 protection_mode;
51596d1506e7SBartosz Markowski 	u32 fixed_rate;
51606d1506e7SBartosz Markowski 	u32 sgi;
51616d1506e7SBartosz Markowski 	u32 ldpc;
51626d1506e7SBartosz Markowski 	u32 tx_stbc;
51636d1506e7SBartosz Markowski 	u32 rx_stbc;
51646d1506e7SBartosz Markowski 	u32 intra_bss_fwd;
51656d1506e7SBartosz Markowski 	u32 def_keyid;
51666d1506e7SBartosz Markowski 	u32 nss;
51676d1506e7SBartosz Markowski 	u32 bcast_data_rate;
51686d1506e7SBartosz Markowski 	u32 mcast_data_rate;
51696d1506e7SBartosz Markowski 	u32 mcast_indicate;
51706d1506e7SBartosz Markowski 	u32 dhcp_indicate;
51716d1506e7SBartosz Markowski 	u32 unknown_dest_indicate;
51726d1506e7SBartosz Markowski 	u32 ap_keepalive_min_idle_inactive_time_secs;
51736d1506e7SBartosz Markowski 	u32 ap_keepalive_max_idle_inactive_time_secs;
51746d1506e7SBartosz Markowski 	u32 ap_keepalive_max_unresponsive_time_secs;
51756d1506e7SBartosz Markowski 	u32 ap_enable_nawds;
51766d1506e7SBartosz Markowski 	u32 mcast2ucast_set;
51776d1506e7SBartosz Markowski 	u32 enable_rtscts;
51786d1506e7SBartosz Markowski 	u32 txbf;
51796d1506e7SBartosz Markowski 	u32 packet_powersave;
51806d1506e7SBartosz Markowski 	u32 drop_unencry;
51816d1506e7SBartosz Markowski 	u32 tx_encap_type;
51826d1506e7SBartosz Markowski 	u32 ap_detect_out_of_sync_sleeping_sta_time_secs;
518393841a15SRaja Mani 	u32 rc_num_retries;
518493841a15SRaja Mani 	u32 cabq_maxdur;
518593841a15SRaja Mani 	u32 mfptest_set;
518693841a15SRaja Mani 	u32 rts_fixed_rate;
518793841a15SRaja Mani 	u32 vht_sgimask;
518893841a15SRaja Mani 	u32 vht80_ratemask;
518993841a15SRaja Mani 	u32 early_rx_adjust_enable;
519093841a15SRaja Mani 	u32 early_rx_tgt_bmiss_num;
519193841a15SRaja Mani 	u32 early_rx_bmiss_sample_cycle;
519293841a15SRaja Mani 	u32 early_rx_slop_step;
519393841a15SRaja Mani 	u32 early_rx_init_slop;
519493841a15SRaja Mani 	u32 early_rx_adjust_pause;
519593841a15SRaja Mani 	u32 proxy_sta;
519693841a15SRaja Mani 	u32 meru_vc;
519793841a15SRaja Mani 	u32 rx_decap_type;
519893841a15SRaja Mani 	u32 bw_nss_ratemask;
5199973324ffSPedersen, Thomas 	u32 inc_tsf;
5200973324ffSPedersen, Thomas 	u32 dec_tsf;
520168c295f2SSathishkumar Muruganandam 	u32 disable_4addr_src_lrn;
5202059104bfSPradeep Kumar Chitrapu 	u32 rtt_responder_role;
52036d1506e7SBartosz Markowski };
52046d1506e7SBartosz Markowski 
52056d1506e7SBartosz Markowski #define WMI_VDEV_PARAM_UNSUPPORTED 0
52066d1506e7SBartosz Markowski 
52075e3dd157SKalle Valo /* the definition of different VDEV parameters */
52085e3dd157SKalle Valo enum wmi_vdev_param {
52095e3dd157SKalle Valo 	/* RTS Threshold */
52105e3dd157SKalle Valo 	WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
52115e3dd157SKalle Valo 	/* Fragmentation threshold */
52125e3dd157SKalle Valo 	WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
52135e3dd157SKalle Valo 	/* beacon interval in TUs */
52145e3dd157SKalle Valo 	WMI_VDEV_PARAM_BEACON_INTERVAL,
52155e3dd157SKalle Valo 	/* Listen interval in TUs */
52165e3dd157SKalle Valo 	WMI_VDEV_PARAM_LISTEN_INTERVAL,
5217e13dbeadSJoe Perches 	/* multicast rate in Mbps */
52185e3dd157SKalle Valo 	WMI_VDEV_PARAM_MULTICAST_RATE,
52195e3dd157SKalle Valo 	/* management frame rate in Mbps */
52205e3dd157SKalle Valo 	WMI_VDEV_PARAM_MGMT_TX_RATE,
52215e3dd157SKalle Valo 	/* slot time (long vs short) */
52225e3dd157SKalle Valo 	WMI_VDEV_PARAM_SLOT_TIME,
52235e3dd157SKalle Valo 	/* preamble (long vs short) */
52245e3dd157SKalle Valo 	WMI_VDEV_PARAM_PREAMBLE,
52255e3dd157SKalle Valo 	/* SWBA time (time before tbtt in msec) */
52265e3dd157SKalle Valo 	WMI_VDEV_PARAM_SWBA_TIME,
52275e3dd157SKalle Valo 	/* time period for updating VDEV stats */
52285e3dd157SKalle Valo 	WMI_VDEV_STATS_UPDATE_PERIOD,
52295e3dd157SKalle Valo 	/* age out time in msec for frames queued for station in power save */
52305e3dd157SKalle Valo 	WMI_VDEV_PWRSAVE_AGEOUT_TIME,
52315e3dd157SKalle Valo 	/*
52325e3dd157SKalle Valo 	 * Host SWBA interval (time in msec before tbtt for SWBA event
52335e3dd157SKalle Valo 	 * generation).
52345e3dd157SKalle Valo 	 */
52355e3dd157SKalle Valo 	WMI_VDEV_HOST_SWBA_INTERVAL,
52365e3dd157SKalle Valo 	/* DTIM period (specified in units of num beacon intervals) */
52375e3dd157SKalle Valo 	WMI_VDEV_PARAM_DTIM_PERIOD,
52385e3dd157SKalle Valo 	/*
52395e3dd157SKalle Valo 	 * scheduler air time limit for this VDEV. used by off chan
52405e3dd157SKalle Valo 	 * scheduler.
52415e3dd157SKalle Valo 	 */
52425e3dd157SKalle Valo 	WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5243b8a71b95SJeff Johnson 	/* enable/disable WDS for this VDEV  */
52445e3dd157SKalle Valo 	WMI_VDEV_PARAM_WDS,
52455e3dd157SKalle Valo 	/* ATIM Window */
52465e3dd157SKalle Valo 	WMI_VDEV_PARAM_ATIM_WINDOW,
52475e3dd157SKalle Valo 	/* BMISS max */
52485e3dd157SKalle Valo 	WMI_VDEV_PARAM_BMISS_COUNT_MAX,
52495e3dd157SKalle Valo 	/* BMISS first time */
52505e3dd157SKalle Valo 	WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
52515e3dd157SKalle Valo 	/* BMISS final time */
52525e3dd157SKalle Valo 	WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
52535e3dd157SKalle Valo 	/* WMM enables/disabled */
52545e3dd157SKalle Valo 	WMI_VDEV_PARAM_FEATURE_WMM,
52555e3dd157SKalle Valo 	/* Channel width */
52565e3dd157SKalle Valo 	WMI_VDEV_PARAM_CHWIDTH,
52575e3dd157SKalle Valo 	/* Channel Offset */
52585e3dd157SKalle Valo 	WMI_VDEV_PARAM_CHEXTOFFSET,
52595e3dd157SKalle Valo 	/* Disable HT Protection */
52605e3dd157SKalle Valo 	WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
52615e3dd157SKalle Valo 	/* Quick STA Kickout */
52625e3dd157SKalle Valo 	WMI_VDEV_PARAM_STA_QUICKKICKOUT,
52635e3dd157SKalle Valo 	/* Rate to be used with Management frames */
52645e3dd157SKalle Valo 	WMI_VDEV_PARAM_MGMT_RATE,
52655e3dd157SKalle Valo 	/* Protection Mode */
52665e3dd157SKalle Valo 	WMI_VDEV_PARAM_PROTECTION_MODE,
52675e3dd157SKalle Valo 	/* Fixed rate setting */
52685e3dd157SKalle Valo 	WMI_VDEV_PARAM_FIXED_RATE,
52695e3dd157SKalle Valo 	/* Short GI Enable/Disable */
52705e3dd157SKalle Valo 	WMI_VDEV_PARAM_SGI,
52715e3dd157SKalle Valo 	/* Enable LDPC */
52725e3dd157SKalle Valo 	WMI_VDEV_PARAM_LDPC,
52735e3dd157SKalle Valo 	/* Enable Tx STBC */
52745e3dd157SKalle Valo 	WMI_VDEV_PARAM_TX_STBC,
52755e3dd157SKalle Valo 	/* Enable Rx STBC */
52765e3dd157SKalle Valo 	WMI_VDEV_PARAM_RX_STBC,
52775e3dd157SKalle Valo 	/* Intra BSS forwarding  */
52785e3dd157SKalle Valo 	WMI_VDEV_PARAM_INTRA_BSS_FWD,
52795e3dd157SKalle Valo 	/* Setting Default xmit key for Vdev */
52805e3dd157SKalle Valo 	WMI_VDEV_PARAM_DEF_KEYID,
52815e3dd157SKalle Valo 	/* NSS width */
52825e3dd157SKalle Valo 	WMI_VDEV_PARAM_NSS,
52835e3dd157SKalle Valo 	/* Set the custom rate for the broadcast data frames */
52845e3dd157SKalle Valo 	WMI_VDEV_PARAM_BCAST_DATA_RATE,
52855e3dd157SKalle Valo 	/* Set the custom rate (rate-code) for multicast data frames */
52865e3dd157SKalle Valo 	WMI_VDEV_PARAM_MCAST_DATA_RATE,
52875e3dd157SKalle Valo 	/* Tx multicast packet indicate Enable/Disable */
52885e3dd157SKalle Valo 	WMI_VDEV_PARAM_MCAST_INDICATE,
52895e3dd157SKalle Valo 	/* Tx DHCP packet indicate Enable/Disable */
52905e3dd157SKalle Valo 	WMI_VDEV_PARAM_DHCP_INDICATE,
52915e3dd157SKalle Valo 	/* Enable host inspection of Tx unicast packet to unknown destination */
52925e3dd157SKalle Valo 	WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
52935e3dd157SKalle Valo 
52945e3dd157SKalle Valo 	/* The minimum amount of time AP begins to consider STA inactive */
52955e3dd157SKalle Valo 	WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
52965e3dd157SKalle Valo 
52975e3dd157SKalle Valo 	/*
52985e3dd157SKalle Valo 	 * An associated STA is considered inactive when there is no recent
52995e3dd157SKalle Valo 	 * TX/RX activity and no downlink frames are buffered for it. Once a
53005e3dd157SKalle Valo 	 * STA exceeds the maximum idle inactive time, the AP will send an
53015e3dd157SKalle Valo 	 * 802.11 data-null as a keep alive to verify the STA is still
53025e3dd157SKalle Valo 	 * associated. If the STA does ACK the data-null, or if the data-null
53035e3dd157SKalle Valo 	 * is buffered and the STA does not retrieve it, the STA will be
53045e3dd157SKalle Valo 	 * considered unresponsive
53055e3dd157SKalle Valo 	 * (see WMI_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS).
53065e3dd157SKalle Valo 	 */
53075e3dd157SKalle Valo 	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
53085e3dd157SKalle Valo 
53095e3dd157SKalle Valo 	/*
53105e3dd157SKalle Valo 	 * An associated STA is considered unresponsive if there is no recent
53115e3dd157SKalle Valo 	 * TX/RX activity and downlink frames are buffered for it. Once a STA
53125e3dd157SKalle Valo 	 * exceeds the maximum unresponsive time, the AP will send a
531337ff1b0dSMarcin Rokicki 	 * WMI_STA_KICKOUT event to the host so the STA can be deleted.
531437ff1b0dSMarcin Rokicki 	 */
53155e3dd157SKalle Valo 	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
53165e3dd157SKalle Valo 
53175e3dd157SKalle Valo 	/* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */
53185e3dd157SKalle Valo 	WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
53195e3dd157SKalle Valo 	/* Enable/Disable RTS-CTS */
53205e3dd157SKalle Valo 	WMI_VDEV_PARAM_ENABLE_RTSCTS,
53215e3dd157SKalle Valo 	/* Enable TXBFee/er */
53225e3dd157SKalle Valo 	WMI_VDEV_PARAM_TXBF,
53235e3dd157SKalle Valo 
53245e3dd157SKalle Valo 	/* Set packet power save */
53255e3dd157SKalle Valo 	WMI_VDEV_PARAM_PACKET_POWERSAVE,
53265e3dd157SKalle Valo 
53275e3dd157SKalle Valo 	/*
53285e3dd157SKalle Valo 	 * Drops un-encrypted packets if eceived in an encrypted connection
53295e3dd157SKalle Valo 	 * otherwise forwards to host.
53305e3dd157SKalle Valo 	 */
53315e3dd157SKalle Valo 	WMI_VDEV_PARAM_DROP_UNENCRY,
53325e3dd157SKalle Valo 
53335e3dd157SKalle Valo 	/*
53345e3dd157SKalle Valo 	 * Set the encapsulation type for frames.
53355e3dd157SKalle Valo 	 */
53365e3dd157SKalle Valo 	WMI_VDEV_PARAM_TX_ENCAP_TYPE,
53375e3dd157SKalle Valo };
53385e3dd157SKalle Valo 
53396d1506e7SBartosz Markowski /* the definition of different VDEV parameters */
53406d1506e7SBartosz Markowski enum wmi_10x_vdev_param {
53416d1506e7SBartosz Markowski 	/* RTS Threshold */
53426d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1,
53436d1506e7SBartosz Markowski 	/* Fragmentation threshold */
53446d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
53456d1506e7SBartosz Markowski 	/* beacon interval in TUs */
53466d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
53476d1506e7SBartosz Markowski 	/* Listen interval in TUs */
53486d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
5349e13dbeadSJoe Perches 	/* multicast rate in Mbps */
53506d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MULTICAST_RATE,
53516d1506e7SBartosz Markowski 	/* management frame rate in Mbps */
53526d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
53536d1506e7SBartosz Markowski 	/* slot time (long vs short) */
53546d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_SLOT_TIME,
53556d1506e7SBartosz Markowski 	/* preamble (long vs short) */
53566d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_PREAMBLE,
53576d1506e7SBartosz Markowski 	/* SWBA time (time before tbtt in msec) */
53586d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_SWBA_TIME,
53596d1506e7SBartosz Markowski 	/* time period for updating VDEV stats */
53606d1506e7SBartosz Markowski 	WMI_10X_VDEV_STATS_UPDATE_PERIOD,
53616d1506e7SBartosz Markowski 	/* age out time in msec for frames queued for station in power save */
53626d1506e7SBartosz Markowski 	WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
53636d1506e7SBartosz Markowski 	/*
53646d1506e7SBartosz Markowski 	 * Host SWBA interval (time in msec before tbtt for SWBA event
53656d1506e7SBartosz Markowski 	 * generation).
53666d1506e7SBartosz Markowski 	 */
53676d1506e7SBartosz Markowski 	WMI_10X_VDEV_HOST_SWBA_INTERVAL,
53686d1506e7SBartosz Markowski 	/* DTIM period (specified in units of num beacon intervals) */
53696d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_DTIM_PERIOD,
53706d1506e7SBartosz Markowski 	/*
53716d1506e7SBartosz Markowski 	 * scheduler air time limit for this VDEV. used by off chan
53726d1506e7SBartosz Markowski 	 * scheduler.
53736d1506e7SBartosz Markowski 	 */
53746d1506e7SBartosz Markowski 	WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5375b8a71b95SJeff Johnson 	/* enable/disable WDS for this VDEV  */
53766d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_WDS,
53776d1506e7SBartosz Markowski 	/* ATIM Window */
53786d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_ATIM_WINDOW,
53796d1506e7SBartosz Markowski 	/* BMISS max */
53806d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
53816d1506e7SBartosz Markowski 	/* WMM enables/disabled */
53826d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_FEATURE_WMM,
53836d1506e7SBartosz Markowski 	/* Channel width */
53846d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_CHWIDTH,
53856d1506e7SBartosz Markowski 	/* Channel Offset */
53866d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_CHEXTOFFSET,
53876d1506e7SBartosz Markowski 	/* Disable HT Protection */
53886d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
53896d1506e7SBartosz Markowski 	/* Quick STA Kickout */
53906d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
53916d1506e7SBartosz Markowski 	/* Rate to be used with Management frames */
53926d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MGMT_RATE,
53936d1506e7SBartosz Markowski 	/* Protection Mode */
53946d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_PROTECTION_MODE,
53956d1506e7SBartosz Markowski 	/* Fixed rate setting */
53966d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_FIXED_RATE,
53976d1506e7SBartosz Markowski 	/* Short GI Enable/Disable */
53986d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_SGI,
53996d1506e7SBartosz Markowski 	/* Enable LDPC */
54006d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_LDPC,
54016d1506e7SBartosz Markowski 	/* Enable Tx STBC */
54026d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_TX_STBC,
54036d1506e7SBartosz Markowski 	/* Enable Rx STBC */
54046d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_RX_STBC,
54056d1506e7SBartosz Markowski 	/* Intra BSS forwarding  */
54066d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
54076d1506e7SBartosz Markowski 	/* Setting Default xmit key for Vdev */
54086d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_DEF_KEYID,
54096d1506e7SBartosz Markowski 	/* NSS width */
54106d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_NSS,
54116d1506e7SBartosz Markowski 	/* Set the custom rate for the broadcast data frames */
54126d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
54136d1506e7SBartosz Markowski 	/* Set the custom rate (rate-code) for multicast data frames */
54146d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
54156d1506e7SBartosz Markowski 	/* Tx multicast packet indicate Enable/Disable */
54166d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MCAST_INDICATE,
54176d1506e7SBartosz Markowski 	/* Tx DHCP packet indicate Enable/Disable */
54186d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_DHCP_INDICATE,
54196d1506e7SBartosz Markowski 	/* Enable host inspection of Tx unicast packet to unknown destination */
54206d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
54216d1506e7SBartosz Markowski 
54226d1506e7SBartosz Markowski 	/* The minimum amount of time AP begins to consider STA inactive */
54236d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
54246d1506e7SBartosz Markowski 
54256d1506e7SBartosz Markowski 	/*
54266d1506e7SBartosz Markowski 	 * An associated STA is considered inactive when there is no recent
54276d1506e7SBartosz Markowski 	 * TX/RX activity and no downlink frames are buffered for it. Once a
54286d1506e7SBartosz Markowski 	 * STA exceeds the maximum idle inactive time, the AP will send an
54296d1506e7SBartosz Markowski 	 * 802.11 data-null as a keep alive to verify the STA is still
54306d1506e7SBartosz Markowski 	 * associated. If the STA does ACK the data-null, or if the data-null
54316d1506e7SBartosz Markowski 	 * is buffered and the STA does not retrieve it, the STA will be
54326d1506e7SBartosz Markowski 	 * considered unresponsive
54336d1506e7SBartosz Markowski 	 * (see WMI_10X_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS).
54346d1506e7SBartosz Markowski 	 */
54356d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
54366d1506e7SBartosz Markowski 
54376d1506e7SBartosz Markowski 	/*
54386d1506e7SBartosz Markowski 	 * An associated STA is considered unresponsive if there is no recent
54396d1506e7SBartosz Markowski 	 * TX/RX activity and downlink frames are buffered for it. Once a STA
54406d1506e7SBartosz Markowski 	 * exceeds the maximum unresponsive time, the AP will send a
544137ff1b0dSMarcin Rokicki 	 * WMI_10X_STA_KICKOUT event to the host so the STA can be deleted.
544237ff1b0dSMarcin Rokicki 	 */
54436d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
54446d1506e7SBartosz Markowski 
54456d1506e7SBartosz Markowski 	/* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */
54466d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
54476d1506e7SBartosz Markowski 
54486d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
54496d1506e7SBartosz Markowski 	/* Enable/Disable RTS-CTS */
54506d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
54516d1506e7SBartosz Markowski 
54526d1506e7SBartosz Markowski 	WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
545324c88f78SMichal Kazior 
545424c88f78SMichal Kazior 	/* following are available as of firmware 10.2 */
545524c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE,
545624c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_CABQ_MAXDUR,
545724c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_MFPTEST_SET,
545824c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_RTS_FIXED_RATE,
545924c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_VHT_SGIMASK,
546024c88f78SMichal Kazior 	WMI_10X_VDEV_PARAM_VHT80_RATEMASK,
54619f0b7e7dSPeter Oh 	WMI_10X_VDEV_PARAM_TSF_INCREMENT,
54626d1506e7SBartosz Markowski };
54636d1506e7SBartosz Markowski 
546493841a15SRaja Mani enum wmi_10_4_vdev_param {
546593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1,
546693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
546793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
546893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
546993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
547093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
547193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_SLOT_TIME,
547293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_PREAMBLE,
547393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_SWBA_TIME,
547493841a15SRaja Mani 	WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
547593841a15SRaja Mani 	WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
547693841a15SRaja Mani 	WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
547793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
547893841a15SRaja Mani 	WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
547993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_WDS,
548093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
548193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
548293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
548393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
548493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_FEATURE_WMM,
548593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_CHWIDTH,
548693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
548793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
548893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
548993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MGMT_RATE,
549093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
549193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_FIXED_RATE,
549293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_SGI,
549393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_LDPC,
549493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_TX_STBC,
549593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RX_STBC,
549693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
549793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DEF_KEYID,
549893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_NSS,
549993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
550093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
550193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
550293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
550393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
550493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
550593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
550693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
550793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
550893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
550993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
551093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
551193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_TXBF,
551293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
551393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
551493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
551593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
551693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
551793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MFPTEST_SET,
551893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
551993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
552093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
552193841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
552293841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
552393841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
552493841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
552593841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
552693841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
552793841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_PROXY_STA,
552893841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_MERU_VC,
552993841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
553093841a15SRaja Mani 	WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
55314857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_SENSOR_AP,
55324857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_BEACON_RATE,
55334857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_DTIM_ENABLE_CTS,
55344857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_STA_KICKOUT,
55354857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_CAPABILITIES,
55364857dd14SPeter Oh 	WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
5537973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_RX_FILTER,
5538973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_MGMT_TX_POWER,
5539973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
5540973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_DISABLE_DYN_BW_RTS,
5541973324ffSPedersen, Thomas 	WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
554268c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_SELFGEN_FIXED_RATE,
554368c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_AMPDU_SUBFRAME_SIZE_PER_AC,
554468c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_NSS_VHT160,
554568c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_NSS_VHT80_80,
554668c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_AMSDU_SUBFRAME_SIZE_PER_AC,
554768c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_DISABLE_CABQ,
554868c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_SIFS_TRIGGER_RATE,
554968c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_TX_POWER,
555068c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE,
555168c295f2SSathishkumar Muruganandam 	WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN,
555293841a15SRaja Mani };
555393841a15SRaja Mani 
555468c295f2SSathishkumar Muruganandam #define WMI_VDEV_DISABLE_4_ADDR_SRC_LRN 1
555568c295f2SSathishkumar Muruganandam 
5556139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
5557139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
5558139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
5559139e170dSMichal Kazior #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
5560139e170dSMichal Kazior 
5561a48e2cc8SVivek Natarajan #define WMI_TXBF_STS_CAP_OFFSET_LSB	4
55628cec57f5SBen Greear #define WMI_TXBF_STS_CAP_OFFSET_MASK	0x70
55638cec57f5SBen Greear #define WMI_TXBF_CONF_IMPLICIT_BF       BIT(7)
5564a48e2cc8SVivek Natarajan #define WMI_BF_SOUND_DIM_OFFSET_LSB	8
5565a48e2cc8SVivek Natarajan #define WMI_BF_SOUND_DIM_OFFSET_MASK	0xf00
5566a48e2cc8SVivek Natarajan 
55675e3dd157SKalle Valo /* slot time long */
55685e3dd157SKalle Valo #define WMI_VDEV_SLOT_TIME_LONG		0x1
55695e3dd157SKalle Valo /* slot time short */
55705e3dd157SKalle Valo #define WMI_VDEV_SLOT_TIME_SHORT	0x2
55715e3dd157SKalle Valo /* preablbe long */
55725e3dd157SKalle Valo #define WMI_VDEV_PREAMBLE_LONG		0x1
55735e3dd157SKalle Valo /* preablbe short */
55745e3dd157SKalle Valo #define WMI_VDEV_PREAMBLE_SHORT		0x2
55755e3dd157SKalle Valo 
55765e3dd157SKalle Valo enum wmi_start_event_param {
55775e3dd157SKalle Valo 	WMI_VDEV_RESP_START_EVENT = 0,
55785e3dd157SKalle Valo 	WMI_VDEV_RESP_RESTART_EVENT,
55795e3dd157SKalle Valo };
55805e3dd157SKalle Valo 
55815e3dd157SKalle Valo struct wmi_vdev_start_response_event {
55825e3dd157SKalle Valo 	__le32 vdev_id;
55835e3dd157SKalle Valo 	__le32 req_id;
55845e3dd157SKalle Valo 	__le32 resp_type; /* %WMI_VDEV_RESP_ */
55855e3dd157SKalle Valo 	__le32 status;
55865e3dd157SKalle Valo } __packed;
55875e3dd157SKalle Valo 
55885e3dd157SKalle Valo struct wmi_vdev_standby_req_event {
55895e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
55905e3dd157SKalle Valo 	__le32 vdev_id;
55915e3dd157SKalle Valo } __packed;
55925e3dd157SKalle Valo 
55935e3dd157SKalle Valo struct wmi_vdev_resume_req_event {
55945e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
55955e3dd157SKalle Valo 	__le32 vdev_id;
55965e3dd157SKalle Valo } __packed;
55975e3dd157SKalle Valo 
55985e3dd157SKalle Valo struct wmi_vdev_stopped_event {
55995e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
56005e3dd157SKalle Valo 	__le32 vdev_id;
56015e3dd157SKalle Valo } __packed;
56025e3dd157SKalle Valo 
56035e3dd157SKalle Valo /*
56045e3dd157SKalle Valo  * common structure used for simple events
56055e3dd157SKalle Valo  * (stopped, resume_req, standby response)
56065e3dd157SKalle Valo  */
56075e3dd157SKalle Valo struct wmi_vdev_simple_event {
56085e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
56095e3dd157SKalle Valo 	__le32 vdev_id;
56105e3dd157SKalle Valo } __packed;
56115e3dd157SKalle Valo 
56125e3dd157SKalle Valo /* VDEV start response status codes */
5613e13dbeadSJoe Perches /* VDEV successfully started */
56145e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS	0x0
56155e3dd157SKalle Valo 
56165e3dd157SKalle Valo /* requested VDEV not found */
56175e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID	0x1
56185e3dd157SKalle Valo 
56195e3dd157SKalle Valo /* unsupported VDEV combination */
56205e3dd157SKalle Valo #define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED	0x2
56215e3dd157SKalle Valo 
5622855aed12SSimon Wunderlich /* TODO: please add more comments if you have in-depth information */
5623855aed12SSimon Wunderlich struct wmi_vdev_spectral_conf_cmd {
5624855aed12SSimon Wunderlich 	__le32 vdev_id;
5625855aed12SSimon Wunderlich 
5626855aed12SSimon Wunderlich 	/* number of fft samples to send (0 for infinite) */
5627855aed12SSimon Wunderlich 	__le32 scan_count;
5628855aed12SSimon Wunderlich 	__le32 scan_period;
5629855aed12SSimon Wunderlich 	__le32 scan_priority;
5630855aed12SSimon Wunderlich 
5631855aed12SSimon Wunderlich 	/* number of bins in the FFT: 2^(fft_size - bin_scale) */
5632855aed12SSimon Wunderlich 	__le32 scan_fft_size;
5633855aed12SSimon Wunderlich 	__le32 scan_gc_ena;
5634855aed12SSimon Wunderlich 	__le32 scan_restart_ena;
5635855aed12SSimon Wunderlich 	__le32 scan_noise_floor_ref;
5636855aed12SSimon Wunderlich 	__le32 scan_init_delay;
5637855aed12SSimon Wunderlich 	__le32 scan_nb_tone_thr;
5638855aed12SSimon Wunderlich 	__le32 scan_str_bin_thr;
5639855aed12SSimon Wunderlich 	__le32 scan_wb_rpt_mode;
5640855aed12SSimon Wunderlich 	__le32 scan_rssi_rpt_mode;
5641855aed12SSimon Wunderlich 	__le32 scan_rssi_thr;
5642855aed12SSimon Wunderlich 	__le32 scan_pwr_format;
5643855aed12SSimon Wunderlich 
5644855aed12SSimon Wunderlich 	/* rpt_mode: Format of FFT report to software for spectral scan
5645855aed12SSimon Wunderlich 	 * triggered FFTs:
5646855aed12SSimon Wunderlich 	 *	0: No FFT report (only spectral scan summary report)
5647855aed12SSimon Wunderlich 	 *	1: 2-dword summary of metrics for each completed FFT + spectral
5648855aed12SSimon Wunderlich 	 *	   scan	summary report
5649855aed12SSimon Wunderlich 	 *	2: 2-dword summary of metrics for each completed FFT +
5650855aed12SSimon Wunderlich 	 *	   1x- oversampled bins(in-band) per FFT + spectral scan summary
5651855aed12SSimon Wunderlich 	 *	   report
5652855aed12SSimon Wunderlich 	 *	3: 2-dword summary of metrics for each completed FFT +
5653855aed12SSimon Wunderlich 	 *	   2x- oversampled bins	(all) per FFT + spectral scan summary
5654855aed12SSimon Wunderlich 	 */
5655855aed12SSimon Wunderlich 	__le32 scan_rpt_mode;
5656855aed12SSimon Wunderlich 	__le32 scan_bin_scale;
5657855aed12SSimon Wunderlich 	__le32 scan_dbm_adj;
5658855aed12SSimon Wunderlich 	__le32 scan_chn_mask;
5659855aed12SSimon Wunderlich } __packed;
5660855aed12SSimon Wunderlich 
5661855aed12SSimon Wunderlich struct wmi_vdev_spectral_conf_arg {
5662855aed12SSimon Wunderlich 	u32 vdev_id;
5663855aed12SSimon Wunderlich 	u32 scan_count;
5664855aed12SSimon Wunderlich 	u32 scan_period;
5665855aed12SSimon Wunderlich 	u32 scan_priority;
5666855aed12SSimon Wunderlich 	u32 scan_fft_size;
5667855aed12SSimon Wunderlich 	u32 scan_gc_ena;
5668855aed12SSimon Wunderlich 	u32 scan_restart_ena;
5669855aed12SSimon Wunderlich 	u32 scan_noise_floor_ref;
5670855aed12SSimon Wunderlich 	u32 scan_init_delay;
5671855aed12SSimon Wunderlich 	u32 scan_nb_tone_thr;
5672855aed12SSimon Wunderlich 	u32 scan_str_bin_thr;
5673855aed12SSimon Wunderlich 	u32 scan_wb_rpt_mode;
5674855aed12SSimon Wunderlich 	u32 scan_rssi_rpt_mode;
5675855aed12SSimon Wunderlich 	u32 scan_rssi_thr;
5676855aed12SSimon Wunderlich 	u32 scan_pwr_format;
5677855aed12SSimon Wunderlich 	u32 scan_rpt_mode;
5678855aed12SSimon Wunderlich 	u32 scan_bin_scale;
5679855aed12SSimon Wunderlich 	u32 scan_dbm_adj;
5680855aed12SSimon Wunderlich 	u32 scan_chn_mask;
5681855aed12SSimon Wunderlich };
5682855aed12SSimon Wunderlich 
5683855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_DEFAULT              0
5684855aed12SSimon Wunderlich #define WMI_SPECTRAL_COUNT_DEFAULT               0
5685855aed12SSimon Wunderlich #define WMI_SPECTRAL_PERIOD_DEFAULT             35
5686855aed12SSimon Wunderlich #define WMI_SPECTRAL_PRIORITY_DEFAULT            1
5687855aed12SSimon Wunderlich #define WMI_SPECTRAL_FFT_SIZE_DEFAULT            7
5688855aed12SSimon Wunderlich #define WMI_SPECTRAL_GC_ENA_DEFAULT              1
5689855aed12SSimon Wunderlich #define WMI_SPECTRAL_RESTART_ENA_DEFAULT         0
5690855aed12SSimon Wunderlich #define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT   -96
5691855aed12SSimon Wunderlich #define WMI_SPECTRAL_INIT_DELAY_DEFAULT         80
5692855aed12SSimon Wunderlich #define WMI_SPECTRAL_NB_TONE_THR_DEFAULT        12
5693855aed12SSimon Wunderlich #define WMI_SPECTRAL_STR_BIN_THR_DEFAULT         8
5694855aed12SSimon Wunderlich #define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT         0
5695855aed12SSimon Wunderlich #define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT       0
5696855aed12SSimon Wunderlich #define WMI_SPECTRAL_RSSI_THR_DEFAULT         0xf0
5697855aed12SSimon Wunderlich #define WMI_SPECTRAL_PWR_FORMAT_DEFAULT          0
5698855aed12SSimon Wunderlich #define WMI_SPECTRAL_RPT_MODE_DEFAULT            2
5699855aed12SSimon Wunderlich #define WMI_SPECTRAL_BIN_SCALE_DEFAULT           1
5700855aed12SSimon Wunderlich #define WMI_SPECTRAL_DBM_ADJ_DEFAULT             1
5701855aed12SSimon Wunderlich #define WMI_SPECTRAL_CHN_MASK_DEFAULT            1
5702855aed12SSimon Wunderlich 
5703855aed12SSimon Wunderlich struct wmi_vdev_spectral_enable_cmd {
5704855aed12SSimon Wunderlich 	__le32 vdev_id;
5705855aed12SSimon Wunderlich 	__le32 trigger_cmd;
5706855aed12SSimon Wunderlich 	__le32 enable_cmd;
5707855aed12SSimon Wunderlich } __packed;
5708855aed12SSimon Wunderlich 
5709855aed12SSimon Wunderlich #define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER  1
5710855aed12SSimon Wunderlich #define WMI_SPECTRAL_TRIGGER_CMD_CLEAR    2
5711855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_CMD_ENABLE    1
5712855aed12SSimon Wunderlich #define WMI_SPECTRAL_ENABLE_CMD_DISABLE   2
5713855aed12SSimon Wunderlich 
57145e3dd157SKalle Valo /* Beacon processing related command and event structures */
57155e3dd157SKalle Valo struct wmi_bcn_tx_hdr {
57165e3dd157SKalle Valo 	__le32 vdev_id;
57175e3dd157SKalle Valo 	__le32 tx_rate;
57185e3dd157SKalle Valo 	__le32 tx_power;
57195e3dd157SKalle Valo 	__le32 bcn_len;
57205e3dd157SKalle Valo } __packed;
57215e3dd157SKalle Valo 
57225e3dd157SKalle Valo struct wmi_bcn_tx_cmd {
57235e3dd157SKalle Valo 	struct wmi_bcn_tx_hdr hdr;
5724d3ed0cf0SGustavo A. R. Silva 	u8 *bcn[];
57255e3dd157SKalle Valo } __packed;
57265e3dd157SKalle Valo 
57275e3dd157SKalle Valo struct wmi_bcn_tx_arg {
57285e3dd157SKalle Valo 	u32 vdev_id;
57295e3dd157SKalle Valo 	u32 tx_rate;
57305e3dd157SKalle Valo 	u32 tx_power;
57315e3dd157SKalle Valo 	u32 bcn_len;
57325e3dd157SKalle Valo 	const void *bcn;
57335e3dd157SKalle Valo };
57345e3dd157SKalle Valo 
5735748afc47SMichal Kazior enum wmi_bcn_tx_ref_flags {
5736748afc47SMichal Kazior 	WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1,
5737748afc47SMichal Kazior 	WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2,
5738748afc47SMichal Kazior };
5739748afc47SMichal Kazior 
574024c88f78SMichal Kazior /* TODO: It is unclear why "no antenna" works while any other seemingly valid
574124c88f78SMichal Kazior  * chainmask yields no beacons on the air at all.
574224c88f78SMichal Kazior  */
574324c88f78SMichal Kazior #define WMI_BCN_TX_REF_DEF_ANTENNA 0
574424c88f78SMichal Kazior 
5745748afc47SMichal Kazior struct wmi_bcn_tx_ref_cmd {
5746748afc47SMichal Kazior 	__le32 vdev_id;
5747748afc47SMichal Kazior 	__le32 data_len;
5748748afc47SMichal Kazior 	/* physical address of the frame - dma pointer */
5749748afc47SMichal Kazior 	__le32 data_ptr;
5750748afc47SMichal Kazior 	/* id for host to track */
5751748afc47SMichal Kazior 	__le32 msdu_id;
5752748afc47SMichal Kazior 	/* frame ctrl to setup PPDU desc */
5753748afc47SMichal Kazior 	__le32 frame_control;
5754748afc47SMichal Kazior 	/* to control CABQ traffic: WMI_BCN_TX_REF_FLAG_ */
5755748afc47SMichal Kazior 	__le32 flags;
575624c88f78SMichal Kazior 	/* introduced in 10.2 */
575724c88f78SMichal Kazior 	__le32 antenna_mask;
5758748afc47SMichal Kazior } __packed;
5759748afc47SMichal Kazior 
57605e3dd157SKalle Valo /* Beacon filter */
57615e3dd157SKalle Valo #define WMI_BCN_FILTER_ALL   0 /* Filter all beacons */
57625e3dd157SKalle Valo #define WMI_BCN_FILTER_NONE  1 /* Pass all beacons */
57635e3dd157SKalle Valo #define WMI_BCN_FILTER_RSSI  2 /* Pass Beacons RSSI >= RSSI threshold */
57645e3dd157SKalle Valo #define WMI_BCN_FILTER_BSSID 3 /* Pass Beacons with matching BSSID */
57655e3dd157SKalle Valo #define WMI_BCN_FILTER_SSID  4 /* Pass Beacons with matching SSID */
57665e3dd157SKalle Valo 
57675e3dd157SKalle Valo struct wmi_bcn_filter_rx_cmd {
57685e3dd157SKalle Valo 	/* Filter ID */
57695e3dd157SKalle Valo 	__le32 bcn_filter_id;
57705e3dd157SKalle Valo 	/* Filter type - wmi_bcn_filter */
57715e3dd157SKalle Valo 	__le32 bcn_filter;
57725e3dd157SKalle Valo 	/* Buffer len */
57735e3dd157SKalle Valo 	__le32 bcn_filter_len;
57745e3dd157SKalle Valo 	/* Filter info (threshold, BSSID, RSSI) */
57755e3dd157SKalle Valo 	u8 *bcn_filter_buf;
57765e3dd157SKalle Valo } __packed;
57775e3dd157SKalle Valo 
57785e3dd157SKalle Valo /* Capabilities and IEs to be passed to firmware */
57795e3dd157SKalle Valo struct wmi_bcn_prb_info {
57805e3dd157SKalle Valo 	/* Capabilities */
57815e3dd157SKalle Valo 	__le32 caps;
57825e3dd157SKalle Valo 	/* ERP info */
57835e3dd157SKalle Valo 	__le32 erp;
57845e3dd157SKalle Valo 	/* Advanced capabilities */
57855e3dd157SKalle Valo 	/* HT capabilities */
57865e3dd157SKalle Valo 	/* HT Info */
57875e3dd157SKalle Valo 	/* ibss_dfs */
57885e3dd157SKalle Valo 	/* wpa Info */
57895e3dd157SKalle Valo 	/* rsn Info */
57905e3dd157SKalle Valo 	/* rrm info */
57915e3dd157SKalle Valo 	/* ath_ext */
57925e3dd157SKalle Valo 	/* app IE */
57935e3dd157SKalle Valo } __packed;
57945e3dd157SKalle Valo 
57955e3dd157SKalle Valo struct wmi_bcn_tmpl_cmd {
57965e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
57975e3dd157SKalle Valo 	__le32 vdev_id;
57985e3dd157SKalle Valo 	/* TIM IE offset from the beginning of the template. */
57995e3dd157SKalle Valo 	__le32 tim_ie_offset;
58005e3dd157SKalle Valo 	/* beacon probe capabilities and IEs */
58015e3dd157SKalle Valo 	struct wmi_bcn_prb_info bcn_prb_info;
58025e3dd157SKalle Valo 	/* beacon buffer length */
58035e3dd157SKalle Valo 	__le32 buf_len;
58045e3dd157SKalle Valo 	/* variable length data */
58055e3dd157SKalle Valo 	u8 data[1];
58065e3dd157SKalle Valo } __packed;
58075e3dd157SKalle Valo 
58085e3dd157SKalle Valo struct wmi_prb_tmpl_cmd {
58095e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
58105e3dd157SKalle Valo 	__le32 vdev_id;
58115e3dd157SKalle Valo 	/* beacon probe capabilities and IEs */
58125e3dd157SKalle Valo 	struct wmi_bcn_prb_info bcn_prb_info;
58135e3dd157SKalle Valo 	/* beacon buffer length */
58145e3dd157SKalle Valo 	__le32 buf_len;
58155e3dd157SKalle Valo 	/* Variable length data */
58165e3dd157SKalle Valo 	u8 data[1];
58175e3dd157SKalle Valo } __packed;
58185e3dd157SKalle Valo 
58195e3dd157SKalle Valo enum wmi_sta_ps_mode {
58205e3dd157SKalle Valo 	/* enable power save for the given STA VDEV */
58215e3dd157SKalle Valo 	WMI_STA_PS_MODE_DISABLED = 0,
58225e3dd157SKalle Valo 	/* disable power save  for a given STA VDEV */
58235e3dd157SKalle Valo 	WMI_STA_PS_MODE_ENABLED = 1,
58245e3dd157SKalle Valo };
58255e3dd157SKalle Valo 
58265e3dd157SKalle Valo struct wmi_sta_powersave_mode_cmd {
58275e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
58285e3dd157SKalle Valo 	__le32 vdev_id;
58295e3dd157SKalle Valo 
58305e3dd157SKalle Valo 	/*
58315e3dd157SKalle Valo 	 * Power save mode
58325e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_mode)
58335e3dd157SKalle Valo 	 */
58345e3dd157SKalle Valo 	__le32 sta_ps_mode;
58355e3dd157SKalle Valo } __packed;
58365e3dd157SKalle Valo 
58375e3dd157SKalle Valo enum wmi_csa_offload_en {
58385e3dd157SKalle Valo 	WMI_CSA_OFFLOAD_DISABLE = 0,
58395e3dd157SKalle Valo 	WMI_CSA_OFFLOAD_ENABLE = 1,
58405e3dd157SKalle Valo };
58415e3dd157SKalle Valo 
58425e3dd157SKalle Valo struct wmi_csa_offload_enable_cmd {
58435e3dd157SKalle Valo 	__le32 vdev_id;
58445e3dd157SKalle Valo 	__le32 csa_offload_enable;
58455e3dd157SKalle Valo } __packed;
58465e3dd157SKalle Valo 
58475e3dd157SKalle Valo struct wmi_csa_offload_chanswitch_cmd {
58485e3dd157SKalle Valo 	__le32 vdev_id;
58495e3dd157SKalle Valo 	struct wmi_channel chan;
58505e3dd157SKalle Valo } __packed;
58515e3dd157SKalle Valo 
58525e3dd157SKalle Valo /*
58535e3dd157SKalle Valo  * This parameter controls the policy for retrieving frames from AP while the
58545e3dd157SKalle Valo  * STA is in sleep state.
58555e3dd157SKalle Valo  *
58565e3dd157SKalle Valo  * Only takes affect if the sta_ps_mode is enabled
58575e3dd157SKalle Valo  */
58585e3dd157SKalle Valo enum wmi_sta_ps_param_rx_wake_policy {
58595e3dd157SKalle Valo 	/*
58605e3dd157SKalle Valo 	 * Wake up when ever there is an  RX activity on the VDEV. In this mode
58615e3dd157SKalle Valo 	 * the Power save SM(state machine) will come out of sleep by either
58625e3dd157SKalle Valo 	 * sending null frame (or) a data frame (with PS==0) in response to TIM
58635e3dd157SKalle Valo 	 * bit set in the received beacon frame from AP.
58645e3dd157SKalle Valo 	 */
58655e3dd157SKalle Valo 	WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
58665e3dd157SKalle Valo 
58675e3dd157SKalle Valo 	/*
58685e3dd157SKalle Valo 	 * Here the power save state machine will not wakeup in response to TIM
58695e3dd157SKalle Valo 	 * bit, instead it will send a PSPOLL (or) UASPD trigger based on UAPSD
58705e3dd157SKalle Valo 	 * configuration setup by WMISET_PS_SET_UAPSD  WMI command.  When all
58715e3dd157SKalle Valo 	 * access categories are delivery-enabled, the station will send a
58725e3dd157SKalle Valo 	 * UAPSD trigger frame, otherwise it will send a PS-Poll.
58735e3dd157SKalle Valo 	 */
58745e3dd157SKalle Valo 	WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
58755e3dd157SKalle Valo };
58765e3dd157SKalle Valo 
58775e3dd157SKalle Valo /*
58785e3dd157SKalle Valo  * Number of tx frames/beacon  that cause the power save SM to wake up.
58795e3dd157SKalle Valo  *
58805e3dd157SKalle Valo  * Value 1 causes the SM to wake up for every TX. Value 0 has a special
58815e3dd157SKalle Valo  * meaning, It will cause the SM to never wake up. This is useful if you want
58825e3dd157SKalle Valo  * to keep the system to sleep all the time for some kind of test mode . host
58835e3dd157SKalle Valo  * can change this parameter any time.  It will affect at the next tx frame.
58845e3dd157SKalle Valo  */
58855e3dd157SKalle Valo enum wmi_sta_ps_param_tx_wake_threshold {
58865e3dd157SKalle Valo 	WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
58875e3dd157SKalle Valo 	WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
58885e3dd157SKalle Valo 
58895e3dd157SKalle Valo 	/*
58905e3dd157SKalle Valo 	 * Values greater than one indicate that many TX attempts per beacon
58915e3dd157SKalle Valo 	 * interval before the STA will wake up
58925e3dd157SKalle Valo 	 */
58935e3dd157SKalle Valo };
58945e3dd157SKalle Valo 
58955e3dd157SKalle Valo /*
58965e3dd157SKalle Valo  * The maximum number of PS-Poll frames the FW will send in response to
58975e3dd157SKalle Valo  * traffic advertised in TIM before waking up (by sending a null frame with PS
58985e3dd157SKalle Valo  * = 0). Value 0 has a special meaning: there is no maximum count and the FW
58995e3dd157SKalle Valo  * will send as many PS-Poll as are necessary to retrieve buffered BU. This
59005e3dd157SKalle Valo  * parameter is used when the RX wake policy is
59015e3dd157SKalle Valo  * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
59025e3dd157SKalle Valo  * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
59035e3dd157SKalle Valo  */
59045e3dd157SKalle Valo enum wmi_sta_ps_param_pspoll_count {
59055e3dd157SKalle Valo 	WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
59065e3dd157SKalle Valo 	/*
5907b8a71b95SJeff Johnson 	 * Values greater than 0 indicate the maximum number of PS-Poll frames
59085e3dd157SKalle Valo 	 * FW will send before waking up.
59095e3dd157SKalle Valo 	 */
59109f9b5746SMichal Kazior 
59119f9b5746SMichal Kazior 	/* When u-APSD is enabled the firmware will be very reluctant to exit
59129f9b5746SMichal Kazior 	 * STA PS. This could result in very poor Rx performance with STA doing
59139f9b5746SMichal Kazior 	 * PS-Poll for each and every buffered frame. This value is a bit
59149f9b5746SMichal Kazior 	 * arbitrary.
59159f9b5746SMichal Kazior 	 */
59169f9b5746SMichal Kazior 	WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3,
59175e3dd157SKalle Valo };
59185e3dd157SKalle Valo 
59195e3dd157SKalle Valo /*
59205e3dd157SKalle Valo  * This will include the delivery and trigger enabled state for every AC.
59215e3dd157SKalle Valo  * This is the negotiated state with AP. The host MLME needs to set this based
59225e3dd157SKalle Valo  * on AP capability and the state Set in the association request by the
59235e3dd157SKalle Valo  * station MLME.Lower 8 bits of the value specify the UAPSD configuration.
59245e3dd157SKalle Valo  */
59255e3dd157SKalle Valo #define WMI_UAPSD_AC_TYPE_DELI 0
59265e3dd157SKalle Valo #define WMI_UAPSD_AC_TYPE_TRIG 1
59275e3dd157SKalle Valo 
59285e3dd157SKalle Valo #define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5929e13dbeadSJoe Perches 	(type == WMI_UAPSD_AC_TYPE_DELI ? 1 << (ac << 1) : 1 << ((ac << 1) + 1))
59305e3dd157SKalle Valo 
59315e3dd157SKalle Valo enum wmi_sta_ps_param_uapsd {
59325e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
59335e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
59345e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
59355e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
59365e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
59375e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
59385e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
59395e3dd157SKalle Valo 	WMI_STA_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
59405e3dd157SKalle Valo };
59415e3dd157SKalle Valo 
59420c7e477cSJanusz Dziedzic #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
59430c7e477cSJanusz Dziedzic 
59440c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_param {
59450c7e477cSJanusz Dziedzic 	__le32 wmm_ac;
59460c7e477cSJanusz Dziedzic 	__le32 user_priority;
59470c7e477cSJanusz Dziedzic 	__le32 service_interval;
59480c7e477cSJanusz Dziedzic 	__le32 suspend_interval;
59490c7e477cSJanusz Dziedzic 	__le32 delay_interval;
59500c7e477cSJanusz Dziedzic };
59510c7e477cSJanusz Dziedzic 
59520c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
59530c7e477cSJanusz Dziedzic 	__le32 vdev_id;
59540c7e477cSJanusz Dziedzic 	struct wmi_mac_addr peer_macaddr;
59550c7e477cSJanusz Dziedzic 	__le32 num_ac;
59560c7e477cSJanusz Dziedzic };
59570c7e477cSJanusz Dziedzic 
59580c7e477cSJanusz Dziedzic struct wmi_sta_uapsd_auto_trig_arg {
59590c7e477cSJanusz Dziedzic 	u32 wmm_ac;
59600c7e477cSJanusz Dziedzic 	u32 user_priority;
59610c7e477cSJanusz Dziedzic 	u32 service_interval;
59620c7e477cSJanusz Dziedzic 	u32 suspend_interval;
59630c7e477cSJanusz Dziedzic 	u32 delay_interval;
59640c7e477cSJanusz Dziedzic };
59650c7e477cSJanusz Dziedzic 
59665e3dd157SKalle Valo enum wmi_sta_powersave_param {
59675e3dd157SKalle Valo 	/*
59685e3dd157SKalle Valo 	 * Controls how frames are retrievd from AP while STA is sleeping
59695e3dd157SKalle Valo 	 *
59705e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_param_rx_wake_policy)
59715e3dd157SKalle Valo 	 */
59725e3dd157SKalle Valo 	WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
59735e3dd157SKalle Valo 
59745e3dd157SKalle Valo 	/*
59755e3dd157SKalle Valo 	 * The STA will go active after this many TX
59765e3dd157SKalle Valo 	 *
59775e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_param_tx_wake_threshold)
59785e3dd157SKalle Valo 	 */
59795e3dd157SKalle Valo 	WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
59805e3dd157SKalle Valo 
59815e3dd157SKalle Valo 	/*
59825e3dd157SKalle Valo 	 * Number of PS-Poll to send before STA wakes up
59835e3dd157SKalle Valo 	 *
59845e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_param_pspoll_count)
59855e3dd157SKalle Valo 	 *
59865e3dd157SKalle Valo 	 */
59875e3dd157SKalle Valo 	WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
59885e3dd157SKalle Valo 
59895e3dd157SKalle Valo 	/*
59905e3dd157SKalle Valo 	 * TX/RX inactivity time in msec before going to sleep.
59915e3dd157SKalle Valo 	 *
59925e3dd157SKalle Valo 	 * The power save SM will monitor tx/rx activity on the VDEV, if no
59935e3dd157SKalle Valo 	 * activity for the specified msec of the parameter the Power save
59945e3dd157SKalle Valo 	 * SM will go to sleep.
59955e3dd157SKalle Valo 	 */
59965e3dd157SKalle Valo 	WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
59975e3dd157SKalle Valo 
59985e3dd157SKalle Valo 	/*
59995e3dd157SKalle Valo 	 * Set uapsd configuration.
60005e3dd157SKalle Valo 	 *
60015e3dd157SKalle Valo 	 * (see enum wmi_sta_ps_param_uapsd)
60025e3dd157SKalle Valo 	 */
60035e3dd157SKalle Valo 	WMI_STA_PS_PARAM_UAPSD = 4,
60045e3dd157SKalle Valo };
60055e3dd157SKalle Valo 
60065e3dd157SKalle Valo struct wmi_sta_powersave_param_cmd {
60075e3dd157SKalle Valo 	__le32 vdev_id;
60085e3dd157SKalle Valo 	__le32 param_id; /* %WMI_STA_PS_PARAM_ */
60095e3dd157SKalle Valo 	__le32 param_value;
60105e3dd157SKalle Valo } __packed;
60115e3dd157SKalle Valo 
60125e3dd157SKalle Valo /* No MIMO power save */
60135e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_DISABLE
60145e3dd157SKalle Valo /* mimo powersave mode static*/
60155e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_STATIC
60165e3dd157SKalle Valo /* mimo powersave mode dynamic */
60175e3dd157SKalle Valo #define WMI_STA_MIMO_PS_MODE_DYNAMIC
60185e3dd157SKalle Valo 
60195e3dd157SKalle Valo struct wmi_sta_mimo_ps_mode_cmd {
60205e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
60215e3dd157SKalle Valo 	__le32 vdev_id;
60225e3dd157SKalle Valo 	/* mimo powersave mode as defined above */
60235e3dd157SKalle Valo 	__le32 mimo_pwrsave_mode;
60245e3dd157SKalle Valo } __packed;
60255e3dd157SKalle Valo 
60265e3dd157SKalle Valo /* U-APSD configuration of peer station from (re)assoc request and TSPECs */
60275e3dd157SKalle Valo enum wmi_ap_ps_param_uapsd {
60285e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
60295e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
60305e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
60315e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
60325e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
60335e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
60345e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
60355e3dd157SKalle Valo 	WMI_AP_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
60365e3dd157SKalle Valo };
60375e3dd157SKalle Valo 
60385e3dd157SKalle Valo /* U-APSD maximum service period of peer station */
60395e3dd157SKalle Valo enum wmi_ap_ps_peer_param_max_sp {
60405e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
60415e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
60425e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
60435e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
60445e3dd157SKalle Valo 	MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
60455e3dd157SKalle Valo };
60465e3dd157SKalle Valo 
60475e3dd157SKalle Valo /*
60485e3dd157SKalle Valo  * AP power save parameter
60495e3dd157SKalle Valo  * Set a power save specific parameter for a peer station
60505e3dd157SKalle Valo  */
60515e3dd157SKalle Valo enum wmi_ap_ps_peer_param {
60525e3dd157SKalle Valo 	/* Set uapsd configuration for a given peer.
60535e3dd157SKalle Valo 	 *
60545e3dd157SKalle Valo 	 * Include the delivery and trigger enabled state for every AC.
60555e3dd157SKalle Valo 	 * The host  MLME needs to set this based on AP capability and stations
60565e3dd157SKalle Valo 	 * request Set in the association request  received from the station.
60575e3dd157SKalle Valo 	 *
60585e3dd157SKalle Valo 	 * Lower 8 bits of the value specify the UAPSD configuration.
60595e3dd157SKalle Valo 	 *
60605e3dd157SKalle Valo 	 * (see enum wmi_ap_ps_param_uapsd)
60615e3dd157SKalle Valo 	 * The default value is 0.
60625e3dd157SKalle Valo 	 */
60635e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_UAPSD = 0,
60645e3dd157SKalle Valo 
60655e3dd157SKalle Valo 	/*
60665e3dd157SKalle Valo 	 * Set the service period for a UAPSD capable station
60675e3dd157SKalle Valo 	 *
60685e3dd157SKalle Valo 	 * The service period from wme ie in the (re)assoc request frame.
60695e3dd157SKalle Valo 	 *
60705e3dd157SKalle Valo 	 * (see enum wmi_ap_ps_peer_param_max_sp)
60715e3dd157SKalle Valo 	 */
60725e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
60735e3dd157SKalle Valo 
60745e3dd157SKalle Valo 	/* Time in seconds for aging out buffered frames for STA in PS */
60755e3dd157SKalle Valo 	WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
60765e3dd157SKalle Valo };
60775e3dd157SKalle Valo 
60785e3dd157SKalle Valo struct wmi_ap_ps_peer_cmd {
60795e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
60805e3dd157SKalle Valo 	__le32 vdev_id;
60815e3dd157SKalle Valo 
60825e3dd157SKalle Valo 	/* peer MAC address */
60835e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
60845e3dd157SKalle Valo 
60855e3dd157SKalle Valo 	/* AP powersave param (see enum wmi_ap_ps_peer_param) */
60865e3dd157SKalle Valo 	__le32 param_id;
60875e3dd157SKalle Valo 
60885e3dd157SKalle Valo 	/* AP powersave param value */
60895e3dd157SKalle Valo 	__le32 param_value;
60905e3dd157SKalle Valo } __packed;
60915e3dd157SKalle Valo 
60925e3dd157SKalle Valo /* 128 clients = 4 words */
60935e3dd157SKalle Valo #define WMI_TIM_BITMAP_ARRAY_SIZE 4
60945e3dd157SKalle Valo 
60955e3dd157SKalle Valo struct wmi_tim_info {
60965e3dd157SKalle Valo 	__le32 tim_len;
60975e3dd157SKalle Valo 	__le32 tim_mcast;
60985e3dd157SKalle Valo 	__le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
60995e3dd157SKalle Valo 	__le32 tim_changed;
61005e3dd157SKalle Valo 	__le32 tim_num_ps_pending;
61015e3dd157SKalle Valo } __packed;
61025e3dd157SKalle Valo 
6103a03fee34SRaja Mani struct wmi_tim_info_arg {
6104a03fee34SRaja Mani 	__le32 tim_len;
6105a03fee34SRaja Mani 	__le32 tim_mcast;
6106a03fee34SRaja Mani 	const __le32 *tim_bitmap;
6107a03fee34SRaja Mani 	__le32 tim_changed;
6108a03fee34SRaja Mani 	__le32 tim_num_ps_pending;
6109a03fee34SRaja Mani } __packed;
6110a03fee34SRaja Mani 
61115e3dd157SKalle Valo /* Maximum number of NOA Descriptors supported */
61125e3dd157SKalle Valo #define WMI_P2P_MAX_NOA_DESCRIPTORS 4
61135e3dd157SKalle Valo #define WMI_P2P_OPPPS_ENABLE_BIT	BIT(0)
61145e3dd157SKalle Valo #define WMI_P2P_OPPPS_CTWINDOW_OFFSET	1
61155e3dd157SKalle Valo #define WMI_P2P_NOA_CHANGED_BIT	BIT(0)
61165e3dd157SKalle Valo 
61175e3dd157SKalle Valo struct wmi_p2p_noa_info {
61185e3dd157SKalle Valo 	/* Bit 0 - Flag to indicate an update in NOA schedule
611937ff1b0dSMarcin Rokicki 	 * Bits 7-1 - Reserved
612037ff1b0dSMarcin Rokicki 	 */
61215e3dd157SKalle Valo 	u8 changed;
61225e3dd157SKalle Valo 	/* NOA index */
61235e3dd157SKalle Valo 	u8 index;
61245e3dd157SKalle Valo 	/* Bit 0 - Opp PS state of the AP
612537ff1b0dSMarcin Rokicki 	 * Bits 1-7 - Ctwindow in TUs
612637ff1b0dSMarcin Rokicki 	 */
61275e3dd157SKalle Valo 	u8 ctwindow_oppps;
61285e3dd157SKalle Valo 	/* Number of NOA descriptors */
61295e3dd157SKalle Valo 	u8 num_descriptors;
61305e3dd157SKalle Valo 
61315e3dd157SKalle Valo 	struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
61325e3dd157SKalle Valo } __packed;
61335e3dd157SKalle Valo 
61345e3dd157SKalle Valo struct wmi_bcn_info {
61355e3dd157SKalle Valo 	struct wmi_tim_info tim_info;
61365e3dd157SKalle Valo 	struct wmi_p2p_noa_info p2p_noa_info;
61375e3dd157SKalle Valo } __packed;
61385e3dd157SKalle Valo 
61395e3dd157SKalle Valo struct wmi_host_swba_event {
61405e3dd157SKalle Valo 	__le32 vdev_map;
6141d3ed0cf0SGustavo A. R. Silva 	struct wmi_bcn_info bcn_info[];
61425e3dd157SKalle Valo } __packed;
61435e3dd157SKalle Valo 
61448b019fb0SYanbo Li struct wmi_10_2_4_bcn_info {
61458b019fb0SYanbo Li 	struct wmi_tim_info tim_info;
61468b019fb0SYanbo Li 	/* The 10.2.4 FW doesn't have p2p NOA info */
61478b019fb0SYanbo Li } __packed;
61488b019fb0SYanbo Li 
61498b019fb0SYanbo Li struct wmi_10_2_4_host_swba_event {
61508b019fb0SYanbo Li 	__le32 vdev_map;
6151d3ed0cf0SGustavo A. R. Silva 	struct wmi_10_2_4_bcn_info bcn_info[];
61528b019fb0SYanbo Li } __packed;
61538b019fb0SYanbo Li 
61543cec3be3SRaja Mani /* 16 words = 512 client + 1 word = for guard */
61553cec3be3SRaja Mani #define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17
61563cec3be3SRaja Mani 
61573cec3be3SRaja Mani struct wmi_10_4_tim_info {
61583cec3be3SRaja Mani 	__le32 tim_len;
61593cec3be3SRaja Mani 	__le32 tim_mcast;
61603cec3be3SRaja Mani 	__le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE];
61613cec3be3SRaja Mani 	__le32 tim_changed;
61623cec3be3SRaja Mani 	__le32 tim_num_ps_pending;
61633cec3be3SRaja Mani } __packed;
61643cec3be3SRaja Mani 
61653cec3be3SRaja Mani #define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1
61663cec3be3SRaja Mani 
61673cec3be3SRaja Mani struct wmi_10_4_p2p_noa_info {
61683cec3be3SRaja Mani 	/* Bit 0 - Flag to indicate an update in NOA schedule
61693cec3be3SRaja Mani 	 * Bits 7-1 - Reserved
61703cec3be3SRaja Mani 	 */
61713cec3be3SRaja Mani 	u8 changed;
61723cec3be3SRaja Mani 	/* NOA index */
61733cec3be3SRaja Mani 	u8 index;
61743cec3be3SRaja Mani 	/* Bit 0 - Opp PS state of the AP
61753cec3be3SRaja Mani 	 * Bits 1-7 - Ctwindow in TUs
61763cec3be3SRaja Mani 	 */
61773cec3be3SRaja Mani 	u8 ctwindow_oppps;
61783cec3be3SRaja Mani 	/* Number of NOA descriptors */
61793cec3be3SRaja Mani 	u8 num_descriptors;
61803cec3be3SRaja Mani 
61813cec3be3SRaja Mani 	struct wmi_p2p_noa_descriptor
61823cec3be3SRaja Mani 		noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS];
61833cec3be3SRaja Mani } __packed;
61843cec3be3SRaja Mani 
61853cec3be3SRaja Mani struct wmi_10_4_bcn_info {
61863cec3be3SRaja Mani 	struct wmi_10_4_tim_info tim_info;
61873cec3be3SRaja Mani 	struct wmi_10_4_p2p_noa_info p2p_noa_info;
61883cec3be3SRaja Mani } __packed;
61893cec3be3SRaja Mani 
61903cec3be3SRaja Mani struct wmi_10_4_host_swba_event {
61913cec3be3SRaja Mani 	__le32 vdev_map;
6192d3ed0cf0SGustavo A. R. Silva 	struct wmi_10_4_bcn_info bcn_info[];
61933cec3be3SRaja Mani } __packed;
61943cec3be3SRaja Mani 
61955e3dd157SKalle Valo #define WMI_MAX_AP_VDEV 16
61965e3dd157SKalle Valo 
61975e3dd157SKalle Valo struct wmi_tbtt_offset_event {
61985e3dd157SKalle Valo 	__le32 vdev_map;
61995e3dd157SKalle Valo 	__le32 tbttoffset_list[WMI_MAX_AP_VDEV];
62005e3dd157SKalle Valo } __packed;
62015e3dd157SKalle Valo 
62025e3dd157SKalle Valo struct wmi_peer_create_cmd {
62035e3dd157SKalle Valo 	__le32 vdev_id;
62045e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
6205be5b4f40SManikanta Pubbisetty 	__le32 peer_type;
62065e3dd157SKalle Valo } __packed;
62075e3dd157SKalle Valo 
62087390ed34SMarek Puzyniak enum wmi_peer_type {
62097390ed34SMarek Puzyniak 	WMI_PEER_TYPE_DEFAULT = 0,
62107390ed34SMarek Puzyniak 	WMI_PEER_TYPE_BSS = 1,
62117390ed34SMarek Puzyniak 	WMI_PEER_TYPE_TDLS = 2,
62127390ed34SMarek Puzyniak };
62137390ed34SMarek Puzyniak 
62145e3dd157SKalle Valo struct wmi_peer_delete_cmd {
62155e3dd157SKalle Valo 	__le32 vdev_id;
62165e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62175e3dd157SKalle Valo } __packed;
62185e3dd157SKalle Valo 
62195e3dd157SKalle Valo struct wmi_peer_flush_tids_cmd {
62205e3dd157SKalle Valo 	__le32 vdev_id;
62215e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62225e3dd157SKalle Valo 	__le32 peer_tid_bitmap;
62235e3dd157SKalle Valo } __packed;
62245e3dd157SKalle Valo 
62255e3dd157SKalle Valo struct wmi_fixed_rate {
62265e3dd157SKalle Valo 	/*
62275e3dd157SKalle Valo 	 * rate mode . 0: disable fixed rate (auto rate)
62285e3dd157SKalle Valo 	 *   1: legacy (non 11n) rate  specified as ieee rate 2*Mbps
62295e3dd157SKalle Valo 	 *   2: ht20 11n rate  specified as mcs index
62305e3dd157SKalle Valo 	 *   3: ht40 11n rate  specified as mcs index
62315e3dd157SKalle Valo 	 */
62325e3dd157SKalle Valo 	__le32  rate_mode;
62335e3dd157SKalle Valo 	/*
62345e3dd157SKalle Valo 	 * 4 rate values for 4 rate series. series 0 is stored in byte 0 (LSB)
62355e3dd157SKalle Valo 	 * and series 3 is stored at byte 3 (MSB)
62365e3dd157SKalle Valo 	 */
62375e3dd157SKalle Valo 	__le32  rate_series;
62385e3dd157SKalle Valo 	/*
62395e3dd157SKalle Valo 	 * 4 retry counts for 4 rate series. retry count for rate 0 is stored
62405e3dd157SKalle Valo 	 * in byte 0 (LSB) and retry count for rate 3 is stored at byte 3
62415e3dd157SKalle Valo 	 * (MSB)
62425e3dd157SKalle Valo 	 */
62435e3dd157SKalle Valo 	__le32  rate_retries;
62445e3dd157SKalle Valo } __packed;
62455e3dd157SKalle Valo 
62465e3dd157SKalle Valo struct wmi_peer_fixed_rate_cmd {
62475e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
62485e3dd157SKalle Valo 	__le32 vdev_id;
62495e3dd157SKalle Valo 	/* peer MAC address */
62505e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62515e3dd157SKalle Valo 	/* fixed rate */
62525e3dd157SKalle Valo 	struct wmi_fixed_rate peer_fixed_rate;
62535e3dd157SKalle Valo } __packed;
62545e3dd157SKalle Valo 
62555e3dd157SKalle Valo #define WMI_MGMT_TID    17
62565e3dd157SKalle Valo 
62575e3dd157SKalle Valo struct wmi_addba_clear_resp_cmd {
62585e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
62595e3dd157SKalle Valo 	__le32 vdev_id;
62605e3dd157SKalle Valo 	/* peer MAC address */
62615e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62625e3dd157SKalle Valo } __packed;
62635e3dd157SKalle Valo 
62645e3dd157SKalle Valo struct wmi_addba_send_cmd {
62655e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
62665e3dd157SKalle Valo 	__le32 vdev_id;
62675e3dd157SKalle Valo 	/* peer MAC address */
62685e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62695e3dd157SKalle Valo 	/* Tid number */
62705e3dd157SKalle Valo 	__le32 tid;
62715e3dd157SKalle Valo 	/* Buffer/Window size*/
62725e3dd157SKalle Valo 	__le32 buffersize;
62735e3dd157SKalle Valo } __packed;
62745e3dd157SKalle Valo 
62755e3dd157SKalle Valo struct wmi_delba_send_cmd {
62765e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
62775e3dd157SKalle Valo 	__le32 vdev_id;
62785e3dd157SKalle Valo 	/* peer MAC address */
62795e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62805e3dd157SKalle Valo 	/* Tid number */
62815e3dd157SKalle Valo 	__le32 tid;
62825e3dd157SKalle Valo 	/* Is Initiator */
62835e3dd157SKalle Valo 	__le32 initiator;
62845e3dd157SKalle Valo 	/* Reason code */
62855e3dd157SKalle Valo 	__le32 reasoncode;
62865e3dd157SKalle Valo } __packed;
62875e3dd157SKalle Valo 
62885e3dd157SKalle Valo struct wmi_addba_setresponse_cmd {
62895e3dd157SKalle Valo 	/* unique id identifying the vdev, generated by the caller */
62905e3dd157SKalle Valo 	__le32 vdev_id;
62915e3dd157SKalle Valo 	/* peer mac address */
62925e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
62935e3dd157SKalle Valo 	/* Tid number */
62945e3dd157SKalle Valo 	__le32 tid;
62955e3dd157SKalle Valo 	/* status code */
62965e3dd157SKalle Valo 	__le32 statuscode;
62975e3dd157SKalle Valo } __packed;
62985e3dd157SKalle Valo 
62995e3dd157SKalle Valo struct wmi_send_singleamsdu_cmd {
63005e3dd157SKalle Valo 	/* unique id identifying the vdev, generated by the caller */
63015e3dd157SKalle Valo 	__le32 vdev_id;
63025e3dd157SKalle Valo 	/* peer mac address */
63035e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
63045e3dd157SKalle Valo 	/* Tid number */
63055e3dd157SKalle Valo 	__le32 tid;
63065e3dd157SKalle Valo } __packed;
63075e3dd157SKalle Valo 
63085e3dd157SKalle Valo enum wmi_peer_smps_state {
63095e3dd157SKalle Valo 	WMI_PEER_SMPS_PS_NONE = 0x0,
63105e3dd157SKalle Valo 	WMI_PEER_SMPS_STATIC  = 0x1,
63115e3dd157SKalle Valo 	WMI_PEER_SMPS_DYNAMIC = 0x2
63125e3dd157SKalle Valo };
63135e3dd157SKalle Valo 
63149797febcSMichal Kazior enum wmi_peer_chwidth {
63159797febcSMichal Kazior 	WMI_PEER_CHWIDTH_20MHZ = 0,
63169797febcSMichal Kazior 	WMI_PEER_CHWIDTH_40MHZ = 1,
63179797febcSMichal Kazior 	WMI_PEER_CHWIDTH_80MHZ = 2,
6318bc1efd73SSebastian Gottschall 	WMI_PEER_CHWIDTH_160MHZ = 3,
63199797febcSMichal Kazior };
63209797febcSMichal Kazior 
63215e3dd157SKalle Valo enum wmi_peer_param {
63225e3dd157SKalle Valo 	WMI_PEER_SMPS_STATE = 0x1, /* see %wmi_peer_smps_state */
63235e3dd157SKalle Valo 	WMI_PEER_AMPDU      = 0x2,
63245e3dd157SKalle Valo 	WMI_PEER_AUTHORIZE  = 0x3,
63255e3dd157SKalle Valo 	WMI_PEER_CHAN_WIDTH = 0x4,
63265e3dd157SKalle Valo 	WMI_PEER_NSS        = 0x5,
63270a987fb0SMichal Kazior 	WMI_PEER_USE_4ADDR  = 0x6,
632833410a51SAshok Raj Nagarajan 	WMI_PEER_USE_FIXED_PWR = 0x8,
63298b97b055SMiaoqing Pan 	WMI_PEER_PARAM_FIXED_RATE = 0x9,
6330ee8b08a1SMaharaja Kennadyrajan 	WMI_PEER_DEBUG      = 0xa,
63319191fc2aSRyan Hsu 	WMI_PEER_PHYMODE    = 0xd,
63320a987fb0SMichal Kazior 	WMI_PEER_DUMMY_VAR  = 0xff, /* dummy parameter for STA PS workaround */
63335e3dd157SKalle Valo };
63345e3dd157SKalle Valo 
63355e3dd157SKalle Valo struct wmi_peer_set_param_cmd {
63365e3dd157SKalle Valo 	__le32 vdev_id;
63375e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
63385e3dd157SKalle Valo 	__le32 param_id;
63395e3dd157SKalle Valo 	__le32 param_value;
63405e3dd157SKalle Valo } __packed;
63415e3dd157SKalle Valo 
63425e3dd157SKalle Valo #define MAX_SUPPORTED_RATES 128
63435e3dd157SKalle Valo 
63445e3dd157SKalle Valo struct wmi_rate_set {
63455e3dd157SKalle Valo 	/* total number of rates */
63465e3dd157SKalle Valo 	__le32 num_rates;
63475e3dd157SKalle Valo 	/*
63485e3dd157SKalle Valo 	 * rates (each 8bit value) packed into a 32 bit word.
63495e3dd157SKalle Valo 	 * the rates are filled from least significant byte to most
63505e3dd157SKalle Valo 	 * significant byte.
63515e3dd157SKalle Valo 	 */
63525e3dd157SKalle Valo 	__le32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
63535e3dd157SKalle Valo } __packed;
63545e3dd157SKalle Valo 
63555e3dd157SKalle Valo struct wmi_rate_set_arg {
63565e3dd157SKalle Valo 	unsigned int num_rates;
63575e3dd157SKalle Valo 	u8 rates[MAX_SUPPORTED_RATES];
63585e3dd157SKalle Valo };
63595e3dd157SKalle Valo 
63605e3dd157SKalle Valo /*
63615e3dd157SKalle Valo  * NOTE: It would bea good idea to represent the Tx MCS
63625e3dd157SKalle Valo  * info in one word and Rx in another word. This is split
63635e3dd157SKalle Valo  * into multiple words for convenience
63645e3dd157SKalle Valo  */
63655e3dd157SKalle Valo struct wmi_vht_rate_set {
63665e3dd157SKalle Valo 	__le32 rx_max_rate; /* Max Rx data rate */
63675e3dd157SKalle Valo 	__le32 rx_mcs_set;  /* Negotiated RX VHT rates */
63685e3dd157SKalle Valo 	__le32 tx_max_rate; /* Max Tx data rate */
63695e3dd157SKalle Valo 	__le32 tx_mcs_set;  /* Negotiated TX VHT rates */
63705e3dd157SKalle Valo } __packed;
63715e3dd157SKalle Valo 
63725e3dd157SKalle Valo struct wmi_vht_rate_set_arg {
63735e3dd157SKalle Valo 	u32 rx_max_rate;
63745e3dd157SKalle Valo 	u32 rx_mcs_set;
63755e3dd157SKalle Valo 	u32 tx_max_rate;
63765e3dd157SKalle Valo 	u32 tx_mcs_set;
63775e3dd157SKalle Valo };
63785e3dd157SKalle Valo 
63795e3dd157SKalle Valo struct wmi_peer_set_rates_cmd {
63805e3dd157SKalle Valo 	/* peer MAC address */
63815e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
63825e3dd157SKalle Valo 	/* legacy rate set */
63835e3dd157SKalle Valo 	struct wmi_rate_set peer_legacy_rates;
63845e3dd157SKalle Valo 	/* ht rate set */
63855e3dd157SKalle Valo 	struct wmi_rate_set peer_ht_rates;
63865e3dd157SKalle Valo } __packed;
63875e3dd157SKalle Valo 
63885e3dd157SKalle Valo struct wmi_peer_set_q_empty_callback_cmd {
63895e3dd157SKalle Valo 	/* unique id identifying the VDEV, generated by the caller */
63905e3dd157SKalle Valo 	__le32 vdev_id;
63915e3dd157SKalle Valo 	/* peer MAC address */
63925e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
63935e3dd157SKalle Valo 	__le32 callback_enable;
63945e3dd157SKalle Valo } __packed;
63955e3dd157SKalle Valo 
63963fab30f7STamizh chelvam struct wmi_peer_flags_map {
63973fab30f7STamizh chelvam 	u32 auth;
63983fab30f7STamizh chelvam 	u32 qos;
63993fab30f7STamizh chelvam 	u32 need_ptk_4_way;
64003fab30f7STamizh chelvam 	u32 need_gtk_2_way;
64013fab30f7STamizh chelvam 	u32 apsd;
64023fab30f7STamizh chelvam 	u32 ht;
64033fab30f7STamizh chelvam 	u32 bw40;
64043fab30f7STamizh chelvam 	u32 stbc;
64053fab30f7STamizh chelvam 	u32 ldbc;
64063fab30f7STamizh chelvam 	u32 dyn_mimops;
64073fab30f7STamizh chelvam 	u32 static_mimops;
64083fab30f7STamizh chelvam 	u32 spatial_mux;
64093fab30f7STamizh chelvam 	u32 vht;
64103fab30f7STamizh chelvam 	u32 bw80;
64113fab30f7STamizh chelvam 	u32 vht_2g;
64123fab30f7STamizh chelvam 	u32 pmf;
6413bc1efd73SSebastian Gottschall 	u32 bw160;
64143fab30f7STamizh chelvam };
64153fab30f7STamizh chelvam 
64163fab30f7STamizh chelvam enum wmi_peer_flags {
64173fab30f7STamizh chelvam 	WMI_PEER_AUTH = 0x00000001,
64183fab30f7STamizh chelvam 	WMI_PEER_QOS = 0x00000002,
64193fab30f7STamizh chelvam 	WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
64203fab30f7STamizh chelvam 	WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
64213fab30f7STamizh chelvam 	WMI_PEER_APSD = 0x00000800,
64223fab30f7STamizh chelvam 	WMI_PEER_HT = 0x00001000,
64233fab30f7STamizh chelvam 	WMI_PEER_40MHZ = 0x00002000,
64243fab30f7STamizh chelvam 	WMI_PEER_STBC = 0x00008000,
64253fab30f7STamizh chelvam 	WMI_PEER_LDPC = 0x00010000,
64263fab30f7STamizh chelvam 	WMI_PEER_DYN_MIMOPS = 0x00020000,
64273fab30f7STamizh chelvam 	WMI_PEER_STATIC_MIMOPS = 0x00040000,
64283fab30f7STamizh chelvam 	WMI_PEER_SPATIAL_MUX = 0x00200000,
64293fab30f7STamizh chelvam 	WMI_PEER_VHT = 0x02000000,
64303fab30f7STamizh chelvam 	WMI_PEER_80MHZ = 0x04000000,
64313fab30f7STamizh chelvam 	WMI_PEER_VHT_2G = 0x08000000,
64323fab30f7STamizh chelvam 	WMI_PEER_PMF = 0x10000000,
6433bc1efd73SSebastian Gottschall 	WMI_PEER_160MHZ = 0x20000000
64343fab30f7STamizh chelvam };
64353fab30f7STamizh chelvam 
64363fab30f7STamizh chelvam enum wmi_10x_peer_flags {
64373fab30f7STamizh chelvam 	WMI_10X_PEER_AUTH = 0x00000001,
64383fab30f7STamizh chelvam 	WMI_10X_PEER_QOS = 0x00000002,
64393fab30f7STamizh chelvam 	WMI_10X_PEER_NEED_PTK_4_WAY = 0x00000004,
64403fab30f7STamizh chelvam 	WMI_10X_PEER_NEED_GTK_2_WAY = 0x00000010,
64413fab30f7STamizh chelvam 	WMI_10X_PEER_APSD = 0x00000800,
64423fab30f7STamizh chelvam 	WMI_10X_PEER_HT = 0x00001000,
64433fab30f7STamizh chelvam 	WMI_10X_PEER_40MHZ = 0x00002000,
64443fab30f7STamizh chelvam 	WMI_10X_PEER_STBC = 0x00008000,
64453fab30f7STamizh chelvam 	WMI_10X_PEER_LDPC = 0x00010000,
64463fab30f7STamizh chelvam 	WMI_10X_PEER_DYN_MIMOPS = 0x00020000,
64473fab30f7STamizh chelvam 	WMI_10X_PEER_STATIC_MIMOPS = 0x00040000,
64483fab30f7STamizh chelvam 	WMI_10X_PEER_SPATIAL_MUX = 0x00200000,
64493fab30f7STamizh chelvam 	WMI_10X_PEER_VHT = 0x02000000,
64503fab30f7STamizh chelvam 	WMI_10X_PEER_80MHZ = 0x04000000,
6451bc1efd73SSebastian Gottschall 	WMI_10X_PEER_160MHZ = 0x20000000
64523fab30f7STamizh chelvam };
64533fab30f7STamizh chelvam 
64543fab30f7STamizh chelvam enum wmi_10_2_peer_flags {
64553fab30f7STamizh chelvam 	WMI_10_2_PEER_AUTH = 0x00000001,
64563fab30f7STamizh chelvam 	WMI_10_2_PEER_QOS = 0x00000002,
64573fab30f7STamizh chelvam 	WMI_10_2_PEER_NEED_PTK_4_WAY = 0x00000004,
64583fab30f7STamizh chelvam 	WMI_10_2_PEER_NEED_GTK_2_WAY = 0x00000010,
64593fab30f7STamizh chelvam 	WMI_10_2_PEER_APSD = 0x00000800,
64603fab30f7STamizh chelvam 	WMI_10_2_PEER_HT = 0x00001000,
64613fab30f7STamizh chelvam 	WMI_10_2_PEER_40MHZ = 0x00002000,
64623fab30f7STamizh chelvam 	WMI_10_2_PEER_STBC = 0x00008000,
64633fab30f7STamizh chelvam 	WMI_10_2_PEER_LDPC = 0x00010000,
64643fab30f7STamizh chelvam 	WMI_10_2_PEER_DYN_MIMOPS = 0x00020000,
64653fab30f7STamizh chelvam 	WMI_10_2_PEER_STATIC_MIMOPS = 0x00040000,
64663fab30f7STamizh chelvam 	WMI_10_2_PEER_SPATIAL_MUX = 0x00200000,
64673fab30f7STamizh chelvam 	WMI_10_2_PEER_VHT = 0x02000000,
64683fab30f7STamizh chelvam 	WMI_10_2_PEER_80MHZ = 0x04000000,
64693fab30f7STamizh chelvam 	WMI_10_2_PEER_VHT_2G = 0x08000000,
64703fab30f7STamizh chelvam 	WMI_10_2_PEER_PMF = 0x10000000,
6471bc1efd73SSebastian Gottschall 	WMI_10_2_PEER_160MHZ = 0x20000000
64723fab30f7STamizh chelvam };
64735e3dd157SKalle Valo 
64745e3dd157SKalle Valo /*
64755e3dd157SKalle Valo  * Peer rate capabilities.
64765e3dd157SKalle Valo  *
64775e3dd157SKalle Valo  * This is of interest to the ratecontrol
64785e3dd157SKalle Valo  * module which resides in the firmware. The bit definitions are
64795e3dd157SKalle Valo  * consistent with that defined in if_athrate.c.
64805e3dd157SKalle Valo  */
64815e3dd157SKalle Valo #define WMI_RC_DS_FLAG          0x01
64825e3dd157SKalle Valo #define WMI_RC_CW40_FLAG        0x02
64835e3dd157SKalle Valo #define WMI_RC_SGI_FLAG         0x04
64845e3dd157SKalle Valo #define WMI_RC_HT_FLAG          0x08
64855e3dd157SKalle Valo #define WMI_RC_RTSCTS_FLAG      0x10
64865e3dd157SKalle Valo #define WMI_RC_TX_STBC_FLAG     0x20
64875e3dd157SKalle Valo #define WMI_RC_RX_STBC_FLAG     0xC0
64885e3dd157SKalle Valo #define WMI_RC_RX_STBC_FLAG_S   6
64895e3dd157SKalle Valo #define WMI_RC_WEP_TKIP_FLAG    0x100
64905e3dd157SKalle Valo #define WMI_RC_TS_FLAG          0x200
64915e3dd157SKalle Valo #define WMI_RC_UAPSD_FLAG       0x400
64925e3dd157SKalle Valo 
64935e3dd157SKalle Valo /* Maximum listen interval supported by hw in units of beacon interval */
64945e3dd157SKalle Valo #define ATH10K_MAX_HW_LISTEN_INTERVAL 5
64955e3dd157SKalle Valo 
649624c88f78SMichal Kazior struct wmi_common_peer_assoc_complete_cmd {
64975e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
64985e3dd157SKalle Valo 	__le32 vdev_id;
64995e3dd157SKalle Valo 	__le32 peer_new_assoc; /* 1=assoc, 0=reassoc */
65005e3dd157SKalle Valo 	__le32 peer_associd; /* 16 LSBs */
65015e3dd157SKalle Valo 	__le32 peer_flags;
65025e3dd157SKalle Valo 	__le32 peer_caps; /* 16 LSBs */
65035e3dd157SKalle Valo 	__le32 peer_listen_intval;
65045e3dd157SKalle Valo 	__le32 peer_ht_caps;
65055e3dd157SKalle Valo 	__le32 peer_max_mpdu;
65065e3dd157SKalle Valo 	__le32 peer_mpdu_density; /* 0..16 */
65075e3dd157SKalle Valo 	__le32 peer_rate_caps;
65085e3dd157SKalle Valo 	struct wmi_rate_set peer_legacy_rates;
65095e3dd157SKalle Valo 	struct wmi_rate_set peer_ht_rates;
65105e3dd157SKalle Valo 	__le32 peer_nss; /* num of spatial streams */
65115e3dd157SKalle Valo 	__le32 peer_vht_caps;
65125e3dd157SKalle Valo 	__le32 peer_phymode;
65135e3dd157SKalle Valo 	struct wmi_vht_rate_set peer_vht_rates;
651424c88f78SMichal Kazior };
651524c88f78SMichal Kazior 
651624c88f78SMichal Kazior struct wmi_main_peer_assoc_complete_cmd {
651724c88f78SMichal Kazior 	struct wmi_common_peer_assoc_complete_cmd cmd;
651824c88f78SMichal Kazior 
65195e3dd157SKalle Valo 	/* HT Operation Element of the peer. Five bytes packed in 2
652037ff1b0dSMarcin Rokicki 	 *  INT32 array and filled from lsb to msb.
652137ff1b0dSMarcin Rokicki 	 */
65225e3dd157SKalle Valo 	__le32 peer_ht_info[2];
65235e3dd157SKalle Valo } __packed;
65245e3dd157SKalle Valo 
652524c88f78SMichal Kazior struct wmi_10_1_peer_assoc_complete_cmd {
652624c88f78SMichal Kazior 	struct wmi_common_peer_assoc_complete_cmd cmd;
652724c88f78SMichal Kazior } __packed;
652824c88f78SMichal Kazior 
652924c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0
653024c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f
653124c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4
653224c88f78SMichal Kazior #define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0
653324c88f78SMichal Kazior 
653424c88f78SMichal Kazior struct wmi_10_2_peer_assoc_complete_cmd {
653524c88f78SMichal Kazior 	struct wmi_common_peer_assoc_complete_cmd cmd;
653624c88f78SMichal Kazior 	__le32 info0; /* WMI_PEER_ASSOC_INFO0_ */
653724c88f78SMichal Kazior } __packed;
653824c88f78SMichal Kazior 
65393db24065SLei Wang /* NSS Mapping to FW */
65403db24065SLei Wang #define WMI_PEER_NSS_MAP_ENABLE	BIT(31)
65413db24065SLei Wang #define WMI_PEER_NSS_160MHZ_MASK	GENMASK(2, 0)
65423db24065SLei Wang #define WMI_PEER_NSS_80_80MHZ_MASK	GENMASK(5, 3)
6543cc914a55SBen Greear 
6544b54e16f1SVasanthakumar Thiagarajan struct wmi_10_4_peer_assoc_complete_cmd {
6545b54e16f1SVasanthakumar Thiagarajan 	struct wmi_10_2_peer_assoc_complete_cmd cmd;
6546b54e16f1SVasanthakumar Thiagarajan 	__le32 peer_bw_rxnss_override;
6547b54e16f1SVasanthakumar Thiagarajan } __packed;
6548b54e16f1SVasanthakumar Thiagarajan 
65495e3dd157SKalle Valo struct wmi_peer_assoc_complete_arg {
65505e3dd157SKalle Valo 	u8 addr[ETH_ALEN];
65515e3dd157SKalle Valo 	u32 vdev_id;
65525e3dd157SKalle Valo 	bool peer_reassoc;
65535e3dd157SKalle Valo 	u16 peer_aid;
65545e3dd157SKalle Valo 	u32 peer_flags; /* see %WMI_PEER_ */
65555e3dd157SKalle Valo 	u16 peer_caps;
65565e3dd157SKalle Valo 	u32 peer_listen_intval;
65575e3dd157SKalle Valo 	u32 peer_ht_caps;
65585e3dd157SKalle Valo 	u32 peer_max_mpdu;
65595e3dd157SKalle Valo 	u32 peer_mpdu_density; /* 0..16 */
65605e3dd157SKalle Valo 	u32 peer_rate_caps; /* see %WMI_RC_ */
65615e3dd157SKalle Valo 	struct wmi_rate_set_arg peer_legacy_rates;
65625e3dd157SKalle Valo 	struct wmi_rate_set_arg peer_ht_rates;
65635e3dd157SKalle Valo 	u32 peer_num_spatial_streams;
65645e3dd157SKalle Valo 	u32 peer_vht_caps;
65655e3dd157SKalle Valo 	enum wmi_phy_mode peer_phymode;
65665e3dd157SKalle Valo 	struct wmi_vht_rate_set_arg peer_vht_rates;
6567cc914a55SBen Greear 	u32 peer_bw_rxnss_override;
65685e3dd157SKalle Valo };
65695e3dd157SKalle Valo 
65705e3dd157SKalle Valo struct wmi_peer_add_wds_entry_cmd {
65715e3dd157SKalle Valo 	/* peer MAC address */
65725e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
65735e3dd157SKalle Valo 	/* wds MAC addr */
65745e3dd157SKalle Valo 	struct wmi_mac_addr wds_macaddr;
65755e3dd157SKalle Valo } __packed;
65765e3dd157SKalle Valo 
65775e3dd157SKalle Valo struct wmi_peer_remove_wds_entry_cmd {
65785e3dd157SKalle Valo 	/* wds MAC addr */
65795e3dd157SKalle Valo 	struct wmi_mac_addr wds_macaddr;
65805e3dd157SKalle Valo } __packed;
65815e3dd157SKalle Valo 
65825e3dd157SKalle Valo struct wmi_peer_q_empty_callback_event {
65835e3dd157SKalle Valo 	/* peer MAC address */
65845e3dd157SKalle Valo 	struct wmi_mac_addr peer_macaddr;
65855e3dd157SKalle Valo } __packed;
65865e3dd157SKalle Valo 
65875e3dd157SKalle Valo /*
65885e3dd157SKalle Valo  * Channel info WMI event
65895e3dd157SKalle Valo  */
65905e3dd157SKalle Valo struct wmi_chan_info_event {
65915e3dd157SKalle Valo 	__le32 err_code;
65925e3dd157SKalle Valo 	__le32 freq;
65935e3dd157SKalle Valo 	__le32 cmd_flags;
65945e3dd157SKalle Valo 	__le32 noise_floor;
65955e3dd157SKalle Valo 	__le32 rx_clear_count;
65965e3dd157SKalle Valo 	__le32 cycle_count;
65975e3dd157SKalle Valo } __packed;
65985e3dd157SKalle Valo 
6599b2297baaSRaja Mani struct wmi_10_4_chan_info_event {
6600b2297baaSRaja Mani 	__le32 err_code;
6601b2297baaSRaja Mani 	__le32 freq;
6602b2297baaSRaja Mani 	__le32 cmd_flags;
6603b2297baaSRaja Mani 	__le32 noise_floor;
6604b2297baaSRaja Mani 	__le32 rx_clear_count;
6605b2297baaSRaja Mani 	__le32 cycle_count;
6606b2297baaSRaja Mani 	__le32 chan_tx_pwr_range;
6607b2297baaSRaja Mani 	__le32 chan_tx_pwr_tp;
6608b2297baaSRaja Mani 	__le32 rx_frame_count;
6609b2297baaSRaja Mani } __packed;
6610b2297baaSRaja Mani 
66115a13e76eSKalle Valo struct wmi_peer_sta_kickout_event {
66125a13e76eSKalle Valo 	struct wmi_mac_addr peer_macaddr;
66135a13e76eSKalle Valo } __packed;
66145a13e76eSKalle Valo 
66152e1dea40SMichal Kazior #define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
66163d2a2e29SVasanthakumar Thiagarajan #define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1)
66172e1dea40SMichal Kazior 
66185e3dd157SKalle Valo /* Beacon filter wmi command info */
66195e3dd157SKalle Valo #define BCN_FLT_MAX_SUPPORTED_IES	256
66205e3dd157SKalle Valo #define BCN_FLT_MAX_ELEMS_IE_LIST	(BCN_FLT_MAX_SUPPORTED_IES / 32)
66215e3dd157SKalle Valo 
66225e3dd157SKalle Valo struct bss_bcn_stats {
66235e3dd157SKalle Valo 	__le32 vdev_id;
66245e3dd157SKalle Valo 	__le32 bss_bcnsdropped;
66255e3dd157SKalle Valo 	__le32 bss_bcnsdelivered;
66265e3dd157SKalle Valo } __packed;
66275e3dd157SKalle Valo 
66285e3dd157SKalle Valo struct bcn_filter_stats {
66295e3dd157SKalle Valo 	__le32 bcns_dropped;
66305e3dd157SKalle Valo 	__le32 bcns_delivered;
66315e3dd157SKalle Valo 	__le32 activefilters;
66325e3dd157SKalle Valo 	struct bss_bcn_stats bss_stats;
66335e3dd157SKalle Valo } __packed;
66345e3dd157SKalle Valo 
66355e3dd157SKalle Valo struct wmi_add_bcn_filter_cmd {
66365e3dd157SKalle Valo 	u32 vdev_id;
66375e3dd157SKalle Valo 	u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
66385e3dd157SKalle Valo } __packed;
66395e3dd157SKalle Valo 
66405e3dd157SKalle Valo enum wmi_sta_keepalive_method {
66415e3dd157SKalle Valo 	WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
66425e3dd157SKalle Valo 	WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2,
66435e3dd157SKalle Valo };
66445e3dd157SKalle Valo 
664546725b15SMichal Kazior #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
664646725b15SMichal Kazior 
664746725b15SMichal Kazior /* Firmware crashes if keepalive interval exceeds this limit */
664846725b15SMichal Kazior #define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff
664946725b15SMichal Kazior 
66505e3dd157SKalle Valo /* note: ip4 addresses are in network byte order, i.e. big endian */
66515e3dd157SKalle Valo struct wmi_sta_keepalive_arp_resp {
66525e3dd157SKalle Valo 	__be32 src_ip4_addr;
66535e3dd157SKalle Valo 	__be32 dest_ip4_addr;
66545e3dd157SKalle Valo 	struct wmi_mac_addr dest_mac_addr;
66555e3dd157SKalle Valo } __packed;
66565e3dd157SKalle Valo 
66575e3dd157SKalle Valo struct wmi_sta_keepalive_cmd {
66585e3dd157SKalle Valo 	__le32 vdev_id;
66595e3dd157SKalle Valo 	__le32 enabled;
66605e3dd157SKalle Valo 	__le32 method; /* WMI_STA_KEEPALIVE_METHOD_ */
66615e3dd157SKalle Valo 	__le32 interval; /* in seconds */
66625e3dd157SKalle Valo 	struct wmi_sta_keepalive_arp_resp arp_resp;
66635e3dd157SKalle Valo } __packed;
66645e3dd157SKalle Valo 
66656e8b188bSJanusz Dziedzic struct wmi_sta_keepalive_arg {
66666e8b188bSJanusz Dziedzic 	u32 vdev_id;
66676e8b188bSJanusz Dziedzic 	u32 enabled;
66686e8b188bSJanusz Dziedzic 	u32 method;
66696e8b188bSJanusz Dziedzic 	u32 interval;
66706e8b188bSJanusz Dziedzic 	__be32 src_ip4_addr;
66716e8b188bSJanusz Dziedzic 	__be32 dest_ip4_addr;
66726e8b188bSJanusz Dziedzic 	const u8 dest_mac_addr[ETH_ALEN];
66736e8b188bSJanusz Dziedzic };
66746e8b188bSJanusz Dziedzic 
66759cfbce75SMichal Kazior enum wmi_force_fw_hang_type {
66769cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_ASSERT = 1,
66779cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_NO_DETECT,
66789cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_CTRL_EP_FULL,
66799cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_EMPTY_POINT,
66809cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_STACK_OVERFLOW,
66819cfbce75SMichal Kazior 	WMI_FORCE_FW_HANG_INFINITE_LOOP,
66829cfbce75SMichal Kazior };
66839cfbce75SMichal Kazior 
66849cfbce75SMichal Kazior #define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF
66859cfbce75SMichal Kazior 
66869cfbce75SMichal Kazior struct wmi_force_fw_hang_cmd {
66879cfbce75SMichal Kazior 	__le32 type;
66889cfbce75SMichal Kazior 	__le32 delay_ms;
66899cfbce75SMichal Kazior } __packed;
66909cfbce75SMichal Kazior 
6691db251d7dSMaharaja Kennadyrajan enum wmi_pdev_reset_mode_type {
6692db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_TX_FLUSH = 1,
6693db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_WARM_RESET,
6694db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_COLD_RESET,
6695db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_WARM_RESET_RESTORE_CAL,
6696db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_COLD_RESET_RESTORE_CAL,
6697db251d7dSMaharaja Kennadyrajan 	WMI_RST_MODE_MAX,
6698db251d7dSMaharaja Kennadyrajan };
6699db251d7dSMaharaja Kennadyrajan 
6700f118a3e5SKalle Valo enum ath10k_dbglog_level {
6701f118a3e5SKalle Valo 	ATH10K_DBGLOG_LEVEL_VERBOSE = 0,
6702f118a3e5SKalle Valo 	ATH10K_DBGLOG_LEVEL_INFO = 1,
6703f118a3e5SKalle Valo 	ATH10K_DBGLOG_LEVEL_WARN = 2,
6704f118a3e5SKalle Valo 	ATH10K_DBGLOG_LEVEL_ERR = 3,
6705f118a3e5SKalle Valo };
6706f118a3e5SKalle Valo 
6707f118a3e5SKalle Valo /* VAP ids to enable dbglog */
6708f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_VAP_LOG_LSB		0
6709f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_VAP_LOG_MASK		0x0000ffff
6710f118a3e5SKalle Valo 
6711f118a3e5SKalle Valo /* to enable dbglog in the firmware */
6712f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB	16
6713f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK	0x00010000
6714f118a3e5SKalle Valo 
6715f118a3e5SKalle Valo /* timestamp resolution */
6716f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_RESOLUTION_LSB	17
6717f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_RESOLUTION_MASK	0x000E0000
6718f118a3e5SKalle Valo 
6719f118a3e5SKalle Valo /* number of queued messages before sending them to the host */
6720f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB	20
6721f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK	0x0ff00000
6722f118a3e5SKalle Valo 
6723f118a3e5SKalle Valo /*
6724f118a3e5SKalle Valo  * Log levels to enable. This defines the minimum level to enable, this is
6725f118a3e5SKalle Valo  * not a bitmask. See enum ath10k_dbglog_level for the values.
6726f118a3e5SKalle Valo  */
6727f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_LOG_LVL_LSB		28
6728f118a3e5SKalle Valo #define ATH10K_DBGLOG_CFG_LOG_LVL_MASK		0x70000000
6729f118a3e5SKalle Valo 
6730f118a3e5SKalle Valo /*
6731f118a3e5SKalle Valo  * Note: this is a cleaned up version of a struct firmware uses. For
6732f118a3e5SKalle Valo  * example, config_valid was hidden inside an array.
6733f118a3e5SKalle Valo  */
6734f118a3e5SKalle Valo struct wmi_dbglog_cfg_cmd {
6735f118a3e5SKalle Valo 	/* bitmask to hold mod id config*/
6736f118a3e5SKalle Valo 	__le32 module_enable;
6737f118a3e5SKalle Valo 
6738f118a3e5SKalle Valo 	/* see ATH10K_DBGLOG_CFG_ */
6739f118a3e5SKalle Valo 	__le32 config_enable;
6740f118a3e5SKalle Valo 
6741f118a3e5SKalle Valo 	/* mask of module id bits to be changed */
6742f118a3e5SKalle Valo 	__le32 module_valid;
6743f118a3e5SKalle Valo 
6744f118a3e5SKalle Valo 	/* mask of config bits to be changed, see ATH10K_DBGLOG_CFG_ */
6745f118a3e5SKalle Valo 	__le32 config_valid;
6746f118a3e5SKalle Valo } __packed;
6747f118a3e5SKalle Valo 
6748afcbc82cSMaharaja Kennadyrajan struct wmi_10_4_dbglog_cfg_cmd {
6749afcbc82cSMaharaja Kennadyrajan 	/* bitmask to hold mod id config*/
6750afcbc82cSMaharaja Kennadyrajan 	__le64 module_enable;
6751afcbc82cSMaharaja Kennadyrajan 
6752afcbc82cSMaharaja Kennadyrajan 	/* see ATH10K_DBGLOG_CFG_ */
6753afcbc82cSMaharaja Kennadyrajan 	__le32 config_enable;
6754afcbc82cSMaharaja Kennadyrajan 
6755afcbc82cSMaharaja Kennadyrajan 	/* mask of module id bits to be changed */
6756afcbc82cSMaharaja Kennadyrajan 	__le64 module_valid;
6757afcbc82cSMaharaja Kennadyrajan 
6758afcbc82cSMaharaja Kennadyrajan 	/* mask of config bits to be changed, see ATH10K_DBGLOG_CFG_ */
6759afcbc82cSMaharaja Kennadyrajan 	__le32 config_valid;
6760afcbc82cSMaharaja Kennadyrajan } __packed;
6761afcbc82cSMaharaja Kennadyrajan 
6762c1a4654aSMichal Kazior enum wmi_roam_reason {
6763c1a4654aSMichal Kazior 	WMI_ROAM_REASON_BETTER_AP = 1,
6764c1a4654aSMichal Kazior 	WMI_ROAM_REASON_BEACON_MISS = 2,
6765c1a4654aSMichal Kazior 	WMI_ROAM_REASON_LOW_RSSI = 3,
6766c1a4654aSMichal Kazior 	WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
6767c1a4654aSMichal Kazior 	WMI_ROAM_REASON_HO_FAILED = 5,
6768c1a4654aSMichal Kazior 
6769c1a4654aSMichal Kazior 	/* keep last */
6770c1a4654aSMichal Kazior 	WMI_ROAM_REASON_MAX,
6771c1a4654aSMichal Kazior };
6772c1a4654aSMichal Kazior 
6773c1a4654aSMichal Kazior struct wmi_roam_ev {
6774c1a4654aSMichal Kazior 	__le32 vdev_id;
6775c1a4654aSMichal Kazior 	__le32 reason;
6776c1a4654aSMichal Kazior } __packed;
6777c1a4654aSMichal Kazior 
67785e3dd157SKalle Valo #define ATH10K_FRAGMT_THRESHOLD_MIN	540
67795e3dd157SKalle Valo #define ATH10K_FRAGMT_THRESHOLD_MAX	2346
67805e3dd157SKalle Valo 
67815e3dd157SKalle Valo #define WMI_MAX_EVENT 0x1000
67825e3dd157SKalle Valo /* Maximum number of pending TXed WMI packets */
67835e3dd157SKalle Valo #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
67845e3dd157SKalle Valo 
67855e3dd157SKalle Valo /* By default disable power save for IBSS */
67865e3dd157SKalle Valo #define ATH10K_DEFAULT_ATIM 0
67875e3dd157SKalle Valo 
67885c01aa3dSMichal Kazior #define WMI_MAX_MEM_REQS 16
67895c01aa3dSMichal Kazior 
679032653cf1SMichal Kazior struct wmi_scan_ev_arg {
679132653cf1SMichal Kazior 	__le32 event_type; /* %WMI_SCAN_EVENT_ */
679232653cf1SMichal Kazior 	__le32 reason; /* %WMI_SCAN_REASON_ */
679332653cf1SMichal Kazior 	__le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
679432653cf1SMichal Kazior 	__le32 scan_req_id;
679532653cf1SMichal Kazior 	__le32 scan_id;
679632653cf1SMichal Kazior 	__le32 vdev_id;
679732653cf1SMichal Kazior };
679832653cf1SMichal Kazior 
67994b816f17SAbhishek Ambure struct mgmt_tx_compl_params {
68004b816f17SAbhishek Ambure 	u32 desc_id;
68014b816f17SAbhishek Ambure 	u32 status;
68024b816f17SAbhishek Ambure 	u32 ppdu_id;
68034b816f17SAbhishek Ambure 	int ack_rssi;
68044b816f17SAbhishek Ambure };
68054b816f17SAbhishek Ambure 
6806dc405152SRakesh Pillai struct wmi_tlv_mgmt_tx_compl_ev_arg {
6807dc405152SRakesh Pillai 	__le32 desc_id;
6808dc405152SRakesh Pillai 	__le32 status;
6809dc405152SRakesh Pillai 	__le32 pdev_id;
68104b816f17SAbhishek Ambure 	__le32 ppdu_id;
68114b816f17SAbhishek Ambure 	__le32 ack_rssi;
6812dc405152SRakesh Pillai };
6813dc405152SRakesh Pillai 
6814cc123facSRakesh Pillai struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg {
6815cc123facSRakesh Pillai 	__le32 num_reports;
6816cc123facSRakesh Pillai 	const __le32 *desc_ids;
6817cc123facSRakesh Pillai 	const __le32 *status;
68184b816f17SAbhishek Ambure 	const __le32 *ppdu_ids;
68194b816f17SAbhishek Ambure 	const __le32 *ack_rssi;
6820cc123facSRakesh Pillai };
6821cc123facSRakesh Pillai 
6822c6f537a1SDundi Raviteja struct wmi_peer_delete_resp_ev_arg {
6823c6f537a1SDundi Raviteja 	__le32 vdev_id;
6824c6f537a1SDundi Raviteja 	struct wmi_mac_addr peer_addr;
6825c6f537a1SDundi Raviteja };
6826c6f537a1SDundi Raviteja 
68277005eafcSWen Gong #define WMI_MGMT_RX_NUM_RSSI 4
682832653cf1SMichal Kazior struct wmi_mgmt_rx_ev_arg {
682932653cf1SMichal Kazior 	__le32 channel;
683032653cf1SMichal Kazior 	__le32 snr;
683132653cf1SMichal Kazior 	__le32 rate;
683232653cf1SMichal Kazior 	__le32 phy_mode;
683332653cf1SMichal Kazior 	__le32 buf_len;
683432653cf1SMichal Kazior 	__le32 status; /* %WMI_RX_STATUS_ */
68358d130963SPeter Oh 	struct wmi_mgmt_rx_ext_info ext_info;
68367005eafcSWen Gong 	__le32 rssi[WMI_MGMT_RX_NUM_RSSI];
683732653cf1SMichal Kazior };
683832653cf1SMichal Kazior 
683932653cf1SMichal Kazior struct wmi_ch_info_ev_arg {
684032653cf1SMichal Kazior 	__le32 err_code;
684132653cf1SMichal Kazior 	__le32 freq;
684232653cf1SMichal Kazior 	__le32 cmd_flags;
684332653cf1SMichal Kazior 	__le32 noise_floor;
684432653cf1SMichal Kazior 	__le32 rx_clear_count;
684532653cf1SMichal Kazior 	__le32 cycle_count;
6846b2297baaSRaja Mani 	__le32 chan_tx_pwr_range;
6847b2297baaSRaja Mani 	__le32 chan_tx_pwr_tp;
6848b2297baaSRaja Mani 	__le32 rx_frame_count;
684913104929SRakesh Pillai 	__le32 my_bss_rx_cycle_count;
685013104929SRakesh Pillai 	__le32 rx_11b_mode_data_duration;
685113104929SRakesh Pillai 	__le32 tx_frame_cnt;
685213104929SRakesh Pillai 	__le32 mac_clk_mhz;
685332653cf1SMichal Kazior };
685432653cf1SMichal Kazior 
6855833fd34dSBen Greear /* From 10.4 firmware, not sure all have the same values. */
6856833fd34dSBen Greear enum wmi_vdev_start_status {
6857833fd34dSBen Greear 	WMI_VDEV_START_OK = 0,
6858833fd34dSBen Greear 	WMI_VDEV_START_CHAN_INVALID,
6859833fd34dSBen Greear };
6860833fd34dSBen Greear 
686132653cf1SMichal Kazior struct wmi_vdev_start_ev_arg {
686232653cf1SMichal Kazior 	__le32 vdev_id;
686332653cf1SMichal Kazior 	__le32 req_id;
686432653cf1SMichal Kazior 	__le32 resp_type; /* %WMI_VDEV_RESP_ */
6865833fd34dSBen Greear 	__le32 status; /* See wmi_vdev_start_status enum above */
686632653cf1SMichal Kazior };
686732653cf1SMichal Kazior 
686832653cf1SMichal Kazior struct wmi_peer_kick_ev_arg {
686932653cf1SMichal Kazior 	const u8 *mac_addr;
687032653cf1SMichal Kazior };
687132653cf1SMichal Kazior 
687232653cf1SMichal Kazior struct wmi_swba_ev_arg {
687332653cf1SMichal Kazior 	__le32 vdev_map;
6874a03fee34SRaja Mani 	struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV];
687532653cf1SMichal Kazior 	const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV];
687632653cf1SMichal Kazior };
687732653cf1SMichal Kazior 
687832653cf1SMichal Kazior struct wmi_phyerr_ev_arg {
6879991adf71SRaja Mani 	u32 tsf_timestamp;
6880991adf71SRaja Mani 	u16 freq1;
6881991adf71SRaja Mani 	u16 freq2;
6882991adf71SRaja Mani 	u8 rssi_combined;
6883991adf71SRaja Mani 	u8 chan_width_mhz;
6884991adf71SRaja Mani 	u8 phy_err_code;
6885991adf71SRaja Mani 	u16 nf_chains[4];
6886991adf71SRaja Mani 	u32 buf_len;
6887991adf71SRaja Mani 	const u8 *buf;
6888991adf71SRaja Mani 	u8 hdr_len;
6889991adf71SRaja Mani };
6890991adf71SRaja Mani 
6891991adf71SRaja Mani struct wmi_phyerr_hdr_arg {
6892991adf71SRaja Mani 	u32 num_phyerrs;
6893991adf71SRaja Mani 	u32 tsf_l32;
6894991adf71SRaja Mani 	u32 tsf_u32;
6895991adf71SRaja Mani 	u32 buf_len;
6896991adf71SRaja Mani 	const void *phyerrs;
689732653cf1SMichal Kazior };
689832653cf1SMichal Kazior 
68996f6eb1bcSSriram R struct wmi_dfs_status_ev_arg {
69006f6eb1bcSSriram R 	u32 status;
69016f6eb1bcSSriram R };
69026f6eb1bcSSriram R 
69035c01aa3dSMichal Kazior struct wmi_svc_rdy_ev_arg {
69045c01aa3dSMichal Kazior 	__le32 min_tx_power;
69055c01aa3dSMichal Kazior 	__le32 max_tx_power;
69065c01aa3dSMichal Kazior 	__le32 ht_cap;
69075c01aa3dSMichal Kazior 	__le32 vht_cap;
690873690c48STomislav Požega 	__le32 vht_supp_mcs;
69095c01aa3dSMichal Kazior 	__le32 sw_ver0;
69105c01aa3dSMichal Kazior 	__le32 sw_ver1;
6911ca996ec5SMichal Kazior 	__le32 fw_build;
69125c01aa3dSMichal Kazior 	__le32 phy_capab;
69135c01aa3dSMichal Kazior 	__le32 num_rf_chains;
69145c01aa3dSMichal Kazior 	__le32 eeprom_rd;
69155c01aa3dSMichal Kazior 	__le32 num_mem_reqs;
6916fa879490STomislav Požega 	__le32 low_2ghz_chan;
6917fa879490STomislav Požega 	__le32 high_2ghz_chan;
6918523f6701STamizh chelvam 	__le32 low_5ghz_chan;
6919523f6701STamizh chelvam 	__le32 high_5ghz_chan;
69201382993fSWen Gong 	__le32 sys_cap_info;
69215c01aa3dSMichal Kazior 	const __le32 *service_map;
69222a3e60d3SMichal Kazior 	size_t service_map_len;
69235c01aa3dSMichal Kazior 	const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
69245c01aa3dSMichal Kazior };
69255c01aa3dSMichal Kazior 
6926cea19a6cSCarl Huang struct wmi_svc_avail_ev_arg {
6927c7cee9c0SRakesh Pillai 	bool service_map_ext_valid;
6928cea19a6cSCarl Huang 	__le32 service_map_ext_len;
6929cea19a6cSCarl Huang 	const __le32 *service_map_ext;
6930cea19a6cSCarl Huang };
6931cea19a6cSCarl Huang 
693232653cf1SMichal Kazior struct wmi_rdy_ev_arg {
693332653cf1SMichal Kazior 	__le32 sw_version;
693432653cf1SMichal Kazior 	__le32 abi_version;
693532653cf1SMichal Kazior 	__le32 status;
693632653cf1SMichal Kazior 	const u8 *mac_addr;
693732653cf1SMichal Kazior };
693832653cf1SMichal Kazior 
6939c1a4654aSMichal Kazior struct wmi_roam_ev_arg {
6940c1a4654aSMichal Kazior 	__le32 vdev_id;
6941c1a4654aSMichal Kazior 	__le32 reason;
6942c1a4654aSMichal Kazior 	__le32 rssi;
6943c1a4654aSMichal Kazior };
6944c1a4654aSMichal Kazior 
694584d4911bSMichal Kazior struct wmi_echo_ev_arg {
694684d4911bSMichal Kazior 	__le32 value;
694784d4911bSMichal Kazior };
694884d4911bSMichal Kazior 
6949a57a6a27SRajkumar Manoharan struct wmi_pdev_temperature_event {
6950b8a71b95SJeff Johnson 	/* temperature value in Celsius degree */
6951a57a6a27SRajkumar Manoharan 	__le32 temperature;
6952a57a6a27SRajkumar Manoharan } __packed;
6953a57a6a27SRajkumar Manoharan 
695489d2d183SRajkumar Manoharan struct wmi_pdev_bss_chan_info_event {
695589d2d183SRajkumar Manoharan 	__le32 freq;
695689d2d183SRajkumar Manoharan 	__le32 noise_floor;
695789d2d183SRajkumar Manoharan 	__le64 cycle_busy;
695889d2d183SRajkumar Manoharan 	__le64 cycle_total;
695989d2d183SRajkumar Manoharan 	__le64 cycle_tx;
696089d2d183SRajkumar Manoharan 	__le64 cycle_rx;
696189d2d183SRajkumar Manoharan 	__le64 cycle_rx_bss;
696289d2d183SRajkumar Manoharan 	__le32 reserved;
696389d2d183SRajkumar Manoharan } __packed;
696489d2d183SRajkumar Manoharan 
6965f5431e87SJanusz Dziedzic /* WOW structures */
6966f5431e87SJanusz Dziedzic enum wmi_wow_wakeup_event {
6967f5431e87SJanusz Dziedzic 	WOW_BMISS_EVENT = 0,
6968f5431e87SJanusz Dziedzic 	WOW_BETTER_AP_EVENT,
6969f5431e87SJanusz Dziedzic 	WOW_DEAUTH_RECVD_EVENT,
6970f5431e87SJanusz Dziedzic 	WOW_MAGIC_PKT_RECVD_EVENT,
6971f5431e87SJanusz Dziedzic 	WOW_GTK_ERR_EVENT,
6972f5431e87SJanusz Dziedzic 	WOW_FOURWAY_HSHAKE_EVENT,
6973f5431e87SJanusz Dziedzic 	WOW_EAPOL_RECVD_EVENT,
6974f5431e87SJanusz Dziedzic 	WOW_NLO_DETECTED_EVENT,
6975f5431e87SJanusz Dziedzic 	WOW_DISASSOC_RECVD_EVENT,
6976f5431e87SJanusz Dziedzic 	WOW_PATTERN_MATCH_EVENT,
6977f5431e87SJanusz Dziedzic 	WOW_CSA_IE_EVENT,
6978f5431e87SJanusz Dziedzic 	WOW_PROBE_REQ_WPS_IE_EVENT,
6979f5431e87SJanusz Dziedzic 	WOW_AUTH_REQ_EVENT,
6980f5431e87SJanusz Dziedzic 	WOW_ASSOC_REQ_EVENT,
6981f5431e87SJanusz Dziedzic 	WOW_HTT_EVENT,
6982f5431e87SJanusz Dziedzic 	WOW_RA_MATCH_EVENT,
6983f5431e87SJanusz Dziedzic 	WOW_HOST_AUTO_SHUTDOWN_EVENT,
6984f5431e87SJanusz Dziedzic 	WOW_IOAC_MAGIC_EVENT,
6985f5431e87SJanusz Dziedzic 	WOW_IOAC_SHORT_EVENT,
6986f5431e87SJanusz Dziedzic 	WOW_IOAC_EXTEND_EVENT,
6987f5431e87SJanusz Dziedzic 	WOW_IOAC_TIMER_EVENT,
6988f5431e87SJanusz Dziedzic 	WOW_DFS_PHYERR_RADAR_EVENT,
6989f5431e87SJanusz Dziedzic 	WOW_BEACON_EVENT,
6990f5431e87SJanusz Dziedzic 	WOW_CLIENT_KICKOUT_EVENT,
6991f5431e87SJanusz Dziedzic 	WOW_EVENT_MAX,
6992f5431e87SJanusz Dziedzic };
6993f5431e87SJanusz Dziedzic 
6994f5431e87SJanusz Dziedzic #define C2S(x) case x: return #x
6995f5431e87SJanusz Dziedzic 
wow_wakeup_event(enum wmi_wow_wakeup_event ev)6996f5431e87SJanusz Dziedzic static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
6997f5431e87SJanusz Dziedzic {
6998f5431e87SJanusz Dziedzic 	switch (ev) {
6999f5431e87SJanusz Dziedzic 	C2S(WOW_BMISS_EVENT);
7000f5431e87SJanusz Dziedzic 	C2S(WOW_BETTER_AP_EVENT);
7001f5431e87SJanusz Dziedzic 	C2S(WOW_DEAUTH_RECVD_EVENT);
7002f5431e87SJanusz Dziedzic 	C2S(WOW_MAGIC_PKT_RECVD_EVENT);
7003f5431e87SJanusz Dziedzic 	C2S(WOW_GTK_ERR_EVENT);
7004f5431e87SJanusz Dziedzic 	C2S(WOW_FOURWAY_HSHAKE_EVENT);
7005f5431e87SJanusz Dziedzic 	C2S(WOW_EAPOL_RECVD_EVENT);
7006f5431e87SJanusz Dziedzic 	C2S(WOW_NLO_DETECTED_EVENT);
7007f5431e87SJanusz Dziedzic 	C2S(WOW_DISASSOC_RECVD_EVENT);
7008f5431e87SJanusz Dziedzic 	C2S(WOW_PATTERN_MATCH_EVENT);
7009f5431e87SJanusz Dziedzic 	C2S(WOW_CSA_IE_EVENT);
7010f5431e87SJanusz Dziedzic 	C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
7011f5431e87SJanusz Dziedzic 	C2S(WOW_AUTH_REQ_EVENT);
7012f5431e87SJanusz Dziedzic 	C2S(WOW_ASSOC_REQ_EVENT);
7013f5431e87SJanusz Dziedzic 	C2S(WOW_HTT_EVENT);
7014f5431e87SJanusz Dziedzic 	C2S(WOW_RA_MATCH_EVENT);
7015f5431e87SJanusz Dziedzic 	C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
7016f5431e87SJanusz Dziedzic 	C2S(WOW_IOAC_MAGIC_EVENT);
7017f5431e87SJanusz Dziedzic 	C2S(WOW_IOAC_SHORT_EVENT);
7018f5431e87SJanusz Dziedzic 	C2S(WOW_IOAC_EXTEND_EVENT);
7019f5431e87SJanusz Dziedzic 	C2S(WOW_IOAC_TIMER_EVENT);
7020f5431e87SJanusz Dziedzic 	C2S(WOW_DFS_PHYERR_RADAR_EVENT);
7021f5431e87SJanusz Dziedzic 	C2S(WOW_BEACON_EVENT);
7022f5431e87SJanusz Dziedzic 	C2S(WOW_CLIENT_KICKOUT_EVENT);
7023f5431e87SJanusz Dziedzic 	C2S(WOW_EVENT_MAX);
7024f5431e87SJanusz Dziedzic 	default:
7025f5431e87SJanusz Dziedzic 		return NULL;
7026f5431e87SJanusz Dziedzic 	}
7027f5431e87SJanusz Dziedzic }
7028f5431e87SJanusz Dziedzic 
7029f5431e87SJanusz Dziedzic enum wmi_wow_wake_reason {
7030f5431e87SJanusz Dziedzic 	WOW_REASON_UNSPECIFIED = -1,
7031f5431e87SJanusz Dziedzic 	WOW_REASON_NLOD = 0,
7032f5431e87SJanusz Dziedzic 	WOW_REASON_AP_ASSOC_LOST,
7033f5431e87SJanusz Dziedzic 	WOW_REASON_LOW_RSSI,
7034f5431e87SJanusz Dziedzic 	WOW_REASON_DEAUTH_RECVD,
7035f5431e87SJanusz Dziedzic 	WOW_REASON_DISASSOC_RECVD,
7036f5431e87SJanusz Dziedzic 	WOW_REASON_GTK_HS_ERR,
7037f5431e87SJanusz Dziedzic 	WOW_REASON_EAP_REQ,
7038f5431e87SJanusz Dziedzic 	WOW_REASON_FOURWAY_HS_RECV,
7039f5431e87SJanusz Dziedzic 	WOW_REASON_TIMER_INTR_RECV,
7040f5431e87SJanusz Dziedzic 	WOW_REASON_PATTERN_MATCH_FOUND,
7041f5431e87SJanusz Dziedzic 	WOW_REASON_RECV_MAGIC_PATTERN,
7042f5431e87SJanusz Dziedzic 	WOW_REASON_P2P_DISC,
7043f5431e87SJanusz Dziedzic 	WOW_REASON_WLAN_HB,
7044f5431e87SJanusz Dziedzic 	WOW_REASON_CSA_EVENT,
7045f5431e87SJanusz Dziedzic 	WOW_REASON_PROBE_REQ_WPS_IE_RECV,
7046f5431e87SJanusz Dziedzic 	WOW_REASON_AUTH_REQ_RECV,
7047f5431e87SJanusz Dziedzic 	WOW_REASON_ASSOC_REQ_RECV,
7048f5431e87SJanusz Dziedzic 	WOW_REASON_HTT_EVENT,
7049f5431e87SJanusz Dziedzic 	WOW_REASON_RA_MATCH,
7050f5431e87SJanusz Dziedzic 	WOW_REASON_HOST_AUTO_SHUTDOWN,
7051f5431e87SJanusz Dziedzic 	WOW_REASON_IOAC_MAGIC_EVENT,
7052f5431e87SJanusz Dziedzic 	WOW_REASON_IOAC_SHORT_EVENT,
7053f5431e87SJanusz Dziedzic 	WOW_REASON_IOAC_EXTEND_EVENT,
7054f5431e87SJanusz Dziedzic 	WOW_REASON_IOAC_TIMER_EVENT,
7055f5431e87SJanusz Dziedzic 	WOW_REASON_ROAM_HO,
7056f5431e87SJanusz Dziedzic 	WOW_REASON_DFS_PHYERR_RADADR_EVENT,
7057f5431e87SJanusz Dziedzic 	WOW_REASON_BEACON_RECV,
7058f5431e87SJanusz Dziedzic 	WOW_REASON_CLIENT_KICKOUT_EVENT,
7059f5431e87SJanusz Dziedzic 	WOW_REASON_DEBUG_TEST = 0xFF,
7060f5431e87SJanusz Dziedzic };
7061f5431e87SJanusz Dziedzic 
wow_reason(enum wmi_wow_wake_reason reason)7062f5431e87SJanusz Dziedzic static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
7063f5431e87SJanusz Dziedzic {
7064f5431e87SJanusz Dziedzic 	switch (reason) {
7065f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_UNSPECIFIED);
7066f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_NLOD);
7067f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_AP_ASSOC_LOST);
7068f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_LOW_RSSI);
7069f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_DEAUTH_RECVD);
7070f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_DISASSOC_RECVD);
7071f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_GTK_HS_ERR);
7072f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_EAP_REQ);
7073f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_FOURWAY_HS_RECV);
7074f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_TIMER_INTR_RECV);
7075f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_PATTERN_MATCH_FOUND);
7076f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_RECV_MAGIC_PATTERN);
7077f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_P2P_DISC);
7078f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_WLAN_HB);
7079f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_CSA_EVENT);
7080f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
7081f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_AUTH_REQ_RECV);
7082f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_ASSOC_REQ_RECV);
7083f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_HTT_EVENT);
7084f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_RA_MATCH);
7085f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
7086f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_IOAC_MAGIC_EVENT);
7087f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_IOAC_SHORT_EVENT);
7088f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_IOAC_EXTEND_EVENT);
7089f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_IOAC_TIMER_EVENT);
7090f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_ROAM_HO);
7091f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
7092f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_BEACON_RECV);
7093f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
7094f5431e87SJanusz Dziedzic 	C2S(WOW_REASON_DEBUG_TEST);
7095f5431e87SJanusz Dziedzic 	default:
7096f5431e87SJanusz Dziedzic 		return NULL;
7097f5431e87SJanusz Dziedzic 	}
7098f5431e87SJanusz Dziedzic }
7099f5431e87SJanusz Dziedzic 
7100f5431e87SJanusz Dziedzic #undef C2S
7101f5431e87SJanusz Dziedzic 
7102f5431e87SJanusz Dziedzic struct wmi_wow_ev_arg {
7103f5431e87SJanusz Dziedzic 	u32 vdev_id;
7104f5431e87SJanusz Dziedzic 	u32 flag;
7105f5431e87SJanusz Dziedzic 	enum wmi_wow_wake_reason wake_reason;
7106f5431e87SJanusz Dziedzic 	u32 data_len;
7107f5431e87SJanusz Dziedzic };
7108f5431e87SJanusz Dziedzic 
710925c86619SJanusz Dziedzic #define WOW_MIN_PATTERN_SIZE	1
711025c86619SJanusz Dziedzic #define WOW_MAX_PATTERN_SIZE	148
711125c86619SJanusz Dziedzic #define WOW_MAX_PKT_OFFSET	128
7112fa3440faSWen Gong #define WOW_HDR_LEN	(sizeof(struct ieee80211_hdr_3addr) + \
7113fa3440faSWen Gong 	sizeof(struct rfc1042_hdr))
7114fa3440faSWen Gong #define WOW_MAX_REDUCE	(WOW_HDR_LEN - sizeof(struct ethhdr) - \
7115fa3440faSWen Gong 	offsetof(struct ieee80211_hdr_3addr, addr1))
711625c86619SJanusz Dziedzic 
7117ad45c888SMarek Puzyniak enum wmi_tdls_state {
7118ad45c888SMarek Puzyniak 	WMI_TDLS_DISABLE,
7119ad45c888SMarek Puzyniak 	WMI_TDLS_ENABLE_PASSIVE,
7120ad45c888SMarek Puzyniak 	WMI_TDLS_ENABLE_ACTIVE,
71214c9f8d11SYingying Tang 	WMI_TDLS_ENABLE_ACTIVE_EXTERNAL_CONTROL,
7122ad45c888SMarek Puzyniak };
7123ad45c888SMarek Puzyniak 
7124ad45c888SMarek Puzyniak enum wmi_tdls_peer_state {
7125ad45c888SMarek Puzyniak 	WMI_TDLS_PEER_STATE_PEERING,
7126ad45c888SMarek Puzyniak 	WMI_TDLS_PEER_STATE_CONNECTED,
7127ad45c888SMarek Puzyniak 	WMI_TDLS_PEER_STATE_TEARDOWN,
7128ad45c888SMarek Puzyniak };
7129ad45c888SMarek Puzyniak 
7130ad45c888SMarek Puzyniak struct wmi_tdls_peer_update_cmd_arg {
7131ad45c888SMarek Puzyniak 	u32 vdev_id;
7132ad45c888SMarek Puzyniak 	enum wmi_tdls_peer_state peer_state;
7133ad45c888SMarek Puzyniak 	u8 addr[ETH_ALEN];
7134ad45c888SMarek Puzyniak };
7135ad45c888SMarek Puzyniak 
7136ad45c888SMarek Puzyniak #define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32
7137ad45c888SMarek Puzyniak 
7138add6cd8dSManikanta Pubbisetty #define WMI_TDLS_PEER_SP_MASK	0x60
7139add6cd8dSManikanta Pubbisetty #define WMI_TDLS_PEER_SP_LSB	5
7140add6cd8dSManikanta Pubbisetty 
7141add6cd8dSManikanta Pubbisetty enum wmi_tdls_options {
7142add6cd8dSManikanta Pubbisetty 	WMI_TDLS_OFFCHAN_EN = BIT(0),
7143add6cd8dSManikanta Pubbisetty 	WMI_TDLS_BUFFER_STA_EN = BIT(1),
7144add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SLEEP_STA_EN = BIT(2),
7145add6cd8dSManikanta Pubbisetty };
7146add6cd8dSManikanta Pubbisetty 
7147add6cd8dSManikanta Pubbisetty enum {
7148add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_QOS_AC_VO = BIT(0),
7149add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_QOS_AC_VI = BIT(1),
7150add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_QOS_AC_BK = BIT(2),
7151add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_QOS_AC_BE = BIT(3),
7152add6cd8dSManikanta Pubbisetty };
7153add6cd8dSManikanta Pubbisetty 
7154ad45c888SMarek Puzyniak struct wmi_tdls_peer_capab_arg {
7155ad45c888SMarek Puzyniak 	u8 peer_uapsd_queues;
7156ad45c888SMarek Puzyniak 	u8 peer_max_sp;
7157ad45c888SMarek Puzyniak 	u32 buff_sta_support;
7158ad45c888SMarek Puzyniak 	u32 off_chan_support;
7159ad45c888SMarek Puzyniak 	u32 peer_curr_operclass;
7160ad45c888SMarek Puzyniak 	u32 self_curr_operclass;
7161ad45c888SMarek Puzyniak 	u32 peer_chan_len;
7162ad45c888SMarek Puzyniak 	u32 peer_operclass_len;
7163ad45c888SMarek Puzyniak 	u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
7164ad45c888SMarek Puzyniak 	u32 is_peer_responder;
7165ad45c888SMarek Puzyniak 	u32 pref_offchan_num;
7166ad45c888SMarek Puzyniak 	u32 pref_offchan_bw;
7167ad45c888SMarek Puzyniak };
7168ad45c888SMarek Puzyniak 
7169add6cd8dSManikanta Pubbisetty struct wmi_10_4_tdls_set_state_cmd {
7170add6cd8dSManikanta Pubbisetty 	__le32 vdev_id;
7171add6cd8dSManikanta Pubbisetty 	__le32 state;
7172add6cd8dSManikanta Pubbisetty 	__le32 notification_interval_ms;
7173add6cd8dSManikanta Pubbisetty 	__le32 tx_discovery_threshold;
7174add6cd8dSManikanta Pubbisetty 	__le32 tx_teardown_threshold;
7175add6cd8dSManikanta Pubbisetty 	__le32 rssi_teardown_threshold;
7176add6cd8dSManikanta Pubbisetty 	__le32 rssi_delta;
7177add6cd8dSManikanta Pubbisetty 	__le32 tdls_options;
7178add6cd8dSManikanta Pubbisetty 	__le32 tdls_peer_traffic_ind_window;
7179add6cd8dSManikanta Pubbisetty 	__le32 tdls_peer_traffic_response_timeout_ms;
7180add6cd8dSManikanta Pubbisetty 	__le32 tdls_puapsd_mask;
7181add6cd8dSManikanta Pubbisetty 	__le32 tdls_puapsd_inactivity_time_ms;
7182add6cd8dSManikanta Pubbisetty 	__le32 tdls_puapsd_rx_frame_threshold;
7183add6cd8dSManikanta Pubbisetty 	__le32 teardown_notification_ms;
7184add6cd8dSManikanta Pubbisetty 	__le32 tdls_peer_kickout_threshold;
7185add6cd8dSManikanta Pubbisetty } __packed;
7186add6cd8dSManikanta Pubbisetty 
7187add6cd8dSManikanta Pubbisetty struct wmi_tdls_peer_capabilities {
7188add6cd8dSManikanta Pubbisetty 	__le32 peer_qos;
7189add6cd8dSManikanta Pubbisetty 	__le32 buff_sta_support;
7190add6cd8dSManikanta Pubbisetty 	__le32 off_chan_support;
7191add6cd8dSManikanta Pubbisetty 	__le32 peer_curr_operclass;
7192add6cd8dSManikanta Pubbisetty 	__le32 self_curr_operclass;
7193add6cd8dSManikanta Pubbisetty 	__le32 peer_chan_len;
7194add6cd8dSManikanta Pubbisetty 	__le32 peer_operclass_len;
7195add6cd8dSManikanta Pubbisetty 	u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
7196add6cd8dSManikanta Pubbisetty 	__le32 is_peer_responder;
7197add6cd8dSManikanta Pubbisetty 	__le32 pref_offchan_num;
7198add6cd8dSManikanta Pubbisetty 	__le32 pref_offchan_bw;
7199add6cd8dSManikanta Pubbisetty 	struct wmi_channel peer_chan_list[1];
7200add6cd8dSManikanta Pubbisetty } __packed;
7201add6cd8dSManikanta Pubbisetty 
7202add6cd8dSManikanta Pubbisetty struct wmi_10_4_tdls_peer_update_cmd {
7203add6cd8dSManikanta Pubbisetty 	__le32 vdev_id;
7204add6cd8dSManikanta Pubbisetty 	struct wmi_mac_addr peer_macaddr;
7205add6cd8dSManikanta Pubbisetty 	__le32 peer_state;
7206add6cd8dSManikanta Pubbisetty 	__le32 reserved[4];
7207add6cd8dSManikanta Pubbisetty 	struct wmi_tdls_peer_capabilities peer_capab;
7208add6cd8dSManikanta Pubbisetty } __packed;
7209add6cd8dSManikanta Pubbisetty 
7210add6cd8dSManikanta Pubbisetty enum wmi_tdls_peer_reason {
7211add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_TX,
7212add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_RSSI,
7213add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_SCAN,
7214add6cd8dSManikanta Pubbisetty 	WMI_TDLS_DISCONNECTED_REASON_PEER_DELETE,
7215add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT,
7216add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_BAD_PTR,
7217add6cd8dSManikanta Pubbisetty 	WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE,
7218add6cd8dSManikanta Pubbisetty 	WMI_TDLS_ENTER_BUF_STA,
7219add6cd8dSManikanta Pubbisetty 	WMI_TDLS_EXIT_BUF_STA,
7220add6cd8dSManikanta Pubbisetty 	WMI_TDLS_ENTER_BT_BUSY_MODE,
7221add6cd8dSManikanta Pubbisetty 	WMI_TDLS_EXIT_BT_BUSY_MODE,
7222add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SCAN_STARTED_EVENT,
7223add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SCAN_COMPLETED_EVENT,
7224add6cd8dSManikanta Pubbisetty };
7225add6cd8dSManikanta Pubbisetty 
7226add6cd8dSManikanta Pubbisetty enum wmi_tdls_peer_notification {
7227add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SHOULD_DISCOVER,
7228add6cd8dSManikanta Pubbisetty 	WMI_TDLS_SHOULD_TEARDOWN,
7229add6cd8dSManikanta Pubbisetty 	WMI_TDLS_PEER_DISCONNECTED,
7230add6cd8dSManikanta Pubbisetty 	WMI_TDLS_CONNECTION_TRACKER_NOTIFICATION,
7231add6cd8dSManikanta Pubbisetty };
7232add6cd8dSManikanta Pubbisetty 
7233add6cd8dSManikanta Pubbisetty struct wmi_tdls_peer_event {
7234add6cd8dSManikanta Pubbisetty 	struct wmi_mac_addr peer_macaddr;
7235add6cd8dSManikanta Pubbisetty 	/* see enum wmi_tdls_peer_notification*/
7236add6cd8dSManikanta Pubbisetty 	__le32 peer_status;
7237add6cd8dSManikanta Pubbisetty 	/* see enum wmi_tdls_peer_reason */
7238add6cd8dSManikanta Pubbisetty 	__le32 peer_reason;
7239add6cd8dSManikanta Pubbisetty 	__le32 vdev_id;
7240add6cd8dSManikanta Pubbisetty } __packed;
7241add6cd8dSManikanta Pubbisetty 
72425d582be0STamizh Chelvam enum wmi_tid_aggr_control_conf {
72435d582be0STamizh Chelvam 	WMI_TID_CONFIG_AGGR_CONTROL_IGNORE,
72445d582be0STamizh Chelvam 	WMI_TID_CONFIG_AGGR_CONTROL_ENABLE,
72455d582be0STamizh Chelvam 	WMI_TID_CONFIG_AGGR_CONTROL_DISABLE,
72465d582be0STamizh Chelvam };
72475d582be0STamizh Chelvam 
72485d582be0STamizh Chelvam enum wmi_noack_tid_conf {
72495d582be0STamizh Chelvam 	WMI_NOACK_TID_CONFIG_IGNORE_ACK_POLICY,
72505d582be0STamizh Chelvam 	WMI_PEER_TID_CONFIG_ACK,
72515d582be0STamizh Chelvam 	WMI_PEER_TID_CONFIG_NOACK,
72525d582be0STamizh Chelvam };
72535d582be0STamizh Chelvam 
72545d582be0STamizh Chelvam enum wmi_tid_rate_ctrl_conf {
72555d582be0STamizh Chelvam 	WMI_TID_CONFIG_RATE_CONTROL_IGNORE,
72565d582be0STamizh Chelvam 	WMI_TID_CONFIG_RATE_CONTROL_AUTO,
72575d582be0STamizh Chelvam 	WMI_TID_CONFIG_RATE_CONTROL_FIXED_RATE,
72585d582be0STamizh Chelvam 	WMI_TID_CONFIG_RATE_CONTROL_DEFAULT_LOWEST_RATE,
72597b2531d9STamizh Chelvam 	WMI_PEER_TID_CONFIG_RATE_UPPER_CAP,
72607b2531d9STamizh Chelvam };
72617b2531d9STamizh Chelvam 
72627b2531d9STamizh Chelvam enum wmi_tid_rtscts_control_conf {
72637b2531d9STamizh Chelvam 	WMI_TID_CONFIG_RTSCTS_CONTROL_ENABLE,
72647b2531d9STamizh Chelvam 	WMI_TID_CONFIG_RTSCTS_CONTROL_DISABLE,
72657b2531d9STamizh Chelvam };
72667b2531d9STamizh Chelvam 
72677b2531d9STamizh Chelvam enum wmi_ext_tid_config_map {
72687b2531d9STamizh Chelvam 	WMI_EXT_TID_RTS_CTS_CONFIG = BIT(0),
72695d582be0STamizh Chelvam };
72705d582be0STamizh Chelvam 
72715d582be0STamizh Chelvam struct wmi_per_peer_per_tid_cfg_arg {
72725d582be0STamizh Chelvam 	u32 vdev_id;
72735d582be0STamizh Chelvam 	struct wmi_mac_addr peer_macaddr;
72745d582be0STamizh Chelvam 	u32 tid;
72755d582be0STamizh Chelvam 	enum wmi_noack_tid_conf ack_policy;
72765d582be0STamizh Chelvam 	enum wmi_tid_aggr_control_conf aggr_control;
72775d582be0STamizh Chelvam 	u8 rate_ctrl;
72785d582be0STamizh Chelvam 	u32 retry_count;
72795d582be0STamizh Chelvam 	u32 rcode_flags;
72807b2531d9STamizh Chelvam 	u32 ext_tid_cfg_bitmap;
72817b2531d9STamizh Chelvam 	u32 rtscts_ctrl;
72825d582be0STamizh Chelvam };
72835d582be0STamizh Chelvam 
72845d582be0STamizh Chelvam struct wmi_peer_per_tid_cfg_cmd {
72855d582be0STamizh Chelvam 	__le32 vdev_id;
72865d582be0STamizh Chelvam 	struct wmi_mac_addr peer_macaddr;
72875d582be0STamizh Chelvam 	__le32 tid;
72885d582be0STamizh Chelvam 
72895d582be0STamizh Chelvam 	/* see enum wmi_noack_tid_conf */
72905d582be0STamizh Chelvam 	__le32 ack_policy;
72915d582be0STamizh Chelvam 
72925d582be0STamizh Chelvam 	/* see enum wmi_tid_aggr_control_conf */
72935d582be0STamizh Chelvam 	__le32 aggr_control;
72945d582be0STamizh Chelvam 
72955d582be0STamizh Chelvam 	/* see enum wmi_tid_rate_ctrl_conf */
72965d582be0STamizh Chelvam 	__le32 rate_control;
72975d582be0STamizh Chelvam 	__le32 rcode_flags;
72985d582be0STamizh Chelvam 	__le32 retry_count;
72997b2531d9STamizh Chelvam 
73007b2531d9STamizh Chelvam 	/* See enum wmi_ext_tid_config_map */
73017b2531d9STamizh Chelvam 	__le32 ext_tid_cfg_bitmap;
73027b2531d9STamizh Chelvam 
73037b2531d9STamizh Chelvam 	/* see enum wmi_tid_rtscts_control_conf */
73047b2531d9STamizh Chelvam 	__le32 rtscts_ctrl;
73055d582be0STamizh Chelvam } __packed;
73065d582be0STamizh Chelvam 
730708e75ea8SVivek Natarajan enum wmi_txbf_conf {
730808e75ea8SVivek Natarajan 	WMI_TXBF_CONF_UNSUPPORTED,
730908e75ea8SVivek Natarajan 	WMI_TXBF_CONF_BEFORE_ASSOC,
731008e75ea8SVivek Natarajan 	WMI_TXBF_CONF_AFTER_ASSOC,
731108e75ea8SVivek Natarajan };
731208e75ea8SVivek Natarajan 
731362f77f09SMaharaja #define	WMI_CCA_DETECT_LEVEL_AUTO	0
731462f77f09SMaharaja #define	WMI_CCA_DETECT_MARGIN_AUTO	0
731562f77f09SMaharaja 
731662f77f09SMaharaja struct wmi_pdev_set_adaptive_cca_params {
731762f77f09SMaharaja 	__le32 enable;
731862f77f09SMaharaja 	__le32 cca_detect_level;
731962f77f09SMaharaja 	__le32 cca_detect_margin;
732062f77f09SMaharaja } __packed;
732162f77f09SMaharaja 
7322ce834e28SWen Gong #define WMI_PNO_MAX_SCHED_SCAN_PLANS      2
7323ce834e28SWen Gong #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT   7200
7324ce834e28SWen Gong #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100
7325ce834e28SWen Gong #define WMI_PNO_MAX_NETW_CHANNELS         26
7326ce834e28SWen Gong #define WMI_PNO_MAX_NETW_CHANNELS_EX      60
7327ce834e28SWen Gong #define WMI_PNO_MAX_SUPP_NETWORKS         WLAN_SCAN_PARAMS_MAX_SSID
7328ce834e28SWen Gong #define WMI_PNO_MAX_IE_LENGTH             WLAN_SCAN_PARAMS_MAX_IE_LEN
7329ce834e28SWen Gong 
7330ce834e28SWen Gong /*size based of dot11 declaration without extra IEs as we will not carry those for PNO*/
7331ce834e28SWen Gong #define WMI_PNO_MAX_PB_REQ_SIZE    450
7332ce834e28SWen Gong 
7333ce834e28SWen Gong #define WMI_PNO_24G_DEFAULT_CH     1
7334ce834e28SWen Gong #define WMI_PNO_5G_DEFAULT_CH      36
7335ce834e28SWen Gong 
7336ce834e28SWen Gong #define WMI_ACTIVE_MAX_CHANNEL_TIME 40
7337ce834e28SWen Gong #define WMI_PASSIVE_MAX_CHANNEL_TIME   110
7338ce834e28SWen Gong 
7339ce834e28SWen Gong /* SSID broadcast type */
7340ce834e28SWen Gong enum wmi_SSID_bcast_type {
7341ce834e28SWen Gong 	BCAST_UNKNOWN      = 0,
7342ce834e28SWen Gong 	BCAST_NORMAL       = 1,
7343ce834e28SWen Gong 	BCAST_HIDDEN       = 2,
7344ce834e28SWen Gong };
7345ce834e28SWen Gong 
7346ce834e28SWen Gong struct wmi_network_type {
7347ce834e28SWen Gong 	struct wmi_ssid ssid;
7348ce834e28SWen Gong 	u32 authentication;
7349ce834e28SWen Gong 	u32 encryption;
7350ce834e28SWen Gong 	u32 bcast_nw_type;
7351ce834e28SWen Gong 	u8 channel_count;
7352ce834e28SWen Gong 	u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX];
7353ce834e28SWen Gong 	s32 rssi_threshold;
7354ce834e28SWen Gong } __packed;
7355ce834e28SWen Gong 
7356ce834e28SWen Gong struct wmi_pno_scan_req {
7357ce834e28SWen Gong 	u8 enable;
7358ce834e28SWen Gong 	u8 vdev_id;
7359ce834e28SWen Gong 	u8 uc_networks_count;
7360ce834e28SWen Gong 	struct wmi_network_type a_networks[WMI_PNO_MAX_SUPP_NETWORKS];
7361ce834e28SWen Gong 	u32 fast_scan_period;
7362ce834e28SWen Gong 	u32 slow_scan_period;
7363ce834e28SWen Gong 	u8 fast_scan_max_cycles;
7364ce834e28SWen Gong 
7365ce834e28SWen Gong 	bool do_passive_scan;
7366ce834e28SWen Gong 
7367ce834e28SWen Gong 	u32 delay_start_time;
7368ce834e28SWen Gong 	u32 active_min_time;
7369ce834e28SWen Gong 	u32 active_max_time;
7370ce834e28SWen Gong 	u32 passive_min_time;
7371ce834e28SWen Gong 	u32 passive_max_time;
7372ce834e28SWen Gong 
7373ce834e28SWen Gong 	/* mac address randomization attributes */
7374ce834e28SWen Gong 	u32 enable_pno_scan_randomization;
7375ce834e28SWen Gong 	u8 mac_addr[ETH_ALEN];
7376ce834e28SWen Gong 	u8 mac_addr_mask[ETH_ALEN];
7377ce834e28SWen Gong } __packed;
7378ce834e28SWen Gong 
737947771902SRaja Mani enum wmi_host_platform_type {
738047771902SRaja Mani 	WMI_HOST_PLATFORM_HIGH_PERF,
738147771902SRaja Mani 	WMI_HOST_PLATFORM_LOW_PERF,
738247771902SRaja Mani };
738347771902SRaja Mani 
73848a0b459eSRajkumar Manoharan enum wmi_bss_survey_req_type {
73858a0b459eSRajkumar Manoharan 	WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
73868a0b459eSRajkumar Manoharan 	WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
73878a0b459eSRajkumar Manoharan };
73888a0b459eSRajkumar Manoharan 
73898a0b459eSRajkumar Manoharan struct wmi_pdev_chan_info_req_cmd {
73908a0b459eSRajkumar Manoharan 	__le32 type;
73918a0b459eSRajkumar Manoharan 	__le32 reserved;
73928a0b459eSRajkumar Manoharan } __packed;
73938a0b459eSRajkumar Manoharan 
739484758d4dSBhagavathi Perumal S /* bb timing register configurations */
739584758d4dSBhagavathi Perumal S struct wmi_bb_timing_cfg_arg {
739684758d4dSBhagavathi Perumal S 	/* Tx_end to pa off timing */
739784758d4dSBhagavathi Perumal S 	u32 bb_tx_timing;
739884758d4dSBhagavathi Perumal S 
739984758d4dSBhagavathi Perumal S 	/* Tx_end to external pa off timing */
740084758d4dSBhagavathi Perumal S 	u32 bb_xpa_timing;
740184758d4dSBhagavathi Perumal S };
740284758d4dSBhagavathi Perumal S 
740384758d4dSBhagavathi Perumal S struct wmi_pdev_bb_timing_cfg_cmd {
740484758d4dSBhagavathi Perumal S 	/* Tx_end to pa off timing */
740584758d4dSBhagavathi Perumal S 	__le32 bb_tx_timing;
740684758d4dSBhagavathi Perumal S 
740784758d4dSBhagavathi Perumal S 	/* Tx_end to external pa off timing */
740884758d4dSBhagavathi Perumal S 	__le32 bb_xpa_timing;
740984758d4dSBhagavathi Perumal S } __packed;
741084758d4dSBhagavathi Perumal S 
74115e3dd157SKalle Valo struct ath10k;
74125e3dd157SKalle Valo struct ath10k_vif;
74130226d602SMichal Kazior struct ath10k_fw_stats_pdev;
74140226d602SMichal Kazior struct ath10k_fw_stats_peer;
7415bc6f9ae6SManikanta Pubbisetty struct ath10k_fw_stats;
74165e3dd157SKalle Valo 
74175e3dd157SKalle Valo int ath10k_wmi_attach(struct ath10k *ar);
74185e3dd157SKalle Valo void ath10k_wmi_detach(struct ath10k *ar);
7419a925a376SVasanthakumar Thiagarajan void ath10k_wmi_free_host_mem(struct ath10k *ar);
74205e3dd157SKalle Valo int ath10k_wmi_wait_for_service_ready(struct ath10k *ar);
74215e3dd157SKalle Valo int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar);
74225e3dd157SKalle Valo 
74230226d602SMichal Kazior struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
742495bf21f9SMichal Kazior int ath10k_wmi_connect(struct ath10k *ar);
7425666a73f3SKalle Valo 
7426666a73f3SKalle Valo int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
7427d7579d12SMichal Kazior int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
7428d7579d12SMichal Kazior 			       u32 cmd_id);
7429019e4280SKalle Valo void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *arg);
74305e3dd157SKalle Valo 
7431b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
7432b91251fbSMichal Kazior 				     struct ath10k_fw_stats_pdev *dst);
7433b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
7434b91251fbSMichal Kazior 				   struct ath10k_fw_stats_pdev *dst);
7435b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
7436b91251fbSMichal Kazior 				   struct ath10k_fw_stats_pdev *dst);
7437b91251fbSMichal Kazior void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
74380226d602SMichal Kazior 				      struct ath10k_fw_stats_pdev *dst);
74390226d602SMichal Kazior void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
74400226d602SMichal Kazior 				struct ath10k_fw_stats_peer *dst);
74410226d602SMichal Kazior void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
74420226d602SMichal Kazior 				    struct wmi_host_mem_chunks *chunks);
74430226d602SMichal Kazior void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
74440226d602SMichal Kazior 				      const struct wmi_start_scan_arg *arg);
74455e752e42SMichal Kazior void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
74460226d602SMichal Kazior 			      const struct wmi_wmm_params_arg *arg);
7447795def8bSLei Wang void ath10k_wmi_put_wmi_channel(struct ath10k *ar, struct wmi_channel *ch,
74480226d602SMichal Kazior 				const struct wmi_channel_arg *arg);
74490226d602SMichal Kazior int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg);
74500226d602SMichal Kazior 
74510226d602SMichal Kazior int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb);
74520226d602SMichal Kazior int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb);
7453dc405152SRakesh Pillai int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb);
7454cc123facSRakesh Pillai int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb);
74550226d602SMichal Kazior void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb);
74560226d602SMichal Kazior void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb);
74570226d602SMichal Kazior int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb);
74580226d602SMichal Kazior void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb);
74590226d602SMichal Kazior void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb);
74600226d602SMichal Kazior void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb);
74610226d602SMichal Kazior void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
74620226d602SMichal Kazior void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
74630226d602SMichal Kazior void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
74640226d602SMichal Kazior void ath10k_wmi_event_dfs(struct ath10k *ar,
7465991adf71SRaja Mani 			  struct wmi_phyerr_ev_arg *phyerr, u64 tsf);
74660226d602SMichal Kazior void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
7467991adf71SRaja Mani 				    struct wmi_phyerr_ev_arg *phyerr,
74680226d602SMichal Kazior 				    u64 tsf);
74690226d602SMichal Kazior void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
74700226d602SMichal Kazior void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
74710226d602SMichal Kazior void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb);
74720226d602SMichal Kazior void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb);
74730226d602SMichal Kazior void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb);
74740226d602SMichal Kazior void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb);
74750226d602SMichal Kazior void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
74760226d602SMichal Kazior 					     struct sk_buff *skb);
74770226d602SMichal Kazior void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
74780226d602SMichal Kazior 					     struct sk_buff *skb);
74790226d602SMichal Kazior void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb);
74800226d602SMichal Kazior void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb);
74810226d602SMichal Kazior void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb);
74820226d602SMichal Kazior void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb);
74830226d602SMichal Kazior void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb);
74840226d602SMichal Kazior void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
74850226d602SMichal Kazior 					 struct sk_buff *skb);
74860226d602SMichal Kazior void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb);
74870226d602SMichal Kazior void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb);
74880226d602SMichal Kazior void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb);
74890226d602SMichal Kazior void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
74900226d602SMichal Kazior 						struct sk_buff *skb);
74910226d602SMichal Kazior void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb);
74920226d602SMichal Kazior void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
74930226d602SMichal Kazior void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
74940226d602SMichal Kazior void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
74950226d602SMichal Kazior int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
7496cea19a6cSCarl Huang void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb);
7497991adf71SRaja Mani int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf,
7498991adf71SRaja Mani 				 int left_len, struct wmi_phyerr_ev_arg *arg);
7499bc6f9ae6SManikanta Pubbisetty void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
7500bc6f9ae6SManikanta Pubbisetty 				      struct ath10k_fw_stats *fw_stats,
7501bc6f9ae6SManikanta Pubbisetty 				      char *buf);
7502bc6f9ae6SManikanta Pubbisetty void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
7503bc6f9ae6SManikanta Pubbisetty 				     struct ath10k_fw_stats *fw_stats,
7504bc6f9ae6SManikanta Pubbisetty 				     char *buf);
750598dd2b92SManikanta Pubbisetty void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
750698dd2b92SManikanta Pubbisetty 				      struct ath10k_fw_stats *fw_stats,
750798dd2b92SManikanta Pubbisetty 				      char *buf);
75086e4de1a4SPeter Oh int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
75096e4de1a4SPeter Oh 				   enum wmi_vdev_subtype subtype);
751020ddca21SMichal Kazior int ath10k_wmi_barrier(struct ath10k *ar);
7511bc64d052SMaharaja Kennadyrajan void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
7512bc64d052SMaharaja Kennadyrajan 					 u32 num_tx_chain);
7513bc64d052SMaharaja Kennadyrajan void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb);
7514bc6f9ae6SManikanta Pubbisetty 
75155e3dd157SKalle Valo #endif /* _WMI_H_ */
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