1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (c) 2018 The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/completion.h> 7 #include <linux/device.h> 8 #include <linux/debugfs.h> 9 #include <linux/idr.h> 10 #include <linux/kernel.h> 11 #include <linux/of.h> 12 #include <linux/of_address.h> 13 #include <linux/module.h> 14 #include <linux/net.h> 15 #include <linux/platform_device.h> 16 #include <linux/qcom_scm.h> 17 #include <linux/string.h> 18 #include <net/sock.h> 19 20 #include "debug.h" 21 #include "snoc.h" 22 23 #define ATH10K_QMI_CLIENT_ID 0x4b4e454c 24 #define ATH10K_QMI_TIMEOUT 30 25 26 static int ath10k_qmi_map_msa_permission(struct ath10k_qmi *qmi, 27 struct ath10k_msa_mem_info *mem_info) 28 { 29 struct qcom_scm_vmperm dst_perms[3]; 30 struct ath10k *ar = qmi->ar; 31 unsigned int src_perms; 32 u32 perm_count; 33 int ret; 34 35 src_perms = BIT(QCOM_SCM_VMID_HLOS); 36 37 dst_perms[0].vmid = QCOM_SCM_VMID_MSS_MSA; 38 dst_perms[0].perm = QCOM_SCM_PERM_RW; 39 dst_perms[1].vmid = QCOM_SCM_VMID_WLAN; 40 dst_perms[1].perm = QCOM_SCM_PERM_RW; 41 42 if (mem_info->secure) { 43 perm_count = 2; 44 } else { 45 dst_perms[2].vmid = QCOM_SCM_VMID_WLAN_CE; 46 dst_perms[2].perm = QCOM_SCM_PERM_RW; 47 perm_count = 3; 48 } 49 50 ret = qcom_scm_assign_mem(mem_info->addr, mem_info->size, 51 &src_perms, dst_perms, perm_count); 52 if (ret < 0) 53 ath10k_err(ar, "failed to assign msa map permissions: %d\n", ret); 54 55 return ret; 56 } 57 58 static int ath10k_qmi_unmap_msa_permission(struct ath10k_qmi *qmi, 59 struct ath10k_msa_mem_info *mem_info) 60 { 61 struct qcom_scm_vmperm dst_perms; 62 struct ath10k *ar = qmi->ar; 63 unsigned int src_perms; 64 int ret; 65 66 src_perms = BIT(QCOM_SCM_VMID_MSS_MSA) | BIT(QCOM_SCM_VMID_WLAN); 67 68 if (!mem_info->secure) 69 src_perms |= BIT(QCOM_SCM_VMID_WLAN_CE); 70 71 dst_perms.vmid = QCOM_SCM_VMID_HLOS; 72 dst_perms.perm = QCOM_SCM_PERM_RW; 73 74 ret = qcom_scm_assign_mem(mem_info->addr, mem_info->size, 75 &src_perms, &dst_perms, 1); 76 if (ret < 0) 77 ath10k_err(ar, "failed to unmap msa permissions: %d\n", ret); 78 79 return ret; 80 } 81 82 static int ath10k_qmi_setup_msa_permissions(struct ath10k_qmi *qmi) 83 { 84 int ret; 85 int i; 86 87 for (i = 0; i < qmi->nr_mem_region; i++) { 88 ret = ath10k_qmi_map_msa_permission(qmi, &qmi->mem_region[i]); 89 if (ret) 90 goto err_unmap; 91 } 92 93 return 0; 94 95 err_unmap: 96 for (i--; i >= 0; i--) 97 ath10k_qmi_unmap_msa_permission(qmi, &qmi->mem_region[i]); 98 return ret; 99 } 100 101 static void ath10k_qmi_remove_msa_permission(struct ath10k_qmi *qmi) 102 { 103 int i; 104 105 for (i = 0; i < qmi->nr_mem_region; i++) 106 ath10k_qmi_unmap_msa_permission(qmi, &qmi->mem_region[i]); 107 } 108 109 static int ath10k_qmi_msa_mem_info_send_sync_msg(struct ath10k_qmi *qmi) 110 { 111 struct wlfw_msa_info_resp_msg_v01 resp = {}; 112 struct wlfw_msa_info_req_msg_v01 req = {}; 113 struct ath10k *ar = qmi->ar; 114 phys_addr_t max_mapped_addr; 115 struct qmi_txn txn; 116 int ret; 117 int i; 118 119 req.msa_addr = qmi->msa_pa; 120 req.size = qmi->msa_mem_size; 121 122 ret = qmi_txn_init(&qmi->qmi_hdl, &txn, 123 wlfw_msa_info_resp_msg_v01_ei, &resp); 124 if (ret < 0) 125 goto out; 126 127 ret = qmi_send_request(&qmi->qmi_hdl, NULL, &txn, 128 QMI_WLFW_MSA_INFO_REQ_V01, 129 WLFW_MSA_INFO_REQ_MSG_V01_MAX_MSG_LEN, 130 wlfw_msa_info_req_msg_v01_ei, &req); 131 if (ret < 0) { 132 qmi_txn_cancel(&txn); 133 ath10k_err(ar, "failed to send msa mem info req: %d\n", ret); 134 goto out; 135 } 136 137 ret = qmi_txn_wait(&txn, ATH10K_QMI_TIMEOUT * HZ); 138 if (ret < 0) 139 goto out; 140 141 if (resp.resp.result != QMI_RESULT_SUCCESS_V01) { 142 ath10k_err(ar, "msa info req rejected: %d\n", resp.resp.error); 143 ret = -EINVAL; 144 goto out; 145 } 146 147 if (resp.mem_region_info_len > QMI_WLFW_MAX_MEM_REG_V01) { 148 ath10k_err(ar, "invalid memory region length received: %d\n", 149 resp.mem_region_info_len); 150 ret = -EINVAL; 151 goto out; 152 } 153 154 max_mapped_addr = qmi->msa_pa + qmi->msa_mem_size; 155 qmi->nr_mem_region = resp.mem_region_info_len; 156 for (i = 0; i < resp.mem_region_info_len; i++) { 157 if (resp.mem_region_info[i].size > qmi->msa_mem_size || 158 resp.mem_region_info[i].region_addr > max_mapped_addr || 159 resp.mem_region_info[i].region_addr < qmi->msa_pa || 160 resp.mem_region_info[i].size + 161 resp.mem_region_info[i].region_addr > max_mapped_addr) { 162 ath10k_err(ar, "received out of range memory region address 0x%llx with size 0x%x, aborting\n", 163 resp.mem_region_info[i].region_addr, 164 resp.mem_region_info[i].size); 165 ret = -EINVAL; 166 goto fail_unwind; 167 } 168 qmi->mem_region[i].addr = resp.mem_region_info[i].region_addr; 169 qmi->mem_region[i].size = resp.mem_region_info[i].size; 170 qmi->mem_region[i].secure = resp.mem_region_info[i].secure_flag; 171 ath10k_dbg(ar, ATH10K_DBG_QMI, 172 "qmi msa mem region %d addr 0x%pa size 0x%x flag 0x%08x\n", 173 i, &qmi->mem_region[i].addr, 174 qmi->mem_region[i].size, 175 qmi->mem_region[i].secure); 176 } 177 178 ath10k_dbg(ar, ATH10K_DBG_QMI, "qmi msa mem info request completed\n"); 179 return 0; 180 181 fail_unwind: 182 memset(&qmi->mem_region[0], 0, sizeof(qmi->mem_region[0]) * i); 183 out: 184 return ret; 185 } 186 187 static int ath10k_qmi_msa_ready_send_sync_msg(struct ath10k_qmi *qmi) 188 { 189 struct wlfw_msa_ready_resp_msg_v01 resp = {}; 190 struct wlfw_msa_ready_req_msg_v01 req = {}; 191 struct ath10k *ar = qmi->ar; 192 struct qmi_txn txn; 193 int ret; 194 195 ret = qmi_txn_init(&qmi->qmi_hdl, &txn, 196 wlfw_msa_ready_resp_msg_v01_ei, &resp); 197 if (ret < 0) 198 goto out; 199 200 ret = qmi_send_request(&qmi->qmi_hdl, NULL, &txn, 201 QMI_WLFW_MSA_READY_REQ_V01, 202 WLFW_MSA_READY_REQ_MSG_V01_MAX_MSG_LEN, 203 wlfw_msa_ready_req_msg_v01_ei, &req); 204 if (ret < 0) { 205 qmi_txn_cancel(&txn); 206 ath10k_err(ar, "failed to send msa mem ready request: %d\n", ret); 207 goto out; 208 } 209 210 ret = qmi_txn_wait(&txn, ATH10K_QMI_TIMEOUT * HZ); 211 if (ret < 0) 212 goto out; 213 214 if (resp.resp.result != QMI_RESULT_SUCCESS_V01) { 215 ath10k_err(ar, "msa ready request rejected: %d\n", resp.resp.error); 216 ret = -EINVAL; 217 } 218 219 ath10k_dbg(ar, ATH10K_DBG_QMI, "qmi msa mem ready request completed\n"); 220 return 0; 221 222 out: 223 return ret; 224 } 225 226 static int ath10k_qmi_bdf_dnld_send_sync(struct ath10k_qmi *qmi) 227 { 228 struct wlfw_bdf_download_resp_msg_v01 resp = {}; 229 struct wlfw_bdf_download_req_msg_v01 *req; 230 struct ath10k *ar = qmi->ar; 231 unsigned int remaining; 232 struct qmi_txn txn; 233 const u8 *temp; 234 int ret; 235 236 req = kzalloc(sizeof(*req), GFP_KERNEL); 237 if (!req) 238 return -ENOMEM; 239 240 temp = ar->normal_mode_fw.board_data; 241 remaining = ar->normal_mode_fw.board_len; 242 243 while (remaining) { 244 req->valid = 1; 245 req->file_id_valid = 1; 246 req->file_id = 0; 247 req->total_size_valid = 1; 248 req->total_size = ar->normal_mode_fw.board_len; 249 req->seg_id_valid = 1; 250 req->data_valid = 1; 251 req->end_valid = 1; 252 253 if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) { 254 req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01; 255 } else { 256 req->data_len = remaining; 257 req->end = 1; 258 } 259 260 memcpy(req->data, temp, req->data_len); 261 262 ret = qmi_txn_init(&qmi->qmi_hdl, &txn, 263 wlfw_bdf_download_resp_msg_v01_ei, 264 &resp); 265 if (ret < 0) 266 goto out; 267 268 ret = qmi_send_request(&qmi->qmi_hdl, NULL, &txn, 269 QMI_WLFW_BDF_DOWNLOAD_REQ_V01, 270 WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN, 271 wlfw_bdf_download_req_msg_v01_ei, req); 272 if (ret < 0) { 273 qmi_txn_cancel(&txn); 274 goto out; 275 } 276 277 ret = qmi_txn_wait(&txn, ATH10K_QMI_TIMEOUT * HZ); 278 279 if (ret < 0) 280 goto out; 281 282 if (resp.resp.result != QMI_RESULT_SUCCESS_V01) { 283 ath10k_err(ar, "failed to download board data file: %d\n", 284 resp.resp.error); 285 ret = -EINVAL; 286 goto out; 287 } 288 289 remaining -= req->data_len; 290 temp += req->data_len; 291 req->seg_id++; 292 } 293 294 ath10k_dbg(ar, ATH10K_DBG_QMI, "qmi bdf download request completed\n"); 295 296 kfree(req); 297 return 0; 298 299 out: 300 kfree(req); 301 return ret; 302 } 303 304 static int ath10k_qmi_send_cal_report_req(struct ath10k_qmi *qmi) 305 { 306 struct wlfw_cal_report_resp_msg_v01 resp = {}; 307 struct wlfw_cal_report_req_msg_v01 req = {}; 308 struct ath10k *ar = qmi->ar; 309 struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar); 310 struct qmi_txn txn; 311 int i, j = 0; 312 int ret; 313 314 if (ar_snoc->xo_cal_supported) { 315 req.xo_cal_data_valid = 1; 316 req.xo_cal_data = ar_snoc->xo_cal_data; 317 } 318 319 ret = qmi_txn_init(&qmi->qmi_hdl, &txn, wlfw_cal_report_resp_msg_v01_ei, 320 &resp); 321 if (ret < 0) 322 goto out; 323 324 for (i = 0; i < QMI_WLFW_MAX_NUM_CAL_V01; i++) { 325 if (qmi->cal_data[i].total_size && 326 qmi->cal_data[i].data) { 327 req.meta_data[j] = qmi->cal_data[i].cal_id; 328 j++; 329 } 330 } 331 req.meta_data_len = j; 332 333 ret = qmi_send_request(&qmi->qmi_hdl, NULL, &txn, 334 QMI_WLFW_CAL_REPORT_REQ_V01, 335 WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN, 336 wlfw_cal_report_req_msg_v01_ei, &req); 337 if (ret < 0) { 338 qmi_txn_cancel(&txn); 339 ath10k_err(ar, "failed to send calibration request: %d\n", ret); 340 goto out; 341 } 342 343 ret = qmi_txn_wait(&txn, ATH10K_QMI_TIMEOUT * HZ); 344 if (ret < 0) 345 goto out; 346 347 if (resp.resp.result != QMI_RESULT_SUCCESS_V01) { 348 ath10k_err(ar, "calibration request rejected: %d\n", resp.resp.error); 349 ret = -EINVAL; 350 goto out; 351 } 352 353 ath10k_dbg(ar, ATH10K_DBG_QMI, "qmi cal report request completed\n"); 354 return 0; 355 356 out: 357 return ret; 358 } 359 360 static int 361 ath10k_qmi_mode_send_sync_msg(struct ath10k *ar, enum wlfw_driver_mode_enum_v01 mode) 362 { 363 struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar); 364 struct ath10k_qmi *qmi = ar_snoc->qmi; 365 struct wlfw_wlan_mode_resp_msg_v01 resp = {}; 366 struct wlfw_wlan_mode_req_msg_v01 req = {}; 367 struct qmi_txn txn; 368 int ret; 369 370 ret = qmi_txn_init(&qmi->qmi_hdl, &txn, 371 wlfw_wlan_mode_resp_msg_v01_ei, 372 &resp); 373 if (ret < 0) 374 goto out; 375 376 req.mode = mode; 377 req.hw_debug_valid = 1; 378 req.hw_debug = 0; 379 380 ret = qmi_send_request(&qmi->qmi_hdl, NULL, &txn, 381 QMI_WLFW_WLAN_MODE_REQ_V01, 382 WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN, 383 wlfw_wlan_mode_req_msg_v01_ei, &req); 384 if (ret < 0) { 385 qmi_txn_cancel(&txn); 386 ath10k_err(ar, "failed to send wlan mode %d request: %d\n", mode, ret); 387 goto out; 388 } 389 390 ret = qmi_txn_wait(&txn, ATH10K_QMI_TIMEOUT * HZ); 391 if (ret < 0) 392 goto out; 393 394 if (resp.resp.result != QMI_RESULT_SUCCESS_V01) { 395 ath10k_err(ar, "more request rejected: %d\n", resp.resp.error); 396 ret = -EINVAL; 397 goto out; 398 } 399 400 ath10k_dbg(ar, ATH10K_DBG_QMI, "qmi wlan mode req completed: %d\n", mode); 401 return 0; 402 403 out: 404 return ret; 405 } 406 407 static int 408 ath10k_qmi_cfg_send_sync_msg(struct ath10k *ar, 409 struct ath10k_qmi_wlan_enable_cfg *config, 410 const char *version) 411 { 412 struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar); 413 struct ath10k_qmi *qmi = ar_snoc->qmi; 414 struct wlfw_wlan_cfg_resp_msg_v01 resp = {}; 415 struct wlfw_wlan_cfg_req_msg_v01 *req; 416 struct qmi_txn txn; 417 int ret; 418 u32 i; 419 420 req = kzalloc(sizeof(*req), GFP_KERNEL); 421 if (!req) 422 return -ENOMEM; 423 424 ret = qmi_txn_init(&qmi->qmi_hdl, &txn, 425 wlfw_wlan_cfg_resp_msg_v01_ei, 426 &resp); 427 if (ret < 0) 428 goto out; 429 430 req->host_version_valid = 0; 431 432 req->tgt_cfg_valid = 1; 433 if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01) 434 req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01; 435 else 436 req->tgt_cfg_len = config->num_ce_tgt_cfg; 437 for (i = 0; i < req->tgt_cfg_len; i++) { 438 req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num; 439 req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir; 440 req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries; 441 req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max; 442 req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags; 443 } 444 445 req->svc_cfg_valid = 1; 446 if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01) 447 req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01; 448 else 449 req->svc_cfg_len = config->num_ce_svc_pipe_cfg; 450 for (i = 0; i < req->svc_cfg_len; i++) { 451 req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id; 452 req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir; 453 req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num; 454 } 455 456 req->shadow_reg_valid = 1; 457 if (config->num_shadow_reg_cfg > 458 QMI_WLFW_MAX_NUM_SHADOW_REG_V01) 459 req->shadow_reg_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V01; 460 else 461 req->shadow_reg_len = config->num_shadow_reg_cfg; 462 463 memcpy(req->shadow_reg, config->shadow_reg_cfg, 464 sizeof(struct wlfw_shadow_reg_cfg_s_v01) * req->shadow_reg_len); 465 466 ret = qmi_send_request(&qmi->qmi_hdl, NULL, &txn, 467 QMI_WLFW_WLAN_CFG_REQ_V01, 468 WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN, 469 wlfw_wlan_cfg_req_msg_v01_ei, req); 470 if (ret < 0) { 471 qmi_txn_cancel(&txn); 472 ath10k_err(ar, "failed to send config request: %d\n", ret); 473 goto out; 474 } 475 476 ret = qmi_txn_wait(&txn, ATH10K_QMI_TIMEOUT * HZ); 477 if (ret < 0) 478 goto out; 479 480 if (resp.resp.result != QMI_RESULT_SUCCESS_V01) { 481 ath10k_err(ar, "config request rejected: %d\n", resp.resp.error); 482 ret = -EINVAL; 483 goto out; 484 } 485 486 ath10k_dbg(ar, ATH10K_DBG_QMI, "qmi config request completed\n"); 487 kfree(req); 488 return 0; 489 490 out: 491 kfree(req); 492 return ret; 493 } 494 495 int ath10k_qmi_wlan_enable(struct ath10k *ar, 496 struct ath10k_qmi_wlan_enable_cfg *config, 497 enum wlfw_driver_mode_enum_v01 mode, 498 const char *version) 499 { 500 int ret; 501 502 ath10k_dbg(ar, ATH10K_DBG_QMI, "qmi mode %d config %p\n", 503 mode, config); 504 505 ret = ath10k_qmi_cfg_send_sync_msg(ar, config, version); 506 if (ret) { 507 ath10k_err(ar, "failed to send qmi config: %d\n", ret); 508 return ret; 509 } 510 511 ret = ath10k_qmi_mode_send_sync_msg(ar, mode); 512 if (ret) { 513 ath10k_err(ar, "failed to send qmi mode: %d\n", ret); 514 return ret; 515 } 516 517 return 0; 518 } 519 520 int ath10k_qmi_wlan_disable(struct ath10k *ar) 521 { 522 return ath10k_qmi_mode_send_sync_msg(ar, QMI_WLFW_OFF_V01); 523 } 524 525 static int ath10k_qmi_cap_send_sync_msg(struct ath10k_qmi *qmi) 526 { 527 struct wlfw_cap_resp_msg_v01 *resp; 528 struct wlfw_cap_req_msg_v01 req = {}; 529 struct ath10k *ar = qmi->ar; 530 struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar); 531 struct qmi_txn txn; 532 int ret; 533 534 resp = kzalloc(sizeof(*resp), GFP_KERNEL); 535 if (!resp) 536 return -ENOMEM; 537 538 ret = qmi_txn_init(&qmi->qmi_hdl, &txn, wlfw_cap_resp_msg_v01_ei, resp); 539 if (ret < 0) 540 goto out; 541 542 ret = qmi_send_request(&qmi->qmi_hdl, NULL, &txn, 543 QMI_WLFW_CAP_REQ_V01, 544 WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN, 545 wlfw_cap_req_msg_v01_ei, &req); 546 if (ret < 0) { 547 qmi_txn_cancel(&txn); 548 ath10k_err(ar, "failed to send capability request: %d\n", ret); 549 goto out; 550 } 551 552 ret = qmi_txn_wait(&txn, ATH10K_QMI_TIMEOUT * HZ); 553 if (ret < 0) 554 goto out; 555 556 if (resp->resp.result != QMI_RESULT_SUCCESS_V01) { 557 ath10k_err(ar, "capability req rejected: %d\n", resp->resp.error); 558 ret = -EINVAL; 559 goto out; 560 } 561 562 if (resp->chip_info_valid) { 563 qmi->chip_info.chip_id = resp->chip_info.chip_id; 564 qmi->chip_info.chip_family = resp->chip_info.chip_family; 565 } 566 567 if (resp->board_info_valid) 568 qmi->board_info.board_id = resp->board_info.board_id; 569 else 570 qmi->board_info.board_id = 0xFF; 571 572 if (resp->soc_info_valid) 573 qmi->soc_info.soc_id = resp->soc_info.soc_id; 574 575 if (resp->fw_version_info_valid) { 576 qmi->fw_version = resp->fw_version_info.fw_version; 577 strlcpy(qmi->fw_build_timestamp, resp->fw_version_info.fw_build_timestamp, 578 sizeof(qmi->fw_build_timestamp)); 579 } 580 581 if (resp->fw_build_id_valid) 582 strlcpy(qmi->fw_build_id, resp->fw_build_id, 583 MAX_BUILD_ID_LEN + 1); 584 585 if (!test_bit(ATH10K_SNOC_FLAG_REGISTERED, &ar_snoc->flags)) { 586 ath10k_info(ar, "qmi chip_id 0x%x chip_family 0x%x board_id 0x%x soc_id 0x%x", 587 qmi->chip_info.chip_id, qmi->chip_info.chip_family, 588 qmi->board_info.board_id, qmi->soc_info.soc_id); 589 ath10k_info(ar, "qmi fw_version 0x%x fw_build_timestamp %s fw_build_id %s", 590 qmi->fw_version, qmi->fw_build_timestamp, qmi->fw_build_id); 591 } 592 593 kfree(resp); 594 return 0; 595 596 out: 597 kfree(resp); 598 return ret; 599 } 600 601 static int ath10k_qmi_host_cap_send_sync(struct ath10k_qmi *qmi) 602 { 603 struct wlfw_host_cap_resp_msg_v01 resp = {}; 604 struct wlfw_host_cap_req_msg_v01 req = {}; 605 struct qmi_elem_info *req_ei; 606 struct ath10k *ar = qmi->ar; 607 struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar); 608 struct qmi_txn txn; 609 int ret; 610 611 req.daemon_support_valid = 1; 612 req.daemon_support = 0; 613 614 ret = qmi_txn_init(&qmi->qmi_hdl, &txn, wlfw_host_cap_resp_msg_v01_ei, 615 &resp); 616 if (ret < 0) 617 goto out; 618 619 if (test_bit(ATH10K_SNOC_FLAG_8BIT_HOST_CAP_QUIRK, &ar_snoc->flags)) 620 req_ei = wlfw_host_cap_8bit_req_msg_v01_ei; 621 else 622 req_ei = wlfw_host_cap_req_msg_v01_ei; 623 624 ret = qmi_send_request(&qmi->qmi_hdl, NULL, &txn, 625 QMI_WLFW_HOST_CAP_REQ_V01, 626 WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN, 627 req_ei, &req); 628 if (ret < 0) { 629 qmi_txn_cancel(&txn); 630 ath10k_err(ar, "failed to send host capability request: %d\n", ret); 631 goto out; 632 } 633 634 ret = qmi_txn_wait(&txn, ATH10K_QMI_TIMEOUT * HZ); 635 if (ret < 0) 636 goto out; 637 638 if (resp.resp.result != QMI_RESULT_SUCCESS_V01) { 639 ath10k_err(ar, "host capability request rejected: %d\n", resp.resp.error); 640 ret = -EINVAL; 641 goto out; 642 } 643 644 ath10k_dbg(ar, ATH10K_DBG_QMI, "qmi host capability request completed\n"); 645 return 0; 646 647 out: 648 return ret; 649 } 650 651 int ath10k_qmi_set_fw_log_mode(struct ath10k *ar, u8 fw_log_mode) 652 { 653 struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar); 654 struct wlfw_ini_resp_msg_v01 resp = {}; 655 struct ath10k_qmi *qmi = ar_snoc->qmi; 656 struct wlfw_ini_req_msg_v01 req = {}; 657 struct qmi_txn txn; 658 int ret; 659 660 req.enablefwlog_valid = 1; 661 req.enablefwlog = fw_log_mode; 662 663 ret = qmi_txn_init(&qmi->qmi_hdl, &txn, wlfw_ini_resp_msg_v01_ei, 664 &resp); 665 if (ret < 0) 666 goto out; 667 668 ret = qmi_send_request(&qmi->qmi_hdl, NULL, &txn, 669 QMI_WLFW_INI_REQ_V01, 670 WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN, 671 wlfw_ini_req_msg_v01_ei, &req); 672 if (ret < 0) { 673 qmi_txn_cancel(&txn); 674 ath10k_err(ar, "failed to send fw log request: %d\n", ret); 675 goto out; 676 } 677 678 ret = qmi_txn_wait(&txn, ATH10K_QMI_TIMEOUT * HZ); 679 if (ret < 0) 680 goto out; 681 682 if (resp.resp.result != QMI_RESULT_SUCCESS_V01) { 683 ath10k_err(ar, "fw log request rejected: %d\n", 684 resp.resp.error); 685 ret = -EINVAL; 686 goto out; 687 } 688 ath10k_dbg(ar, ATH10K_DBG_QMI, "qmi fw log request completed, mode: %d\n", 689 fw_log_mode); 690 return 0; 691 692 out: 693 return ret; 694 } 695 696 static int 697 ath10k_qmi_ind_register_send_sync_msg(struct ath10k_qmi *qmi) 698 { 699 struct wlfw_ind_register_resp_msg_v01 resp = {}; 700 struct wlfw_ind_register_req_msg_v01 req = {}; 701 struct ath10k *ar = qmi->ar; 702 struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar); 703 struct qmi_txn txn; 704 int ret; 705 706 req.client_id_valid = 1; 707 req.client_id = ATH10K_QMI_CLIENT_ID; 708 req.fw_ready_enable_valid = 1; 709 req.fw_ready_enable = 1; 710 req.msa_ready_enable_valid = 1; 711 req.msa_ready_enable = 1; 712 713 if (ar_snoc->xo_cal_supported) { 714 req.xo_cal_enable_valid = 1; 715 req.xo_cal_enable = 1; 716 } 717 718 ret = qmi_txn_init(&qmi->qmi_hdl, &txn, 719 wlfw_ind_register_resp_msg_v01_ei, &resp); 720 if (ret < 0) 721 goto out; 722 723 ret = qmi_send_request(&qmi->qmi_hdl, NULL, &txn, 724 QMI_WLFW_IND_REGISTER_REQ_V01, 725 WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN, 726 wlfw_ind_register_req_msg_v01_ei, &req); 727 if (ret < 0) { 728 qmi_txn_cancel(&txn); 729 ath10k_err(ar, "failed to send indication registered request: %d\n", ret); 730 goto out; 731 } 732 733 ret = qmi_txn_wait(&txn, ATH10K_QMI_TIMEOUT * HZ); 734 if (ret < 0) 735 goto out; 736 737 if (resp.resp.result != QMI_RESULT_SUCCESS_V01) { 738 ath10k_err(ar, "indication request rejected: %d\n", resp.resp.error); 739 ret = -EINVAL; 740 goto out; 741 } 742 743 if (resp.fw_status_valid) { 744 if (resp.fw_status & QMI_WLFW_FW_READY_V01) 745 qmi->fw_ready = true; 746 } 747 ath10k_dbg(ar, ATH10K_DBG_QMI, "qmi indication register request completed\n"); 748 return 0; 749 750 out: 751 return ret; 752 } 753 754 static void ath10k_qmi_event_server_arrive(struct ath10k_qmi *qmi) 755 { 756 struct ath10k *ar = qmi->ar; 757 int ret; 758 759 ret = ath10k_qmi_ind_register_send_sync_msg(qmi); 760 if (ret) 761 return; 762 763 if (qmi->fw_ready) { 764 ath10k_snoc_fw_indication(ar, ATH10K_QMI_EVENT_FW_READY_IND); 765 return; 766 } 767 768 ret = ath10k_qmi_host_cap_send_sync(qmi); 769 if (ret) 770 return; 771 772 ret = ath10k_qmi_msa_mem_info_send_sync_msg(qmi); 773 if (ret) 774 return; 775 776 /* 777 * HACK: sleep for a while inbetween receiving the msa info response 778 * and the XPU update to prevent SDM845 from crashing due to a security 779 * violation, when running MPSS.AT.4.0.c2-01184-SDM845_GEN_PACK-1. 780 */ 781 msleep(20); 782 783 ret = ath10k_qmi_setup_msa_permissions(qmi); 784 if (ret) 785 return; 786 787 ret = ath10k_qmi_msa_ready_send_sync_msg(qmi); 788 if (ret) 789 goto err_setup_msa; 790 791 ret = ath10k_qmi_cap_send_sync_msg(qmi); 792 if (ret) 793 goto err_setup_msa; 794 795 return; 796 797 err_setup_msa: 798 ath10k_qmi_remove_msa_permission(qmi); 799 } 800 801 static int ath10k_qmi_fetch_board_file(struct ath10k_qmi *qmi) 802 { 803 struct ath10k *ar = qmi->ar; 804 805 ar->hif.bus = ATH10K_BUS_SNOC; 806 ar->id.qmi_ids_valid = true; 807 ar->id.qmi_board_id = qmi->board_info.board_id; 808 ar->hw_params.fw.dir = WCN3990_HW_1_0_FW_DIR; 809 810 return ath10k_core_fetch_board_file(qmi->ar, ATH10K_BD_IE_BOARD); 811 } 812 813 static int 814 ath10k_qmi_driver_event_post(struct ath10k_qmi *qmi, 815 enum ath10k_qmi_driver_event_type type, 816 void *data) 817 { 818 struct ath10k_qmi_driver_event *event; 819 820 event = kzalloc(sizeof(*event), GFP_ATOMIC); 821 if (!event) 822 return -ENOMEM; 823 824 event->type = type; 825 event->data = data; 826 827 spin_lock(&qmi->event_lock); 828 list_add_tail(&event->list, &qmi->event_list); 829 spin_unlock(&qmi->event_lock); 830 831 queue_work(qmi->event_wq, &qmi->event_work); 832 833 return 0; 834 } 835 836 static void ath10k_qmi_event_server_exit(struct ath10k_qmi *qmi) 837 { 838 struct ath10k *ar = qmi->ar; 839 struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar); 840 841 ath10k_qmi_remove_msa_permission(qmi); 842 ath10k_core_free_board_files(ar); 843 if (!test_bit(ATH10K_SNOC_FLAG_UNREGISTERING, &ar_snoc->flags)) 844 ath10k_snoc_fw_crashed_dump(ar); 845 846 ath10k_snoc_fw_indication(ar, ATH10K_QMI_EVENT_FW_DOWN_IND); 847 ath10k_dbg(ar, ATH10K_DBG_QMI, "wifi fw qmi service disconnected\n"); 848 } 849 850 static void ath10k_qmi_event_msa_ready(struct ath10k_qmi *qmi) 851 { 852 int ret; 853 854 ret = ath10k_qmi_fetch_board_file(qmi); 855 if (ret) 856 goto out; 857 858 ret = ath10k_qmi_bdf_dnld_send_sync(qmi); 859 if (ret) 860 goto out; 861 862 ret = ath10k_qmi_send_cal_report_req(qmi); 863 864 out: 865 return; 866 } 867 868 static int ath10k_qmi_event_fw_ready_ind(struct ath10k_qmi *qmi) 869 { 870 struct ath10k *ar = qmi->ar; 871 872 ath10k_dbg(ar, ATH10K_DBG_QMI, "wifi fw ready event received\n"); 873 ath10k_snoc_fw_indication(ar, ATH10K_QMI_EVENT_FW_READY_IND); 874 875 return 0; 876 } 877 878 static void ath10k_qmi_fw_ready_ind(struct qmi_handle *qmi_hdl, 879 struct sockaddr_qrtr *sq, 880 struct qmi_txn *txn, const void *data) 881 { 882 struct ath10k_qmi *qmi = container_of(qmi_hdl, struct ath10k_qmi, qmi_hdl); 883 884 ath10k_qmi_driver_event_post(qmi, ATH10K_QMI_EVENT_FW_READY_IND, NULL); 885 } 886 887 static void ath10k_qmi_msa_ready_ind(struct qmi_handle *qmi_hdl, 888 struct sockaddr_qrtr *sq, 889 struct qmi_txn *txn, const void *data) 890 { 891 struct ath10k_qmi *qmi = container_of(qmi_hdl, struct ath10k_qmi, qmi_hdl); 892 893 ath10k_qmi_driver_event_post(qmi, ATH10K_QMI_EVENT_MSA_READY_IND, NULL); 894 } 895 896 static struct qmi_msg_handler qmi_msg_handler[] = { 897 { 898 .type = QMI_INDICATION, 899 .msg_id = QMI_WLFW_FW_READY_IND_V01, 900 .ei = wlfw_fw_ready_ind_msg_v01_ei, 901 .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01), 902 .fn = ath10k_qmi_fw_ready_ind, 903 }, 904 { 905 .type = QMI_INDICATION, 906 .msg_id = QMI_WLFW_MSA_READY_IND_V01, 907 .ei = wlfw_msa_ready_ind_msg_v01_ei, 908 .decoded_size = sizeof(struct wlfw_msa_ready_ind_msg_v01), 909 .fn = ath10k_qmi_msa_ready_ind, 910 }, 911 {} 912 }; 913 914 static int ath10k_qmi_new_server(struct qmi_handle *qmi_hdl, 915 struct qmi_service *service) 916 { 917 struct ath10k_qmi *qmi = container_of(qmi_hdl, struct ath10k_qmi, qmi_hdl); 918 struct sockaddr_qrtr *sq = &qmi->sq; 919 struct ath10k *ar = qmi->ar; 920 int ret; 921 922 sq->sq_family = AF_QIPCRTR; 923 sq->sq_node = service->node; 924 sq->sq_port = service->port; 925 926 ath10k_dbg(ar, ATH10K_DBG_QMI, "wifi fw qmi service found\n"); 927 928 ret = kernel_connect(qmi_hdl->sock, (struct sockaddr *)&qmi->sq, 929 sizeof(qmi->sq), 0); 930 if (ret) { 931 ath10k_err(ar, "failed to connect to a remote QMI service port\n"); 932 return ret; 933 } 934 935 ath10k_dbg(ar, ATH10K_DBG_QMI, "qmi wifi fw qmi service connected\n"); 936 ath10k_qmi_driver_event_post(qmi, ATH10K_QMI_EVENT_SERVER_ARRIVE, NULL); 937 938 return ret; 939 } 940 941 static void ath10k_qmi_del_server(struct qmi_handle *qmi_hdl, 942 struct qmi_service *service) 943 { 944 struct ath10k_qmi *qmi = 945 container_of(qmi_hdl, struct ath10k_qmi, qmi_hdl); 946 947 qmi->fw_ready = false; 948 ath10k_qmi_driver_event_post(qmi, ATH10K_QMI_EVENT_SERVER_EXIT, NULL); 949 } 950 951 static struct qmi_ops ath10k_qmi_ops = { 952 .new_server = ath10k_qmi_new_server, 953 .del_server = ath10k_qmi_del_server, 954 }; 955 956 static void ath10k_qmi_driver_event_work(struct work_struct *work) 957 { 958 struct ath10k_qmi *qmi = container_of(work, struct ath10k_qmi, 959 event_work); 960 struct ath10k_qmi_driver_event *event; 961 struct ath10k *ar = qmi->ar; 962 963 spin_lock(&qmi->event_lock); 964 while (!list_empty(&qmi->event_list)) { 965 event = list_first_entry(&qmi->event_list, 966 struct ath10k_qmi_driver_event, list); 967 list_del(&event->list); 968 spin_unlock(&qmi->event_lock); 969 970 switch (event->type) { 971 case ATH10K_QMI_EVENT_SERVER_ARRIVE: 972 ath10k_qmi_event_server_arrive(qmi); 973 break; 974 case ATH10K_QMI_EVENT_SERVER_EXIT: 975 ath10k_qmi_event_server_exit(qmi); 976 break; 977 case ATH10K_QMI_EVENT_FW_READY_IND: 978 ath10k_qmi_event_fw_ready_ind(qmi); 979 break; 980 case ATH10K_QMI_EVENT_MSA_READY_IND: 981 ath10k_qmi_event_msa_ready(qmi); 982 break; 983 default: 984 ath10k_warn(ar, "invalid event type: %d", event->type); 985 break; 986 } 987 kfree(event); 988 spin_lock(&qmi->event_lock); 989 } 990 spin_unlock(&qmi->event_lock); 991 } 992 993 static int ath10k_qmi_setup_msa_resources(struct ath10k_qmi *qmi, u32 msa_size) 994 { 995 struct ath10k *ar = qmi->ar; 996 struct device *dev = ar->dev; 997 struct device_node *node; 998 struct resource r; 999 int ret; 1000 1001 node = of_parse_phandle(dev->of_node, "memory-region", 0); 1002 if (node) { 1003 ret = of_address_to_resource(node, 0, &r); 1004 if (ret) { 1005 dev_err(dev, "failed to resolve msa fixed region\n"); 1006 return ret; 1007 } 1008 of_node_put(node); 1009 1010 qmi->msa_pa = r.start; 1011 qmi->msa_mem_size = resource_size(&r); 1012 qmi->msa_va = devm_memremap(dev, qmi->msa_pa, qmi->msa_mem_size, 1013 MEMREMAP_WT); 1014 if (IS_ERR(qmi->msa_va)) { 1015 dev_err(dev, "failed to map memory region: %pa\n", &r.start); 1016 return PTR_ERR(qmi->msa_va); 1017 } 1018 } else { 1019 qmi->msa_va = dmam_alloc_coherent(dev, msa_size, 1020 &qmi->msa_pa, GFP_KERNEL); 1021 if (!qmi->msa_va) { 1022 ath10k_err(ar, "failed to allocate dma memory for msa region\n"); 1023 return -ENOMEM; 1024 } 1025 qmi->msa_mem_size = msa_size; 1026 } 1027 1028 ath10k_dbg(ar, ATH10K_DBG_QMI, "msa pa: %pad , msa va: 0x%p\n", 1029 &qmi->msa_pa, 1030 qmi->msa_va); 1031 1032 return 0; 1033 } 1034 1035 int ath10k_qmi_init(struct ath10k *ar, u32 msa_size) 1036 { 1037 struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar); 1038 struct ath10k_qmi *qmi; 1039 int ret; 1040 1041 qmi = kzalloc(sizeof(*qmi), GFP_KERNEL); 1042 if (!qmi) 1043 return -ENOMEM; 1044 1045 qmi->ar = ar; 1046 ar_snoc->qmi = qmi; 1047 1048 ret = ath10k_qmi_setup_msa_resources(qmi, msa_size); 1049 if (ret) 1050 goto err; 1051 1052 ret = qmi_handle_init(&qmi->qmi_hdl, 1053 WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN, 1054 &ath10k_qmi_ops, qmi_msg_handler); 1055 if (ret) 1056 goto err; 1057 1058 qmi->event_wq = alloc_workqueue("ath10k_qmi_driver_event", 1059 WQ_UNBOUND, 1); 1060 if (!qmi->event_wq) { 1061 ath10k_err(ar, "failed to allocate workqueue\n"); 1062 ret = -EFAULT; 1063 goto err_release_qmi_handle; 1064 } 1065 1066 INIT_LIST_HEAD(&qmi->event_list); 1067 spin_lock_init(&qmi->event_lock); 1068 INIT_WORK(&qmi->event_work, ath10k_qmi_driver_event_work); 1069 1070 ret = qmi_add_lookup(&qmi->qmi_hdl, WLFW_SERVICE_ID_V01, 1071 WLFW_SERVICE_VERS_V01, 0); 1072 if (ret) 1073 goto err_qmi_lookup; 1074 1075 return 0; 1076 1077 err_qmi_lookup: 1078 destroy_workqueue(qmi->event_wq); 1079 1080 err_release_qmi_handle: 1081 qmi_handle_release(&qmi->qmi_hdl); 1082 1083 err: 1084 kfree(qmi); 1085 return ret; 1086 } 1087 1088 int ath10k_qmi_deinit(struct ath10k *ar) 1089 { 1090 struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar); 1091 struct ath10k_qmi *qmi = ar_snoc->qmi; 1092 1093 qmi_handle_release(&qmi->qmi_hdl); 1094 cancel_work_sync(&qmi->event_work); 1095 destroy_workqueue(qmi->event_wq); 1096 kfree(qmi); 1097 ar_snoc->qmi = NULL; 1098 1099 return 0; 1100 } 1101