1 /*
2  * Copyright (c) 2005-2011 Atheros Communications Inc.
3  * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 #include <linux/etherdevice.h>
19 #include "htt.h"
20 #include "mac.h"
21 #include "hif.h"
22 #include "txrx.h"
23 #include "debug.h"
24 
25 void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
26 {
27 	htt->num_pending_tx--;
28 	if (htt->num_pending_tx == htt->max_num_pending_tx - 1)
29 		ieee80211_wake_queues(htt->ar->hw);
30 }
31 
32 static void ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
33 {
34 	spin_lock_bh(&htt->tx_lock);
35 	__ath10k_htt_tx_dec_pending(htt);
36 	spin_unlock_bh(&htt->tx_lock);
37 }
38 
39 static int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt)
40 {
41 	int ret = 0;
42 
43 	spin_lock_bh(&htt->tx_lock);
44 
45 	if (htt->num_pending_tx >= htt->max_num_pending_tx) {
46 		ret = -EBUSY;
47 		goto exit;
48 	}
49 
50 	htt->num_pending_tx++;
51 	if (htt->num_pending_tx == htt->max_num_pending_tx)
52 		ieee80211_stop_queues(htt->ar->hw);
53 
54 exit:
55 	spin_unlock_bh(&htt->tx_lock);
56 	return ret;
57 }
58 
59 int ath10k_htt_tx_alloc_msdu_id(struct ath10k_htt *htt)
60 {
61 	int msdu_id;
62 
63 	lockdep_assert_held(&htt->tx_lock);
64 
65 	msdu_id = find_first_zero_bit(htt->used_msdu_ids,
66 				      htt->max_num_pending_tx);
67 	if (msdu_id == htt->max_num_pending_tx)
68 		return -ENOBUFS;
69 
70 	ath10k_dbg(ATH10K_DBG_HTT, "htt tx alloc msdu_id %d\n", msdu_id);
71 	__set_bit(msdu_id, htt->used_msdu_ids);
72 	return msdu_id;
73 }
74 
75 void ath10k_htt_tx_free_msdu_id(struct ath10k_htt *htt, u16 msdu_id)
76 {
77 	lockdep_assert_held(&htt->tx_lock);
78 
79 	if (!test_bit(msdu_id, htt->used_msdu_ids))
80 		ath10k_warn("trying to free unallocated msdu_id %d\n", msdu_id);
81 
82 	ath10k_dbg(ATH10K_DBG_HTT, "htt tx free msdu_id %hu\n", msdu_id);
83 	__clear_bit(msdu_id, htt->used_msdu_ids);
84 }
85 
86 int ath10k_htt_tx_attach(struct ath10k_htt *htt)
87 {
88 	u8 pipe;
89 
90 	spin_lock_init(&htt->tx_lock);
91 	init_waitqueue_head(&htt->empty_tx_wq);
92 
93 	/* At the beginning free queue number should hint us the maximum
94 	 * queue length */
95 	pipe = htt->ar->htc.endpoint[htt->eid].ul_pipe_id;
96 	htt->max_num_pending_tx = ath10k_hif_get_free_queue_number(htt->ar,
97 								   pipe);
98 
99 	ath10k_dbg(ATH10K_DBG_BOOT, "htt tx max num pending tx %d\n",
100 		   htt->max_num_pending_tx);
101 
102 	htt->pending_tx = kzalloc(sizeof(*htt->pending_tx) *
103 				  htt->max_num_pending_tx, GFP_KERNEL);
104 	if (!htt->pending_tx)
105 		return -ENOMEM;
106 
107 	htt->used_msdu_ids = kzalloc(sizeof(unsigned long) *
108 				     BITS_TO_LONGS(htt->max_num_pending_tx),
109 				     GFP_KERNEL);
110 	if (!htt->used_msdu_ids) {
111 		kfree(htt->pending_tx);
112 		return -ENOMEM;
113 	}
114 
115 	return 0;
116 }
117 
118 static void ath10k_htt_tx_cleanup_pending(struct ath10k_htt *htt)
119 {
120 	struct htt_tx_done tx_done = {0};
121 	int msdu_id;
122 
123 	/* No locks needed. Called after communication with the device has
124 	 * been stopped. */
125 
126 	for (msdu_id = 0; msdu_id < htt->max_num_pending_tx; msdu_id++) {
127 		if (!test_bit(msdu_id, htt->used_msdu_ids))
128 			continue;
129 
130 		ath10k_dbg(ATH10K_DBG_HTT, "force cleanup msdu_id %hu\n",
131 			   msdu_id);
132 
133 		tx_done.discard = 1;
134 		tx_done.msdu_id = msdu_id;
135 
136 		ath10k_txrx_tx_unref(htt, &tx_done);
137 	}
138 }
139 
140 void ath10k_htt_tx_detach(struct ath10k_htt *htt)
141 {
142 	ath10k_htt_tx_cleanup_pending(htt);
143 	kfree(htt->pending_tx);
144 	kfree(htt->used_msdu_ids);
145 	return;
146 }
147 
148 void ath10k_htt_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
149 {
150 	dev_kfree_skb_any(skb);
151 }
152 
153 int ath10k_htt_h2t_ver_req_msg(struct ath10k_htt *htt)
154 {
155 	struct sk_buff *skb;
156 	struct htt_cmd *cmd;
157 	int len = 0;
158 	int ret;
159 
160 	len += sizeof(cmd->hdr);
161 	len += sizeof(cmd->ver_req);
162 
163 	skb = ath10k_htc_alloc_skb(len);
164 	if (!skb)
165 		return -ENOMEM;
166 
167 	skb_put(skb, len);
168 	cmd = (struct htt_cmd *)skb->data;
169 	cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_VERSION_REQ;
170 
171 	ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
172 	if (ret) {
173 		dev_kfree_skb_any(skb);
174 		return ret;
175 	}
176 
177 	return 0;
178 }
179 
180 int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u8 mask, u64 cookie)
181 {
182 	struct htt_stats_req *req;
183 	struct sk_buff *skb;
184 	struct htt_cmd *cmd;
185 	int len = 0, ret;
186 
187 	len += sizeof(cmd->hdr);
188 	len += sizeof(cmd->stats_req);
189 
190 	skb = ath10k_htc_alloc_skb(len);
191 	if (!skb)
192 		return -ENOMEM;
193 
194 	skb_put(skb, len);
195 	cmd = (struct htt_cmd *)skb->data;
196 	cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_STATS_REQ;
197 
198 	req = &cmd->stats_req;
199 
200 	memset(req, 0, sizeof(*req));
201 
202 	/* currently we support only max 8 bit masks so no need to worry
203 	 * about endian support */
204 	req->upload_types[0] = mask;
205 	req->reset_types[0] = mask;
206 	req->stat_type = HTT_STATS_REQ_CFG_STAT_TYPE_INVALID;
207 	req->cookie_lsb = cpu_to_le32(cookie & 0xffffffff);
208 	req->cookie_msb = cpu_to_le32((cookie & 0xffffffff00000000ULL) >> 32);
209 
210 	ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
211 	if (ret) {
212 		ath10k_warn("failed to send htt type stats request: %d", ret);
213 		dev_kfree_skb_any(skb);
214 		return ret;
215 	}
216 
217 	return 0;
218 }
219 
220 int ath10k_htt_send_rx_ring_cfg_ll(struct ath10k_htt *htt)
221 {
222 	struct sk_buff *skb;
223 	struct htt_cmd *cmd;
224 	struct htt_rx_ring_setup_ring *ring;
225 	const int num_rx_ring = 1;
226 	u16 flags;
227 	u32 fw_idx;
228 	int len;
229 	int ret;
230 
231 	/*
232 	 * the HW expects the buffer to be an integral number of 4-byte
233 	 * "words"
234 	 */
235 	BUILD_BUG_ON(!IS_ALIGNED(HTT_RX_BUF_SIZE, 4));
236 	BUILD_BUG_ON((HTT_RX_BUF_SIZE & HTT_MAX_CACHE_LINE_SIZE_MASK) != 0);
237 
238 	len = sizeof(cmd->hdr) + sizeof(cmd->rx_setup.hdr)
239 	    + (sizeof(*ring) * num_rx_ring);
240 	skb = ath10k_htc_alloc_skb(len);
241 	if (!skb)
242 		return -ENOMEM;
243 
244 	skb_put(skb, len);
245 
246 	cmd = (struct htt_cmd *)skb->data;
247 	ring = &cmd->rx_setup.rings[0];
248 
249 	cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_RX_RING_CFG;
250 	cmd->rx_setup.hdr.num_rings = 1;
251 
252 	/* FIXME: do we need all of this? */
253 	flags = 0;
254 	flags |= HTT_RX_RING_FLAGS_MAC80211_HDR;
255 	flags |= HTT_RX_RING_FLAGS_MSDU_PAYLOAD;
256 	flags |= HTT_RX_RING_FLAGS_PPDU_START;
257 	flags |= HTT_RX_RING_FLAGS_PPDU_END;
258 	flags |= HTT_RX_RING_FLAGS_MPDU_START;
259 	flags |= HTT_RX_RING_FLAGS_MPDU_END;
260 	flags |= HTT_RX_RING_FLAGS_MSDU_START;
261 	flags |= HTT_RX_RING_FLAGS_MSDU_END;
262 	flags |= HTT_RX_RING_FLAGS_RX_ATTENTION;
263 	flags |= HTT_RX_RING_FLAGS_FRAG_INFO;
264 	flags |= HTT_RX_RING_FLAGS_UNICAST_RX;
265 	flags |= HTT_RX_RING_FLAGS_MULTICAST_RX;
266 	flags |= HTT_RX_RING_FLAGS_CTRL_RX;
267 	flags |= HTT_RX_RING_FLAGS_MGMT_RX;
268 	flags |= HTT_RX_RING_FLAGS_NULL_RX;
269 	flags |= HTT_RX_RING_FLAGS_PHY_DATA_RX;
270 
271 	fw_idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
272 
273 	ring->fw_idx_shadow_reg_paddr =
274 		__cpu_to_le32(htt->rx_ring.alloc_idx.paddr);
275 	ring->rx_ring_base_paddr = __cpu_to_le32(htt->rx_ring.base_paddr);
276 	ring->rx_ring_len = __cpu_to_le16(htt->rx_ring.size);
277 	ring->rx_ring_bufsize = __cpu_to_le16(HTT_RX_BUF_SIZE);
278 	ring->flags = __cpu_to_le16(flags);
279 	ring->fw_idx_init_val = __cpu_to_le16(fw_idx);
280 
281 #define desc_offset(x) (offsetof(struct htt_rx_desc, x) / 4)
282 
283 	ring->mac80211_hdr_offset = __cpu_to_le16(desc_offset(rx_hdr_status));
284 	ring->msdu_payload_offset = __cpu_to_le16(desc_offset(msdu_payload));
285 	ring->ppdu_start_offset = __cpu_to_le16(desc_offset(ppdu_start));
286 	ring->ppdu_end_offset = __cpu_to_le16(desc_offset(ppdu_end));
287 	ring->mpdu_start_offset = __cpu_to_le16(desc_offset(mpdu_start));
288 	ring->mpdu_end_offset = __cpu_to_le16(desc_offset(mpdu_end));
289 	ring->msdu_start_offset = __cpu_to_le16(desc_offset(msdu_start));
290 	ring->msdu_end_offset = __cpu_to_le16(desc_offset(msdu_end));
291 	ring->rx_attention_offset = __cpu_to_le16(desc_offset(attention));
292 	ring->frag_info_offset = __cpu_to_le16(desc_offset(frag_info));
293 
294 #undef desc_offset
295 
296 	ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
297 	if (ret) {
298 		dev_kfree_skb_any(skb);
299 		return ret;
300 	}
301 
302 	return 0;
303 }
304 
305 int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
306 {
307 	struct device *dev = htt->ar->dev;
308 	struct sk_buff *txdesc = NULL;
309 	struct htt_cmd *cmd;
310 	struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(msdu);
311 	u8 vdev_id = skb_cb->vdev_id;
312 	int len = 0;
313 	int msdu_id = -1;
314 	int res;
315 
316 
317 	res = ath10k_htt_tx_inc_pending(htt);
318 	if (res)
319 		goto err;
320 
321 	len += sizeof(cmd->hdr);
322 	len += sizeof(cmd->mgmt_tx);
323 
324 	spin_lock_bh(&htt->tx_lock);
325 	res = ath10k_htt_tx_alloc_msdu_id(htt);
326 	if (res < 0) {
327 		spin_unlock_bh(&htt->tx_lock);
328 		goto err_tx_dec;
329 	}
330 	msdu_id = res;
331 	htt->pending_tx[msdu_id] = msdu;
332 	spin_unlock_bh(&htt->tx_lock);
333 
334 	txdesc = ath10k_htc_alloc_skb(len);
335 	if (!txdesc) {
336 		res = -ENOMEM;
337 		goto err_free_msdu_id;
338 	}
339 
340 	res = ath10k_skb_map(dev, msdu);
341 	if (res)
342 		goto err_free_txdesc;
343 
344 	skb_put(txdesc, len);
345 	cmd = (struct htt_cmd *)txdesc->data;
346 	cmd->hdr.msg_type         = HTT_H2T_MSG_TYPE_MGMT_TX;
347 	cmd->mgmt_tx.msdu_paddr = __cpu_to_le32(ATH10K_SKB_CB(msdu)->paddr);
348 	cmd->mgmt_tx.len        = __cpu_to_le32(msdu->len);
349 	cmd->mgmt_tx.desc_id    = __cpu_to_le32(msdu_id);
350 	cmd->mgmt_tx.vdev_id    = __cpu_to_le32(vdev_id);
351 	memcpy(cmd->mgmt_tx.hdr, msdu->data,
352 	       min_t(int, msdu->len, HTT_MGMT_FRM_HDR_DOWNLOAD_LEN));
353 
354 	skb_cb->htt.frag_len = 0;
355 	skb_cb->htt.pad_len = 0;
356 
357 	res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc);
358 	if (res)
359 		goto err_unmap_msdu;
360 
361 	return 0;
362 
363 err_unmap_msdu:
364 	ath10k_skb_unmap(dev, msdu);
365 err_free_txdesc:
366 	dev_kfree_skb_any(txdesc);
367 err_free_msdu_id:
368 	spin_lock_bh(&htt->tx_lock);
369 	htt->pending_tx[msdu_id] = NULL;
370 	ath10k_htt_tx_free_msdu_id(htt, msdu_id);
371 	spin_unlock_bh(&htt->tx_lock);
372 err_tx_dec:
373 	ath10k_htt_tx_dec_pending(htt);
374 err:
375 	return res;
376 }
377 
378 int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
379 {
380 	struct device *dev = htt->ar->dev;
381 	struct htt_cmd *cmd;
382 	struct htt_data_tx_desc_frag *tx_frags;
383 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data;
384 	struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(msdu);
385 	struct sk_buff *txdesc = NULL;
386 	bool use_frags;
387 	u8 vdev_id = ATH10K_SKB_CB(msdu)->vdev_id;
388 	u8 tid;
389 	int prefetch_len, desc_len;
390 	int msdu_id = -1;
391 	int res;
392 	u8 flags0;
393 	u16 flags1;
394 
395 	res = ath10k_htt_tx_inc_pending(htt);
396 	if (res)
397 		goto err;
398 
399 	spin_lock_bh(&htt->tx_lock);
400 	res = ath10k_htt_tx_alloc_msdu_id(htt);
401 	if (res < 0) {
402 		spin_unlock_bh(&htt->tx_lock);
403 		goto err_tx_dec;
404 	}
405 	msdu_id = res;
406 	htt->pending_tx[msdu_id] = msdu;
407 	spin_unlock_bh(&htt->tx_lock);
408 
409 	prefetch_len = min(htt->prefetch_len, msdu->len);
410 	prefetch_len = roundup(prefetch_len, 4);
411 
412 	desc_len = sizeof(cmd->hdr) + sizeof(cmd->data_tx) + prefetch_len;
413 
414 	txdesc = ath10k_htc_alloc_skb(desc_len);
415 	if (!txdesc) {
416 		res = -ENOMEM;
417 		goto err_free_msdu_id;
418 	}
419 
420 	/* Since HTT 3.0 there is no separate mgmt tx command. However in case
421 	 * of mgmt tx using TX_FRM there is not tx fragment list. Instead of tx
422 	 * fragment list host driver specifies directly frame pointer. */
423 	use_frags = htt->target_version_major < 3 ||
424 		    !ieee80211_is_mgmt(hdr->frame_control);
425 
426 	if (!IS_ALIGNED((unsigned long)txdesc->data, 4)) {
427 		ath10k_warn("htt alignment check failed. dropping packet.\n");
428 		res = -EIO;
429 		goto err_free_txdesc;
430 	}
431 
432 	if (use_frags) {
433 		skb_cb->htt.frag_len = sizeof(*tx_frags) * 2;
434 		skb_cb->htt.pad_len = (unsigned long)msdu->data -
435 				      round_down((unsigned long)msdu->data, 4);
436 
437 		skb_push(msdu, skb_cb->htt.frag_len + skb_cb->htt.pad_len);
438 	} else {
439 		skb_cb->htt.frag_len = 0;
440 		skb_cb->htt.pad_len = 0;
441 	}
442 
443 	res = ath10k_skb_map(dev, msdu);
444 	if (res)
445 		goto err_pull_txfrag;
446 
447 	if (use_frags) {
448 		dma_sync_single_for_cpu(dev, skb_cb->paddr, msdu->len,
449 					DMA_TO_DEVICE);
450 
451 		/* tx fragment list must be terminated with zero-entry */
452 		tx_frags = (struct htt_data_tx_desc_frag *)msdu->data;
453 		tx_frags[0].paddr = __cpu_to_le32(skb_cb->paddr +
454 						  skb_cb->htt.frag_len +
455 						  skb_cb->htt.pad_len);
456 		tx_frags[0].len   = __cpu_to_le32(msdu->len -
457 						  skb_cb->htt.frag_len -
458 						  skb_cb->htt.pad_len);
459 		tx_frags[1].paddr = __cpu_to_le32(0);
460 		tx_frags[1].len   = __cpu_to_le32(0);
461 
462 		dma_sync_single_for_device(dev, skb_cb->paddr, msdu->len,
463 					   DMA_TO_DEVICE);
464 	}
465 
466 	ath10k_dbg(ATH10K_DBG_HTT, "msdu 0x%llx\n",
467 		   (unsigned long long) ATH10K_SKB_CB(msdu)->paddr);
468 	ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "msdu: ",
469 			msdu->data, msdu->len);
470 
471 	skb_put(txdesc, desc_len);
472 	cmd = (struct htt_cmd *)txdesc->data;
473 
474 	tid = ATH10K_SKB_CB(msdu)->htt.tid;
475 
476 	ath10k_dbg(ATH10K_DBG_HTT, "htt data tx using tid %hhu\n", tid);
477 
478 	flags0  = 0;
479 	if (!ieee80211_has_protected(hdr->frame_control))
480 		flags0 |= HTT_DATA_TX_DESC_FLAGS0_NO_ENCRYPT;
481 	flags0 |= HTT_DATA_TX_DESC_FLAGS0_MAC_HDR_PRESENT;
482 
483 	if (use_frags)
484 		flags0 |= SM(ATH10K_HW_TXRX_NATIVE_WIFI,
485 			     HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE);
486 	else
487 		flags0 |= SM(ATH10K_HW_TXRX_MGMT,
488 			     HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE);
489 
490 	flags1  = 0;
491 	flags1 |= SM((u16)vdev_id, HTT_DATA_TX_DESC_FLAGS1_VDEV_ID);
492 	flags1 |= SM((u16)tid, HTT_DATA_TX_DESC_FLAGS1_EXT_TID);
493 	flags1 |= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L3_OFFLOAD;
494 	flags1 |= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L4_OFFLOAD;
495 
496 	cmd->hdr.msg_type        = HTT_H2T_MSG_TYPE_TX_FRM;
497 	cmd->data_tx.flags0      = flags0;
498 	cmd->data_tx.flags1      = __cpu_to_le16(flags1);
499 	cmd->data_tx.len         = __cpu_to_le16(msdu->len -
500 						 skb_cb->htt.frag_len -
501 						 skb_cb->htt.pad_len);
502 	cmd->data_tx.id          = __cpu_to_le16(msdu_id);
503 	cmd->data_tx.frags_paddr = __cpu_to_le32(skb_cb->paddr);
504 	cmd->data_tx.peerid      = __cpu_to_le32(HTT_INVALID_PEERID);
505 
506 	memcpy(cmd->data_tx.prefetch, hdr, prefetch_len);
507 
508 	res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc);
509 	if (res)
510 		goto err_unmap_msdu;
511 
512 	return 0;
513 
514 err_unmap_msdu:
515 	ath10k_skb_unmap(dev, msdu);
516 err_pull_txfrag:
517 	skb_pull(msdu, skb_cb->htt.frag_len + skb_cb->htt.pad_len);
518 err_free_txdesc:
519 	dev_kfree_skb_any(txdesc);
520 err_free_msdu_id:
521 	spin_lock_bh(&htt->tx_lock);
522 	htt->pending_tx[msdu_id] = NULL;
523 	ath10k_htt_tx_free_msdu_id(htt, msdu_id);
524 	spin_unlock_bh(&htt->tx_lock);
525 err_tx_dec:
526 	ath10k_htt_tx_dec_pending(htt);
527 err:
528 	return res;
529 }
530