1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include "core.h" 19 #include "htc.h" 20 #include "htt.h" 21 #include "txrx.h" 22 #include "debug.h" 23 #include "trace.h" 24 #include "mac.h" 25 26 #include <linux/log2.h> 27 28 #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX 29 #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1) 30 31 /* when under memory pressure rx ring refill may fail and needs a retry */ 32 #define HTT_RX_RING_REFILL_RETRY_MS 50 33 34 #define HTT_RX_RING_REFILL_RESCHED_MS 5 35 36 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb); 37 38 static struct sk_buff * 39 ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr) 40 { 41 struct ath10k_skb_rxcb *rxcb; 42 43 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr) 44 if (rxcb->paddr == paddr) 45 return ATH10K_RXCB_SKB(rxcb); 46 47 WARN_ON_ONCE(1); 48 return NULL; 49 } 50 51 static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt) 52 { 53 struct sk_buff *skb; 54 struct ath10k_skb_rxcb *rxcb; 55 struct hlist_node *n; 56 int i; 57 58 if (htt->rx_ring.in_ord_rx) { 59 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) { 60 skb = ATH10K_RXCB_SKB(rxcb); 61 dma_unmap_single(htt->ar->dev, rxcb->paddr, 62 skb->len + skb_tailroom(skb), 63 DMA_FROM_DEVICE); 64 hash_del(&rxcb->hlist); 65 dev_kfree_skb_any(skb); 66 } 67 } else { 68 for (i = 0; i < htt->rx_ring.size; i++) { 69 skb = htt->rx_ring.netbufs_ring[i]; 70 if (!skb) 71 continue; 72 73 rxcb = ATH10K_SKB_RXCB(skb); 74 dma_unmap_single(htt->ar->dev, rxcb->paddr, 75 skb->len + skb_tailroom(skb), 76 DMA_FROM_DEVICE); 77 dev_kfree_skb_any(skb); 78 } 79 } 80 81 htt->rx_ring.fill_cnt = 0; 82 hash_init(htt->rx_ring.skb_table); 83 memset(htt->rx_ring.netbufs_ring, 0, 84 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0])); 85 } 86 87 static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 88 { 89 struct htt_rx_desc *rx_desc; 90 struct ath10k_skb_rxcb *rxcb; 91 struct sk_buff *skb; 92 dma_addr_t paddr; 93 int ret = 0, idx; 94 95 /* The Full Rx Reorder firmware has no way of telling the host 96 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring. 97 * To keep things simple make sure ring is always half empty. This 98 * guarantees there'll be no replenishment overruns possible. 99 */ 100 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2); 101 102 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr); 103 while (num > 0) { 104 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN); 105 if (!skb) { 106 ret = -ENOMEM; 107 goto fail; 108 } 109 110 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN)) 111 skb_pull(skb, 112 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) - 113 skb->data); 114 115 /* Clear rx_desc attention word before posting to Rx ring */ 116 rx_desc = (struct htt_rx_desc *)skb->data; 117 rx_desc->attention.flags = __cpu_to_le32(0); 118 119 paddr = dma_map_single(htt->ar->dev, skb->data, 120 skb->len + skb_tailroom(skb), 121 DMA_FROM_DEVICE); 122 123 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) { 124 dev_kfree_skb_any(skb); 125 ret = -ENOMEM; 126 goto fail; 127 } 128 129 rxcb = ATH10K_SKB_RXCB(skb); 130 rxcb->paddr = paddr; 131 htt->rx_ring.netbufs_ring[idx] = skb; 132 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr); 133 htt->rx_ring.fill_cnt++; 134 135 if (htt->rx_ring.in_ord_rx) { 136 hash_add(htt->rx_ring.skb_table, 137 &ATH10K_SKB_RXCB(skb)->hlist, 138 (u32)paddr); 139 } 140 141 num--; 142 idx++; 143 idx &= htt->rx_ring.size_mask; 144 } 145 146 fail: 147 /* 148 * Make sure the rx buffer is updated before available buffer 149 * index to avoid any potential rx ring corruption. 150 */ 151 mb(); 152 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx); 153 return ret; 154 } 155 156 static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 157 { 158 lockdep_assert_held(&htt->rx_ring.lock); 159 return __ath10k_htt_rx_ring_fill_n(htt, num); 160 } 161 162 static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt) 163 { 164 int ret, num_deficit, num_to_fill; 165 166 /* Refilling the whole RX ring buffer proves to be a bad idea. The 167 * reason is RX may take up significant amount of CPU cycles and starve 168 * other tasks, e.g. TX on an ethernet device while acting as a bridge 169 * with ath10k wlan interface. This ended up with very poor performance 170 * once CPU the host system was overwhelmed with RX on ath10k. 171 * 172 * By limiting the number of refills the replenishing occurs 173 * progressively. This in turns makes use of the fact tasklets are 174 * processed in FIFO order. This means actual RX processing can starve 175 * out refilling. If there's not enough buffers on RX ring FW will not 176 * report RX until it is refilled with enough buffers. This 177 * automatically balances load wrt to CPU power. 178 * 179 * This probably comes at a cost of lower maximum throughput but 180 * improves the average and stability. 181 */ 182 spin_lock_bh(&htt->rx_ring.lock); 183 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt; 184 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit); 185 num_deficit -= num_to_fill; 186 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill); 187 if (ret == -ENOMEM) { 188 /* 189 * Failed to fill it to the desired level - 190 * we'll start a timer and try again next time. 191 * As long as enough buffers are left in the ring for 192 * another A-MPDU rx, no special recovery is needed. 193 */ 194 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + 195 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS)); 196 } else if (num_deficit > 0) { 197 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + 198 msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS)); 199 } 200 spin_unlock_bh(&htt->rx_ring.lock); 201 } 202 203 static void ath10k_htt_rx_ring_refill_retry(unsigned long arg) 204 { 205 struct ath10k_htt *htt = (struct ath10k_htt *)arg; 206 207 ath10k_htt_rx_msdu_buff_replenish(htt); 208 } 209 210 int ath10k_htt_rx_ring_refill(struct ath10k *ar) 211 { 212 struct ath10k_htt *htt = &ar->htt; 213 int ret; 214 215 spin_lock_bh(&htt->rx_ring.lock); 216 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level - 217 htt->rx_ring.fill_cnt)); 218 spin_unlock_bh(&htt->rx_ring.lock); 219 220 if (ret) 221 ath10k_htt_rx_ring_free(htt); 222 223 return ret; 224 } 225 226 void ath10k_htt_rx_free(struct ath10k_htt *htt) 227 { 228 del_timer_sync(&htt->rx_ring.refill_retry_timer); 229 230 skb_queue_purge(&htt->rx_compl_q); 231 skb_queue_purge(&htt->rx_in_ord_compl_q); 232 skb_queue_purge(&htt->tx_fetch_ind_q); 233 234 ath10k_htt_rx_ring_free(htt); 235 236 dma_free_coherent(htt->ar->dev, 237 (htt->rx_ring.size * 238 sizeof(htt->rx_ring.paddrs_ring)), 239 htt->rx_ring.paddrs_ring, 240 htt->rx_ring.base_paddr); 241 242 dma_free_coherent(htt->ar->dev, 243 sizeof(*htt->rx_ring.alloc_idx.vaddr), 244 htt->rx_ring.alloc_idx.vaddr, 245 htt->rx_ring.alloc_idx.paddr); 246 247 kfree(htt->rx_ring.netbufs_ring); 248 } 249 250 static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt) 251 { 252 struct ath10k *ar = htt->ar; 253 int idx; 254 struct sk_buff *msdu; 255 256 lockdep_assert_held(&htt->rx_ring.lock); 257 258 if (htt->rx_ring.fill_cnt == 0) { 259 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n"); 260 return NULL; 261 } 262 263 idx = htt->rx_ring.sw_rd_idx.msdu_payld; 264 msdu = htt->rx_ring.netbufs_ring[idx]; 265 htt->rx_ring.netbufs_ring[idx] = NULL; 266 htt->rx_ring.paddrs_ring[idx] = 0; 267 268 idx++; 269 idx &= htt->rx_ring.size_mask; 270 htt->rx_ring.sw_rd_idx.msdu_payld = idx; 271 htt->rx_ring.fill_cnt--; 272 273 dma_unmap_single(htt->ar->dev, 274 ATH10K_SKB_RXCB(msdu)->paddr, 275 msdu->len + skb_tailroom(msdu), 276 DMA_FROM_DEVICE); 277 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", 278 msdu->data, msdu->len + skb_tailroom(msdu)); 279 280 return msdu; 281 } 282 283 /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */ 284 static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, 285 struct sk_buff_head *amsdu) 286 { 287 struct ath10k *ar = htt->ar; 288 int msdu_len, msdu_chaining = 0; 289 struct sk_buff *msdu; 290 struct htt_rx_desc *rx_desc; 291 292 lockdep_assert_held(&htt->rx_ring.lock); 293 294 for (;;) { 295 int last_msdu, msdu_len_invalid, msdu_chained; 296 297 msdu = ath10k_htt_rx_netbuf_pop(htt); 298 if (!msdu) { 299 __skb_queue_purge(amsdu); 300 return -ENOENT; 301 } 302 303 __skb_queue_tail(amsdu, msdu); 304 305 rx_desc = (struct htt_rx_desc *)msdu->data; 306 307 /* FIXME: we must report msdu payload since this is what caller 308 * expects now 309 */ 310 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload)); 311 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload)); 312 313 /* 314 * Sanity check - confirm the HW is finished filling in the 315 * rx data. 316 * If the HW and SW are working correctly, then it's guaranteed 317 * that the HW's MAC DMA is done before this point in the SW. 318 * To prevent the case that we handle a stale Rx descriptor, 319 * just assert for now until we have a way to recover. 320 */ 321 if (!(__le32_to_cpu(rx_desc->attention.flags) 322 & RX_ATTENTION_FLAGS_MSDU_DONE)) { 323 __skb_queue_purge(amsdu); 324 return -EIO; 325 } 326 327 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags) 328 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR | 329 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR)); 330 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0), 331 RX_MSDU_START_INFO0_MSDU_LENGTH); 332 msdu_chained = rx_desc->frag_info.ring2_more_count; 333 334 if (msdu_len_invalid) 335 msdu_len = 0; 336 337 skb_trim(msdu, 0); 338 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE)); 339 msdu_len -= msdu->len; 340 341 /* Note: Chained buffers do not contain rx descriptor */ 342 while (msdu_chained--) { 343 msdu = ath10k_htt_rx_netbuf_pop(htt); 344 if (!msdu) { 345 __skb_queue_purge(amsdu); 346 return -ENOENT; 347 } 348 349 __skb_queue_tail(amsdu, msdu); 350 skb_trim(msdu, 0); 351 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE)); 352 msdu_len -= msdu->len; 353 msdu_chaining = 1; 354 } 355 356 last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) & 357 RX_MSDU_END_INFO0_LAST_MSDU; 358 359 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention, 360 sizeof(*rx_desc) - sizeof(u32)); 361 362 if (last_msdu) 363 break; 364 } 365 366 if (skb_queue_empty(amsdu)) 367 msdu_chaining = -1; 368 369 /* 370 * Don't refill the ring yet. 371 * 372 * First, the elements popped here are still in use - it is not 373 * safe to overwrite them until the matching call to 374 * mpdu_desc_list_next. Second, for efficiency it is preferable to 375 * refill the rx ring with 1 PPDU's worth of rx buffers (something 376 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers 377 * (something like 3 buffers). Consequently, we'll rely on the txrx 378 * SW to tell us when it is done pulling all the PPDU's rx buffers 379 * out of the rx ring, and then refill it just once. 380 */ 381 382 return msdu_chaining; 383 } 384 385 static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt, 386 u32 paddr) 387 { 388 struct ath10k *ar = htt->ar; 389 struct ath10k_skb_rxcb *rxcb; 390 struct sk_buff *msdu; 391 392 lockdep_assert_held(&htt->rx_ring.lock); 393 394 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr); 395 if (!msdu) 396 return NULL; 397 398 rxcb = ATH10K_SKB_RXCB(msdu); 399 hash_del(&rxcb->hlist); 400 htt->rx_ring.fill_cnt--; 401 402 dma_unmap_single(htt->ar->dev, rxcb->paddr, 403 msdu->len + skb_tailroom(msdu), 404 DMA_FROM_DEVICE); 405 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", 406 msdu->data, msdu->len + skb_tailroom(msdu)); 407 408 return msdu; 409 } 410 411 static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt, 412 struct htt_rx_in_ord_ind *ev, 413 struct sk_buff_head *list) 414 { 415 struct ath10k *ar = htt->ar; 416 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs; 417 struct htt_rx_desc *rxd; 418 struct sk_buff *msdu; 419 int msdu_count; 420 bool is_offload; 421 u32 paddr; 422 423 lockdep_assert_held(&htt->rx_ring.lock); 424 425 msdu_count = __le16_to_cpu(ev->msdu_count); 426 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 427 428 while (msdu_count--) { 429 paddr = __le32_to_cpu(msdu_desc->msdu_paddr); 430 431 msdu = ath10k_htt_rx_pop_paddr(htt, paddr); 432 if (!msdu) { 433 __skb_queue_purge(list); 434 return -ENOENT; 435 } 436 437 __skb_queue_tail(list, msdu); 438 439 if (!is_offload) { 440 rxd = (void *)msdu->data; 441 442 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd)); 443 444 skb_put(msdu, sizeof(*rxd)); 445 skb_pull(msdu, sizeof(*rxd)); 446 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len)); 447 448 if (!(__le32_to_cpu(rxd->attention.flags) & 449 RX_ATTENTION_FLAGS_MSDU_DONE)) { 450 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n"); 451 return -EIO; 452 } 453 } 454 455 msdu_desc++; 456 } 457 458 return 0; 459 } 460 461 int ath10k_htt_rx_alloc(struct ath10k_htt *htt) 462 { 463 struct ath10k *ar = htt->ar; 464 dma_addr_t paddr; 465 void *vaddr; 466 size_t size; 467 struct timer_list *timer = &htt->rx_ring.refill_retry_timer; 468 469 htt->rx_confused = false; 470 471 /* XXX: The fill level could be changed during runtime in response to 472 * the host processing latency. Is this really worth it? 473 */ 474 htt->rx_ring.size = HTT_RX_RING_SIZE; 475 htt->rx_ring.size_mask = htt->rx_ring.size - 1; 476 htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL; 477 478 if (!is_power_of_2(htt->rx_ring.size)) { 479 ath10k_warn(ar, "htt rx ring size is not power of 2\n"); 480 return -EINVAL; 481 } 482 483 htt->rx_ring.netbufs_ring = 484 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *), 485 GFP_KERNEL); 486 if (!htt->rx_ring.netbufs_ring) 487 goto err_netbuf; 488 489 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring); 490 491 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL); 492 if (!vaddr) 493 goto err_dma_ring; 494 495 htt->rx_ring.paddrs_ring = vaddr; 496 htt->rx_ring.base_paddr = paddr; 497 498 vaddr = dma_alloc_coherent(htt->ar->dev, 499 sizeof(*htt->rx_ring.alloc_idx.vaddr), 500 &paddr, GFP_KERNEL); 501 if (!vaddr) 502 goto err_dma_idx; 503 504 htt->rx_ring.alloc_idx.vaddr = vaddr; 505 htt->rx_ring.alloc_idx.paddr = paddr; 506 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask; 507 *htt->rx_ring.alloc_idx.vaddr = 0; 508 509 /* Initialize the Rx refill retry timer */ 510 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt); 511 512 spin_lock_init(&htt->rx_ring.lock); 513 514 htt->rx_ring.fill_cnt = 0; 515 htt->rx_ring.sw_rd_idx.msdu_payld = 0; 516 hash_init(htt->rx_ring.skb_table); 517 518 skb_queue_head_init(&htt->rx_compl_q); 519 skb_queue_head_init(&htt->rx_in_ord_compl_q); 520 skb_queue_head_init(&htt->tx_fetch_ind_q); 521 atomic_set(&htt->num_mpdus_ready, 0); 522 523 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n", 524 htt->rx_ring.size, htt->rx_ring.fill_level); 525 return 0; 526 527 err_dma_idx: 528 dma_free_coherent(htt->ar->dev, 529 (htt->rx_ring.size * 530 sizeof(htt->rx_ring.paddrs_ring)), 531 htt->rx_ring.paddrs_ring, 532 htt->rx_ring.base_paddr); 533 err_dma_ring: 534 kfree(htt->rx_ring.netbufs_ring); 535 err_netbuf: 536 return -ENOMEM; 537 } 538 539 static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar, 540 enum htt_rx_mpdu_encrypt_type type) 541 { 542 switch (type) { 543 case HTT_RX_MPDU_ENCRYPT_NONE: 544 return 0; 545 case HTT_RX_MPDU_ENCRYPT_WEP40: 546 case HTT_RX_MPDU_ENCRYPT_WEP104: 547 return IEEE80211_WEP_IV_LEN; 548 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 549 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 550 return IEEE80211_TKIP_IV_LEN; 551 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 552 return IEEE80211_CCMP_HDR_LEN; 553 case HTT_RX_MPDU_ENCRYPT_WEP128: 554 case HTT_RX_MPDU_ENCRYPT_WAPI: 555 break; 556 } 557 558 ath10k_warn(ar, "unsupported encryption type %d\n", type); 559 return 0; 560 } 561 562 #define MICHAEL_MIC_LEN 8 563 564 static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar, 565 enum htt_rx_mpdu_encrypt_type type) 566 { 567 switch (type) { 568 case HTT_RX_MPDU_ENCRYPT_NONE: 569 return 0; 570 case HTT_RX_MPDU_ENCRYPT_WEP40: 571 case HTT_RX_MPDU_ENCRYPT_WEP104: 572 return IEEE80211_WEP_ICV_LEN; 573 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 574 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 575 return IEEE80211_TKIP_ICV_LEN; 576 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 577 return IEEE80211_CCMP_MIC_LEN; 578 case HTT_RX_MPDU_ENCRYPT_WEP128: 579 case HTT_RX_MPDU_ENCRYPT_WAPI: 580 break; 581 } 582 583 ath10k_warn(ar, "unsupported encryption type %d\n", type); 584 return 0; 585 } 586 587 struct amsdu_subframe_hdr { 588 u8 dst[ETH_ALEN]; 589 u8 src[ETH_ALEN]; 590 __be16 len; 591 } __packed; 592 593 #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63) 594 595 static void ath10k_htt_rx_h_rates(struct ath10k *ar, 596 struct ieee80211_rx_status *status, 597 struct htt_rx_desc *rxd) 598 { 599 struct ieee80211_supported_band *sband; 600 u8 cck, rate, bw, sgi, mcs, nss; 601 u8 preamble = 0; 602 u8 group_id; 603 u32 info1, info2, info3; 604 605 info1 = __le32_to_cpu(rxd->ppdu_start.info1); 606 info2 = __le32_to_cpu(rxd->ppdu_start.info2); 607 info3 = __le32_to_cpu(rxd->ppdu_start.info3); 608 609 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE); 610 611 switch (preamble) { 612 case HTT_RX_LEGACY: 613 /* To get legacy rate index band is required. Since band can't 614 * be undefined check if freq is non-zero. 615 */ 616 if (!status->freq) 617 return; 618 619 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT; 620 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE); 621 rate &= ~RX_PPDU_START_RATE_FLAG; 622 623 sband = &ar->mac.sbands[status->band]; 624 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck); 625 break; 626 case HTT_RX_HT: 627 case HTT_RX_HT_WITH_TXBF: 628 /* HT-SIG - Table 20-11 in info2 and info3 */ 629 mcs = info2 & 0x1F; 630 nss = mcs >> 3; 631 bw = (info2 >> 7) & 1; 632 sgi = (info3 >> 7) & 1; 633 634 status->rate_idx = mcs; 635 status->encoding = RX_ENC_HT; 636 if (sgi) 637 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 638 if (bw) 639 status->bw = RATE_INFO_BW_40; 640 break; 641 case HTT_RX_VHT: 642 case HTT_RX_VHT_WITH_TXBF: 643 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3 644 * TODO check this 645 */ 646 bw = info2 & 3; 647 sgi = info3 & 1; 648 group_id = (info2 >> 4) & 0x3F; 649 650 if (GROUP_ID_IS_SU_MIMO(group_id)) { 651 mcs = (info3 >> 4) & 0x0F; 652 nss = ((info2 >> 10) & 0x07) + 1; 653 } else { 654 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor 655 * so it's impossible to decode MCS. Also since 656 * firmware consumes Group Id Management frames host 657 * has no knowledge regarding group/user position 658 * mapping so it's impossible to pick the correct Nsts 659 * from VHT-SIG-A1. 660 * 661 * Bandwidth and SGI are valid so report the rateinfo 662 * on best-effort basis. 663 */ 664 mcs = 0; 665 nss = 1; 666 } 667 668 if (mcs > 0x09) { 669 ath10k_warn(ar, "invalid MCS received %u\n", mcs); 670 ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n", 671 __le32_to_cpu(rxd->attention.flags), 672 __le32_to_cpu(rxd->mpdu_start.info0), 673 __le32_to_cpu(rxd->mpdu_start.info1), 674 __le32_to_cpu(rxd->msdu_start.common.info0), 675 __le32_to_cpu(rxd->msdu_start.common.info1), 676 rxd->ppdu_start.info0, 677 __le32_to_cpu(rxd->ppdu_start.info1), 678 __le32_to_cpu(rxd->ppdu_start.info2), 679 __le32_to_cpu(rxd->ppdu_start.info3), 680 __le32_to_cpu(rxd->ppdu_start.info4)); 681 682 ath10k_warn(ar, "msdu end %08x mpdu end %08x\n", 683 __le32_to_cpu(rxd->msdu_end.common.info0), 684 __le32_to_cpu(rxd->mpdu_end.info0)); 685 686 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, 687 "rx desc msdu payload: ", 688 rxd->msdu_payload, 50); 689 } 690 691 status->rate_idx = mcs; 692 status->nss = nss; 693 694 if (sgi) 695 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 696 697 switch (bw) { 698 /* 20MHZ */ 699 case 0: 700 break; 701 /* 40MHZ */ 702 case 1: 703 status->bw = RATE_INFO_BW_40; 704 break; 705 /* 80MHZ */ 706 case 2: 707 status->bw = RATE_INFO_BW_80; 708 break; 709 case 3: 710 status->bw = RATE_INFO_BW_160; 711 break; 712 } 713 714 status->encoding = RX_ENC_VHT; 715 break; 716 default: 717 break; 718 } 719 } 720 721 static struct ieee80211_channel * 722 ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd) 723 { 724 struct ath10k_peer *peer; 725 struct ath10k_vif *arvif; 726 struct cfg80211_chan_def def; 727 u16 peer_id; 728 729 lockdep_assert_held(&ar->data_lock); 730 731 if (!rxd) 732 return NULL; 733 734 if (rxd->attention.flags & 735 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID)) 736 return NULL; 737 738 if (!(rxd->msdu_end.common.info0 & 739 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU))) 740 return NULL; 741 742 peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0), 743 RX_MPDU_START_INFO0_PEER_IDX); 744 745 peer = ath10k_peer_find_by_id(ar, peer_id); 746 if (!peer) 747 return NULL; 748 749 arvif = ath10k_get_arvif(ar, peer->vdev_id); 750 if (WARN_ON_ONCE(!arvif)) 751 return NULL; 752 753 if (ath10k_mac_vif_chan(arvif->vif, &def)) 754 return NULL; 755 756 return def.chan; 757 } 758 759 static struct ieee80211_channel * 760 ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id) 761 { 762 struct ath10k_vif *arvif; 763 struct cfg80211_chan_def def; 764 765 lockdep_assert_held(&ar->data_lock); 766 767 list_for_each_entry(arvif, &ar->arvifs, list) { 768 if (arvif->vdev_id == vdev_id && 769 ath10k_mac_vif_chan(arvif->vif, &def) == 0) 770 return def.chan; 771 } 772 773 return NULL; 774 } 775 776 static void 777 ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw, 778 struct ieee80211_chanctx_conf *conf, 779 void *data) 780 { 781 struct cfg80211_chan_def *def = data; 782 783 *def = conf->def; 784 } 785 786 static struct ieee80211_channel * 787 ath10k_htt_rx_h_any_channel(struct ath10k *ar) 788 { 789 struct cfg80211_chan_def def = {}; 790 791 ieee80211_iter_chan_contexts_atomic(ar->hw, 792 ath10k_htt_rx_h_any_chan_iter, 793 &def); 794 795 return def.chan; 796 } 797 798 static bool ath10k_htt_rx_h_channel(struct ath10k *ar, 799 struct ieee80211_rx_status *status, 800 struct htt_rx_desc *rxd, 801 u32 vdev_id) 802 { 803 struct ieee80211_channel *ch; 804 805 spin_lock_bh(&ar->data_lock); 806 ch = ar->scan_channel; 807 if (!ch) 808 ch = ar->rx_channel; 809 if (!ch) 810 ch = ath10k_htt_rx_h_peer_channel(ar, rxd); 811 if (!ch) 812 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id); 813 if (!ch) 814 ch = ath10k_htt_rx_h_any_channel(ar); 815 if (!ch) 816 ch = ar->tgt_oper_chan; 817 spin_unlock_bh(&ar->data_lock); 818 819 if (!ch) 820 return false; 821 822 status->band = ch->band; 823 status->freq = ch->center_freq; 824 825 return true; 826 } 827 828 static void ath10k_htt_rx_h_signal(struct ath10k *ar, 829 struct ieee80211_rx_status *status, 830 struct htt_rx_desc *rxd) 831 { 832 int i; 833 834 for (i = 0; i < IEEE80211_MAX_CHAINS ; i++) { 835 status->chains &= ~BIT(i); 836 837 if (rxd->ppdu_start.rssi_chains[i].pri20_mhz != 0x80) { 838 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR + 839 rxd->ppdu_start.rssi_chains[i].pri20_mhz; 840 841 status->chains |= BIT(i); 842 } 843 } 844 845 /* FIXME: Get real NF */ 846 status->signal = ATH10K_DEFAULT_NOISE_FLOOR + 847 rxd->ppdu_start.rssi_comb; 848 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL; 849 } 850 851 static void ath10k_htt_rx_h_mactime(struct ath10k *ar, 852 struct ieee80211_rx_status *status, 853 struct htt_rx_desc *rxd) 854 { 855 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This 856 * means all prior MSDUs in a PPDU are reported to mac80211 without the 857 * TSF. Is it worth holding frames until end of PPDU is known? 858 * 859 * FIXME: Can we get/compute 64bit TSF? 860 */ 861 status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp); 862 status->flag |= RX_FLAG_MACTIME_END; 863 } 864 865 static void ath10k_htt_rx_h_ppdu(struct ath10k *ar, 866 struct sk_buff_head *amsdu, 867 struct ieee80211_rx_status *status, 868 u32 vdev_id) 869 { 870 struct sk_buff *first; 871 struct htt_rx_desc *rxd; 872 bool is_first_ppdu; 873 bool is_last_ppdu; 874 875 if (skb_queue_empty(amsdu)) 876 return; 877 878 first = skb_peek(amsdu); 879 rxd = (void *)first->data - sizeof(*rxd); 880 881 is_first_ppdu = !!(rxd->attention.flags & 882 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU)); 883 is_last_ppdu = !!(rxd->attention.flags & 884 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU)); 885 886 if (is_first_ppdu) { 887 /* New PPDU starts so clear out the old per-PPDU status. */ 888 status->freq = 0; 889 status->rate_idx = 0; 890 status->nss = 0; 891 status->encoding = RX_ENC_LEGACY; 892 status->bw = RATE_INFO_BW_20; 893 status->flag &= ~RX_FLAG_MACTIME_END; 894 status->flag |= RX_FLAG_NO_SIGNAL_VAL; 895 896 ath10k_htt_rx_h_signal(ar, status, rxd); 897 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id); 898 ath10k_htt_rx_h_rates(ar, status, rxd); 899 } 900 901 if (is_last_ppdu) 902 ath10k_htt_rx_h_mactime(ar, status, rxd); 903 } 904 905 static const char * const tid_to_ac[] = { 906 "BE", 907 "BK", 908 "BK", 909 "BE", 910 "VI", 911 "VI", 912 "VO", 913 "VO", 914 }; 915 916 static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size) 917 { 918 u8 *qc; 919 int tid; 920 921 if (!ieee80211_is_data_qos(hdr->frame_control)) 922 return ""; 923 924 qc = ieee80211_get_qos_ctl(hdr); 925 tid = *qc & IEEE80211_QOS_CTL_TID_MASK; 926 if (tid < 8) 927 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]); 928 else 929 snprintf(out, size, "tid %d", tid); 930 931 return out; 932 } 933 934 static void ath10k_process_rx(struct ath10k *ar, 935 struct ieee80211_rx_status *rx_status, 936 struct sk_buff *skb) 937 { 938 struct ieee80211_rx_status *status; 939 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 940 char tid[32]; 941 942 status = IEEE80211_SKB_RXCB(skb); 943 *status = *rx_status; 944 945 ath10k_dbg(ar, ATH10K_DBG_DATA, 946 "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n", 947 skb, 948 skb->len, 949 ieee80211_get_SA(hdr), 950 ath10k_get_tid(hdr, tid, sizeof(tid)), 951 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ? 952 "mcast" : "ucast", 953 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4, 954 (status->encoding == RX_ENC_LEGACY) ? "legacy" : "", 955 (status->encoding == RX_ENC_HT) ? "ht" : "", 956 (status->encoding == RX_ENC_VHT) ? "vht" : "", 957 (status->bw == RATE_INFO_BW_40) ? "40" : "", 958 (status->bw == RATE_INFO_BW_80) ? "80" : "", 959 (status->bw == RATE_INFO_BW_160) ? "160" : "", 960 status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "", 961 status->rate_idx, 962 status->nss, 963 status->freq, 964 status->band, status->flag, 965 !!(status->flag & RX_FLAG_FAILED_FCS_CRC), 966 !!(status->flag & RX_FLAG_MMIC_ERROR), 967 !!(status->flag & RX_FLAG_AMSDU_MORE)); 968 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ", 969 skb->data, skb->len); 970 trace_ath10k_rx_hdr(ar, skb->data, skb->len); 971 trace_ath10k_rx_payload(ar, skb->data, skb->len); 972 973 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi); 974 } 975 976 static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar, 977 struct ieee80211_hdr *hdr) 978 { 979 int len = ieee80211_hdrlen(hdr->frame_control); 980 981 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING, 982 ar->running_fw->fw_file.fw_features)) 983 len = round_up(len, 4); 984 985 return len; 986 } 987 988 static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar, 989 struct sk_buff *msdu, 990 struct ieee80211_rx_status *status, 991 enum htt_rx_mpdu_encrypt_type enctype, 992 bool is_decrypted) 993 { 994 struct ieee80211_hdr *hdr; 995 struct htt_rx_desc *rxd; 996 size_t hdr_len; 997 size_t crypto_len; 998 bool is_first; 999 bool is_last; 1000 1001 rxd = (void *)msdu->data - sizeof(*rxd); 1002 is_first = !!(rxd->msdu_end.common.info0 & 1003 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); 1004 is_last = !!(rxd->msdu_end.common.info0 & 1005 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); 1006 1007 /* Delivered decapped frame: 1008 * [802.11 header] 1009 * [crypto param] <-- can be trimmed if !fcs_err && 1010 * !decrypt_err && !peer_idx_invalid 1011 * [amsdu header] <-- only if A-MSDU 1012 * [rfc1042/llc] 1013 * [payload] 1014 * [FCS] <-- at end, needs to be trimmed 1015 */ 1016 1017 /* This probably shouldn't happen but warn just in case */ 1018 if (unlikely(WARN_ON_ONCE(!is_first))) 1019 return; 1020 1021 /* This probably shouldn't happen but warn just in case */ 1022 if (unlikely(WARN_ON_ONCE(!(is_first && is_last)))) 1023 return; 1024 1025 skb_trim(msdu, msdu->len - FCS_LEN); 1026 1027 /* In most cases this will be true for sniffed frames. It makes sense 1028 * to deliver them as-is without stripping the crypto param. This is 1029 * necessary for software based decryption. 1030 * 1031 * If there's no error then the frame is decrypted. At least that is 1032 * the case for frames that come in via fragmented rx indication. 1033 */ 1034 if (!is_decrypted) 1035 return; 1036 1037 /* The payload is decrypted so strip crypto params. Start from tail 1038 * since hdr is used to compute some stuff. 1039 */ 1040 1041 hdr = (void *)msdu->data; 1042 1043 /* Tail */ 1044 if (status->flag & RX_FLAG_IV_STRIPPED) 1045 skb_trim(msdu, msdu->len - 1046 ath10k_htt_rx_crypto_tail_len(ar, enctype)); 1047 1048 /* MMIC */ 1049 if ((status->flag & RX_FLAG_MMIC_STRIPPED) && 1050 !ieee80211_has_morefrags(hdr->frame_control) && 1051 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA) 1052 skb_trim(msdu, msdu->len - 8); 1053 1054 /* Head */ 1055 if (status->flag & RX_FLAG_IV_STRIPPED) { 1056 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1057 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1058 1059 memmove((void *)msdu->data + crypto_len, 1060 (void *)msdu->data, hdr_len); 1061 skb_pull(msdu, crypto_len); 1062 } 1063 } 1064 1065 static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar, 1066 struct sk_buff *msdu, 1067 struct ieee80211_rx_status *status, 1068 const u8 first_hdr[64]) 1069 { 1070 struct ieee80211_hdr *hdr; 1071 struct htt_rx_desc *rxd; 1072 size_t hdr_len; 1073 u8 da[ETH_ALEN]; 1074 u8 sa[ETH_ALEN]; 1075 int l3_pad_bytes; 1076 1077 /* Delivered decapped frame: 1078 * [nwifi 802.11 header] <-- replaced with 802.11 hdr 1079 * [rfc1042/llc] 1080 * 1081 * Note: The nwifi header doesn't have QoS Control and is 1082 * (always?) a 3addr frame. 1083 * 1084 * Note2: There's no A-MSDU subframe header. Even if it's part 1085 * of an A-MSDU. 1086 */ 1087 1088 /* pull decapped header and copy SA & DA */ 1089 rxd = (void *)msdu->data - sizeof(*rxd); 1090 1091 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1092 skb_put(msdu, l3_pad_bytes); 1093 1094 hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes); 1095 1096 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr); 1097 ether_addr_copy(da, ieee80211_get_DA(hdr)); 1098 ether_addr_copy(sa, ieee80211_get_SA(hdr)); 1099 skb_pull(msdu, hdr_len); 1100 1101 /* push original 802.11 header */ 1102 hdr = (struct ieee80211_hdr *)first_hdr; 1103 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1104 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1105 1106 /* original 802.11 header has a different DA and in 1107 * case of 4addr it may also have different SA 1108 */ 1109 hdr = (struct ieee80211_hdr *)msdu->data; 1110 ether_addr_copy(ieee80211_get_DA(hdr), da); 1111 ether_addr_copy(ieee80211_get_SA(hdr), sa); 1112 } 1113 1114 static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar, 1115 struct sk_buff *msdu, 1116 enum htt_rx_mpdu_encrypt_type enctype) 1117 { 1118 struct ieee80211_hdr *hdr; 1119 struct htt_rx_desc *rxd; 1120 size_t hdr_len, crypto_len; 1121 void *rfc1042; 1122 bool is_first, is_last, is_amsdu; 1123 int bytes_aligned = ar->hw_params.decap_align_bytes; 1124 1125 rxd = (void *)msdu->data - sizeof(*rxd); 1126 hdr = (void *)rxd->rx_hdr_status; 1127 1128 is_first = !!(rxd->msdu_end.common.info0 & 1129 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); 1130 is_last = !!(rxd->msdu_end.common.info0 & 1131 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); 1132 is_amsdu = !(is_first && is_last); 1133 1134 rfc1042 = hdr; 1135 1136 if (is_first) { 1137 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1138 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1139 1140 rfc1042 += round_up(hdr_len, bytes_aligned) + 1141 round_up(crypto_len, bytes_aligned); 1142 } 1143 1144 if (is_amsdu) 1145 rfc1042 += sizeof(struct amsdu_subframe_hdr); 1146 1147 return rfc1042; 1148 } 1149 1150 static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar, 1151 struct sk_buff *msdu, 1152 struct ieee80211_rx_status *status, 1153 const u8 first_hdr[64], 1154 enum htt_rx_mpdu_encrypt_type enctype) 1155 { 1156 struct ieee80211_hdr *hdr; 1157 struct ethhdr *eth; 1158 size_t hdr_len; 1159 void *rfc1042; 1160 u8 da[ETH_ALEN]; 1161 u8 sa[ETH_ALEN]; 1162 int l3_pad_bytes; 1163 struct htt_rx_desc *rxd; 1164 1165 /* Delivered decapped frame: 1166 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc 1167 * [payload] 1168 */ 1169 1170 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype); 1171 if (WARN_ON_ONCE(!rfc1042)) 1172 return; 1173 1174 rxd = (void *)msdu->data - sizeof(*rxd); 1175 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1176 skb_put(msdu, l3_pad_bytes); 1177 skb_pull(msdu, l3_pad_bytes); 1178 1179 /* pull decapped header and copy SA & DA */ 1180 eth = (struct ethhdr *)msdu->data; 1181 ether_addr_copy(da, eth->h_dest); 1182 ether_addr_copy(sa, eth->h_source); 1183 skb_pull(msdu, sizeof(struct ethhdr)); 1184 1185 /* push rfc1042/llc/snap */ 1186 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042, 1187 sizeof(struct rfc1042_hdr)); 1188 1189 /* push original 802.11 header */ 1190 hdr = (struct ieee80211_hdr *)first_hdr; 1191 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1192 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1193 1194 /* original 802.11 header has a different DA and in 1195 * case of 4addr it may also have different SA 1196 */ 1197 hdr = (struct ieee80211_hdr *)msdu->data; 1198 ether_addr_copy(ieee80211_get_DA(hdr), da); 1199 ether_addr_copy(ieee80211_get_SA(hdr), sa); 1200 } 1201 1202 static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar, 1203 struct sk_buff *msdu, 1204 struct ieee80211_rx_status *status, 1205 const u8 first_hdr[64]) 1206 { 1207 struct ieee80211_hdr *hdr; 1208 size_t hdr_len; 1209 int l3_pad_bytes; 1210 struct htt_rx_desc *rxd; 1211 1212 /* Delivered decapped frame: 1213 * [amsdu header] <-- replaced with 802.11 hdr 1214 * [rfc1042/llc] 1215 * [payload] 1216 */ 1217 1218 rxd = (void *)msdu->data - sizeof(*rxd); 1219 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1220 1221 skb_put(msdu, l3_pad_bytes); 1222 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes); 1223 1224 hdr = (struct ieee80211_hdr *)first_hdr; 1225 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1226 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1227 } 1228 1229 static void ath10k_htt_rx_h_undecap(struct ath10k *ar, 1230 struct sk_buff *msdu, 1231 struct ieee80211_rx_status *status, 1232 u8 first_hdr[64], 1233 enum htt_rx_mpdu_encrypt_type enctype, 1234 bool is_decrypted) 1235 { 1236 struct htt_rx_desc *rxd; 1237 enum rx_msdu_decap_format decap; 1238 1239 /* First msdu's decapped header: 1240 * [802.11 header] <-- padded to 4 bytes long 1241 * [crypto param] <-- padded to 4 bytes long 1242 * [amsdu header] <-- only if A-MSDU 1243 * [rfc1042/llc] 1244 * 1245 * Other (2nd, 3rd, ..) msdu's decapped header: 1246 * [amsdu header] <-- only if A-MSDU 1247 * [rfc1042/llc] 1248 */ 1249 1250 rxd = (void *)msdu->data - sizeof(*rxd); 1251 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1), 1252 RX_MSDU_START_INFO1_DECAP_FORMAT); 1253 1254 switch (decap) { 1255 case RX_MSDU_DECAP_RAW: 1256 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype, 1257 is_decrypted); 1258 break; 1259 case RX_MSDU_DECAP_NATIVE_WIFI: 1260 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr); 1261 break; 1262 case RX_MSDU_DECAP_ETHERNET2_DIX: 1263 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype); 1264 break; 1265 case RX_MSDU_DECAP_8023_SNAP_LLC: 1266 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr); 1267 break; 1268 } 1269 } 1270 1271 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb) 1272 { 1273 struct htt_rx_desc *rxd; 1274 u32 flags, info; 1275 bool is_ip4, is_ip6; 1276 bool is_tcp, is_udp; 1277 bool ip_csum_ok, tcpudp_csum_ok; 1278 1279 rxd = (void *)skb->data - sizeof(*rxd); 1280 flags = __le32_to_cpu(rxd->attention.flags); 1281 info = __le32_to_cpu(rxd->msdu_start.common.info1); 1282 1283 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO); 1284 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO); 1285 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO); 1286 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO); 1287 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL); 1288 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL); 1289 1290 if (!is_ip4 && !is_ip6) 1291 return CHECKSUM_NONE; 1292 if (!is_tcp && !is_udp) 1293 return CHECKSUM_NONE; 1294 if (!ip_csum_ok) 1295 return CHECKSUM_NONE; 1296 if (!tcpudp_csum_ok) 1297 return CHECKSUM_NONE; 1298 1299 return CHECKSUM_UNNECESSARY; 1300 } 1301 1302 static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu) 1303 { 1304 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu); 1305 } 1306 1307 static void ath10k_htt_rx_h_mpdu(struct ath10k *ar, 1308 struct sk_buff_head *amsdu, 1309 struct ieee80211_rx_status *status) 1310 { 1311 struct sk_buff *first; 1312 struct sk_buff *last; 1313 struct sk_buff *msdu; 1314 struct htt_rx_desc *rxd; 1315 struct ieee80211_hdr *hdr; 1316 enum htt_rx_mpdu_encrypt_type enctype; 1317 u8 first_hdr[64]; 1318 u8 *qos; 1319 size_t hdr_len; 1320 bool has_fcs_err; 1321 bool has_crypto_err; 1322 bool has_tkip_err; 1323 bool has_peer_idx_invalid; 1324 bool is_decrypted; 1325 bool is_mgmt; 1326 u32 attention; 1327 1328 if (skb_queue_empty(amsdu)) 1329 return; 1330 1331 first = skb_peek(amsdu); 1332 rxd = (void *)first->data - sizeof(*rxd); 1333 1334 is_mgmt = !!(rxd->attention.flags & 1335 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE)); 1336 1337 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), 1338 RX_MPDU_START_INFO0_ENCRYPT_TYPE); 1339 1340 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11 1341 * decapped header. It'll be used for undecapping of each MSDU. 1342 */ 1343 hdr = (void *)rxd->rx_hdr_status; 1344 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1345 memcpy(first_hdr, hdr, hdr_len); 1346 1347 /* Each A-MSDU subframe will use the original header as the base and be 1348 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl. 1349 */ 1350 hdr = (void *)first_hdr; 1351 qos = ieee80211_get_qos_ctl(hdr); 1352 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT; 1353 1354 /* Some attention flags are valid only in the last MSDU. */ 1355 last = skb_peek_tail(amsdu); 1356 rxd = (void *)last->data - sizeof(*rxd); 1357 attention = __le32_to_cpu(rxd->attention.flags); 1358 1359 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR); 1360 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR); 1361 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR); 1362 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID); 1363 1364 /* Note: If hardware captures an encrypted frame that it can't decrypt, 1365 * e.g. due to fcs error, missing peer or invalid key data it will 1366 * report the frame as raw. 1367 */ 1368 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE && 1369 !has_fcs_err && 1370 !has_crypto_err && 1371 !has_peer_idx_invalid); 1372 1373 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */ 1374 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC | 1375 RX_FLAG_MMIC_ERROR | 1376 RX_FLAG_DECRYPTED | 1377 RX_FLAG_IV_STRIPPED | 1378 RX_FLAG_ONLY_MONITOR | 1379 RX_FLAG_MMIC_STRIPPED); 1380 1381 if (has_fcs_err) 1382 status->flag |= RX_FLAG_FAILED_FCS_CRC; 1383 1384 if (has_tkip_err) 1385 status->flag |= RX_FLAG_MMIC_ERROR; 1386 1387 /* Firmware reports all necessary management frames via WMI already. 1388 * They are not reported to monitor interfaces at all so pass the ones 1389 * coming via HTT to monitor interfaces instead. This simplifies 1390 * matters a lot. 1391 */ 1392 if (is_mgmt) 1393 status->flag |= RX_FLAG_ONLY_MONITOR; 1394 1395 if (is_decrypted) { 1396 status->flag |= RX_FLAG_DECRYPTED; 1397 1398 if (likely(!is_mgmt)) 1399 status->flag |= RX_FLAG_IV_STRIPPED | 1400 RX_FLAG_MMIC_STRIPPED; 1401 } 1402 1403 skb_queue_walk(amsdu, msdu) { 1404 ath10k_htt_rx_h_csum_offload(msdu); 1405 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype, 1406 is_decrypted); 1407 1408 /* Undecapping involves copying the original 802.11 header back 1409 * to sk_buff. If frame is protected and hardware has decrypted 1410 * it then remove the protected bit. 1411 */ 1412 if (!is_decrypted) 1413 continue; 1414 if (is_mgmt) 1415 continue; 1416 1417 hdr = (void *)msdu->data; 1418 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 1419 } 1420 } 1421 1422 static void ath10k_htt_rx_h_deliver(struct ath10k *ar, 1423 struct sk_buff_head *amsdu, 1424 struct ieee80211_rx_status *status) 1425 { 1426 struct sk_buff *msdu; 1427 1428 while ((msdu = __skb_dequeue(amsdu))) { 1429 /* Setup per-MSDU flags */ 1430 if (skb_queue_empty(amsdu)) 1431 status->flag &= ~RX_FLAG_AMSDU_MORE; 1432 else 1433 status->flag |= RX_FLAG_AMSDU_MORE; 1434 1435 ath10k_process_rx(ar, status, msdu); 1436 } 1437 } 1438 1439 static int ath10k_unchain_msdu(struct sk_buff_head *amsdu) 1440 { 1441 struct sk_buff *skb, *first; 1442 int space; 1443 int total_len = 0; 1444 1445 /* TODO: Might could optimize this by using 1446 * skb_try_coalesce or similar method to 1447 * decrease copying, or maybe get mac80211 to 1448 * provide a way to just receive a list of 1449 * skb? 1450 */ 1451 1452 first = __skb_dequeue(amsdu); 1453 1454 /* Allocate total length all at once. */ 1455 skb_queue_walk(amsdu, skb) 1456 total_len += skb->len; 1457 1458 space = total_len - skb_tailroom(first); 1459 if ((space > 0) && 1460 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) { 1461 /* TODO: bump some rx-oom error stat */ 1462 /* put it back together so we can free the 1463 * whole list at once. 1464 */ 1465 __skb_queue_head(amsdu, first); 1466 return -1; 1467 } 1468 1469 /* Walk list again, copying contents into 1470 * msdu_head 1471 */ 1472 while ((skb = __skb_dequeue(amsdu))) { 1473 skb_copy_from_linear_data(skb, skb_put(first, skb->len), 1474 skb->len); 1475 dev_kfree_skb_any(skb); 1476 } 1477 1478 __skb_queue_head(amsdu, first); 1479 return 0; 1480 } 1481 1482 static void ath10k_htt_rx_h_unchain(struct ath10k *ar, 1483 struct sk_buff_head *amsdu) 1484 { 1485 struct sk_buff *first; 1486 struct htt_rx_desc *rxd; 1487 enum rx_msdu_decap_format decap; 1488 1489 first = skb_peek(amsdu); 1490 rxd = (void *)first->data - sizeof(*rxd); 1491 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1), 1492 RX_MSDU_START_INFO1_DECAP_FORMAT); 1493 1494 /* FIXME: Current unchaining logic can only handle simple case of raw 1495 * msdu chaining. If decapping is other than raw the chaining may be 1496 * more complex and this isn't handled by the current code. Don't even 1497 * try re-constructing such frames - it'll be pretty much garbage. 1498 */ 1499 if (decap != RX_MSDU_DECAP_RAW || 1500 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) { 1501 __skb_queue_purge(amsdu); 1502 return; 1503 } 1504 1505 ath10k_unchain_msdu(amsdu); 1506 } 1507 1508 static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar, 1509 struct sk_buff_head *amsdu, 1510 struct ieee80211_rx_status *rx_status) 1511 { 1512 /* FIXME: It might be a good idea to do some fuzzy-testing to drop 1513 * invalid/dangerous frames. 1514 */ 1515 1516 if (!rx_status->freq) { 1517 ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n"); 1518 return false; 1519 } 1520 1521 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) { 1522 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n"); 1523 return false; 1524 } 1525 1526 return true; 1527 } 1528 1529 static void ath10k_htt_rx_h_filter(struct ath10k *ar, 1530 struct sk_buff_head *amsdu, 1531 struct ieee80211_rx_status *rx_status) 1532 { 1533 if (skb_queue_empty(amsdu)) 1534 return; 1535 1536 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status)) 1537 return; 1538 1539 __skb_queue_purge(amsdu); 1540 } 1541 1542 static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt) 1543 { 1544 struct ath10k *ar = htt->ar; 1545 struct ieee80211_rx_status *rx_status = &htt->rx_status; 1546 struct sk_buff_head amsdu; 1547 int ret, num_msdus; 1548 1549 __skb_queue_head_init(&amsdu); 1550 1551 spin_lock_bh(&htt->rx_ring.lock); 1552 if (htt->rx_confused) { 1553 spin_unlock_bh(&htt->rx_ring.lock); 1554 return -EIO; 1555 } 1556 ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu); 1557 spin_unlock_bh(&htt->rx_ring.lock); 1558 1559 if (ret < 0) { 1560 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret); 1561 __skb_queue_purge(&amsdu); 1562 /* FIXME: It's probably a good idea to reboot the 1563 * device instead of leaving it inoperable. 1564 */ 1565 htt->rx_confused = true; 1566 return ret; 1567 } 1568 1569 num_msdus = skb_queue_len(&amsdu); 1570 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff); 1571 1572 /* only for ret = 1 indicates chained msdus */ 1573 if (ret > 0) 1574 ath10k_htt_rx_h_unchain(ar, &amsdu); 1575 1576 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status); 1577 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status); 1578 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status); 1579 1580 return num_msdus; 1581 } 1582 1583 static void ath10k_htt_rx_proc_rx_ind(struct ath10k_htt *htt, 1584 struct htt_rx_indication *rx) 1585 { 1586 struct ath10k *ar = htt->ar; 1587 struct htt_rx_indication_mpdu_range *mpdu_ranges; 1588 int num_mpdu_ranges; 1589 int i, mpdu_count = 0; 1590 1591 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1), 1592 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); 1593 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx); 1594 1595 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ", 1596 rx, sizeof(*rx) + 1597 (sizeof(struct htt_rx_indication_mpdu_range) * 1598 num_mpdu_ranges)); 1599 1600 for (i = 0; i < num_mpdu_ranges; i++) 1601 mpdu_count += mpdu_ranges[i].mpdu_count; 1602 1603 atomic_add(mpdu_count, &htt->num_mpdus_ready); 1604 } 1605 1606 static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar, 1607 struct sk_buff *skb) 1608 { 1609 struct ath10k_htt *htt = &ar->htt; 1610 struct htt_resp *resp = (struct htt_resp *)skb->data; 1611 struct htt_tx_done tx_done = {}; 1612 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS); 1613 __le16 msdu_id; 1614 int i; 1615 1616 switch (status) { 1617 case HTT_DATA_TX_STATUS_NO_ACK: 1618 tx_done.status = HTT_TX_COMPL_STATE_NOACK; 1619 break; 1620 case HTT_DATA_TX_STATUS_OK: 1621 tx_done.status = HTT_TX_COMPL_STATE_ACK; 1622 break; 1623 case HTT_DATA_TX_STATUS_DISCARD: 1624 case HTT_DATA_TX_STATUS_POSTPONE: 1625 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL: 1626 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 1627 break; 1628 default: 1629 ath10k_warn(ar, "unhandled tx completion status %d\n", status); 1630 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 1631 break; 1632 } 1633 1634 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n", 1635 resp->data_tx_completion.num_msdus); 1636 1637 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) { 1638 msdu_id = resp->data_tx_completion.msdus[i]; 1639 tx_done.msdu_id = __le16_to_cpu(msdu_id); 1640 1641 /* kfifo_put: In practice firmware shouldn't fire off per-CE 1642 * interrupt and main interrupt (MSI/-X range case) for the same 1643 * HTC service so it should be safe to use kfifo_put w/o lock. 1644 * 1645 * From kfifo_put() documentation: 1646 * Note that with only one concurrent reader and one concurrent 1647 * writer, you don't need extra locking to use these macro. 1648 */ 1649 if (!kfifo_put(&htt->txdone_fifo, tx_done)) { 1650 ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n", 1651 tx_done.msdu_id, tx_done.status); 1652 ath10k_txrx_tx_unref(htt, &tx_done); 1653 } 1654 } 1655 } 1656 1657 static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp) 1658 { 1659 struct htt_rx_addba *ev = &resp->rx_addba; 1660 struct ath10k_peer *peer; 1661 struct ath10k_vif *arvif; 1662 u16 info0, tid, peer_id; 1663 1664 info0 = __le16_to_cpu(ev->info0); 1665 tid = MS(info0, HTT_RX_BA_INFO0_TID); 1666 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 1667 1668 ath10k_dbg(ar, ATH10K_DBG_HTT, 1669 "htt rx addba tid %hu peer_id %hu size %hhu\n", 1670 tid, peer_id, ev->window_size); 1671 1672 spin_lock_bh(&ar->data_lock); 1673 peer = ath10k_peer_find_by_id(ar, peer_id); 1674 if (!peer) { 1675 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", 1676 peer_id); 1677 spin_unlock_bh(&ar->data_lock); 1678 return; 1679 } 1680 1681 arvif = ath10k_get_arvif(ar, peer->vdev_id); 1682 if (!arvif) { 1683 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 1684 peer->vdev_id); 1685 spin_unlock_bh(&ar->data_lock); 1686 return; 1687 } 1688 1689 ath10k_dbg(ar, ATH10K_DBG_HTT, 1690 "htt rx start rx ba session sta %pM tid %hu size %hhu\n", 1691 peer->addr, tid, ev->window_size); 1692 1693 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid); 1694 spin_unlock_bh(&ar->data_lock); 1695 } 1696 1697 static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp) 1698 { 1699 struct htt_rx_delba *ev = &resp->rx_delba; 1700 struct ath10k_peer *peer; 1701 struct ath10k_vif *arvif; 1702 u16 info0, tid, peer_id; 1703 1704 info0 = __le16_to_cpu(ev->info0); 1705 tid = MS(info0, HTT_RX_BA_INFO0_TID); 1706 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 1707 1708 ath10k_dbg(ar, ATH10K_DBG_HTT, 1709 "htt rx delba tid %hu peer_id %hu\n", 1710 tid, peer_id); 1711 1712 spin_lock_bh(&ar->data_lock); 1713 peer = ath10k_peer_find_by_id(ar, peer_id); 1714 if (!peer) { 1715 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", 1716 peer_id); 1717 spin_unlock_bh(&ar->data_lock); 1718 return; 1719 } 1720 1721 arvif = ath10k_get_arvif(ar, peer->vdev_id); 1722 if (!arvif) { 1723 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 1724 peer->vdev_id); 1725 spin_unlock_bh(&ar->data_lock); 1726 return; 1727 } 1728 1729 ath10k_dbg(ar, ATH10K_DBG_HTT, 1730 "htt rx stop rx ba session sta %pM tid %hu\n", 1731 peer->addr, tid); 1732 1733 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid); 1734 spin_unlock_bh(&ar->data_lock); 1735 } 1736 1737 static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list, 1738 struct sk_buff_head *amsdu) 1739 { 1740 struct sk_buff *msdu; 1741 struct htt_rx_desc *rxd; 1742 1743 if (skb_queue_empty(list)) 1744 return -ENOBUFS; 1745 1746 if (WARN_ON(!skb_queue_empty(amsdu))) 1747 return -EINVAL; 1748 1749 while ((msdu = __skb_dequeue(list))) { 1750 __skb_queue_tail(amsdu, msdu); 1751 1752 rxd = (void *)msdu->data - sizeof(*rxd); 1753 if (rxd->msdu_end.common.info0 & 1754 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)) 1755 break; 1756 } 1757 1758 msdu = skb_peek_tail(amsdu); 1759 rxd = (void *)msdu->data - sizeof(*rxd); 1760 if (!(rxd->msdu_end.common.info0 & 1761 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) { 1762 skb_queue_splice_init(amsdu, list); 1763 return -EAGAIN; 1764 } 1765 1766 return 0; 1767 } 1768 1769 static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status, 1770 struct sk_buff *skb) 1771 { 1772 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1773 1774 if (!ieee80211_has_protected(hdr->frame_control)) 1775 return; 1776 1777 /* Offloaded frames are already decrypted but firmware insists they are 1778 * protected in the 802.11 header. Strip the flag. Otherwise mac80211 1779 * will drop the frame. 1780 */ 1781 1782 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 1783 status->flag |= RX_FLAG_DECRYPTED | 1784 RX_FLAG_IV_STRIPPED | 1785 RX_FLAG_MMIC_STRIPPED; 1786 } 1787 1788 static int ath10k_htt_rx_h_rx_offload(struct ath10k *ar, 1789 struct sk_buff_head *list) 1790 { 1791 struct ath10k_htt *htt = &ar->htt; 1792 struct ieee80211_rx_status *status = &htt->rx_status; 1793 struct htt_rx_offload_msdu *rx; 1794 struct sk_buff *msdu; 1795 size_t offset; 1796 int num_msdu = 0; 1797 1798 while ((msdu = __skb_dequeue(list))) { 1799 /* Offloaded frames don't have Rx descriptor. Instead they have 1800 * a short meta information header. 1801 */ 1802 1803 rx = (void *)msdu->data; 1804 1805 skb_put(msdu, sizeof(*rx)); 1806 skb_pull(msdu, sizeof(*rx)); 1807 1808 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) { 1809 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n"); 1810 dev_kfree_skb_any(msdu); 1811 continue; 1812 } 1813 1814 skb_put(msdu, __le16_to_cpu(rx->msdu_len)); 1815 1816 /* Offloaded rx header length isn't multiple of 2 nor 4 so the 1817 * actual payload is unaligned. Align the frame. Otherwise 1818 * mac80211 complains. This shouldn't reduce performance much 1819 * because these offloaded frames are rare. 1820 */ 1821 offset = 4 - ((unsigned long)msdu->data & 3); 1822 skb_put(msdu, offset); 1823 memmove(msdu->data + offset, msdu->data, msdu->len); 1824 skb_pull(msdu, offset); 1825 1826 /* FIXME: The frame is NWifi. Re-construct QoS Control 1827 * if possible later. 1828 */ 1829 1830 memset(status, 0, sizeof(*status)); 1831 status->flag |= RX_FLAG_NO_SIGNAL_VAL; 1832 1833 ath10k_htt_rx_h_rx_offload_prot(status, msdu); 1834 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id); 1835 ath10k_process_rx(ar, status, msdu); 1836 num_msdu++; 1837 } 1838 return num_msdu; 1839 } 1840 1841 static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb) 1842 { 1843 struct ath10k_htt *htt = &ar->htt; 1844 struct htt_resp *resp = (void *)skb->data; 1845 struct ieee80211_rx_status *status = &htt->rx_status; 1846 struct sk_buff_head list; 1847 struct sk_buff_head amsdu; 1848 u16 peer_id; 1849 u16 msdu_count; 1850 u8 vdev_id; 1851 u8 tid; 1852 bool offload; 1853 bool frag; 1854 int ret, num_msdus = 0; 1855 1856 lockdep_assert_held(&htt->rx_ring.lock); 1857 1858 if (htt->rx_confused) 1859 return -EIO; 1860 1861 skb_pull(skb, sizeof(resp->hdr)); 1862 skb_pull(skb, sizeof(resp->rx_in_ord_ind)); 1863 1864 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id); 1865 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count); 1866 vdev_id = resp->rx_in_ord_ind.vdev_id; 1867 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID); 1868 offload = !!(resp->rx_in_ord_ind.info & 1869 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 1870 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK); 1871 1872 ath10k_dbg(ar, ATH10K_DBG_HTT, 1873 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n", 1874 vdev_id, peer_id, tid, offload, frag, msdu_count); 1875 1876 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) { 1877 ath10k_warn(ar, "dropping invalid in order rx indication\n"); 1878 return -EINVAL; 1879 } 1880 1881 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later 1882 * extracted and processed. 1883 */ 1884 __skb_queue_head_init(&list); 1885 ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list); 1886 if (ret < 0) { 1887 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret); 1888 htt->rx_confused = true; 1889 return -EIO; 1890 } 1891 1892 /* Offloaded frames are very different and need to be handled 1893 * separately. 1894 */ 1895 if (offload) 1896 num_msdus = ath10k_htt_rx_h_rx_offload(ar, &list); 1897 1898 while (!skb_queue_empty(&list)) { 1899 __skb_queue_head_init(&amsdu); 1900 ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu); 1901 switch (ret) { 1902 case 0: 1903 /* Note: The in-order indication may report interleaved 1904 * frames from different PPDUs meaning reported rx rate 1905 * to mac80211 isn't accurate/reliable. It's still 1906 * better to report something than nothing though. This 1907 * should still give an idea about rx rate to the user. 1908 */ 1909 num_msdus += skb_queue_len(&amsdu); 1910 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id); 1911 ath10k_htt_rx_h_filter(ar, &amsdu, status); 1912 ath10k_htt_rx_h_mpdu(ar, &amsdu, status); 1913 ath10k_htt_rx_h_deliver(ar, &amsdu, status); 1914 break; 1915 case -EAGAIN: 1916 /* fall through */ 1917 default: 1918 /* Should not happen. */ 1919 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret); 1920 htt->rx_confused = true; 1921 __skb_queue_purge(&list); 1922 return -EIO; 1923 } 1924 } 1925 return num_msdus; 1926 } 1927 1928 static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar, 1929 const __le32 *resp_ids, 1930 int num_resp_ids) 1931 { 1932 int i; 1933 u32 resp_id; 1934 1935 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n", 1936 num_resp_ids); 1937 1938 for (i = 0; i < num_resp_ids; i++) { 1939 resp_id = le32_to_cpu(resp_ids[i]); 1940 1941 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n", 1942 resp_id); 1943 1944 /* TODO: free resp_id */ 1945 } 1946 } 1947 1948 static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb) 1949 { 1950 struct ieee80211_hw *hw = ar->hw; 1951 struct ieee80211_txq *txq; 1952 struct htt_resp *resp = (struct htt_resp *)skb->data; 1953 struct htt_tx_fetch_record *record; 1954 size_t len; 1955 size_t max_num_bytes; 1956 size_t max_num_msdus; 1957 size_t num_bytes; 1958 size_t num_msdus; 1959 const __le32 *resp_ids; 1960 u16 num_records; 1961 u16 num_resp_ids; 1962 u16 peer_id; 1963 u8 tid; 1964 int ret; 1965 int i; 1966 1967 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n"); 1968 1969 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind); 1970 if (unlikely(skb->len < len)) { 1971 ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n"); 1972 return; 1973 } 1974 1975 num_records = le16_to_cpu(resp->tx_fetch_ind.num_records); 1976 num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids); 1977 1978 len += sizeof(resp->tx_fetch_ind.records[0]) * num_records; 1979 len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids; 1980 1981 if (unlikely(skb->len < len)) { 1982 ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n"); 1983 return; 1984 } 1985 1986 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n", 1987 num_records, num_resp_ids, 1988 le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num)); 1989 1990 if (!ar->htt.tx_q_state.enabled) { 1991 ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n"); 1992 return; 1993 } 1994 1995 if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) { 1996 ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n"); 1997 return; 1998 } 1999 2000 rcu_read_lock(); 2001 2002 for (i = 0; i < num_records; i++) { 2003 record = &resp->tx_fetch_ind.records[i]; 2004 peer_id = MS(le16_to_cpu(record->info), 2005 HTT_TX_FETCH_RECORD_INFO_PEER_ID); 2006 tid = MS(le16_to_cpu(record->info), 2007 HTT_TX_FETCH_RECORD_INFO_TID); 2008 max_num_msdus = le16_to_cpu(record->num_msdus); 2009 max_num_bytes = le32_to_cpu(record->num_bytes); 2010 2011 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n", 2012 i, peer_id, tid, max_num_msdus, max_num_bytes); 2013 2014 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) || 2015 unlikely(tid >= ar->htt.tx_q_state.num_tids)) { 2016 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n", 2017 peer_id, tid); 2018 continue; 2019 } 2020 2021 spin_lock_bh(&ar->data_lock); 2022 txq = ath10k_mac_txq_lookup(ar, peer_id, tid); 2023 spin_unlock_bh(&ar->data_lock); 2024 2025 /* It is okay to release the lock and use txq because RCU read 2026 * lock is held. 2027 */ 2028 2029 if (unlikely(!txq)) { 2030 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n", 2031 peer_id, tid); 2032 continue; 2033 } 2034 2035 num_msdus = 0; 2036 num_bytes = 0; 2037 2038 while (num_msdus < max_num_msdus && 2039 num_bytes < max_num_bytes) { 2040 ret = ath10k_mac_tx_push_txq(hw, txq); 2041 if (ret < 0) 2042 break; 2043 2044 num_msdus++; 2045 num_bytes += ret; 2046 } 2047 2048 record->num_msdus = cpu_to_le16(num_msdus); 2049 record->num_bytes = cpu_to_le32(num_bytes); 2050 2051 ath10k_htt_tx_txq_recalc(hw, txq); 2052 } 2053 2054 rcu_read_unlock(); 2055 2056 resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind); 2057 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids); 2058 2059 ret = ath10k_htt_tx_fetch_resp(ar, 2060 resp->tx_fetch_ind.token, 2061 resp->tx_fetch_ind.fetch_seq_num, 2062 resp->tx_fetch_ind.records, 2063 num_records); 2064 if (unlikely(ret)) { 2065 ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n", 2066 le32_to_cpu(resp->tx_fetch_ind.token), ret); 2067 /* FIXME: request fw restart */ 2068 } 2069 2070 ath10k_htt_tx_txq_sync(ar); 2071 } 2072 2073 static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar, 2074 struct sk_buff *skb) 2075 { 2076 const struct htt_resp *resp = (void *)skb->data; 2077 size_t len; 2078 int num_resp_ids; 2079 2080 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n"); 2081 2082 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm); 2083 if (unlikely(skb->len < len)) { 2084 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n"); 2085 return; 2086 } 2087 2088 num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids); 2089 len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids; 2090 2091 if (unlikely(skb->len < len)) { 2092 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n"); 2093 return; 2094 } 2095 2096 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, 2097 resp->tx_fetch_confirm.resp_ids, 2098 num_resp_ids); 2099 } 2100 2101 static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar, 2102 struct sk_buff *skb) 2103 { 2104 const struct htt_resp *resp = (void *)skb->data; 2105 const struct htt_tx_mode_switch_record *record; 2106 struct ieee80211_txq *txq; 2107 struct ath10k_txq *artxq; 2108 size_t len; 2109 size_t num_records; 2110 enum htt_tx_mode_switch_mode mode; 2111 bool enable; 2112 u16 info0; 2113 u16 info1; 2114 u16 threshold; 2115 u16 peer_id; 2116 u8 tid; 2117 int i; 2118 2119 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n"); 2120 2121 len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind); 2122 if (unlikely(skb->len < len)) { 2123 ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n"); 2124 return; 2125 } 2126 2127 info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0); 2128 info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1); 2129 2130 enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE); 2131 num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD); 2132 mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE); 2133 threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD); 2134 2135 ath10k_dbg(ar, ATH10K_DBG_HTT, 2136 "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n", 2137 info0, info1, enable, num_records, mode, threshold); 2138 2139 len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records; 2140 2141 if (unlikely(skb->len < len)) { 2142 ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n"); 2143 return; 2144 } 2145 2146 switch (mode) { 2147 case HTT_TX_MODE_SWITCH_PUSH: 2148 case HTT_TX_MODE_SWITCH_PUSH_PULL: 2149 break; 2150 default: 2151 ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n", 2152 mode); 2153 return; 2154 } 2155 2156 if (!enable) 2157 return; 2158 2159 ar->htt.tx_q_state.enabled = enable; 2160 ar->htt.tx_q_state.mode = mode; 2161 ar->htt.tx_q_state.num_push_allowed = threshold; 2162 2163 rcu_read_lock(); 2164 2165 for (i = 0; i < num_records; i++) { 2166 record = &resp->tx_mode_switch_ind.records[i]; 2167 info0 = le16_to_cpu(record->info0); 2168 peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID); 2169 tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID); 2170 2171 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) || 2172 unlikely(tid >= ar->htt.tx_q_state.num_tids)) { 2173 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n", 2174 peer_id, tid); 2175 continue; 2176 } 2177 2178 spin_lock_bh(&ar->data_lock); 2179 txq = ath10k_mac_txq_lookup(ar, peer_id, tid); 2180 spin_unlock_bh(&ar->data_lock); 2181 2182 /* It is okay to release the lock and use txq because RCU read 2183 * lock is held. 2184 */ 2185 2186 if (unlikely(!txq)) { 2187 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n", 2188 peer_id, tid); 2189 continue; 2190 } 2191 2192 spin_lock_bh(&ar->htt.tx_lock); 2193 artxq = (void *)txq->drv_priv; 2194 artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus); 2195 spin_unlock_bh(&ar->htt.tx_lock); 2196 } 2197 2198 rcu_read_unlock(); 2199 2200 ath10k_mac_tx_push_pending(ar); 2201 } 2202 2203 void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) 2204 { 2205 bool release; 2206 2207 release = ath10k_htt_t2h_msg_handler(ar, skb); 2208 2209 /* Free the indication buffer */ 2210 if (release) 2211 dev_kfree_skb_any(skb); 2212 } 2213 2214 static inline bool is_valid_legacy_rate(u8 rate) 2215 { 2216 static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12, 2217 18, 24, 36, 48, 54}; 2218 int i; 2219 2220 for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) { 2221 if (rate == legacy_rates[i]) 2222 return true; 2223 } 2224 2225 return false; 2226 } 2227 2228 static void 2229 ath10k_update_per_peer_tx_stats(struct ath10k *ar, 2230 struct ieee80211_sta *sta, 2231 struct ath10k_per_peer_tx_stats *peer_stats) 2232 { 2233 struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv; 2234 u8 rate = 0, sgi; 2235 struct rate_info txrate; 2236 2237 lockdep_assert_held(&ar->data_lock); 2238 2239 txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode); 2240 txrate.bw = ATH10K_HW_BW(peer_stats->flags); 2241 txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode); 2242 txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode); 2243 sgi = ATH10K_HW_GI(peer_stats->flags); 2244 2245 if (txrate.flags == WMI_RATE_PREAMBLE_VHT && txrate.mcs > 9) { 2246 ath10k_warn(ar, "Invalid VHT mcs %hhd peer stats", txrate.mcs); 2247 return; 2248 } 2249 2250 if (txrate.flags == WMI_RATE_PREAMBLE_HT && 2251 (txrate.mcs > 7 || txrate.nss < 1)) { 2252 ath10k_warn(ar, "Invalid HT mcs %hhd nss %hhd peer stats", 2253 txrate.mcs, txrate.nss); 2254 return; 2255 } 2256 2257 memset(&arsta->txrate, 0, sizeof(arsta->txrate)); 2258 2259 if (txrate.flags == WMI_RATE_PREAMBLE_CCK || 2260 txrate.flags == WMI_RATE_PREAMBLE_OFDM) { 2261 rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode); 2262 2263 if (!is_valid_legacy_rate(rate)) { 2264 ath10k_warn(ar, "Invalid legacy rate %hhd peer stats", 2265 rate); 2266 return; 2267 } 2268 2269 /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */ 2270 rate *= 10; 2271 if (rate == 60 && txrate.flags == WMI_RATE_PREAMBLE_CCK) 2272 rate = rate - 5; 2273 arsta->txrate.legacy = rate; 2274 } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) { 2275 arsta->txrate.flags = RATE_INFO_FLAGS_MCS; 2276 arsta->txrate.mcs = txrate.mcs + 8 * (txrate.nss - 1); 2277 } else { 2278 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS; 2279 arsta->txrate.mcs = txrate.mcs; 2280 } 2281 2282 if (sgi) 2283 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; 2284 2285 arsta->txrate.nss = txrate.nss; 2286 arsta->txrate.bw = txrate.bw + RATE_INFO_BW_20; 2287 } 2288 2289 static void ath10k_htt_fetch_peer_stats(struct ath10k *ar, 2290 struct sk_buff *skb) 2291 { 2292 struct htt_resp *resp = (struct htt_resp *)skb->data; 2293 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats; 2294 struct htt_per_peer_tx_stats_ind *tx_stats; 2295 struct ieee80211_sta *sta; 2296 struct ath10k_peer *peer; 2297 int peer_id, i; 2298 u8 ppdu_len, num_ppdu; 2299 2300 num_ppdu = resp->peer_tx_stats.num_ppdu; 2301 ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32); 2302 2303 if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) { 2304 ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len); 2305 return; 2306 } 2307 2308 tx_stats = (struct htt_per_peer_tx_stats_ind *) 2309 (resp->peer_tx_stats.payload); 2310 peer_id = __le16_to_cpu(tx_stats->peer_id); 2311 2312 rcu_read_lock(); 2313 spin_lock_bh(&ar->data_lock); 2314 peer = ath10k_peer_find_by_id(ar, peer_id); 2315 if (!peer) { 2316 ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n", 2317 peer_id); 2318 goto out; 2319 } 2320 2321 sta = peer->sta; 2322 for (i = 0; i < num_ppdu; i++) { 2323 tx_stats = (struct htt_per_peer_tx_stats_ind *) 2324 (resp->peer_tx_stats.payload + i * ppdu_len); 2325 2326 p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes); 2327 p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes); 2328 p_tx_stats->failed_bytes = 2329 __le32_to_cpu(tx_stats->failed_bytes); 2330 p_tx_stats->ratecode = tx_stats->ratecode; 2331 p_tx_stats->flags = tx_stats->flags; 2332 p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts); 2333 p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts); 2334 p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts); 2335 2336 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats); 2337 } 2338 2339 out: 2340 spin_unlock_bh(&ar->data_lock); 2341 rcu_read_unlock(); 2342 } 2343 2344 bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) 2345 { 2346 struct ath10k_htt *htt = &ar->htt; 2347 struct htt_resp *resp = (struct htt_resp *)skb->data; 2348 enum htt_t2h_msg_type type; 2349 2350 /* confirm alignment */ 2351 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 2352 ath10k_warn(ar, "unaligned htt message, expect trouble\n"); 2353 2354 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n", 2355 resp->hdr.msg_type); 2356 2357 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) { 2358 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X", 2359 resp->hdr.msg_type, ar->htt.t2h_msg_types_max); 2360 return true; 2361 } 2362 type = ar->htt.t2h_msg_types[resp->hdr.msg_type]; 2363 2364 switch (type) { 2365 case HTT_T2H_MSG_TYPE_VERSION_CONF: { 2366 htt->target_version_major = resp->ver_resp.major; 2367 htt->target_version_minor = resp->ver_resp.minor; 2368 complete(&htt->target_version_received); 2369 break; 2370 } 2371 case HTT_T2H_MSG_TYPE_RX_IND: 2372 ath10k_htt_rx_proc_rx_ind(htt, &resp->rx_ind); 2373 break; 2374 case HTT_T2H_MSG_TYPE_PEER_MAP: { 2375 struct htt_peer_map_event ev = { 2376 .vdev_id = resp->peer_map.vdev_id, 2377 .peer_id = __le16_to_cpu(resp->peer_map.peer_id), 2378 }; 2379 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr)); 2380 ath10k_peer_map_event(htt, &ev); 2381 break; 2382 } 2383 case HTT_T2H_MSG_TYPE_PEER_UNMAP: { 2384 struct htt_peer_unmap_event ev = { 2385 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id), 2386 }; 2387 ath10k_peer_unmap_event(htt, &ev); 2388 break; 2389 } 2390 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: { 2391 struct htt_tx_done tx_done = {}; 2392 int status = __le32_to_cpu(resp->mgmt_tx_completion.status); 2393 2394 tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id); 2395 2396 switch (status) { 2397 case HTT_MGMT_TX_STATUS_OK: 2398 tx_done.status = HTT_TX_COMPL_STATE_ACK; 2399 break; 2400 case HTT_MGMT_TX_STATUS_RETRY: 2401 tx_done.status = HTT_TX_COMPL_STATE_NOACK; 2402 break; 2403 case HTT_MGMT_TX_STATUS_DROP: 2404 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 2405 break; 2406 } 2407 2408 status = ath10k_txrx_tx_unref(htt, &tx_done); 2409 if (!status) { 2410 spin_lock_bh(&htt->tx_lock); 2411 ath10k_htt_tx_mgmt_dec_pending(htt); 2412 spin_unlock_bh(&htt->tx_lock); 2413 } 2414 break; 2415 } 2416 case HTT_T2H_MSG_TYPE_TX_COMPL_IND: 2417 ath10k_htt_rx_tx_compl_ind(htt->ar, skb); 2418 break; 2419 case HTT_T2H_MSG_TYPE_SEC_IND: { 2420 struct ath10k *ar = htt->ar; 2421 struct htt_security_indication *ev = &resp->security_indication; 2422 2423 ath10k_dbg(ar, ATH10K_DBG_HTT, 2424 "sec ind peer_id %d unicast %d type %d\n", 2425 __le16_to_cpu(ev->peer_id), 2426 !!(ev->flags & HTT_SECURITY_IS_UNICAST), 2427 MS(ev->flags, HTT_SECURITY_TYPE)); 2428 complete(&ar->install_key_done); 2429 break; 2430 } 2431 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: { 2432 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 2433 skb->data, skb->len); 2434 atomic_inc(&htt->num_mpdus_ready); 2435 break; 2436 } 2437 case HTT_T2H_MSG_TYPE_TEST: 2438 break; 2439 case HTT_T2H_MSG_TYPE_STATS_CONF: 2440 trace_ath10k_htt_stats(ar, skb->data, skb->len); 2441 break; 2442 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND: 2443 /* Firmware can return tx frames if it's unable to fully 2444 * process them and suspects host may be able to fix it. ath10k 2445 * sends all tx frames as already inspected so this shouldn't 2446 * happen unless fw has a bug. 2447 */ 2448 ath10k_warn(ar, "received an unexpected htt tx inspect event\n"); 2449 break; 2450 case HTT_T2H_MSG_TYPE_RX_ADDBA: 2451 ath10k_htt_rx_addba(ar, resp); 2452 break; 2453 case HTT_T2H_MSG_TYPE_RX_DELBA: 2454 ath10k_htt_rx_delba(ar, resp); 2455 break; 2456 case HTT_T2H_MSG_TYPE_PKTLOG: { 2457 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload, 2458 skb->len - 2459 offsetof(struct htt_resp, 2460 pktlog_msg.payload)); 2461 break; 2462 } 2463 case HTT_T2H_MSG_TYPE_RX_FLUSH: { 2464 /* Ignore this event because mac80211 takes care of Rx 2465 * aggregation reordering. 2466 */ 2467 break; 2468 } 2469 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: { 2470 __skb_queue_tail(&htt->rx_in_ord_compl_q, skb); 2471 return false; 2472 } 2473 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND: 2474 break; 2475 case HTT_T2H_MSG_TYPE_CHAN_CHANGE: { 2476 u32 phymode = __le32_to_cpu(resp->chan_change.phymode); 2477 u32 freq = __le32_to_cpu(resp->chan_change.freq); 2478 2479 ar->tgt_oper_chan = ieee80211_get_channel(ar->hw->wiphy, freq); 2480 ath10k_dbg(ar, ATH10K_DBG_HTT, 2481 "htt chan change freq %u phymode %s\n", 2482 freq, ath10k_wmi_phymode_str(phymode)); 2483 break; 2484 } 2485 case HTT_T2H_MSG_TYPE_AGGR_CONF: 2486 break; 2487 case HTT_T2H_MSG_TYPE_TX_FETCH_IND: { 2488 struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC); 2489 2490 if (!tx_fetch_ind) { 2491 ath10k_warn(ar, "failed to copy htt tx fetch ind\n"); 2492 break; 2493 } 2494 skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind); 2495 break; 2496 } 2497 case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM: 2498 ath10k_htt_rx_tx_fetch_confirm(ar, skb); 2499 break; 2500 case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND: 2501 ath10k_htt_rx_tx_mode_switch_ind(ar, skb); 2502 break; 2503 case HTT_T2H_MSG_TYPE_PEER_STATS: 2504 ath10k_htt_fetch_peer_stats(ar, skb); 2505 break; 2506 case HTT_T2H_MSG_TYPE_EN_STATS: 2507 default: 2508 ath10k_warn(ar, "htt event (%d) not handled\n", 2509 resp->hdr.msg_type); 2510 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 2511 skb->data, skb->len); 2512 break; 2513 } 2514 return true; 2515 } 2516 EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler); 2517 2518 void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar, 2519 struct sk_buff *skb) 2520 { 2521 trace_ath10k_htt_pktlog(ar, skb->data, skb->len); 2522 dev_kfree_skb_any(skb); 2523 } 2524 EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler); 2525 2526 int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget) 2527 { 2528 struct ath10k_htt *htt = &ar->htt; 2529 struct htt_tx_done tx_done = {}; 2530 struct sk_buff_head tx_ind_q; 2531 struct sk_buff *skb; 2532 unsigned long flags; 2533 int quota = 0, done, num_rx_msdus; 2534 bool resched_napi = false; 2535 2536 __skb_queue_head_init(&tx_ind_q); 2537 2538 /* Since in-ord-ind can deliver more than 1 A-MSDU in single event, 2539 * process it first to utilize full available quota. 2540 */ 2541 while (quota < budget) { 2542 if (skb_queue_empty(&htt->rx_in_ord_compl_q)) 2543 break; 2544 2545 skb = __skb_dequeue(&htt->rx_in_ord_compl_q); 2546 if (!skb) { 2547 resched_napi = true; 2548 goto exit; 2549 } 2550 2551 spin_lock_bh(&htt->rx_ring.lock); 2552 num_rx_msdus = ath10k_htt_rx_in_ord_ind(ar, skb); 2553 spin_unlock_bh(&htt->rx_ring.lock); 2554 if (num_rx_msdus < 0) { 2555 resched_napi = true; 2556 goto exit; 2557 } 2558 2559 dev_kfree_skb_any(skb); 2560 if (num_rx_msdus > 0) 2561 quota += num_rx_msdus; 2562 2563 if ((quota > ATH10K_NAPI_QUOTA_LIMIT) && 2564 !skb_queue_empty(&htt->rx_in_ord_compl_q)) { 2565 resched_napi = true; 2566 goto exit; 2567 } 2568 } 2569 2570 while (quota < budget) { 2571 /* no more data to receive */ 2572 if (!atomic_read(&htt->num_mpdus_ready)) 2573 break; 2574 2575 num_rx_msdus = ath10k_htt_rx_handle_amsdu(htt); 2576 if (num_rx_msdus < 0) { 2577 resched_napi = true; 2578 goto exit; 2579 } 2580 2581 quota += num_rx_msdus; 2582 atomic_dec(&htt->num_mpdus_ready); 2583 if ((quota > ATH10K_NAPI_QUOTA_LIMIT) && 2584 atomic_read(&htt->num_mpdus_ready)) { 2585 resched_napi = true; 2586 goto exit; 2587 } 2588 } 2589 2590 /* From NAPI documentation: 2591 * The napi poll() function may also process TX completions, in which 2592 * case if it processes the entire TX ring then it should count that 2593 * work as the rest of the budget. 2594 */ 2595 if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo)) 2596 quota = budget; 2597 2598 /* kfifo_get: called only within txrx_tasklet so it's neatly serialized. 2599 * From kfifo_get() documentation: 2600 * Note that with only one concurrent reader and one concurrent writer, 2601 * you don't need extra locking to use these macro. 2602 */ 2603 while (kfifo_get(&htt->txdone_fifo, &tx_done)) 2604 ath10k_txrx_tx_unref(htt, &tx_done); 2605 2606 ath10k_mac_tx_push_pending(ar); 2607 2608 spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags); 2609 skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q); 2610 spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags); 2611 2612 while ((skb = __skb_dequeue(&tx_ind_q))) { 2613 ath10k_htt_rx_tx_fetch_ind(ar, skb); 2614 dev_kfree_skb_any(skb); 2615 } 2616 2617 exit: 2618 ath10k_htt_rx_msdu_buff_replenish(htt); 2619 /* In case of rx failure or more data to read, report budget 2620 * to reschedule NAPI poll 2621 */ 2622 done = resched_napi ? budget : quota; 2623 2624 return done; 2625 } 2626 EXPORT_SYMBOL(ath10k_htt_txrx_compl_task); 2627