1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include "core.h" 19 #include "htc.h" 20 #include "htt.h" 21 #include "txrx.h" 22 #include "debug.h" 23 #include "trace.h" 24 #include "mac.h" 25 26 #include <linux/log2.h> 27 28 #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX 29 #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1) 30 31 /* when under memory pressure rx ring refill may fail and needs a retry */ 32 #define HTT_RX_RING_REFILL_RETRY_MS 50 33 34 #define HTT_RX_RING_REFILL_RESCHED_MS 5 35 36 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb); 37 38 static struct sk_buff * 39 ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr) 40 { 41 struct ath10k_skb_rxcb *rxcb; 42 43 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr) 44 if (rxcb->paddr == paddr) 45 return ATH10K_RXCB_SKB(rxcb); 46 47 WARN_ON_ONCE(1); 48 return NULL; 49 } 50 51 static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt) 52 { 53 struct sk_buff *skb; 54 struct ath10k_skb_rxcb *rxcb; 55 struct hlist_node *n; 56 int i; 57 58 if (htt->rx_ring.in_ord_rx) { 59 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) { 60 skb = ATH10K_RXCB_SKB(rxcb); 61 dma_unmap_single(htt->ar->dev, rxcb->paddr, 62 skb->len + skb_tailroom(skb), 63 DMA_FROM_DEVICE); 64 hash_del(&rxcb->hlist); 65 dev_kfree_skb_any(skb); 66 } 67 } else { 68 for (i = 0; i < htt->rx_ring.size; i++) { 69 skb = htt->rx_ring.netbufs_ring[i]; 70 if (!skb) 71 continue; 72 73 rxcb = ATH10K_SKB_RXCB(skb); 74 dma_unmap_single(htt->ar->dev, rxcb->paddr, 75 skb->len + skb_tailroom(skb), 76 DMA_FROM_DEVICE); 77 dev_kfree_skb_any(skb); 78 } 79 } 80 81 htt->rx_ring.fill_cnt = 0; 82 hash_init(htt->rx_ring.skb_table); 83 memset(htt->rx_ring.netbufs_ring, 0, 84 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0])); 85 } 86 87 static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 88 { 89 struct htt_rx_desc *rx_desc; 90 struct ath10k_skb_rxcb *rxcb; 91 struct sk_buff *skb; 92 dma_addr_t paddr; 93 int ret = 0, idx; 94 95 /* The Full Rx Reorder firmware has no way of telling the host 96 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring. 97 * To keep things simple make sure ring is always half empty. This 98 * guarantees there'll be no replenishment overruns possible. 99 */ 100 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2); 101 102 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr); 103 while (num > 0) { 104 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN); 105 if (!skb) { 106 ret = -ENOMEM; 107 goto fail; 108 } 109 110 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN)) 111 skb_pull(skb, 112 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) - 113 skb->data); 114 115 /* Clear rx_desc attention word before posting to Rx ring */ 116 rx_desc = (struct htt_rx_desc *)skb->data; 117 rx_desc->attention.flags = __cpu_to_le32(0); 118 119 paddr = dma_map_single(htt->ar->dev, skb->data, 120 skb->len + skb_tailroom(skb), 121 DMA_FROM_DEVICE); 122 123 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) { 124 dev_kfree_skb_any(skb); 125 ret = -ENOMEM; 126 goto fail; 127 } 128 129 rxcb = ATH10K_SKB_RXCB(skb); 130 rxcb->paddr = paddr; 131 htt->rx_ring.netbufs_ring[idx] = skb; 132 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr); 133 htt->rx_ring.fill_cnt++; 134 135 if (htt->rx_ring.in_ord_rx) { 136 hash_add(htt->rx_ring.skb_table, 137 &ATH10K_SKB_RXCB(skb)->hlist, 138 (u32)paddr); 139 } 140 141 num--; 142 idx++; 143 idx &= htt->rx_ring.size_mask; 144 } 145 146 fail: 147 /* 148 * Make sure the rx buffer is updated before available buffer 149 * index to avoid any potential rx ring corruption. 150 */ 151 mb(); 152 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx); 153 return ret; 154 } 155 156 static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 157 { 158 lockdep_assert_held(&htt->rx_ring.lock); 159 return __ath10k_htt_rx_ring_fill_n(htt, num); 160 } 161 162 static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt) 163 { 164 int ret, num_deficit, num_to_fill; 165 166 /* Refilling the whole RX ring buffer proves to be a bad idea. The 167 * reason is RX may take up significant amount of CPU cycles and starve 168 * other tasks, e.g. TX on an ethernet device while acting as a bridge 169 * with ath10k wlan interface. This ended up with very poor performance 170 * once CPU the host system was overwhelmed with RX on ath10k. 171 * 172 * By limiting the number of refills the replenishing occurs 173 * progressively. This in turns makes use of the fact tasklets are 174 * processed in FIFO order. This means actual RX processing can starve 175 * out refilling. If there's not enough buffers on RX ring FW will not 176 * report RX until it is refilled with enough buffers. This 177 * automatically balances load wrt to CPU power. 178 * 179 * This probably comes at a cost of lower maximum throughput but 180 * improves the average and stability. 181 */ 182 spin_lock_bh(&htt->rx_ring.lock); 183 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt; 184 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit); 185 num_deficit -= num_to_fill; 186 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill); 187 if (ret == -ENOMEM) { 188 /* 189 * Failed to fill it to the desired level - 190 * we'll start a timer and try again next time. 191 * As long as enough buffers are left in the ring for 192 * another A-MPDU rx, no special recovery is needed. 193 */ 194 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + 195 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS)); 196 } else if (num_deficit > 0) { 197 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + 198 msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS)); 199 } 200 spin_unlock_bh(&htt->rx_ring.lock); 201 } 202 203 static void ath10k_htt_rx_ring_refill_retry(struct timer_list *t) 204 { 205 struct ath10k_htt *htt = from_timer(htt, t, rx_ring.refill_retry_timer); 206 207 ath10k_htt_rx_msdu_buff_replenish(htt); 208 } 209 210 int ath10k_htt_rx_ring_refill(struct ath10k *ar) 211 { 212 struct ath10k_htt *htt = &ar->htt; 213 int ret; 214 215 spin_lock_bh(&htt->rx_ring.lock); 216 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level - 217 htt->rx_ring.fill_cnt)); 218 spin_unlock_bh(&htt->rx_ring.lock); 219 220 if (ret) 221 ath10k_htt_rx_ring_free(htt); 222 223 return ret; 224 } 225 226 void ath10k_htt_rx_free(struct ath10k_htt *htt) 227 { 228 del_timer_sync(&htt->rx_ring.refill_retry_timer); 229 230 skb_queue_purge(&htt->rx_msdus_q); 231 skb_queue_purge(&htt->rx_in_ord_compl_q); 232 skb_queue_purge(&htt->tx_fetch_ind_q); 233 234 ath10k_htt_rx_ring_free(htt); 235 236 dma_free_coherent(htt->ar->dev, 237 (htt->rx_ring.size * 238 sizeof(htt->rx_ring.paddrs_ring)), 239 htt->rx_ring.paddrs_ring, 240 htt->rx_ring.base_paddr); 241 242 dma_free_coherent(htt->ar->dev, 243 sizeof(*htt->rx_ring.alloc_idx.vaddr), 244 htt->rx_ring.alloc_idx.vaddr, 245 htt->rx_ring.alloc_idx.paddr); 246 247 kfree(htt->rx_ring.netbufs_ring); 248 } 249 250 static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt) 251 { 252 struct ath10k *ar = htt->ar; 253 int idx; 254 struct sk_buff *msdu; 255 256 lockdep_assert_held(&htt->rx_ring.lock); 257 258 if (htt->rx_ring.fill_cnt == 0) { 259 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n"); 260 return NULL; 261 } 262 263 idx = htt->rx_ring.sw_rd_idx.msdu_payld; 264 msdu = htt->rx_ring.netbufs_ring[idx]; 265 htt->rx_ring.netbufs_ring[idx] = NULL; 266 htt->rx_ring.paddrs_ring[idx] = 0; 267 268 idx++; 269 idx &= htt->rx_ring.size_mask; 270 htt->rx_ring.sw_rd_idx.msdu_payld = idx; 271 htt->rx_ring.fill_cnt--; 272 273 dma_unmap_single(htt->ar->dev, 274 ATH10K_SKB_RXCB(msdu)->paddr, 275 msdu->len + skb_tailroom(msdu), 276 DMA_FROM_DEVICE); 277 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", 278 msdu->data, msdu->len + skb_tailroom(msdu)); 279 280 return msdu; 281 } 282 283 /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */ 284 static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, 285 struct sk_buff_head *amsdu) 286 { 287 struct ath10k *ar = htt->ar; 288 int msdu_len, msdu_chaining = 0; 289 struct sk_buff *msdu; 290 struct htt_rx_desc *rx_desc; 291 292 lockdep_assert_held(&htt->rx_ring.lock); 293 294 for (;;) { 295 int last_msdu, msdu_len_invalid, msdu_chained; 296 297 msdu = ath10k_htt_rx_netbuf_pop(htt); 298 if (!msdu) { 299 __skb_queue_purge(amsdu); 300 return -ENOENT; 301 } 302 303 __skb_queue_tail(amsdu, msdu); 304 305 rx_desc = (struct htt_rx_desc *)msdu->data; 306 307 /* FIXME: we must report msdu payload since this is what caller 308 * expects now 309 */ 310 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload)); 311 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload)); 312 313 /* 314 * Sanity check - confirm the HW is finished filling in the 315 * rx data. 316 * If the HW and SW are working correctly, then it's guaranteed 317 * that the HW's MAC DMA is done before this point in the SW. 318 * To prevent the case that we handle a stale Rx descriptor, 319 * just assert for now until we have a way to recover. 320 */ 321 if (!(__le32_to_cpu(rx_desc->attention.flags) 322 & RX_ATTENTION_FLAGS_MSDU_DONE)) { 323 __skb_queue_purge(amsdu); 324 return -EIO; 325 } 326 327 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags) 328 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR | 329 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR)); 330 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0), 331 RX_MSDU_START_INFO0_MSDU_LENGTH); 332 msdu_chained = rx_desc->frag_info.ring2_more_count; 333 334 if (msdu_len_invalid) 335 msdu_len = 0; 336 337 skb_trim(msdu, 0); 338 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE)); 339 msdu_len -= msdu->len; 340 341 /* Note: Chained buffers do not contain rx descriptor */ 342 while (msdu_chained--) { 343 msdu = ath10k_htt_rx_netbuf_pop(htt); 344 if (!msdu) { 345 __skb_queue_purge(amsdu); 346 return -ENOENT; 347 } 348 349 __skb_queue_tail(amsdu, msdu); 350 skb_trim(msdu, 0); 351 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE)); 352 msdu_len -= msdu->len; 353 msdu_chaining = 1; 354 } 355 356 last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) & 357 RX_MSDU_END_INFO0_LAST_MSDU; 358 359 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention, 360 sizeof(*rx_desc) - sizeof(u32)); 361 362 if (last_msdu) 363 break; 364 } 365 366 if (skb_queue_empty(amsdu)) 367 msdu_chaining = -1; 368 369 /* 370 * Don't refill the ring yet. 371 * 372 * First, the elements popped here are still in use - it is not 373 * safe to overwrite them until the matching call to 374 * mpdu_desc_list_next. Second, for efficiency it is preferable to 375 * refill the rx ring with 1 PPDU's worth of rx buffers (something 376 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers 377 * (something like 3 buffers). Consequently, we'll rely on the txrx 378 * SW to tell us when it is done pulling all the PPDU's rx buffers 379 * out of the rx ring, and then refill it just once. 380 */ 381 382 return msdu_chaining; 383 } 384 385 static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt, 386 u32 paddr) 387 { 388 struct ath10k *ar = htt->ar; 389 struct ath10k_skb_rxcb *rxcb; 390 struct sk_buff *msdu; 391 392 lockdep_assert_held(&htt->rx_ring.lock); 393 394 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr); 395 if (!msdu) 396 return NULL; 397 398 rxcb = ATH10K_SKB_RXCB(msdu); 399 hash_del(&rxcb->hlist); 400 htt->rx_ring.fill_cnt--; 401 402 dma_unmap_single(htt->ar->dev, rxcb->paddr, 403 msdu->len + skb_tailroom(msdu), 404 DMA_FROM_DEVICE); 405 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", 406 msdu->data, msdu->len + skb_tailroom(msdu)); 407 408 return msdu; 409 } 410 411 static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt, 412 struct htt_rx_in_ord_ind *ev, 413 struct sk_buff_head *list) 414 { 415 struct ath10k *ar = htt->ar; 416 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs; 417 struct htt_rx_desc *rxd; 418 struct sk_buff *msdu; 419 int msdu_count; 420 bool is_offload; 421 u32 paddr; 422 423 lockdep_assert_held(&htt->rx_ring.lock); 424 425 msdu_count = __le16_to_cpu(ev->msdu_count); 426 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 427 428 while (msdu_count--) { 429 paddr = __le32_to_cpu(msdu_desc->msdu_paddr); 430 431 msdu = ath10k_htt_rx_pop_paddr(htt, paddr); 432 if (!msdu) { 433 __skb_queue_purge(list); 434 return -ENOENT; 435 } 436 437 __skb_queue_tail(list, msdu); 438 439 if (!is_offload) { 440 rxd = (void *)msdu->data; 441 442 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd)); 443 444 skb_put(msdu, sizeof(*rxd)); 445 skb_pull(msdu, sizeof(*rxd)); 446 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len)); 447 448 if (!(__le32_to_cpu(rxd->attention.flags) & 449 RX_ATTENTION_FLAGS_MSDU_DONE)) { 450 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n"); 451 return -EIO; 452 } 453 } 454 455 msdu_desc++; 456 } 457 458 return 0; 459 } 460 461 int ath10k_htt_rx_alloc(struct ath10k_htt *htt) 462 { 463 struct ath10k *ar = htt->ar; 464 dma_addr_t paddr; 465 void *vaddr; 466 size_t size; 467 struct timer_list *timer = &htt->rx_ring.refill_retry_timer; 468 469 htt->rx_confused = false; 470 471 /* XXX: The fill level could be changed during runtime in response to 472 * the host processing latency. Is this really worth it? 473 */ 474 htt->rx_ring.size = HTT_RX_RING_SIZE; 475 htt->rx_ring.size_mask = htt->rx_ring.size - 1; 476 htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL; 477 478 if (!is_power_of_2(htt->rx_ring.size)) { 479 ath10k_warn(ar, "htt rx ring size is not power of 2\n"); 480 return -EINVAL; 481 } 482 483 htt->rx_ring.netbufs_ring = 484 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *), 485 GFP_KERNEL); 486 if (!htt->rx_ring.netbufs_ring) 487 goto err_netbuf; 488 489 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring); 490 491 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL); 492 if (!vaddr) 493 goto err_dma_ring; 494 495 htt->rx_ring.paddrs_ring = vaddr; 496 htt->rx_ring.base_paddr = paddr; 497 498 vaddr = dma_alloc_coherent(htt->ar->dev, 499 sizeof(*htt->rx_ring.alloc_idx.vaddr), 500 &paddr, GFP_KERNEL); 501 if (!vaddr) 502 goto err_dma_idx; 503 504 htt->rx_ring.alloc_idx.vaddr = vaddr; 505 htt->rx_ring.alloc_idx.paddr = paddr; 506 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask; 507 *htt->rx_ring.alloc_idx.vaddr = 0; 508 509 /* Initialize the Rx refill retry timer */ 510 timer_setup(timer, ath10k_htt_rx_ring_refill_retry, 0); 511 512 spin_lock_init(&htt->rx_ring.lock); 513 514 htt->rx_ring.fill_cnt = 0; 515 htt->rx_ring.sw_rd_idx.msdu_payld = 0; 516 hash_init(htt->rx_ring.skb_table); 517 518 skb_queue_head_init(&htt->rx_msdus_q); 519 skb_queue_head_init(&htt->rx_in_ord_compl_q); 520 skb_queue_head_init(&htt->tx_fetch_ind_q); 521 atomic_set(&htt->num_mpdus_ready, 0); 522 523 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n", 524 htt->rx_ring.size, htt->rx_ring.fill_level); 525 return 0; 526 527 err_dma_idx: 528 dma_free_coherent(htt->ar->dev, 529 (htt->rx_ring.size * 530 sizeof(htt->rx_ring.paddrs_ring)), 531 htt->rx_ring.paddrs_ring, 532 htt->rx_ring.base_paddr); 533 err_dma_ring: 534 kfree(htt->rx_ring.netbufs_ring); 535 err_netbuf: 536 return -ENOMEM; 537 } 538 539 static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar, 540 enum htt_rx_mpdu_encrypt_type type) 541 { 542 switch (type) { 543 case HTT_RX_MPDU_ENCRYPT_NONE: 544 return 0; 545 case HTT_RX_MPDU_ENCRYPT_WEP40: 546 case HTT_RX_MPDU_ENCRYPT_WEP104: 547 return IEEE80211_WEP_IV_LEN; 548 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 549 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 550 return IEEE80211_TKIP_IV_LEN; 551 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 552 return IEEE80211_CCMP_HDR_LEN; 553 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2: 554 return IEEE80211_CCMP_256_HDR_LEN; 555 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2: 556 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2: 557 return IEEE80211_GCMP_HDR_LEN; 558 case HTT_RX_MPDU_ENCRYPT_WEP128: 559 case HTT_RX_MPDU_ENCRYPT_WAPI: 560 break; 561 } 562 563 ath10k_warn(ar, "unsupported encryption type %d\n", type); 564 return 0; 565 } 566 567 #define MICHAEL_MIC_LEN 8 568 569 static int ath10k_htt_rx_crypto_mic_len(struct ath10k *ar, 570 enum htt_rx_mpdu_encrypt_type type) 571 { 572 switch (type) { 573 case HTT_RX_MPDU_ENCRYPT_NONE: 574 case HTT_RX_MPDU_ENCRYPT_WEP40: 575 case HTT_RX_MPDU_ENCRYPT_WEP104: 576 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 577 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 578 return 0; 579 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 580 return IEEE80211_CCMP_MIC_LEN; 581 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2: 582 return IEEE80211_CCMP_256_MIC_LEN; 583 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2: 584 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2: 585 return IEEE80211_GCMP_MIC_LEN; 586 case HTT_RX_MPDU_ENCRYPT_WEP128: 587 case HTT_RX_MPDU_ENCRYPT_WAPI: 588 break; 589 } 590 591 ath10k_warn(ar, "unsupported encryption type %d\n", type); 592 return 0; 593 } 594 595 static int ath10k_htt_rx_crypto_icv_len(struct ath10k *ar, 596 enum htt_rx_mpdu_encrypt_type type) 597 { 598 switch (type) { 599 case HTT_RX_MPDU_ENCRYPT_NONE: 600 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 601 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2: 602 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2: 603 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2: 604 return 0; 605 case HTT_RX_MPDU_ENCRYPT_WEP40: 606 case HTT_RX_MPDU_ENCRYPT_WEP104: 607 return IEEE80211_WEP_ICV_LEN; 608 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 609 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 610 return IEEE80211_TKIP_ICV_LEN; 611 case HTT_RX_MPDU_ENCRYPT_WEP128: 612 case HTT_RX_MPDU_ENCRYPT_WAPI: 613 break; 614 } 615 616 ath10k_warn(ar, "unsupported encryption type %d\n", type); 617 return 0; 618 } 619 620 struct amsdu_subframe_hdr { 621 u8 dst[ETH_ALEN]; 622 u8 src[ETH_ALEN]; 623 __be16 len; 624 } __packed; 625 626 #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63) 627 628 static void ath10k_htt_rx_h_rates(struct ath10k *ar, 629 struct ieee80211_rx_status *status, 630 struct htt_rx_desc *rxd) 631 { 632 struct ieee80211_supported_band *sband; 633 u8 cck, rate, bw, sgi, mcs, nss; 634 u8 preamble = 0; 635 u8 group_id; 636 u32 info1, info2, info3; 637 638 info1 = __le32_to_cpu(rxd->ppdu_start.info1); 639 info2 = __le32_to_cpu(rxd->ppdu_start.info2); 640 info3 = __le32_to_cpu(rxd->ppdu_start.info3); 641 642 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE); 643 644 switch (preamble) { 645 case HTT_RX_LEGACY: 646 /* To get legacy rate index band is required. Since band can't 647 * be undefined check if freq is non-zero. 648 */ 649 if (!status->freq) 650 return; 651 652 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT; 653 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE); 654 rate &= ~RX_PPDU_START_RATE_FLAG; 655 656 sband = &ar->mac.sbands[status->band]; 657 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck); 658 break; 659 case HTT_RX_HT: 660 case HTT_RX_HT_WITH_TXBF: 661 /* HT-SIG - Table 20-11 in info2 and info3 */ 662 mcs = info2 & 0x1F; 663 nss = mcs >> 3; 664 bw = (info2 >> 7) & 1; 665 sgi = (info3 >> 7) & 1; 666 667 status->rate_idx = mcs; 668 status->encoding = RX_ENC_HT; 669 if (sgi) 670 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 671 if (bw) 672 status->bw = RATE_INFO_BW_40; 673 break; 674 case HTT_RX_VHT: 675 case HTT_RX_VHT_WITH_TXBF: 676 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3 677 * TODO check this 678 */ 679 bw = info2 & 3; 680 sgi = info3 & 1; 681 group_id = (info2 >> 4) & 0x3F; 682 683 if (GROUP_ID_IS_SU_MIMO(group_id)) { 684 mcs = (info3 >> 4) & 0x0F; 685 nss = ((info2 >> 10) & 0x07) + 1; 686 } else { 687 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor 688 * so it's impossible to decode MCS. Also since 689 * firmware consumes Group Id Management frames host 690 * has no knowledge regarding group/user position 691 * mapping so it's impossible to pick the correct Nsts 692 * from VHT-SIG-A1. 693 * 694 * Bandwidth and SGI are valid so report the rateinfo 695 * on best-effort basis. 696 */ 697 mcs = 0; 698 nss = 1; 699 } 700 701 if (mcs > 0x09) { 702 ath10k_warn(ar, "invalid MCS received %u\n", mcs); 703 ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n", 704 __le32_to_cpu(rxd->attention.flags), 705 __le32_to_cpu(rxd->mpdu_start.info0), 706 __le32_to_cpu(rxd->mpdu_start.info1), 707 __le32_to_cpu(rxd->msdu_start.common.info0), 708 __le32_to_cpu(rxd->msdu_start.common.info1), 709 rxd->ppdu_start.info0, 710 __le32_to_cpu(rxd->ppdu_start.info1), 711 __le32_to_cpu(rxd->ppdu_start.info2), 712 __le32_to_cpu(rxd->ppdu_start.info3), 713 __le32_to_cpu(rxd->ppdu_start.info4)); 714 715 ath10k_warn(ar, "msdu end %08x mpdu end %08x\n", 716 __le32_to_cpu(rxd->msdu_end.common.info0), 717 __le32_to_cpu(rxd->mpdu_end.info0)); 718 719 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, 720 "rx desc msdu payload: ", 721 rxd->msdu_payload, 50); 722 } 723 724 status->rate_idx = mcs; 725 status->nss = nss; 726 727 if (sgi) 728 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 729 730 switch (bw) { 731 /* 20MHZ */ 732 case 0: 733 break; 734 /* 40MHZ */ 735 case 1: 736 status->bw = RATE_INFO_BW_40; 737 break; 738 /* 80MHZ */ 739 case 2: 740 status->bw = RATE_INFO_BW_80; 741 break; 742 case 3: 743 status->bw = RATE_INFO_BW_160; 744 break; 745 } 746 747 status->encoding = RX_ENC_VHT; 748 break; 749 default: 750 break; 751 } 752 } 753 754 static struct ieee80211_channel * 755 ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd) 756 { 757 struct ath10k_peer *peer; 758 struct ath10k_vif *arvif; 759 struct cfg80211_chan_def def; 760 u16 peer_id; 761 762 lockdep_assert_held(&ar->data_lock); 763 764 if (!rxd) 765 return NULL; 766 767 if (rxd->attention.flags & 768 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID)) 769 return NULL; 770 771 if (!(rxd->msdu_end.common.info0 & 772 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU))) 773 return NULL; 774 775 peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0), 776 RX_MPDU_START_INFO0_PEER_IDX); 777 778 peer = ath10k_peer_find_by_id(ar, peer_id); 779 if (!peer) 780 return NULL; 781 782 arvif = ath10k_get_arvif(ar, peer->vdev_id); 783 if (WARN_ON_ONCE(!arvif)) 784 return NULL; 785 786 if (ath10k_mac_vif_chan(arvif->vif, &def)) 787 return NULL; 788 789 return def.chan; 790 } 791 792 static struct ieee80211_channel * 793 ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id) 794 { 795 struct ath10k_vif *arvif; 796 struct cfg80211_chan_def def; 797 798 lockdep_assert_held(&ar->data_lock); 799 800 list_for_each_entry(arvif, &ar->arvifs, list) { 801 if (arvif->vdev_id == vdev_id && 802 ath10k_mac_vif_chan(arvif->vif, &def) == 0) 803 return def.chan; 804 } 805 806 return NULL; 807 } 808 809 static void 810 ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw, 811 struct ieee80211_chanctx_conf *conf, 812 void *data) 813 { 814 struct cfg80211_chan_def *def = data; 815 816 *def = conf->def; 817 } 818 819 static struct ieee80211_channel * 820 ath10k_htt_rx_h_any_channel(struct ath10k *ar) 821 { 822 struct cfg80211_chan_def def = {}; 823 824 ieee80211_iter_chan_contexts_atomic(ar->hw, 825 ath10k_htt_rx_h_any_chan_iter, 826 &def); 827 828 return def.chan; 829 } 830 831 static bool ath10k_htt_rx_h_channel(struct ath10k *ar, 832 struct ieee80211_rx_status *status, 833 struct htt_rx_desc *rxd, 834 u32 vdev_id) 835 { 836 struct ieee80211_channel *ch; 837 838 spin_lock_bh(&ar->data_lock); 839 ch = ar->scan_channel; 840 if (!ch) 841 ch = ar->rx_channel; 842 if (!ch) 843 ch = ath10k_htt_rx_h_peer_channel(ar, rxd); 844 if (!ch) 845 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id); 846 if (!ch) 847 ch = ath10k_htt_rx_h_any_channel(ar); 848 if (!ch) 849 ch = ar->tgt_oper_chan; 850 spin_unlock_bh(&ar->data_lock); 851 852 if (!ch) 853 return false; 854 855 status->band = ch->band; 856 status->freq = ch->center_freq; 857 858 return true; 859 } 860 861 static void ath10k_htt_rx_h_signal(struct ath10k *ar, 862 struct ieee80211_rx_status *status, 863 struct htt_rx_desc *rxd) 864 { 865 int i; 866 867 for (i = 0; i < IEEE80211_MAX_CHAINS ; i++) { 868 status->chains &= ~BIT(i); 869 870 if (rxd->ppdu_start.rssi_chains[i].pri20_mhz != 0x80) { 871 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR + 872 rxd->ppdu_start.rssi_chains[i].pri20_mhz; 873 874 status->chains |= BIT(i); 875 } 876 } 877 878 /* FIXME: Get real NF */ 879 status->signal = ATH10K_DEFAULT_NOISE_FLOOR + 880 rxd->ppdu_start.rssi_comb; 881 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL; 882 } 883 884 static void ath10k_htt_rx_h_mactime(struct ath10k *ar, 885 struct ieee80211_rx_status *status, 886 struct htt_rx_desc *rxd) 887 { 888 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This 889 * means all prior MSDUs in a PPDU are reported to mac80211 without the 890 * TSF. Is it worth holding frames until end of PPDU is known? 891 * 892 * FIXME: Can we get/compute 64bit TSF? 893 */ 894 status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp); 895 status->flag |= RX_FLAG_MACTIME_END; 896 } 897 898 static void ath10k_htt_rx_h_ppdu(struct ath10k *ar, 899 struct sk_buff_head *amsdu, 900 struct ieee80211_rx_status *status, 901 u32 vdev_id) 902 { 903 struct sk_buff *first; 904 struct htt_rx_desc *rxd; 905 bool is_first_ppdu; 906 bool is_last_ppdu; 907 908 if (skb_queue_empty(amsdu)) 909 return; 910 911 first = skb_peek(amsdu); 912 rxd = (void *)first->data - sizeof(*rxd); 913 914 is_first_ppdu = !!(rxd->attention.flags & 915 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU)); 916 is_last_ppdu = !!(rxd->attention.flags & 917 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU)); 918 919 if (is_first_ppdu) { 920 /* New PPDU starts so clear out the old per-PPDU status. */ 921 status->freq = 0; 922 status->rate_idx = 0; 923 status->nss = 0; 924 status->encoding = RX_ENC_LEGACY; 925 status->bw = RATE_INFO_BW_20; 926 927 status->flag &= ~RX_FLAG_MACTIME_END; 928 status->flag |= RX_FLAG_NO_SIGNAL_VAL; 929 930 status->flag &= ~(RX_FLAG_AMPDU_IS_LAST); 931 status->flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN; 932 status->ampdu_reference = ar->ampdu_reference; 933 934 ath10k_htt_rx_h_signal(ar, status, rxd); 935 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id); 936 ath10k_htt_rx_h_rates(ar, status, rxd); 937 } 938 939 if (is_last_ppdu) { 940 ath10k_htt_rx_h_mactime(ar, status, rxd); 941 942 /* set ampdu last segment flag */ 943 status->flag |= RX_FLAG_AMPDU_IS_LAST; 944 ar->ampdu_reference++; 945 } 946 } 947 948 static const char * const tid_to_ac[] = { 949 "BE", 950 "BK", 951 "BK", 952 "BE", 953 "VI", 954 "VI", 955 "VO", 956 "VO", 957 }; 958 959 static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size) 960 { 961 u8 *qc; 962 int tid; 963 964 if (!ieee80211_is_data_qos(hdr->frame_control)) 965 return ""; 966 967 qc = ieee80211_get_qos_ctl(hdr); 968 tid = *qc & IEEE80211_QOS_CTL_TID_MASK; 969 if (tid < 8) 970 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]); 971 else 972 snprintf(out, size, "tid %d", tid); 973 974 return out; 975 } 976 977 static void ath10k_htt_rx_h_queue_msdu(struct ath10k *ar, 978 struct ieee80211_rx_status *rx_status, 979 struct sk_buff *skb) 980 { 981 struct ieee80211_rx_status *status; 982 983 status = IEEE80211_SKB_RXCB(skb); 984 *status = *rx_status; 985 986 __skb_queue_tail(&ar->htt.rx_msdus_q, skb); 987 } 988 989 static void ath10k_process_rx(struct ath10k *ar, struct sk_buff *skb) 990 { 991 struct ieee80211_rx_status *status; 992 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 993 char tid[32]; 994 995 status = IEEE80211_SKB_RXCB(skb); 996 997 ath10k_dbg(ar, ATH10K_DBG_DATA, 998 "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n", 999 skb, 1000 skb->len, 1001 ieee80211_get_SA(hdr), 1002 ath10k_get_tid(hdr, tid, sizeof(tid)), 1003 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ? 1004 "mcast" : "ucast", 1005 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4, 1006 (status->encoding == RX_ENC_LEGACY) ? "legacy" : "", 1007 (status->encoding == RX_ENC_HT) ? "ht" : "", 1008 (status->encoding == RX_ENC_VHT) ? "vht" : "", 1009 (status->bw == RATE_INFO_BW_40) ? "40" : "", 1010 (status->bw == RATE_INFO_BW_80) ? "80" : "", 1011 (status->bw == RATE_INFO_BW_160) ? "160" : "", 1012 status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "", 1013 status->rate_idx, 1014 status->nss, 1015 status->freq, 1016 status->band, status->flag, 1017 !!(status->flag & RX_FLAG_FAILED_FCS_CRC), 1018 !!(status->flag & RX_FLAG_MMIC_ERROR), 1019 !!(status->flag & RX_FLAG_AMSDU_MORE)); 1020 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ", 1021 skb->data, skb->len); 1022 trace_ath10k_rx_hdr(ar, skb->data, skb->len); 1023 trace_ath10k_rx_payload(ar, skb->data, skb->len); 1024 1025 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi); 1026 } 1027 1028 static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar, 1029 struct ieee80211_hdr *hdr) 1030 { 1031 int len = ieee80211_hdrlen(hdr->frame_control); 1032 1033 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING, 1034 ar->running_fw->fw_file.fw_features)) 1035 len = round_up(len, 4); 1036 1037 return len; 1038 } 1039 1040 static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar, 1041 struct sk_buff *msdu, 1042 struct ieee80211_rx_status *status, 1043 enum htt_rx_mpdu_encrypt_type enctype, 1044 bool is_decrypted) 1045 { 1046 struct ieee80211_hdr *hdr; 1047 struct htt_rx_desc *rxd; 1048 size_t hdr_len; 1049 size_t crypto_len; 1050 bool is_first; 1051 bool is_last; 1052 1053 rxd = (void *)msdu->data - sizeof(*rxd); 1054 is_first = !!(rxd->msdu_end.common.info0 & 1055 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); 1056 is_last = !!(rxd->msdu_end.common.info0 & 1057 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); 1058 1059 /* Delivered decapped frame: 1060 * [802.11 header] 1061 * [crypto param] <-- can be trimmed if !fcs_err && 1062 * !decrypt_err && !peer_idx_invalid 1063 * [amsdu header] <-- only if A-MSDU 1064 * [rfc1042/llc] 1065 * [payload] 1066 * [FCS] <-- at end, needs to be trimmed 1067 */ 1068 1069 /* This probably shouldn't happen but warn just in case */ 1070 if (unlikely(WARN_ON_ONCE(!is_first))) 1071 return; 1072 1073 /* This probably shouldn't happen but warn just in case */ 1074 if (unlikely(WARN_ON_ONCE(!(is_first && is_last)))) 1075 return; 1076 1077 skb_trim(msdu, msdu->len - FCS_LEN); 1078 1079 /* In most cases this will be true for sniffed frames. It makes sense 1080 * to deliver them as-is without stripping the crypto param. This is 1081 * necessary for software based decryption. 1082 * 1083 * If there's no error then the frame is decrypted. At least that is 1084 * the case for frames that come in via fragmented rx indication. 1085 */ 1086 if (!is_decrypted) 1087 return; 1088 1089 /* The payload is decrypted so strip crypto params. Start from tail 1090 * since hdr is used to compute some stuff. 1091 */ 1092 1093 hdr = (void *)msdu->data; 1094 1095 /* Tail */ 1096 if (status->flag & RX_FLAG_IV_STRIPPED) { 1097 skb_trim(msdu, msdu->len - 1098 ath10k_htt_rx_crypto_mic_len(ar, enctype)); 1099 1100 skb_trim(msdu, msdu->len - 1101 ath10k_htt_rx_crypto_icv_len(ar, enctype)); 1102 } else { 1103 /* MIC */ 1104 if (status->flag & RX_FLAG_MIC_STRIPPED) 1105 skb_trim(msdu, msdu->len - 1106 ath10k_htt_rx_crypto_mic_len(ar, enctype)); 1107 1108 /* ICV */ 1109 if (status->flag & RX_FLAG_ICV_STRIPPED) 1110 skb_trim(msdu, msdu->len - 1111 ath10k_htt_rx_crypto_icv_len(ar, enctype)); 1112 } 1113 1114 /* MMIC */ 1115 if ((status->flag & RX_FLAG_MMIC_STRIPPED) && 1116 !ieee80211_has_morefrags(hdr->frame_control) && 1117 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA) 1118 skb_trim(msdu, msdu->len - MICHAEL_MIC_LEN); 1119 1120 /* Head */ 1121 if (status->flag & RX_FLAG_IV_STRIPPED) { 1122 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1123 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1124 1125 memmove((void *)msdu->data + crypto_len, 1126 (void *)msdu->data, hdr_len); 1127 skb_pull(msdu, crypto_len); 1128 } 1129 } 1130 1131 static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar, 1132 struct sk_buff *msdu, 1133 struct ieee80211_rx_status *status, 1134 const u8 first_hdr[64], 1135 enum htt_rx_mpdu_encrypt_type enctype) 1136 { 1137 struct ieee80211_hdr *hdr; 1138 struct htt_rx_desc *rxd; 1139 size_t hdr_len; 1140 u8 da[ETH_ALEN]; 1141 u8 sa[ETH_ALEN]; 1142 int l3_pad_bytes; 1143 int bytes_aligned = ar->hw_params.decap_align_bytes; 1144 1145 /* Delivered decapped frame: 1146 * [nwifi 802.11 header] <-- replaced with 802.11 hdr 1147 * [rfc1042/llc] 1148 * 1149 * Note: The nwifi header doesn't have QoS Control and is 1150 * (always?) a 3addr frame. 1151 * 1152 * Note2: There's no A-MSDU subframe header. Even if it's part 1153 * of an A-MSDU. 1154 */ 1155 1156 /* pull decapped header and copy SA & DA */ 1157 rxd = (void *)msdu->data - sizeof(*rxd); 1158 1159 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1160 skb_put(msdu, l3_pad_bytes); 1161 1162 hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes); 1163 1164 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr); 1165 ether_addr_copy(da, ieee80211_get_DA(hdr)); 1166 ether_addr_copy(sa, ieee80211_get_SA(hdr)); 1167 skb_pull(msdu, hdr_len); 1168 1169 /* push original 802.11 header */ 1170 hdr = (struct ieee80211_hdr *)first_hdr; 1171 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1172 1173 if (!(status->flag & RX_FLAG_IV_STRIPPED)) { 1174 memcpy(skb_push(msdu, 1175 ath10k_htt_rx_crypto_param_len(ar, enctype)), 1176 (void *)hdr + round_up(hdr_len, bytes_aligned), 1177 ath10k_htt_rx_crypto_param_len(ar, enctype)); 1178 } 1179 1180 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1181 1182 /* original 802.11 header has a different DA and in 1183 * case of 4addr it may also have different SA 1184 */ 1185 hdr = (struct ieee80211_hdr *)msdu->data; 1186 ether_addr_copy(ieee80211_get_DA(hdr), da); 1187 ether_addr_copy(ieee80211_get_SA(hdr), sa); 1188 } 1189 1190 static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar, 1191 struct sk_buff *msdu, 1192 enum htt_rx_mpdu_encrypt_type enctype) 1193 { 1194 struct ieee80211_hdr *hdr; 1195 struct htt_rx_desc *rxd; 1196 size_t hdr_len, crypto_len; 1197 void *rfc1042; 1198 bool is_first, is_last, is_amsdu; 1199 int bytes_aligned = ar->hw_params.decap_align_bytes; 1200 1201 rxd = (void *)msdu->data - sizeof(*rxd); 1202 hdr = (void *)rxd->rx_hdr_status; 1203 1204 is_first = !!(rxd->msdu_end.common.info0 & 1205 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); 1206 is_last = !!(rxd->msdu_end.common.info0 & 1207 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); 1208 is_amsdu = !(is_first && is_last); 1209 1210 rfc1042 = hdr; 1211 1212 if (is_first) { 1213 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1214 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1215 1216 rfc1042 += round_up(hdr_len, bytes_aligned) + 1217 round_up(crypto_len, bytes_aligned); 1218 } 1219 1220 if (is_amsdu) 1221 rfc1042 += sizeof(struct amsdu_subframe_hdr); 1222 1223 return rfc1042; 1224 } 1225 1226 static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar, 1227 struct sk_buff *msdu, 1228 struct ieee80211_rx_status *status, 1229 const u8 first_hdr[64], 1230 enum htt_rx_mpdu_encrypt_type enctype) 1231 { 1232 struct ieee80211_hdr *hdr; 1233 struct ethhdr *eth; 1234 size_t hdr_len; 1235 void *rfc1042; 1236 u8 da[ETH_ALEN]; 1237 u8 sa[ETH_ALEN]; 1238 int l3_pad_bytes; 1239 struct htt_rx_desc *rxd; 1240 int bytes_aligned = ar->hw_params.decap_align_bytes; 1241 1242 /* Delivered decapped frame: 1243 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc 1244 * [payload] 1245 */ 1246 1247 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype); 1248 if (WARN_ON_ONCE(!rfc1042)) 1249 return; 1250 1251 rxd = (void *)msdu->data - sizeof(*rxd); 1252 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1253 skb_put(msdu, l3_pad_bytes); 1254 skb_pull(msdu, l3_pad_bytes); 1255 1256 /* pull decapped header and copy SA & DA */ 1257 eth = (struct ethhdr *)msdu->data; 1258 ether_addr_copy(da, eth->h_dest); 1259 ether_addr_copy(sa, eth->h_source); 1260 skb_pull(msdu, sizeof(struct ethhdr)); 1261 1262 /* push rfc1042/llc/snap */ 1263 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042, 1264 sizeof(struct rfc1042_hdr)); 1265 1266 /* push original 802.11 header */ 1267 hdr = (struct ieee80211_hdr *)first_hdr; 1268 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1269 1270 if (!(status->flag & RX_FLAG_IV_STRIPPED)) { 1271 memcpy(skb_push(msdu, 1272 ath10k_htt_rx_crypto_param_len(ar, enctype)), 1273 (void *)hdr + round_up(hdr_len, bytes_aligned), 1274 ath10k_htt_rx_crypto_param_len(ar, enctype)); 1275 } 1276 1277 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1278 1279 /* original 802.11 header has a different DA and in 1280 * case of 4addr it may also have different SA 1281 */ 1282 hdr = (struct ieee80211_hdr *)msdu->data; 1283 ether_addr_copy(ieee80211_get_DA(hdr), da); 1284 ether_addr_copy(ieee80211_get_SA(hdr), sa); 1285 } 1286 1287 static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar, 1288 struct sk_buff *msdu, 1289 struct ieee80211_rx_status *status, 1290 const u8 first_hdr[64], 1291 enum htt_rx_mpdu_encrypt_type enctype) 1292 { 1293 struct ieee80211_hdr *hdr; 1294 size_t hdr_len; 1295 int l3_pad_bytes; 1296 struct htt_rx_desc *rxd; 1297 int bytes_aligned = ar->hw_params.decap_align_bytes; 1298 1299 /* Delivered decapped frame: 1300 * [amsdu header] <-- replaced with 802.11 hdr 1301 * [rfc1042/llc] 1302 * [payload] 1303 */ 1304 1305 rxd = (void *)msdu->data - sizeof(*rxd); 1306 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1307 1308 skb_put(msdu, l3_pad_bytes); 1309 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes); 1310 1311 hdr = (struct ieee80211_hdr *)first_hdr; 1312 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1313 1314 if (!(status->flag & RX_FLAG_IV_STRIPPED)) { 1315 memcpy(skb_push(msdu, 1316 ath10k_htt_rx_crypto_param_len(ar, enctype)), 1317 (void *)hdr + round_up(hdr_len, bytes_aligned), 1318 ath10k_htt_rx_crypto_param_len(ar, enctype)); 1319 } 1320 1321 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1322 } 1323 1324 static void ath10k_htt_rx_h_undecap(struct ath10k *ar, 1325 struct sk_buff *msdu, 1326 struct ieee80211_rx_status *status, 1327 u8 first_hdr[64], 1328 enum htt_rx_mpdu_encrypt_type enctype, 1329 bool is_decrypted) 1330 { 1331 struct htt_rx_desc *rxd; 1332 enum rx_msdu_decap_format decap; 1333 1334 /* First msdu's decapped header: 1335 * [802.11 header] <-- padded to 4 bytes long 1336 * [crypto param] <-- padded to 4 bytes long 1337 * [amsdu header] <-- only if A-MSDU 1338 * [rfc1042/llc] 1339 * 1340 * Other (2nd, 3rd, ..) msdu's decapped header: 1341 * [amsdu header] <-- only if A-MSDU 1342 * [rfc1042/llc] 1343 */ 1344 1345 rxd = (void *)msdu->data - sizeof(*rxd); 1346 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1), 1347 RX_MSDU_START_INFO1_DECAP_FORMAT); 1348 1349 switch (decap) { 1350 case RX_MSDU_DECAP_RAW: 1351 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype, 1352 is_decrypted); 1353 break; 1354 case RX_MSDU_DECAP_NATIVE_WIFI: 1355 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr, 1356 enctype); 1357 break; 1358 case RX_MSDU_DECAP_ETHERNET2_DIX: 1359 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype); 1360 break; 1361 case RX_MSDU_DECAP_8023_SNAP_LLC: 1362 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr, 1363 enctype); 1364 break; 1365 } 1366 } 1367 1368 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb) 1369 { 1370 struct htt_rx_desc *rxd; 1371 u32 flags, info; 1372 bool is_ip4, is_ip6; 1373 bool is_tcp, is_udp; 1374 bool ip_csum_ok, tcpudp_csum_ok; 1375 1376 rxd = (void *)skb->data - sizeof(*rxd); 1377 flags = __le32_to_cpu(rxd->attention.flags); 1378 info = __le32_to_cpu(rxd->msdu_start.common.info1); 1379 1380 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO); 1381 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO); 1382 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO); 1383 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO); 1384 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL); 1385 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL); 1386 1387 if (!is_ip4 && !is_ip6) 1388 return CHECKSUM_NONE; 1389 if (!is_tcp && !is_udp) 1390 return CHECKSUM_NONE; 1391 if (!ip_csum_ok) 1392 return CHECKSUM_NONE; 1393 if (!tcpudp_csum_ok) 1394 return CHECKSUM_NONE; 1395 1396 return CHECKSUM_UNNECESSARY; 1397 } 1398 1399 static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu) 1400 { 1401 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu); 1402 } 1403 1404 static void ath10k_htt_rx_h_mpdu(struct ath10k *ar, 1405 struct sk_buff_head *amsdu, 1406 struct ieee80211_rx_status *status, 1407 bool fill_crypt_header) 1408 { 1409 struct sk_buff *first; 1410 struct sk_buff *last; 1411 struct sk_buff *msdu; 1412 struct htt_rx_desc *rxd; 1413 struct ieee80211_hdr *hdr; 1414 enum htt_rx_mpdu_encrypt_type enctype; 1415 u8 first_hdr[64]; 1416 u8 *qos; 1417 bool has_fcs_err; 1418 bool has_crypto_err; 1419 bool has_tkip_err; 1420 bool has_peer_idx_invalid; 1421 bool is_decrypted; 1422 bool is_mgmt; 1423 u32 attention; 1424 1425 if (skb_queue_empty(amsdu)) 1426 return; 1427 1428 first = skb_peek(amsdu); 1429 rxd = (void *)first->data - sizeof(*rxd); 1430 1431 is_mgmt = !!(rxd->attention.flags & 1432 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE)); 1433 1434 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), 1435 RX_MPDU_START_INFO0_ENCRYPT_TYPE); 1436 1437 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11 1438 * decapped header. It'll be used for undecapping of each MSDU. 1439 */ 1440 hdr = (void *)rxd->rx_hdr_status; 1441 memcpy(first_hdr, hdr, RX_HTT_HDR_STATUS_LEN); 1442 1443 /* Each A-MSDU subframe will use the original header as the base and be 1444 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl. 1445 */ 1446 hdr = (void *)first_hdr; 1447 1448 if (ieee80211_is_data_qos(hdr->frame_control)) { 1449 qos = ieee80211_get_qos_ctl(hdr); 1450 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT; 1451 } 1452 1453 /* Some attention flags are valid only in the last MSDU. */ 1454 last = skb_peek_tail(amsdu); 1455 rxd = (void *)last->data - sizeof(*rxd); 1456 attention = __le32_to_cpu(rxd->attention.flags); 1457 1458 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR); 1459 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR); 1460 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR); 1461 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID); 1462 1463 /* Note: If hardware captures an encrypted frame that it can't decrypt, 1464 * e.g. due to fcs error, missing peer or invalid key data it will 1465 * report the frame as raw. 1466 */ 1467 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE && 1468 !has_fcs_err && 1469 !has_crypto_err && 1470 !has_peer_idx_invalid); 1471 1472 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */ 1473 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC | 1474 RX_FLAG_MMIC_ERROR | 1475 RX_FLAG_DECRYPTED | 1476 RX_FLAG_IV_STRIPPED | 1477 RX_FLAG_ONLY_MONITOR | 1478 RX_FLAG_MMIC_STRIPPED); 1479 1480 if (has_fcs_err) 1481 status->flag |= RX_FLAG_FAILED_FCS_CRC; 1482 1483 if (has_tkip_err) 1484 status->flag |= RX_FLAG_MMIC_ERROR; 1485 1486 /* Firmware reports all necessary management frames via WMI already. 1487 * They are not reported to monitor interfaces at all so pass the ones 1488 * coming via HTT to monitor interfaces instead. This simplifies 1489 * matters a lot. 1490 */ 1491 if (is_mgmt) 1492 status->flag |= RX_FLAG_ONLY_MONITOR; 1493 1494 if (is_decrypted) { 1495 status->flag |= RX_FLAG_DECRYPTED; 1496 1497 if (likely(!is_mgmt)) 1498 status->flag |= RX_FLAG_MMIC_STRIPPED; 1499 1500 if (fill_crypt_header) 1501 status->flag |= RX_FLAG_MIC_STRIPPED | 1502 RX_FLAG_ICV_STRIPPED; 1503 else 1504 status->flag |= RX_FLAG_IV_STRIPPED; 1505 } 1506 1507 skb_queue_walk(amsdu, msdu) { 1508 ath10k_htt_rx_h_csum_offload(msdu); 1509 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype, 1510 is_decrypted); 1511 1512 /* Undecapping involves copying the original 802.11 header back 1513 * to sk_buff. If frame is protected and hardware has decrypted 1514 * it then remove the protected bit. 1515 */ 1516 if (!is_decrypted) 1517 continue; 1518 if (is_mgmt) 1519 continue; 1520 1521 if (fill_crypt_header) 1522 continue; 1523 1524 hdr = (void *)msdu->data; 1525 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 1526 } 1527 } 1528 1529 static void ath10k_htt_rx_h_enqueue(struct ath10k *ar, 1530 struct sk_buff_head *amsdu, 1531 struct ieee80211_rx_status *status) 1532 { 1533 struct sk_buff *msdu; 1534 struct sk_buff *first_subframe; 1535 1536 first_subframe = skb_peek(amsdu); 1537 1538 while ((msdu = __skb_dequeue(amsdu))) { 1539 /* Setup per-MSDU flags */ 1540 if (skb_queue_empty(amsdu)) 1541 status->flag &= ~RX_FLAG_AMSDU_MORE; 1542 else 1543 status->flag |= RX_FLAG_AMSDU_MORE; 1544 1545 if (msdu == first_subframe) { 1546 first_subframe = NULL; 1547 status->flag &= ~RX_FLAG_ALLOW_SAME_PN; 1548 } else { 1549 status->flag |= RX_FLAG_ALLOW_SAME_PN; 1550 } 1551 1552 ath10k_htt_rx_h_queue_msdu(ar, status, msdu); 1553 } 1554 } 1555 1556 static int ath10k_unchain_msdu(struct sk_buff_head *amsdu) 1557 { 1558 struct sk_buff *skb, *first; 1559 int space; 1560 int total_len = 0; 1561 1562 /* TODO: Might could optimize this by using 1563 * skb_try_coalesce or similar method to 1564 * decrease copying, or maybe get mac80211 to 1565 * provide a way to just receive a list of 1566 * skb? 1567 */ 1568 1569 first = __skb_dequeue(amsdu); 1570 1571 /* Allocate total length all at once. */ 1572 skb_queue_walk(amsdu, skb) 1573 total_len += skb->len; 1574 1575 space = total_len - skb_tailroom(first); 1576 if ((space > 0) && 1577 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) { 1578 /* TODO: bump some rx-oom error stat */ 1579 /* put it back together so we can free the 1580 * whole list at once. 1581 */ 1582 __skb_queue_head(amsdu, first); 1583 return -1; 1584 } 1585 1586 /* Walk list again, copying contents into 1587 * msdu_head 1588 */ 1589 while ((skb = __skb_dequeue(amsdu))) { 1590 skb_copy_from_linear_data(skb, skb_put(first, skb->len), 1591 skb->len); 1592 dev_kfree_skb_any(skb); 1593 } 1594 1595 __skb_queue_head(amsdu, first); 1596 return 0; 1597 } 1598 1599 static void ath10k_htt_rx_h_unchain(struct ath10k *ar, 1600 struct sk_buff_head *amsdu) 1601 { 1602 struct sk_buff *first; 1603 struct htt_rx_desc *rxd; 1604 enum rx_msdu_decap_format decap; 1605 1606 first = skb_peek(amsdu); 1607 rxd = (void *)first->data - sizeof(*rxd); 1608 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1), 1609 RX_MSDU_START_INFO1_DECAP_FORMAT); 1610 1611 /* FIXME: Current unchaining logic can only handle simple case of raw 1612 * msdu chaining. If decapping is other than raw the chaining may be 1613 * more complex and this isn't handled by the current code. Don't even 1614 * try re-constructing such frames - it'll be pretty much garbage. 1615 */ 1616 if (decap != RX_MSDU_DECAP_RAW || 1617 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) { 1618 __skb_queue_purge(amsdu); 1619 return; 1620 } 1621 1622 ath10k_unchain_msdu(amsdu); 1623 } 1624 1625 static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar, 1626 struct sk_buff_head *amsdu, 1627 struct ieee80211_rx_status *rx_status) 1628 { 1629 /* FIXME: It might be a good idea to do some fuzzy-testing to drop 1630 * invalid/dangerous frames. 1631 */ 1632 1633 if (!rx_status->freq) { 1634 ath10k_dbg(ar, ATH10K_DBG_HTT, "no channel configured; ignoring frame(s)!\n"); 1635 return false; 1636 } 1637 1638 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) { 1639 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n"); 1640 return false; 1641 } 1642 1643 return true; 1644 } 1645 1646 static void ath10k_htt_rx_h_filter(struct ath10k *ar, 1647 struct sk_buff_head *amsdu, 1648 struct ieee80211_rx_status *rx_status) 1649 { 1650 if (skb_queue_empty(amsdu)) 1651 return; 1652 1653 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status)) 1654 return; 1655 1656 __skb_queue_purge(amsdu); 1657 } 1658 1659 static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt) 1660 { 1661 struct ath10k *ar = htt->ar; 1662 struct ieee80211_rx_status *rx_status = &htt->rx_status; 1663 struct sk_buff_head amsdu; 1664 int ret; 1665 1666 __skb_queue_head_init(&amsdu); 1667 1668 spin_lock_bh(&htt->rx_ring.lock); 1669 if (htt->rx_confused) { 1670 spin_unlock_bh(&htt->rx_ring.lock); 1671 return -EIO; 1672 } 1673 ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu); 1674 spin_unlock_bh(&htt->rx_ring.lock); 1675 1676 if (ret < 0) { 1677 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret); 1678 __skb_queue_purge(&amsdu); 1679 /* FIXME: It's probably a good idea to reboot the 1680 * device instead of leaving it inoperable. 1681 */ 1682 htt->rx_confused = true; 1683 return ret; 1684 } 1685 1686 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff); 1687 1688 /* only for ret = 1 indicates chained msdus */ 1689 if (ret > 0) 1690 ath10k_htt_rx_h_unchain(ar, &amsdu); 1691 1692 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status); 1693 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status, true); 1694 ath10k_htt_rx_h_enqueue(ar, &amsdu, rx_status); 1695 1696 return 0; 1697 } 1698 1699 static void ath10k_htt_rx_proc_rx_ind(struct ath10k_htt *htt, 1700 struct htt_rx_indication *rx) 1701 { 1702 struct ath10k *ar = htt->ar; 1703 struct htt_rx_indication_mpdu_range *mpdu_ranges; 1704 int num_mpdu_ranges; 1705 int i, mpdu_count = 0; 1706 1707 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1), 1708 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); 1709 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx); 1710 1711 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ", 1712 rx, sizeof(*rx) + 1713 (sizeof(struct htt_rx_indication_mpdu_range) * 1714 num_mpdu_ranges)); 1715 1716 for (i = 0; i < num_mpdu_ranges; i++) 1717 mpdu_count += mpdu_ranges[i].mpdu_count; 1718 1719 atomic_add(mpdu_count, &htt->num_mpdus_ready); 1720 } 1721 1722 static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar, 1723 struct sk_buff *skb) 1724 { 1725 struct ath10k_htt *htt = &ar->htt; 1726 struct htt_resp *resp = (struct htt_resp *)skb->data; 1727 struct htt_tx_done tx_done = {}; 1728 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS); 1729 __le16 msdu_id; 1730 int i; 1731 1732 switch (status) { 1733 case HTT_DATA_TX_STATUS_NO_ACK: 1734 tx_done.status = HTT_TX_COMPL_STATE_NOACK; 1735 break; 1736 case HTT_DATA_TX_STATUS_OK: 1737 tx_done.status = HTT_TX_COMPL_STATE_ACK; 1738 break; 1739 case HTT_DATA_TX_STATUS_DISCARD: 1740 case HTT_DATA_TX_STATUS_POSTPONE: 1741 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL: 1742 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 1743 break; 1744 default: 1745 ath10k_warn(ar, "unhandled tx completion status %d\n", status); 1746 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 1747 break; 1748 } 1749 1750 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n", 1751 resp->data_tx_completion.num_msdus); 1752 1753 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) { 1754 msdu_id = resp->data_tx_completion.msdus[i]; 1755 tx_done.msdu_id = __le16_to_cpu(msdu_id); 1756 1757 /* kfifo_put: In practice firmware shouldn't fire off per-CE 1758 * interrupt and main interrupt (MSI/-X range case) for the same 1759 * HTC service so it should be safe to use kfifo_put w/o lock. 1760 * 1761 * From kfifo_put() documentation: 1762 * Note that with only one concurrent reader and one concurrent 1763 * writer, you don't need extra locking to use these macro. 1764 */ 1765 if (!kfifo_put(&htt->txdone_fifo, tx_done)) { 1766 ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n", 1767 tx_done.msdu_id, tx_done.status); 1768 ath10k_txrx_tx_unref(htt, &tx_done); 1769 } 1770 } 1771 } 1772 1773 static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp) 1774 { 1775 struct htt_rx_addba *ev = &resp->rx_addba; 1776 struct ath10k_peer *peer; 1777 struct ath10k_vif *arvif; 1778 u16 info0, tid, peer_id; 1779 1780 info0 = __le16_to_cpu(ev->info0); 1781 tid = MS(info0, HTT_RX_BA_INFO0_TID); 1782 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 1783 1784 ath10k_dbg(ar, ATH10K_DBG_HTT, 1785 "htt rx addba tid %hu peer_id %hu size %hhu\n", 1786 tid, peer_id, ev->window_size); 1787 1788 spin_lock_bh(&ar->data_lock); 1789 peer = ath10k_peer_find_by_id(ar, peer_id); 1790 if (!peer) { 1791 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", 1792 peer_id); 1793 spin_unlock_bh(&ar->data_lock); 1794 return; 1795 } 1796 1797 arvif = ath10k_get_arvif(ar, peer->vdev_id); 1798 if (!arvif) { 1799 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 1800 peer->vdev_id); 1801 spin_unlock_bh(&ar->data_lock); 1802 return; 1803 } 1804 1805 ath10k_dbg(ar, ATH10K_DBG_HTT, 1806 "htt rx start rx ba session sta %pM tid %hu size %hhu\n", 1807 peer->addr, tid, ev->window_size); 1808 1809 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid); 1810 spin_unlock_bh(&ar->data_lock); 1811 } 1812 1813 static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp) 1814 { 1815 struct htt_rx_delba *ev = &resp->rx_delba; 1816 struct ath10k_peer *peer; 1817 struct ath10k_vif *arvif; 1818 u16 info0, tid, peer_id; 1819 1820 info0 = __le16_to_cpu(ev->info0); 1821 tid = MS(info0, HTT_RX_BA_INFO0_TID); 1822 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 1823 1824 ath10k_dbg(ar, ATH10K_DBG_HTT, 1825 "htt rx delba tid %hu peer_id %hu\n", 1826 tid, peer_id); 1827 1828 spin_lock_bh(&ar->data_lock); 1829 peer = ath10k_peer_find_by_id(ar, peer_id); 1830 if (!peer) { 1831 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", 1832 peer_id); 1833 spin_unlock_bh(&ar->data_lock); 1834 return; 1835 } 1836 1837 arvif = ath10k_get_arvif(ar, peer->vdev_id); 1838 if (!arvif) { 1839 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 1840 peer->vdev_id); 1841 spin_unlock_bh(&ar->data_lock); 1842 return; 1843 } 1844 1845 ath10k_dbg(ar, ATH10K_DBG_HTT, 1846 "htt rx stop rx ba session sta %pM tid %hu\n", 1847 peer->addr, tid); 1848 1849 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid); 1850 spin_unlock_bh(&ar->data_lock); 1851 } 1852 1853 static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list, 1854 struct sk_buff_head *amsdu) 1855 { 1856 struct sk_buff *msdu; 1857 struct htt_rx_desc *rxd; 1858 1859 if (skb_queue_empty(list)) 1860 return -ENOBUFS; 1861 1862 if (WARN_ON(!skb_queue_empty(amsdu))) 1863 return -EINVAL; 1864 1865 while ((msdu = __skb_dequeue(list))) { 1866 __skb_queue_tail(amsdu, msdu); 1867 1868 rxd = (void *)msdu->data - sizeof(*rxd); 1869 if (rxd->msdu_end.common.info0 & 1870 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)) 1871 break; 1872 } 1873 1874 msdu = skb_peek_tail(amsdu); 1875 rxd = (void *)msdu->data - sizeof(*rxd); 1876 if (!(rxd->msdu_end.common.info0 & 1877 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) { 1878 skb_queue_splice_init(amsdu, list); 1879 return -EAGAIN; 1880 } 1881 1882 return 0; 1883 } 1884 1885 static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status, 1886 struct sk_buff *skb) 1887 { 1888 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1889 1890 if (!ieee80211_has_protected(hdr->frame_control)) 1891 return; 1892 1893 /* Offloaded frames are already decrypted but firmware insists they are 1894 * protected in the 802.11 header. Strip the flag. Otherwise mac80211 1895 * will drop the frame. 1896 */ 1897 1898 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 1899 status->flag |= RX_FLAG_DECRYPTED | 1900 RX_FLAG_IV_STRIPPED | 1901 RX_FLAG_MMIC_STRIPPED; 1902 } 1903 1904 static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar, 1905 struct sk_buff_head *list) 1906 { 1907 struct ath10k_htt *htt = &ar->htt; 1908 struct ieee80211_rx_status *status = &htt->rx_status; 1909 struct htt_rx_offload_msdu *rx; 1910 struct sk_buff *msdu; 1911 size_t offset; 1912 1913 while ((msdu = __skb_dequeue(list))) { 1914 /* Offloaded frames don't have Rx descriptor. Instead they have 1915 * a short meta information header. 1916 */ 1917 1918 rx = (void *)msdu->data; 1919 1920 skb_put(msdu, sizeof(*rx)); 1921 skb_pull(msdu, sizeof(*rx)); 1922 1923 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) { 1924 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n"); 1925 dev_kfree_skb_any(msdu); 1926 continue; 1927 } 1928 1929 skb_put(msdu, __le16_to_cpu(rx->msdu_len)); 1930 1931 /* Offloaded rx header length isn't multiple of 2 nor 4 so the 1932 * actual payload is unaligned. Align the frame. Otherwise 1933 * mac80211 complains. This shouldn't reduce performance much 1934 * because these offloaded frames are rare. 1935 */ 1936 offset = 4 - ((unsigned long)msdu->data & 3); 1937 skb_put(msdu, offset); 1938 memmove(msdu->data + offset, msdu->data, msdu->len); 1939 skb_pull(msdu, offset); 1940 1941 /* FIXME: The frame is NWifi. Re-construct QoS Control 1942 * if possible later. 1943 */ 1944 1945 memset(status, 0, sizeof(*status)); 1946 status->flag |= RX_FLAG_NO_SIGNAL_VAL; 1947 1948 ath10k_htt_rx_h_rx_offload_prot(status, msdu); 1949 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id); 1950 ath10k_htt_rx_h_queue_msdu(ar, status, msdu); 1951 } 1952 } 1953 1954 static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb) 1955 { 1956 struct ath10k_htt *htt = &ar->htt; 1957 struct htt_resp *resp = (void *)skb->data; 1958 struct ieee80211_rx_status *status = &htt->rx_status; 1959 struct sk_buff_head list; 1960 struct sk_buff_head amsdu; 1961 u16 peer_id; 1962 u16 msdu_count; 1963 u8 vdev_id; 1964 u8 tid; 1965 bool offload; 1966 bool frag; 1967 int ret; 1968 1969 lockdep_assert_held(&htt->rx_ring.lock); 1970 1971 if (htt->rx_confused) 1972 return -EIO; 1973 1974 skb_pull(skb, sizeof(resp->hdr)); 1975 skb_pull(skb, sizeof(resp->rx_in_ord_ind)); 1976 1977 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id); 1978 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count); 1979 vdev_id = resp->rx_in_ord_ind.vdev_id; 1980 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID); 1981 offload = !!(resp->rx_in_ord_ind.info & 1982 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 1983 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK); 1984 1985 ath10k_dbg(ar, ATH10K_DBG_HTT, 1986 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n", 1987 vdev_id, peer_id, tid, offload, frag, msdu_count); 1988 1989 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) { 1990 ath10k_warn(ar, "dropping invalid in order rx indication\n"); 1991 return -EINVAL; 1992 } 1993 1994 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later 1995 * extracted and processed. 1996 */ 1997 __skb_queue_head_init(&list); 1998 ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list); 1999 if (ret < 0) { 2000 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret); 2001 htt->rx_confused = true; 2002 return -EIO; 2003 } 2004 2005 /* Offloaded frames are very different and need to be handled 2006 * separately. 2007 */ 2008 if (offload) 2009 ath10k_htt_rx_h_rx_offload(ar, &list); 2010 2011 while (!skb_queue_empty(&list)) { 2012 __skb_queue_head_init(&amsdu); 2013 ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu); 2014 switch (ret) { 2015 case 0: 2016 /* Note: The in-order indication may report interleaved 2017 * frames from different PPDUs meaning reported rx rate 2018 * to mac80211 isn't accurate/reliable. It's still 2019 * better to report something than nothing though. This 2020 * should still give an idea about rx rate to the user. 2021 */ 2022 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id); 2023 ath10k_htt_rx_h_filter(ar, &amsdu, status); 2024 ath10k_htt_rx_h_mpdu(ar, &amsdu, status, false); 2025 ath10k_htt_rx_h_enqueue(ar, &amsdu, status); 2026 break; 2027 case -EAGAIN: 2028 /* fall through */ 2029 default: 2030 /* Should not happen. */ 2031 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret); 2032 htt->rx_confused = true; 2033 __skb_queue_purge(&list); 2034 return -EIO; 2035 } 2036 } 2037 return ret; 2038 } 2039 2040 static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar, 2041 const __le32 *resp_ids, 2042 int num_resp_ids) 2043 { 2044 int i; 2045 u32 resp_id; 2046 2047 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n", 2048 num_resp_ids); 2049 2050 for (i = 0; i < num_resp_ids; i++) { 2051 resp_id = le32_to_cpu(resp_ids[i]); 2052 2053 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n", 2054 resp_id); 2055 2056 /* TODO: free resp_id */ 2057 } 2058 } 2059 2060 static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb) 2061 { 2062 struct ieee80211_hw *hw = ar->hw; 2063 struct ieee80211_txq *txq; 2064 struct htt_resp *resp = (struct htt_resp *)skb->data; 2065 struct htt_tx_fetch_record *record; 2066 size_t len; 2067 size_t max_num_bytes; 2068 size_t max_num_msdus; 2069 size_t num_bytes; 2070 size_t num_msdus; 2071 const __le32 *resp_ids; 2072 u16 num_records; 2073 u16 num_resp_ids; 2074 u16 peer_id; 2075 u8 tid; 2076 int ret; 2077 int i; 2078 2079 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n"); 2080 2081 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind); 2082 if (unlikely(skb->len < len)) { 2083 ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n"); 2084 return; 2085 } 2086 2087 num_records = le16_to_cpu(resp->tx_fetch_ind.num_records); 2088 num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids); 2089 2090 len += sizeof(resp->tx_fetch_ind.records[0]) * num_records; 2091 len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids; 2092 2093 if (unlikely(skb->len < len)) { 2094 ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n"); 2095 return; 2096 } 2097 2098 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n", 2099 num_records, num_resp_ids, 2100 le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num)); 2101 2102 if (!ar->htt.tx_q_state.enabled) { 2103 ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n"); 2104 return; 2105 } 2106 2107 if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) { 2108 ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n"); 2109 return; 2110 } 2111 2112 rcu_read_lock(); 2113 2114 for (i = 0; i < num_records; i++) { 2115 record = &resp->tx_fetch_ind.records[i]; 2116 peer_id = MS(le16_to_cpu(record->info), 2117 HTT_TX_FETCH_RECORD_INFO_PEER_ID); 2118 tid = MS(le16_to_cpu(record->info), 2119 HTT_TX_FETCH_RECORD_INFO_TID); 2120 max_num_msdus = le16_to_cpu(record->num_msdus); 2121 max_num_bytes = le32_to_cpu(record->num_bytes); 2122 2123 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n", 2124 i, peer_id, tid, max_num_msdus, max_num_bytes); 2125 2126 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) || 2127 unlikely(tid >= ar->htt.tx_q_state.num_tids)) { 2128 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n", 2129 peer_id, tid); 2130 continue; 2131 } 2132 2133 spin_lock_bh(&ar->data_lock); 2134 txq = ath10k_mac_txq_lookup(ar, peer_id, tid); 2135 spin_unlock_bh(&ar->data_lock); 2136 2137 /* It is okay to release the lock and use txq because RCU read 2138 * lock is held. 2139 */ 2140 2141 if (unlikely(!txq)) { 2142 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n", 2143 peer_id, tid); 2144 continue; 2145 } 2146 2147 num_msdus = 0; 2148 num_bytes = 0; 2149 2150 while (num_msdus < max_num_msdus && 2151 num_bytes < max_num_bytes) { 2152 ret = ath10k_mac_tx_push_txq(hw, txq); 2153 if (ret < 0) 2154 break; 2155 2156 num_msdus++; 2157 num_bytes += ret; 2158 } 2159 2160 record->num_msdus = cpu_to_le16(num_msdus); 2161 record->num_bytes = cpu_to_le32(num_bytes); 2162 2163 ath10k_htt_tx_txq_recalc(hw, txq); 2164 } 2165 2166 rcu_read_unlock(); 2167 2168 resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind); 2169 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids); 2170 2171 ret = ath10k_htt_tx_fetch_resp(ar, 2172 resp->tx_fetch_ind.token, 2173 resp->tx_fetch_ind.fetch_seq_num, 2174 resp->tx_fetch_ind.records, 2175 num_records); 2176 if (unlikely(ret)) { 2177 ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n", 2178 le32_to_cpu(resp->tx_fetch_ind.token), ret); 2179 /* FIXME: request fw restart */ 2180 } 2181 2182 ath10k_htt_tx_txq_sync(ar); 2183 } 2184 2185 static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar, 2186 struct sk_buff *skb) 2187 { 2188 const struct htt_resp *resp = (void *)skb->data; 2189 size_t len; 2190 int num_resp_ids; 2191 2192 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n"); 2193 2194 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm); 2195 if (unlikely(skb->len < len)) { 2196 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n"); 2197 return; 2198 } 2199 2200 num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids); 2201 len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids; 2202 2203 if (unlikely(skb->len < len)) { 2204 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n"); 2205 return; 2206 } 2207 2208 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, 2209 resp->tx_fetch_confirm.resp_ids, 2210 num_resp_ids); 2211 } 2212 2213 static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar, 2214 struct sk_buff *skb) 2215 { 2216 const struct htt_resp *resp = (void *)skb->data; 2217 const struct htt_tx_mode_switch_record *record; 2218 struct ieee80211_txq *txq; 2219 struct ath10k_txq *artxq; 2220 size_t len; 2221 size_t num_records; 2222 enum htt_tx_mode_switch_mode mode; 2223 bool enable; 2224 u16 info0; 2225 u16 info1; 2226 u16 threshold; 2227 u16 peer_id; 2228 u8 tid; 2229 int i; 2230 2231 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n"); 2232 2233 len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind); 2234 if (unlikely(skb->len < len)) { 2235 ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n"); 2236 return; 2237 } 2238 2239 info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0); 2240 info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1); 2241 2242 enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE); 2243 num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD); 2244 mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE); 2245 threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD); 2246 2247 ath10k_dbg(ar, ATH10K_DBG_HTT, 2248 "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n", 2249 info0, info1, enable, num_records, mode, threshold); 2250 2251 len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records; 2252 2253 if (unlikely(skb->len < len)) { 2254 ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n"); 2255 return; 2256 } 2257 2258 switch (mode) { 2259 case HTT_TX_MODE_SWITCH_PUSH: 2260 case HTT_TX_MODE_SWITCH_PUSH_PULL: 2261 break; 2262 default: 2263 ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n", 2264 mode); 2265 return; 2266 } 2267 2268 if (!enable) 2269 return; 2270 2271 ar->htt.tx_q_state.enabled = enable; 2272 ar->htt.tx_q_state.mode = mode; 2273 ar->htt.tx_q_state.num_push_allowed = threshold; 2274 2275 rcu_read_lock(); 2276 2277 for (i = 0; i < num_records; i++) { 2278 record = &resp->tx_mode_switch_ind.records[i]; 2279 info0 = le16_to_cpu(record->info0); 2280 peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID); 2281 tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID); 2282 2283 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) || 2284 unlikely(tid >= ar->htt.tx_q_state.num_tids)) { 2285 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n", 2286 peer_id, tid); 2287 continue; 2288 } 2289 2290 spin_lock_bh(&ar->data_lock); 2291 txq = ath10k_mac_txq_lookup(ar, peer_id, tid); 2292 spin_unlock_bh(&ar->data_lock); 2293 2294 /* It is okay to release the lock and use txq because RCU read 2295 * lock is held. 2296 */ 2297 2298 if (unlikely(!txq)) { 2299 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n", 2300 peer_id, tid); 2301 continue; 2302 } 2303 2304 spin_lock_bh(&ar->htt.tx_lock); 2305 artxq = (void *)txq->drv_priv; 2306 artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus); 2307 spin_unlock_bh(&ar->htt.tx_lock); 2308 } 2309 2310 rcu_read_unlock(); 2311 2312 ath10k_mac_tx_push_pending(ar); 2313 } 2314 2315 void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) 2316 { 2317 bool release; 2318 2319 release = ath10k_htt_t2h_msg_handler(ar, skb); 2320 2321 /* Free the indication buffer */ 2322 if (release) 2323 dev_kfree_skb_any(skb); 2324 } 2325 2326 static inline bool is_valid_legacy_rate(u8 rate) 2327 { 2328 static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12, 2329 18, 24, 36, 48, 54}; 2330 int i; 2331 2332 for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) { 2333 if (rate == legacy_rates[i]) 2334 return true; 2335 } 2336 2337 return false; 2338 } 2339 2340 static void 2341 ath10k_update_per_peer_tx_stats(struct ath10k *ar, 2342 struct ieee80211_sta *sta, 2343 struct ath10k_per_peer_tx_stats *peer_stats) 2344 { 2345 struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv; 2346 u8 rate = 0, sgi; 2347 struct rate_info txrate; 2348 2349 lockdep_assert_held(&ar->data_lock); 2350 2351 txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode); 2352 txrate.bw = ATH10K_HW_BW(peer_stats->flags); 2353 txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode); 2354 txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode); 2355 sgi = ATH10K_HW_GI(peer_stats->flags); 2356 2357 if (txrate.flags == WMI_RATE_PREAMBLE_VHT && txrate.mcs > 9) { 2358 ath10k_warn(ar, "Invalid VHT mcs %hhd peer stats", txrate.mcs); 2359 return; 2360 } 2361 2362 if (txrate.flags == WMI_RATE_PREAMBLE_HT && 2363 (txrate.mcs > 7 || txrate.nss < 1)) { 2364 ath10k_warn(ar, "Invalid HT mcs %hhd nss %hhd peer stats", 2365 txrate.mcs, txrate.nss); 2366 return; 2367 } 2368 2369 memset(&arsta->txrate, 0, sizeof(arsta->txrate)); 2370 2371 if (txrate.flags == WMI_RATE_PREAMBLE_CCK || 2372 txrate.flags == WMI_RATE_PREAMBLE_OFDM) { 2373 rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode); 2374 2375 if (!is_valid_legacy_rate(rate)) { 2376 ath10k_warn(ar, "Invalid legacy rate %hhd peer stats", 2377 rate); 2378 return; 2379 } 2380 2381 /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */ 2382 rate *= 10; 2383 if (rate == 60 && txrate.flags == WMI_RATE_PREAMBLE_CCK) 2384 rate = rate - 5; 2385 arsta->txrate.legacy = rate; 2386 } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) { 2387 arsta->txrate.flags = RATE_INFO_FLAGS_MCS; 2388 arsta->txrate.mcs = txrate.mcs + 8 * (txrate.nss - 1); 2389 } else { 2390 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS; 2391 arsta->txrate.mcs = txrate.mcs; 2392 } 2393 2394 if (sgi) 2395 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; 2396 2397 arsta->txrate.nss = txrate.nss; 2398 arsta->txrate.bw = txrate.bw + RATE_INFO_BW_20; 2399 } 2400 2401 static void ath10k_htt_fetch_peer_stats(struct ath10k *ar, 2402 struct sk_buff *skb) 2403 { 2404 struct htt_resp *resp = (struct htt_resp *)skb->data; 2405 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats; 2406 struct htt_per_peer_tx_stats_ind *tx_stats; 2407 struct ieee80211_sta *sta; 2408 struct ath10k_peer *peer; 2409 int peer_id, i; 2410 u8 ppdu_len, num_ppdu; 2411 2412 num_ppdu = resp->peer_tx_stats.num_ppdu; 2413 ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32); 2414 2415 if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) { 2416 ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len); 2417 return; 2418 } 2419 2420 tx_stats = (struct htt_per_peer_tx_stats_ind *) 2421 (resp->peer_tx_stats.payload); 2422 peer_id = __le16_to_cpu(tx_stats->peer_id); 2423 2424 rcu_read_lock(); 2425 spin_lock_bh(&ar->data_lock); 2426 peer = ath10k_peer_find_by_id(ar, peer_id); 2427 if (!peer) { 2428 ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n", 2429 peer_id); 2430 goto out; 2431 } 2432 2433 sta = peer->sta; 2434 for (i = 0; i < num_ppdu; i++) { 2435 tx_stats = (struct htt_per_peer_tx_stats_ind *) 2436 (resp->peer_tx_stats.payload + i * ppdu_len); 2437 2438 p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes); 2439 p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes); 2440 p_tx_stats->failed_bytes = 2441 __le32_to_cpu(tx_stats->failed_bytes); 2442 p_tx_stats->ratecode = tx_stats->ratecode; 2443 p_tx_stats->flags = tx_stats->flags; 2444 p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts); 2445 p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts); 2446 p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts); 2447 2448 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats); 2449 } 2450 2451 out: 2452 spin_unlock_bh(&ar->data_lock); 2453 rcu_read_unlock(); 2454 } 2455 2456 static void ath10k_fetch_10_2_tx_stats(struct ath10k *ar, u8 *data) 2457 { 2458 struct ath10k_pktlog_hdr *hdr = (struct ath10k_pktlog_hdr *)data; 2459 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats; 2460 struct ath10k_10_2_peer_tx_stats *tx_stats; 2461 struct ieee80211_sta *sta; 2462 struct ath10k_peer *peer; 2463 u16 log_type = __le16_to_cpu(hdr->log_type); 2464 u32 peer_id = 0, i; 2465 2466 if (log_type != ATH_PKTLOG_TYPE_TX_STAT) 2467 return; 2468 2469 tx_stats = (struct ath10k_10_2_peer_tx_stats *)((hdr->payload) + 2470 ATH10K_10_2_TX_STATS_OFFSET); 2471 2472 if (!tx_stats->tx_ppdu_cnt) 2473 return; 2474 2475 peer_id = tx_stats->peer_id; 2476 2477 rcu_read_lock(); 2478 spin_lock_bh(&ar->data_lock); 2479 peer = ath10k_peer_find_by_id(ar, peer_id); 2480 if (!peer) { 2481 ath10k_warn(ar, "Invalid peer id %d in peer stats buffer\n", 2482 peer_id); 2483 goto out; 2484 } 2485 2486 sta = peer->sta; 2487 for (i = 0; i < tx_stats->tx_ppdu_cnt; i++) { 2488 p_tx_stats->succ_bytes = 2489 __le16_to_cpu(tx_stats->success_bytes[i]); 2490 p_tx_stats->retry_bytes = 2491 __le16_to_cpu(tx_stats->retry_bytes[i]); 2492 p_tx_stats->failed_bytes = 2493 __le16_to_cpu(tx_stats->failed_bytes[i]); 2494 p_tx_stats->ratecode = tx_stats->ratecode[i]; 2495 p_tx_stats->flags = tx_stats->flags[i]; 2496 p_tx_stats->succ_pkts = tx_stats->success_pkts[i]; 2497 p_tx_stats->retry_pkts = tx_stats->retry_pkts[i]; 2498 p_tx_stats->failed_pkts = tx_stats->failed_pkts[i]; 2499 2500 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats); 2501 } 2502 spin_unlock_bh(&ar->data_lock); 2503 rcu_read_unlock(); 2504 2505 return; 2506 2507 out: 2508 spin_unlock_bh(&ar->data_lock); 2509 rcu_read_unlock(); 2510 } 2511 2512 bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) 2513 { 2514 struct ath10k_htt *htt = &ar->htt; 2515 struct htt_resp *resp = (struct htt_resp *)skb->data; 2516 enum htt_t2h_msg_type type; 2517 2518 /* confirm alignment */ 2519 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 2520 ath10k_warn(ar, "unaligned htt message, expect trouble\n"); 2521 2522 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n", 2523 resp->hdr.msg_type); 2524 2525 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) { 2526 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X", 2527 resp->hdr.msg_type, ar->htt.t2h_msg_types_max); 2528 return true; 2529 } 2530 type = ar->htt.t2h_msg_types[resp->hdr.msg_type]; 2531 2532 switch (type) { 2533 case HTT_T2H_MSG_TYPE_VERSION_CONF: { 2534 htt->target_version_major = resp->ver_resp.major; 2535 htt->target_version_minor = resp->ver_resp.minor; 2536 complete(&htt->target_version_received); 2537 break; 2538 } 2539 case HTT_T2H_MSG_TYPE_RX_IND: 2540 ath10k_htt_rx_proc_rx_ind(htt, &resp->rx_ind); 2541 break; 2542 case HTT_T2H_MSG_TYPE_PEER_MAP: { 2543 struct htt_peer_map_event ev = { 2544 .vdev_id = resp->peer_map.vdev_id, 2545 .peer_id = __le16_to_cpu(resp->peer_map.peer_id), 2546 }; 2547 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr)); 2548 ath10k_peer_map_event(htt, &ev); 2549 break; 2550 } 2551 case HTT_T2H_MSG_TYPE_PEER_UNMAP: { 2552 struct htt_peer_unmap_event ev = { 2553 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id), 2554 }; 2555 ath10k_peer_unmap_event(htt, &ev); 2556 break; 2557 } 2558 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: { 2559 struct htt_tx_done tx_done = {}; 2560 int status = __le32_to_cpu(resp->mgmt_tx_completion.status); 2561 2562 tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id); 2563 2564 switch (status) { 2565 case HTT_MGMT_TX_STATUS_OK: 2566 tx_done.status = HTT_TX_COMPL_STATE_ACK; 2567 break; 2568 case HTT_MGMT_TX_STATUS_RETRY: 2569 tx_done.status = HTT_TX_COMPL_STATE_NOACK; 2570 break; 2571 case HTT_MGMT_TX_STATUS_DROP: 2572 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 2573 break; 2574 } 2575 2576 status = ath10k_txrx_tx_unref(htt, &tx_done); 2577 if (!status) { 2578 spin_lock_bh(&htt->tx_lock); 2579 ath10k_htt_tx_mgmt_dec_pending(htt); 2580 spin_unlock_bh(&htt->tx_lock); 2581 } 2582 break; 2583 } 2584 case HTT_T2H_MSG_TYPE_TX_COMPL_IND: 2585 ath10k_htt_rx_tx_compl_ind(htt->ar, skb); 2586 break; 2587 case HTT_T2H_MSG_TYPE_SEC_IND: { 2588 struct ath10k *ar = htt->ar; 2589 struct htt_security_indication *ev = &resp->security_indication; 2590 2591 ath10k_dbg(ar, ATH10K_DBG_HTT, 2592 "sec ind peer_id %d unicast %d type %d\n", 2593 __le16_to_cpu(ev->peer_id), 2594 !!(ev->flags & HTT_SECURITY_IS_UNICAST), 2595 MS(ev->flags, HTT_SECURITY_TYPE)); 2596 complete(&ar->install_key_done); 2597 break; 2598 } 2599 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: { 2600 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 2601 skb->data, skb->len); 2602 atomic_inc(&htt->num_mpdus_ready); 2603 break; 2604 } 2605 case HTT_T2H_MSG_TYPE_TEST: 2606 break; 2607 case HTT_T2H_MSG_TYPE_STATS_CONF: 2608 trace_ath10k_htt_stats(ar, skb->data, skb->len); 2609 break; 2610 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND: 2611 /* Firmware can return tx frames if it's unable to fully 2612 * process them and suspects host may be able to fix it. ath10k 2613 * sends all tx frames as already inspected so this shouldn't 2614 * happen unless fw has a bug. 2615 */ 2616 ath10k_warn(ar, "received an unexpected htt tx inspect event\n"); 2617 break; 2618 case HTT_T2H_MSG_TYPE_RX_ADDBA: 2619 ath10k_htt_rx_addba(ar, resp); 2620 break; 2621 case HTT_T2H_MSG_TYPE_RX_DELBA: 2622 ath10k_htt_rx_delba(ar, resp); 2623 break; 2624 case HTT_T2H_MSG_TYPE_PKTLOG: { 2625 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload, 2626 skb->len - 2627 offsetof(struct htt_resp, 2628 pktlog_msg.payload)); 2629 2630 if (ath10k_peer_stats_enabled(ar)) 2631 ath10k_fetch_10_2_tx_stats(ar, 2632 resp->pktlog_msg.payload); 2633 break; 2634 } 2635 case HTT_T2H_MSG_TYPE_RX_FLUSH: { 2636 /* Ignore this event because mac80211 takes care of Rx 2637 * aggregation reordering. 2638 */ 2639 break; 2640 } 2641 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: { 2642 __skb_queue_tail(&htt->rx_in_ord_compl_q, skb); 2643 return false; 2644 } 2645 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND: 2646 break; 2647 case HTT_T2H_MSG_TYPE_CHAN_CHANGE: { 2648 u32 phymode = __le32_to_cpu(resp->chan_change.phymode); 2649 u32 freq = __le32_to_cpu(resp->chan_change.freq); 2650 2651 ar->tgt_oper_chan = ieee80211_get_channel(ar->hw->wiphy, freq); 2652 ath10k_dbg(ar, ATH10K_DBG_HTT, 2653 "htt chan change freq %u phymode %s\n", 2654 freq, ath10k_wmi_phymode_str(phymode)); 2655 break; 2656 } 2657 case HTT_T2H_MSG_TYPE_AGGR_CONF: 2658 break; 2659 case HTT_T2H_MSG_TYPE_TX_FETCH_IND: { 2660 struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC); 2661 2662 if (!tx_fetch_ind) { 2663 ath10k_warn(ar, "failed to copy htt tx fetch ind\n"); 2664 break; 2665 } 2666 skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind); 2667 break; 2668 } 2669 case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM: 2670 ath10k_htt_rx_tx_fetch_confirm(ar, skb); 2671 break; 2672 case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND: 2673 ath10k_htt_rx_tx_mode_switch_ind(ar, skb); 2674 break; 2675 case HTT_T2H_MSG_TYPE_PEER_STATS: 2676 ath10k_htt_fetch_peer_stats(ar, skb); 2677 break; 2678 case HTT_T2H_MSG_TYPE_EN_STATS: 2679 default: 2680 ath10k_warn(ar, "htt event (%d) not handled\n", 2681 resp->hdr.msg_type); 2682 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 2683 skb->data, skb->len); 2684 break; 2685 } 2686 return true; 2687 } 2688 EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler); 2689 2690 void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar, 2691 struct sk_buff *skb) 2692 { 2693 trace_ath10k_htt_pktlog(ar, skb->data, skb->len); 2694 dev_kfree_skb_any(skb); 2695 } 2696 EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler); 2697 2698 static int ath10k_htt_rx_deliver_msdu(struct ath10k *ar, int quota, int budget) 2699 { 2700 struct sk_buff *skb; 2701 2702 while (quota < budget) { 2703 if (skb_queue_empty(&ar->htt.rx_msdus_q)) 2704 break; 2705 2706 skb = __skb_dequeue(&ar->htt.rx_msdus_q); 2707 if (!skb) 2708 break; 2709 ath10k_process_rx(ar, skb); 2710 quota++; 2711 } 2712 2713 return quota; 2714 } 2715 2716 int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget) 2717 { 2718 struct ath10k_htt *htt = &ar->htt; 2719 struct htt_tx_done tx_done = {}; 2720 struct sk_buff_head tx_ind_q; 2721 struct sk_buff *skb; 2722 unsigned long flags; 2723 int quota = 0, done, ret; 2724 bool resched_napi = false; 2725 2726 __skb_queue_head_init(&tx_ind_q); 2727 2728 /* Process pending frames before dequeuing more data 2729 * from hardware. 2730 */ 2731 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget); 2732 if (quota == budget) { 2733 resched_napi = true; 2734 goto exit; 2735 } 2736 2737 while ((skb = __skb_dequeue(&htt->rx_in_ord_compl_q))) { 2738 spin_lock_bh(&htt->rx_ring.lock); 2739 ret = ath10k_htt_rx_in_ord_ind(ar, skb); 2740 spin_unlock_bh(&htt->rx_ring.lock); 2741 2742 dev_kfree_skb_any(skb); 2743 if (ret == -EIO) { 2744 resched_napi = true; 2745 goto exit; 2746 } 2747 } 2748 2749 while (atomic_read(&htt->num_mpdus_ready)) { 2750 ret = ath10k_htt_rx_handle_amsdu(htt); 2751 if (ret == -EIO) { 2752 resched_napi = true; 2753 goto exit; 2754 } 2755 atomic_dec(&htt->num_mpdus_ready); 2756 } 2757 2758 /* Deliver received data after processing data from hardware */ 2759 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget); 2760 2761 /* From NAPI documentation: 2762 * The napi poll() function may also process TX completions, in which 2763 * case if it processes the entire TX ring then it should count that 2764 * work as the rest of the budget. 2765 */ 2766 if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo)) 2767 quota = budget; 2768 2769 /* kfifo_get: called only within txrx_tasklet so it's neatly serialized. 2770 * From kfifo_get() documentation: 2771 * Note that with only one concurrent reader and one concurrent writer, 2772 * you don't need extra locking to use these macro. 2773 */ 2774 while (kfifo_get(&htt->txdone_fifo, &tx_done)) 2775 ath10k_txrx_tx_unref(htt, &tx_done); 2776 2777 ath10k_mac_tx_push_pending(ar); 2778 2779 spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags); 2780 skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q); 2781 spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags); 2782 2783 while ((skb = __skb_dequeue(&tx_ind_q))) { 2784 ath10k_htt_rx_tx_fetch_ind(ar, skb); 2785 dev_kfree_skb_any(skb); 2786 } 2787 2788 exit: 2789 ath10k_htt_rx_msdu_buff_replenish(htt); 2790 /* In case of rx failure or more data to read, report budget 2791 * to reschedule NAPI poll 2792 */ 2793 done = resched_napi ? budget : quota; 2794 2795 return done; 2796 } 2797 EXPORT_SYMBOL(ath10k_htt_txrx_compl_task); 2798