1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include "core.h" 19 #include "htc.h" 20 #include "htt.h" 21 #include "txrx.h" 22 #include "debug.h" 23 #include "trace.h" 24 #include "mac.h" 25 26 #include <linux/log2.h> 27 28 #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX 29 #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1) 30 31 /* when under memory pressure rx ring refill may fail and needs a retry */ 32 #define HTT_RX_RING_REFILL_RETRY_MS 50 33 34 #define HTT_RX_RING_REFILL_RESCHED_MS 5 35 36 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb); 37 38 static struct sk_buff * 39 ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr) 40 { 41 struct ath10k_skb_rxcb *rxcb; 42 43 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr) 44 if (rxcb->paddr == paddr) 45 return ATH10K_RXCB_SKB(rxcb); 46 47 WARN_ON_ONCE(1); 48 return NULL; 49 } 50 51 static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt) 52 { 53 struct sk_buff *skb; 54 struct ath10k_skb_rxcb *rxcb; 55 struct hlist_node *n; 56 int i; 57 58 if (htt->rx_ring.in_ord_rx) { 59 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) { 60 skb = ATH10K_RXCB_SKB(rxcb); 61 dma_unmap_single(htt->ar->dev, rxcb->paddr, 62 skb->len + skb_tailroom(skb), 63 DMA_FROM_DEVICE); 64 hash_del(&rxcb->hlist); 65 dev_kfree_skb_any(skb); 66 } 67 } else { 68 for (i = 0; i < htt->rx_ring.size; i++) { 69 skb = htt->rx_ring.netbufs_ring[i]; 70 if (!skb) 71 continue; 72 73 rxcb = ATH10K_SKB_RXCB(skb); 74 dma_unmap_single(htt->ar->dev, rxcb->paddr, 75 skb->len + skb_tailroom(skb), 76 DMA_FROM_DEVICE); 77 dev_kfree_skb_any(skb); 78 } 79 } 80 81 htt->rx_ring.fill_cnt = 0; 82 hash_init(htt->rx_ring.skb_table); 83 memset(htt->rx_ring.netbufs_ring, 0, 84 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0])); 85 } 86 87 static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 88 { 89 struct htt_rx_desc *rx_desc; 90 struct ath10k_skb_rxcb *rxcb; 91 struct sk_buff *skb; 92 dma_addr_t paddr; 93 int ret = 0, idx; 94 95 /* The Full Rx Reorder firmware has no way of telling the host 96 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring. 97 * To keep things simple make sure ring is always half empty. This 98 * guarantees there'll be no replenishment overruns possible. 99 */ 100 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2); 101 102 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr); 103 while (num > 0) { 104 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN); 105 if (!skb) { 106 ret = -ENOMEM; 107 goto fail; 108 } 109 110 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN)) 111 skb_pull(skb, 112 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) - 113 skb->data); 114 115 /* Clear rx_desc attention word before posting to Rx ring */ 116 rx_desc = (struct htt_rx_desc *)skb->data; 117 rx_desc->attention.flags = __cpu_to_le32(0); 118 119 paddr = dma_map_single(htt->ar->dev, skb->data, 120 skb->len + skb_tailroom(skb), 121 DMA_FROM_DEVICE); 122 123 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) { 124 dev_kfree_skb_any(skb); 125 ret = -ENOMEM; 126 goto fail; 127 } 128 129 rxcb = ATH10K_SKB_RXCB(skb); 130 rxcb->paddr = paddr; 131 htt->rx_ring.netbufs_ring[idx] = skb; 132 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr); 133 htt->rx_ring.fill_cnt++; 134 135 if (htt->rx_ring.in_ord_rx) { 136 hash_add(htt->rx_ring.skb_table, 137 &ATH10K_SKB_RXCB(skb)->hlist, 138 (u32)paddr); 139 } 140 141 num--; 142 idx++; 143 idx &= htt->rx_ring.size_mask; 144 } 145 146 fail: 147 /* 148 * Make sure the rx buffer is updated before available buffer 149 * index to avoid any potential rx ring corruption. 150 */ 151 mb(); 152 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx); 153 return ret; 154 } 155 156 static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 157 { 158 lockdep_assert_held(&htt->rx_ring.lock); 159 return __ath10k_htt_rx_ring_fill_n(htt, num); 160 } 161 162 static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt) 163 { 164 int ret, num_deficit, num_to_fill; 165 166 /* Refilling the whole RX ring buffer proves to be a bad idea. The 167 * reason is RX may take up significant amount of CPU cycles and starve 168 * other tasks, e.g. TX on an ethernet device while acting as a bridge 169 * with ath10k wlan interface. This ended up with very poor performance 170 * once CPU the host system was overwhelmed with RX on ath10k. 171 * 172 * By limiting the number of refills the replenishing occurs 173 * progressively. This in turns makes use of the fact tasklets are 174 * processed in FIFO order. This means actual RX processing can starve 175 * out refilling. If there's not enough buffers on RX ring FW will not 176 * report RX until it is refilled with enough buffers. This 177 * automatically balances load wrt to CPU power. 178 * 179 * This probably comes at a cost of lower maximum throughput but 180 * improves the average and stability. 181 */ 182 spin_lock_bh(&htt->rx_ring.lock); 183 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt; 184 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit); 185 num_deficit -= num_to_fill; 186 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill); 187 if (ret == -ENOMEM) { 188 /* 189 * Failed to fill it to the desired level - 190 * we'll start a timer and try again next time. 191 * As long as enough buffers are left in the ring for 192 * another A-MPDU rx, no special recovery is needed. 193 */ 194 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + 195 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS)); 196 } else if (num_deficit > 0) { 197 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + 198 msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS)); 199 } 200 spin_unlock_bh(&htt->rx_ring.lock); 201 } 202 203 static void ath10k_htt_rx_ring_refill_retry(unsigned long arg) 204 { 205 struct ath10k_htt *htt = (struct ath10k_htt *)arg; 206 207 ath10k_htt_rx_msdu_buff_replenish(htt); 208 } 209 210 int ath10k_htt_rx_ring_refill(struct ath10k *ar) 211 { 212 struct ath10k_htt *htt = &ar->htt; 213 int ret; 214 215 spin_lock_bh(&htt->rx_ring.lock); 216 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level - 217 htt->rx_ring.fill_cnt)); 218 spin_unlock_bh(&htt->rx_ring.lock); 219 220 if (ret) 221 ath10k_htt_rx_ring_free(htt); 222 223 return ret; 224 } 225 226 void ath10k_htt_rx_free(struct ath10k_htt *htt) 227 { 228 del_timer_sync(&htt->rx_ring.refill_retry_timer); 229 230 skb_queue_purge(&htt->rx_compl_q); 231 skb_queue_purge(&htt->rx_in_ord_compl_q); 232 skb_queue_purge(&htt->tx_fetch_ind_q); 233 234 ath10k_htt_rx_ring_free(htt); 235 236 dma_free_coherent(htt->ar->dev, 237 (htt->rx_ring.size * 238 sizeof(htt->rx_ring.paddrs_ring)), 239 htt->rx_ring.paddrs_ring, 240 htt->rx_ring.base_paddr); 241 242 dma_free_coherent(htt->ar->dev, 243 sizeof(*htt->rx_ring.alloc_idx.vaddr), 244 htt->rx_ring.alloc_idx.vaddr, 245 htt->rx_ring.alloc_idx.paddr); 246 247 kfree(htt->rx_ring.netbufs_ring); 248 } 249 250 static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt) 251 { 252 struct ath10k *ar = htt->ar; 253 int idx; 254 struct sk_buff *msdu; 255 256 lockdep_assert_held(&htt->rx_ring.lock); 257 258 if (htt->rx_ring.fill_cnt == 0) { 259 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n"); 260 return NULL; 261 } 262 263 idx = htt->rx_ring.sw_rd_idx.msdu_payld; 264 msdu = htt->rx_ring.netbufs_ring[idx]; 265 htt->rx_ring.netbufs_ring[idx] = NULL; 266 htt->rx_ring.paddrs_ring[idx] = 0; 267 268 idx++; 269 idx &= htt->rx_ring.size_mask; 270 htt->rx_ring.sw_rd_idx.msdu_payld = idx; 271 htt->rx_ring.fill_cnt--; 272 273 dma_unmap_single(htt->ar->dev, 274 ATH10K_SKB_RXCB(msdu)->paddr, 275 msdu->len + skb_tailroom(msdu), 276 DMA_FROM_DEVICE); 277 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", 278 msdu->data, msdu->len + skb_tailroom(msdu)); 279 280 return msdu; 281 } 282 283 /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */ 284 static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, 285 struct sk_buff_head *amsdu) 286 { 287 struct ath10k *ar = htt->ar; 288 int msdu_len, msdu_chaining = 0; 289 struct sk_buff *msdu; 290 struct htt_rx_desc *rx_desc; 291 292 lockdep_assert_held(&htt->rx_ring.lock); 293 294 for (;;) { 295 int last_msdu, msdu_len_invalid, msdu_chained; 296 297 msdu = ath10k_htt_rx_netbuf_pop(htt); 298 if (!msdu) { 299 __skb_queue_purge(amsdu); 300 return -ENOENT; 301 } 302 303 __skb_queue_tail(amsdu, msdu); 304 305 rx_desc = (struct htt_rx_desc *)msdu->data; 306 307 /* FIXME: we must report msdu payload since this is what caller 308 * expects now 309 */ 310 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload)); 311 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload)); 312 313 /* 314 * Sanity check - confirm the HW is finished filling in the 315 * rx data. 316 * If the HW and SW are working correctly, then it's guaranteed 317 * that the HW's MAC DMA is done before this point in the SW. 318 * To prevent the case that we handle a stale Rx descriptor, 319 * just assert for now until we have a way to recover. 320 */ 321 if (!(__le32_to_cpu(rx_desc->attention.flags) 322 & RX_ATTENTION_FLAGS_MSDU_DONE)) { 323 __skb_queue_purge(amsdu); 324 return -EIO; 325 } 326 327 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags) 328 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR | 329 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR)); 330 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0), 331 RX_MSDU_START_INFO0_MSDU_LENGTH); 332 msdu_chained = rx_desc->frag_info.ring2_more_count; 333 334 if (msdu_len_invalid) 335 msdu_len = 0; 336 337 skb_trim(msdu, 0); 338 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE)); 339 msdu_len -= msdu->len; 340 341 /* Note: Chained buffers do not contain rx descriptor */ 342 while (msdu_chained--) { 343 msdu = ath10k_htt_rx_netbuf_pop(htt); 344 if (!msdu) { 345 __skb_queue_purge(amsdu); 346 return -ENOENT; 347 } 348 349 __skb_queue_tail(amsdu, msdu); 350 skb_trim(msdu, 0); 351 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE)); 352 msdu_len -= msdu->len; 353 msdu_chaining = 1; 354 } 355 356 last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) & 357 RX_MSDU_END_INFO0_LAST_MSDU; 358 359 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention, 360 sizeof(*rx_desc) - sizeof(u32)); 361 362 if (last_msdu) 363 break; 364 } 365 366 if (skb_queue_empty(amsdu)) 367 msdu_chaining = -1; 368 369 /* 370 * Don't refill the ring yet. 371 * 372 * First, the elements popped here are still in use - it is not 373 * safe to overwrite them until the matching call to 374 * mpdu_desc_list_next. Second, for efficiency it is preferable to 375 * refill the rx ring with 1 PPDU's worth of rx buffers (something 376 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers 377 * (something like 3 buffers). Consequently, we'll rely on the txrx 378 * SW to tell us when it is done pulling all the PPDU's rx buffers 379 * out of the rx ring, and then refill it just once. 380 */ 381 382 return msdu_chaining; 383 } 384 385 static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt, 386 u32 paddr) 387 { 388 struct ath10k *ar = htt->ar; 389 struct ath10k_skb_rxcb *rxcb; 390 struct sk_buff *msdu; 391 392 lockdep_assert_held(&htt->rx_ring.lock); 393 394 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr); 395 if (!msdu) 396 return NULL; 397 398 rxcb = ATH10K_SKB_RXCB(msdu); 399 hash_del(&rxcb->hlist); 400 htt->rx_ring.fill_cnt--; 401 402 dma_unmap_single(htt->ar->dev, rxcb->paddr, 403 msdu->len + skb_tailroom(msdu), 404 DMA_FROM_DEVICE); 405 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", 406 msdu->data, msdu->len + skb_tailroom(msdu)); 407 408 return msdu; 409 } 410 411 static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt, 412 struct htt_rx_in_ord_ind *ev, 413 struct sk_buff_head *list) 414 { 415 struct ath10k *ar = htt->ar; 416 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs; 417 struct htt_rx_desc *rxd; 418 struct sk_buff *msdu; 419 int msdu_count; 420 bool is_offload; 421 u32 paddr; 422 423 lockdep_assert_held(&htt->rx_ring.lock); 424 425 msdu_count = __le16_to_cpu(ev->msdu_count); 426 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 427 428 while (msdu_count--) { 429 paddr = __le32_to_cpu(msdu_desc->msdu_paddr); 430 431 msdu = ath10k_htt_rx_pop_paddr(htt, paddr); 432 if (!msdu) { 433 __skb_queue_purge(list); 434 return -ENOENT; 435 } 436 437 __skb_queue_tail(list, msdu); 438 439 if (!is_offload) { 440 rxd = (void *)msdu->data; 441 442 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd)); 443 444 skb_put(msdu, sizeof(*rxd)); 445 skb_pull(msdu, sizeof(*rxd)); 446 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len)); 447 448 if (!(__le32_to_cpu(rxd->attention.flags) & 449 RX_ATTENTION_FLAGS_MSDU_DONE)) { 450 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n"); 451 return -EIO; 452 } 453 } 454 455 msdu_desc++; 456 } 457 458 return 0; 459 } 460 461 int ath10k_htt_rx_alloc(struct ath10k_htt *htt) 462 { 463 struct ath10k *ar = htt->ar; 464 dma_addr_t paddr; 465 void *vaddr; 466 size_t size; 467 struct timer_list *timer = &htt->rx_ring.refill_retry_timer; 468 469 htt->rx_confused = false; 470 471 /* XXX: The fill level could be changed during runtime in response to 472 * the host processing latency. Is this really worth it? 473 */ 474 htt->rx_ring.size = HTT_RX_RING_SIZE; 475 htt->rx_ring.size_mask = htt->rx_ring.size - 1; 476 htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL; 477 478 if (!is_power_of_2(htt->rx_ring.size)) { 479 ath10k_warn(ar, "htt rx ring size is not power of 2\n"); 480 return -EINVAL; 481 } 482 483 htt->rx_ring.netbufs_ring = 484 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *), 485 GFP_KERNEL); 486 if (!htt->rx_ring.netbufs_ring) 487 goto err_netbuf; 488 489 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring); 490 491 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL); 492 if (!vaddr) 493 goto err_dma_ring; 494 495 htt->rx_ring.paddrs_ring = vaddr; 496 htt->rx_ring.base_paddr = paddr; 497 498 vaddr = dma_alloc_coherent(htt->ar->dev, 499 sizeof(*htt->rx_ring.alloc_idx.vaddr), 500 &paddr, GFP_KERNEL); 501 if (!vaddr) 502 goto err_dma_idx; 503 504 htt->rx_ring.alloc_idx.vaddr = vaddr; 505 htt->rx_ring.alloc_idx.paddr = paddr; 506 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask; 507 *htt->rx_ring.alloc_idx.vaddr = 0; 508 509 /* Initialize the Rx refill retry timer */ 510 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt); 511 512 spin_lock_init(&htt->rx_ring.lock); 513 514 htt->rx_ring.fill_cnt = 0; 515 htt->rx_ring.sw_rd_idx.msdu_payld = 0; 516 hash_init(htt->rx_ring.skb_table); 517 518 skb_queue_head_init(&htt->rx_compl_q); 519 skb_queue_head_init(&htt->rx_in_ord_compl_q); 520 skb_queue_head_init(&htt->tx_fetch_ind_q); 521 atomic_set(&htt->num_mpdus_ready, 0); 522 523 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n", 524 htt->rx_ring.size, htt->rx_ring.fill_level); 525 return 0; 526 527 err_dma_idx: 528 dma_free_coherent(htt->ar->dev, 529 (htt->rx_ring.size * 530 sizeof(htt->rx_ring.paddrs_ring)), 531 htt->rx_ring.paddrs_ring, 532 htt->rx_ring.base_paddr); 533 err_dma_ring: 534 kfree(htt->rx_ring.netbufs_ring); 535 err_netbuf: 536 return -ENOMEM; 537 } 538 539 static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar, 540 enum htt_rx_mpdu_encrypt_type type) 541 { 542 switch (type) { 543 case HTT_RX_MPDU_ENCRYPT_NONE: 544 return 0; 545 case HTT_RX_MPDU_ENCRYPT_WEP40: 546 case HTT_RX_MPDU_ENCRYPT_WEP104: 547 return IEEE80211_WEP_IV_LEN; 548 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 549 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 550 return IEEE80211_TKIP_IV_LEN; 551 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 552 return IEEE80211_CCMP_HDR_LEN; 553 case HTT_RX_MPDU_ENCRYPT_WEP128: 554 case HTT_RX_MPDU_ENCRYPT_WAPI: 555 break; 556 } 557 558 ath10k_warn(ar, "unsupported encryption type %d\n", type); 559 return 0; 560 } 561 562 #define MICHAEL_MIC_LEN 8 563 564 static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar, 565 enum htt_rx_mpdu_encrypt_type type) 566 { 567 switch (type) { 568 case HTT_RX_MPDU_ENCRYPT_NONE: 569 return 0; 570 case HTT_RX_MPDU_ENCRYPT_WEP40: 571 case HTT_RX_MPDU_ENCRYPT_WEP104: 572 return IEEE80211_WEP_ICV_LEN; 573 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 574 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 575 return IEEE80211_TKIP_ICV_LEN; 576 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 577 return IEEE80211_CCMP_MIC_LEN; 578 case HTT_RX_MPDU_ENCRYPT_WEP128: 579 case HTT_RX_MPDU_ENCRYPT_WAPI: 580 break; 581 } 582 583 ath10k_warn(ar, "unsupported encryption type %d\n", type); 584 return 0; 585 } 586 587 struct amsdu_subframe_hdr { 588 u8 dst[ETH_ALEN]; 589 u8 src[ETH_ALEN]; 590 __be16 len; 591 } __packed; 592 593 #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63) 594 595 static void ath10k_htt_rx_h_rates(struct ath10k *ar, 596 struct ieee80211_rx_status *status, 597 struct htt_rx_desc *rxd) 598 { 599 struct ieee80211_supported_band *sband; 600 u8 cck, rate, bw, sgi, mcs, nss; 601 u8 preamble = 0; 602 u8 group_id; 603 u32 info1, info2, info3; 604 605 info1 = __le32_to_cpu(rxd->ppdu_start.info1); 606 info2 = __le32_to_cpu(rxd->ppdu_start.info2); 607 info3 = __le32_to_cpu(rxd->ppdu_start.info3); 608 609 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE); 610 611 switch (preamble) { 612 case HTT_RX_LEGACY: 613 /* To get legacy rate index band is required. Since band can't 614 * be undefined check if freq is non-zero. 615 */ 616 if (!status->freq) 617 return; 618 619 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT; 620 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE); 621 rate &= ~RX_PPDU_START_RATE_FLAG; 622 623 sband = &ar->mac.sbands[status->band]; 624 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck); 625 break; 626 case HTT_RX_HT: 627 case HTT_RX_HT_WITH_TXBF: 628 /* HT-SIG - Table 20-11 in info2 and info3 */ 629 mcs = info2 & 0x1F; 630 nss = mcs >> 3; 631 bw = (info2 >> 7) & 1; 632 sgi = (info3 >> 7) & 1; 633 634 status->rate_idx = mcs; 635 status->encoding = RX_ENC_HT; 636 if (sgi) 637 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 638 if (bw) 639 status->bw = RATE_INFO_BW_40; 640 break; 641 case HTT_RX_VHT: 642 case HTT_RX_VHT_WITH_TXBF: 643 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3 644 * TODO check this 645 */ 646 bw = info2 & 3; 647 sgi = info3 & 1; 648 group_id = (info2 >> 4) & 0x3F; 649 650 if (GROUP_ID_IS_SU_MIMO(group_id)) { 651 mcs = (info3 >> 4) & 0x0F; 652 nss = ((info2 >> 10) & 0x07) + 1; 653 } else { 654 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor 655 * so it's impossible to decode MCS. Also since 656 * firmware consumes Group Id Management frames host 657 * has no knowledge regarding group/user position 658 * mapping so it's impossible to pick the correct Nsts 659 * from VHT-SIG-A1. 660 * 661 * Bandwidth and SGI are valid so report the rateinfo 662 * on best-effort basis. 663 */ 664 mcs = 0; 665 nss = 1; 666 } 667 668 if (mcs > 0x09) { 669 ath10k_warn(ar, "invalid MCS received %u\n", mcs); 670 ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n", 671 __le32_to_cpu(rxd->attention.flags), 672 __le32_to_cpu(rxd->mpdu_start.info0), 673 __le32_to_cpu(rxd->mpdu_start.info1), 674 __le32_to_cpu(rxd->msdu_start.common.info0), 675 __le32_to_cpu(rxd->msdu_start.common.info1), 676 rxd->ppdu_start.info0, 677 __le32_to_cpu(rxd->ppdu_start.info1), 678 __le32_to_cpu(rxd->ppdu_start.info2), 679 __le32_to_cpu(rxd->ppdu_start.info3), 680 __le32_to_cpu(rxd->ppdu_start.info4)); 681 682 ath10k_warn(ar, "msdu end %08x mpdu end %08x\n", 683 __le32_to_cpu(rxd->msdu_end.common.info0), 684 __le32_to_cpu(rxd->mpdu_end.info0)); 685 686 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, 687 "rx desc msdu payload: ", 688 rxd->msdu_payload, 50); 689 } 690 691 status->rate_idx = mcs; 692 status->nss = nss; 693 694 if (sgi) 695 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 696 697 switch (bw) { 698 /* 20MHZ */ 699 case 0: 700 break; 701 /* 40MHZ */ 702 case 1: 703 status->bw = RATE_INFO_BW_40; 704 break; 705 /* 80MHZ */ 706 case 2: 707 status->bw = RATE_INFO_BW_80; 708 break; 709 case 3: 710 status->bw = RATE_INFO_BW_160; 711 break; 712 } 713 714 status->encoding = RX_ENC_VHT; 715 break; 716 default: 717 break; 718 } 719 } 720 721 static struct ieee80211_channel * 722 ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd) 723 { 724 struct ath10k_peer *peer; 725 struct ath10k_vif *arvif; 726 struct cfg80211_chan_def def; 727 u16 peer_id; 728 729 lockdep_assert_held(&ar->data_lock); 730 731 if (!rxd) 732 return NULL; 733 734 if (rxd->attention.flags & 735 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID)) 736 return NULL; 737 738 if (!(rxd->msdu_end.common.info0 & 739 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU))) 740 return NULL; 741 742 peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0), 743 RX_MPDU_START_INFO0_PEER_IDX); 744 745 peer = ath10k_peer_find_by_id(ar, peer_id); 746 if (!peer) 747 return NULL; 748 749 arvif = ath10k_get_arvif(ar, peer->vdev_id); 750 if (WARN_ON_ONCE(!arvif)) 751 return NULL; 752 753 if (ath10k_mac_vif_chan(arvif->vif, &def)) 754 return NULL; 755 756 return def.chan; 757 } 758 759 static struct ieee80211_channel * 760 ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id) 761 { 762 struct ath10k_vif *arvif; 763 struct cfg80211_chan_def def; 764 765 lockdep_assert_held(&ar->data_lock); 766 767 list_for_each_entry(arvif, &ar->arvifs, list) { 768 if (arvif->vdev_id == vdev_id && 769 ath10k_mac_vif_chan(arvif->vif, &def) == 0) 770 return def.chan; 771 } 772 773 return NULL; 774 } 775 776 static void 777 ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw, 778 struct ieee80211_chanctx_conf *conf, 779 void *data) 780 { 781 struct cfg80211_chan_def *def = data; 782 783 *def = conf->def; 784 } 785 786 static struct ieee80211_channel * 787 ath10k_htt_rx_h_any_channel(struct ath10k *ar) 788 { 789 struct cfg80211_chan_def def = {}; 790 791 ieee80211_iter_chan_contexts_atomic(ar->hw, 792 ath10k_htt_rx_h_any_chan_iter, 793 &def); 794 795 return def.chan; 796 } 797 798 static bool ath10k_htt_rx_h_channel(struct ath10k *ar, 799 struct ieee80211_rx_status *status, 800 struct htt_rx_desc *rxd, 801 u32 vdev_id) 802 { 803 struct ieee80211_channel *ch; 804 805 spin_lock_bh(&ar->data_lock); 806 ch = ar->scan_channel; 807 if (!ch) 808 ch = ar->rx_channel; 809 if (!ch) 810 ch = ath10k_htt_rx_h_peer_channel(ar, rxd); 811 if (!ch) 812 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id); 813 if (!ch) 814 ch = ath10k_htt_rx_h_any_channel(ar); 815 if (!ch) 816 ch = ar->tgt_oper_chan; 817 spin_unlock_bh(&ar->data_lock); 818 819 if (!ch) 820 return false; 821 822 status->band = ch->band; 823 status->freq = ch->center_freq; 824 825 return true; 826 } 827 828 static void ath10k_htt_rx_h_signal(struct ath10k *ar, 829 struct ieee80211_rx_status *status, 830 struct htt_rx_desc *rxd) 831 { 832 int i; 833 834 for (i = 0; i < IEEE80211_MAX_CHAINS ; i++) { 835 status->chains &= ~BIT(i); 836 837 if (rxd->ppdu_start.rssi_chains[i].pri20_mhz != 0x80) { 838 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR + 839 rxd->ppdu_start.rssi_chains[i].pri20_mhz; 840 841 status->chains |= BIT(i); 842 } 843 } 844 845 /* FIXME: Get real NF */ 846 status->signal = ATH10K_DEFAULT_NOISE_FLOOR + 847 rxd->ppdu_start.rssi_comb; 848 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL; 849 } 850 851 static void ath10k_htt_rx_h_mactime(struct ath10k *ar, 852 struct ieee80211_rx_status *status, 853 struct htt_rx_desc *rxd) 854 { 855 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This 856 * means all prior MSDUs in a PPDU are reported to mac80211 without the 857 * TSF. Is it worth holding frames until end of PPDU is known? 858 * 859 * FIXME: Can we get/compute 64bit TSF? 860 */ 861 status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp); 862 status->flag |= RX_FLAG_MACTIME_END; 863 } 864 865 static void ath10k_htt_rx_h_ppdu(struct ath10k *ar, 866 struct sk_buff_head *amsdu, 867 struct ieee80211_rx_status *status, 868 u32 vdev_id) 869 { 870 struct sk_buff *first; 871 struct htt_rx_desc *rxd; 872 bool is_first_ppdu; 873 bool is_last_ppdu; 874 875 if (skb_queue_empty(amsdu)) 876 return; 877 878 first = skb_peek(amsdu); 879 rxd = (void *)first->data - sizeof(*rxd); 880 881 is_first_ppdu = !!(rxd->attention.flags & 882 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU)); 883 is_last_ppdu = !!(rxd->attention.flags & 884 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU)); 885 886 if (is_first_ppdu) { 887 /* New PPDU starts so clear out the old per-PPDU status. */ 888 status->freq = 0; 889 status->rate_idx = 0; 890 status->nss = 0; 891 status->encoding = RX_ENC_LEGACY; 892 status->bw = RATE_INFO_BW_20; 893 894 status->flag &= ~RX_FLAG_MACTIME_END; 895 status->flag |= RX_FLAG_NO_SIGNAL_VAL; 896 897 status->flag &= ~(RX_FLAG_AMPDU_IS_LAST); 898 status->flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN; 899 status->ampdu_reference = ar->ampdu_reference; 900 901 ath10k_htt_rx_h_signal(ar, status, rxd); 902 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id); 903 ath10k_htt_rx_h_rates(ar, status, rxd); 904 } 905 906 if (is_last_ppdu) { 907 ath10k_htt_rx_h_mactime(ar, status, rxd); 908 909 /* set ampdu last segment flag */ 910 status->flag |= RX_FLAG_AMPDU_IS_LAST; 911 ar->ampdu_reference++; 912 } 913 } 914 915 static const char * const tid_to_ac[] = { 916 "BE", 917 "BK", 918 "BK", 919 "BE", 920 "VI", 921 "VI", 922 "VO", 923 "VO", 924 }; 925 926 static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size) 927 { 928 u8 *qc; 929 int tid; 930 931 if (!ieee80211_is_data_qos(hdr->frame_control)) 932 return ""; 933 934 qc = ieee80211_get_qos_ctl(hdr); 935 tid = *qc & IEEE80211_QOS_CTL_TID_MASK; 936 if (tid < 8) 937 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]); 938 else 939 snprintf(out, size, "tid %d", tid); 940 941 return out; 942 } 943 944 static void ath10k_process_rx(struct ath10k *ar, 945 struct ieee80211_rx_status *rx_status, 946 struct sk_buff *skb) 947 { 948 struct ieee80211_rx_status *status; 949 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 950 char tid[32]; 951 952 status = IEEE80211_SKB_RXCB(skb); 953 *status = *rx_status; 954 955 ath10k_dbg(ar, ATH10K_DBG_DATA, 956 "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n", 957 skb, 958 skb->len, 959 ieee80211_get_SA(hdr), 960 ath10k_get_tid(hdr, tid, sizeof(tid)), 961 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ? 962 "mcast" : "ucast", 963 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4, 964 (status->encoding == RX_ENC_LEGACY) ? "legacy" : "", 965 (status->encoding == RX_ENC_HT) ? "ht" : "", 966 (status->encoding == RX_ENC_VHT) ? "vht" : "", 967 (status->bw == RATE_INFO_BW_40) ? "40" : "", 968 (status->bw == RATE_INFO_BW_80) ? "80" : "", 969 (status->bw == RATE_INFO_BW_160) ? "160" : "", 970 status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "", 971 status->rate_idx, 972 status->nss, 973 status->freq, 974 status->band, status->flag, 975 !!(status->flag & RX_FLAG_FAILED_FCS_CRC), 976 !!(status->flag & RX_FLAG_MMIC_ERROR), 977 !!(status->flag & RX_FLAG_AMSDU_MORE)); 978 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ", 979 skb->data, skb->len); 980 trace_ath10k_rx_hdr(ar, skb->data, skb->len); 981 trace_ath10k_rx_payload(ar, skb->data, skb->len); 982 983 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi); 984 } 985 986 static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar, 987 struct ieee80211_hdr *hdr) 988 { 989 int len = ieee80211_hdrlen(hdr->frame_control); 990 991 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING, 992 ar->running_fw->fw_file.fw_features)) 993 len = round_up(len, 4); 994 995 return len; 996 } 997 998 static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar, 999 struct sk_buff *msdu, 1000 struct ieee80211_rx_status *status, 1001 enum htt_rx_mpdu_encrypt_type enctype, 1002 bool is_decrypted) 1003 { 1004 struct ieee80211_hdr *hdr; 1005 struct htt_rx_desc *rxd; 1006 size_t hdr_len; 1007 size_t crypto_len; 1008 bool is_first; 1009 bool is_last; 1010 1011 rxd = (void *)msdu->data - sizeof(*rxd); 1012 is_first = !!(rxd->msdu_end.common.info0 & 1013 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); 1014 is_last = !!(rxd->msdu_end.common.info0 & 1015 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); 1016 1017 /* Delivered decapped frame: 1018 * [802.11 header] 1019 * [crypto param] <-- can be trimmed if !fcs_err && 1020 * !decrypt_err && !peer_idx_invalid 1021 * [amsdu header] <-- only if A-MSDU 1022 * [rfc1042/llc] 1023 * [payload] 1024 * [FCS] <-- at end, needs to be trimmed 1025 */ 1026 1027 /* This probably shouldn't happen but warn just in case */ 1028 if (unlikely(WARN_ON_ONCE(!is_first))) 1029 return; 1030 1031 /* This probably shouldn't happen but warn just in case */ 1032 if (unlikely(WARN_ON_ONCE(!(is_first && is_last)))) 1033 return; 1034 1035 skb_trim(msdu, msdu->len - FCS_LEN); 1036 1037 /* In most cases this will be true for sniffed frames. It makes sense 1038 * to deliver them as-is without stripping the crypto param. This is 1039 * necessary for software based decryption. 1040 * 1041 * If there's no error then the frame is decrypted. At least that is 1042 * the case for frames that come in via fragmented rx indication. 1043 */ 1044 if (!is_decrypted) 1045 return; 1046 1047 /* The payload is decrypted so strip crypto params. Start from tail 1048 * since hdr is used to compute some stuff. 1049 */ 1050 1051 hdr = (void *)msdu->data; 1052 1053 /* Tail */ 1054 if (status->flag & RX_FLAG_IV_STRIPPED) 1055 skb_trim(msdu, msdu->len - 1056 ath10k_htt_rx_crypto_tail_len(ar, enctype)); 1057 1058 /* MMIC */ 1059 if ((status->flag & RX_FLAG_MMIC_STRIPPED) && 1060 !ieee80211_has_morefrags(hdr->frame_control) && 1061 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA) 1062 skb_trim(msdu, msdu->len - 8); 1063 1064 /* Head */ 1065 if (status->flag & RX_FLAG_IV_STRIPPED) { 1066 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1067 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1068 1069 memmove((void *)msdu->data + crypto_len, 1070 (void *)msdu->data, hdr_len); 1071 skb_pull(msdu, crypto_len); 1072 } 1073 } 1074 1075 static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar, 1076 struct sk_buff *msdu, 1077 struct ieee80211_rx_status *status, 1078 const u8 first_hdr[64]) 1079 { 1080 struct ieee80211_hdr *hdr; 1081 struct htt_rx_desc *rxd; 1082 size_t hdr_len; 1083 u8 da[ETH_ALEN]; 1084 u8 sa[ETH_ALEN]; 1085 int l3_pad_bytes; 1086 1087 /* Delivered decapped frame: 1088 * [nwifi 802.11 header] <-- replaced with 802.11 hdr 1089 * [rfc1042/llc] 1090 * 1091 * Note: The nwifi header doesn't have QoS Control and is 1092 * (always?) a 3addr frame. 1093 * 1094 * Note2: There's no A-MSDU subframe header. Even if it's part 1095 * of an A-MSDU. 1096 */ 1097 1098 /* pull decapped header and copy SA & DA */ 1099 rxd = (void *)msdu->data - sizeof(*rxd); 1100 1101 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1102 skb_put(msdu, l3_pad_bytes); 1103 1104 hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes); 1105 1106 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr); 1107 ether_addr_copy(da, ieee80211_get_DA(hdr)); 1108 ether_addr_copy(sa, ieee80211_get_SA(hdr)); 1109 skb_pull(msdu, hdr_len); 1110 1111 /* push original 802.11 header */ 1112 hdr = (struct ieee80211_hdr *)first_hdr; 1113 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1114 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1115 1116 /* original 802.11 header has a different DA and in 1117 * case of 4addr it may also have different SA 1118 */ 1119 hdr = (struct ieee80211_hdr *)msdu->data; 1120 ether_addr_copy(ieee80211_get_DA(hdr), da); 1121 ether_addr_copy(ieee80211_get_SA(hdr), sa); 1122 } 1123 1124 static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar, 1125 struct sk_buff *msdu, 1126 enum htt_rx_mpdu_encrypt_type enctype) 1127 { 1128 struct ieee80211_hdr *hdr; 1129 struct htt_rx_desc *rxd; 1130 size_t hdr_len, crypto_len; 1131 void *rfc1042; 1132 bool is_first, is_last, is_amsdu; 1133 int bytes_aligned = ar->hw_params.decap_align_bytes; 1134 1135 rxd = (void *)msdu->data - sizeof(*rxd); 1136 hdr = (void *)rxd->rx_hdr_status; 1137 1138 is_first = !!(rxd->msdu_end.common.info0 & 1139 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); 1140 is_last = !!(rxd->msdu_end.common.info0 & 1141 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); 1142 is_amsdu = !(is_first && is_last); 1143 1144 rfc1042 = hdr; 1145 1146 if (is_first) { 1147 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1148 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1149 1150 rfc1042 += round_up(hdr_len, bytes_aligned) + 1151 round_up(crypto_len, bytes_aligned); 1152 } 1153 1154 if (is_amsdu) 1155 rfc1042 += sizeof(struct amsdu_subframe_hdr); 1156 1157 return rfc1042; 1158 } 1159 1160 static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar, 1161 struct sk_buff *msdu, 1162 struct ieee80211_rx_status *status, 1163 const u8 first_hdr[64], 1164 enum htt_rx_mpdu_encrypt_type enctype) 1165 { 1166 struct ieee80211_hdr *hdr; 1167 struct ethhdr *eth; 1168 size_t hdr_len; 1169 void *rfc1042; 1170 u8 da[ETH_ALEN]; 1171 u8 sa[ETH_ALEN]; 1172 int l3_pad_bytes; 1173 struct htt_rx_desc *rxd; 1174 1175 /* Delivered decapped frame: 1176 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc 1177 * [payload] 1178 */ 1179 1180 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype); 1181 if (WARN_ON_ONCE(!rfc1042)) 1182 return; 1183 1184 rxd = (void *)msdu->data - sizeof(*rxd); 1185 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1186 skb_put(msdu, l3_pad_bytes); 1187 skb_pull(msdu, l3_pad_bytes); 1188 1189 /* pull decapped header and copy SA & DA */ 1190 eth = (struct ethhdr *)msdu->data; 1191 ether_addr_copy(da, eth->h_dest); 1192 ether_addr_copy(sa, eth->h_source); 1193 skb_pull(msdu, sizeof(struct ethhdr)); 1194 1195 /* push rfc1042/llc/snap */ 1196 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042, 1197 sizeof(struct rfc1042_hdr)); 1198 1199 /* push original 802.11 header */ 1200 hdr = (struct ieee80211_hdr *)first_hdr; 1201 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1202 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1203 1204 /* original 802.11 header has a different DA and in 1205 * case of 4addr it may also have different SA 1206 */ 1207 hdr = (struct ieee80211_hdr *)msdu->data; 1208 ether_addr_copy(ieee80211_get_DA(hdr), da); 1209 ether_addr_copy(ieee80211_get_SA(hdr), sa); 1210 } 1211 1212 static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar, 1213 struct sk_buff *msdu, 1214 struct ieee80211_rx_status *status, 1215 const u8 first_hdr[64]) 1216 { 1217 struct ieee80211_hdr *hdr; 1218 size_t hdr_len; 1219 int l3_pad_bytes; 1220 struct htt_rx_desc *rxd; 1221 1222 /* Delivered decapped frame: 1223 * [amsdu header] <-- replaced with 802.11 hdr 1224 * [rfc1042/llc] 1225 * [payload] 1226 */ 1227 1228 rxd = (void *)msdu->data - sizeof(*rxd); 1229 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1230 1231 skb_put(msdu, l3_pad_bytes); 1232 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes); 1233 1234 hdr = (struct ieee80211_hdr *)first_hdr; 1235 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1236 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1237 } 1238 1239 static void ath10k_htt_rx_h_undecap(struct ath10k *ar, 1240 struct sk_buff *msdu, 1241 struct ieee80211_rx_status *status, 1242 u8 first_hdr[64], 1243 enum htt_rx_mpdu_encrypt_type enctype, 1244 bool is_decrypted) 1245 { 1246 struct htt_rx_desc *rxd; 1247 enum rx_msdu_decap_format decap; 1248 1249 /* First msdu's decapped header: 1250 * [802.11 header] <-- padded to 4 bytes long 1251 * [crypto param] <-- padded to 4 bytes long 1252 * [amsdu header] <-- only if A-MSDU 1253 * [rfc1042/llc] 1254 * 1255 * Other (2nd, 3rd, ..) msdu's decapped header: 1256 * [amsdu header] <-- only if A-MSDU 1257 * [rfc1042/llc] 1258 */ 1259 1260 rxd = (void *)msdu->data - sizeof(*rxd); 1261 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1), 1262 RX_MSDU_START_INFO1_DECAP_FORMAT); 1263 1264 switch (decap) { 1265 case RX_MSDU_DECAP_RAW: 1266 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype, 1267 is_decrypted); 1268 break; 1269 case RX_MSDU_DECAP_NATIVE_WIFI: 1270 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr); 1271 break; 1272 case RX_MSDU_DECAP_ETHERNET2_DIX: 1273 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype); 1274 break; 1275 case RX_MSDU_DECAP_8023_SNAP_LLC: 1276 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr); 1277 break; 1278 } 1279 } 1280 1281 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb) 1282 { 1283 struct htt_rx_desc *rxd; 1284 u32 flags, info; 1285 bool is_ip4, is_ip6; 1286 bool is_tcp, is_udp; 1287 bool ip_csum_ok, tcpudp_csum_ok; 1288 1289 rxd = (void *)skb->data - sizeof(*rxd); 1290 flags = __le32_to_cpu(rxd->attention.flags); 1291 info = __le32_to_cpu(rxd->msdu_start.common.info1); 1292 1293 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO); 1294 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO); 1295 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO); 1296 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO); 1297 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL); 1298 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL); 1299 1300 if (!is_ip4 && !is_ip6) 1301 return CHECKSUM_NONE; 1302 if (!is_tcp && !is_udp) 1303 return CHECKSUM_NONE; 1304 if (!ip_csum_ok) 1305 return CHECKSUM_NONE; 1306 if (!tcpudp_csum_ok) 1307 return CHECKSUM_NONE; 1308 1309 return CHECKSUM_UNNECESSARY; 1310 } 1311 1312 static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu) 1313 { 1314 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu); 1315 } 1316 1317 static void ath10k_htt_rx_h_mpdu(struct ath10k *ar, 1318 struct sk_buff_head *amsdu, 1319 struct ieee80211_rx_status *status) 1320 { 1321 struct sk_buff *first; 1322 struct sk_buff *last; 1323 struct sk_buff *msdu; 1324 struct htt_rx_desc *rxd; 1325 struct ieee80211_hdr *hdr; 1326 enum htt_rx_mpdu_encrypt_type enctype; 1327 u8 first_hdr[64]; 1328 u8 *qos; 1329 size_t hdr_len; 1330 bool has_fcs_err; 1331 bool has_crypto_err; 1332 bool has_tkip_err; 1333 bool has_peer_idx_invalid; 1334 bool is_decrypted; 1335 bool is_mgmt; 1336 u32 attention; 1337 1338 if (skb_queue_empty(amsdu)) 1339 return; 1340 1341 first = skb_peek(amsdu); 1342 rxd = (void *)first->data - sizeof(*rxd); 1343 1344 is_mgmt = !!(rxd->attention.flags & 1345 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE)); 1346 1347 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), 1348 RX_MPDU_START_INFO0_ENCRYPT_TYPE); 1349 1350 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11 1351 * decapped header. It'll be used for undecapping of each MSDU. 1352 */ 1353 hdr = (void *)rxd->rx_hdr_status; 1354 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1355 memcpy(first_hdr, hdr, hdr_len); 1356 1357 /* Each A-MSDU subframe will use the original header as the base and be 1358 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl. 1359 */ 1360 hdr = (void *)first_hdr; 1361 qos = ieee80211_get_qos_ctl(hdr); 1362 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT; 1363 1364 /* Some attention flags are valid only in the last MSDU. */ 1365 last = skb_peek_tail(amsdu); 1366 rxd = (void *)last->data - sizeof(*rxd); 1367 attention = __le32_to_cpu(rxd->attention.flags); 1368 1369 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR); 1370 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR); 1371 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR); 1372 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID); 1373 1374 /* Note: If hardware captures an encrypted frame that it can't decrypt, 1375 * e.g. due to fcs error, missing peer or invalid key data it will 1376 * report the frame as raw. 1377 */ 1378 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE && 1379 !has_fcs_err && 1380 !has_crypto_err && 1381 !has_peer_idx_invalid); 1382 1383 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */ 1384 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC | 1385 RX_FLAG_MMIC_ERROR | 1386 RX_FLAG_DECRYPTED | 1387 RX_FLAG_IV_STRIPPED | 1388 RX_FLAG_ONLY_MONITOR | 1389 RX_FLAG_MMIC_STRIPPED); 1390 1391 if (has_fcs_err) 1392 status->flag |= RX_FLAG_FAILED_FCS_CRC; 1393 1394 if (has_tkip_err) 1395 status->flag |= RX_FLAG_MMIC_ERROR; 1396 1397 /* Firmware reports all necessary management frames via WMI already. 1398 * They are not reported to monitor interfaces at all so pass the ones 1399 * coming via HTT to monitor interfaces instead. This simplifies 1400 * matters a lot. 1401 */ 1402 if (is_mgmt) 1403 status->flag |= RX_FLAG_ONLY_MONITOR; 1404 1405 if (is_decrypted) { 1406 status->flag |= RX_FLAG_DECRYPTED; 1407 1408 if (likely(!is_mgmt)) 1409 status->flag |= RX_FLAG_IV_STRIPPED | 1410 RX_FLAG_MMIC_STRIPPED; 1411 } 1412 1413 skb_queue_walk(amsdu, msdu) { 1414 ath10k_htt_rx_h_csum_offload(msdu); 1415 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype, 1416 is_decrypted); 1417 1418 /* Undecapping involves copying the original 802.11 header back 1419 * to sk_buff. If frame is protected and hardware has decrypted 1420 * it then remove the protected bit. 1421 */ 1422 if (!is_decrypted) 1423 continue; 1424 if (is_mgmt) 1425 continue; 1426 1427 hdr = (void *)msdu->data; 1428 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 1429 } 1430 } 1431 1432 static void ath10k_htt_rx_h_deliver(struct ath10k *ar, 1433 struct sk_buff_head *amsdu, 1434 struct ieee80211_rx_status *status) 1435 { 1436 struct sk_buff *msdu; 1437 1438 while ((msdu = __skb_dequeue(amsdu))) { 1439 /* Setup per-MSDU flags */ 1440 if (skb_queue_empty(amsdu)) 1441 status->flag &= ~RX_FLAG_AMSDU_MORE; 1442 else 1443 status->flag |= RX_FLAG_AMSDU_MORE; 1444 1445 ath10k_process_rx(ar, status, msdu); 1446 } 1447 } 1448 1449 static int ath10k_unchain_msdu(struct sk_buff_head *amsdu) 1450 { 1451 struct sk_buff *skb, *first; 1452 int space; 1453 int total_len = 0; 1454 1455 /* TODO: Might could optimize this by using 1456 * skb_try_coalesce or similar method to 1457 * decrease copying, or maybe get mac80211 to 1458 * provide a way to just receive a list of 1459 * skb? 1460 */ 1461 1462 first = __skb_dequeue(amsdu); 1463 1464 /* Allocate total length all at once. */ 1465 skb_queue_walk(amsdu, skb) 1466 total_len += skb->len; 1467 1468 space = total_len - skb_tailroom(first); 1469 if ((space > 0) && 1470 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) { 1471 /* TODO: bump some rx-oom error stat */ 1472 /* put it back together so we can free the 1473 * whole list at once. 1474 */ 1475 __skb_queue_head(amsdu, first); 1476 return -1; 1477 } 1478 1479 /* Walk list again, copying contents into 1480 * msdu_head 1481 */ 1482 while ((skb = __skb_dequeue(amsdu))) { 1483 skb_copy_from_linear_data(skb, skb_put(first, skb->len), 1484 skb->len); 1485 dev_kfree_skb_any(skb); 1486 } 1487 1488 __skb_queue_head(amsdu, first); 1489 return 0; 1490 } 1491 1492 static void ath10k_htt_rx_h_unchain(struct ath10k *ar, 1493 struct sk_buff_head *amsdu) 1494 { 1495 struct sk_buff *first; 1496 struct htt_rx_desc *rxd; 1497 enum rx_msdu_decap_format decap; 1498 1499 first = skb_peek(amsdu); 1500 rxd = (void *)first->data - sizeof(*rxd); 1501 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1), 1502 RX_MSDU_START_INFO1_DECAP_FORMAT); 1503 1504 /* FIXME: Current unchaining logic can only handle simple case of raw 1505 * msdu chaining. If decapping is other than raw the chaining may be 1506 * more complex and this isn't handled by the current code. Don't even 1507 * try re-constructing such frames - it'll be pretty much garbage. 1508 */ 1509 if (decap != RX_MSDU_DECAP_RAW || 1510 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) { 1511 __skb_queue_purge(amsdu); 1512 return; 1513 } 1514 1515 ath10k_unchain_msdu(amsdu); 1516 } 1517 1518 static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar, 1519 struct sk_buff_head *amsdu, 1520 struct ieee80211_rx_status *rx_status) 1521 { 1522 /* FIXME: It might be a good idea to do some fuzzy-testing to drop 1523 * invalid/dangerous frames. 1524 */ 1525 1526 if (!rx_status->freq) { 1527 ath10k_dbg(ar, ATH10K_DBG_HTT, "no channel configured; ignoring frame(s)!\n"); 1528 return false; 1529 } 1530 1531 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) { 1532 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n"); 1533 return false; 1534 } 1535 1536 return true; 1537 } 1538 1539 static void ath10k_htt_rx_h_filter(struct ath10k *ar, 1540 struct sk_buff_head *amsdu, 1541 struct ieee80211_rx_status *rx_status) 1542 { 1543 if (skb_queue_empty(amsdu)) 1544 return; 1545 1546 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status)) 1547 return; 1548 1549 __skb_queue_purge(amsdu); 1550 } 1551 1552 static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt) 1553 { 1554 struct ath10k *ar = htt->ar; 1555 struct ieee80211_rx_status *rx_status = &htt->rx_status; 1556 struct sk_buff_head amsdu; 1557 int ret, num_msdus; 1558 1559 __skb_queue_head_init(&amsdu); 1560 1561 spin_lock_bh(&htt->rx_ring.lock); 1562 if (htt->rx_confused) { 1563 spin_unlock_bh(&htt->rx_ring.lock); 1564 return -EIO; 1565 } 1566 ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu); 1567 spin_unlock_bh(&htt->rx_ring.lock); 1568 1569 if (ret < 0) { 1570 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret); 1571 __skb_queue_purge(&amsdu); 1572 /* FIXME: It's probably a good idea to reboot the 1573 * device instead of leaving it inoperable. 1574 */ 1575 htt->rx_confused = true; 1576 return ret; 1577 } 1578 1579 num_msdus = skb_queue_len(&amsdu); 1580 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff); 1581 1582 /* only for ret = 1 indicates chained msdus */ 1583 if (ret > 0) 1584 ath10k_htt_rx_h_unchain(ar, &amsdu); 1585 1586 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status); 1587 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status); 1588 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status); 1589 1590 return num_msdus; 1591 } 1592 1593 static void ath10k_htt_rx_proc_rx_ind(struct ath10k_htt *htt, 1594 struct htt_rx_indication *rx) 1595 { 1596 struct ath10k *ar = htt->ar; 1597 struct htt_rx_indication_mpdu_range *mpdu_ranges; 1598 int num_mpdu_ranges; 1599 int i, mpdu_count = 0; 1600 1601 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1), 1602 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); 1603 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx); 1604 1605 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ", 1606 rx, sizeof(*rx) + 1607 (sizeof(struct htt_rx_indication_mpdu_range) * 1608 num_mpdu_ranges)); 1609 1610 for (i = 0; i < num_mpdu_ranges; i++) 1611 mpdu_count += mpdu_ranges[i].mpdu_count; 1612 1613 atomic_add(mpdu_count, &htt->num_mpdus_ready); 1614 } 1615 1616 static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar, 1617 struct sk_buff *skb) 1618 { 1619 struct ath10k_htt *htt = &ar->htt; 1620 struct htt_resp *resp = (struct htt_resp *)skb->data; 1621 struct htt_tx_done tx_done = {}; 1622 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS); 1623 __le16 msdu_id; 1624 int i; 1625 1626 switch (status) { 1627 case HTT_DATA_TX_STATUS_NO_ACK: 1628 tx_done.status = HTT_TX_COMPL_STATE_NOACK; 1629 break; 1630 case HTT_DATA_TX_STATUS_OK: 1631 tx_done.status = HTT_TX_COMPL_STATE_ACK; 1632 break; 1633 case HTT_DATA_TX_STATUS_DISCARD: 1634 case HTT_DATA_TX_STATUS_POSTPONE: 1635 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL: 1636 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 1637 break; 1638 default: 1639 ath10k_warn(ar, "unhandled tx completion status %d\n", status); 1640 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 1641 break; 1642 } 1643 1644 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n", 1645 resp->data_tx_completion.num_msdus); 1646 1647 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) { 1648 msdu_id = resp->data_tx_completion.msdus[i]; 1649 tx_done.msdu_id = __le16_to_cpu(msdu_id); 1650 1651 /* kfifo_put: In practice firmware shouldn't fire off per-CE 1652 * interrupt and main interrupt (MSI/-X range case) for the same 1653 * HTC service so it should be safe to use kfifo_put w/o lock. 1654 * 1655 * From kfifo_put() documentation: 1656 * Note that with only one concurrent reader and one concurrent 1657 * writer, you don't need extra locking to use these macro. 1658 */ 1659 if (!kfifo_put(&htt->txdone_fifo, tx_done)) { 1660 ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n", 1661 tx_done.msdu_id, tx_done.status); 1662 ath10k_txrx_tx_unref(htt, &tx_done); 1663 } 1664 } 1665 } 1666 1667 static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp) 1668 { 1669 struct htt_rx_addba *ev = &resp->rx_addba; 1670 struct ath10k_peer *peer; 1671 struct ath10k_vif *arvif; 1672 u16 info0, tid, peer_id; 1673 1674 info0 = __le16_to_cpu(ev->info0); 1675 tid = MS(info0, HTT_RX_BA_INFO0_TID); 1676 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 1677 1678 ath10k_dbg(ar, ATH10K_DBG_HTT, 1679 "htt rx addba tid %hu peer_id %hu size %hhu\n", 1680 tid, peer_id, ev->window_size); 1681 1682 spin_lock_bh(&ar->data_lock); 1683 peer = ath10k_peer_find_by_id(ar, peer_id); 1684 if (!peer) { 1685 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", 1686 peer_id); 1687 spin_unlock_bh(&ar->data_lock); 1688 return; 1689 } 1690 1691 arvif = ath10k_get_arvif(ar, peer->vdev_id); 1692 if (!arvif) { 1693 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 1694 peer->vdev_id); 1695 spin_unlock_bh(&ar->data_lock); 1696 return; 1697 } 1698 1699 ath10k_dbg(ar, ATH10K_DBG_HTT, 1700 "htt rx start rx ba session sta %pM tid %hu size %hhu\n", 1701 peer->addr, tid, ev->window_size); 1702 1703 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid); 1704 spin_unlock_bh(&ar->data_lock); 1705 } 1706 1707 static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp) 1708 { 1709 struct htt_rx_delba *ev = &resp->rx_delba; 1710 struct ath10k_peer *peer; 1711 struct ath10k_vif *arvif; 1712 u16 info0, tid, peer_id; 1713 1714 info0 = __le16_to_cpu(ev->info0); 1715 tid = MS(info0, HTT_RX_BA_INFO0_TID); 1716 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 1717 1718 ath10k_dbg(ar, ATH10K_DBG_HTT, 1719 "htt rx delba tid %hu peer_id %hu\n", 1720 tid, peer_id); 1721 1722 spin_lock_bh(&ar->data_lock); 1723 peer = ath10k_peer_find_by_id(ar, peer_id); 1724 if (!peer) { 1725 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", 1726 peer_id); 1727 spin_unlock_bh(&ar->data_lock); 1728 return; 1729 } 1730 1731 arvif = ath10k_get_arvif(ar, peer->vdev_id); 1732 if (!arvif) { 1733 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 1734 peer->vdev_id); 1735 spin_unlock_bh(&ar->data_lock); 1736 return; 1737 } 1738 1739 ath10k_dbg(ar, ATH10K_DBG_HTT, 1740 "htt rx stop rx ba session sta %pM tid %hu\n", 1741 peer->addr, tid); 1742 1743 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid); 1744 spin_unlock_bh(&ar->data_lock); 1745 } 1746 1747 static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list, 1748 struct sk_buff_head *amsdu, 1749 int budget_left) 1750 { 1751 struct sk_buff *msdu; 1752 struct htt_rx_desc *rxd; 1753 1754 if (skb_queue_empty(list)) 1755 return -ENOBUFS; 1756 1757 if (WARN_ON(!skb_queue_empty(amsdu))) 1758 return -EINVAL; 1759 1760 while ((msdu = __skb_dequeue(list)) && budget_left) { 1761 __skb_queue_tail(amsdu, msdu); 1762 budget_left--; 1763 1764 rxd = (void *)msdu->data - sizeof(*rxd); 1765 if (rxd->msdu_end.common.info0 & 1766 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)) 1767 break; 1768 } 1769 1770 msdu = skb_peek_tail(amsdu); 1771 rxd = (void *)msdu->data - sizeof(*rxd); 1772 if (!(rxd->msdu_end.common.info0 & 1773 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) { 1774 skb_queue_splice_init(amsdu, list); 1775 return -EAGAIN; 1776 } 1777 1778 return 0; 1779 } 1780 1781 static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status, 1782 struct sk_buff *skb) 1783 { 1784 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1785 1786 if (!ieee80211_has_protected(hdr->frame_control)) 1787 return; 1788 1789 /* Offloaded frames are already decrypted but firmware insists they are 1790 * protected in the 802.11 header. Strip the flag. Otherwise mac80211 1791 * will drop the frame. 1792 */ 1793 1794 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 1795 status->flag |= RX_FLAG_DECRYPTED | 1796 RX_FLAG_IV_STRIPPED | 1797 RX_FLAG_MMIC_STRIPPED; 1798 } 1799 1800 static int ath10k_htt_rx_h_rx_offload(struct ath10k *ar, 1801 struct sk_buff_head *list) 1802 { 1803 struct ath10k_htt *htt = &ar->htt; 1804 struct ieee80211_rx_status *status = &htt->rx_status; 1805 struct htt_rx_offload_msdu *rx; 1806 struct sk_buff *msdu; 1807 size_t offset; 1808 int num_msdu = 0; 1809 1810 while ((msdu = __skb_dequeue(list))) { 1811 /* Offloaded frames don't have Rx descriptor. Instead they have 1812 * a short meta information header. 1813 */ 1814 1815 rx = (void *)msdu->data; 1816 1817 skb_put(msdu, sizeof(*rx)); 1818 skb_pull(msdu, sizeof(*rx)); 1819 1820 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) { 1821 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n"); 1822 dev_kfree_skb_any(msdu); 1823 continue; 1824 } 1825 1826 skb_put(msdu, __le16_to_cpu(rx->msdu_len)); 1827 1828 /* Offloaded rx header length isn't multiple of 2 nor 4 so the 1829 * actual payload is unaligned. Align the frame. Otherwise 1830 * mac80211 complains. This shouldn't reduce performance much 1831 * because these offloaded frames are rare. 1832 */ 1833 offset = 4 - ((unsigned long)msdu->data & 3); 1834 skb_put(msdu, offset); 1835 memmove(msdu->data + offset, msdu->data, msdu->len); 1836 skb_pull(msdu, offset); 1837 1838 /* FIXME: The frame is NWifi. Re-construct QoS Control 1839 * if possible later. 1840 */ 1841 1842 memset(status, 0, sizeof(*status)); 1843 status->flag |= RX_FLAG_NO_SIGNAL_VAL; 1844 1845 ath10k_htt_rx_h_rx_offload_prot(status, msdu); 1846 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id); 1847 ath10k_process_rx(ar, status, msdu); 1848 num_msdu++; 1849 } 1850 return num_msdu; 1851 } 1852 1853 static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb, 1854 int budget_left) 1855 { 1856 struct ath10k_htt *htt = &ar->htt; 1857 struct htt_resp *resp = (void *)skb->data; 1858 struct ieee80211_rx_status *status = &htt->rx_status; 1859 struct sk_buff_head list; 1860 struct sk_buff_head amsdu; 1861 u16 peer_id; 1862 u16 msdu_count; 1863 u8 vdev_id; 1864 u8 tid; 1865 bool offload; 1866 bool frag; 1867 int ret, num_msdus = 0; 1868 1869 lockdep_assert_held(&htt->rx_ring.lock); 1870 1871 if (htt->rx_confused) 1872 return -EIO; 1873 1874 skb_pull(skb, sizeof(resp->hdr)); 1875 skb_pull(skb, sizeof(resp->rx_in_ord_ind)); 1876 1877 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id); 1878 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count); 1879 vdev_id = resp->rx_in_ord_ind.vdev_id; 1880 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID); 1881 offload = !!(resp->rx_in_ord_ind.info & 1882 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 1883 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK); 1884 1885 ath10k_dbg(ar, ATH10K_DBG_HTT, 1886 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n", 1887 vdev_id, peer_id, tid, offload, frag, msdu_count); 1888 1889 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) { 1890 ath10k_warn(ar, "dropping invalid in order rx indication\n"); 1891 return -EINVAL; 1892 } 1893 1894 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later 1895 * extracted and processed. 1896 */ 1897 __skb_queue_head_init(&list); 1898 ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list); 1899 if (ret < 0) { 1900 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret); 1901 htt->rx_confused = true; 1902 return -EIO; 1903 } 1904 1905 /* Offloaded frames are very different and need to be handled 1906 * separately. 1907 */ 1908 if (offload) 1909 num_msdus = ath10k_htt_rx_h_rx_offload(ar, &list); 1910 1911 while (!skb_queue_empty(&list) && budget_left) { 1912 __skb_queue_head_init(&amsdu); 1913 ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu, budget_left); 1914 switch (ret) { 1915 case 0: 1916 /* Note: The in-order indication may report interleaved 1917 * frames from different PPDUs meaning reported rx rate 1918 * to mac80211 isn't accurate/reliable. It's still 1919 * better to report something than nothing though. This 1920 * should still give an idea about rx rate to the user. 1921 */ 1922 num_msdus += skb_queue_len(&amsdu); 1923 budget_left -= skb_queue_len(&amsdu); 1924 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id); 1925 ath10k_htt_rx_h_filter(ar, &amsdu, status); 1926 ath10k_htt_rx_h_mpdu(ar, &amsdu, status); 1927 ath10k_htt_rx_h_deliver(ar, &amsdu, status); 1928 break; 1929 case -EAGAIN: 1930 /* fall through */ 1931 default: 1932 /* Should not happen. */ 1933 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret); 1934 htt->rx_confused = true; 1935 __skb_queue_purge(&list); 1936 return -EIO; 1937 } 1938 } 1939 return num_msdus; 1940 } 1941 1942 static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar, 1943 const __le32 *resp_ids, 1944 int num_resp_ids) 1945 { 1946 int i; 1947 u32 resp_id; 1948 1949 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n", 1950 num_resp_ids); 1951 1952 for (i = 0; i < num_resp_ids; i++) { 1953 resp_id = le32_to_cpu(resp_ids[i]); 1954 1955 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n", 1956 resp_id); 1957 1958 /* TODO: free resp_id */ 1959 } 1960 } 1961 1962 static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb) 1963 { 1964 struct ieee80211_hw *hw = ar->hw; 1965 struct ieee80211_txq *txq; 1966 struct htt_resp *resp = (struct htt_resp *)skb->data; 1967 struct htt_tx_fetch_record *record; 1968 size_t len; 1969 size_t max_num_bytes; 1970 size_t max_num_msdus; 1971 size_t num_bytes; 1972 size_t num_msdus; 1973 const __le32 *resp_ids; 1974 u16 num_records; 1975 u16 num_resp_ids; 1976 u16 peer_id; 1977 u8 tid; 1978 int ret; 1979 int i; 1980 1981 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n"); 1982 1983 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind); 1984 if (unlikely(skb->len < len)) { 1985 ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n"); 1986 return; 1987 } 1988 1989 num_records = le16_to_cpu(resp->tx_fetch_ind.num_records); 1990 num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids); 1991 1992 len += sizeof(resp->tx_fetch_ind.records[0]) * num_records; 1993 len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids; 1994 1995 if (unlikely(skb->len < len)) { 1996 ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n"); 1997 return; 1998 } 1999 2000 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n", 2001 num_records, num_resp_ids, 2002 le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num)); 2003 2004 if (!ar->htt.tx_q_state.enabled) { 2005 ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n"); 2006 return; 2007 } 2008 2009 if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) { 2010 ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n"); 2011 return; 2012 } 2013 2014 rcu_read_lock(); 2015 2016 for (i = 0; i < num_records; i++) { 2017 record = &resp->tx_fetch_ind.records[i]; 2018 peer_id = MS(le16_to_cpu(record->info), 2019 HTT_TX_FETCH_RECORD_INFO_PEER_ID); 2020 tid = MS(le16_to_cpu(record->info), 2021 HTT_TX_FETCH_RECORD_INFO_TID); 2022 max_num_msdus = le16_to_cpu(record->num_msdus); 2023 max_num_bytes = le32_to_cpu(record->num_bytes); 2024 2025 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n", 2026 i, peer_id, tid, max_num_msdus, max_num_bytes); 2027 2028 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) || 2029 unlikely(tid >= ar->htt.tx_q_state.num_tids)) { 2030 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n", 2031 peer_id, tid); 2032 continue; 2033 } 2034 2035 spin_lock_bh(&ar->data_lock); 2036 txq = ath10k_mac_txq_lookup(ar, peer_id, tid); 2037 spin_unlock_bh(&ar->data_lock); 2038 2039 /* It is okay to release the lock and use txq because RCU read 2040 * lock is held. 2041 */ 2042 2043 if (unlikely(!txq)) { 2044 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n", 2045 peer_id, tid); 2046 continue; 2047 } 2048 2049 num_msdus = 0; 2050 num_bytes = 0; 2051 2052 while (num_msdus < max_num_msdus && 2053 num_bytes < max_num_bytes) { 2054 ret = ath10k_mac_tx_push_txq(hw, txq); 2055 if (ret < 0) 2056 break; 2057 2058 num_msdus++; 2059 num_bytes += ret; 2060 } 2061 2062 record->num_msdus = cpu_to_le16(num_msdus); 2063 record->num_bytes = cpu_to_le32(num_bytes); 2064 2065 ath10k_htt_tx_txq_recalc(hw, txq); 2066 } 2067 2068 rcu_read_unlock(); 2069 2070 resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind); 2071 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids); 2072 2073 ret = ath10k_htt_tx_fetch_resp(ar, 2074 resp->tx_fetch_ind.token, 2075 resp->tx_fetch_ind.fetch_seq_num, 2076 resp->tx_fetch_ind.records, 2077 num_records); 2078 if (unlikely(ret)) { 2079 ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n", 2080 le32_to_cpu(resp->tx_fetch_ind.token), ret); 2081 /* FIXME: request fw restart */ 2082 } 2083 2084 ath10k_htt_tx_txq_sync(ar); 2085 } 2086 2087 static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar, 2088 struct sk_buff *skb) 2089 { 2090 const struct htt_resp *resp = (void *)skb->data; 2091 size_t len; 2092 int num_resp_ids; 2093 2094 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n"); 2095 2096 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm); 2097 if (unlikely(skb->len < len)) { 2098 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n"); 2099 return; 2100 } 2101 2102 num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids); 2103 len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids; 2104 2105 if (unlikely(skb->len < len)) { 2106 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n"); 2107 return; 2108 } 2109 2110 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, 2111 resp->tx_fetch_confirm.resp_ids, 2112 num_resp_ids); 2113 } 2114 2115 static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar, 2116 struct sk_buff *skb) 2117 { 2118 const struct htt_resp *resp = (void *)skb->data; 2119 const struct htt_tx_mode_switch_record *record; 2120 struct ieee80211_txq *txq; 2121 struct ath10k_txq *artxq; 2122 size_t len; 2123 size_t num_records; 2124 enum htt_tx_mode_switch_mode mode; 2125 bool enable; 2126 u16 info0; 2127 u16 info1; 2128 u16 threshold; 2129 u16 peer_id; 2130 u8 tid; 2131 int i; 2132 2133 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n"); 2134 2135 len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind); 2136 if (unlikely(skb->len < len)) { 2137 ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n"); 2138 return; 2139 } 2140 2141 info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0); 2142 info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1); 2143 2144 enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE); 2145 num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD); 2146 mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE); 2147 threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD); 2148 2149 ath10k_dbg(ar, ATH10K_DBG_HTT, 2150 "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n", 2151 info0, info1, enable, num_records, mode, threshold); 2152 2153 len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records; 2154 2155 if (unlikely(skb->len < len)) { 2156 ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n"); 2157 return; 2158 } 2159 2160 switch (mode) { 2161 case HTT_TX_MODE_SWITCH_PUSH: 2162 case HTT_TX_MODE_SWITCH_PUSH_PULL: 2163 break; 2164 default: 2165 ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n", 2166 mode); 2167 return; 2168 } 2169 2170 if (!enable) 2171 return; 2172 2173 ar->htt.tx_q_state.enabled = enable; 2174 ar->htt.tx_q_state.mode = mode; 2175 ar->htt.tx_q_state.num_push_allowed = threshold; 2176 2177 rcu_read_lock(); 2178 2179 for (i = 0; i < num_records; i++) { 2180 record = &resp->tx_mode_switch_ind.records[i]; 2181 info0 = le16_to_cpu(record->info0); 2182 peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID); 2183 tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID); 2184 2185 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) || 2186 unlikely(tid >= ar->htt.tx_q_state.num_tids)) { 2187 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n", 2188 peer_id, tid); 2189 continue; 2190 } 2191 2192 spin_lock_bh(&ar->data_lock); 2193 txq = ath10k_mac_txq_lookup(ar, peer_id, tid); 2194 spin_unlock_bh(&ar->data_lock); 2195 2196 /* It is okay to release the lock and use txq because RCU read 2197 * lock is held. 2198 */ 2199 2200 if (unlikely(!txq)) { 2201 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n", 2202 peer_id, tid); 2203 continue; 2204 } 2205 2206 spin_lock_bh(&ar->htt.tx_lock); 2207 artxq = (void *)txq->drv_priv; 2208 artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus); 2209 spin_unlock_bh(&ar->htt.tx_lock); 2210 } 2211 2212 rcu_read_unlock(); 2213 2214 ath10k_mac_tx_push_pending(ar); 2215 } 2216 2217 void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) 2218 { 2219 bool release; 2220 2221 release = ath10k_htt_t2h_msg_handler(ar, skb); 2222 2223 /* Free the indication buffer */ 2224 if (release) 2225 dev_kfree_skb_any(skb); 2226 } 2227 2228 static inline bool is_valid_legacy_rate(u8 rate) 2229 { 2230 static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12, 2231 18, 24, 36, 48, 54}; 2232 int i; 2233 2234 for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) { 2235 if (rate == legacy_rates[i]) 2236 return true; 2237 } 2238 2239 return false; 2240 } 2241 2242 static void 2243 ath10k_update_per_peer_tx_stats(struct ath10k *ar, 2244 struct ieee80211_sta *sta, 2245 struct ath10k_per_peer_tx_stats *peer_stats) 2246 { 2247 struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv; 2248 u8 rate = 0, sgi; 2249 struct rate_info txrate; 2250 2251 lockdep_assert_held(&ar->data_lock); 2252 2253 txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode); 2254 txrate.bw = ATH10K_HW_BW(peer_stats->flags); 2255 txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode); 2256 txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode); 2257 sgi = ATH10K_HW_GI(peer_stats->flags); 2258 2259 if (txrate.flags == WMI_RATE_PREAMBLE_VHT && txrate.mcs > 9) { 2260 ath10k_warn(ar, "Invalid VHT mcs %hhd peer stats", txrate.mcs); 2261 return; 2262 } 2263 2264 if (txrate.flags == WMI_RATE_PREAMBLE_HT && 2265 (txrate.mcs > 7 || txrate.nss < 1)) { 2266 ath10k_warn(ar, "Invalid HT mcs %hhd nss %hhd peer stats", 2267 txrate.mcs, txrate.nss); 2268 return; 2269 } 2270 2271 memset(&arsta->txrate, 0, sizeof(arsta->txrate)); 2272 2273 if (txrate.flags == WMI_RATE_PREAMBLE_CCK || 2274 txrate.flags == WMI_RATE_PREAMBLE_OFDM) { 2275 rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode); 2276 2277 if (!is_valid_legacy_rate(rate)) { 2278 ath10k_warn(ar, "Invalid legacy rate %hhd peer stats", 2279 rate); 2280 return; 2281 } 2282 2283 /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */ 2284 rate *= 10; 2285 if (rate == 60 && txrate.flags == WMI_RATE_PREAMBLE_CCK) 2286 rate = rate - 5; 2287 arsta->txrate.legacy = rate; 2288 } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) { 2289 arsta->txrate.flags = RATE_INFO_FLAGS_MCS; 2290 arsta->txrate.mcs = txrate.mcs + 8 * (txrate.nss - 1); 2291 } else { 2292 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS; 2293 arsta->txrate.mcs = txrate.mcs; 2294 } 2295 2296 if (sgi) 2297 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; 2298 2299 arsta->txrate.nss = txrate.nss; 2300 arsta->txrate.bw = txrate.bw + RATE_INFO_BW_20; 2301 } 2302 2303 static void ath10k_htt_fetch_peer_stats(struct ath10k *ar, 2304 struct sk_buff *skb) 2305 { 2306 struct htt_resp *resp = (struct htt_resp *)skb->data; 2307 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats; 2308 struct htt_per_peer_tx_stats_ind *tx_stats; 2309 struct ieee80211_sta *sta; 2310 struct ath10k_peer *peer; 2311 int peer_id, i; 2312 u8 ppdu_len, num_ppdu; 2313 2314 num_ppdu = resp->peer_tx_stats.num_ppdu; 2315 ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32); 2316 2317 if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) { 2318 ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len); 2319 return; 2320 } 2321 2322 tx_stats = (struct htt_per_peer_tx_stats_ind *) 2323 (resp->peer_tx_stats.payload); 2324 peer_id = __le16_to_cpu(tx_stats->peer_id); 2325 2326 rcu_read_lock(); 2327 spin_lock_bh(&ar->data_lock); 2328 peer = ath10k_peer_find_by_id(ar, peer_id); 2329 if (!peer) { 2330 ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n", 2331 peer_id); 2332 goto out; 2333 } 2334 2335 sta = peer->sta; 2336 for (i = 0; i < num_ppdu; i++) { 2337 tx_stats = (struct htt_per_peer_tx_stats_ind *) 2338 (resp->peer_tx_stats.payload + i * ppdu_len); 2339 2340 p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes); 2341 p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes); 2342 p_tx_stats->failed_bytes = 2343 __le32_to_cpu(tx_stats->failed_bytes); 2344 p_tx_stats->ratecode = tx_stats->ratecode; 2345 p_tx_stats->flags = tx_stats->flags; 2346 p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts); 2347 p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts); 2348 p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts); 2349 2350 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats); 2351 } 2352 2353 out: 2354 spin_unlock_bh(&ar->data_lock); 2355 rcu_read_unlock(); 2356 } 2357 2358 bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) 2359 { 2360 struct ath10k_htt *htt = &ar->htt; 2361 struct htt_resp *resp = (struct htt_resp *)skb->data; 2362 enum htt_t2h_msg_type type; 2363 2364 /* confirm alignment */ 2365 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 2366 ath10k_warn(ar, "unaligned htt message, expect trouble\n"); 2367 2368 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n", 2369 resp->hdr.msg_type); 2370 2371 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) { 2372 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X", 2373 resp->hdr.msg_type, ar->htt.t2h_msg_types_max); 2374 return true; 2375 } 2376 type = ar->htt.t2h_msg_types[resp->hdr.msg_type]; 2377 2378 switch (type) { 2379 case HTT_T2H_MSG_TYPE_VERSION_CONF: { 2380 htt->target_version_major = resp->ver_resp.major; 2381 htt->target_version_minor = resp->ver_resp.minor; 2382 complete(&htt->target_version_received); 2383 break; 2384 } 2385 case HTT_T2H_MSG_TYPE_RX_IND: 2386 ath10k_htt_rx_proc_rx_ind(htt, &resp->rx_ind); 2387 break; 2388 case HTT_T2H_MSG_TYPE_PEER_MAP: { 2389 struct htt_peer_map_event ev = { 2390 .vdev_id = resp->peer_map.vdev_id, 2391 .peer_id = __le16_to_cpu(resp->peer_map.peer_id), 2392 }; 2393 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr)); 2394 ath10k_peer_map_event(htt, &ev); 2395 break; 2396 } 2397 case HTT_T2H_MSG_TYPE_PEER_UNMAP: { 2398 struct htt_peer_unmap_event ev = { 2399 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id), 2400 }; 2401 ath10k_peer_unmap_event(htt, &ev); 2402 break; 2403 } 2404 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: { 2405 struct htt_tx_done tx_done = {}; 2406 int status = __le32_to_cpu(resp->mgmt_tx_completion.status); 2407 2408 tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id); 2409 2410 switch (status) { 2411 case HTT_MGMT_TX_STATUS_OK: 2412 tx_done.status = HTT_TX_COMPL_STATE_ACK; 2413 break; 2414 case HTT_MGMT_TX_STATUS_RETRY: 2415 tx_done.status = HTT_TX_COMPL_STATE_NOACK; 2416 break; 2417 case HTT_MGMT_TX_STATUS_DROP: 2418 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 2419 break; 2420 } 2421 2422 status = ath10k_txrx_tx_unref(htt, &tx_done); 2423 if (!status) { 2424 spin_lock_bh(&htt->tx_lock); 2425 ath10k_htt_tx_mgmt_dec_pending(htt); 2426 spin_unlock_bh(&htt->tx_lock); 2427 } 2428 break; 2429 } 2430 case HTT_T2H_MSG_TYPE_TX_COMPL_IND: 2431 ath10k_htt_rx_tx_compl_ind(htt->ar, skb); 2432 break; 2433 case HTT_T2H_MSG_TYPE_SEC_IND: { 2434 struct ath10k *ar = htt->ar; 2435 struct htt_security_indication *ev = &resp->security_indication; 2436 2437 ath10k_dbg(ar, ATH10K_DBG_HTT, 2438 "sec ind peer_id %d unicast %d type %d\n", 2439 __le16_to_cpu(ev->peer_id), 2440 !!(ev->flags & HTT_SECURITY_IS_UNICAST), 2441 MS(ev->flags, HTT_SECURITY_TYPE)); 2442 complete(&ar->install_key_done); 2443 break; 2444 } 2445 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: { 2446 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 2447 skb->data, skb->len); 2448 atomic_inc(&htt->num_mpdus_ready); 2449 break; 2450 } 2451 case HTT_T2H_MSG_TYPE_TEST: 2452 break; 2453 case HTT_T2H_MSG_TYPE_STATS_CONF: 2454 trace_ath10k_htt_stats(ar, skb->data, skb->len); 2455 break; 2456 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND: 2457 /* Firmware can return tx frames if it's unable to fully 2458 * process them and suspects host may be able to fix it. ath10k 2459 * sends all tx frames as already inspected so this shouldn't 2460 * happen unless fw has a bug. 2461 */ 2462 ath10k_warn(ar, "received an unexpected htt tx inspect event\n"); 2463 break; 2464 case HTT_T2H_MSG_TYPE_RX_ADDBA: 2465 ath10k_htt_rx_addba(ar, resp); 2466 break; 2467 case HTT_T2H_MSG_TYPE_RX_DELBA: 2468 ath10k_htt_rx_delba(ar, resp); 2469 break; 2470 case HTT_T2H_MSG_TYPE_PKTLOG: { 2471 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload, 2472 skb->len - 2473 offsetof(struct htt_resp, 2474 pktlog_msg.payload)); 2475 break; 2476 } 2477 case HTT_T2H_MSG_TYPE_RX_FLUSH: { 2478 /* Ignore this event because mac80211 takes care of Rx 2479 * aggregation reordering. 2480 */ 2481 break; 2482 } 2483 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: { 2484 __skb_queue_tail(&htt->rx_in_ord_compl_q, skb); 2485 return false; 2486 } 2487 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND: 2488 break; 2489 case HTT_T2H_MSG_TYPE_CHAN_CHANGE: { 2490 u32 phymode = __le32_to_cpu(resp->chan_change.phymode); 2491 u32 freq = __le32_to_cpu(resp->chan_change.freq); 2492 2493 ar->tgt_oper_chan = ieee80211_get_channel(ar->hw->wiphy, freq); 2494 ath10k_dbg(ar, ATH10K_DBG_HTT, 2495 "htt chan change freq %u phymode %s\n", 2496 freq, ath10k_wmi_phymode_str(phymode)); 2497 break; 2498 } 2499 case HTT_T2H_MSG_TYPE_AGGR_CONF: 2500 break; 2501 case HTT_T2H_MSG_TYPE_TX_FETCH_IND: { 2502 struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC); 2503 2504 if (!tx_fetch_ind) { 2505 ath10k_warn(ar, "failed to copy htt tx fetch ind\n"); 2506 break; 2507 } 2508 skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind); 2509 break; 2510 } 2511 case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM: 2512 ath10k_htt_rx_tx_fetch_confirm(ar, skb); 2513 break; 2514 case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND: 2515 ath10k_htt_rx_tx_mode_switch_ind(ar, skb); 2516 break; 2517 case HTT_T2H_MSG_TYPE_PEER_STATS: 2518 ath10k_htt_fetch_peer_stats(ar, skb); 2519 break; 2520 case HTT_T2H_MSG_TYPE_EN_STATS: 2521 default: 2522 ath10k_warn(ar, "htt event (%d) not handled\n", 2523 resp->hdr.msg_type); 2524 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 2525 skb->data, skb->len); 2526 break; 2527 } 2528 return true; 2529 } 2530 EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler); 2531 2532 void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar, 2533 struct sk_buff *skb) 2534 { 2535 trace_ath10k_htt_pktlog(ar, skb->data, skb->len); 2536 dev_kfree_skb_any(skb); 2537 } 2538 EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler); 2539 2540 int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget) 2541 { 2542 struct ath10k_htt *htt = &ar->htt; 2543 struct htt_tx_done tx_done = {}; 2544 struct sk_buff_head tx_ind_q; 2545 struct sk_buff *skb; 2546 unsigned long flags; 2547 int quota = 0, done, num_rx_msdus; 2548 bool resched_napi = false; 2549 2550 __skb_queue_head_init(&tx_ind_q); 2551 2552 /* Since in-ord-ind can deliver more than 1 A-MSDU in single event, 2553 * process it first to utilize full available quota. 2554 */ 2555 while (quota < budget) { 2556 if (skb_queue_empty(&htt->rx_in_ord_compl_q)) 2557 break; 2558 2559 skb = __skb_dequeue(&htt->rx_in_ord_compl_q); 2560 if (!skb) { 2561 resched_napi = true; 2562 goto exit; 2563 } 2564 2565 spin_lock_bh(&htt->rx_ring.lock); 2566 num_rx_msdus = ath10k_htt_rx_in_ord_ind(ar, skb, 2567 (budget - quota)); 2568 spin_unlock_bh(&htt->rx_ring.lock); 2569 if (num_rx_msdus < 0) { 2570 resched_napi = true; 2571 goto exit; 2572 } 2573 2574 dev_kfree_skb_any(skb); 2575 if (num_rx_msdus > 0) 2576 quota += num_rx_msdus; 2577 2578 if ((quota > ATH10K_NAPI_QUOTA_LIMIT) && 2579 !skb_queue_empty(&htt->rx_in_ord_compl_q)) { 2580 resched_napi = true; 2581 goto exit; 2582 } 2583 } 2584 2585 while (quota < budget) { 2586 /* no more data to receive */ 2587 if (!atomic_read(&htt->num_mpdus_ready)) 2588 break; 2589 2590 num_rx_msdus = ath10k_htt_rx_handle_amsdu(htt); 2591 if (num_rx_msdus < 0) { 2592 resched_napi = true; 2593 goto exit; 2594 } 2595 2596 quota += num_rx_msdus; 2597 atomic_dec(&htt->num_mpdus_ready); 2598 if ((quota > ATH10K_NAPI_QUOTA_LIMIT) && 2599 atomic_read(&htt->num_mpdus_ready)) { 2600 resched_napi = true; 2601 goto exit; 2602 } 2603 } 2604 2605 /* From NAPI documentation: 2606 * The napi poll() function may also process TX completions, in which 2607 * case if it processes the entire TX ring then it should count that 2608 * work as the rest of the budget. 2609 */ 2610 if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo)) 2611 quota = budget; 2612 2613 /* kfifo_get: called only within txrx_tasklet so it's neatly serialized. 2614 * From kfifo_get() documentation: 2615 * Note that with only one concurrent reader and one concurrent writer, 2616 * you don't need extra locking to use these macro. 2617 */ 2618 while (kfifo_get(&htt->txdone_fifo, &tx_done)) 2619 ath10k_txrx_tx_unref(htt, &tx_done); 2620 2621 ath10k_mac_tx_push_pending(ar); 2622 2623 spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags); 2624 skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q); 2625 spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags); 2626 2627 while ((skb = __skb_dequeue(&tx_ind_q))) { 2628 ath10k_htt_rx_tx_fetch_ind(ar, skb); 2629 dev_kfree_skb_any(skb); 2630 } 2631 2632 exit: 2633 ath10k_htt_rx_msdu_buff_replenish(htt); 2634 /* In case of rx failure or more data to read, report budget 2635 * to reschedule NAPI poll 2636 */ 2637 done = resched_napi ? budget : quota; 2638 2639 return done; 2640 } 2641 EXPORT_SYMBOL(ath10k_htt_txrx_compl_task); 2642