1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include "core.h" 19 #include "htc.h" 20 #include "htt.h" 21 #include "txrx.h" 22 #include "debug.h" 23 #include "trace.h" 24 #include "mac.h" 25 26 #include <linux/log2.h> 27 28 /* slightly larger than one large A-MPDU */ 29 #define HTT_RX_RING_SIZE_MIN 128 30 31 /* roughly 20 ms @ 1 Gbps of 1500B MSDUs */ 32 #define HTT_RX_RING_SIZE_MAX 2048 33 34 #define HTT_RX_AVG_FRM_BYTES 1000 35 36 /* ms, very conservative */ 37 #define HTT_RX_HOST_LATENCY_MAX_MS 20 38 39 /* ms, conservative */ 40 #define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10 41 42 /* when under memory pressure rx ring refill may fail and needs a retry */ 43 #define HTT_RX_RING_REFILL_RETRY_MS 50 44 45 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb); 46 static void ath10k_htt_txrx_compl_task(unsigned long ptr); 47 48 static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt) 49 { 50 int size; 51 52 /* 53 * It is expected that the host CPU will typically be able to 54 * service the rx indication from one A-MPDU before the rx 55 * indication from the subsequent A-MPDU happens, roughly 1-2 ms 56 * later. However, the rx ring should be sized very conservatively, 57 * to accomodate the worst reasonable delay before the host CPU 58 * services a rx indication interrupt. 59 * 60 * The rx ring need not be kept full of empty buffers. In theory, 61 * the htt host SW can dynamically track the low-water mark in the 62 * rx ring, and dynamically adjust the level to which the rx ring 63 * is filled with empty buffers, to dynamically meet the desired 64 * low-water mark. 65 * 66 * In contrast, it's difficult to resize the rx ring itself, once 67 * it's in use. Thus, the ring itself should be sized very 68 * conservatively, while the degree to which the ring is filled 69 * with empty buffers should be sized moderately conservatively. 70 */ 71 72 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */ 73 size = 74 htt->max_throughput_mbps + 75 1000 / 76 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS; 77 78 if (size < HTT_RX_RING_SIZE_MIN) 79 size = HTT_RX_RING_SIZE_MIN; 80 81 if (size > HTT_RX_RING_SIZE_MAX) 82 size = HTT_RX_RING_SIZE_MAX; 83 84 size = roundup_pow_of_two(size); 85 86 return size; 87 } 88 89 static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt) 90 { 91 int size; 92 93 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */ 94 size = 95 htt->max_throughput_mbps * 96 1000 / 97 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS; 98 99 /* 100 * Make sure the fill level is at least 1 less than the ring size. 101 * Leaving 1 element empty allows the SW to easily distinguish 102 * between a full ring vs. an empty ring. 103 */ 104 if (size >= htt->rx_ring.size) 105 size = htt->rx_ring.size - 1; 106 107 return size; 108 } 109 110 static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt) 111 { 112 struct sk_buff *skb; 113 struct ath10k_skb_cb *cb; 114 int i; 115 116 for (i = 0; i < htt->rx_ring.fill_cnt; i++) { 117 skb = htt->rx_ring.netbufs_ring[i]; 118 cb = ATH10K_SKB_CB(skb); 119 dma_unmap_single(htt->ar->dev, cb->paddr, 120 skb->len + skb_tailroom(skb), 121 DMA_FROM_DEVICE); 122 dev_kfree_skb_any(skb); 123 } 124 125 htt->rx_ring.fill_cnt = 0; 126 } 127 128 static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 129 { 130 struct htt_rx_desc *rx_desc; 131 struct sk_buff *skb; 132 dma_addr_t paddr; 133 int ret = 0, idx; 134 135 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr); 136 while (num > 0) { 137 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN); 138 if (!skb) { 139 ret = -ENOMEM; 140 goto fail; 141 } 142 143 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN)) 144 skb_pull(skb, 145 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) - 146 skb->data); 147 148 /* Clear rx_desc attention word before posting to Rx ring */ 149 rx_desc = (struct htt_rx_desc *)skb->data; 150 rx_desc->attention.flags = __cpu_to_le32(0); 151 152 paddr = dma_map_single(htt->ar->dev, skb->data, 153 skb->len + skb_tailroom(skb), 154 DMA_FROM_DEVICE); 155 156 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) { 157 dev_kfree_skb_any(skb); 158 ret = -ENOMEM; 159 goto fail; 160 } 161 162 ATH10K_SKB_CB(skb)->paddr = paddr; 163 htt->rx_ring.netbufs_ring[idx] = skb; 164 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr); 165 htt->rx_ring.fill_cnt++; 166 167 num--; 168 idx++; 169 idx &= htt->rx_ring.size_mask; 170 } 171 172 fail: 173 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx); 174 return ret; 175 } 176 177 static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 178 { 179 lockdep_assert_held(&htt->rx_ring.lock); 180 return __ath10k_htt_rx_ring_fill_n(htt, num); 181 } 182 183 static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt) 184 { 185 int ret, num_deficit, num_to_fill; 186 187 /* Refilling the whole RX ring buffer proves to be a bad idea. The 188 * reason is RX may take up significant amount of CPU cycles and starve 189 * other tasks, e.g. TX on an ethernet device while acting as a bridge 190 * with ath10k wlan interface. This ended up with very poor performance 191 * once CPU the host system was overwhelmed with RX on ath10k. 192 * 193 * By limiting the number of refills the replenishing occurs 194 * progressively. This in turns makes use of the fact tasklets are 195 * processed in FIFO order. This means actual RX processing can starve 196 * out refilling. If there's not enough buffers on RX ring FW will not 197 * report RX until it is refilled with enough buffers. This 198 * automatically balances load wrt to CPU power. 199 * 200 * This probably comes at a cost of lower maximum throughput but 201 * improves the avarage and stability. */ 202 spin_lock_bh(&htt->rx_ring.lock); 203 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt; 204 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit); 205 num_deficit -= num_to_fill; 206 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill); 207 if (ret == -ENOMEM) { 208 /* 209 * Failed to fill it to the desired level - 210 * we'll start a timer and try again next time. 211 * As long as enough buffers are left in the ring for 212 * another A-MPDU rx, no special recovery is needed. 213 */ 214 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + 215 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS)); 216 } else if (num_deficit > 0) { 217 tasklet_schedule(&htt->rx_replenish_task); 218 } 219 spin_unlock_bh(&htt->rx_ring.lock); 220 } 221 222 static void ath10k_htt_rx_ring_refill_retry(unsigned long arg) 223 { 224 struct ath10k_htt *htt = (struct ath10k_htt *)arg; 225 226 ath10k_htt_rx_msdu_buff_replenish(htt); 227 } 228 229 static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt) 230 { 231 struct sk_buff *skb; 232 int i; 233 234 for (i = 0; i < htt->rx_ring.size; i++) { 235 skb = htt->rx_ring.netbufs_ring[i]; 236 if (!skb) 237 continue; 238 239 dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr, 240 skb->len + skb_tailroom(skb), 241 DMA_FROM_DEVICE); 242 dev_kfree_skb_any(skb); 243 htt->rx_ring.netbufs_ring[i] = NULL; 244 } 245 } 246 247 void ath10k_htt_rx_free(struct ath10k_htt *htt) 248 { 249 del_timer_sync(&htt->rx_ring.refill_retry_timer); 250 tasklet_kill(&htt->rx_replenish_task); 251 tasklet_kill(&htt->txrx_compl_task); 252 253 skb_queue_purge(&htt->tx_compl_q); 254 skb_queue_purge(&htt->rx_compl_q); 255 256 ath10k_htt_rx_ring_clean_up(htt); 257 258 dma_free_coherent(htt->ar->dev, 259 (htt->rx_ring.size * 260 sizeof(htt->rx_ring.paddrs_ring)), 261 htt->rx_ring.paddrs_ring, 262 htt->rx_ring.base_paddr); 263 264 dma_free_coherent(htt->ar->dev, 265 sizeof(*htt->rx_ring.alloc_idx.vaddr), 266 htt->rx_ring.alloc_idx.vaddr, 267 htt->rx_ring.alloc_idx.paddr); 268 269 kfree(htt->rx_ring.netbufs_ring); 270 } 271 272 static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt) 273 { 274 struct ath10k *ar = htt->ar; 275 int idx; 276 struct sk_buff *msdu; 277 278 lockdep_assert_held(&htt->rx_ring.lock); 279 280 if (htt->rx_ring.fill_cnt == 0) { 281 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n"); 282 return NULL; 283 } 284 285 idx = htt->rx_ring.sw_rd_idx.msdu_payld; 286 msdu = htt->rx_ring.netbufs_ring[idx]; 287 htt->rx_ring.netbufs_ring[idx] = NULL; 288 289 idx++; 290 idx &= htt->rx_ring.size_mask; 291 htt->rx_ring.sw_rd_idx.msdu_payld = idx; 292 htt->rx_ring.fill_cnt--; 293 294 return msdu; 295 } 296 297 static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb) 298 { 299 struct sk_buff *next; 300 301 while (skb) { 302 next = skb->next; 303 dev_kfree_skb_any(skb); 304 skb = next; 305 } 306 } 307 308 /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */ 309 static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, 310 u8 **fw_desc, int *fw_desc_len, 311 struct sk_buff **head_msdu, 312 struct sk_buff **tail_msdu, 313 u32 *attention) 314 { 315 struct ath10k *ar = htt->ar; 316 int msdu_len, msdu_chaining = 0; 317 struct sk_buff *msdu, *next; 318 struct htt_rx_desc *rx_desc; 319 320 lockdep_assert_held(&htt->rx_ring.lock); 321 322 if (htt->rx_confused) { 323 ath10k_warn(ar, "htt is confused. refusing rx\n"); 324 return -1; 325 } 326 327 msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt); 328 while (msdu) { 329 int last_msdu, msdu_len_invalid, msdu_chained; 330 331 dma_unmap_single(htt->ar->dev, 332 ATH10K_SKB_CB(msdu)->paddr, 333 msdu->len + skb_tailroom(msdu), 334 DMA_FROM_DEVICE); 335 336 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ", 337 msdu->data, msdu->len + skb_tailroom(msdu)); 338 339 rx_desc = (struct htt_rx_desc *)msdu->data; 340 341 /* FIXME: we must report msdu payload since this is what caller 342 * expects now */ 343 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload)); 344 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload)); 345 346 /* 347 * Sanity check - confirm the HW is finished filling in the 348 * rx data. 349 * If the HW and SW are working correctly, then it's guaranteed 350 * that the HW's MAC DMA is done before this point in the SW. 351 * To prevent the case that we handle a stale Rx descriptor, 352 * just assert for now until we have a way to recover. 353 */ 354 if (!(__le32_to_cpu(rx_desc->attention.flags) 355 & RX_ATTENTION_FLAGS_MSDU_DONE)) { 356 ath10k_htt_rx_free_msdu_chain(*head_msdu); 357 *head_msdu = NULL; 358 msdu = NULL; 359 ath10k_err(ar, "htt rx stopped. cannot recover\n"); 360 htt->rx_confused = true; 361 break; 362 } 363 364 *attention |= __le32_to_cpu(rx_desc->attention.flags) & 365 (RX_ATTENTION_FLAGS_TKIP_MIC_ERR | 366 RX_ATTENTION_FLAGS_DECRYPT_ERR | 367 RX_ATTENTION_FLAGS_FCS_ERR | 368 RX_ATTENTION_FLAGS_MGMT_TYPE); 369 /* 370 * Copy the FW rx descriptor for this MSDU from the rx 371 * indication message into the MSDU's netbuf. HL uses the 372 * same rx indication message definition as LL, and simply 373 * appends new info (fields from the HW rx desc, and the 374 * MSDU payload itself). So, the offset into the rx 375 * indication message only has to account for the standard 376 * offset of the per-MSDU FW rx desc info within the 377 * message, and how many bytes of the per-MSDU FW rx desc 378 * info have already been consumed. (And the endianness of 379 * the host, since for a big-endian host, the rx ind 380 * message contents, including the per-MSDU rx desc bytes, 381 * were byteswapped during upload.) 382 */ 383 if (*fw_desc_len > 0) { 384 rx_desc->fw_desc.info0 = **fw_desc; 385 /* 386 * The target is expected to only provide the basic 387 * per-MSDU rx descriptors. Just to be sure, verify 388 * that the target has not attached extension data 389 * (e.g. LRO flow ID). 390 */ 391 392 /* or more, if there's extension data */ 393 (*fw_desc)++; 394 (*fw_desc_len)--; 395 } else { 396 /* 397 * When an oversized AMSDU happened, FW will lost 398 * some of MSDU status - in this case, the FW 399 * descriptors provided will be less than the 400 * actual MSDUs inside this MPDU. Mark the FW 401 * descriptors so that it will still deliver to 402 * upper stack, if no CRC error for this MPDU. 403 * 404 * FIX THIS - the FW descriptors are actually for 405 * MSDUs in the end of this A-MSDU instead of the 406 * beginning. 407 */ 408 rx_desc->fw_desc.info0 = 0; 409 } 410 411 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags) 412 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR | 413 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR)); 414 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0), 415 RX_MSDU_START_INFO0_MSDU_LENGTH); 416 msdu_chained = rx_desc->frag_info.ring2_more_count; 417 418 if (msdu_len_invalid) 419 msdu_len = 0; 420 421 skb_trim(msdu, 0); 422 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE)); 423 msdu_len -= msdu->len; 424 425 /* FIXME: Do chained buffers include htt_rx_desc or not? */ 426 while (msdu_chained--) { 427 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt); 428 429 dma_unmap_single(htt->ar->dev, 430 ATH10K_SKB_CB(next)->paddr, 431 next->len + skb_tailroom(next), 432 DMA_FROM_DEVICE); 433 434 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, 435 "htt rx chained: ", next->data, 436 next->len + skb_tailroom(next)); 437 438 skb_trim(next, 0); 439 skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE)); 440 msdu_len -= next->len; 441 442 msdu->next = next; 443 msdu = next; 444 msdu_chaining = 1; 445 } 446 447 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) & 448 RX_MSDU_END_INFO0_LAST_MSDU; 449 450 if (last_msdu) { 451 msdu->next = NULL; 452 break; 453 } 454 455 next = ath10k_htt_rx_netbuf_pop(htt); 456 msdu->next = next; 457 msdu = next; 458 } 459 *tail_msdu = msdu; 460 461 if (*head_msdu == NULL) 462 msdu_chaining = -1; 463 464 /* 465 * Don't refill the ring yet. 466 * 467 * First, the elements popped here are still in use - it is not 468 * safe to overwrite them until the matching call to 469 * mpdu_desc_list_next. Second, for efficiency it is preferable to 470 * refill the rx ring with 1 PPDU's worth of rx buffers (something 471 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers 472 * (something like 3 buffers). Consequently, we'll rely on the txrx 473 * SW to tell us when it is done pulling all the PPDU's rx buffers 474 * out of the rx ring, and then refill it just once. 475 */ 476 477 return msdu_chaining; 478 } 479 480 static void ath10k_htt_rx_replenish_task(unsigned long ptr) 481 { 482 struct ath10k_htt *htt = (struct ath10k_htt *)ptr; 483 484 ath10k_htt_rx_msdu_buff_replenish(htt); 485 } 486 487 int ath10k_htt_rx_alloc(struct ath10k_htt *htt) 488 { 489 struct ath10k *ar = htt->ar; 490 dma_addr_t paddr; 491 void *vaddr; 492 size_t size; 493 struct timer_list *timer = &htt->rx_ring.refill_retry_timer; 494 495 htt->rx_ring.size = ath10k_htt_rx_ring_size(htt); 496 if (!is_power_of_2(htt->rx_ring.size)) { 497 ath10k_warn(ar, "htt rx ring size is not power of 2\n"); 498 return -EINVAL; 499 } 500 501 htt->rx_ring.size_mask = htt->rx_ring.size - 1; 502 503 /* 504 * Set the initial value for the level to which the rx ring 505 * should be filled, based on the max throughput and the 506 * worst likely latency for the host to fill the rx ring 507 * with new buffers. In theory, this fill level can be 508 * dynamically adjusted from the initial value set here, to 509 * reflect the actual host latency rather than a 510 * conservative assumption about the host latency. 511 */ 512 htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt); 513 514 htt->rx_ring.netbufs_ring = 515 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *), 516 GFP_KERNEL); 517 if (!htt->rx_ring.netbufs_ring) 518 goto err_netbuf; 519 520 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring); 521 522 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA); 523 if (!vaddr) 524 goto err_dma_ring; 525 526 htt->rx_ring.paddrs_ring = vaddr; 527 htt->rx_ring.base_paddr = paddr; 528 529 vaddr = dma_alloc_coherent(htt->ar->dev, 530 sizeof(*htt->rx_ring.alloc_idx.vaddr), 531 &paddr, GFP_DMA); 532 if (!vaddr) 533 goto err_dma_idx; 534 535 htt->rx_ring.alloc_idx.vaddr = vaddr; 536 htt->rx_ring.alloc_idx.paddr = paddr; 537 htt->rx_ring.sw_rd_idx.msdu_payld = 0; 538 *htt->rx_ring.alloc_idx.vaddr = 0; 539 540 /* Initialize the Rx refill retry timer */ 541 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt); 542 543 spin_lock_init(&htt->rx_ring.lock); 544 545 htt->rx_ring.fill_cnt = 0; 546 if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level)) 547 goto err_fill_ring; 548 549 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task, 550 (unsigned long)htt); 551 552 skb_queue_head_init(&htt->tx_compl_q); 553 skb_queue_head_init(&htt->rx_compl_q); 554 555 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task, 556 (unsigned long)htt); 557 558 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n", 559 htt->rx_ring.size, htt->rx_ring.fill_level); 560 return 0; 561 562 err_fill_ring: 563 ath10k_htt_rx_ring_free(htt); 564 dma_free_coherent(htt->ar->dev, 565 sizeof(*htt->rx_ring.alloc_idx.vaddr), 566 htt->rx_ring.alloc_idx.vaddr, 567 htt->rx_ring.alloc_idx.paddr); 568 err_dma_idx: 569 dma_free_coherent(htt->ar->dev, 570 (htt->rx_ring.size * 571 sizeof(htt->rx_ring.paddrs_ring)), 572 htt->rx_ring.paddrs_ring, 573 htt->rx_ring.base_paddr); 574 err_dma_ring: 575 kfree(htt->rx_ring.netbufs_ring); 576 err_netbuf: 577 return -ENOMEM; 578 } 579 580 static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar, 581 enum htt_rx_mpdu_encrypt_type type) 582 { 583 switch (type) { 584 case HTT_RX_MPDU_ENCRYPT_WEP40: 585 case HTT_RX_MPDU_ENCRYPT_WEP104: 586 return 4; 587 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 588 case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */ 589 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 590 case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */ 591 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 592 return 8; 593 case HTT_RX_MPDU_ENCRYPT_NONE: 594 return 0; 595 } 596 597 ath10k_warn(ar, "unknown encryption type %d\n", type); 598 return 0; 599 } 600 601 static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar, 602 enum htt_rx_mpdu_encrypt_type type) 603 { 604 switch (type) { 605 case HTT_RX_MPDU_ENCRYPT_NONE: 606 case HTT_RX_MPDU_ENCRYPT_WEP40: 607 case HTT_RX_MPDU_ENCRYPT_WEP104: 608 case HTT_RX_MPDU_ENCRYPT_WEP128: 609 case HTT_RX_MPDU_ENCRYPT_WAPI: 610 return 0; 611 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 612 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 613 return 4; 614 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 615 return 8; 616 } 617 618 ath10k_warn(ar, "unknown encryption type %d\n", type); 619 return 0; 620 } 621 622 /* Applies for first msdu in chain, before altering it. */ 623 static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb) 624 { 625 struct htt_rx_desc *rxd; 626 enum rx_msdu_decap_format fmt; 627 628 rxd = (void *)skb->data - sizeof(*rxd); 629 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1), 630 RX_MSDU_START_INFO1_DECAP_FORMAT); 631 632 if (fmt == RX_MSDU_DECAP_RAW) 633 return (void *)skb->data; 634 635 return (void *)skb->data - RX_HTT_HDR_STATUS_LEN; 636 } 637 638 /* This function only applies for first msdu in an msdu chain */ 639 static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr) 640 { 641 u8 *qc; 642 643 if (ieee80211_is_data_qos(hdr->frame_control)) { 644 qc = ieee80211_get_qos_ctl(hdr); 645 if (qc[0] & 0x80) 646 return true; 647 } 648 return false; 649 } 650 651 struct rfc1042_hdr { 652 u8 llc_dsap; 653 u8 llc_ssap; 654 u8 llc_ctrl; 655 u8 snap_oui[3]; 656 __be16 snap_type; 657 } __packed; 658 659 struct amsdu_subframe_hdr { 660 u8 dst[ETH_ALEN]; 661 u8 src[ETH_ALEN]; 662 __be16 len; 663 } __packed; 664 665 static const u8 rx_legacy_rate_idx[] = { 666 3, /* 0x00 - 11Mbps */ 667 2, /* 0x01 - 5.5Mbps */ 668 1, /* 0x02 - 2Mbps */ 669 0, /* 0x03 - 1Mbps */ 670 3, /* 0x04 - 11Mbps */ 671 2, /* 0x05 - 5.5Mbps */ 672 1, /* 0x06 - 2Mbps */ 673 0, /* 0x07 - 1Mbps */ 674 10, /* 0x08 - 48Mbps */ 675 8, /* 0x09 - 24Mbps */ 676 6, /* 0x0A - 12Mbps */ 677 4, /* 0x0B - 6Mbps */ 678 11, /* 0x0C - 54Mbps */ 679 9, /* 0x0D - 36Mbps */ 680 7, /* 0x0E - 18Mbps */ 681 5, /* 0x0F - 9Mbps */ 682 }; 683 684 static void ath10k_htt_rx_h_rates(struct ath10k *ar, 685 enum ieee80211_band band, 686 u8 info0, u32 info1, u32 info2, 687 struct ieee80211_rx_status *status) 688 { 689 u8 cck, rate, rate_idx, bw, sgi, mcs, nss; 690 u8 preamble = 0; 691 692 /* Check if valid fields */ 693 if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID)) 694 return; 695 696 preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE); 697 698 switch (preamble) { 699 case HTT_RX_LEGACY: 700 cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK; 701 rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE); 702 rate_idx = 0; 703 704 if (rate < 0x08 || rate > 0x0F) 705 break; 706 707 switch (band) { 708 case IEEE80211_BAND_2GHZ: 709 if (cck) 710 rate &= ~BIT(3); 711 rate_idx = rx_legacy_rate_idx[rate]; 712 break; 713 case IEEE80211_BAND_5GHZ: 714 rate_idx = rx_legacy_rate_idx[rate]; 715 /* We are using same rate table registering 716 HW - ath10k_rates[]. In case of 5GHz skip 717 CCK rates, so -4 here */ 718 rate_idx -= 4; 719 break; 720 default: 721 break; 722 } 723 724 status->rate_idx = rate_idx; 725 break; 726 case HTT_RX_HT: 727 case HTT_RX_HT_WITH_TXBF: 728 /* HT-SIG - Table 20-11 in info1 and info2 */ 729 mcs = info1 & 0x1F; 730 nss = mcs >> 3; 731 bw = (info1 >> 7) & 1; 732 sgi = (info2 >> 7) & 1; 733 734 status->rate_idx = mcs; 735 status->flag |= RX_FLAG_HT; 736 if (sgi) 737 status->flag |= RX_FLAG_SHORT_GI; 738 if (bw) 739 status->flag |= RX_FLAG_40MHZ; 740 break; 741 case HTT_RX_VHT: 742 case HTT_RX_VHT_WITH_TXBF: 743 /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2 744 TODO check this */ 745 mcs = (info2 >> 4) & 0x0F; 746 nss = ((info1 >> 10) & 0x07) + 1; 747 bw = info1 & 3; 748 sgi = info2 & 1; 749 750 status->rate_idx = mcs; 751 status->vht_nss = nss; 752 753 if (sgi) 754 status->flag |= RX_FLAG_SHORT_GI; 755 756 switch (bw) { 757 /* 20MHZ */ 758 case 0: 759 break; 760 /* 40MHZ */ 761 case 1: 762 status->flag |= RX_FLAG_40MHZ; 763 break; 764 /* 80MHZ */ 765 case 2: 766 status->vht_flag |= RX_VHT_FLAG_80MHZ; 767 } 768 769 status->flag |= RX_FLAG_VHT; 770 break; 771 default: 772 break; 773 } 774 } 775 776 static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt, 777 struct ieee80211_rx_status *rx_status, 778 struct sk_buff *skb, 779 enum htt_rx_mpdu_encrypt_type enctype, 780 enum rx_msdu_decap_format fmt, 781 bool dot11frag) 782 { 783 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 784 785 rx_status->flag &= ~(RX_FLAG_DECRYPTED | 786 RX_FLAG_IV_STRIPPED | 787 RX_FLAG_MMIC_STRIPPED); 788 789 if (enctype == HTT_RX_MPDU_ENCRYPT_NONE) 790 return; 791 792 /* 793 * There's no explicit rx descriptor flag to indicate whether a given 794 * frame has been decrypted or not. We're forced to use the decap 795 * format as an implicit indication. However fragmentation rx is always 796 * raw and it probably never reports undecrypted raws. 797 * 798 * This makes sure sniffed frames are reported as-is without stripping 799 * the protected flag. 800 */ 801 if (fmt == RX_MSDU_DECAP_RAW && !dot11frag) 802 return; 803 804 rx_status->flag |= RX_FLAG_DECRYPTED | 805 RX_FLAG_IV_STRIPPED | 806 RX_FLAG_MMIC_STRIPPED; 807 hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) & 808 ~IEEE80211_FCTL_PROTECTED); 809 } 810 811 static bool ath10k_htt_rx_h_channel(struct ath10k *ar, 812 struct ieee80211_rx_status *status) 813 { 814 struct ieee80211_channel *ch; 815 816 spin_lock_bh(&ar->data_lock); 817 ch = ar->scan_channel; 818 if (!ch) 819 ch = ar->rx_channel; 820 spin_unlock_bh(&ar->data_lock); 821 822 if (!ch) 823 return false; 824 825 status->band = ch->band; 826 status->freq = ch->center_freq; 827 828 return true; 829 } 830 831 static const char * const tid_to_ac[] = { 832 "BE", 833 "BK", 834 "BK", 835 "BE", 836 "VI", 837 "VI", 838 "VO", 839 "VO", 840 }; 841 842 static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size) 843 { 844 u8 *qc; 845 int tid; 846 847 if (!ieee80211_is_data_qos(hdr->frame_control)) 848 return ""; 849 850 qc = ieee80211_get_qos_ctl(hdr); 851 tid = *qc & IEEE80211_QOS_CTL_TID_MASK; 852 if (tid < 8) 853 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]); 854 else 855 snprintf(out, size, "tid %d", tid); 856 857 return out; 858 } 859 860 static void ath10k_process_rx(struct ath10k *ar, 861 struct ieee80211_rx_status *rx_status, 862 struct sk_buff *skb) 863 { 864 struct ieee80211_rx_status *status; 865 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 866 char tid[32]; 867 868 status = IEEE80211_SKB_RXCB(skb); 869 *status = *rx_status; 870 871 ath10k_dbg(ar, ATH10K_DBG_DATA, 872 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n", 873 skb, 874 skb->len, 875 ieee80211_get_SA(hdr), 876 ath10k_get_tid(hdr, tid, sizeof(tid)), 877 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ? 878 "mcast" : "ucast", 879 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4, 880 status->flag == 0 ? "legacy" : "", 881 status->flag & RX_FLAG_HT ? "ht" : "", 882 status->flag & RX_FLAG_VHT ? "vht" : "", 883 status->flag & RX_FLAG_40MHZ ? "40" : "", 884 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "", 885 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "", 886 status->rate_idx, 887 status->vht_nss, 888 status->freq, 889 status->band, status->flag, 890 !!(status->flag & RX_FLAG_FAILED_FCS_CRC), 891 !!(status->flag & RX_FLAG_MMIC_ERROR), 892 !!(status->flag & RX_FLAG_AMSDU_MORE)); 893 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ", 894 skb->data, skb->len); 895 896 ieee80211_rx(ar->hw, skb); 897 } 898 899 static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr) 900 { 901 /* nwifi header is padded to 4 bytes. this fixes 4addr rx */ 902 return round_up(ieee80211_hdrlen(hdr->frame_control), 4); 903 } 904 905 static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt, 906 struct ieee80211_rx_status *rx_status, 907 struct sk_buff *skb_in) 908 { 909 struct ath10k *ar = htt->ar; 910 struct htt_rx_desc *rxd; 911 struct sk_buff *skb = skb_in; 912 struct sk_buff *first; 913 enum rx_msdu_decap_format fmt; 914 enum htt_rx_mpdu_encrypt_type enctype; 915 struct ieee80211_hdr *hdr; 916 u8 hdr_buf[64], da[ETH_ALEN], sa[ETH_ALEN], *qos; 917 unsigned int hdr_len; 918 919 rxd = (void *)skb->data - sizeof(*rxd); 920 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), 921 RX_MPDU_START_INFO0_ENCRYPT_TYPE); 922 923 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status; 924 hdr_len = ieee80211_hdrlen(hdr->frame_control); 925 memcpy(hdr_buf, hdr, hdr_len); 926 hdr = (struct ieee80211_hdr *)hdr_buf; 927 928 first = skb; 929 while (skb) { 930 void *decap_hdr; 931 int len; 932 933 rxd = (void *)skb->data - sizeof(*rxd); 934 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1), 935 RX_MSDU_START_INFO1_DECAP_FORMAT); 936 decap_hdr = (void *)rxd->rx_hdr_status; 937 938 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb); 939 940 /* First frame in an A-MSDU chain has more decapped data. */ 941 if (skb == first) { 942 len = round_up(ieee80211_hdrlen(hdr->frame_control), 4); 943 len += round_up(ath10k_htt_rx_crypto_param_len(ar, 944 enctype), 4); 945 decap_hdr += len; 946 } 947 948 switch (fmt) { 949 case RX_MSDU_DECAP_RAW: 950 /* remove trailing FCS */ 951 skb_trim(skb, skb->len - FCS_LEN); 952 break; 953 case RX_MSDU_DECAP_NATIVE_WIFI: 954 /* pull decapped header and copy SA & DA */ 955 hdr = (struct ieee80211_hdr *)skb->data; 956 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr); 957 ether_addr_copy(da, ieee80211_get_DA(hdr)); 958 ether_addr_copy(sa, ieee80211_get_SA(hdr)); 959 skb_pull(skb, hdr_len); 960 961 /* push original 802.11 header */ 962 hdr = (struct ieee80211_hdr *)hdr_buf; 963 hdr_len = ieee80211_hdrlen(hdr->frame_control); 964 memcpy(skb_push(skb, hdr_len), hdr, hdr_len); 965 966 /* original A-MSDU header has the bit set but we're 967 * not including A-MSDU subframe header */ 968 hdr = (struct ieee80211_hdr *)skb->data; 969 qos = ieee80211_get_qos_ctl(hdr); 970 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT; 971 972 /* original 802.11 header has a different DA and in 973 * case of 4addr it may also have different SA 974 */ 975 ether_addr_copy(ieee80211_get_DA(hdr), da); 976 ether_addr_copy(ieee80211_get_SA(hdr), sa); 977 break; 978 case RX_MSDU_DECAP_ETHERNET2_DIX: 979 /* strip ethernet header and insert decapped 802.11 980 * header, amsdu subframe header and rfc1042 header */ 981 982 len = 0; 983 len += sizeof(struct rfc1042_hdr); 984 len += sizeof(struct amsdu_subframe_hdr); 985 986 skb_pull(skb, sizeof(struct ethhdr)); 987 memcpy(skb_push(skb, len), decap_hdr, len); 988 memcpy(skb_push(skb, hdr_len), hdr, hdr_len); 989 break; 990 case RX_MSDU_DECAP_8023_SNAP_LLC: 991 /* insert decapped 802.11 header making a singly 992 * A-MSDU */ 993 memcpy(skb_push(skb, hdr_len), hdr, hdr_len); 994 break; 995 } 996 997 skb_in = skb; 998 ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype, fmt, 999 false); 1000 skb = skb->next; 1001 skb_in->next = NULL; 1002 1003 if (skb) 1004 rx_status->flag |= RX_FLAG_AMSDU_MORE; 1005 else 1006 rx_status->flag &= ~RX_FLAG_AMSDU_MORE; 1007 1008 ath10k_process_rx(htt->ar, rx_status, skb_in); 1009 } 1010 1011 /* FIXME: It might be nice to re-assemble the A-MSDU when there's a 1012 * monitor interface active for sniffing purposes. */ 1013 } 1014 1015 static void ath10k_htt_rx_msdu(struct ath10k_htt *htt, 1016 struct ieee80211_rx_status *rx_status, 1017 struct sk_buff *skb) 1018 { 1019 struct ath10k *ar = htt->ar; 1020 struct htt_rx_desc *rxd; 1021 struct ieee80211_hdr *hdr; 1022 enum rx_msdu_decap_format fmt; 1023 enum htt_rx_mpdu_encrypt_type enctype; 1024 int hdr_len; 1025 void *rfc1042; 1026 1027 /* This shouldn't happen. If it does than it may be a FW bug. */ 1028 if (skb->next) { 1029 ath10k_warn(ar, "htt rx received chained non A-MSDU frame\n"); 1030 ath10k_htt_rx_free_msdu_chain(skb->next); 1031 skb->next = NULL; 1032 } 1033 1034 rxd = (void *)skb->data - sizeof(*rxd); 1035 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1), 1036 RX_MSDU_START_INFO1_DECAP_FORMAT); 1037 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), 1038 RX_MPDU_START_INFO0_ENCRYPT_TYPE); 1039 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status; 1040 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1041 1042 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb); 1043 1044 switch (fmt) { 1045 case RX_MSDU_DECAP_RAW: 1046 /* remove trailing FCS */ 1047 skb_trim(skb, skb->len - FCS_LEN); 1048 break; 1049 case RX_MSDU_DECAP_NATIVE_WIFI: 1050 /* Pull decapped header */ 1051 hdr = (struct ieee80211_hdr *)skb->data; 1052 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr); 1053 skb_pull(skb, hdr_len); 1054 1055 /* Push original header */ 1056 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status; 1057 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1058 memcpy(skb_push(skb, hdr_len), hdr, hdr_len); 1059 break; 1060 case RX_MSDU_DECAP_ETHERNET2_DIX: 1061 /* strip ethernet header and insert decapped 802.11 header and 1062 * rfc1042 header */ 1063 1064 rfc1042 = hdr; 1065 rfc1042 += roundup(hdr_len, 4); 1066 rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(ar, 1067 enctype), 4); 1068 1069 skb_pull(skb, sizeof(struct ethhdr)); 1070 memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)), 1071 rfc1042, sizeof(struct rfc1042_hdr)); 1072 memcpy(skb_push(skb, hdr_len), hdr, hdr_len); 1073 break; 1074 case RX_MSDU_DECAP_8023_SNAP_LLC: 1075 /* remove A-MSDU subframe header and insert 1076 * decapped 802.11 header. rfc1042 header is already there */ 1077 1078 skb_pull(skb, sizeof(struct amsdu_subframe_hdr)); 1079 memcpy(skb_push(skb, hdr_len), hdr, hdr_len); 1080 break; 1081 } 1082 1083 ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype, fmt, false); 1084 1085 ath10k_process_rx(htt->ar, rx_status, skb); 1086 } 1087 1088 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb) 1089 { 1090 struct htt_rx_desc *rxd; 1091 u32 flags, info; 1092 bool is_ip4, is_ip6; 1093 bool is_tcp, is_udp; 1094 bool ip_csum_ok, tcpudp_csum_ok; 1095 1096 rxd = (void *)skb->data - sizeof(*rxd); 1097 flags = __le32_to_cpu(rxd->attention.flags); 1098 info = __le32_to_cpu(rxd->msdu_start.info1); 1099 1100 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO); 1101 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO); 1102 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO); 1103 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO); 1104 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL); 1105 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL); 1106 1107 if (!is_ip4 && !is_ip6) 1108 return CHECKSUM_NONE; 1109 if (!is_tcp && !is_udp) 1110 return CHECKSUM_NONE; 1111 if (!ip_csum_ok) 1112 return CHECKSUM_NONE; 1113 if (!tcpudp_csum_ok) 1114 return CHECKSUM_NONE; 1115 1116 return CHECKSUM_UNNECESSARY; 1117 } 1118 1119 static int ath10k_unchain_msdu(struct sk_buff *msdu_head) 1120 { 1121 struct sk_buff *next = msdu_head->next; 1122 struct sk_buff *to_free = next; 1123 int space; 1124 int total_len = 0; 1125 1126 /* TODO: Might could optimize this by using 1127 * skb_try_coalesce or similar method to 1128 * decrease copying, or maybe get mac80211 to 1129 * provide a way to just receive a list of 1130 * skb? 1131 */ 1132 1133 msdu_head->next = NULL; 1134 1135 /* Allocate total length all at once. */ 1136 while (next) { 1137 total_len += next->len; 1138 next = next->next; 1139 } 1140 1141 space = total_len - skb_tailroom(msdu_head); 1142 if ((space > 0) && 1143 (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) { 1144 /* TODO: bump some rx-oom error stat */ 1145 /* put it back together so we can free the 1146 * whole list at once. 1147 */ 1148 msdu_head->next = to_free; 1149 return -1; 1150 } 1151 1152 /* Walk list again, copying contents into 1153 * msdu_head 1154 */ 1155 next = to_free; 1156 while (next) { 1157 skb_copy_from_linear_data(next, skb_put(msdu_head, next->len), 1158 next->len); 1159 next = next->next; 1160 } 1161 1162 /* If here, we have consolidated skb. Free the 1163 * fragments and pass the main skb on up the 1164 * stack. 1165 */ 1166 ath10k_htt_rx_free_msdu_chain(to_free); 1167 return 0; 1168 } 1169 1170 static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt, 1171 struct sk_buff *head, 1172 enum htt_rx_mpdu_status status, 1173 bool channel_set, 1174 u32 attention) 1175 { 1176 struct ath10k *ar = htt->ar; 1177 1178 if (head->len == 0) { 1179 ath10k_dbg(ar, ATH10K_DBG_HTT, 1180 "htt rx dropping due to zero-len\n"); 1181 return false; 1182 } 1183 1184 if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) { 1185 ath10k_dbg(ar, ATH10K_DBG_HTT, 1186 "htt rx dropping due to decrypt-err\n"); 1187 return false; 1188 } 1189 1190 if (!channel_set) { 1191 ath10k_warn(ar, "no channel configured; ignoring frame!\n"); 1192 return false; 1193 } 1194 1195 /* Skip mgmt frames while we handle this in WMI */ 1196 if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL || 1197 attention & RX_ATTENTION_FLAGS_MGMT_TYPE) { 1198 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n"); 1199 return false; 1200 } 1201 1202 if (status != HTT_RX_IND_MPDU_STATUS_OK && 1203 status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR && 1204 status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER && 1205 !htt->ar->monitor_started) { 1206 ath10k_dbg(ar, ATH10K_DBG_HTT, 1207 "htt rx ignoring frame w/ status %d\n", 1208 status); 1209 return false; 1210 } 1211 1212 if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) { 1213 ath10k_dbg(ar, ATH10K_DBG_HTT, 1214 "htt rx CAC running\n"); 1215 return false; 1216 } 1217 1218 return true; 1219 } 1220 1221 static void ath10k_htt_rx_handler(struct ath10k_htt *htt, 1222 struct htt_rx_indication *rx) 1223 { 1224 struct ath10k *ar = htt->ar; 1225 struct ieee80211_rx_status *rx_status = &htt->rx_status; 1226 struct htt_rx_indication_mpdu_range *mpdu_ranges; 1227 struct htt_rx_desc *rxd; 1228 enum htt_rx_mpdu_status status; 1229 struct ieee80211_hdr *hdr; 1230 int num_mpdu_ranges; 1231 u32 attention; 1232 int fw_desc_len; 1233 u8 *fw_desc; 1234 bool channel_set; 1235 int i, j; 1236 int ret; 1237 1238 lockdep_assert_held(&htt->rx_ring.lock); 1239 1240 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes); 1241 fw_desc = (u8 *)&rx->fw_desc; 1242 1243 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1), 1244 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); 1245 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx); 1246 1247 /* Fill this once, while this is per-ppdu */ 1248 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) { 1249 memset(rx_status, 0, sizeof(*rx_status)); 1250 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR + 1251 rx->ppdu.combined_rssi; 1252 } 1253 1254 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) { 1255 /* TSF available only in 32-bit */ 1256 rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff; 1257 rx_status->flag |= RX_FLAG_MACTIME_END; 1258 } 1259 1260 channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status); 1261 1262 if (channel_set) { 1263 ath10k_htt_rx_h_rates(htt->ar, rx_status->band, 1264 rx->ppdu.info0, 1265 __le32_to_cpu(rx->ppdu.info1), 1266 __le32_to_cpu(rx->ppdu.info2), 1267 rx_status); 1268 } 1269 1270 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ", 1271 rx, sizeof(*rx) + 1272 (sizeof(struct htt_rx_indication_mpdu_range) * 1273 num_mpdu_ranges)); 1274 1275 for (i = 0; i < num_mpdu_ranges; i++) { 1276 status = mpdu_ranges[i].mpdu_range_status; 1277 1278 for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) { 1279 struct sk_buff *msdu_head, *msdu_tail; 1280 1281 attention = 0; 1282 msdu_head = NULL; 1283 msdu_tail = NULL; 1284 ret = ath10k_htt_rx_amsdu_pop(htt, 1285 &fw_desc, 1286 &fw_desc_len, 1287 &msdu_head, 1288 &msdu_tail, 1289 &attention); 1290 1291 if (ret < 0) { 1292 ath10k_warn(ar, "failed to pop amsdu from htt rx ring %d\n", 1293 ret); 1294 ath10k_htt_rx_free_msdu_chain(msdu_head); 1295 continue; 1296 } 1297 1298 rxd = container_of((void *)msdu_head->data, 1299 struct htt_rx_desc, 1300 msdu_payload); 1301 1302 if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head, 1303 status, 1304 channel_set, 1305 attention)) { 1306 ath10k_htt_rx_free_msdu_chain(msdu_head); 1307 continue; 1308 } 1309 1310 if (ret > 0 && 1311 ath10k_unchain_msdu(msdu_head) < 0) { 1312 ath10k_htt_rx_free_msdu_chain(msdu_head); 1313 continue; 1314 } 1315 1316 if (attention & RX_ATTENTION_FLAGS_FCS_ERR) 1317 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; 1318 else 1319 rx_status->flag &= ~RX_FLAG_FAILED_FCS_CRC; 1320 1321 if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR) 1322 rx_status->flag |= RX_FLAG_MMIC_ERROR; 1323 else 1324 rx_status->flag &= ~RX_FLAG_MMIC_ERROR; 1325 1326 hdr = ath10k_htt_rx_skb_get_hdr(msdu_head); 1327 1328 if (ath10k_htt_rx_hdr_is_amsdu(hdr)) 1329 ath10k_htt_rx_amsdu(htt, rx_status, msdu_head); 1330 else 1331 ath10k_htt_rx_msdu(htt, rx_status, msdu_head); 1332 } 1333 } 1334 1335 tasklet_schedule(&htt->rx_replenish_task); 1336 } 1337 1338 static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt, 1339 struct htt_rx_fragment_indication *frag) 1340 { 1341 struct ath10k *ar = htt->ar; 1342 struct sk_buff *msdu_head, *msdu_tail; 1343 enum htt_rx_mpdu_encrypt_type enctype; 1344 struct htt_rx_desc *rxd; 1345 enum rx_msdu_decap_format fmt; 1346 struct ieee80211_rx_status *rx_status = &htt->rx_status; 1347 struct ieee80211_hdr *hdr; 1348 int ret; 1349 bool tkip_mic_err; 1350 bool decrypt_err; 1351 u8 *fw_desc; 1352 int fw_desc_len, hdrlen, paramlen; 1353 int trim; 1354 u32 attention = 0; 1355 1356 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes); 1357 fw_desc = (u8 *)frag->fw_msdu_rx_desc; 1358 1359 msdu_head = NULL; 1360 msdu_tail = NULL; 1361 1362 spin_lock_bh(&htt->rx_ring.lock); 1363 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len, 1364 &msdu_head, &msdu_tail, 1365 &attention); 1366 spin_unlock_bh(&htt->rx_ring.lock); 1367 1368 ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n"); 1369 1370 if (ret) { 1371 ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n", 1372 ret); 1373 ath10k_htt_rx_free_msdu_chain(msdu_head); 1374 return; 1375 } 1376 1377 /* FIXME: implement signal strength */ 1378 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL; 1379 1380 hdr = (struct ieee80211_hdr *)msdu_head->data; 1381 rxd = (void *)msdu_head->data - sizeof(*rxd); 1382 tkip_mic_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR); 1383 decrypt_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR); 1384 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1), 1385 RX_MSDU_START_INFO1_DECAP_FORMAT); 1386 1387 if (fmt != RX_MSDU_DECAP_RAW) { 1388 ath10k_warn(ar, "we dont support non-raw fragmented rx yet\n"); 1389 dev_kfree_skb_any(msdu_head); 1390 goto end; 1391 } 1392 1393 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), 1394 RX_MPDU_START_INFO0_ENCRYPT_TYPE); 1395 ath10k_htt_rx_h_protected(htt, rx_status, msdu_head, enctype, fmt, 1396 true); 1397 msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head); 1398 1399 if (tkip_mic_err) 1400 ath10k_warn(ar, "tkip mic error\n"); 1401 1402 if (decrypt_err) { 1403 ath10k_warn(ar, "decryption err in fragmented rx\n"); 1404 dev_kfree_skb_any(msdu_head); 1405 goto end; 1406 } 1407 1408 if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) { 1409 hdrlen = ieee80211_hdrlen(hdr->frame_control); 1410 paramlen = ath10k_htt_rx_crypto_param_len(ar, enctype); 1411 1412 /* It is more efficient to move the header than the payload */ 1413 memmove((void *)msdu_head->data + paramlen, 1414 (void *)msdu_head->data, 1415 hdrlen); 1416 skb_pull(msdu_head, paramlen); 1417 hdr = (struct ieee80211_hdr *)msdu_head->data; 1418 } 1419 1420 /* remove trailing FCS */ 1421 trim = 4; 1422 1423 /* remove crypto trailer */ 1424 trim += ath10k_htt_rx_crypto_tail_len(ar, enctype); 1425 1426 /* last fragment of TKIP frags has MIC */ 1427 if (!ieee80211_has_morefrags(hdr->frame_control) && 1428 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA) 1429 trim += 8; 1430 1431 if (trim > msdu_head->len) { 1432 ath10k_warn(ar, "htt rx fragment: trailer longer than the frame itself? drop\n"); 1433 dev_kfree_skb_any(msdu_head); 1434 goto end; 1435 } 1436 1437 skb_trim(msdu_head, msdu_head->len - trim); 1438 1439 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ", 1440 msdu_head->data, msdu_head->len); 1441 ath10k_process_rx(htt->ar, rx_status, msdu_head); 1442 1443 end: 1444 if (fw_desc_len > 0) { 1445 ath10k_dbg(ar, ATH10K_DBG_HTT, 1446 "expecting more fragmented rx in one indication %d\n", 1447 fw_desc_len); 1448 } 1449 } 1450 1451 static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar, 1452 struct sk_buff *skb) 1453 { 1454 struct ath10k_htt *htt = &ar->htt; 1455 struct htt_resp *resp = (struct htt_resp *)skb->data; 1456 struct htt_tx_done tx_done = {}; 1457 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS); 1458 __le16 msdu_id; 1459 int i; 1460 1461 lockdep_assert_held(&htt->tx_lock); 1462 1463 switch (status) { 1464 case HTT_DATA_TX_STATUS_NO_ACK: 1465 tx_done.no_ack = true; 1466 break; 1467 case HTT_DATA_TX_STATUS_OK: 1468 break; 1469 case HTT_DATA_TX_STATUS_DISCARD: 1470 case HTT_DATA_TX_STATUS_POSTPONE: 1471 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL: 1472 tx_done.discard = true; 1473 break; 1474 default: 1475 ath10k_warn(ar, "unhandled tx completion status %d\n", status); 1476 tx_done.discard = true; 1477 break; 1478 } 1479 1480 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n", 1481 resp->data_tx_completion.num_msdus); 1482 1483 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) { 1484 msdu_id = resp->data_tx_completion.msdus[i]; 1485 tx_done.msdu_id = __le16_to_cpu(msdu_id); 1486 ath10k_txrx_tx_unref(htt, &tx_done); 1487 } 1488 } 1489 1490 static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp) 1491 { 1492 struct htt_rx_addba *ev = &resp->rx_addba; 1493 struct ath10k_peer *peer; 1494 struct ath10k_vif *arvif; 1495 u16 info0, tid, peer_id; 1496 1497 info0 = __le16_to_cpu(ev->info0); 1498 tid = MS(info0, HTT_RX_BA_INFO0_TID); 1499 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 1500 1501 ath10k_dbg(ar, ATH10K_DBG_HTT, 1502 "htt rx addba tid %hu peer_id %hu size %hhu\n", 1503 tid, peer_id, ev->window_size); 1504 1505 spin_lock_bh(&ar->data_lock); 1506 peer = ath10k_peer_find_by_id(ar, peer_id); 1507 if (!peer) { 1508 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", 1509 peer_id); 1510 spin_unlock_bh(&ar->data_lock); 1511 return; 1512 } 1513 1514 arvif = ath10k_get_arvif(ar, peer->vdev_id); 1515 if (!arvif) { 1516 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 1517 peer->vdev_id); 1518 spin_unlock_bh(&ar->data_lock); 1519 return; 1520 } 1521 1522 ath10k_dbg(ar, ATH10K_DBG_HTT, 1523 "htt rx start rx ba session sta %pM tid %hu size %hhu\n", 1524 peer->addr, tid, ev->window_size); 1525 1526 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid); 1527 spin_unlock_bh(&ar->data_lock); 1528 } 1529 1530 static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp) 1531 { 1532 struct htt_rx_delba *ev = &resp->rx_delba; 1533 struct ath10k_peer *peer; 1534 struct ath10k_vif *arvif; 1535 u16 info0, tid, peer_id; 1536 1537 info0 = __le16_to_cpu(ev->info0); 1538 tid = MS(info0, HTT_RX_BA_INFO0_TID); 1539 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 1540 1541 ath10k_dbg(ar, ATH10K_DBG_HTT, 1542 "htt rx delba tid %hu peer_id %hu\n", 1543 tid, peer_id); 1544 1545 spin_lock_bh(&ar->data_lock); 1546 peer = ath10k_peer_find_by_id(ar, peer_id); 1547 if (!peer) { 1548 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", 1549 peer_id); 1550 spin_unlock_bh(&ar->data_lock); 1551 return; 1552 } 1553 1554 arvif = ath10k_get_arvif(ar, peer->vdev_id); 1555 if (!arvif) { 1556 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 1557 peer->vdev_id); 1558 spin_unlock_bh(&ar->data_lock); 1559 return; 1560 } 1561 1562 ath10k_dbg(ar, ATH10K_DBG_HTT, 1563 "htt rx stop rx ba session sta %pM tid %hu\n", 1564 peer->addr, tid); 1565 1566 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid); 1567 spin_unlock_bh(&ar->data_lock); 1568 } 1569 1570 void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) 1571 { 1572 struct ath10k_htt *htt = &ar->htt; 1573 struct htt_resp *resp = (struct htt_resp *)skb->data; 1574 1575 /* confirm alignment */ 1576 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 1577 ath10k_warn(ar, "unaligned htt message, expect trouble\n"); 1578 1579 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n", 1580 resp->hdr.msg_type); 1581 switch (resp->hdr.msg_type) { 1582 case HTT_T2H_MSG_TYPE_VERSION_CONF: { 1583 htt->target_version_major = resp->ver_resp.major; 1584 htt->target_version_minor = resp->ver_resp.minor; 1585 complete(&htt->target_version_received); 1586 break; 1587 } 1588 case HTT_T2H_MSG_TYPE_RX_IND: 1589 spin_lock_bh(&htt->rx_ring.lock); 1590 __skb_queue_tail(&htt->rx_compl_q, skb); 1591 spin_unlock_bh(&htt->rx_ring.lock); 1592 tasklet_schedule(&htt->txrx_compl_task); 1593 return; 1594 case HTT_T2H_MSG_TYPE_PEER_MAP: { 1595 struct htt_peer_map_event ev = { 1596 .vdev_id = resp->peer_map.vdev_id, 1597 .peer_id = __le16_to_cpu(resp->peer_map.peer_id), 1598 }; 1599 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr)); 1600 ath10k_peer_map_event(htt, &ev); 1601 break; 1602 } 1603 case HTT_T2H_MSG_TYPE_PEER_UNMAP: { 1604 struct htt_peer_unmap_event ev = { 1605 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id), 1606 }; 1607 ath10k_peer_unmap_event(htt, &ev); 1608 break; 1609 } 1610 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: { 1611 struct htt_tx_done tx_done = {}; 1612 int status = __le32_to_cpu(resp->mgmt_tx_completion.status); 1613 1614 tx_done.msdu_id = 1615 __le32_to_cpu(resp->mgmt_tx_completion.desc_id); 1616 1617 switch (status) { 1618 case HTT_MGMT_TX_STATUS_OK: 1619 break; 1620 case HTT_MGMT_TX_STATUS_RETRY: 1621 tx_done.no_ack = true; 1622 break; 1623 case HTT_MGMT_TX_STATUS_DROP: 1624 tx_done.discard = true; 1625 break; 1626 } 1627 1628 spin_lock_bh(&htt->tx_lock); 1629 ath10k_txrx_tx_unref(htt, &tx_done); 1630 spin_unlock_bh(&htt->tx_lock); 1631 break; 1632 } 1633 case HTT_T2H_MSG_TYPE_TX_COMPL_IND: 1634 spin_lock_bh(&htt->tx_lock); 1635 __skb_queue_tail(&htt->tx_compl_q, skb); 1636 spin_unlock_bh(&htt->tx_lock); 1637 tasklet_schedule(&htt->txrx_compl_task); 1638 return; 1639 case HTT_T2H_MSG_TYPE_SEC_IND: { 1640 struct ath10k *ar = htt->ar; 1641 struct htt_security_indication *ev = &resp->security_indication; 1642 1643 ath10k_dbg(ar, ATH10K_DBG_HTT, 1644 "sec ind peer_id %d unicast %d type %d\n", 1645 __le16_to_cpu(ev->peer_id), 1646 !!(ev->flags & HTT_SECURITY_IS_UNICAST), 1647 MS(ev->flags, HTT_SECURITY_TYPE)); 1648 complete(&ar->install_key_done); 1649 break; 1650 } 1651 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: { 1652 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 1653 skb->data, skb->len); 1654 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind); 1655 break; 1656 } 1657 case HTT_T2H_MSG_TYPE_TEST: 1658 /* FIX THIS */ 1659 break; 1660 case HTT_T2H_MSG_TYPE_STATS_CONF: 1661 trace_ath10k_htt_stats(ar, skb->data, skb->len); 1662 break; 1663 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND: 1664 /* Firmware can return tx frames if it's unable to fully 1665 * process them and suspects host may be able to fix it. ath10k 1666 * sends all tx frames as already inspected so this shouldn't 1667 * happen unless fw has a bug. 1668 */ 1669 ath10k_warn(ar, "received an unexpected htt tx inspect event\n"); 1670 break; 1671 case HTT_T2H_MSG_TYPE_RX_ADDBA: 1672 ath10k_htt_rx_addba(ar, resp); 1673 break; 1674 case HTT_T2H_MSG_TYPE_RX_DELBA: 1675 ath10k_htt_rx_delba(ar, resp); 1676 break; 1677 case HTT_T2H_MSG_TYPE_RX_FLUSH: { 1678 /* Ignore this event because mac80211 takes care of Rx 1679 * aggregation reordering. 1680 */ 1681 break; 1682 } 1683 default: 1684 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt event (%d) not handled\n", 1685 resp->hdr.msg_type); 1686 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 1687 skb->data, skb->len); 1688 break; 1689 }; 1690 1691 /* Free the indication buffer */ 1692 dev_kfree_skb_any(skb); 1693 } 1694 1695 static void ath10k_htt_txrx_compl_task(unsigned long ptr) 1696 { 1697 struct ath10k_htt *htt = (struct ath10k_htt *)ptr; 1698 struct htt_resp *resp; 1699 struct sk_buff *skb; 1700 1701 spin_lock_bh(&htt->tx_lock); 1702 while ((skb = __skb_dequeue(&htt->tx_compl_q))) { 1703 ath10k_htt_rx_frm_tx_compl(htt->ar, skb); 1704 dev_kfree_skb_any(skb); 1705 } 1706 spin_unlock_bh(&htt->tx_lock); 1707 1708 spin_lock_bh(&htt->rx_ring.lock); 1709 while ((skb = __skb_dequeue(&htt->rx_compl_q))) { 1710 resp = (struct htt_resp *)skb->data; 1711 ath10k_htt_rx_handler(htt, &resp->rx_ind); 1712 dev_kfree_skb_any(skb); 1713 } 1714 spin_unlock_bh(&htt->rx_ring.lock); 1715 } 1716