1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 6 */ 7 8 #include "core.h" 9 #include "htc.h" 10 #include "htt.h" 11 #include "txrx.h" 12 #include "debug.h" 13 #include "trace.h" 14 #include "mac.h" 15 16 #include <linux/log2.h> 17 #include <linux/bitfield.h> 18 19 /* when under memory pressure rx ring refill may fail and needs a retry */ 20 #define HTT_RX_RING_REFILL_RETRY_MS 50 21 22 #define HTT_RX_RING_REFILL_RESCHED_MS 5 23 24 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb); 25 26 static struct sk_buff * 27 ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u64 paddr) 28 { 29 struct ath10k_skb_rxcb *rxcb; 30 31 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr) 32 if (rxcb->paddr == paddr) 33 return ATH10K_RXCB_SKB(rxcb); 34 35 WARN_ON_ONCE(1); 36 return NULL; 37 } 38 39 static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt) 40 { 41 struct sk_buff *skb; 42 struct ath10k_skb_rxcb *rxcb; 43 struct hlist_node *n; 44 int i; 45 46 if (htt->rx_ring.in_ord_rx) { 47 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) { 48 skb = ATH10K_RXCB_SKB(rxcb); 49 dma_unmap_single(htt->ar->dev, rxcb->paddr, 50 skb->len + skb_tailroom(skb), 51 DMA_FROM_DEVICE); 52 hash_del(&rxcb->hlist); 53 dev_kfree_skb_any(skb); 54 } 55 } else { 56 for (i = 0; i < htt->rx_ring.size; i++) { 57 skb = htt->rx_ring.netbufs_ring[i]; 58 if (!skb) 59 continue; 60 61 rxcb = ATH10K_SKB_RXCB(skb); 62 dma_unmap_single(htt->ar->dev, rxcb->paddr, 63 skb->len + skb_tailroom(skb), 64 DMA_FROM_DEVICE); 65 dev_kfree_skb_any(skb); 66 } 67 } 68 69 htt->rx_ring.fill_cnt = 0; 70 hash_init(htt->rx_ring.skb_table); 71 memset(htt->rx_ring.netbufs_ring, 0, 72 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0])); 73 } 74 75 static size_t ath10k_htt_get_rx_ring_size_32(struct ath10k_htt *htt) 76 { 77 return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_32); 78 } 79 80 static size_t ath10k_htt_get_rx_ring_size_64(struct ath10k_htt *htt) 81 { 82 return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_64); 83 } 84 85 static void ath10k_htt_config_paddrs_ring_32(struct ath10k_htt *htt, 86 void *vaddr) 87 { 88 htt->rx_ring.paddrs_ring_32 = vaddr; 89 } 90 91 static void ath10k_htt_config_paddrs_ring_64(struct ath10k_htt *htt, 92 void *vaddr) 93 { 94 htt->rx_ring.paddrs_ring_64 = vaddr; 95 } 96 97 static void ath10k_htt_set_paddrs_ring_32(struct ath10k_htt *htt, 98 dma_addr_t paddr, int idx) 99 { 100 htt->rx_ring.paddrs_ring_32[idx] = __cpu_to_le32(paddr); 101 } 102 103 static void ath10k_htt_set_paddrs_ring_64(struct ath10k_htt *htt, 104 dma_addr_t paddr, int idx) 105 { 106 htt->rx_ring.paddrs_ring_64[idx] = __cpu_to_le64(paddr); 107 } 108 109 static void ath10k_htt_reset_paddrs_ring_32(struct ath10k_htt *htt, int idx) 110 { 111 htt->rx_ring.paddrs_ring_32[idx] = 0; 112 } 113 114 static void ath10k_htt_reset_paddrs_ring_64(struct ath10k_htt *htt, int idx) 115 { 116 htt->rx_ring.paddrs_ring_64[idx] = 0; 117 } 118 119 static void *ath10k_htt_get_vaddr_ring_32(struct ath10k_htt *htt) 120 { 121 return (void *)htt->rx_ring.paddrs_ring_32; 122 } 123 124 static void *ath10k_htt_get_vaddr_ring_64(struct ath10k_htt *htt) 125 { 126 return (void *)htt->rx_ring.paddrs_ring_64; 127 } 128 129 static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 130 { 131 struct htt_rx_desc *rx_desc; 132 struct ath10k_skb_rxcb *rxcb; 133 struct sk_buff *skb; 134 dma_addr_t paddr; 135 int ret = 0, idx; 136 137 /* The Full Rx Reorder firmware has no way of telling the host 138 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring. 139 * To keep things simple make sure ring is always half empty. This 140 * guarantees there'll be no replenishment overruns possible. 141 */ 142 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2); 143 144 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr); 145 while (num > 0) { 146 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN); 147 if (!skb) { 148 ret = -ENOMEM; 149 goto fail; 150 } 151 152 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN)) 153 skb_pull(skb, 154 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) - 155 skb->data); 156 157 /* Clear rx_desc attention word before posting to Rx ring */ 158 rx_desc = (struct htt_rx_desc *)skb->data; 159 rx_desc->attention.flags = __cpu_to_le32(0); 160 161 paddr = dma_map_single(htt->ar->dev, skb->data, 162 skb->len + skb_tailroom(skb), 163 DMA_FROM_DEVICE); 164 165 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) { 166 dev_kfree_skb_any(skb); 167 ret = -ENOMEM; 168 goto fail; 169 } 170 171 rxcb = ATH10K_SKB_RXCB(skb); 172 rxcb->paddr = paddr; 173 htt->rx_ring.netbufs_ring[idx] = skb; 174 ath10k_htt_set_paddrs_ring(htt, paddr, idx); 175 htt->rx_ring.fill_cnt++; 176 177 if (htt->rx_ring.in_ord_rx) { 178 hash_add(htt->rx_ring.skb_table, 179 &ATH10K_SKB_RXCB(skb)->hlist, 180 paddr); 181 } 182 183 num--; 184 idx++; 185 idx &= htt->rx_ring.size_mask; 186 } 187 188 fail: 189 /* 190 * Make sure the rx buffer is updated before available buffer 191 * index to avoid any potential rx ring corruption. 192 */ 193 mb(); 194 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx); 195 return ret; 196 } 197 198 static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 199 { 200 lockdep_assert_held(&htt->rx_ring.lock); 201 return __ath10k_htt_rx_ring_fill_n(htt, num); 202 } 203 204 static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt) 205 { 206 int ret, num_deficit, num_to_fill; 207 208 /* Refilling the whole RX ring buffer proves to be a bad idea. The 209 * reason is RX may take up significant amount of CPU cycles and starve 210 * other tasks, e.g. TX on an ethernet device while acting as a bridge 211 * with ath10k wlan interface. This ended up with very poor performance 212 * once CPU the host system was overwhelmed with RX on ath10k. 213 * 214 * By limiting the number of refills the replenishing occurs 215 * progressively. This in turns makes use of the fact tasklets are 216 * processed in FIFO order. This means actual RX processing can starve 217 * out refilling. If there's not enough buffers on RX ring FW will not 218 * report RX until it is refilled with enough buffers. This 219 * automatically balances load wrt to CPU power. 220 * 221 * This probably comes at a cost of lower maximum throughput but 222 * improves the average and stability. 223 */ 224 spin_lock_bh(&htt->rx_ring.lock); 225 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt; 226 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit); 227 num_deficit -= num_to_fill; 228 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill); 229 if (ret == -ENOMEM) { 230 /* 231 * Failed to fill it to the desired level - 232 * we'll start a timer and try again next time. 233 * As long as enough buffers are left in the ring for 234 * another A-MPDU rx, no special recovery is needed. 235 */ 236 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + 237 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS)); 238 } else if (num_deficit > 0) { 239 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + 240 msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS)); 241 } 242 spin_unlock_bh(&htt->rx_ring.lock); 243 } 244 245 static void ath10k_htt_rx_ring_refill_retry(struct timer_list *t) 246 { 247 struct ath10k_htt *htt = from_timer(htt, t, rx_ring.refill_retry_timer); 248 249 ath10k_htt_rx_msdu_buff_replenish(htt); 250 } 251 252 int ath10k_htt_rx_ring_refill(struct ath10k *ar) 253 { 254 struct ath10k_htt *htt = &ar->htt; 255 int ret; 256 257 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) 258 return 0; 259 260 spin_lock_bh(&htt->rx_ring.lock); 261 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level - 262 htt->rx_ring.fill_cnt)); 263 264 if (ret) 265 ath10k_htt_rx_ring_free(htt); 266 267 spin_unlock_bh(&htt->rx_ring.lock); 268 269 return ret; 270 } 271 272 void ath10k_htt_rx_free(struct ath10k_htt *htt) 273 { 274 if (htt->ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) 275 return; 276 277 del_timer_sync(&htt->rx_ring.refill_retry_timer); 278 279 skb_queue_purge(&htt->rx_msdus_q); 280 skb_queue_purge(&htt->rx_in_ord_compl_q); 281 skb_queue_purge(&htt->tx_fetch_ind_q); 282 283 spin_lock_bh(&htt->rx_ring.lock); 284 ath10k_htt_rx_ring_free(htt); 285 spin_unlock_bh(&htt->rx_ring.lock); 286 287 dma_free_coherent(htt->ar->dev, 288 ath10k_htt_get_rx_ring_size(htt), 289 ath10k_htt_get_vaddr_ring(htt), 290 htt->rx_ring.base_paddr); 291 292 dma_free_coherent(htt->ar->dev, 293 sizeof(*htt->rx_ring.alloc_idx.vaddr), 294 htt->rx_ring.alloc_idx.vaddr, 295 htt->rx_ring.alloc_idx.paddr); 296 297 kfree(htt->rx_ring.netbufs_ring); 298 } 299 300 static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt) 301 { 302 struct ath10k *ar = htt->ar; 303 int idx; 304 struct sk_buff *msdu; 305 306 lockdep_assert_held(&htt->rx_ring.lock); 307 308 if (htt->rx_ring.fill_cnt == 0) { 309 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n"); 310 return NULL; 311 } 312 313 idx = htt->rx_ring.sw_rd_idx.msdu_payld; 314 msdu = htt->rx_ring.netbufs_ring[idx]; 315 htt->rx_ring.netbufs_ring[idx] = NULL; 316 ath10k_htt_reset_paddrs_ring(htt, idx); 317 318 idx++; 319 idx &= htt->rx_ring.size_mask; 320 htt->rx_ring.sw_rd_idx.msdu_payld = idx; 321 htt->rx_ring.fill_cnt--; 322 323 dma_unmap_single(htt->ar->dev, 324 ATH10K_SKB_RXCB(msdu)->paddr, 325 msdu->len + skb_tailroom(msdu), 326 DMA_FROM_DEVICE); 327 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", 328 msdu->data, msdu->len + skb_tailroom(msdu)); 329 330 return msdu; 331 } 332 333 /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */ 334 static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, 335 struct sk_buff_head *amsdu) 336 { 337 struct ath10k *ar = htt->ar; 338 int msdu_len, msdu_chaining = 0; 339 struct sk_buff *msdu; 340 struct htt_rx_desc *rx_desc; 341 342 lockdep_assert_held(&htt->rx_ring.lock); 343 344 for (;;) { 345 int last_msdu, msdu_len_invalid, msdu_chained; 346 347 msdu = ath10k_htt_rx_netbuf_pop(htt); 348 if (!msdu) { 349 __skb_queue_purge(amsdu); 350 return -ENOENT; 351 } 352 353 __skb_queue_tail(amsdu, msdu); 354 355 rx_desc = (struct htt_rx_desc *)msdu->data; 356 357 /* FIXME: we must report msdu payload since this is what caller 358 * expects now 359 */ 360 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload)); 361 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload)); 362 363 /* 364 * Sanity check - confirm the HW is finished filling in the 365 * rx data. 366 * If the HW and SW are working correctly, then it's guaranteed 367 * that the HW's MAC DMA is done before this point in the SW. 368 * To prevent the case that we handle a stale Rx descriptor, 369 * just assert for now until we have a way to recover. 370 */ 371 if (!(__le32_to_cpu(rx_desc->attention.flags) 372 & RX_ATTENTION_FLAGS_MSDU_DONE)) { 373 __skb_queue_purge(amsdu); 374 return -EIO; 375 } 376 377 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags) 378 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR | 379 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR)); 380 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0), 381 RX_MSDU_START_INFO0_MSDU_LENGTH); 382 msdu_chained = rx_desc->frag_info.ring2_more_count; 383 384 if (msdu_len_invalid) 385 msdu_len = 0; 386 387 skb_trim(msdu, 0); 388 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE)); 389 msdu_len -= msdu->len; 390 391 /* Note: Chained buffers do not contain rx descriptor */ 392 while (msdu_chained--) { 393 msdu = ath10k_htt_rx_netbuf_pop(htt); 394 if (!msdu) { 395 __skb_queue_purge(amsdu); 396 return -ENOENT; 397 } 398 399 __skb_queue_tail(amsdu, msdu); 400 skb_trim(msdu, 0); 401 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE)); 402 msdu_len -= msdu->len; 403 msdu_chaining = 1; 404 } 405 406 last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) & 407 RX_MSDU_END_INFO0_LAST_MSDU; 408 409 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention, 410 sizeof(*rx_desc) - sizeof(u32)); 411 412 if (last_msdu) 413 break; 414 } 415 416 if (skb_queue_empty(amsdu)) 417 msdu_chaining = -1; 418 419 /* 420 * Don't refill the ring yet. 421 * 422 * First, the elements popped here are still in use - it is not 423 * safe to overwrite them until the matching call to 424 * mpdu_desc_list_next. Second, for efficiency it is preferable to 425 * refill the rx ring with 1 PPDU's worth of rx buffers (something 426 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers 427 * (something like 3 buffers). Consequently, we'll rely on the txrx 428 * SW to tell us when it is done pulling all the PPDU's rx buffers 429 * out of the rx ring, and then refill it just once. 430 */ 431 432 return msdu_chaining; 433 } 434 435 static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt, 436 u64 paddr) 437 { 438 struct ath10k *ar = htt->ar; 439 struct ath10k_skb_rxcb *rxcb; 440 struct sk_buff *msdu; 441 442 lockdep_assert_held(&htt->rx_ring.lock); 443 444 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr); 445 if (!msdu) 446 return NULL; 447 448 rxcb = ATH10K_SKB_RXCB(msdu); 449 hash_del(&rxcb->hlist); 450 htt->rx_ring.fill_cnt--; 451 452 dma_unmap_single(htt->ar->dev, rxcb->paddr, 453 msdu->len + skb_tailroom(msdu), 454 DMA_FROM_DEVICE); 455 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", 456 msdu->data, msdu->len + skb_tailroom(msdu)); 457 458 return msdu; 459 } 460 461 static inline void ath10k_htt_append_frag_list(struct sk_buff *skb_head, 462 struct sk_buff *frag_list, 463 unsigned int frag_len) 464 { 465 skb_shinfo(skb_head)->frag_list = frag_list; 466 skb_head->data_len = frag_len; 467 skb_head->len += skb_head->data_len; 468 } 469 470 static int ath10k_htt_rx_handle_amsdu_mon_32(struct ath10k_htt *htt, 471 struct sk_buff *msdu, 472 struct htt_rx_in_ord_msdu_desc **msdu_desc) 473 { 474 struct ath10k *ar = htt->ar; 475 u32 paddr; 476 struct sk_buff *frag_buf; 477 struct sk_buff *prev_frag_buf; 478 u8 last_frag; 479 struct htt_rx_in_ord_msdu_desc *ind_desc = *msdu_desc; 480 struct htt_rx_desc *rxd; 481 int amsdu_len = __le16_to_cpu(ind_desc->msdu_len); 482 483 rxd = (void *)msdu->data; 484 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd)); 485 486 skb_put(msdu, sizeof(struct htt_rx_desc)); 487 skb_pull(msdu, sizeof(struct htt_rx_desc)); 488 skb_put(msdu, min(amsdu_len, HTT_RX_MSDU_SIZE)); 489 amsdu_len -= msdu->len; 490 491 last_frag = ind_desc->reserved; 492 if (last_frag) { 493 if (amsdu_len) { 494 ath10k_warn(ar, "invalid amsdu len %u, left %d", 495 __le16_to_cpu(ind_desc->msdu_len), 496 amsdu_len); 497 } 498 return 0; 499 } 500 501 ind_desc++; 502 paddr = __le32_to_cpu(ind_desc->msdu_paddr); 503 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr); 504 if (!frag_buf) { 505 ath10k_warn(ar, "failed to pop frag-1 paddr: 0x%x", paddr); 506 return -ENOENT; 507 } 508 509 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE)); 510 ath10k_htt_append_frag_list(msdu, frag_buf, amsdu_len); 511 512 amsdu_len -= frag_buf->len; 513 prev_frag_buf = frag_buf; 514 last_frag = ind_desc->reserved; 515 while (!last_frag) { 516 ind_desc++; 517 paddr = __le32_to_cpu(ind_desc->msdu_paddr); 518 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr); 519 if (!frag_buf) { 520 ath10k_warn(ar, "failed to pop frag-n paddr: 0x%x", 521 paddr); 522 prev_frag_buf->next = NULL; 523 return -ENOENT; 524 } 525 526 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE)); 527 last_frag = ind_desc->reserved; 528 amsdu_len -= frag_buf->len; 529 530 prev_frag_buf->next = frag_buf; 531 prev_frag_buf = frag_buf; 532 } 533 534 if (amsdu_len) { 535 ath10k_warn(ar, "invalid amsdu len %u, left %d", 536 __le16_to_cpu(ind_desc->msdu_len), amsdu_len); 537 } 538 539 *msdu_desc = ind_desc; 540 541 prev_frag_buf->next = NULL; 542 return 0; 543 } 544 545 static int 546 ath10k_htt_rx_handle_amsdu_mon_64(struct ath10k_htt *htt, 547 struct sk_buff *msdu, 548 struct htt_rx_in_ord_msdu_desc_ext **msdu_desc) 549 { 550 struct ath10k *ar = htt->ar; 551 u64 paddr; 552 struct sk_buff *frag_buf; 553 struct sk_buff *prev_frag_buf; 554 u8 last_frag; 555 struct htt_rx_in_ord_msdu_desc_ext *ind_desc = *msdu_desc; 556 struct htt_rx_desc *rxd; 557 int amsdu_len = __le16_to_cpu(ind_desc->msdu_len); 558 559 rxd = (void *)msdu->data; 560 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd)); 561 562 skb_put(msdu, sizeof(struct htt_rx_desc)); 563 skb_pull(msdu, sizeof(struct htt_rx_desc)); 564 skb_put(msdu, min(amsdu_len, HTT_RX_MSDU_SIZE)); 565 amsdu_len -= msdu->len; 566 567 last_frag = ind_desc->reserved; 568 if (last_frag) { 569 if (amsdu_len) { 570 ath10k_warn(ar, "invalid amsdu len %u, left %d", 571 __le16_to_cpu(ind_desc->msdu_len), 572 amsdu_len); 573 } 574 return 0; 575 } 576 577 ind_desc++; 578 paddr = __le64_to_cpu(ind_desc->msdu_paddr); 579 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr); 580 if (!frag_buf) { 581 ath10k_warn(ar, "failed to pop frag-1 paddr: 0x%llx", paddr); 582 return -ENOENT; 583 } 584 585 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE)); 586 ath10k_htt_append_frag_list(msdu, frag_buf, amsdu_len); 587 588 amsdu_len -= frag_buf->len; 589 prev_frag_buf = frag_buf; 590 last_frag = ind_desc->reserved; 591 while (!last_frag) { 592 ind_desc++; 593 paddr = __le64_to_cpu(ind_desc->msdu_paddr); 594 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr); 595 if (!frag_buf) { 596 ath10k_warn(ar, "failed to pop frag-n paddr: 0x%llx", 597 paddr); 598 prev_frag_buf->next = NULL; 599 return -ENOENT; 600 } 601 602 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE)); 603 last_frag = ind_desc->reserved; 604 amsdu_len -= frag_buf->len; 605 606 prev_frag_buf->next = frag_buf; 607 prev_frag_buf = frag_buf; 608 } 609 610 if (amsdu_len) { 611 ath10k_warn(ar, "invalid amsdu len %u, left %d", 612 __le16_to_cpu(ind_desc->msdu_len), amsdu_len); 613 } 614 615 *msdu_desc = ind_desc; 616 617 prev_frag_buf->next = NULL; 618 return 0; 619 } 620 621 static int ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt *htt, 622 struct htt_rx_in_ord_ind *ev, 623 struct sk_buff_head *list) 624 { 625 struct ath10k *ar = htt->ar; 626 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs32; 627 struct htt_rx_desc *rxd; 628 struct sk_buff *msdu; 629 int msdu_count, ret; 630 bool is_offload; 631 u32 paddr; 632 633 lockdep_assert_held(&htt->rx_ring.lock); 634 635 msdu_count = __le16_to_cpu(ev->msdu_count); 636 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 637 638 while (msdu_count--) { 639 paddr = __le32_to_cpu(msdu_desc->msdu_paddr); 640 641 msdu = ath10k_htt_rx_pop_paddr(htt, paddr); 642 if (!msdu) { 643 __skb_queue_purge(list); 644 return -ENOENT; 645 } 646 647 if (!is_offload && ar->monitor_arvif) { 648 ret = ath10k_htt_rx_handle_amsdu_mon_32(htt, msdu, 649 &msdu_desc); 650 if (ret) { 651 __skb_queue_purge(list); 652 return ret; 653 } 654 __skb_queue_tail(list, msdu); 655 msdu_desc++; 656 continue; 657 } 658 659 __skb_queue_tail(list, msdu); 660 661 if (!is_offload) { 662 rxd = (void *)msdu->data; 663 664 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd)); 665 666 skb_put(msdu, sizeof(*rxd)); 667 skb_pull(msdu, sizeof(*rxd)); 668 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len)); 669 670 if (!(__le32_to_cpu(rxd->attention.flags) & 671 RX_ATTENTION_FLAGS_MSDU_DONE)) { 672 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n"); 673 return -EIO; 674 } 675 } 676 677 msdu_desc++; 678 } 679 680 return 0; 681 } 682 683 static int ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt *htt, 684 struct htt_rx_in_ord_ind *ev, 685 struct sk_buff_head *list) 686 { 687 struct ath10k *ar = htt->ar; 688 struct htt_rx_in_ord_msdu_desc_ext *msdu_desc = ev->msdu_descs64; 689 struct htt_rx_desc *rxd; 690 struct sk_buff *msdu; 691 int msdu_count, ret; 692 bool is_offload; 693 u64 paddr; 694 695 lockdep_assert_held(&htt->rx_ring.lock); 696 697 msdu_count = __le16_to_cpu(ev->msdu_count); 698 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 699 700 while (msdu_count--) { 701 paddr = __le64_to_cpu(msdu_desc->msdu_paddr); 702 msdu = ath10k_htt_rx_pop_paddr(htt, paddr); 703 if (!msdu) { 704 __skb_queue_purge(list); 705 return -ENOENT; 706 } 707 708 if (!is_offload && ar->monitor_arvif) { 709 ret = ath10k_htt_rx_handle_amsdu_mon_64(htt, msdu, 710 &msdu_desc); 711 if (ret) { 712 __skb_queue_purge(list); 713 return ret; 714 } 715 __skb_queue_tail(list, msdu); 716 msdu_desc++; 717 continue; 718 } 719 720 __skb_queue_tail(list, msdu); 721 722 if (!is_offload) { 723 rxd = (void *)msdu->data; 724 725 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd)); 726 727 skb_put(msdu, sizeof(*rxd)); 728 skb_pull(msdu, sizeof(*rxd)); 729 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len)); 730 731 if (!(__le32_to_cpu(rxd->attention.flags) & 732 RX_ATTENTION_FLAGS_MSDU_DONE)) { 733 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n"); 734 return -EIO; 735 } 736 } 737 738 msdu_desc++; 739 } 740 741 return 0; 742 } 743 744 int ath10k_htt_rx_alloc(struct ath10k_htt *htt) 745 { 746 struct ath10k *ar = htt->ar; 747 dma_addr_t paddr; 748 void *vaddr, *vaddr_ring; 749 size_t size; 750 struct timer_list *timer = &htt->rx_ring.refill_retry_timer; 751 752 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) 753 return 0; 754 755 htt->rx_confused = false; 756 757 /* XXX: The fill level could be changed during runtime in response to 758 * the host processing latency. Is this really worth it? 759 */ 760 htt->rx_ring.size = HTT_RX_RING_SIZE; 761 htt->rx_ring.size_mask = htt->rx_ring.size - 1; 762 htt->rx_ring.fill_level = ar->hw_params.rx_ring_fill_level; 763 764 if (!is_power_of_2(htt->rx_ring.size)) { 765 ath10k_warn(ar, "htt rx ring size is not power of 2\n"); 766 return -EINVAL; 767 } 768 769 htt->rx_ring.netbufs_ring = 770 kcalloc(htt->rx_ring.size, sizeof(struct sk_buff *), 771 GFP_KERNEL); 772 if (!htt->rx_ring.netbufs_ring) 773 goto err_netbuf; 774 775 size = ath10k_htt_get_rx_ring_size(htt); 776 777 vaddr_ring = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL); 778 if (!vaddr_ring) 779 goto err_dma_ring; 780 781 ath10k_htt_config_paddrs_ring(htt, vaddr_ring); 782 htt->rx_ring.base_paddr = paddr; 783 784 vaddr = dma_alloc_coherent(htt->ar->dev, 785 sizeof(*htt->rx_ring.alloc_idx.vaddr), 786 &paddr, GFP_KERNEL); 787 if (!vaddr) 788 goto err_dma_idx; 789 790 htt->rx_ring.alloc_idx.vaddr = vaddr; 791 htt->rx_ring.alloc_idx.paddr = paddr; 792 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask; 793 *htt->rx_ring.alloc_idx.vaddr = 0; 794 795 /* Initialize the Rx refill retry timer */ 796 timer_setup(timer, ath10k_htt_rx_ring_refill_retry, 0); 797 798 spin_lock_init(&htt->rx_ring.lock); 799 800 htt->rx_ring.fill_cnt = 0; 801 htt->rx_ring.sw_rd_idx.msdu_payld = 0; 802 hash_init(htt->rx_ring.skb_table); 803 804 skb_queue_head_init(&htt->rx_msdus_q); 805 skb_queue_head_init(&htt->rx_in_ord_compl_q); 806 skb_queue_head_init(&htt->tx_fetch_ind_q); 807 atomic_set(&htt->num_mpdus_ready, 0); 808 809 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n", 810 htt->rx_ring.size, htt->rx_ring.fill_level); 811 return 0; 812 813 err_dma_idx: 814 dma_free_coherent(htt->ar->dev, 815 ath10k_htt_get_rx_ring_size(htt), 816 vaddr_ring, 817 htt->rx_ring.base_paddr); 818 err_dma_ring: 819 kfree(htt->rx_ring.netbufs_ring); 820 err_netbuf: 821 return -ENOMEM; 822 } 823 824 static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar, 825 enum htt_rx_mpdu_encrypt_type type) 826 { 827 switch (type) { 828 case HTT_RX_MPDU_ENCRYPT_NONE: 829 return 0; 830 case HTT_RX_MPDU_ENCRYPT_WEP40: 831 case HTT_RX_MPDU_ENCRYPT_WEP104: 832 return IEEE80211_WEP_IV_LEN; 833 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 834 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 835 return IEEE80211_TKIP_IV_LEN; 836 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 837 return IEEE80211_CCMP_HDR_LEN; 838 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2: 839 return IEEE80211_CCMP_256_HDR_LEN; 840 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2: 841 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2: 842 return IEEE80211_GCMP_HDR_LEN; 843 case HTT_RX_MPDU_ENCRYPT_WEP128: 844 case HTT_RX_MPDU_ENCRYPT_WAPI: 845 break; 846 } 847 848 ath10k_warn(ar, "unsupported encryption type %d\n", type); 849 return 0; 850 } 851 852 #define MICHAEL_MIC_LEN 8 853 854 static int ath10k_htt_rx_crypto_mic_len(struct ath10k *ar, 855 enum htt_rx_mpdu_encrypt_type type) 856 { 857 switch (type) { 858 case HTT_RX_MPDU_ENCRYPT_NONE: 859 case HTT_RX_MPDU_ENCRYPT_WEP40: 860 case HTT_RX_MPDU_ENCRYPT_WEP104: 861 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 862 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 863 return 0; 864 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 865 return IEEE80211_CCMP_MIC_LEN; 866 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2: 867 return IEEE80211_CCMP_256_MIC_LEN; 868 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2: 869 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2: 870 return IEEE80211_GCMP_MIC_LEN; 871 case HTT_RX_MPDU_ENCRYPT_WEP128: 872 case HTT_RX_MPDU_ENCRYPT_WAPI: 873 break; 874 } 875 876 ath10k_warn(ar, "unsupported encryption type %d\n", type); 877 return 0; 878 } 879 880 static int ath10k_htt_rx_crypto_icv_len(struct ath10k *ar, 881 enum htt_rx_mpdu_encrypt_type type) 882 { 883 switch (type) { 884 case HTT_RX_MPDU_ENCRYPT_NONE: 885 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 886 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2: 887 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2: 888 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2: 889 return 0; 890 case HTT_RX_MPDU_ENCRYPT_WEP40: 891 case HTT_RX_MPDU_ENCRYPT_WEP104: 892 return IEEE80211_WEP_ICV_LEN; 893 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 894 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 895 return IEEE80211_TKIP_ICV_LEN; 896 case HTT_RX_MPDU_ENCRYPT_WEP128: 897 case HTT_RX_MPDU_ENCRYPT_WAPI: 898 break; 899 } 900 901 ath10k_warn(ar, "unsupported encryption type %d\n", type); 902 return 0; 903 } 904 905 struct amsdu_subframe_hdr { 906 u8 dst[ETH_ALEN]; 907 u8 src[ETH_ALEN]; 908 __be16 len; 909 } __packed; 910 911 #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63) 912 913 static inline u8 ath10k_bw_to_mac80211_bw(u8 bw) 914 { 915 u8 ret = 0; 916 917 switch (bw) { 918 case 0: 919 ret = RATE_INFO_BW_20; 920 break; 921 case 1: 922 ret = RATE_INFO_BW_40; 923 break; 924 case 2: 925 ret = RATE_INFO_BW_80; 926 break; 927 case 3: 928 ret = RATE_INFO_BW_160; 929 break; 930 } 931 932 return ret; 933 } 934 935 static void ath10k_htt_rx_h_rates(struct ath10k *ar, 936 struct ieee80211_rx_status *status, 937 struct htt_rx_desc *rxd) 938 { 939 struct ieee80211_supported_band *sband; 940 u8 cck, rate, bw, sgi, mcs, nss; 941 u8 preamble = 0; 942 u8 group_id; 943 u32 info1, info2, info3; 944 945 info1 = __le32_to_cpu(rxd->ppdu_start.info1); 946 info2 = __le32_to_cpu(rxd->ppdu_start.info2); 947 info3 = __le32_to_cpu(rxd->ppdu_start.info3); 948 949 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE); 950 951 switch (preamble) { 952 case HTT_RX_LEGACY: 953 /* To get legacy rate index band is required. Since band can't 954 * be undefined check if freq is non-zero. 955 */ 956 if (!status->freq) 957 return; 958 959 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT; 960 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE); 961 rate &= ~RX_PPDU_START_RATE_FLAG; 962 963 sband = &ar->mac.sbands[status->band]; 964 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck); 965 break; 966 case HTT_RX_HT: 967 case HTT_RX_HT_WITH_TXBF: 968 /* HT-SIG - Table 20-11 in info2 and info3 */ 969 mcs = info2 & 0x1F; 970 nss = mcs >> 3; 971 bw = (info2 >> 7) & 1; 972 sgi = (info3 >> 7) & 1; 973 974 status->rate_idx = mcs; 975 status->encoding = RX_ENC_HT; 976 if (sgi) 977 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 978 if (bw) 979 status->bw = RATE_INFO_BW_40; 980 break; 981 case HTT_RX_VHT: 982 case HTT_RX_VHT_WITH_TXBF: 983 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3 984 * TODO check this 985 */ 986 bw = info2 & 3; 987 sgi = info3 & 1; 988 group_id = (info2 >> 4) & 0x3F; 989 990 if (GROUP_ID_IS_SU_MIMO(group_id)) { 991 mcs = (info3 >> 4) & 0x0F; 992 nss = ((info2 >> 10) & 0x07) + 1; 993 } else { 994 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor 995 * so it's impossible to decode MCS. Also since 996 * firmware consumes Group Id Management frames host 997 * has no knowledge regarding group/user position 998 * mapping so it's impossible to pick the correct Nsts 999 * from VHT-SIG-A1. 1000 * 1001 * Bandwidth and SGI are valid so report the rateinfo 1002 * on best-effort basis. 1003 */ 1004 mcs = 0; 1005 nss = 1; 1006 } 1007 1008 if (mcs > 0x09) { 1009 ath10k_warn(ar, "invalid MCS received %u\n", mcs); 1010 ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n", 1011 __le32_to_cpu(rxd->attention.flags), 1012 __le32_to_cpu(rxd->mpdu_start.info0), 1013 __le32_to_cpu(rxd->mpdu_start.info1), 1014 __le32_to_cpu(rxd->msdu_start.common.info0), 1015 __le32_to_cpu(rxd->msdu_start.common.info1), 1016 rxd->ppdu_start.info0, 1017 __le32_to_cpu(rxd->ppdu_start.info1), 1018 __le32_to_cpu(rxd->ppdu_start.info2), 1019 __le32_to_cpu(rxd->ppdu_start.info3), 1020 __le32_to_cpu(rxd->ppdu_start.info4)); 1021 1022 ath10k_warn(ar, "msdu end %08x mpdu end %08x\n", 1023 __le32_to_cpu(rxd->msdu_end.common.info0), 1024 __le32_to_cpu(rxd->mpdu_end.info0)); 1025 1026 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, 1027 "rx desc msdu payload: ", 1028 rxd->msdu_payload, 50); 1029 } 1030 1031 status->rate_idx = mcs; 1032 status->nss = nss; 1033 1034 if (sgi) 1035 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1036 1037 status->bw = ath10k_bw_to_mac80211_bw(bw); 1038 status->encoding = RX_ENC_VHT; 1039 break; 1040 default: 1041 break; 1042 } 1043 } 1044 1045 static struct ieee80211_channel * 1046 ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd) 1047 { 1048 struct ath10k_peer *peer; 1049 struct ath10k_vif *arvif; 1050 struct cfg80211_chan_def def; 1051 u16 peer_id; 1052 1053 lockdep_assert_held(&ar->data_lock); 1054 1055 if (!rxd) 1056 return NULL; 1057 1058 if (rxd->attention.flags & 1059 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID)) 1060 return NULL; 1061 1062 if (!(rxd->msdu_end.common.info0 & 1063 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU))) 1064 return NULL; 1065 1066 peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0), 1067 RX_MPDU_START_INFO0_PEER_IDX); 1068 1069 peer = ath10k_peer_find_by_id(ar, peer_id); 1070 if (!peer) 1071 return NULL; 1072 1073 arvif = ath10k_get_arvif(ar, peer->vdev_id); 1074 if (WARN_ON_ONCE(!arvif)) 1075 return NULL; 1076 1077 if (ath10k_mac_vif_chan(arvif->vif, &def)) 1078 return NULL; 1079 1080 return def.chan; 1081 } 1082 1083 static struct ieee80211_channel * 1084 ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id) 1085 { 1086 struct ath10k_vif *arvif; 1087 struct cfg80211_chan_def def; 1088 1089 lockdep_assert_held(&ar->data_lock); 1090 1091 list_for_each_entry(arvif, &ar->arvifs, list) { 1092 if (arvif->vdev_id == vdev_id && 1093 ath10k_mac_vif_chan(arvif->vif, &def) == 0) 1094 return def.chan; 1095 } 1096 1097 return NULL; 1098 } 1099 1100 static void 1101 ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw, 1102 struct ieee80211_chanctx_conf *conf, 1103 void *data) 1104 { 1105 struct cfg80211_chan_def *def = data; 1106 1107 *def = conf->def; 1108 } 1109 1110 static struct ieee80211_channel * 1111 ath10k_htt_rx_h_any_channel(struct ath10k *ar) 1112 { 1113 struct cfg80211_chan_def def = {}; 1114 1115 ieee80211_iter_chan_contexts_atomic(ar->hw, 1116 ath10k_htt_rx_h_any_chan_iter, 1117 &def); 1118 1119 return def.chan; 1120 } 1121 1122 static bool ath10k_htt_rx_h_channel(struct ath10k *ar, 1123 struct ieee80211_rx_status *status, 1124 struct htt_rx_desc *rxd, 1125 u32 vdev_id) 1126 { 1127 struct ieee80211_channel *ch; 1128 1129 spin_lock_bh(&ar->data_lock); 1130 ch = ar->scan_channel; 1131 if (!ch) 1132 ch = ar->rx_channel; 1133 if (!ch) 1134 ch = ath10k_htt_rx_h_peer_channel(ar, rxd); 1135 if (!ch) 1136 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id); 1137 if (!ch) 1138 ch = ath10k_htt_rx_h_any_channel(ar); 1139 if (!ch) 1140 ch = ar->tgt_oper_chan; 1141 spin_unlock_bh(&ar->data_lock); 1142 1143 if (!ch) 1144 return false; 1145 1146 status->band = ch->band; 1147 status->freq = ch->center_freq; 1148 1149 return true; 1150 } 1151 1152 static void ath10k_htt_rx_h_signal(struct ath10k *ar, 1153 struct ieee80211_rx_status *status, 1154 struct htt_rx_desc *rxd) 1155 { 1156 int i; 1157 1158 for (i = 0; i < IEEE80211_MAX_CHAINS ; i++) { 1159 status->chains &= ~BIT(i); 1160 1161 if (rxd->ppdu_start.rssi_chains[i].pri20_mhz != 0x80) { 1162 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR + 1163 rxd->ppdu_start.rssi_chains[i].pri20_mhz; 1164 1165 status->chains |= BIT(i); 1166 } 1167 } 1168 1169 /* FIXME: Get real NF */ 1170 status->signal = ATH10K_DEFAULT_NOISE_FLOOR + 1171 rxd->ppdu_start.rssi_comb; 1172 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL; 1173 } 1174 1175 static void ath10k_htt_rx_h_mactime(struct ath10k *ar, 1176 struct ieee80211_rx_status *status, 1177 struct htt_rx_desc *rxd) 1178 { 1179 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This 1180 * means all prior MSDUs in a PPDU are reported to mac80211 without the 1181 * TSF. Is it worth holding frames until end of PPDU is known? 1182 * 1183 * FIXME: Can we get/compute 64bit TSF? 1184 */ 1185 status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp); 1186 status->flag |= RX_FLAG_MACTIME_END; 1187 } 1188 1189 static void ath10k_htt_rx_h_ppdu(struct ath10k *ar, 1190 struct sk_buff_head *amsdu, 1191 struct ieee80211_rx_status *status, 1192 u32 vdev_id) 1193 { 1194 struct sk_buff *first; 1195 struct htt_rx_desc *rxd; 1196 bool is_first_ppdu; 1197 bool is_last_ppdu; 1198 1199 if (skb_queue_empty(amsdu)) 1200 return; 1201 1202 first = skb_peek(amsdu); 1203 rxd = (void *)first->data - sizeof(*rxd); 1204 1205 is_first_ppdu = !!(rxd->attention.flags & 1206 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU)); 1207 is_last_ppdu = !!(rxd->attention.flags & 1208 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU)); 1209 1210 if (is_first_ppdu) { 1211 /* New PPDU starts so clear out the old per-PPDU status. */ 1212 status->freq = 0; 1213 status->rate_idx = 0; 1214 status->nss = 0; 1215 status->encoding = RX_ENC_LEGACY; 1216 status->bw = RATE_INFO_BW_20; 1217 1218 status->flag &= ~RX_FLAG_MACTIME_END; 1219 status->flag |= RX_FLAG_NO_SIGNAL_VAL; 1220 1221 status->flag &= ~(RX_FLAG_AMPDU_IS_LAST); 1222 status->flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN; 1223 status->ampdu_reference = ar->ampdu_reference; 1224 1225 ath10k_htt_rx_h_signal(ar, status, rxd); 1226 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id); 1227 ath10k_htt_rx_h_rates(ar, status, rxd); 1228 } 1229 1230 if (is_last_ppdu) { 1231 ath10k_htt_rx_h_mactime(ar, status, rxd); 1232 1233 /* set ampdu last segment flag */ 1234 status->flag |= RX_FLAG_AMPDU_IS_LAST; 1235 ar->ampdu_reference++; 1236 } 1237 } 1238 1239 static const char * const tid_to_ac[] = { 1240 "BE", 1241 "BK", 1242 "BK", 1243 "BE", 1244 "VI", 1245 "VI", 1246 "VO", 1247 "VO", 1248 }; 1249 1250 static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size) 1251 { 1252 u8 *qc; 1253 int tid; 1254 1255 if (!ieee80211_is_data_qos(hdr->frame_control)) 1256 return ""; 1257 1258 qc = ieee80211_get_qos_ctl(hdr); 1259 tid = *qc & IEEE80211_QOS_CTL_TID_MASK; 1260 if (tid < 8) 1261 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]); 1262 else 1263 snprintf(out, size, "tid %d", tid); 1264 1265 return out; 1266 } 1267 1268 static void ath10k_htt_rx_h_queue_msdu(struct ath10k *ar, 1269 struct ieee80211_rx_status *rx_status, 1270 struct sk_buff *skb) 1271 { 1272 struct ieee80211_rx_status *status; 1273 1274 status = IEEE80211_SKB_RXCB(skb); 1275 *status = *rx_status; 1276 1277 skb_queue_tail(&ar->htt.rx_msdus_q, skb); 1278 } 1279 1280 static void ath10k_process_rx(struct ath10k *ar, struct sk_buff *skb) 1281 { 1282 struct ieee80211_rx_status *status; 1283 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1284 char tid[32]; 1285 1286 status = IEEE80211_SKB_RXCB(skb); 1287 1288 ath10k_dbg(ar, ATH10K_DBG_DATA, 1289 "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n", 1290 skb, 1291 skb->len, 1292 ieee80211_get_SA(hdr), 1293 ath10k_get_tid(hdr, tid, sizeof(tid)), 1294 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ? 1295 "mcast" : "ucast", 1296 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4, 1297 (status->encoding == RX_ENC_LEGACY) ? "legacy" : "", 1298 (status->encoding == RX_ENC_HT) ? "ht" : "", 1299 (status->encoding == RX_ENC_VHT) ? "vht" : "", 1300 (status->bw == RATE_INFO_BW_40) ? "40" : "", 1301 (status->bw == RATE_INFO_BW_80) ? "80" : "", 1302 (status->bw == RATE_INFO_BW_160) ? "160" : "", 1303 status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "", 1304 status->rate_idx, 1305 status->nss, 1306 status->freq, 1307 status->band, status->flag, 1308 !!(status->flag & RX_FLAG_FAILED_FCS_CRC), 1309 !!(status->flag & RX_FLAG_MMIC_ERROR), 1310 !!(status->flag & RX_FLAG_AMSDU_MORE)); 1311 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ", 1312 skb->data, skb->len); 1313 trace_ath10k_rx_hdr(ar, skb->data, skb->len); 1314 trace_ath10k_rx_payload(ar, skb->data, skb->len); 1315 1316 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi); 1317 } 1318 1319 static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar, 1320 struct ieee80211_hdr *hdr) 1321 { 1322 int len = ieee80211_hdrlen(hdr->frame_control); 1323 1324 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING, 1325 ar->running_fw->fw_file.fw_features)) 1326 len = round_up(len, 4); 1327 1328 return len; 1329 } 1330 1331 static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar, 1332 struct sk_buff *msdu, 1333 struct ieee80211_rx_status *status, 1334 enum htt_rx_mpdu_encrypt_type enctype, 1335 bool is_decrypted, 1336 const u8 first_hdr[64]) 1337 { 1338 struct ieee80211_hdr *hdr; 1339 struct htt_rx_desc *rxd; 1340 size_t hdr_len; 1341 size_t crypto_len; 1342 bool is_first; 1343 bool is_last; 1344 bool msdu_limit_err; 1345 int bytes_aligned = ar->hw_params.decap_align_bytes; 1346 u8 *qos; 1347 1348 rxd = (void *)msdu->data - sizeof(*rxd); 1349 is_first = !!(rxd->msdu_end.common.info0 & 1350 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); 1351 is_last = !!(rxd->msdu_end.common.info0 & 1352 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); 1353 1354 /* Delivered decapped frame: 1355 * [802.11 header] 1356 * [crypto param] <-- can be trimmed if !fcs_err && 1357 * !decrypt_err && !peer_idx_invalid 1358 * [amsdu header] <-- only if A-MSDU 1359 * [rfc1042/llc] 1360 * [payload] 1361 * [FCS] <-- at end, needs to be trimmed 1362 */ 1363 1364 /* Some hardwares(QCA99x0 variants) limit number of msdus in a-msdu when 1365 * deaggregate, so that unwanted MSDU-deaggregation is avoided for 1366 * error packets. If limit exceeds, hw sends all remaining MSDUs as 1367 * a single last MSDU with this msdu limit error set. 1368 */ 1369 msdu_limit_err = ath10k_rx_desc_msdu_limit_error(&ar->hw_params, rxd); 1370 1371 /* If MSDU limit error happens, then don't warn on, the partial raw MSDU 1372 * without first MSDU is expected in that case, and handled later here. 1373 */ 1374 /* This probably shouldn't happen but warn just in case */ 1375 if (WARN_ON_ONCE(!is_first && !msdu_limit_err)) 1376 return; 1377 1378 /* This probably shouldn't happen but warn just in case */ 1379 if (WARN_ON_ONCE(!(is_first && is_last) && !msdu_limit_err)) 1380 return; 1381 1382 skb_trim(msdu, msdu->len - FCS_LEN); 1383 1384 /* Push original 80211 header */ 1385 if (unlikely(msdu_limit_err)) { 1386 hdr = (struct ieee80211_hdr *)first_hdr; 1387 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1388 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1389 1390 if (ieee80211_is_data_qos(hdr->frame_control)) { 1391 qos = ieee80211_get_qos_ctl(hdr); 1392 qos[0] |= IEEE80211_QOS_CTL_A_MSDU_PRESENT; 1393 } 1394 1395 if (crypto_len) 1396 memcpy(skb_push(msdu, crypto_len), 1397 (void *)hdr + round_up(hdr_len, bytes_aligned), 1398 crypto_len); 1399 1400 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1401 } 1402 1403 /* In most cases this will be true for sniffed frames. It makes sense 1404 * to deliver them as-is without stripping the crypto param. This is 1405 * necessary for software based decryption. 1406 * 1407 * If there's no error then the frame is decrypted. At least that is 1408 * the case for frames that come in via fragmented rx indication. 1409 */ 1410 if (!is_decrypted) 1411 return; 1412 1413 /* The payload is decrypted so strip crypto params. Start from tail 1414 * since hdr is used to compute some stuff. 1415 */ 1416 1417 hdr = (void *)msdu->data; 1418 1419 /* Tail */ 1420 if (status->flag & RX_FLAG_IV_STRIPPED) { 1421 skb_trim(msdu, msdu->len - 1422 ath10k_htt_rx_crypto_mic_len(ar, enctype)); 1423 1424 skb_trim(msdu, msdu->len - 1425 ath10k_htt_rx_crypto_icv_len(ar, enctype)); 1426 } else { 1427 /* MIC */ 1428 if (status->flag & RX_FLAG_MIC_STRIPPED) 1429 skb_trim(msdu, msdu->len - 1430 ath10k_htt_rx_crypto_mic_len(ar, enctype)); 1431 1432 /* ICV */ 1433 if (status->flag & RX_FLAG_ICV_STRIPPED) 1434 skb_trim(msdu, msdu->len - 1435 ath10k_htt_rx_crypto_icv_len(ar, enctype)); 1436 } 1437 1438 /* MMIC */ 1439 if ((status->flag & RX_FLAG_MMIC_STRIPPED) && 1440 !ieee80211_has_morefrags(hdr->frame_control) && 1441 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA) 1442 skb_trim(msdu, msdu->len - MICHAEL_MIC_LEN); 1443 1444 /* Head */ 1445 if (status->flag & RX_FLAG_IV_STRIPPED) { 1446 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1447 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1448 1449 memmove((void *)msdu->data + crypto_len, 1450 (void *)msdu->data, hdr_len); 1451 skb_pull(msdu, crypto_len); 1452 } 1453 } 1454 1455 static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar, 1456 struct sk_buff *msdu, 1457 struct ieee80211_rx_status *status, 1458 const u8 first_hdr[64], 1459 enum htt_rx_mpdu_encrypt_type enctype) 1460 { 1461 struct ieee80211_hdr *hdr; 1462 struct htt_rx_desc *rxd; 1463 size_t hdr_len; 1464 u8 da[ETH_ALEN]; 1465 u8 sa[ETH_ALEN]; 1466 int l3_pad_bytes; 1467 int bytes_aligned = ar->hw_params.decap_align_bytes; 1468 1469 /* Delivered decapped frame: 1470 * [nwifi 802.11 header] <-- replaced with 802.11 hdr 1471 * [rfc1042/llc] 1472 * 1473 * Note: The nwifi header doesn't have QoS Control and is 1474 * (always?) a 3addr frame. 1475 * 1476 * Note2: There's no A-MSDU subframe header. Even if it's part 1477 * of an A-MSDU. 1478 */ 1479 1480 /* pull decapped header and copy SA & DA */ 1481 rxd = (void *)msdu->data - sizeof(*rxd); 1482 1483 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1484 skb_put(msdu, l3_pad_bytes); 1485 1486 hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes); 1487 1488 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr); 1489 ether_addr_copy(da, ieee80211_get_DA(hdr)); 1490 ether_addr_copy(sa, ieee80211_get_SA(hdr)); 1491 skb_pull(msdu, hdr_len); 1492 1493 /* push original 802.11 header */ 1494 hdr = (struct ieee80211_hdr *)first_hdr; 1495 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1496 1497 if (!(status->flag & RX_FLAG_IV_STRIPPED)) { 1498 memcpy(skb_push(msdu, 1499 ath10k_htt_rx_crypto_param_len(ar, enctype)), 1500 (void *)hdr + round_up(hdr_len, bytes_aligned), 1501 ath10k_htt_rx_crypto_param_len(ar, enctype)); 1502 } 1503 1504 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1505 1506 /* original 802.11 header has a different DA and in 1507 * case of 4addr it may also have different SA 1508 */ 1509 hdr = (struct ieee80211_hdr *)msdu->data; 1510 ether_addr_copy(ieee80211_get_DA(hdr), da); 1511 ether_addr_copy(ieee80211_get_SA(hdr), sa); 1512 } 1513 1514 static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar, 1515 struct sk_buff *msdu, 1516 enum htt_rx_mpdu_encrypt_type enctype) 1517 { 1518 struct ieee80211_hdr *hdr; 1519 struct htt_rx_desc *rxd; 1520 size_t hdr_len, crypto_len; 1521 void *rfc1042; 1522 bool is_first, is_last, is_amsdu; 1523 int bytes_aligned = ar->hw_params.decap_align_bytes; 1524 1525 rxd = (void *)msdu->data - sizeof(*rxd); 1526 hdr = (void *)rxd->rx_hdr_status; 1527 1528 is_first = !!(rxd->msdu_end.common.info0 & 1529 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); 1530 is_last = !!(rxd->msdu_end.common.info0 & 1531 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); 1532 is_amsdu = !(is_first && is_last); 1533 1534 rfc1042 = hdr; 1535 1536 if (is_first) { 1537 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1538 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1539 1540 rfc1042 += round_up(hdr_len, bytes_aligned) + 1541 round_up(crypto_len, bytes_aligned); 1542 } 1543 1544 if (is_amsdu) 1545 rfc1042 += sizeof(struct amsdu_subframe_hdr); 1546 1547 return rfc1042; 1548 } 1549 1550 static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar, 1551 struct sk_buff *msdu, 1552 struct ieee80211_rx_status *status, 1553 const u8 first_hdr[64], 1554 enum htt_rx_mpdu_encrypt_type enctype) 1555 { 1556 struct ieee80211_hdr *hdr; 1557 struct ethhdr *eth; 1558 size_t hdr_len; 1559 void *rfc1042; 1560 u8 da[ETH_ALEN]; 1561 u8 sa[ETH_ALEN]; 1562 int l3_pad_bytes; 1563 struct htt_rx_desc *rxd; 1564 int bytes_aligned = ar->hw_params.decap_align_bytes; 1565 1566 /* Delivered decapped frame: 1567 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc 1568 * [payload] 1569 */ 1570 1571 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype); 1572 if (WARN_ON_ONCE(!rfc1042)) 1573 return; 1574 1575 rxd = (void *)msdu->data - sizeof(*rxd); 1576 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1577 skb_put(msdu, l3_pad_bytes); 1578 skb_pull(msdu, l3_pad_bytes); 1579 1580 /* pull decapped header and copy SA & DA */ 1581 eth = (struct ethhdr *)msdu->data; 1582 ether_addr_copy(da, eth->h_dest); 1583 ether_addr_copy(sa, eth->h_source); 1584 skb_pull(msdu, sizeof(struct ethhdr)); 1585 1586 /* push rfc1042/llc/snap */ 1587 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042, 1588 sizeof(struct rfc1042_hdr)); 1589 1590 /* push original 802.11 header */ 1591 hdr = (struct ieee80211_hdr *)first_hdr; 1592 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1593 1594 if (!(status->flag & RX_FLAG_IV_STRIPPED)) { 1595 memcpy(skb_push(msdu, 1596 ath10k_htt_rx_crypto_param_len(ar, enctype)), 1597 (void *)hdr + round_up(hdr_len, bytes_aligned), 1598 ath10k_htt_rx_crypto_param_len(ar, enctype)); 1599 } 1600 1601 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1602 1603 /* original 802.11 header has a different DA and in 1604 * case of 4addr it may also have different SA 1605 */ 1606 hdr = (struct ieee80211_hdr *)msdu->data; 1607 ether_addr_copy(ieee80211_get_DA(hdr), da); 1608 ether_addr_copy(ieee80211_get_SA(hdr), sa); 1609 } 1610 1611 static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar, 1612 struct sk_buff *msdu, 1613 struct ieee80211_rx_status *status, 1614 const u8 first_hdr[64], 1615 enum htt_rx_mpdu_encrypt_type enctype) 1616 { 1617 struct ieee80211_hdr *hdr; 1618 size_t hdr_len; 1619 int l3_pad_bytes; 1620 struct htt_rx_desc *rxd; 1621 int bytes_aligned = ar->hw_params.decap_align_bytes; 1622 1623 /* Delivered decapped frame: 1624 * [amsdu header] <-- replaced with 802.11 hdr 1625 * [rfc1042/llc] 1626 * [payload] 1627 */ 1628 1629 rxd = (void *)msdu->data - sizeof(*rxd); 1630 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1631 1632 skb_put(msdu, l3_pad_bytes); 1633 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes); 1634 1635 hdr = (struct ieee80211_hdr *)first_hdr; 1636 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1637 1638 if (!(status->flag & RX_FLAG_IV_STRIPPED)) { 1639 memcpy(skb_push(msdu, 1640 ath10k_htt_rx_crypto_param_len(ar, enctype)), 1641 (void *)hdr + round_up(hdr_len, bytes_aligned), 1642 ath10k_htt_rx_crypto_param_len(ar, enctype)); 1643 } 1644 1645 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1646 } 1647 1648 static void ath10k_htt_rx_h_undecap(struct ath10k *ar, 1649 struct sk_buff *msdu, 1650 struct ieee80211_rx_status *status, 1651 u8 first_hdr[64], 1652 enum htt_rx_mpdu_encrypt_type enctype, 1653 bool is_decrypted) 1654 { 1655 struct htt_rx_desc *rxd; 1656 enum rx_msdu_decap_format decap; 1657 1658 /* First msdu's decapped header: 1659 * [802.11 header] <-- padded to 4 bytes long 1660 * [crypto param] <-- padded to 4 bytes long 1661 * [amsdu header] <-- only if A-MSDU 1662 * [rfc1042/llc] 1663 * 1664 * Other (2nd, 3rd, ..) msdu's decapped header: 1665 * [amsdu header] <-- only if A-MSDU 1666 * [rfc1042/llc] 1667 */ 1668 1669 rxd = (void *)msdu->data - sizeof(*rxd); 1670 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1), 1671 RX_MSDU_START_INFO1_DECAP_FORMAT); 1672 1673 switch (decap) { 1674 case RX_MSDU_DECAP_RAW: 1675 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype, 1676 is_decrypted, first_hdr); 1677 break; 1678 case RX_MSDU_DECAP_NATIVE_WIFI: 1679 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr, 1680 enctype); 1681 break; 1682 case RX_MSDU_DECAP_ETHERNET2_DIX: 1683 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype); 1684 break; 1685 case RX_MSDU_DECAP_8023_SNAP_LLC: 1686 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr, 1687 enctype); 1688 break; 1689 } 1690 } 1691 1692 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb) 1693 { 1694 struct htt_rx_desc *rxd; 1695 u32 flags, info; 1696 bool is_ip4, is_ip6; 1697 bool is_tcp, is_udp; 1698 bool ip_csum_ok, tcpudp_csum_ok; 1699 1700 rxd = (void *)skb->data - sizeof(*rxd); 1701 flags = __le32_to_cpu(rxd->attention.flags); 1702 info = __le32_to_cpu(rxd->msdu_start.common.info1); 1703 1704 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO); 1705 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO); 1706 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO); 1707 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO); 1708 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL); 1709 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL); 1710 1711 if (!is_ip4 && !is_ip6) 1712 return CHECKSUM_NONE; 1713 if (!is_tcp && !is_udp) 1714 return CHECKSUM_NONE; 1715 if (!ip_csum_ok) 1716 return CHECKSUM_NONE; 1717 if (!tcpudp_csum_ok) 1718 return CHECKSUM_NONE; 1719 1720 return CHECKSUM_UNNECESSARY; 1721 } 1722 1723 static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu) 1724 { 1725 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu); 1726 } 1727 1728 static void ath10k_htt_rx_h_mpdu(struct ath10k *ar, 1729 struct sk_buff_head *amsdu, 1730 struct ieee80211_rx_status *status, 1731 bool fill_crypt_header, 1732 u8 *rx_hdr, 1733 enum ath10k_pkt_rx_err *err) 1734 { 1735 struct sk_buff *first; 1736 struct sk_buff *last; 1737 struct sk_buff *msdu; 1738 struct htt_rx_desc *rxd; 1739 struct ieee80211_hdr *hdr; 1740 enum htt_rx_mpdu_encrypt_type enctype; 1741 u8 first_hdr[64]; 1742 u8 *qos; 1743 bool has_fcs_err; 1744 bool has_crypto_err; 1745 bool has_tkip_err; 1746 bool has_peer_idx_invalid; 1747 bool is_decrypted; 1748 bool is_mgmt; 1749 u32 attention; 1750 1751 if (skb_queue_empty(amsdu)) 1752 return; 1753 1754 first = skb_peek(amsdu); 1755 rxd = (void *)first->data - sizeof(*rxd); 1756 1757 is_mgmt = !!(rxd->attention.flags & 1758 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE)); 1759 1760 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), 1761 RX_MPDU_START_INFO0_ENCRYPT_TYPE); 1762 1763 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11 1764 * decapped header. It'll be used for undecapping of each MSDU. 1765 */ 1766 hdr = (void *)rxd->rx_hdr_status; 1767 memcpy(first_hdr, hdr, RX_HTT_HDR_STATUS_LEN); 1768 1769 if (rx_hdr) 1770 memcpy(rx_hdr, hdr, RX_HTT_HDR_STATUS_LEN); 1771 1772 /* Each A-MSDU subframe will use the original header as the base and be 1773 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl. 1774 */ 1775 hdr = (void *)first_hdr; 1776 1777 if (ieee80211_is_data_qos(hdr->frame_control)) { 1778 qos = ieee80211_get_qos_ctl(hdr); 1779 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT; 1780 } 1781 1782 /* Some attention flags are valid only in the last MSDU. */ 1783 last = skb_peek_tail(amsdu); 1784 rxd = (void *)last->data - sizeof(*rxd); 1785 attention = __le32_to_cpu(rxd->attention.flags); 1786 1787 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR); 1788 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR); 1789 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR); 1790 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID); 1791 1792 /* Note: If hardware captures an encrypted frame that it can't decrypt, 1793 * e.g. due to fcs error, missing peer or invalid key data it will 1794 * report the frame as raw. 1795 */ 1796 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE && 1797 !has_fcs_err && 1798 !has_crypto_err && 1799 !has_peer_idx_invalid); 1800 1801 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */ 1802 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC | 1803 RX_FLAG_MMIC_ERROR | 1804 RX_FLAG_DECRYPTED | 1805 RX_FLAG_IV_STRIPPED | 1806 RX_FLAG_ONLY_MONITOR | 1807 RX_FLAG_MMIC_STRIPPED); 1808 1809 if (has_fcs_err) 1810 status->flag |= RX_FLAG_FAILED_FCS_CRC; 1811 1812 if (has_tkip_err) 1813 status->flag |= RX_FLAG_MMIC_ERROR; 1814 1815 if (err) { 1816 if (has_fcs_err) 1817 *err = ATH10K_PKT_RX_ERR_FCS; 1818 else if (has_tkip_err) 1819 *err = ATH10K_PKT_RX_ERR_TKIP; 1820 else if (has_crypto_err) 1821 *err = ATH10K_PKT_RX_ERR_CRYPT; 1822 else if (has_peer_idx_invalid) 1823 *err = ATH10K_PKT_RX_ERR_PEER_IDX_INVAL; 1824 } 1825 1826 /* Firmware reports all necessary management frames via WMI already. 1827 * They are not reported to monitor interfaces at all so pass the ones 1828 * coming via HTT to monitor interfaces instead. This simplifies 1829 * matters a lot. 1830 */ 1831 if (is_mgmt) 1832 status->flag |= RX_FLAG_ONLY_MONITOR; 1833 1834 if (is_decrypted) { 1835 status->flag |= RX_FLAG_DECRYPTED; 1836 1837 if (likely(!is_mgmt)) 1838 status->flag |= RX_FLAG_MMIC_STRIPPED; 1839 1840 if (fill_crypt_header) 1841 status->flag |= RX_FLAG_MIC_STRIPPED | 1842 RX_FLAG_ICV_STRIPPED; 1843 else 1844 status->flag |= RX_FLAG_IV_STRIPPED; 1845 } 1846 1847 skb_queue_walk(amsdu, msdu) { 1848 ath10k_htt_rx_h_csum_offload(msdu); 1849 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype, 1850 is_decrypted); 1851 1852 /* Undecapping involves copying the original 802.11 header back 1853 * to sk_buff. If frame is protected and hardware has decrypted 1854 * it then remove the protected bit. 1855 */ 1856 if (!is_decrypted) 1857 continue; 1858 if (is_mgmt) 1859 continue; 1860 1861 if (fill_crypt_header) 1862 continue; 1863 1864 hdr = (void *)msdu->data; 1865 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 1866 } 1867 } 1868 1869 static void ath10k_htt_rx_h_enqueue(struct ath10k *ar, 1870 struct sk_buff_head *amsdu, 1871 struct ieee80211_rx_status *status) 1872 { 1873 struct sk_buff *msdu; 1874 struct sk_buff *first_subframe; 1875 1876 first_subframe = skb_peek(amsdu); 1877 1878 while ((msdu = __skb_dequeue(amsdu))) { 1879 /* Setup per-MSDU flags */ 1880 if (skb_queue_empty(amsdu)) 1881 status->flag &= ~RX_FLAG_AMSDU_MORE; 1882 else 1883 status->flag |= RX_FLAG_AMSDU_MORE; 1884 1885 if (msdu == first_subframe) { 1886 first_subframe = NULL; 1887 status->flag &= ~RX_FLAG_ALLOW_SAME_PN; 1888 } else { 1889 status->flag |= RX_FLAG_ALLOW_SAME_PN; 1890 } 1891 1892 ath10k_htt_rx_h_queue_msdu(ar, status, msdu); 1893 } 1894 } 1895 1896 static int ath10k_unchain_msdu(struct sk_buff_head *amsdu, 1897 unsigned long *unchain_cnt) 1898 { 1899 struct sk_buff *skb, *first; 1900 int space; 1901 int total_len = 0; 1902 int amsdu_len = skb_queue_len(amsdu); 1903 1904 /* TODO: Might could optimize this by using 1905 * skb_try_coalesce or similar method to 1906 * decrease copying, or maybe get mac80211 to 1907 * provide a way to just receive a list of 1908 * skb? 1909 */ 1910 1911 first = __skb_dequeue(amsdu); 1912 1913 /* Allocate total length all at once. */ 1914 skb_queue_walk(amsdu, skb) 1915 total_len += skb->len; 1916 1917 space = total_len - skb_tailroom(first); 1918 if ((space > 0) && 1919 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) { 1920 /* TODO: bump some rx-oom error stat */ 1921 /* put it back together so we can free the 1922 * whole list at once. 1923 */ 1924 __skb_queue_head(amsdu, first); 1925 return -1; 1926 } 1927 1928 /* Walk list again, copying contents into 1929 * msdu_head 1930 */ 1931 while ((skb = __skb_dequeue(amsdu))) { 1932 skb_copy_from_linear_data(skb, skb_put(first, skb->len), 1933 skb->len); 1934 dev_kfree_skb_any(skb); 1935 } 1936 1937 __skb_queue_head(amsdu, first); 1938 1939 *unchain_cnt += amsdu_len - 1; 1940 1941 return 0; 1942 } 1943 1944 static void ath10k_htt_rx_h_unchain(struct ath10k *ar, 1945 struct sk_buff_head *amsdu, 1946 unsigned long *drop_cnt, 1947 unsigned long *unchain_cnt) 1948 { 1949 struct sk_buff *first; 1950 struct htt_rx_desc *rxd; 1951 enum rx_msdu_decap_format decap; 1952 1953 first = skb_peek(amsdu); 1954 rxd = (void *)first->data - sizeof(*rxd); 1955 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1), 1956 RX_MSDU_START_INFO1_DECAP_FORMAT); 1957 1958 /* FIXME: Current unchaining logic can only handle simple case of raw 1959 * msdu chaining. If decapping is other than raw the chaining may be 1960 * more complex and this isn't handled by the current code. Don't even 1961 * try re-constructing such frames - it'll be pretty much garbage. 1962 */ 1963 if (decap != RX_MSDU_DECAP_RAW || 1964 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) { 1965 *drop_cnt += skb_queue_len(amsdu); 1966 __skb_queue_purge(amsdu); 1967 return; 1968 } 1969 1970 ath10k_unchain_msdu(amsdu, unchain_cnt); 1971 } 1972 1973 static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar, 1974 struct sk_buff_head *amsdu, 1975 struct ieee80211_rx_status *rx_status) 1976 { 1977 /* FIXME: It might be a good idea to do some fuzzy-testing to drop 1978 * invalid/dangerous frames. 1979 */ 1980 1981 if (!rx_status->freq) { 1982 ath10k_dbg(ar, ATH10K_DBG_HTT, "no channel configured; ignoring frame(s)!\n"); 1983 return false; 1984 } 1985 1986 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) { 1987 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n"); 1988 return false; 1989 } 1990 1991 return true; 1992 } 1993 1994 static void ath10k_htt_rx_h_filter(struct ath10k *ar, 1995 struct sk_buff_head *amsdu, 1996 struct ieee80211_rx_status *rx_status, 1997 unsigned long *drop_cnt) 1998 { 1999 if (skb_queue_empty(amsdu)) 2000 return; 2001 2002 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status)) 2003 return; 2004 2005 if (drop_cnt) 2006 *drop_cnt += skb_queue_len(amsdu); 2007 2008 __skb_queue_purge(amsdu); 2009 } 2010 2011 static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt) 2012 { 2013 struct ath10k *ar = htt->ar; 2014 struct ieee80211_rx_status *rx_status = &htt->rx_status; 2015 struct sk_buff_head amsdu; 2016 int ret; 2017 unsigned long drop_cnt = 0; 2018 unsigned long unchain_cnt = 0; 2019 unsigned long drop_cnt_filter = 0; 2020 unsigned long msdus_to_queue, num_msdus; 2021 enum ath10k_pkt_rx_err err = ATH10K_PKT_RX_ERR_MAX; 2022 u8 first_hdr[RX_HTT_HDR_STATUS_LEN]; 2023 2024 __skb_queue_head_init(&amsdu); 2025 2026 spin_lock_bh(&htt->rx_ring.lock); 2027 if (htt->rx_confused) { 2028 spin_unlock_bh(&htt->rx_ring.lock); 2029 return -EIO; 2030 } 2031 ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu); 2032 spin_unlock_bh(&htt->rx_ring.lock); 2033 2034 if (ret < 0) { 2035 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret); 2036 __skb_queue_purge(&amsdu); 2037 /* FIXME: It's probably a good idea to reboot the 2038 * device instead of leaving it inoperable. 2039 */ 2040 htt->rx_confused = true; 2041 return ret; 2042 } 2043 2044 num_msdus = skb_queue_len(&amsdu); 2045 2046 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff); 2047 2048 /* only for ret = 1 indicates chained msdus */ 2049 if (ret > 0) 2050 ath10k_htt_rx_h_unchain(ar, &amsdu, &drop_cnt, &unchain_cnt); 2051 2052 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status, &drop_cnt_filter); 2053 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status, true, first_hdr, &err); 2054 msdus_to_queue = skb_queue_len(&amsdu); 2055 ath10k_htt_rx_h_enqueue(ar, &amsdu, rx_status); 2056 2057 ath10k_sta_update_rx_tid_stats(ar, first_hdr, num_msdus, err, 2058 unchain_cnt, drop_cnt, drop_cnt_filter, 2059 msdus_to_queue); 2060 2061 return 0; 2062 } 2063 2064 static bool ath10k_htt_rx_proc_rx_ind_hl(struct ath10k_htt *htt, 2065 struct htt_rx_indication_hl *rx, 2066 struct sk_buff *skb) 2067 { 2068 struct ath10k *ar = htt->ar; 2069 struct ath10k_peer *peer; 2070 struct htt_rx_indication_mpdu_range *mpdu_ranges; 2071 struct fw_rx_desc_hl *fw_desc; 2072 struct ieee80211_hdr *hdr; 2073 struct ieee80211_rx_status *rx_status; 2074 u16 peer_id; 2075 u8 rx_desc_len; 2076 int num_mpdu_ranges; 2077 size_t tot_hdr_len; 2078 struct ieee80211_channel *ch; 2079 2080 peer_id = __le16_to_cpu(rx->hdr.peer_id); 2081 2082 spin_lock_bh(&ar->data_lock); 2083 peer = ath10k_peer_find_by_id(ar, peer_id); 2084 spin_unlock_bh(&ar->data_lock); 2085 if (!peer) 2086 ath10k_warn(ar, "Got RX ind from invalid peer: %u\n", peer_id); 2087 2088 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1), 2089 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); 2090 mpdu_ranges = htt_rx_ind_get_mpdu_ranges_hl(rx); 2091 fw_desc = &rx->fw_desc; 2092 rx_desc_len = fw_desc->len; 2093 2094 /* I have not yet seen any case where num_mpdu_ranges > 1. 2095 * qcacld does not seem handle that case either, so we introduce the 2096 * same limitiation here as well. 2097 */ 2098 if (num_mpdu_ranges > 1) 2099 ath10k_warn(ar, 2100 "Unsupported number of MPDU ranges: %d, ignoring all but the first\n", 2101 num_mpdu_ranges); 2102 2103 if (mpdu_ranges->mpdu_range_status != 2104 HTT_RX_IND_MPDU_STATUS_OK) { 2105 ath10k_warn(ar, "MPDU range status: %d\n", 2106 mpdu_ranges->mpdu_range_status); 2107 goto err; 2108 } 2109 2110 /* Strip off all headers before the MAC header before delivery to 2111 * mac80211 2112 */ 2113 tot_hdr_len = sizeof(struct htt_resp_hdr) + sizeof(rx->hdr) + 2114 sizeof(rx->ppdu) + sizeof(rx->prefix) + 2115 sizeof(rx->fw_desc) + 2116 sizeof(*mpdu_ranges) * num_mpdu_ranges + rx_desc_len; 2117 skb_pull(skb, tot_hdr_len); 2118 2119 hdr = (struct ieee80211_hdr *)skb->data; 2120 rx_status = IEEE80211_SKB_RXCB(skb); 2121 rx_status->chains |= BIT(0); 2122 if (rx->ppdu.combined_rssi == 0) { 2123 /* SDIO firmware does not provide signal */ 2124 rx_status->signal = 0; 2125 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL; 2126 } else { 2127 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR + 2128 rx->ppdu.combined_rssi; 2129 rx_status->flag &= ~RX_FLAG_NO_SIGNAL_VAL; 2130 } 2131 2132 spin_lock_bh(&ar->data_lock); 2133 ch = ar->scan_channel; 2134 if (!ch) 2135 ch = ar->rx_channel; 2136 if (!ch) 2137 ch = ath10k_htt_rx_h_any_channel(ar); 2138 if (!ch) 2139 ch = ar->tgt_oper_chan; 2140 spin_unlock_bh(&ar->data_lock); 2141 2142 if (ch) { 2143 rx_status->band = ch->band; 2144 rx_status->freq = ch->center_freq; 2145 } 2146 if (rx->fw_desc.flags & FW_RX_DESC_FLAGS_LAST_MSDU) 2147 rx_status->flag &= ~RX_FLAG_AMSDU_MORE; 2148 else 2149 rx_status->flag |= RX_FLAG_AMSDU_MORE; 2150 2151 /* Not entirely sure about this, but all frames from the chipset has 2152 * the protected flag set even though they have already been decrypted. 2153 * Unmasking this flag is necessary in order for mac80211 not to drop 2154 * the frame. 2155 * TODO: Verify this is always the case or find out a way to check 2156 * if there has been hw decryption. 2157 */ 2158 if (ieee80211_has_protected(hdr->frame_control)) { 2159 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 2160 rx_status->flag |= RX_FLAG_DECRYPTED | 2161 RX_FLAG_IV_STRIPPED | 2162 RX_FLAG_MMIC_STRIPPED; 2163 } 2164 2165 ieee80211_rx_ni(ar->hw, skb); 2166 2167 /* We have delivered the skb to the upper layers (mac80211) so we 2168 * must not free it. 2169 */ 2170 return false; 2171 err: 2172 /* Tell the caller that it must free the skb since we have not 2173 * consumed it 2174 */ 2175 return true; 2176 } 2177 2178 static void ath10k_htt_rx_proc_rx_ind_ll(struct ath10k_htt *htt, 2179 struct htt_rx_indication *rx) 2180 { 2181 struct ath10k *ar = htt->ar; 2182 struct htt_rx_indication_mpdu_range *mpdu_ranges; 2183 int num_mpdu_ranges; 2184 int i, mpdu_count = 0; 2185 u16 peer_id; 2186 u8 tid; 2187 2188 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1), 2189 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); 2190 peer_id = __le16_to_cpu(rx->hdr.peer_id); 2191 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID); 2192 2193 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx); 2194 2195 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ", 2196 rx, sizeof(*rx) + 2197 (sizeof(struct htt_rx_indication_mpdu_range) * 2198 num_mpdu_ranges)); 2199 2200 for (i = 0; i < num_mpdu_ranges; i++) 2201 mpdu_count += mpdu_ranges[i].mpdu_count; 2202 2203 atomic_add(mpdu_count, &htt->num_mpdus_ready); 2204 2205 ath10k_sta_update_rx_tid_stats_ampdu(ar, peer_id, tid, mpdu_ranges, 2206 num_mpdu_ranges); 2207 } 2208 2209 static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar, 2210 struct sk_buff *skb) 2211 { 2212 struct ath10k_htt *htt = &ar->htt; 2213 struct htt_resp *resp = (struct htt_resp *)skb->data; 2214 struct htt_tx_done tx_done = {}; 2215 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS); 2216 __le16 msdu_id, *msdus; 2217 bool rssi_enabled = false; 2218 u8 msdu_count = 0, num_airtime_records, tid; 2219 int i, htt_pad = 0; 2220 struct htt_data_tx_compl_ppdu_dur *ppdu_info; 2221 struct ath10k_peer *peer; 2222 u16 ppdu_info_offset = 0, peer_id; 2223 u32 tx_duration; 2224 2225 switch (status) { 2226 case HTT_DATA_TX_STATUS_NO_ACK: 2227 tx_done.status = HTT_TX_COMPL_STATE_NOACK; 2228 break; 2229 case HTT_DATA_TX_STATUS_OK: 2230 tx_done.status = HTT_TX_COMPL_STATE_ACK; 2231 break; 2232 case HTT_DATA_TX_STATUS_DISCARD: 2233 case HTT_DATA_TX_STATUS_POSTPONE: 2234 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL: 2235 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 2236 break; 2237 default: 2238 ath10k_warn(ar, "unhandled tx completion status %d\n", status); 2239 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 2240 break; 2241 } 2242 2243 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n", 2244 resp->data_tx_completion.num_msdus); 2245 2246 msdu_count = resp->data_tx_completion.num_msdus; 2247 msdus = resp->data_tx_completion.msdus; 2248 rssi_enabled = ath10k_is_rssi_enable(&ar->hw_params, resp); 2249 2250 if (rssi_enabled) 2251 htt_pad = ath10k_tx_data_rssi_get_pad_bytes(&ar->hw_params, 2252 resp); 2253 2254 for (i = 0; i < msdu_count; i++) { 2255 msdu_id = msdus[i]; 2256 tx_done.msdu_id = __le16_to_cpu(msdu_id); 2257 2258 if (rssi_enabled) { 2259 /* Total no of MSDUs should be even, 2260 * if odd MSDUs are sent firmware fills 2261 * last msdu id with 0xffff 2262 */ 2263 if (msdu_count & 0x01) { 2264 msdu_id = msdus[msdu_count + i + 1 + htt_pad]; 2265 tx_done.ack_rssi = __le16_to_cpu(msdu_id); 2266 } else { 2267 msdu_id = msdus[msdu_count + i + htt_pad]; 2268 tx_done.ack_rssi = __le16_to_cpu(msdu_id); 2269 } 2270 } 2271 2272 /* kfifo_put: In practice firmware shouldn't fire off per-CE 2273 * interrupt and main interrupt (MSI/-X range case) for the same 2274 * HTC service so it should be safe to use kfifo_put w/o lock. 2275 * 2276 * From kfifo_put() documentation: 2277 * Note that with only one concurrent reader and one concurrent 2278 * writer, you don't need extra locking to use these macro. 2279 */ 2280 if (!kfifo_put(&htt->txdone_fifo, tx_done)) { 2281 ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n", 2282 tx_done.msdu_id, tx_done.status); 2283 ath10k_txrx_tx_unref(htt, &tx_done); 2284 } 2285 } 2286 2287 if (!(resp->data_tx_completion.flags2 & HTT_TX_CMPL_FLAG_PPDU_DURATION_PRESENT)) 2288 return; 2289 2290 ppdu_info_offset = (msdu_count & 0x01) ? msdu_count + 1 : msdu_count; 2291 2292 if (rssi_enabled) 2293 ppdu_info_offset += ppdu_info_offset; 2294 2295 if (resp->data_tx_completion.flags2 & 2296 (HTT_TX_CMPL_FLAG_PPID_PRESENT | HTT_TX_CMPL_FLAG_PA_PRESENT)) 2297 ppdu_info_offset += 2; 2298 2299 ppdu_info = (struct htt_data_tx_compl_ppdu_dur *)&msdus[ppdu_info_offset]; 2300 num_airtime_records = FIELD_GET(HTT_TX_COMPL_PPDU_DUR_INFO0_NUM_ENTRIES_MASK, 2301 __le32_to_cpu(ppdu_info->info0)); 2302 2303 for (i = 0; i < num_airtime_records; i++) { 2304 struct htt_data_tx_ppdu_dur *ppdu_dur; 2305 u32 info0; 2306 2307 ppdu_dur = &ppdu_info->ppdu_dur[i]; 2308 info0 = __le32_to_cpu(ppdu_dur->info0); 2309 2310 peer_id = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_PEER_ID_MASK, 2311 info0); 2312 rcu_read_lock(); 2313 spin_lock_bh(&ar->data_lock); 2314 2315 peer = ath10k_peer_find_by_id(ar, peer_id); 2316 if (!peer) { 2317 spin_unlock_bh(&ar->data_lock); 2318 rcu_read_unlock(); 2319 continue; 2320 } 2321 2322 tid = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_TID_MASK, info0); 2323 tx_duration = __le32_to_cpu(ppdu_dur->tx_duration); 2324 2325 ieee80211_sta_register_airtime(peer->sta, tid, tx_duration, 0); 2326 2327 spin_unlock_bh(&ar->data_lock); 2328 rcu_read_unlock(); 2329 } 2330 } 2331 2332 static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp) 2333 { 2334 struct htt_rx_addba *ev = &resp->rx_addba; 2335 struct ath10k_peer *peer; 2336 struct ath10k_vif *arvif; 2337 u16 info0, tid, peer_id; 2338 2339 info0 = __le16_to_cpu(ev->info0); 2340 tid = MS(info0, HTT_RX_BA_INFO0_TID); 2341 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 2342 2343 ath10k_dbg(ar, ATH10K_DBG_HTT, 2344 "htt rx addba tid %hu peer_id %hu size %hhu\n", 2345 tid, peer_id, ev->window_size); 2346 2347 spin_lock_bh(&ar->data_lock); 2348 peer = ath10k_peer_find_by_id(ar, peer_id); 2349 if (!peer) { 2350 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", 2351 peer_id); 2352 spin_unlock_bh(&ar->data_lock); 2353 return; 2354 } 2355 2356 arvif = ath10k_get_arvif(ar, peer->vdev_id); 2357 if (!arvif) { 2358 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 2359 peer->vdev_id); 2360 spin_unlock_bh(&ar->data_lock); 2361 return; 2362 } 2363 2364 ath10k_dbg(ar, ATH10K_DBG_HTT, 2365 "htt rx start rx ba session sta %pM tid %hu size %hhu\n", 2366 peer->addr, tid, ev->window_size); 2367 2368 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid); 2369 spin_unlock_bh(&ar->data_lock); 2370 } 2371 2372 static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp) 2373 { 2374 struct htt_rx_delba *ev = &resp->rx_delba; 2375 struct ath10k_peer *peer; 2376 struct ath10k_vif *arvif; 2377 u16 info0, tid, peer_id; 2378 2379 info0 = __le16_to_cpu(ev->info0); 2380 tid = MS(info0, HTT_RX_BA_INFO0_TID); 2381 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 2382 2383 ath10k_dbg(ar, ATH10K_DBG_HTT, 2384 "htt rx delba tid %hu peer_id %hu\n", 2385 tid, peer_id); 2386 2387 spin_lock_bh(&ar->data_lock); 2388 peer = ath10k_peer_find_by_id(ar, peer_id); 2389 if (!peer) { 2390 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", 2391 peer_id); 2392 spin_unlock_bh(&ar->data_lock); 2393 return; 2394 } 2395 2396 arvif = ath10k_get_arvif(ar, peer->vdev_id); 2397 if (!arvif) { 2398 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 2399 peer->vdev_id); 2400 spin_unlock_bh(&ar->data_lock); 2401 return; 2402 } 2403 2404 ath10k_dbg(ar, ATH10K_DBG_HTT, 2405 "htt rx stop rx ba session sta %pM tid %hu\n", 2406 peer->addr, tid); 2407 2408 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid); 2409 spin_unlock_bh(&ar->data_lock); 2410 } 2411 2412 static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list, 2413 struct sk_buff_head *amsdu) 2414 { 2415 struct sk_buff *msdu; 2416 struct htt_rx_desc *rxd; 2417 2418 if (skb_queue_empty(list)) 2419 return -ENOBUFS; 2420 2421 if (WARN_ON(!skb_queue_empty(amsdu))) 2422 return -EINVAL; 2423 2424 while ((msdu = __skb_dequeue(list))) { 2425 __skb_queue_tail(amsdu, msdu); 2426 2427 rxd = (void *)msdu->data - sizeof(*rxd); 2428 if (rxd->msdu_end.common.info0 & 2429 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)) 2430 break; 2431 } 2432 2433 msdu = skb_peek_tail(amsdu); 2434 rxd = (void *)msdu->data - sizeof(*rxd); 2435 if (!(rxd->msdu_end.common.info0 & 2436 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) { 2437 skb_queue_splice_init(amsdu, list); 2438 return -EAGAIN; 2439 } 2440 2441 return 0; 2442 } 2443 2444 static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status, 2445 struct sk_buff *skb) 2446 { 2447 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 2448 2449 if (!ieee80211_has_protected(hdr->frame_control)) 2450 return; 2451 2452 /* Offloaded frames are already decrypted but firmware insists they are 2453 * protected in the 802.11 header. Strip the flag. Otherwise mac80211 2454 * will drop the frame. 2455 */ 2456 2457 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 2458 status->flag |= RX_FLAG_DECRYPTED | 2459 RX_FLAG_IV_STRIPPED | 2460 RX_FLAG_MMIC_STRIPPED; 2461 } 2462 2463 static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar, 2464 struct sk_buff_head *list) 2465 { 2466 struct ath10k_htt *htt = &ar->htt; 2467 struct ieee80211_rx_status *status = &htt->rx_status; 2468 struct htt_rx_offload_msdu *rx; 2469 struct sk_buff *msdu; 2470 size_t offset; 2471 2472 while ((msdu = __skb_dequeue(list))) { 2473 /* Offloaded frames don't have Rx descriptor. Instead they have 2474 * a short meta information header. 2475 */ 2476 2477 rx = (void *)msdu->data; 2478 2479 skb_put(msdu, sizeof(*rx)); 2480 skb_pull(msdu, sizeof(*rx)); 2481 2482 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) { 2483 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n"); 2484 dev_kfree_skb_any(msdu); 2485 continue; 2486 } 2487 2488 skb_put(msdu, __le16_to_cpu(rx->msdu_len)); 2489 2490 /* Offloaded rx header length isn't multiple of 2 nor 4 so the 2491 * actual payload is unaligned. Align the frame. Otherwise 2492 * mac80211 complains. This shouldn't reduce performance much 2493 * because these offloaded frames are rare. 2494 */ 2495 offset = 4 - ((unsigned long)msdu->data & 3); 2496 skb_put(msdu, offset); 2497 memmove(msdu->data + offset, msdu->data, msdu->len); 2498 skb_pull(msdu, offset); 2499 2500 /* FIXME: The frame is NWifi. Re-construct QoS Control 2501 * if possible later. 2502 */ 2503 2504 memset(status, 0, sizeof(*status)); 2505 status->flag |= RX_FLAG_NO_SIGNAL_VAL; 2506 2507 ath10k_htt_rx_h_rx_offload_prot(status, msdu); 2508 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id); 2509 ath10k_htt_rx_h_queue_msdu(ar, status, msdu); 2510 } 2511 } 2512 2513 static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb) 2514 { 2515 struct ath10k_htt *htt = &ar->htt; 2516 struct htt_resp *resp = (void *)skb->data; 2517 struct ieee80211_rx_status *status = &htt->rx_status; 2518 struct sk_buff_head list; 2519 struct sk_buff_head amsdu; 2520 u16 peer_id; 2521 u16 msdu_count; 2522 u8 vdev_id; 2523 u8 tid; 2524 bool offload; 2525 bool frag; 2526 int ret; 2527 2528 lockdep_assert_held(&htt->rx_ring.lock); 2529 2530 if (htt->rx_confused) 2531 return -EIO; 2532 2533 skb_pull(skb, sizeof(resp->hdr)); 2534 skb_pull(skb, sizeof(resp->rx_in_ord_ind)); 2535 2536 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id); 2537 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count); 2538 vdev_id = resp->rx_in_ord_ind.vdev_id; 2539 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID); 2540 offload = !!(resp->rx_in_ord_ind.info & 2541 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 2542 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK); 2543 2544 ath10k_dbg(ar, ATH10K_DBG_HTT, 2545 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n", 2546 vdev_id, peer_id, tid, offload, frag, msdu_count); 2547 2548 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs32)) { 2549 ath10k_warn(ar, "dropping invalid in order rx indication\n"); 2550 return -EINVAL; 2551 } 2552 2553 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later 2554 * extracted and processed. 2555 */ 2556 __skb_queue_head_init(&list); 2557 if (ar->hw_params.target_64bit) 2558 ret = ath10k_htt_rx_pop_paddr64_list(htt, &resp->rx_in_ord_ind, 2559 &list); 2560 else 2561 ret = ath10k_htt_rx_pop_paddr32_list(htt, &resp->rx_in_ord_ind, 2562 &list); 2563 2564 if (ret < 0) { 2565 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret); 2566 htt->rx_confused = true; 2567 return -EIO; 2568 } 2569 2570 /* Offloaded frames are very different and need to be handled 2571 * separately. 2572 */ 2573 if (offload) 2574 ath10k_htt_rx_h_rx_offload(ar, &list); 2575 2576 while (!skb_queue_empty(&list)) { 2577 __skb_queue_head_init(&amsdu); 2578 ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu); 2579 switch (ret) { 2580 case 0: 2581 /* Note: The in-order indication may report interleaved 2582 * frames from different PPDUs meaning reported rx rate 2583 * to mac80211 isn't accurate/reliable. It's still 2584 * better to report something than nothing though. This 2585 * should still give an idea about rx rate to the user. 2586 */ 2587 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id); 2588 ath10k_htt_rx_h_filter(ar, &amsdu, status, NULL); 2589 ath10k_htt_rx_h_mpdu(ar, &amsdu, status, false, NULL, 2590 NULL); 2591 ath10k_htt_rx_h_enqueue(ar, &amsdu, status); 2592 break; 2593 case -EAGAIN: 2594 /* fall through */ 2595 default: 2596 /* Should not happen. */ 2597 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret); 2598 htt->rx_confused = true; 2599 __skb_queue_purge(&list); 2600 return -EIO; 2601 } 2602 } 2603 return ret; 2604 } 2605 2606 static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar, 2607 const __le32 *resp_ids, 2608 int num_resp_ids) 2609 { 2610 int i; 2611 u32 resp_id; 2612 2613 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n", 2614 num_resp_ids); 2615 2616 for (i = 0; i < num_resp_ids; i++) { 2617 resp_id = le32_to_cpu(resp_ids[i]); 2618 2619 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n", 2620 resp_id); 2621 2622 /* TODO: free resp_id */ 2623 } 2624 } 2625 2626 static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb) 2627 { 2628 struct ieee80211_hw *hw = ar->hw; 2629 struct ieee80211_txq *txq; 2630 struct htt_resp *resp = (struct htt_resp *)skb->data; 2631 struct htt_tx_fetch_record *record; 2632 size_t len; 2633 size_t max_num_bytes; 2634 size_t max_num_msdus; 2635 size_t num_bytes; 2636 size_t num_msdus; 2637 const __le32 *resp_ids; 2638 u16 num_records; 2639 u16 num_resp_ids; 2640 u16 peer_id; 2641 u8 tid; 2642 int ret; 2643 int i; 2644 bool may_tx; 2645 2646 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n"); 2647 2648 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind); 2649 if (unlikely(skb->len < len)) { 2650 ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n"); 2651 return; 2652 } 2653 2654 num_records = le16_to_cpu(resp->tx_fetch_ind.num_records); 2655 num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids); 2656 2657 len += sizeof(resp->tx_fetch_ind.records[0]) * num_records; 2658 len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids; 2659 2660 if (unlikely(skb->len < len)) { 2661 ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n"); 2662 return; 2663 } 2664 2665 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n", 2666 num_records, num_resp_ids, 2667 le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num)); 2668 2669 if (!ar->htt.tx_q_state.enabled) { 2670 ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n"); 2671 return; 2672 } 2673 2674 if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) { 2675 ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n"); 2676 return; 2677 } 2678 2679 rcu_read_lock(); 2680 2681 for (i = 0; i < num_records; i++) { 2682 record = &resp->tx_fetch_ind.records[i]; 2683 peer_id = MS(le16_to_cpu(record->info), 2684 HTT_TX_FETCH_RECORD_INFO_PEER_ID); 2685 tid = MS(le16_to_cpu(record->info), 2686 HTT_TX_FETCH_RECORD_INFO_TID); 2687 max_num_msdus = le16_to_cpu(record->num_msdus); 2688 max_num_bytes = le32_to_cpu(record->num_bytes); 2689 2690 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n", 2691 i, peer_id, tid, max_num_msdus, max_num_bytes); 2692 2693 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) || 2694 unlikely(tid >= ar->htt.tx_q_state.num_tids)) { 2695 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n", 2696 peer_id, tid); 2697 continue; 2698 } 2699 2700 spin_lock_bh(&ar->data_lock); 2701 txq = ath10k_mac_txq_lookup(ar, peer_id, tid); 2702 spin_unlock_bh(&ar->data_lock); 2703 2704 /* It is okay to release the lock and use txq because RCU read 2705 * lock is held. 2706 */ 2707 2708 if (unlikely(!txq)) { 2709 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n", 2710 peer_id, tid); 2711 continue; 2712 } 2713 2714 num_msdus = 0; 2715 num_bytes = 0; 2716 2717 ieee80211_txq_schedule_start(hw, txq->ac); 2718 may_tx = ieee80211_txq_may_transmit(hw, txq); 2719 while (num_msdus < max_num_msdus && 2720 num_bytes < max_num_bytes) { 2721 if (!may_tx) 2722 break; 2723 2724 ret = ath10k_mac_tx_push_txq(hw, txq); 2725 if (ret < 0) 2726 break; 2727 2728 num_msdus++; 2729 num_bytes += ret; 2730 } 2731 ieee80211_return_txq(hw, txq, false); 2732 ieee80211_txq_schedule_end(hw, txq->ac); 2733 2734 record->num_msdus = cpu_to_le16(num_msdus); 2735 record->num_bytes = cpu_to_le32(num_bytes); 2736 2737 ath10k_htt_tx_txq_recalc(hw, txq); 2738 } 2739 2740 rcu_read_unlock(); 2741 2742 resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind); 2743 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids); 2744 2745 ret = ath10k_htt_tx_fetch_resp(ar, 2746 resp->tx_fetch_ind.token, 2747 resp->tx_fetch_ind.fetch_seq_num, 2748 resp->tx_fetch_ind.records, 2749 num_records); 2750 if (unlikely(ret)) { 2751 ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n", 2752 le32_to_cpu(resp->tx_fetch_ind.token), ret); 2753 /* FIXME: request fw restart */ 2754 } 2755 2756 ath10k_htt_tx_txq_sync(ar); 2757 } 2758 2759 static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar, 2760 struct sk_buff *skb) 2761 { 2762 const struct htt_resp *resp = (void *)skb->data; 2763 size_t len; 2764 int num_resp_ids; 2765 2766 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n"); 2767 2768 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm); 2769 if (unlikely(skb->len < len)) { 2770 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n"); 2771 return; 2772 } 2773 2774 num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids); 2775 len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids; 2776 2777 if (unlikely(skb->len < len)) { 2778 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n"); 2779 return; 2780 } 2781 2782 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, 2783 resp->tx_fetch_confirm.resp_ids, 2784 num_resp_ids); 2785 } 2786 2787 static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar, 2788 struct sk_buff *skb) 2789 { 2790 const struct htt_resp *resp = (void *)skb->data; 2791 const struct htt_tx_mode_switch_record *record; 2792 struct ieee80211_txq *txq; 2793 struct ath10k_txq *artxq; 2794 size_t len; 2795 size_t num_records; 2796 enum htt_tx_mode_switch_mode mode; 2797 bool enable; 2798 u16 info0; 2799 u16 info1; 2800 u16 threshold; 2801 u16 peer_id; 2802 u8 tid; 2803 int i; 2804 2805 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n"); 2806 2807 len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind); 2808 if (unlikely(skb->len < len)) { 2809 ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n"); 2810 return; 2811 } 2812 2813 info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0); 2814 info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1); 2815 2816 enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE); 2817 num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD); 2818 mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE); 2819 threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD); 2820 2821 ath10k_dbg(ar, ATH10K_DBG_HTT, 2822 "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n", 2823 info0, info1, enable, num_records, mode, threshold); 2824 2825 len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records; 2826 2827 if (unlikely(skb->len < len)) { 2828 ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n"); 2829 return; 2830 } 2831 2832 switch (mode) { 2833 case HTT_TX_MODE_SWITCH_PUSH: 2834 case HTT_TX_MODE_SWITCH_PUSH_PULL: 2835 break; 2836 default: 2837 ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n", 2838 mode); 2839 return; 2840 } 2841 2842 if (!enable) 2843 return; 2844 2845 ar->htt.tx_q_state.enabled = enable; 2846 ar->htt.tx_q_state.mode = mode; 2847 ar->htt.tx_q_state.num_push_allowed = threshold; 2848 2849 rcu_read_lock(); 2850 2851 for (i = 0; i < num_records; i++) { 2852 record = &resp->tx_mode_switch_ind.records[i]; 2853 info0 = le16_to_cpu(record->info0); 2854 peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID); 2855 tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID); 2856 2857 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) || 2858 unlikely(tid >= ar->htt.tx_q_state.num_tids)) { 2859 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n", 2860 peer_id, tid); 2861 continue; 2862 } 2863 2864 spin_lock_bh(&ar->data_lock); 2865 txq = ath10k_mac_txq_lookup(ar, peer_id, tid); 2866 spin_unlock_bh(&ar->data_lock); 2867 2868 /* It is okay to release the lock and use txq because RCU read 2869 * lock is held. 2870 */ 2871 2872 if (unlikely(!txq)) { 2873 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n", 2874 peer_id, tid); 2875 continue; 2876 } 2877 2878 spin_lock_bh(&ar->htt.tx_lock); 2879 artxq = (void *)txq->drv_priv; 2880 artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus); 2881 spin_unlock_bh(&ar->htt.tx_lock); 2882 } 2883 2884 rcu_read_unlock(); 2885 2886 ath10k_mac_tx_push_pending(ar); 2887 } 2888 2889 void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) 2890 { 2891 bool release; 2892 2893 release = ath10k_htt_t2h_msg_handler(ar, skb); 2894 2895 /* Free the indication buffer */ 2896 if (release) 2897 dev_kfree_skb_any(skb); 2898 } 2899 2900 static inline s8 ath10k_get_legacy_rate_idx(struct ath10k *ar, u8 rate) 2901 { 2902 static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12, 2903 18, 24, 36, 48, 54}; 2904 int i; 2905 2906 for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) { 2907 if (rate == legacy_rates[i]) 2908 return i; 2909 } 2910 2911 ath10k_warn(ar, "Invalid legacy rate %hhd peer stats", rate); 2912 return -EINVAL; 2913 } 2914 2915 static void 2916 ath10k_accumulate_per_peer_tx_stats(struct ath10k *ar, 2917 struct ath10k_sta *arsta, 2918 struct ath10k_per_peer_tx_stats *pstats, 2919 s8 legacy_rate_idx) 2920 { 2921 struct rate_info *txrate = &arsta->txrate; 2922 struct ath10k_htt_tx_stats *tx_stats; 2923 int idx, ht_idx, gi, mcs, bw, nss; 2924 unsigned long flags; 2925 2926 if (!arsta->tx_stats) 2927 return; 2928 2929 tx_stats = arsta->tx_stats; 2930 flags = txrate->flags; 2931 gi = test_bit(ATH10K_RATE_INFO_FLAGS_SGI_BIT, &flags); 2932 mcs = ATH10K_HW_MCS_RATE(pstats->ratecode); 2933 bw = txrate->bw; 2934 nss = txrate->nss; 2935 ht_idx = mcs + (nss - 1) * 8; 2936 idx = mcs * 8 + 8 * 10 * (nss - 1); 2937 idx += bw * 2 + gi; 2938 2939 #define STATS_OP_FMT(name) tx_stats->stats[ATH10K_STATS_TYPE_##name] 2940 2941 if (txrate->flags == RATE_INFO_FLAGS_VHT_MCS) { 2942 STATS_OP_FMT(SUCC).vht[0][mcs] += pstats->succ_bytes; 2943 STATS_OP_FMT(SUCC).vht[1][mcs] += pstats->succ_pkts; 2944 STATS_OP_FMT(FAIL).vht[0][mcs] += pstats->failed_bytes; 2945 STATS_OP_FMT(FAIL).vht[1][mcs] += pstats->failed_pkts; 2946 STATS_OP_FMT(RETRY).vht[0][mcs] += pstats->retry_bytes; 2947 STATS_OP_FMT(RETRY).vht[1][mcs] += pstats->retry_pkts; 2948 } else if (txrate->flags == RATE_INFO_FLAGS_MCS) { 2949 STATS_OP_FMT(SUCC).ht[0][ht_idx] += pstats->succ_bytes; 2950 STATS_OP_FMT(SUCC).ht[1][ht_idx] += pstats->succ_pkts; 2951 STATS_OP_FMT(FAIL).ht[0][ht_idx] += pstats->failed_bytes; 2952 STATS_OP_FMT(FAIL).ht[1][ht_idx] += pstats->failed_pkts; 2953 STATS_OP_FMT(RETRY).ht[0][ht_idx] += pstats->retry_bytes; 2954 STATS_OP_FMT(RETRY).ht[1][ht_idx] += pstats->retry_pkts; 2955 } else { 2956 mcs = legacy_rate_idx; 2957 2958 STATS_OP_FMT(SUCC).legacy[0][mcs] += pstats->succ_bytes; 2959 STATS_OP_FMT(SUCC).legacy[1][mcs] += pstats->succ_pkts; 2960 STATS_OP_FMT(FAIL).legacy[0][mcs] += pstats->failed_bytes; 2961 STATS_OP_FMT(FAIL).legacy[1][mcs] += pstats->failed_pkts; 2962 STATS_OP_FMT(RETRY).legacy[0][mcs] += pstats->retry_bytes; 2963 STATS_OP_FMT(RETRY).legacy[1][mcs] += pstats->retry_pkts; 2964 } 2965 2966 if (ATH10K_HW_AMPDU(pstats->flags)) { 2967 tx_stats->ba_fails += ATH10K_HW_BA_FAIL(pstats->flags); 2968 2969 if (txrate->flags == RATE_INFO_FLAGS_MCS) { 2970 STATS_OP_FMT(AMPDU).ht[0][ht_idx] += 2971 pstats->succ_bytes + pstats->retry_bytes; 2972 STATS_OP_FMT(AMPDU).ht[1][ht_idx] += 2973 pstats->succ_pkts + pstats->retry_pkts; 2974 } else { 2975 STATS_OP_FMT(AMPDU).vht[0][mcs] += 2976 pstats->succ_bytes + pstats->retry_bytes; 2977 STATS_OP_FMT(AMPDU).vht[1][mcs] += 2978 pstats->succ_pkts + pstats->retry_pkts; 2979 } 2980 STATS_OP_FMT(AMPDU).bw[0][bw] += 2981 pstats->succ_bytes + pstats->retry_bytes; 2982 STATS_OP_FMT(AMPDU).nss[0][nss - 1] += 2983 pstats->succ_bytes + pstats->retry_bytes; 2984 STATS_OP_FMT(AMPDU).gi[0][gi] += 2985 pstats->succ_bytes + pstats->retry_bytes; 2986 STATS_OP_FMT(AMPDU).rate_table[0][idx] += 2987 pstats->succ_bytes + pstats->retry_bytes; 2988 STATS_OP_FMT(AMPDU).bw[1][bw] += 2989 pstats->succ_pkts + pstats->retry_pkts; 2990 STATS_OP_FMT(AMPDU).nss[1][nss - 1] += 2991 pstats->succ_pkts + pstats->retry_pkts; 2992 STATS_OP_FMT(AMPDU).gi[1][gi] += 2993 pstats->succ_pkts + pstats->retry_pkts; 2994 STATS_OP_FMT(AMPDU).rate_table[1][idx] += 2995 pstats->succ_pkts + pstats->retry_pkts; 2996 } else { 2997 tx_stats->ack_fails += 2998 ATH10K_HW_BA_FAIL(pstats->flags); 2999 } 3000 3001 STATS_OP_FMT(SUCC).bw[0][bw] += pstats->succ_bytes; 3002 STATS_OP_FMT(SUCC).nss[0][nss - 1] += pstats->succ_bytes; 3003 STATS_OP_FMT(SUCC).gi[0][gi] += pstats->succ_bytes; 3004 3005 STATS_OP_FMT(SUCC).bw[1][bw] += pstats->succ_pkts; 3006 STATS_OP_FMT(SUCC).nss[1][nss - 1] += pstats->succ_pkts; 3007 STATS_OP_FMT(SUCC).gi[1][gi] += pstats->succ_pkts; 3008 3009 STATS_OP_FMT(FAIL).bw[0][bw] += pstats->failed_bytes; 3010 STATS_OP_FMT(FAIL).nss[0][nss - 1] += pstats->failed_bytes; 3011 STATS_OP_FMT(FAIL).gi[0][gi] += pstats->failed_bytes; 3012 3013 STATS_OP_FMT(FAIL).bw[1][bw] += pstats->failed_pkts; 3014 STATS_OP_FMT(FAIL).nss[1][nss - 1] += pstats->failed_pkts; 3015 STATS_OP_FMT(FAIL).gi[1][gi] += pstats->failed_pkts; 3016 3017 STATS_OP_FMT(RETRY).bw[0][bw] += pstats->retry_bytes; 3018 STATS_OP_FMT(RETRY).nss[0][nss - 1] += pstats->retry_bytes; 3019 STATS_OP_FMT(RETRY).gi[0][gi] += pstats->retry_bytes; 3020 3021 STATS_OP_FMT(RETRY).bw[1][bw] += pstats->retry_pkts; 3022 STATS_OP_FMT(RETRY).nss[1][nss - 1] += pstats->retry_pkts; 3023 STATS_OP_FMT(RETRY).gi[1][gi] += pstats->retry_pkts; 3024 3025 if (txrate->flags >= RATE_INFO_FLAGS_MCS) { 3026 STATS_OP_FMT(SUCC).rate_table[0][idx] += pstats->succ_bytes; 3027 STATS_OP_FMT(SUCC).rate_table[1][idx] += pstats->succ_pkts; 3028 STATS_OP_FMT(FAIL).rate_table[0][idx] += pstats->failed_bytes; 3029 STATS_OP_FMT(FAIL).rate_table[1][idx] += pstats->failed_pkts; 3030 STATS_OP_FMT(RETRY).rate_table[0][idx] += pstats->retry_bytes; 3031 STATS_OP_FMT(RETRY).rate_table[1][idx] += pstats->retry_pkts; 3032 } 3033 3034 tx_stats->tx_duration += pstats->duration; 3035 } 3036 3037 static void 3038 ath10k_update_per_peer_tx_stats(struct ath10k *ar, 3039 struct ieee80211_sta *sta, 3040 struct ath10k_per_peer_tx_stats *peer_stats) 3041 { 3042 struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv; 3043 struct ieee80211_chanctx_conf *conf = NULL; 3044 u8 rate = 0, sgi; 3045 s8 rate_idx = 0; 3046 bool skip_auto_rate; 3047 struct rate_info txrate; 3048 3049 lockdep_assert_held(&ar->data_lock); 3050 3051 txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode); 3052 txrate.bw = ATH10K_HW_BW(peer_stats->flags); 3053 txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode); 3054 txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode); 3055 sgi = ATH10K_HW_GI(peer_stats->flags); 3056 skip_auto_rate = ATH10K_FW_SKIPPED_RATE_CTRL(peer_stats->flags); 3057 3058 /* Firmware's rate control skips broadcast/management frames, 3059 * if host has configure fixed rates and in some other special cases. 3060 */ 3061 if (skip_auto_rate) 3062 return; 3063 3064 if (txrate.flags == WMI_RATE_PREAMBLE_VHT && txrate.mcs > 9) { 3065 ath10k_warn(ar, "Invalid VHT mcs %hhd peer stats", txrate.mcs); 3066 return; 3067 } 3068 3069 if (txrate.flags == WMI_RATE_PREAMBLE_HT && 3070 (txrate.mcs > 7 || txrate.nss < 1)) { 3071 ath10k_warn(ar, "Invalid HT mcs %hhd nss %hhd peer stats", 3072 txrate.mcs, txrate.nss); 3073 return; 3074 } 3075 3076 memset(&arsta->txrate, 0, sizeof(arsta->txrate)); 3077 memset(&arsta->tx_info.status, 0, sizeof(arsta->tx_info.status)); 3078 if (txrate.flags == WMI_RATE_PREAMBLE_CCK || 3079 txrate.flags == WMI_RATE_PREAMBLE_OFDM) { 3080 rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode); 3081 /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */ 3082 if (rate == 6 && txrate.flags == WMI_RATE_PREAMBLE_CCK) 3083 rate = 5; 3084 rate_idx = ath10k_get_legacy_rate_idx(ar, rate); 3085 if (rate_idx < 0) 3086 return; 3087 arsta->txrate.legacy = rate; 3088 } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) { 3089 arsta->txrate.flags = RATE_INFO_FLAGS_MCS; 3090 arsta->txrate.mcs = txrate.mcs + 8 * (txrate.nss - 1); 3091 } else { 3092 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS; 3093 arsta->txrate.mcs = txrate.mcs; 3094 } 3095 3096 switch (txrate.flags) { 3097 case WMI_RATE_PREAMBLE_OFDM: 3098 if (arsta->arvif && arsta->arvif->vif) 3099 conf = rcu_dereference(arsta->arvif->vif->chanctx_conf); 3100 if (conf && conf->def.chan->band == NL80211_BAND_5GHZ) 3101 arsta->tx_info.status.rates[0].idx = rate_idx - 4; 3102 break; 3103 case WMI_RATE_PREAMBLE_CCK: 3104 arsta->tx_info.status.rates[0].idx = rate_idx; 3105 if (sgi) 3106 arsta->tx_info.status.rates[0].flags |= 3107 (IEEE80211_TX_RC_USE_SHORT_PREAMBLE | 3108 IEEE80211_TX_RC_SHORT_GI); 3109 break; 3110 case WMI_RATE_PREAMBLE_HT: 3111 arsta->tx_info.status.rates[0].idx = 3112 txrate.mcs + ((txrate.nss - 1) * 8); 3113 if (sgi) 3114 arsta->tx_info.status.rates[0].flags |= 3115 IEEE80211_TX_RC_SHORT_GI; 3116 arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_MCS; 3117 break; 3118 case WMI_RATE_PREAMBLE_VHT: 3119 ieee80211_rate_set_vht(&arsta->tx_info.status.rates[0], 3120 txrate.mcs, txrate.nss); 3121 if (sgi) 3122 arsta->tx_info.status.rates[0].flags |= 3123 IEEE80211_TX_RC_SHORT_GI; 3124 arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_VHT_MCS; 3125 break; 3126 } 3127 3128 arsta->txrate.nss = txrate.nss; 3129 arsta->txrate.bw = ath10k_bw_to_mac80211_bw(txrate.bw); 3130 arsta->last_tx_bitrate = cfg80211_calculate_bitrate(&arsta->txrate); 3131 if (sgi) 3132 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; 3133 3134 switch (arsta->txrate.bw) { 3135 case RATE_INFO_BW_40: 3136 arsta->tx_info.status.rates[0].flags |= 3137 IEEE80211_TX_RC_40_MHZ_WIDTH; 3138 break; 3139 case RATE_INFO_BW_80: 3140 arsta->tx_info.status.rates[0].flags |= 3141 IEEE80211_TX_RC_80_MHZ_WIDTH; 3142 break; 3143 } 3144 3145 if (peer_stats->succ_pkts) { 3146 arsta->tx_info.flags = IEEE80211_TX_STAT_ACK; 3147 arsta->tx_info.status.rates[0].count = 1; 3148 ieee80211_tx_rate_update(ar->hw, sta, &arsta->tx_info); 3149 } 3150 3151 if (ath10k_debug_is_extd_tx_stats_enabled(ar)) 3152 ath10k_accumulate_per_peer_tx_stats(ar, arsta, peer_stats, 3153 rate_idx); 3154 } 3155 3156 static void ath10k_htt_fetch_peer_stats(struct ath10k *ar, 3157 struct sk_buff *skb) 3158 { 3159 struct htt_resp *resp = (struct htt_resp *)skb->data; 3160 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats; 3161 struct htt_per_peer_tx_stats_ind *tx_stats; 3162 struct ieee80211_sta *sta; 3163 struct ath10k_peer *peer; 3164 int peer_id, i; 3165 u8 ppdu_len, num_ppdu; 3166 3167 num_ppdu = resp->peer_tx_stats.num_ppdu; 3168 ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32); 3169 3170 if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) { 3171 ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len); 3172 return; 3173 } 3174 3175 tx_stats = (struct htt_per_peer_tx_stats_ind *) 3176 (resp->peer_tx_stats.payload); 3177 peer_id = __le16_to_cpu(tx_stats->peer_id); 3178 3179 rcu_read_lock(); 3180 spin_lock_bh(&ar->data_lock); 3181 peer = ath10k_peer_find_by_id(ar, peer_id); 3182 if (!peer || !peer->sta) { 3183 ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n", 3184 peer_id); 3185 goto out; 3186 } 3187 3188 sta = peer->sta; 3189 for (i = 0; i < num_ppdu; i++) { 3190 tx_stats = (struct htt_per_peer_tx_stats_ind *) 3191 (resp->peer_tx_stats.payload + i * ppdu_len); 3192 3193 p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes); 3194 p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes); 3195 p_tx_stats->failed_bytes = 3196 __le32_to_cpu(tx_stats->failed_bytes); 3197 p_tx_stats->ratecode = tx_stats->ratecode; 3198 p_tx_stats->flags = tx_stats->flags; 3199 p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts); 3200 p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts); 3201 p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts); 3202 p_tx_stats->duration = __le16_to_cpu(tx_stats->tx_duration); 3203 3204 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats); 3205 } 3206 3207 out: 3208 spin_unlock_bh(&ar->data_lock); 3209 rcu_read_unlock(); 3210 } 3211 3212 static void ath10k_fetch_10_2_tx_stats(struct ath10k *ar, u8 *data) 3213 { 3214 struct ath10k_pktlog_hdr *hdr = (struct ath10k_pktlog_hdr *)data; 3215 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats; 3216 struct ath10k_10_2_peer_tx_stats *tx_stats; 3217 struct ieee80211_sta *sta; 3218 struct ath10k_peer *peer; 3219 u16 log_type = __le16_to_cpu(hdr->log_type); 3220 u32 peer_id = 0, i; 3221 3222 if (log_type != ATH_PKTLOG_TYPE_TX_STAT) 3223 return; 3224 3225 tx_stats = (struct ath10k_10_2_peer_tx_stats *)((hdr->payload) + 3226 ATH10K_10_2_TX_STATS_OFFSET); 3227 3228 if (!tx_stats->tx_ppdu_cnt) 3229 return; 3230 3231 peer_id = tx_stats->peer_id; 3232 3233 rcu_read_lock(); 3234 spin_lock_bh(&ar->data_lock); 3235 peer = ath10k_peer_find_by_id(ar, peer_id); 3236 if (!peer || !peer->sta) { 3237 ath10k_warn(ar, "Invalid peer id %d in peer stats buffer\n", 3238 peer_id); 3239 goto out; 3240 } 3241 3242 sta = peer->sta; 3243 for (i = 0; i < tx_stats->tx_ppdu_cnt; i++) { 3244 p_tx_stats->succ_bytes = 3245 __le16_to_cpu(tx_stats->success_bytes[i]); 3246 p_tx_stats->retry_bytes = 3247 __le16_to_cpu(tx_stats->retry_bytes[i]); 3248 p_tx_stats->failed_bytes = 3249 __le16_to_cpu(tx_stats->failed_bytes[i]); 3250 p_tx_stats->ratecode = tx_stats->ratecode[i]; 3251 p_tx_stats->flags = tx_stats->flags[i]; 3252 p_tx_stats->succ_pkts = tx_stats->success_pkts[i]; 3253 p_tx_stats->retry_pkts = tx_stats->retry_pkts[i]; 3254 p_tx_stats->failed_pkts = tx_stats->failed_pkts[i]; 3255 3256 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats); 3257 } 3258 spin_unlock_bh(&ar->data_lock); 3259 rcu_read_unlock(); 3260 3261 return; 3262 3263 out: 3264 spin_unlock_bh(&ar->data_lock); 3265 rcu_read_unlock(); 3266 } 3267 3268 bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) 3269 { 3270 struct ath10k_htt *htt = &ar->htt; 3271 struct htt_resp *resp = (struct htt_resp *)skb->data; 3272 enum htt_t2h_msg_type type; 3273 3274 /* confirm alignment */ 3275 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 3276 ath10k_warn(ar, "unaligned htt message, expect trouble\n"); 3277 3278 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n", 3279 resp->hdr.msg_type); 3280 3281 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) { 3282 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X", 3283 resp->hdr.msg_type, ar->htt.t2h_msg_types_max); 3284 return true; 3285 } 3286 type = ar->htt.t2h_msg_types[resp->hdr.msg_type]; 3287 3288 switch (type) { 3289 case HTT_T2H_MSG_TYPE_VERSION_CONF: { 3290 htt->target_version_major = resp->ver_resp.major; 3291 htt->target_version_minor = resp->ver_resp.minor; 3292 complete(&htt->target_version_received); 3293 break; 3294 } 3295 case HTT_T2H_MSG_TYPE_RX_IND: 3296 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) 3297 return ath10k_htt_rx_proc_rx_ind_hl(htt, 3298 &resp->rx_ind_hl, 3299 skb); 3300 else 3301 ath10k_htt_rx_proc_rx_ind_ll(htt, &resp->rx_ind); 3302 break; 3303 case HTT_T2H_MSG_TYPE_PEER_MAP: { 3304 struct htt_peer_map_event ev = { 3305 .vdev_id = resp->peer_map.vdev_id, 3306 .peer_id = __le16_to_cpu(resp->peer_map.peer_id), 3307 }; 3308 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr)); 3309 ath10k_peer_map_event(htt, &ev); 3310 break; 3311 } 3312 case HTT_T2H_MSG_TYPE_PEER_UNMAP: { 3313 struct htt_peer_unmap_event ev = { 3314 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id), 3315 }; 3316 ath10k_peer_unmap_event(htt, &ev); 3317 break; 3318 } 3319 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: { 3320 struct htt_tx_done tx_done = {}; 3321 int status = __le32_to_cpu(resp->mgmt_tx_completion.status); 3322 int info = __le32_to_cpu(resp->mgmt_tx_completion.info); 3323 3324 tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id); 3325 3326 switch (status) { 3327 case HTT_MGMT_TX_STATUS_OK: 3328 tx_done.status = HTT_TX_COMPL_STATE_ACK; 3329 if (test_bit(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, 3330 ar->wmi.svc_map) && 3331 (resp->mgmt_tx_completion.flags & 3332 HTT_MGMT_TX_CMPL_FLAG_ACK_RSSI)) { 3333 tx_done.ack_rssi = 3334 FIELD_GET(HTT_MGMT_TX_CMPL_INFO_ACK_RSSI_MASK, 3335 info); 3336 } 3337 break; 3338 case HTT_MGMT_TX_STATUS_RETRY: 3339 tx_done.status = HTT_TX_COMPL_STATE_NOACK; 3340 break; 3341 case HTT_MGMT_TX_STATUS_DROP: 3342 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 3343 break; 3344 } 3345 3346 status = ath10k_txrx_tx_unref(htt, &tx_done); 3347 if (!status) { 3348 spin_lock_bh(&htt->tx_lock); 3349 ath10k_htt_tx_mgmt_dec_pending(htt); 3350 spin_unlock_bh(&htt->tx_lock); 3351 } 3352 break; 3353 } 3354 case HTT_T2H_MSG_TYPE_TX_COMPL_IND: 3355 ath10k_htt_rx_tx_compl_ind(htt->ar, skb); 3356 break; 3357 case HTT_T2H_MSG_TYPE_SEC_IND: { 3358 struct ath10k *ar = htt->ar; 3359 struct htt_security_indication *ev = &resp->security_indication; 3360 3361 ath10k_dbg(ar, ATH10K_DBG_HTT, 3362 "sec ind peer_id %d unicast %d type %d\n", 3363 __le16_to_cpu(ev->peer_id), 3364 !!(ev->flags & HTT_SECURITY_IS_UNICAST), 3365 MS(ev->flags, HTT_SECURITY_TYPE)); 3366 complete(&ar->install_key_done); 3367 break; 3368 } 3369 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: { 3370 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 3371 skb->data, skb->len); 3372 atomic_inc(&htt->num_mpdus_ready); 3373 break; 3374 } 3375 case HTT_T2H_MSG_TYPE_TEST: 3376 break; 3377 case HTT_T2H_MSG_TYPE_STATS_CONF: 3378 trace_ath10k_htt_stats(ar, skb->data, skb->len); 3379 break; 3380 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND: 3381 /* Firmware can return tx frames if it's unable to fully 3382 * process them and suspects host may be able to fix it. ath10k 3383 * sends all tx frames as already inspected so this shouldn't 3384 * happen unless fw has a bug. 3385 */ 3386 ath10k_warn(ar, "received an unexpected htt tx inspect event\n"); 3387 break; 3388 case HTT_T2H_MSG_TYPE_RX_ADDBA: 3389 ath10k_htt_rx_addba(ar, resp); 3390 break; 3391 case HTT_T2H_MSG_TYPE_RX_DELBA: 3392 ath10k_htt_rx_delba(ar, resp); 3393 break; 3394 case HTT_T2H_MSG_TYPE_PKTLOG: { 3395 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload, 3396 skb->len - 3397 offsetof(struct htt_resp, 3398 pktlog_msg.payload)); 3399 3400 if (ath10k_peer_stats_enabled(ar)) 3401 ath10k_fetch_10_2_tx_stats(ar, 3402 resp->pktlog_msg.payload); 3403 break; 3404 } 3405 case HTT_T2H_MSG_TYPE_RX_FLUSH: { 3406 /* Ignore this event because mac80211 takes care of Rx 3407 * aggregation reordering. 3408 */ 3409 break; 3410 } 3411 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: { 3412 skb_queue_tail(&htt->rx_in_ord_compl_q, skb); 3413 return false; 3414 } 3415 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND: 3416 break; 3417 case HTT_T2H_MSG_TYPE_CHAN_CHANGE: { 3418 u32 phymode = __le32_to_cpu(resp->chan_change.phymode); 3419 u32 freq = __le32_to_cpu(resp->chan_change.freq); 3420 3421 ar->tgt_oper_chan = ieee80211_get_channel(ar->hw->wiphy, freq); 3422 ath10k_dbg(ar, ATH10K_DBG_HTT, 3423 "htt chan change freq %u phymode %s\n", 3424 freq, ath10k_wmi_phymode_str(phymode)); 3425 break; 3426 } 3427 case HTT_T2H_MSG_TYPE_AGGR_CONF: 3428 break; 3429 case HTT_T2H_MSG_TYPE_TX_FETCH_IND: { 3430 struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC); 3431 3432 if (!tx_fetch_ind) { 3433 ath10k_warn(ar, "failed to copy htt tx fetch ind\n"); 3434 break; 3435 } 3436 skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind); 3437 break; 3438 } 3439 case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM: 3440 ath10k_htt_rx_tx_fetch_confirm(ar, skb); 3441 break; 3442 case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND: 3443 ath10k_htt_rx_tx_mode_switch_ind(ar, skb); 3444 break; 3445 case HTT_T2H_MSG_TYPE_PEER_STATS: 3446 ath10k_htt_fetch_peer_stats(ar, skb); 3447 break; 3448 case HTT_T2H_MSG_TYPE_EN_STATS: 3449 default: 3450 ath10k_warn(ar, "htt event (%d) not handled\n", 3451 resp->hdr.msg_type); 3452 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 3453 skb->data, skb->len); 3454 break; 3455 } 3456 return true; 3457 } 3458 EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler); 3459 3460 void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar, 3461 struct sk_buff *skb) 3462 { 3463 trace_ath10k_htt_pktlog(ar, skb->data, skb->len); 3464 dev_kfree_skb_any(skb); 3465 } 3466 EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler); 3467 3468 static int ath10k_htt_rx_deliver_msdu(struct ath10k *ar, int quota, int budget) 3469 { 3470 struct sk_buff *skb; 3471 3472 while (quota < budget) { 3473 if (skb_queue_empty(&ar->htt.rx_msdus_q)) 3474 break; 3475 3476 skb = skb_dequeue(&ar->htt.rx_msdus_q); 3477 if (!skb) 3478 break; 3479 ath10k_process_rx(ar, skb); 3480 quota++; 3481 } 3482 3483 return quota; 3484 } 3485 3486 int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget) 3487 { 3488 struct ath10k_htt *htt = &ar->htt; 3489 struct htt_tx_done tx_done = {}; 3490 struct sk_buff_head tx_ind_q; 3491 struct sk_buff *skb; 3492 unsigned long flags; 3493 int quota = 0, done, ret; 3494 bool resched_napi = false; 3495 3496 __skb_queue_head_init(&tx_ind_q); 3497 3498 /* Process pending frames before dequeuing more data 3499 * from hardware. 3500 */ 3501 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget); 3502 if (quota == budget) { 3503 resched_napi = true; 3504 goto exit; 3505 } 3506 3507 while ((skb = skb_dequeue(&htt->rx_in_ord_compl_q))) { 3508 spin_lock_bh(&htt->rx_ring.lock); 3509 ret = ath10k_htt_rx_in_ord_ind(ar, skb); 3510 spin_unlock_bh(&htt->rx_ring.lock); 3511 3512 dev_kfree_skb_any(skb); 3513 if (ret == -EIO) { 3514 resched_napi = true; 3515 goto exit; 3516 } 3517 } 3518 3519 while (atomic_read(&htt->num_mpdus_ready)) { 3520 ret = ath10k_htt_rx_handle_amsdu(htt); 3521 if (ret == -EIO) { 3522 resched_napi = true; 3523 goto exit; 3524 } 3525 atomic_dec(&htt->num_mpdus_ready); 3526 } 3527 3528 /* Deliver received data after processing data from hardware */ 3529 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget); 3530 3531 /* From NAPI documentation: 3532 * The napi poll() function may also process TX completions, in which 3533 * case if it processes the entire TX ring then it should count that 3534 * work as the rest of the budget. 3535 */ 3536 if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo)) 3537 quota = budget; 3538 3539 /* kfifo_get: called only within txrx_tasklet so it's neatly serialized. 3540 * From kfifo_get() documentation: 3541 * Note that with only one concurrent reader and one concurrent writer, 3542 * you don't need extra locking to use these macro. 3543 */ 3544 while (kfifo_get(&htt->txdone_fifo, &tx_done)) 3545 ath10k_txrx_tx_unref(htt, &tx_done); 3546 3547 ath10k_mac_tx_push_pending(ar); 3548 3549 spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags); 3550 skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q); 3551 spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags); 3552 3553 while ((skb = __skb_dequeue(&tx_ind_q))) { 3554 ath10k_htt_rx_tx_fetch_ind(ar, skb); 3555 dev_kfree_skb_any(skb); 3556 } 3557 3558 exit: 3559 ath10k_htt_rx_msdu_buff_replenish(htt); 3560 /* In case of rx failure or more data to read, report budget 3561 * to reschedule NAPI poll 3562 */ 3563 done = resched_napi ? budget : quota; 3564 3565 return done; 3566 } 3567 EXPORT_SYMBOL(ath10k_htt_txrx_compl_task); 3568 3569 static const struct ath10k_htt_rx_ops htt_rx_ops_32 = { 3570 .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_32, 3571 .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_32, 3572 .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_32, 3573 .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_32, 3574 .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_32, 3575 }; 3576 3577 static const struct ath10k_htt_rx_ops htt_rx_ops_64 = { 3578 .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_64, 3579 .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_64, 3580 .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_64, 3581 .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_64, 3582 .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_64, 3583 }; 3584 3585 static const struct ath10k_htt_rx_ops htt_rx_ops_hl = { 3586 }; 3587 3588 void ath10k_htt_set_rx_ops(struct ath10k_htt *htt) 3589 { 3590 struct ath10k *ar = htt->ar; 3591 3592 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) 3593 htt->rx_ops = &htt_rx_ops_hl; 3594 else if (ar->hw_params.target_64bit) 3595 htt->rx_ops = &htt_rx_ops_64; 3596 else 3597 htt->rx_ops = &htt_rx_ops_32; 3598 } 3599