1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include "core.h" 19 #include "htc.h" 20 #include "htt.h" 21 #include "txrx.h" 22 #include "debug.h" 23 #include "trace.h" 24 #include "mac.h" 25 26 #include <linux/log2.h> 27 28 #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX 29 #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1) 30 31 /* when under memory pressure rx ring refill may fail and needs a retry */ 32 #define HTT_RX_RING_REFILL_RETRY_MS 50 33 34 #define HTT_RX_RING_REFILL_RESCHED_MS 5 35 36 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb); 37 38 static struct sk_buff * 39 ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr) 40 { 41 struct ath10k_skb_rxcb *rxcb; 42 43 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr) 44 if (rxcb->paddr == paddr) 45 return ATH10K_RXCB_SKB(rxcb); 46 47 WARN_ON_ONCE(1); 48 return NULL; 49 } 50 51 static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt) 52 { 53 struct sk_buff *skb; 54 struct ath10k_skb_rxcb *rxcb; 55 struct hlist_node *n; 56 int i; 57 58 if (htt->rx_ring.in_ord_rx) { 59 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) { 60 skb = ATH10K_RXCB_SKB(rxcb); 61 dma_unmap_single(htt->ar->dev, rxcb->paddr, 62 skb->len + skb_tailroom(skb), 63 DMA_FROM_DEVICE); 64 hash_del(&rxcb->hlist); 65 dev_kfree_skb_any(skb); 66 } 67 } else { 68 for (i = 0; i < htt->rx_ring.size; i++) { 69 skb = htt->rx_ring.netbufs_ring[i]; 70 if (!skb) 71 continue; 72 73 rxcb = ATH10K_SKB_RXCB(skb); 74 dma_unmap_single(htt->ar->dev, rxcb->paddr, 75 skb->len + skb_tailroom(skb), 76 DMA_FROM_DEVICE); 77 dev_kfree_skb_any(skb); 78 } 79 } 80 81 htt->rx_ring.fill_cnt = 0; 82 hash_init(htt->rx_ring.skb_table); 83 memset(htt->rx_ring.netbufs_ring, 0, 84 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0])); 85 } 86 87 static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 88 { 89 struct htt_rx_desc *rx_desc; 90 struct ath10k_skb_rxcb *rxcb; 91 struct sk_buff *skb; 92 dma_addr_t paddr; 93 int ret = 0, idx; 94 95 /* The Full Rx Reorder firmware has no way of telling the host 96 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring. 97 * To keep things simple make sure ring is always half empty. This 98 * guarantees there'll be no replenishment overruns possible. 99 */ 100 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2); 101 102 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr); 103 while (num > 0) { 104 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN); 105 if (!skb) { 106 ret = -ENOMEM; 107 goto fail; 108 } 109 110 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN)) 111 skb_pull(skb, 112 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) - 113 skb->data); 114 115 /* Clear rx_desc attention word before posting to Rx ring */ 116 rx_desc = (struct htt_rx_desc *)skb->data; 117 rx_desc->attention.flags = __cpu_to_le32(0); 118 119 paddr = dma_map_single(htt->ar->dev, skb->data, 120 skb->len + skb_tailroom(skb), 121 DMA_FROM_DEVICE); 122 123 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) { 124 dev_kfree_skb_any(skb); 125 ret = -ENOMEM; 126 goto fail; 127 } 128 129 rxcb = ATH10K_SKB_RXCB(skb); 130 rxcb->paddr = paddr; 131 htt->rx_ring.netbufs_ring[idx] = skb; 132 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr); 133 htt->rx_ring.fill_cnt++; 134 135 if (htt->rx_ring.in_ord_rx) { 136 hash_add(htt->rx_ring.skb_table, 137 &ATH10K_SKB_RXCB(skb)->hlist, 138 (u32)paddr); 139 } 140 141 num--; 142 idx++; 143 idx &= htt->rx_ring.size_mask; 144 } 145 146 fail: 147 /* 148 * Make sure the rx buffer is updated before available buffer 149 * index to avoid any potential rx ring corruption. 150 */ 151 mb(); 152 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx); 153 return ret; 154 } 155 156 static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 157 { 158 lockdep_assert_held(&htt->rx_ring.lock); 159 return __ath10k_htt_rx_ring_fill_n(htt, num); 160 } 161 162 static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt) 163 { 164 int ret, num_deficit, num_to_fill; 165 166 /* Refilling the whole RX ring buffer proves to be a bad idea. The 167 * reason is RX may take up significant amount of CPU cycles and starve 168 * other tasks, e.g. TX on an ethernet device while acting as a bridge 169 * with ath10k wlan interface. This ended up with very poor performance 170 * once CPU the host system was overwhelmed with RX on ath10k. 171 * 172 * By limiting the number of refills the replenishing occurs 173 * progressively. This in turns makes use of the fact tasklets are 174 * processed in FIFO order. This means actual RX processing can starve 175 * out refilling. If there's not enough buffers on RX ring FW will not 176 * report RX until it is refilled with enough buffers. This 177 * automatically balances load wrt to CPU power. 178 * 179 * This probably comes at a cost of lower maximum throughput but 180 * improves the average and stability. 181 */ 182 spin_lock_bh(&htt->rx_ring.lock); 183 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt; 184 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit); 185 num_deficit -= num_to_fill; 186 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill); 187 if (ret == -ENOMEM) { 188 /* 189 * Failed to fill it to the desired level - 190 * we'll start a timer and try again next time. 191 * As long as enough buffers are left in the ring for 192 * another A-MPDU rx, no special recovery is needed. 193 */ 194 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + 195 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS)); 196 } else if (num_deficit > 0) { 197 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + 198 msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS)); 199 } 200 spin_unlock_bh(&htt->rx_ring.lock); 201 } 202 203 static void ath10k_htt_rx_ring_refill_retry(struct timer_list *t) 204 { 205 struct ath10k_htt *htt = from_timer(htt, t, rx_ring.refill_retry_timer); 206 207 ath10k_htt_rx_msdu_buff_replenish(htt); 208 } 209 210 int ath10k_htt_rx_ring_refill(struct ath10k *ar) 211 { 212 struct ath10k_htt *htt = &ar->htt; 213 int ret; 214 215 spin_lock_bh(&htt->rx_ring.lock); 216 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level - 217 htt->rx_ring.fill_cnt)); 218 spin_unlock_bh(&htt->rx_ring.lock); 219 220 if (ret) 221 ath10k_htt_rx_ring_free(htt); 222 223 return ret; 224 } 225 226 void ath10k_htt_rx_free(struct ath10k_htt *htt) 227 { 228 del_timer_sync(&htt->rx_ring.refill_retry_timer); 229 230 skb_queue_purge(&htt->rx_compl_q); 231 skb_queue_purge(&htt->rx_in_ord_compl_q); 232 skb_queue_purge(&htt->tx_fetch_ind_q); 233 234 ath10k_htt_rx_ring_free(htt); 235 236 dma_free_coherent(htt->ar->dev, 237 (htt->rx_ring.size * 238 sizeof(htt->rx_ring.paddrs_ring)), 239 htt->rx_ring.paddrs_ring, 240 htt->rx_ring.base_paddr); 241 242 dma_free_coherent(htt->ar->dev, 243 sizeof(*htt->rx_ring.alloc_idx.vaddr), 244 htt->rx_ring.alloc_idx.vaddr, 245 htt->rx_ring.alloc_idx.paddr); 246 247 kfree(htt->rx_ring.netbufs_ring); 248 } 249 250 static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt) 251 { 252 struct ath10k *ar = htt->ar; 253 int idx; 254 struct sk_buff *msdu; 255 256 lockdep_assert_held(&htt->rx_ring.lock); 257 258 if (htt->rx_ring.fill_cnt == 0) { 259 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n"); 260 return NULL; 261 } 262 263 idx = htt->rx_ring.sw_rd_idx.msdu_payld; 264 msdu = htt->rx_ring.netbufs_ring[idx]; 265 htt->rx_ring.netbufs_ring[idx] = NULL; 266 htt->rx_ring.paddrs_ring[idx] = 0; 267 268 idx++; 269 idx &= htt->rx_ring.size_mask; 270 htt->rx_ring.sw_rd_idx.msdu_payld = idx; 271 htt->rx_ring.fill_cnt--; 272 273 dma_unmap_single(htt->ar->dev, 274 ATH10K_SKB_RXCB(msdu)->paddr, 275 msdu->len + skb_tailroom(msdu), 276 DMA_FROM_DEVICE); 277 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", 278 msdu->data, msdu->len + skb_tailroom(msdu)); 279 280 return msdu; 281 } 282 283 /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */ 284 static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, 285 struct sk_buff_head *amsdu) 286 { 287 struct ath10k *ar = htt->ar; 288 int msdu_len, msdu_chaining = 0; 289 struct sk_buff *msdu; 290 struct htt_rx_desc *rx_desc; 291 292 lockdep_assert_held(&htt->rx_ring.lock); 293 294 for (;;) { 295 int last_msdu, msdu_len_invalid, msdu_chained; 296 297 msdu = ath10k_htt_rx_netbuf_pop(htt); 298 if (!msdu) { 299 __skb_queue_purge(amsdu); 300 return -ENOENT; 301 } 302 303 __skb_queue_tail(amsdu, msdu); 304 305 rx_desc = (struct htt_rx_desc *)msdu->data; 306 307 /* FIXME: we must report msdu payload since this is what caller 308 * expects now 309 */ 310 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload)); 311 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload)); 312 313 /* 314 * Sanity check - confirm the HW is finished filling in the 315 * rx data. 316 * If the HW and SW are working correctly, then it's guaranteed 317 * that the HW's MAC DMA is done before this point in the SW. 318 * To prevent the case that we handle a stale Rx descriptor, 319 * just assert for now until we have a way to recover. 320 */ 321 if (!(__le32_to_cpu(rx_desc->attention.flags) 322 & RX_ATTENTION_FLAGS_MSDU_DONE)) { 323 __skb_queue_purge(amsdu); 324 return -EIO; 325 } 326 327 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags) 328 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR | 329 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR)); 330 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0), 331 RX_MSDU_START_INFO0_MSDU_LENGTH); 332 msdu_chained = rx_desc->frag_info.ring2_more_count; 333 334 if (msdu_len_invalid) 335 msdu_len = 0; 336 337 skb_trim(msdu, 0); 338 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE)); 339 msdu_len -= msdu->len; 340 341 /* Note: Chained buffers do not contain rx descriptor */ 342 while (msdu_chained--) { 343 msdu = ath10k_htt_rx_netbuf_pop(htt); 344 if (!msdu) { 345 __skb_queue_purge(amsdu); 346 return -ENOENT; 347 } 348 349 __skb_queue_tail(amsdu, msdu); 350 skb_trim(msdu, 0); 351 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE)); 352 msdu_len -= msdu->len; 353 msdu_chaining = 1; 354 } 355 356 last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) & 357 RX_MSDU_END_INFO0_LAST_MSDU; 358 359 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention, 360 sizeof(*rx_desc) - sizeof(u32)); 361 362 if (last_msdu) 363 break; 364 } 365 366 if (skb_queue_empty(amsdu)) 367 msdu_chaining = -1; 368 369 /* 370 * Don't refill the ring yet. 371 * 372 * First, the elements popped here are still in use - it is not 373 * safe to overwrite them until the matching call to 374 * mpdu_desc_list_next. Second, for efficiency it is preferable to 375 * refill the rx ring with 1 PPDU's worth of rx buffers (something 376 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers 377 * (something like 3 buffers). Consequently, we'll rely on the txrx 378 * SW to tell us when it is done pulling all the PPDU's rx buffers 379 * out of the rx ring, and then refill it just once. 380 */ 381 382 return msdu_chaining; 383 } 384 385 static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt, 386 u32 paddr) 387 { 388 struct ath10k *ar = htt->ar; 389 struct ath10k_skb_rxcb *rxcb; 390 struct sk_buff *msdu; 391 392 lockdep_assert_held(&htt->rx_ring.lock); 393 394 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr); 395 if (!msdu) 396 return NULL; 397 398 rxcb = ATH10K_SKB_RXCB(msdu); 399 hash_del(&rxcb->hlist); 400 htt->rx_ring.fill_cnt--; 401 402 dma_unmap_single(htt->ar->dev, rxcb->paddr, 403 msdu->len + skb_tailroom(msdu), 404 DMA_FROM_DEVICE); 405 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", 406 msdu->data, msdu->len + skb_tailroom(msdu)); 407 408 return msdu; 409 } 410 411 static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt, 412 struct htt_rx_in_ord_ind *ev, 413 struct sk_buff_head *list) 414 { 415 struct ath10k *ar = htt->ar; 416 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs; 417 struct htt_rx_desc *rxd; 418 struct sk_buff *msdu; 419 int msdu_count; 420 bool is_offload; 421 u32 paddr; 422 423 lockdep_assert_held(&htt->rx_ring.lock); 424 425 msdu_count = __le16_to_cpu(ev->msdu_count); 426 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 427 428 while (msdu_count--) { 429 paddr = __le32_to_cpu(msdu_desc->msdu_paddr); 430 431 msdu = ath10k_htt_rx_pop_paddr(htt, paddr); 432 if (!msdu) { 433 __skb_queue_purge(list); 434 return -ENOENT; 435 } 436 437 __skb_queue_tail(list, msdu); 438 439 if (!is_offload) { 440 rxd = (void *)msdu->data; 441 442 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd)); 443 444 skb_put(msdu, sizeof(*rxd)); 445 skb_pull(msdu, sizeof(*rxd)); 446 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len)); 447 448 if (!(__le32_to_cpu(rxd->attention.flags) & 449 RX_ATTENTION_FLAGS_MSDU_DONE)) { 450 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n"); 451 return -EIO; 452 } 453 } 454 455 msdu_desc++; 456 } 457 458 return 0; 459 } 460 461 int ath10k_htt_rx_alloc(struct ath10k_htt *htt) 462 { 463 struct ath10k *ar = htt->ar; 464 dma_addr_t paddr; 465 void *vaddr; 466 size_t size; 467 struct timer_list *timer = &htt->rx_ring.refill_retry_timer; 468 469 htt->rx_confused = false; 470 471 /* XXX: The fill level could be changed during runtime in response to 472 * the host processing latency. Is this really worth it? 473 */ 474 htt->rx_ring.size = HTT_RX_RING_SIZE; 475 htt->rx_ring.size_mask = htt->rx_ring.size - 1; 476 htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL; 477 478 if (!is_power_of_2(htt->rx_ring.size)) { 479 ath10k_warn(ar, "htt rx ring size is not power of 2\n"); 480 return -EINVAL; 481 } 482 483 htt->rx_ring.netbufs_ring = 484 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *), 485 GFP_KERNEL); 486 if (!htt->rx_ring.netbufs_ring) 487 goto err_netbuf; 488 489 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring); 490 491 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL); 492 if (!vaddr) 493 goto err_dma_ring; 494 495 htt->rx_ring.paddrs_ring = vaddr; 496 htt->rx_ring.base_paddr = paddr; 497 498 vaddr = dma_alloc_coherent(htt->ar->dev, 499 sizeof(*htt->rx_ring.alloc_idx.vaddr), 500 &paddr, GFP_KERNEL); 501 if (!vaddr) 502 goto err_dma_idx; 503 504 htt->rx_ring.alloc_idx.vaddr = vaddr; 505 htt->rx_ring.alloc_idx.paddr = paddr; 506 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask; 507 *htt->rx_ring.alloc_idx.vaddr = 0; 508 509 /* Initialize the Rx refill retry timer */ 510 timer_setup(timer, ath10k_htt_rx_ring_refill_retry, 0); 511 512 spin_lock_init(&htt->rx_ring.lock); 513 514 htt->rx_ring.fill_cnt = 0; 515 htt->rx_ring.sw_rd_idx.msdu_payld = 0; 516 hash_init(htt->rx_ring.skb_table); 517 518 skb_queue_head_init(&htt->rx_compl_q); 519 skb_queue_head_init(&htt->rx_in_ord_compl_q); 520 skb_queue_head_init(&htt->tx_fetch_ind_q); 521 atomic_set(&htt->num_mpdus_ready, 0); 522 523 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n", 524 htt->rx_ring.size, htt->rx_ring.fill_level); 525 return 0; 526 527 err_dma_idx: 528 dma_free_coherent(htt->ar->dev, 529 (htt->rx_ring.size * 530 sizeof(htt->rx_ring.paddrs_ring)), 531 htt->rx_ring.paddrs_ring, 532 htt->rx_ring.base_paddr); 533 err_dma_ring: 534 kfree(htt->rx_ring.netbufs_ring); 535 err_netbuf: 536 return -ENOMEM; 537 } 538 539 static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar, 540 enum htt_rx_mpdu_encrypt_type type) 541 { 542 switch (type) { 543 case HTT_RX_MPDU_ENCRYPT_NONE: 544 return 0; 545 case HTT_RX_MPDU_ENCRYPT_WEP40: 546 case HTT_RX_MPDU_ENCRYPT_WEP104: 547 return IEEE80211_WEP_IV_LEN; 548 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 549 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 550 return IEEE80211_TKIP_IV_LEN; 551 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 552 return IEEE80211_CCMP_HDR_LEN; 553 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2: 554 return IEEE80211_CCMP_256_HDR_LEN; 555 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2: 556 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2: 557 return IEEE80211_GCMP_HDR_LEN; 558 case HTT_RX_MPDU_ENCRYPT_WEP128: 559 case HTT_RX_MPDU_ENCRYPT_WAPI: 560 break; 561 } 562 563 ath10k_warn(ar, "unsupported encryption type %d\n", type); 564 return 0; 565 } 566 567 #define MICHAEL_MIC_LEN 8 568 569 static int ath10k_htt_rx_crypto_mic_len(struct ath10k *ar, 570 enum htt_rx_mpdu_encrypt_type type) 571 { 572 switch (type) { 573 case HTT_RX_MPDU_ENCRYPT_NONE: 574 case HTT_RX_MPDU_ENCRYPT_WEP40: 575 case HTT_RX_MPDU_ENCRYPT_WEP104: 576 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 577 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 578 return 0; 579 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 580 return IEEE80211_CCMP_MIC_LEN; 581 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2: 582 return IEEE80211_CCMP_256_MIC_LEN; 583 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2: 584 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2: 585 return IEEE80211_GCMP_MIC_LEN; 586 case HTT_RX_MPDU_ENCRYPT_WEP128: 587 case HTT_RX_MPDU_ENCRYPT_WAPI: 588 break; 589 } 590 591 ath10k_warn(ar, "unsupported encryption type %d\n", type); 592 return 0; 593 } 594 595 static int ath10k_htt_rx_crypto_icv_len(struct ath10k *ar, 596 enum htt_rx_mpdu_encrypt_type type) 597 { 598 switch (type) { 599 case HTT_RX_MPDU_ENCRYPT_NONE: 600 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 601 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2: 602 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2: 603 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2: 604 return 0; 605 case HTT_RX_MPDU_ENCRYPT_WEP40: 606 case HTT_RX_MPDU_ENCRYPT_WEP104: 607 return IEEE80211_WEP_ICV_LEN; 608 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 609 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 610 return IEEE80211_TKIP_ICV_LEN; 611 case HTT_RX_MPDU_ENCRYPT_WEP128: 612 case HTT_RX_MPDU_ENCRYPT_WAPI: 613 break; 614 } 615 616 ath10k_warn(ar, "unsupported encryption type %d\n", type); 617 return 0; 618 } 619 620 struct amsdu_subframe_hdr { 621 u8 dst[ETH_ALEN]; 622 u8 src[ETH_ALEN]; 623 __be16 len; 624 } __packed; 625 626 #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63) 627 628 static void ath10k_htt_rx_h_rates(struct ath10k *ar, 629 struct ieee80211_rx_status *status, 630 struct htt_rx_desc *rxd) 631 { 632 struct ieee80211_supported_band *sband; 633 u8 cck, rate, bw, sgi, mcs, nss; 634 u8 preamble = 0; 635 u8 group_id; 636 u32 info1, info2, info3; 637 638 info1 = __le32_to_cpu(rxd->ppdu_start.info1); 639 info2 = __le32_to_cpu(rxd->ppdu_start.info2); 640 info3 = __le32_to_cpu(rxd->ppdu_start.info3); 641 642 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE); 643 644 switch (preamble) { 645 case HTT_RX_LEGACY: 646 /* To get legacy rate index band is required. Since band can't 647 * be undefined check if freq is non-zero. 648 */ 649 if (!status->freq) 650 return; 651 652 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT; 653 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE); 654 rate &= ~RX_PPDU_START_RATE_FLAG; 655 656 sband = &ar->mac.sbands[status->band]; 657 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck); 658 break; 659 case HTT_RX_HT: 660 case HTT_RX_HT_WITH_TXBF: 661 /* HT-SIG - Table 20-11 in info2 and info3 */ 662 mcs = info2 & 0x1F; 663 nss = mcs >> 3; 664 bw = (info2 >> 7) & 1; 665 sgi = (info3 >> 7) & 1; 666 667 status->rate_idx = mcs; 668 status->encoding = RX_ENC_HT; 669 if (sgi) 670 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 671 if (bw) 672 status->bw = RATE_INFO_BW_40; 673 break; 674 case HTT_RX_VHT: 675 case HTT_RX_VHT_WITH_TXBF: 676 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3 677 * TODO check this 678 */ 679 bw = info2 & 3; 680 sgi = info3 & 1; 681 group_id = (info2 >> 4) & 0x3F; 682 683 if (GROUP_ID_IS_SU_MIMO(group_id)) { 684 mcs = (info3 >> 4) & 0x0F; 685 nss = ((info2 >> 10) & 0x07) + 1; 686 } else { 687 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor 688 * so it's impossible to decode MCS. Also since 689 * firmware consumes Group Id Management frames host 690 * has no knowledge regarding group/user position 691 * mapping so it's impossible to pick the correct Nsts 692 * from VHT-SIG-A1. 693 * 694 * Bandwidth and SGI are valid so report the rateinfo 695 * on best-effort basis. 696 */ 697 mcs = 0; 698 nss = 1; 699 } 700 701 if (mcs > 0x09) { 702 ath10k_warn(ar, "invalid MCS received %u\n", mcs); 703 ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n", 704 __le32_to_cpu(rxd->attention.flags), 705 __le32_to_cpu(rxd->mpdu_start.info0), 706 __le32_to_cpu(rxd->mpdu_start.info1), 707 __le32_to_cpu(rxd->msdu_start.common.info0), 708 __le32_to_cpu(rxd->msdu_start.common.info1), 709 rxd->ppdu_start.info0, 710 __le32_to_cpu(rxd->ppdu_start.info1), 711 __le32_to_cpu(rxd->ppdu_start.info2), 712 __le32_to_cpu(rxd->ppdu_start.info3), 713 __le32_to_cpu(rxd->ppdu_start.info4)); 714 715 ath10k_warn(ar, "msdu end %08x mpdu end %08x\n", 716 __le32_to_cpu(rxd->msdu_end.common.info0), 717 __le32_to_cpu(rxd->mpdu_end.info0)); 718 719 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, 720 "rx desc msdu payload: ", 721 rxd->msdu_payload, 50); 722 } 723 724 status->rate_idx = mcs; 725 status->nss = nss; 726 727 if (sgi) 728 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 729 730 switch (bw) { 731 /* 20MHZ */ 732 case 0: 733 break; 734 /* 40MHZ */ 735 case 1: 736 status->bw = RATE_INFO_BW_40; 737 break; 738 /* 80MHZ */ 739 case 2: 740 status->bw = RATE_INFO_BW_80; 741 break; 742 case 3: 743 status->bw = RATE_INFO_BW_160; 744 break; 745 } 746 747 status->encoding = RX_ENC_VHT; 748 break; 749 default: 750 break; 751 } 752 } 753 754 static struct ieee80211_channel * 755 ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd) 756 { 757 struct ath10k_peer *peer; 758 struct ath10k_vif *arvif; 759 struct cfg80211_chan_def def; 760 u16 peer_id; 761 762 lockdep_assert_held(&ar->data_lock); 763 764 if (!rxd) 765 return NULL; 766 767 if (rxd->attention.flags & 768 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID)) 769 return NULL; 770 771 if (!(rxd->msdu_end.common.info0 & 772 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU))) 773 return NULL; 774 775 peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0), 776 RX_MPDU_START_INFO0_PEER_IDX); 777 778 peer = ath10k_peer_find_by_id(ar, peer_id); 779 if (!peer) 780 return NULL; 781 782 arvif = ath10k_get_arvif(ar, peer->vdev_id); 783 if (WARN_ON_ONCE(!arvif)) 784 return NULL; 785 786 if (ath10k_mac_vif_chan(arvif->vif, &def)) 787 return NULL; 788 789 return def.chan; 790 } 791 792 static struct ieee80211_channel * 793 ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id) 794 { 795 struct ath10k_vif *arvif; 796 struct cfg80211_chan_def def; 797 798 lockdep_assert_held(&ar->data_lock); 799 800 list_for_each_entry(arvif, &ar->arvifs, list) { 801 if (arvif->vdev_id == vdev_id && 802 ath10k_mac_vif_chan(arvif->vif, &def) == 0) 803 return def.chan; 804 } 805 806 return NULL; 807 } 808 809 static void 810 ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw, 811 struct ieee80211_chanctx_conf *conf, 812 void *data) 813 { 814 struct cfg80211_chan_def *def = data; 815 816 *def = conf->def; 817 } 818 819 static struct ieee80211_channel * 820 ath10k_htt_rx_h_any_channel(struct ath10k *ar) 821 { 822 struct cfg80211_chan_def def = {}; 823 824 ieee80211_iter_chan_contexts_atomic(ar->hw, 825 ath10k_htt_rx_h_any_chan_iter, 826 &def); 827 828 return def.chan; 829 } 830 831 static bool ath10k_htt_rx_h_channel(struct ath10k *ar, 832 struct ieee80211_rx_status *status, 833 struct htt_rx_desc *rxd, 834 u32 vdev_id) 835 { 836 struct ieee80211_channel *ch; 837 838 spin_lock_bh(&ar->data_lock); 839 ch = ar->scan_channel; 840 if (!ch) 841 ch = ar->rx_channel; 842 if (!ch) 843 ch = ath10k_htt_rx_h_peer_channel(ar, rxd); 844 if (!ch) 845 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id); 846 if (!ch) 847 ch = ath10k_htt_rx_h_any_channel(ar); 848 if (!ch) 849 ch = ar->tgt_oper_chan; 850 spin_unlock_bh(&ar->data_lock); 851 852 if (!ch) 853 return false; 854 855 status->band = ch->band; 856 status->freq = ch->center_freq; 857 858 return true; 859 } 860 861 static void ath10k_htt_rx_h_signal(struct ath10k *ar, 862 struct ieee80211_rx_status *status, 863 struct htt_rx_desc *rxd) 864 { 865 int i; 866 867 for (i = 0; i < IEEE80211_MAX_CHAINS ; i++) { 868 status->chains &= ~BIT(i); 869 870 if (rxd->ppdu_start.rssi_chains[i].pri20_mhz != 0x80) { 871 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR + 872 rxd->ppdu_start.rssi_chains[i].pri20_mhz; 873 874 status->chains |= BIT(i); 875 } 876 } 877 878 /* FIXME: Get real NF */ 879 status->signal = ATH10K_DEFAULT_NOISE_FLOOR + 880 rxd->ppdu_start.rssi_comb; 881 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL; 882 } 883 884 static void ath10k_htt_rx_h_mactime(struct ath10k *ar, 885 struct ieee80211_rx_status *status, 886 struct htt_rx_desc *rxd) 887 { 888 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This 889 * means all prior MSDUs in a PPDU are reported to mac80211 without the 890 * TSF. Is it worth holding frames until end of PPDU is known? 891 * 892 * FIXME: Can we get/compute 64bit TSF? 893 */ 894 status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp); 895 status->flag |= RX_FLAG_MACTIME_END; 896 } 897 898 static void ath10k_htt_rx_h_ppdu(struct ath10k *ar, 899 struct sk_buff_head *amsdu, 900 struct ieee80211_rx_status *status, 901 u32 vdev_id) 902 { 903 struct sk_buff *first; 904 struct htt_rx_desc *rxd; 905 bool is_first_ppdu; 906 bool is_last_ppdu; 907 908 if (skb_queue_empty(amsdu)) 909 return; 910 911 first = skb_peek(amsdu); 912 rxd = (void *)first->data - sizeof(*rxd); 913 914 is_first_ppdu = !!(rxd->attention.flags & 915 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU)); 916 is_last_ppdu = !!(rxd->attention.flags & 917 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU)); 918 919 if (is_first_ppdu) { 920 /* New PPDU starts so clear out the old per-PPDU status. */ 921 status->freq = 0; 922 status->rate_idx = 0; 923 status->nss = 0; 924 status->encoding = RX_ENC_LEGACY; 925 status->bw = RATE_INFO_BW_20; 926 927 status->flag &= ~RX_FLAG_MACTIME_END; 928 status->flag |= RX_FLAG_NO_SIGNAL_VAL; 929 930 status->flag &= ~(RX_FLAG_AMPDU_IS_LAST); 931 status->flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN; 932 status->ampdu_reference = ar->ampdu_reference; 933 934 ath10k_htt_rx_h_signal(ar, status, rxd); 935 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id); 936 ath10k_htt_rx_h_rates(ar, status, rxd); 937 } 938 939 if (is_last_ppdu) { 940 ath10k_htt_rx_h_mactime(ar, status, rxd); 941 942 /* set ampdu last segment flag */ 943 status->flag |= RX_FLAG_AMPDU_IS_LAST; 944 ar->ampdu_reference++; 945 } 946 } 947 948 static const char * const tid_to_ac[] = { 949 "BE", 950 "BK", 951 "BK", 952 "BE", 953 "VI", 954 "VI", 955 "VO", 956 "VO", 957 }; 958 959 static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size) 960 { 961 u8 *qc; 962 int tid; 963 964 if (!ieee80211_is_data_qos(hdr->frame_control)) 965 return ""; 966 967 qc = ieee80211_get_qos_ctl(hdr); 968 tid = *qc & IEEE80211_QOS_CTL_TID_MASK; 969 if (tid < 8) 970 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]); 971 else 972 snprintf(out, size, "tid %d", tid); 973 974 return out; 975 } 976 977 static void ath10k_process_rx(struct ath10k *ar, 978 struct ieee80211_rx_status *rx_status, 979 struct sk_buff *skb) 980 { 981 struct ieee80211_rx_status *status; 982 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 983 char tid[32]; 984 985 status = IEEE80211_SKB_RXCB(skb); 986 *status = *rx_status; 987 988 ath10k_dbg(ar, ATH10K_DBG_DATA, 989 "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n", 990 skb, 991 skb->len, 992 ieee80211_get_SA(hdr), 993 ath10k_get_tid(hdr, tid, sizeof(tid)), 994 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ? 995 "mcast" : "ucast", 996 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4, 997 (status->encoding == RX_ENC_LEGACY) ? "legacy" : "", 998 (status->encoding == RX_ENC_HT) ? "ht" : "", 999 (status->encoding == RX_ENC_VHT) ? "vht" : "", 1000 (status->bw == RATE_INFO_BW_40) ? "40" : "", 1001 (status->bw == RATE_INFO_BW_80) ? "80" : "", 1002 (status->bw == RATE_INFO_BW_160) ? "160" : "", 1003 status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "", 1004 status->rate_idx, 1005 status->nss, 1006 status->freq, 1007 status->band, status->flag, 1008 !!(status->flag & RX_FLAG_FAILED_FCS_CRC), 1009 !!(status->flag & RX_FLAG_MMIC_ERROR), 1010 !!(status->flag & RX_FLAG_AMSDU_MORE)); 1011 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ", 1012 skb->data, skb->len); 1013 trace_ath10k_rx_hdr(ar, skb->data, skb->len); 1014 trace_ath10k_rx_payload(ar, skb->data, skb->len); 1015 1016 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi); 1017 } 1018 1019 static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar, 1020 struct ieee80211_hdr *hdr) 1021 { 1022 int len = ieee80211_hdrlen(hdr->frame_control); 1023 1024 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING, 1025 ar->running_fw->fw_file.fw_features)) 1026 len = round_up(len, 4); 1027 1028 return len; 1029 } 1030 1031 static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar, 1032 struct sk_buff *msdu, 1033 struct ieee80211_rx_status *status, 1034 enum htt_rx_mpdu_encrypt_type enctype, 1035 bool is_decrypted) 1036 { 1037 struct ieee80211_hdr *hdr; 1038 struct htt_rx_desc *rxd; 1039 size_t hdr_len; 1040 size_t crypto_len; 1041 bool is_first; 1042 bool is_last; 1043 1044 rxd = (void *)msdu->data - sizeof(*rxd); 1045 is_first = !!(rxd->msdu_end.common.info0 & 1046 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); 1047 is_last = !!(rxd->msdu_end.common.info0 & 1048 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); 1049 1050 /* Delivered decapped frame: 1051 * [802.11 header] 1052 * [crypto param] <-- can be trimmed if !fcs_err && 1053 * !decrypt_err && !peer_idx_invalid 1054 * [amsdu header] <-- only if A-MSDU 1055 * [rfc1042/llc] 1056 * [payload] 1057 * [FCS] <-- at end, needs to be trimmed 1058 */ 1059 1060 /* This probably shouldn't happen but warn just in case */ 1061 if (unlikely(WARN_ON_ONCE(!is_first))) 1062 return; 1063 1064 /* This probably shouldn't happen but warn just in case */ 1065 if (unlikely(WARN_ON_ONCE(!(is_first && is_last)))) 1066 return; 1067 1068 skb_trim(msdu, msdu->len - FCS_LEN); 1069 1070 /* In most cases this will be true for sniffed frames. It makes sense 1071 * to deliver them as-is without stripping the crypto param. This is 1072 * necessary for software based decryption. 1073 * 1074 * If there's no error then the frame is decrypted. At least that is 1075 * the case for frames that come in via fragmented rx indication. 1076 */ 1077 if (!is_decrypted) 1078 return; 1079 1080 /* The payload is decrypted so strip crypto params. Start from tail 1081 * since hdr is used to compute some stuff. 1082 */ 1083 1084 hdr = (void *)msdu->data; 1085 1086 /* Tail */ 1087 if (status->flag & RX_FLAG_IV_STRIPPED) { 1088 skb_trim(msdu, msdu->len - 1089 ath10k_htt_rx_crypto_mic_len(ar, enctype)); 1090 1091 skb_trim(msdu, msdu->len - 1092 ath10k_htt_rx_crypto_icv_len(ar, enctype)); 1093 } else { 1094 /* MIC */ 1095 if (status->flag & RX_FLAG_MIC_STRIPPED) 1096 skb_trim(msdu, msdu->len - 1097 ath10k_htt_rx_crypto_mic_len(ar, enctype)); 1098 1099 /* ICV */ 1100 if (status->flag & RX_FLAG_ICV_STRIPPED) 1101 skb_trim(msdu, msdu->len - 1102 ath10k_htt_rx_crypto_icv_len(ar, enctype)); 1103 } 1104 1105 /* MMIC */ 1106 if ((status->flag & RX_FLAG_MMIC_STRIPPED) && 1107 !ieee80211_has_morefrags(hdr->frame_control) && 1108 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA) 1109 skb_trim(msdu, msdu->len - MICHAEL_MIC_LEN); 1110 1111 /* Head */ 1112 if (status->flag & RX_FLAG_IV_STRIPPED) { 1113 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1114 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1115 1116 memmove((void *)msdu->data + crypto_len, 1117 (void *)msdu->data, hdr_len); 1118 skb_pull(msdu, crypto_len); 1119 } 1120 } 1121 1122 static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar, 1123 struct sk_buff *msdu, 1124 struct ieee80211_rx_status *status, 1125 const u8 first_hdr[64], 1126 enum htt_rx_mpdu_encrypt_type enctype) 1127 { 1128 struct ieee80211_hdr *hdr; 1129 struct htt_rx_desc *rxd; 1130 size_t hdr_len; 1131 u8 da[ETH_ALEN]; 1132 u8 sa[ETH_ALEN]; 1133 int l3_pad_bytes; 1134 int bytes_aligned = ar->hw_params.decap_align_bytes; 1135 1136 /* Delivered decapped frame: 1137 * [nwifi 802.11 header] <-- replaced with 802.11 hdr 1138 * [rfc1042/llc] 1139 * 1140 * Note: The nwifi header doesn't have QoS Control and is 1141 * (always?) a 3addr frame. 1142 * 1143 * Note2: There's no A-MSDU subframe header. Even if it's part 1144 * of an A-MSDU. 1145 */ 1146 1147 /* pull decapped header and copy SA & DA */ 1148 rxd = (void *)msdu->data - sizeof(*rxd); 1149 1150 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1151 skb_put(msdu, l3_pad_bytes); 1152 1153 hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes); 1154 1155 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr); 1156 ether_addr_copy(da, ieee80211_get_DA(hdr)); 1157 ether_addr_copy(sa, ieee80211_get_SA(hdr)); 1158 skb_pull(msdu, hdr_len); 1159 1160 /* push original 802.11 header */ 1161 hdr = (struct ieee80211_hdr *)first_hdr; 1162 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1163 1164 if (!(status->flag & RX_FLAG_IV_STRIPPED)) { 1165 memcpy(skb_push(msdu, 1166 ath10k_htt_rx_crypto_param_len(ar, enctype)), 1167 (void *)hdr + round_up(hdr_len, bytes_aligned), 1168 ath10k_htt_rx_crypto_param_len(ar, enctype)); 1169 } 1170 1171 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1172 1173 /* original 802.11 header has a different DA and in 1174 * case of 4addr it may also have different SA 1175 */ 1176 hdr = (struct ieee80211_hdr *)msdu->data; 1177 ether_addr_copy(ieee80211_get_DA(hdr), da); 1178 ether_addr_copy(ieee80211_get_SA(hdr), sa); 1179 } 1180 1181 static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar, 1182 struct sk_buff *msdu, 1183 enum htt_rx_mpdu_encrypt_type enctype) 1184 { 1185 struct ieee80211_hdr *hdr; 1186 struct htt_rx_desc *rxd; 1187 size_t hdr_len, crypto_len; 1188 void *rfc1042; 1189 bool is_first, is_last, is_amsdu; 1190 int bytes_aligned = ar->hw_params.decap_align_bytes; 1191 1192 rxd = (void *)msdu->data - sizeof(*rxd); 1193 hdr = (void *)rxd->rx_hdr_status; 1194 1195 is_first = !!(rxd->msdu_end.common.info0 & 1196 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); 1197 is_last = !!(rxd->msdu_end.common.info0 & 1198 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); 1199 is_amsdu = !(is_first && is_last); 1200 1201 rfc1042 = hdr; 1202 1203 if (is_first) { 1204 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1205 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1206 1207 rfc1042 += round_up(hdr_len, bytes_aligned) + 1208 round_up(crypto_len, bytes_aligned); 1209 } 1210 1211 if (is_amsdu) 1212 rfc1042 += sizeof(struct amsdu_subframe_hdr); 1213 1214 return rfc1042; 1215 } 1216 1217 static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar, 1218 struct sk_buff *msdu, 1219 struct ieee80211_rx_status *status, 1220 const u8 first_hdr[64], 1221 enum htt_rx_mpdu_encrypt_type enctype) 1222 { 1223 struct ieee80211_hdr *hdr; 1224 struct ethhdr *eth; 1225 size_t hdr_len; 1226 void *rfc1042; 1227 u8 da[ETH_ALEN]; 1228 u8 sa[ETH_ALEN]; 1229 int l3_pad_bytes; 1230 struct htt_rx_desc *rxd; 1231 int bytes_aligned = ar->hw_params.decap_align_bytes; 1232 1233 /* Delivered decapped frame: 1234 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc 1235 * [payload] 1236 */ 1237 1238 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype); 1239 if (WARN_ON_ONCE(!rfc1042)) 1240 return; 1241 1242 rxd = (void *)msdu->data - sizeof(*rxd); 1243 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1244 skb_put(msdu, l3_pad_bytes); 1245 skb_pull(msdu, l3_pad_bytes); 1246 1247 /* pull decapped header and copy SA & DA */ 1248 eth = (struct ethhdr *)msdu->data; 1249 ether_addr_copy(da, eth->h_dest); 1250 ether_addr_copy(sa, eth->h_source); 1251 skb_pull(msdu, sizeof(struct ethhdr)); 1252 1253 /* push rfc1042/llc/snap */ 1254 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042, 1255 sizeof(struct rfc1042_hdr)); 1256 1257 /* push original 802.11 header */ 1258 hdr = (struct ieee80211_hdr *)first_hdr; 1259 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1260 1261 if (!(status->flag & RX_FLAG_IV_STRIPPED)) { 1262 memcpy(skb_push(msdu, 1263 ath10k_htt_rx_crypto_param_len(ar, enctype)), 1264 (void *)hdr + round_up(hdr_len, bytes_aligned), 1265 ath10k_htt_rx_crypto_param_len(ar, enctype)); 1266 } 1267 1268 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1269 1270 /* original 802.11 header has a different DA and in 1271 * case of 4addr it may also have different SA 1272 */ 1273 hdr = (struct ieee80211_hdr *)msdu->data; 1274 ether_addr_copy(ieee80211_get_DA(hdr), da); 1275 ether_addr_copy(ieee80211_get_SA(hdr), sa); 1276 } 1277 1278 static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar, 1279 struct sk_buff *msdu, 1280 struct ieee80211_rx_status *status, 1281 const u8 first_hdr[64], 1282 enum htt_rx_mpdu_encrypt_type enctype) 1283 { 1284 struct ieee80211_hdr *hdr; 1285 size_t hdr_len; 1286 int l3_pad_bytes; 1287 struct htt_rx_desc *rxd; 1288 int bytes_aligned = ar->hw_params.decap_align_bytes; 1289 1290 /* Delivered decapped frame: 1291 * [amsdu header] <-- replaced with 802.11 hdr 1292 * [rfc1042/llc] 1293 * [payload] 1294 */ 1295 1296 rxd = (void *)msdu->data - sizeof(*rxd); 1297 l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1298 1299 skb_put(msdu, l3_pad_bytes); 1300 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes); 1301 1302 hdr = (struct ieee80211_hdr *)first_hdr; 1303 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1304 1305 if (!(status->flag & RX_FLAG_IV_STRIPPED)) { 1306 memcpy(skb_push(msdu, 1307 ath10k_htt_rx_crypto_param_len(ar, enctype)), 1308 (void *)hdr + round_up(hdr_len, bytes_aligned), 1309 ath10k_htt_rx_crypto_param_len(ar, enctype)); 1310 } 1311 1312 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1313 } 1314 1315 static void ath10k_htt_rx_h_undecap(struct ath10k *ar, 1316 struct sk_buff *msdu, 1317 struct ieee80211_rx_status *status, 1318 u8 first_hdr[64], 1319 enum htt_rx_mpdu_encrypt_type enctype, 1320 bool is_decrypted) 1321 { 1322 struct htt_rx_desc *rxd; 1323 enum rx_msdu_decap_format decap; 1324 1325 /* First msdu's decapped header: 1326 * [802.11 header] <-- padded to 4 bytes long 1327 * [crypto param] <-- padded to 4 bytes long 1328 * [amsdu header] <-- only if A-MSDU 1329 * [rfc1042/llc] 1330 * 1331 * Other (2nd, 3rd, ..) msdu's decapped header: 1332 * [amsdu header] <-- only if A-MSDU 1333 * [rfc1042/llc] 1334 */ 1335 1336 rxd = (void *)msdu->data - sizeof(*rxd); 1337 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1), 1338 RX_MSDU_START_INFO1_DECAP_FORMAT); 1339 1340 switch (decap) { 1341 case RX_MSDU_DECAP_RAW: 1342 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype, 1343 is_decrypted); 1344 break; 1345 case RX_MSDU_DECAP_NATIVE_WIFI: 1346 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr, 1347 enctype); 1348 break; 1349 case RX_MSDU_DECAP_ETHERNET2_DIX: 1350 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype); 1351 break; 1352 case RX_MSDU_DECAP_8023_SNAP_LLC: 1353 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr, 1354 enctype); 1355 break; 1356 } 1357 } 1358 1359 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb) 1360 { 1361 struct htt_rx_desc *rxd; 1362 u32 flags, info; 1363 bool is_ip4, is_ip6; 1364 bool is_tcp, is_udp; 1365 bool ip_csum_ok, tcpudp_csum_ok; 1366 1367 rxd = (void *)skb->data - sizeof(*rxd); 1368 flags = __le32_to_cpu(rxd->attention.flags); 1369 info = __le32_to_cpu(rxd->msdu_start.common.info1); 1370 1371 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO); 1372 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO); 1373 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO); 1374 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO); 1375 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL); 1376 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL); 1377 1378 if (!is_ip4 && !is_ip6) 1379 return CHECKSUM_NONE; 1380 if (!is_tcp && !is_udp) 1381 return CHECKSUM_NONE; 1382 if (!ip_csum_ok) 1383 return CHECKSUM_NONE; 1384 if (!tcpudp_csum_ok) 1385 return CHECKSUM_NONE; 1386 1387 return CHECKSUM_UNNECESSARY; 1388 } 1389 1390 static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu) 1391 { 1392 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu); 1393 } 1394 1395 static void ath10k_htt_rx_h_mpdu(struct ath10k *ar, 1396 struct sk_buff_head *amsdu, 1397 struct ieee80211_rx_status *status, 1398 bool fill_crypt_header) 1399 { 1400 struct sk_buff *first; 1401 struct sk_buff *last; 1402 struct sk_buff *msdu; 1403 struct htt_rx_desc *rxd; 1404 struct ieee80211_hdr *hdr; 1405 enum htt_rx_mpdu_encrypt_type enctype; 1406 u8 first_hdr[64]; 1407 u8 *qos; 1408 bool has_fcs_err; 1409 bool has_crypto_err; 1410 bool has_tkip_err; 1411 bool has_peer_idx_invalid; 1412 bool is_decrypted; 1413 bool is_mgmt; 1414 u32 attention; 1415 1416 if (skb_queue_empty(amsdu)) 1417 return; 1418 1419 first = skb_peek(amsdu); 1420 rxd = (void *)first->data - sizeof(*rxd); 1421 1422 is_mgmt = !!(rxd->attention.flags & 1423 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE)); 1424 1425 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), 1426 RX_MPDU_START_INFO0_ENCRYPT_TYPE); 1427 1428 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11 1429 * decapped header. It'll be used for undecapping of each MSDU. 1430 */ 1431 hdr = (void *)rxd->rx_hdr_status; 1432 memcpy(first_hdr, hdr, RX_HTT_HDR_STATUS_LEN); 1433 1434 /* Each A-MSDU subframe will use the original header as the base and be 1435 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl. 1436 */ 1437 hdr = (void *)first_hdr; 1438 1439 if (ieee80211_is_data_qos(hdr->frame_control)) { 1440 qos = ieee80211_get_qos_ctl(hdr); 1441 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT; 1442 } 1443 1444 /* Some attention flags are valid only in the last MSDU. */ 1445 last = skb_peek_tail(amsdu); 1446 rxd = (void *)last->data - sizeof(*rxd); 1447 attention = __le32_to_cpu(rxd->attention.flags); 1448 1449 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR); 1450 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR); 1451 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR); 1452 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID); 1453 1454 /* Note: If hardware captures an encrypted frame that it can't decrypt, 1455 * e.g. due to fcs error, missing peer or invalid key data it will 1456 * report the frame as raw. 1457 */ 1458 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE && 1459 !has_fcs_err && 1460 !has_crypto_err && 1461 !has_peer_idx_invalid); 1462 1463 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */ 1464 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC | 1465 RX_FLAG_MMIC_ERROR | 1466 RX_FLAG_DECRYPTED | 1467 RX_FLAG_IV_STRIPPED | 1468 RX_FLAG_ONLY_MONITOR | 1469 RX_FLAG_MMIC_STRIPPED); 1470 1471 if (has_fcs_err) 1472 status->flag |= RX_FLAG_FAILED_FCS_CRC; 1473 1474 if (has_tkip_err) 1475 status->flag |= RX_FLAG_MMIC_ERROR; 1476 1477 /* Firmware reports all necessary management frames via WMI already. 1478 * They are not reported to monitor interfaces at all so pass the ones 1479 * coming via HTT to monitor interfaces instead. This simplifies 1480 * matters a lot. 1481 */ 1482 if (is_mgmt) 1483 status->flag |= RX_FLAG_ONLY_MONITOR; 1484 1485 if (is_decrypted) { 1486 status->flag |= RX_FLAG_DECRYPTED; 1487 1488 if (likely(!is_mgmt)) 1489 status->flag |= RX_FLAG_MMIC_STRIPPED; 1490 1491 if (fill_crypt_header) 1492 status->flag |= RX_FLAG_MIC_STRIPPED | 1493 RX_FLAG_ICV_STRIPPED; 1494 else 1495 status->flag |= RX_FLAG_IV_STRIPPED; 1496 } 1497 1498 skb_queue_walk(amsdu, msdu) { 1499 ath10k_htt_rx_h_csum_offload(msdu); 1500 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype, 1501 is_decrypted); 1502 1503 /* Undecapping involves copying the original 802.11 header back 1504 * to sk_buff. If frame is protected and hardware has decrypted 1505 * it then remove the protected bit. 1506 */ 1507 if (!is_decrypted) 1508 continue; 1509 if (is_mgmt) 1510 continue; 1511 1512 if (fill_crypt_header) 1513 continue; 1514 1515 hdr = (void *)msdu->data; 1516 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 1517 } 1518 } 1519 1520 static void ath10k_htt_rx_h_deliver(struct ath10k *ar, 1521 struct sk_buff_head *amsdu, 1522 struct ieee80211_rx_status *status) 1523 { 1524 struct sk_buff *msdu; 1525 struct sk_buff *first_subframe; 1526 1527 first_subframe = skb_peek(amsdu); 1528 1529 while ((msdu = __skb_dequeue(amsdu))) { 1530 /* Setup per-MSDU flags */ 1531 if (skb_queue_empty(amsdu)) 1532 status->flag &= ~RX_FLAG_AMSDU_MORE; 1533 else 1534 status->flag |= RX_FLAG_AMSDU_MORE; 1535 1536 if (msdu == first_subframe) { 1537 first_subframe = NULL; 1538 status->flag &= ~RX_FLAG_ALLOW_SAME_PN; 1539 } else { 1540 status->flag |= RX_FLAG_ALLOW_SAME_PN; 1541 } 1542 1543 ath10k_process_rx(ar, status, msdu); 1544 } 1545 } 1546 1547 static int ath10k_unchain_msdu(struct sk_buff_head *amsdu) 1548 { 1549 struct sk_buff *skb, *first; 1550 int space; 1551 int total_len = 0; 1552 1553 /* TODO: Might could optimize this by using 1554 * skb_try_coalesce or similar method to 1555 * decrease copying, or maybe get mac80211 to 1556 * provide a way to just receive a list of 1557 * skb? 1558 */ 1559 1560 first = __skb_dequeue(amsdu); 1561 1562 /* Allocate total length all at once. */ 1563 skb_queue_walk(amsdu, skb) 1564 total_len += skb->len; 1565 1566 space = total_len - skb_tailroom(first); 1567 if ((space > 0) && 1568 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) { 1569 /* TODO: bump some rx-oom error stat */ 1570 /* put it back together so we can free the 1571 * whole list at once. 1572 */ 1573 __skb_queue_head(amsdu, first); 1574 return -1; 1575 } 1576 1577 /* Walk list again, copying contents into 1578 * msdu_head 1579 */ 1580 while ((skb = __skb_dequeue(amsdu))) { 1581 skb_copy_from_linear_data(skb, skb_put(first, skb->len), 1582 skb->len); 1583 dev_kfree_skb_any(skb); 1584 } 1585 1586 __skb_queue_head(amsdu, first); 1587 return 0; 1588 } 1589 1590 static void ath10k_htt_rx_h_unchain(struct ath10k *ar, 1591 struct sk_buff_head *amsdu) 1592 { 1593 struct sk_buff *first; 1594 struct htt_rx_desc *rxd; 1595 enum rx_msdu_decap_format decap; 1596 1597 first = skb_peek(amsdu); 1598 rxd = (void *)first->data - sizeof(*rxd); 1599 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1), 1600 RX_MSDU_START_INFO1_DECAP_FORMAT); 1601 1602 /* FIXME: Current unchaining logic can only handle simple case of raw 1603 * msdu chaining. If decapping is other than raw the chaining may be 1604 * more complex and this isn't handled by the current code. Don't even 1605 * try re-constructing such frames - it'll be pretty much garbage. 1606 */ 1607 if (decap != RX_MSDU_DECAP_RAW || 1608 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) { 1609 __skb_queue_purge(amsdu); 1610 return; 1611 } 1612 1613 ath10k_unchain_msdu(amsdu); 1614 } 1615 1616 static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar, 1617 struct sk_buff_head *amsdu, 1618 struct ieee80211_rx_status *rx_status) 1619 { 1620 /* FIXME: It might be a good idea to do some fuzzy-testing to drop 1621 * invalid/dangerous frames. 1622 */ 1623 1624 if (!rx_status->freq) { 1625 ath10k_dbg(ar, ATH10K_DBG_HTT, "no channel configured; ignoring frame(s)!\n"); 1626 return false; 1627 } 1628 1629 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) { 1630 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n"); 1631 return false; 1632 } 1633 1634 return true; 1635 } 1636 1637 static void ath10k_htt_rx_h_filter(struct ath10k *ar, 1638 struct sk_buff_head *amsdu, 1639 struct ieee80211_rx_status *rx_status) 1640 { 1641 if (skb_queue_empty(amsdu)) 1642 return; 1643 1644 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status)) 1645 return; 1646 1647 __skb_queue_purge(amsdu); 1648 } 1649 1650 static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt) 1651 { 1652 struct ath10k *ar = htt->ar; 1653 struct ieee80211_rx_status *rx_status = &htt->rx_status; 1654 struct sk_buff_head amsdu; 1655 int ret, num_msdus; 1656 1657 __skb_queue_head_init(&amsdu); 1658 1659 spin_lock_bh(&htt->rx_ring.lock); 1660 if (htt->rx_confused) { 1661 spin_unlock_bh(&htt->rx_ring.lock); 1662 return -EIO; 1663 } 1664 ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu); 1665 spin_unlock_bh(&htt->rx_ring.lock); 1666 1667 if (ret < 0) { 1668 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret); 1669 __skb_queue_purge(&amsdu); 1670 /* FIXME: It's probably a good idea to reboot the 1671 * device instead of leaving it inoperable. 1672 */ 1673 htt->rx_confused = true; 1674 return ret; 1675 } 1676 1677 num_msdus = skb_queue_len(&amsdu); 1678 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff); 1679 1680 /* only for ret = 1 indicates chained msdus */ 1681 if (ret > 0) 1682 ath10k_htt_rx_h_unchain(ar, &amsdu); 1683 1684 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status); 1685 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status, true); 1686 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status); 1687 1688 return num_msdus; 1689 } 1690 1691 static void ath10k_htt_rx_proc_rx_ind(struct ath10k_htt *htt, 1692 struct htt_rx_indication *rx) 1693 { 1694 struct ath10k *ar = htt->ar; 1695 struct htt_rx_indication_mpdu_range *mpdu_ranges; 1696 int num_mpdu_ranges; 1697 int i, mpdu_count = 0; 1698 1699 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1), 1700 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); 1701 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx); 1702 1703 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ", 1704 rx, sizeof(*rx) + 1705 (sizeof(struct htt_rx_indication_mpdu_range) * 1706 num_mpdu_ranges)); 1707 1708 for (i = 0; i < num_mpdu_ranges; i++) 1709 mpdu_count += mpdu_ranges[i].mpdu_count; 1710 1711 atomic_add(mpdu_count, &htt->num_mpdus_ready); 1712 } 1713 1714 static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar, 1715 struct sk_buff *skb) 1716 { 1717 struct ath10k_htt *htt = &ar->htt; 1718 struct htt_resp *resp = (struct htt_resp *)skb->data; 1719 struct htt_tx_done tx_done = {}; 1720 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS); 1721 __le16 msdu_id; 1722 int i; 1723 1724 switch (status) { 1725 case HTT_DATA_TX_STATUS_NO_ACK: 1726 tx_done.status = HTT_TX_COMPL_STATE_NOACK; 1727 break; 1728 case HTT_DATA_TX_STATUS_OK: 1729 tx_done.status = HTT_TX_COMPL_STATE_ACK; 1730 break; 1731 case HTT_DATA_TX_STATUS_DISCARD: 1732 case HTT_DATA_TX_STATUS_POSTPONE: 1733 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL: 1734 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 1735 break; 1736 default: 1737 ath10k_warn(ar, "unhandled tx completion status %d\n", status); 1738 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 1739 break; 1740 } 1741 1742 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n", 1743 resp->data_tx_completion.num_msdus); 1744 1745 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) { 1746 msdu_id = resp->data_tx_completion.msdus[i]; 1747 tx_done.msdu_id = __le16_to_cpu(msdu_id); 1748 1749 /* kfifo_put: In practice firmware shouldn't fire off per-CE 1750 * interrupt and main interrupt (MSI/-X range case) for the same 1751 * HTC service so it should be safe to use kfifo_put w/o lock. 1752 * 1753 * From kfifo_put() documentation: 1754 * Note that with only one concurrent reader and one concurrent 1755 * writer, you don't need extra locking to use these macro. 1756 */ 1757 if (!kfifo_put(&htt->txdone_fifo, tx_done)) { 1758 ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n", 1759 tx_done.msdu_id, tx_done.status); 1760 ath10k_txrx_tx_unref(htt, &tx_done); 1761 } 1762 } 1763 } 1764 1765 static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp) 1766 { 1767 struct htt_rx_addba *ev = &resp->rx_addba; 1768 struct ath10k_peer *peer; 1769 struct ath10k_vif *arvif; 1770 u16 info0, tid, peer_id; 1771 1772 info0 = __le16_to_cpu(ev->info0); 1773 tid = MS(info0, HTT_RX_BA_INFO0_TID); 1774 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 1775 1776 ath10k_dbg(ar, ATH10K_DBG_HTT, 1777 "htt rx addba tid %hu peer_id %hu size %hhu\n", 1778 tid, peer_id, ev->window_size); 1779 1780 spin_lock_bh(&ar->data_lock); 1781 peer = ath10k_peer_find_by_id(ar, peer_id); 1782 if (!peer) { 1783 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", 1784 peer_id); 1785 spin_unlock_bh(&ar->data_lock); 1786 return; 1787 } 1788 1789 arvif = ath10k_get_arvif(ar, peer->vdev_id); 1790 if (!arvif) { 1791 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 1792 peer->vdev_id); 1793 spin_unlock_bh(&ar->data_lock); 1794 return; 1795 } 1796 1797 ath10k_dbg(ar, ATH10K_DBG_HTT, 1798 "htt rx start rx ba session sta %pM tid %hu size %hhu\n", 1799 peer->addr, tid, ev->window_size); 1800 1801 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid); 1802 spin_unlock_bh(&ar->data_lock); 1803 } 1804 1805 static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp) 1806 { 1807 struct htt_rx_delba *ev = &resp->rx_delba; 1808 struct ath10k_peer *peer; 1809 struct ath10k_vif *arvif; 1810 u16 info0, tid, peer_id; 1811 1812 info0 = __le16_to_cpu(ev->info0); 1813 tid = MS(info0, HTT_RX_BA_INFO0_TID); 1814 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 1815 1816 ath10k_dbg(ar, ATH10K_DBG_HTT, 1817 "htt rx delba tid %hu peer_id %hu\n", 1818 tid, peer_id); 1819 1820 spin_lock_bh(&ar->data_lock); 1821 peer = ath10k_peer_find_by_id(ar, peer_id); 1822 if (!peer) { 1823 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", 1824 peer_id); 1825 spin_unlock_bh(&ar->data_lock); 1826 return; 1827 } 1828 1829 arvif = ath10k_get_arvif(ar, peer->vdev_id); 1830 if (!arvif) { 1831 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 1832 peer->vdev_id); 1833 spin_unlock_bh(&ar->data_lock); 1834 return; 1835 } 1836 1837 ath10k_dbg(ar, ATH10K_DBG_HTT, 1838 "htt rx stop rx ba session sta %pM tid %hu\n", 1839 peer->addr, tid); 1840 1841 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid); 1842 spin_unlock_bh(&ar->data_lock); 1843 } 1844 1845 static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list, 1846 struct sk_buff_head *amsdu) 1847 { 1848 struct sk_buff *msdu; 1849 struct htt_rx_desc *rxd; 1850 1851 if (skb_queue_empty(list)) 1852 return -ENOBUFS; 1853 1854 if (WARN_ON(!skb_queue_empty(amsdu))) 1855 return -EINVAL; 1856 1857 while ((msdu = __skb_dequeue(list))) { 1858 __skb_queue_tail(amsdu, msdu); 1859 1860 rxd = (void *)msdu->data - sizeof(*rxd); 1861 if (rxd->msdu_end.common.info0 & 1862 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)) 1863 break; 1864 } 1865 1866 msdu = skb_peek_tail(amsdu); 1867 rxd = (void *)msdu->data - sizeof(*rxd); 1868 if (!(rxd->msdu_end.common.info0 & 1869 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) { 1870 skb_queue_splice_init(amsdu, list); 1871 return -EAGAIN; 1872 } 1873 1874 return 0; 1875 } 1876 1877 static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status, 1878 struct sk_buff *skb) 1879 { 1880 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1881 1882 if (!ieee80211_has_protected(hdr->frame_control)) 1883 return; 1884 1885 /* Offloaded frames are already decrypted but firmware insists they are 1886 * protected in the 802.11 header. Strip the flag. Otherwise mac80211 1887 * will drop the frame. 1888 */ 1889 1890 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 1891 status->flag |= RX_FLAG_DECRYPTED | 1892 RX_FLAG_IV_STRIPPED | 1893 RX_FLAG_MMIC_STRIPPED; 1894 } 1895 1896 static int ath10k_htt_rx_h_rx_offload(struct ath10k *ar, 1897 struct sk_buff_head *list) 1898 { 1899 struct ath10k_htt *htt = &ar->htt; 1900 struct ieee80211_rx_status *status = &htt->rx_status; 1901 struct htt_rx_offload_msdu *rx; 1902 struct sk_buff *msdu; 1903 size_t offset; 1904 int num_msdu = 0; 1905 1906 while ((msdu = __skb_dequeue(list))) { 1907 /* Offloaded frames don't have Rx descriptor. Instead they have 1908 * a short meta information header. 1909 */ 1910 1911 rx = (void *)msdu->data; 1912 1913 skb_put(msdu, sizeof(*rx)); 1914 skb_pull(msdu, sizeof(*rx)); 1915 1916 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) { 1917 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n"); 1918 dev_kfree_skb_any(msdu); 1919 continue; 1920 } 1921 1922 skb_put(msdu, __le16_to_cpu(rx->msdu_len)); 1923 1924 /* Offloaded rx header length isn't multiple of 2 nor 4 so the 1925 * actual payload is unaligned. Align the frame. Otherwise 1926 * mac80211 complains. This shouldn't reduce performance much 1927 * because these offloaded frames are rare. 1928 */ 1929 offset = 4 - ((unsigned long)msdu->data & 3); 1930 skb_put(msdu, offset); 1931 memmove(msdu->data + offset, msdu->data, msdu->len); 1932 skb_pull(msdu, offset); 1933 1934 /* FIXME: The frame is NWifi. Re-construct QoS Control 1935 * if possible later. 1936 */ 1937 1938 memset(status, 0, sizeof(*status)); 1939 status->flag |= RX_FLAG_NO_SIGNAL_VAL; 1940 1941 ath10k_htt_rx_h_rx_offload_prot(status, msdu); 1942 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id); 1943 ath10k_process_rx(ar, status, msdu); 1944 num_msdu++; 1945 } 1946 return num_msdu; 1947 } 1948 1949 static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb) 1950 { 1951 struct ath10k_htt *htt = &ar->htt; 1952 struct htt_resp *resp = (void *)skb->data; 1953 struct ieee80211_rx_status *status = &htt->rx_status; 1954 struct sk_buff_head list; 1955 struct sk_buff_head amsdu; 1956 u16 peer_id; 1957 u16 msdu_count; 1958 u8 vdev_id; 1959 u8 tid; 1960 bool offload; 1961 bool frag; 1962 int ret, num_msdus = 0; 1963 1964 lockdep_assert_held(&htt->rx_ring.lock); 1965 1966 if (htt->rx_confused) 1967 return -EIO; 1968 1969 skb_pull(skb, sizeof(resp->hdr)); 1970 skb_pull(skb, sizeof(resp->rx_in_ord_ind)); 1971 1972 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id); 1973 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count); 1974 vdev_id = resp->rx_in_ord_ind.vdev_id; 1975 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID); 1976 offload = !!(resp->rx_in_ord_ind.info & 1977 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 1978 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK); 1979 1980 ath10k_dbg(ar, ATH10K_DBG_HTT, 1981 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n", 1982 vdev_id, peer_id, tid, offload, frag, msdu_count); 1983 1984 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) { 1985 ath10k_warn(ar, "dropping invalid in order rx indication\n"); 1986 return -EINVAL; 1987 } 1988 1989 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later 1990 * extracted and processed. 1991 */ 1992 __skb_queue_head_init(&list); 1993 ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list); 1994 if (ret < 0) { 1995 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret); 1996 htt->rx_confused = true; 1997 return -EIO; 1998 } 1999 2000 /* Offloaded frames are very different and need to be handled 2001 * separately. 2002 */ 2003 if (offload) 2004 num_msdus = ath10k_htt_rx_h_rx_offload(ar, &list); 2005 2006 while (!skb_queue_empty(&list)) { 2007 __skb_queue_head_init(&amsdu); 2008 ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu); 2009 switch (ret) { 2010 case 0: 2011 /* Note: The in-order indication may report interleaved 2012 * frames from different PPDUs meaning reported rx rate 2013 * to mac80211 isn't accurate/reliable. It's still 2014 * better to report something than nothing though. This 2015 * should still give an idea about rx rate to the user. 2016 */ 2017 num_msdus += skb_queue_len(&amsdu); 2018 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id); 2019 ath10k_htt_rx_h_filter(ar, &amsdu, status); 2020 ath10k_htt_rx_h_mpdu(ar, &amsdu, status, false); 2021 ath10k_htt_rx_h_deliver(ar, &amsdu, status); 2022 break; 2023 case -EAGAIN: 2024 /* fall through */ 2025 default: 2026 /* Should not happen. */ 2027 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret); 2028 htt->rx_confused = true; 2029 __skb_queue_purge(&list); 2030 return -EIO; 2031 } 2032 } 2033 return num_msdus; 2034 } 2035 2036 static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar, 2037 const __le32 *resp_ids, 2038 int num_resp_ids) 2039 { 2040 int i; 2041 u32 resp_id; 2042 2043 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n", 2044 num_resp_ids); 2045 2046 for (i = 0; i < num_resp_ids; i++) { 2047 resp_id = le32_to_cpu(resp_ids[i]); 2048 2049 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n", 2050 resp_id); 2051 2052 /* TODO: free resp_id */ 2053 } 2054 } 2055 2056 static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb) 2057 { 2058 struct ieee80211_hw *hw = ar->hw; 2059 struct ieee80211_txq *txq; 2060 struct htt_resp *resp = (struct htt_resp *)skb->data; 2061 struct htt_tx_fetch_record *record; 2062 size_t len; 2063 size_t max_num_bytes; 2064 size_t max_num_msdus; 2065 size_t num_bytes; 2066 size_t num_msdus; 2067 const __le32 *resp_ids; 2068 u16 num_records; 2069 u16 num_resp_ids; 2070 u16 peer_id; 2071 u8 tid; 2072 int ret; 2073 int i; 2074 2075 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n"); 2076 2077 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind); 2078 if (unlikely(skb->len < len)) { 2079 ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n"); 2080 return; 2081 } 2082 2083 num_records = le16_to_cpu(resp->tx_fetch_ind.num_records); 2084 num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids); 2085 2086 len += sizeof(resp->tx_fetch_ind.records[0]) * num_records; 2087 len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids; 2088 2089 if (unlikely(skb->len < len)) { 2090 ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n"); 2091 return; 2092 } 2093 2094 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n", 2095 num_records, num_resp_ids, 2096 le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num)); 2097 2098 if (!ar->htt.tx_q_state.enabled) { 2099 ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n"); 2100 return; 2101 } 2102 2103 if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) { 2104 ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n"); 2105 return; 2106 } 2107 2108 rcu_read_lock(); 2109 2110 for (i = 0; i < num_records; i++) { 2111 record = &resp->tx_fetch_ind.records[i]; 2112 peer_id = MS(le16_to_cpu(record->info), 2113 HTT_TX_FETCH_RECORD_INFO_PEER_ID); 2114 tid = MS(le16_to_cpu(record->info), 2115 HTT_TX_FETCH_RECORD_INFO_TID); 2116 max_num_msdus = le16_to_cpu(record->num_msdus); 2117 max_num_bytes = le32_to_cpu(record->num_bytes); 2118 2119 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n", 2120 i, peer_id, tid, max_num_msdus, max_num_bytes); 2121 2122 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) || 2123 unlikely(tid >= ar->htt.tx_q_state.num_tids)) { 2124 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n", 2125 peer_id, tid); 2126 continue; 2127 } 2128 2129 spin_lock_bh(&ar->data_lock); 2130 txq = ath10k_mac_txq_lookup(ar, peer_id, tid); 2131 spin_unlock_bh(&ar->data_lock); 2132 2133 /* It is okay to release the lock and use txq because RCU read 2134 * lock is held. 2135 */ 2136 2137 if (unlikely(!txq)) { 2138 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n", 2139 peer_id, tid); 2140 continue; 2141 } 2142 2143 num_msdus = 0; 2144 num_bytes = 0; 2145 2146 while (num_msdus < max_num_msdus && 2147 num_bytes < max_num_bytes) { 2148 ret = ath10k_mac_tx_push_txq(hw, txq); 2149 if (ret < 0) 2150 break; 2151 2152 num_msdus++; 2153 num_bytes += ret; 2154 } 2155 2156 record->num_msdus = cpu_to_le16(num_msdus); 2157 record->num_bytes = cpu_to_le32(num_bytes); 2158 2159 ath10k_htt_tx_txq_recalc(hw, txq); 2160 } 2161 2162 rcu_read_unlock(); 2163 2164 resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind); 2165 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids); 2166 2167 ret = ath10k_htt_tx_fetch_resp(ar, 2168 resp->tx_fetch_ind.token, 2169 resp->tx_fetch_ind.fetch_seq_num, 2170 resp->tx_fetch_ind.records, 2171 num_records); 2172 if (unlikely(ret)) { 2173 ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n", 2174 le32_to_cpu(resp->tx_fetch_ind.token), ret); 2175 /* FIXME: request fw restart */ 2176 } 2177 2178 ath10k_htt_tx_txq_sync(ar); 2179 } 2180 2181 static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar, 2182 struct sk_buff *skb) 2183 { 2184 const struct htt_resp *resp = (void *)skb->data; 2185 size_t len; 2186 int num_resp_ids; 2187 2188 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n"); 2189 2190 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm); 2191 if (unlikely(skb->len < len)) { 2192 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n"); 2193 return; 2194 } 2195 2196 num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids); 2197 len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids; 2198 2199 if (unlikely(skb->len < len)) { 2200 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n"); 2201 return; 2202 } 2203 2204 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, 2205 resp->tx_fetch_confirm.resp_ids, 2206 num_resp_ids); 2207 } 2208 2209 static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar, 2210 struct sk_buff *skb) 2211 { 2212 const struct htt_resp *resp = (void *)skb->data; 2213 const struct htt_tx_mode_switch_record *record; 2214 struct ieee80211_txq *txq; 2215 struct ath10k_txq *artxq; 2216 size_t len; 2217 size_t num_records; 2218 enum htt_tx_mode_switch_mode mode; 2219 bool enable; 2220 u16 info0; 2221 u16 info1; 2222 u16 threshold; 2223 u16 peer_id; 2224 u8 tid; 2225 int i; 2226 2227 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n"); 2228 2229 len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind); 2230 if (unlikely(skb->len < len)) { 2231 ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n"); 2232 return; 2233 } 2234 2235 info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0); 2236 info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1); 2237 2238 enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE); 2239 num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD); 2240 mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE); 2241 threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD); 2242 2243 ath10k_dbg(ar, ATH10K_DBG_HTT, 2244 "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n", 2245 info0, info1, enable, num_records, mode, threshold); 2246 2247 len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records; 2248 2249 if (unlikely(skb->len < len)) { 2250 ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n"); 2251 return; 2252 } 2253 2254 switch (mode) { 2255 case HTT_TX_MODE_SWITCH_PUSH: 2256 case HTT_TX_MODE_SWITCH_PUSH_PULL: 2257 break; 2258 default: 2259 ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n", 2260 mode); 2261 return; 2262 } 2263 2264 if (!enable) 2265 return; 2266 2267 ar->htt.tx_q_state.enabled = enable; 2268 ar->htt.tx_q_state.mode = mode; 2269 ar->htt.tx_q_state.num_push_allowed = threshold; 2270 2271 rcu_read_lock(); 2272 2273 for (i = 0; i < num_records; i++) { 2274 record = &resp->tx_mode_switch_ind.records[i]; 2275 info0 = le16_to_cpu(record->info0); 2276 peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID); 2277 tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID); 2278 2279 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) || 2280 unlikely(tid >= ar->htt.tx_q_state.num_tids)) { 2281 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n", 2282 peer_id, tid); 2283 continue; 2284 } 2285 2286 spin_lock_bh(&ar->data_lock); 2287 txq = ath10k_mac_txq_lookup(ar, peer_id, tid); 2288 spin_unlock_bh(&ar->data_lock); 2289 2290 /* It is okay to release the lock and use txq because RCU read 2291 * lock is held. 2292 */ 2293 2294 if (unlikely(!txq)) { 2295 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n", 2296 peer_id, tid); 2297 continue; 2298 } 2299 2300 spin_lock_bh(&ar->htt.tx_lock); 2301 artxq = (void *)txq->drv_priv; 2302 artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus); 2303 spin_unlock_bh(&ar->htt.tx_lock); 2304 } 2305 2306 rcu_read_unlock(); 2307 2308 ath10k_mac_tx_push_pending(ar); 2309 } 2310 2311 void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) 2312 { 2313 bool release; 2314 2315 release = ath10k_htt_t2h_msg_handler(ar, skb); 2316 2317 /* Free the indication buffer */ 2318 if (release) 2319 dev_kfree_skb_any(skb); 2320 } 2321 2322 static inline bool is_valid_legacy_rate(u8 rate) 2323 { 2324 static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12, 2325 18, 24, 36, 48, 54}; 2326 int i; 2327 2328 for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) { 2329 if (rate == legacy_rates[i]) 2330 return true; 2331 } 2332 2333 return false; 2334 } 2335 2336 static void 2337 ath10k_update_per_peer_tx_stats(struct ath10k *ar, 2338 struct ieee80211_sta *sta, 2339 struct ath10k_per_peer_tx_stats *peer_stats) 2340 { 2341 struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv; 2342 u8 rate = 0, sgi; 2343 struct rate_info txrate; 2344 2345 lockdep_assert_held(&ar->data_lock); 2346 2347 txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode); 2348 txrate.bw = ATH10K_HW_BW(peer_stats->flags); 2349 txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode); 2350 txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode); 2351 sgi = ATH10K_HW_GI(peer_stats->flags); 2352 2353 if (txrate.flags == WMI_RATE_PREAMBLE_VHT && txrate.mcs > 9) { 2354 ath10k_warn(ar, "Invalid VHT mcs %hhd peer stats", txrate.mcs); 2355 return; 2356 } 2357 2358 if (txrate.flags == WMI_RATE_PREAMBLE_HT && 2359 (txrate.mcs > 7 || txrate.nss < 1)) { 2360 ath10k_warn(ar, "Invalid HT mcs %hhd nss %hhd peer stats", 2361 txrate.mcs, txrate.nss); 2362 return; 2363 } 2364 2365 memset(&arsta->txrate, 0, sizeof(arsta->txrate)); 2366 2367 if (txrate.flags == WMI_RATE_PREAMBLE_CCK || 2368 txrate.flags == WMI_RATE_PREAMBLE_OFDM) { 2369 rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode); 2370 2371 if (!is_valid_legacy_rate(rate)) { 2372 ath10k_warn(ar, "Invalid legacy rate %hhd peer stats", 2373 rate); 2374 return; 2375 } 2376 2377 /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */ 2378 rate *= 10; 2379 if (rate == 60 && txrate.flags == WMI_RATE_PREAMBLE_CCK) 2380 rate = rate - 5; 2381 arsta->txrate.legacy = rate; 2382 } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) { 2383 arsta->txrate.flags = RATE_INFO_FLAGS_MCS; 2384 arsta->txrate.mcs = txrate.mcs + 8 * (txrate.nss - 1); 2385 } else { 2386 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS; 2387 arsta->txrate.mcs = txrate.mcs; 2388 } 2389 2390 if (sgi) 2391 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; 2392 2393 arsta->txrate.nss = txrate.nss; 2394 arsta->txrate.bw = txrate.bw + RATE_INFO_BW_20; 2395 } 2396 2397 static void ath10k_htt_fetch_peer_stats(struct ath10k *ar, 2398 struct sk_buff *skb) 2399 { 2400 struct htt_resp *resp = (struct htt_resp *)skb->data; 2401 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats; 2402 struct htt_per_peer_tx_stats_ind *tx_stats; 2403 struct ieee80211_sta *sta; 2404 struct ath10k_peer *peer; 2405 int peer_id, i; 2406 u8 ppdu_len, num_ppdu; 2407 2408 num_ppdu = resp->peer_tx_stats.num_ppdu; 2409 ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32); 2410 2411 if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) { 2412 ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len); 2413 return; 2414 } 2415 2416 tx_stats = (struct htt_per_peer_tx_stats_ind *) 2417 (resp->peer_tx_stats.payload); 2418 peer_id = __le16_to_cpu(tx_stats->peer_id); 2419 2420 rcu_read_lock(); 2421 spin_lock_bh(&ar->data_lock); 2422 peer = ath10k_peer_find_by_id(ar, peer_id); 2423 if (!peer) { 2424 ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n", 2425 peer_id); 2426 goto out; 2427 } 2428 2429 sta = peer->sta; 2430 for (i = 0; i < num_ppdu; i++) { 2431 tx_stats = (struct htt_per_peer_tx_stats_ind *) 2432 (resp->peer_tx_stats.payload + i * ppdu_len); 2433 2434 p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes); 2435 p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes); 2436 p_tx_stats->failed_bytes = 2437 __le32_to_cpu(tx_stats->failed_bytes); 2438 p_tx_stats->ratecode = tx_stats->ratecode; 2439 p_tx_stats->flags = tx_stats->flags; 2440 p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts); 2441 p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts); 2442 p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts); 2443 2444 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats); 2445 } 2446 2447 out: 2448 spin_unlock_bh(&ar->data_lock); 2449 rcu_read_unlock(); 2450 } 2451 2452 bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) 2453 { 2454 struct ath10k_htt *htt = &ar->htt; 2455 struct htt_resp *resp = (struct htt_resp *)skb->data; 2456 enum htt_t2h_msg_type type; 2457 2458 /* confirm alignment */ 2459 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 2460 ath10k_warn(ar, "unaligned htt message, expect trouble\n"); 2461 2462 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n", 2463 resp->hdr.msg_type); 2464 2465 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) { 2466 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X", 2467 resp->hdr.msg_type, ar->htt.t2h_msg_types_max); 2468 return true; 2469 } 2470 type = ar->htt.t2h_msg_types[resp->hdr.msg_type]; 2471 2472 switch (type) { 2473 case HTT_T2H_MSG_TYPE_VERSION_CONF: { 2474 htt->target_version_major = resp->ver_resp.major; 2475 htt->target_version_minor = resp->ver_resp.minor; 2476 complete(&htt->target_version_received); 2477 break; 2478 } 2479 case HTT_T2H_MSG_TYPE_RX_IND: 2480 ath10k_htt_rx_proc_rx_ind(htt, &resp->rx_ind); 2481 break; 2482 case HTT_T2H_MSG_TYPE_PEER_MAP: { 2483 struct htt_peer_map_event ev = { 2484 .vdev_id = resp->peer_map.vdev_id, 2485 .peer_id = __le16_to_cpu(resp->peer_map.peer_id), 2486 }; 2487 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr)); 2488 ath10k_peer_map_event(htt, &ev); 2489 break; 2490 } 2491 case HTT_T2H_MSG_TYPE_PEER_UNMAP: { 2492 struct htt_peer_unmap_event ev = { 2493 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id), 2494 }; 2495 ath10k_peer_unmap_event(htt, &ev); 2496 break; 2497 } 2498 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: { 2499 struct htt_tx_done tx_done = {}; 2500 int status = __le32_to_cpu(resp->mgmt_tx_completion.status); 2501 2502 tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id); 2503 2504 switch (status) { 2505 case HTT_MGMT_TX_STATUS_OK: 2506 tx_done.status = HTT_TX_COMPL_STATE_ACK; 2507 break; 2508 case HTT_MGMT_TX_STATUS_RETRY: 2509 tx_done.status = HTT_TX_COMPL_STATE_NOACK; 2510 break; 2511 case HTT_MGMT_TX_STATUS_DROP: 2512 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 2513 break; 2514 } 2515 2516 status = ath10k_txrx_tx_unref(htt, &tx_done); 2517 if (!status) { 2518 spin_lock_bh(&htt->tx_lock); 2519 ath10k_htt_tx_mgmt_dec_pending(htt); 2520 spin_unlock_bh(&htt->tx_lock); 2521 } 2522 break; 2523 } 2524 case HTT_T2H_MSG_TYPE_TX_COMPL_IND: 2525 ath10k_htt_rx_tx_compl_ind(htt->ar, skb); 2526 break; 2527 case HTT_T2H_MSG_TYPE_SEC_IND: { 2528 struct ath10k *ar = htt->ar; 2529 struct htt_security_indication *ev = &resp->security_indication; 2530 2531 ath10k_dbg(ar, ATH10K_DBG_HTT, 2532 "sec ind peer_id %d unicast %d type %d\n", 2533 __le16_to_cpu(ev->peer_id), 2534 !!(ev->flags & HTT_SECURITY_IS_UNICAST), 2535 MS(ev->flags, HTT_SECURITY_TYPE)); 2536 complete(&ar->install_key_done); 2537 break; 2538 } 2539 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: { 2540 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 2541 skb->data, skb->len); 2542 atomic_inc(&htt->num_mpdus_ready); 2543 break; 2544 } 2545 case HTT_T2H_MSG_TYPE_TEST: 2546 break; 2547 case HTT_T2H_MSG_TYPE_STATS_CONF: 2548 trace_ath10k_htt_stats(ar, skb->data, skb->len); 2549 break; 2550 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND: 2551 /* Firmware can return tx frames if it's unable to fully 2552 * process them and suspects host may be able to fix it. ath10k 2553 * sends all tx frames as already inspected so this shouldn't 2554 * happen unless fw has a bug. 2555 */ 2556 ath10k_warn(ar, "received an unexpected htt tx inspect event\n"); 2557 break; 2558 case HTT_T2H_MSG_TYPE_RX_ADDBA: 2559 ath10k_htt_rx_addba(ar, resp); 2560 break; 2561 case HTT_T2H_MSG_TYPE_RX_DELBA: 2562 ath10k_htt_rx_delba(ar, resp); 2563 break; 2564 case HTT_T2H_MSG_TYPE_PKTLOG: { 2565 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload, 2566 skb->len - 2567 offsetof(struct htt_resp, 2568 pktlog_msg.payload)); 2569 break; 2570 } 2571 case HTT_T2H_MSG_TYPE_RX_FLUSH: { 2572 /* Ignore this event because mac80211 takes care of Rx 2573 * aggregation reordering. 2574 */ 2575 break; 2576 } 2577 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: { 2578 __skb_queue_tail(&htt->rx_in_ord_compl_q, skb); 2579 return false; 2580 } 2581 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND: 2582 break; 2583 case HTT_T2H_MSG_TYPE_CHAN_CHANGE: { 2584 u32 phymode = __le32_to_cpu(resp->chan_change.phymode); 2585 u32 freq = __le32_to_cpu(resp->chan_change.freq); 2586 2587 ar->tgt_oper_chan = ieee80211_get_channel(ar->hw->wiphy, freq); 2588 ath10k_dbg(ar, ATH10K_DBG_HTT, 2589 "htt chan change freq %u phymode %s\n", 2590 freq, ath10k_wmi_phymode_str(phymode)); 2591 break; 2592 } 2593 case HTT_T2H_MSG_TYPE_AGGR_CONF: 2594 break; 2595 case HTT_T2H_MSG_TYPE_TX_FETCH_IND: { 2596 struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC); 2597 2598 if (!tx_fetch_ind) { 2599 ath10k_warn(ar, "failed to copy htt tx fetch ind\n"); 2600 break; 2601 } 2602 skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind); 2603 break; 2604 } 2605 case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM: 2606 ath10k_htt_rx_tx_fetch_confirm(ar, skb); 2607 break; 2608 case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND: 2609 ath10k_htt_rx_tx_mode_switch_ind(ar, skb); 2610 break; 2611 case HTT_T2H_MSG_TYPE_PEER_STATS: 2612 ath10k_htt_fetch_peer_stats(ar, skb); 2613 break; 2614 case HTT_T2H_MSG_TYPE_EN_STATS: 2615 default: 2616 ath10k_warn(ar, "htt event (%d) not handled\n", 2617 resp->hdr.msg_type); 2618 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 2619 skb->data, skb->len); 2620 break; 2621 } 2622 return true; 2623 } 2624 EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler); 2625 2626 void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar, 2627 struct sk_buff *skb) 2628 { 2629 trace_ath10k_htt_pktlog(ar, skb->data, skb->len); 2630 dev_kfree_skb_any(skb); 2631 } 2632 EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler); 2633 2634 int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget) 2635 { 2636 struct ath10k_htt *htt = &ar->htt; 2637 struct htt_tx_done tx_done = {}; 2638 struct sk_buff_head tx_ind_q; 2639 struct sk_buff *skb; 2640 unsigned long flags; 2641 int quota = 0, done, num_rx_msdus; 2642 bool resched_napi = false; 2643 2644 __skb_queue_head_init(&tx_ind_q); 2645 2646 /* Since in-ord-ind can deliver more than 1 A-MSDU in single event, 2647 * process it first to utilize full available quota. 2648 */ 2649 while (quota < budget) { 2650 if (skb_queue_empty(&htt->rx_in_ord_compl_q)) 2651 break; 2652 2653 skb = __skb_dequeue(&htt->rx_in_ord_compl_q); 2654 if (!skb) { 2655 resched_napi = true; 2656 goto exit; 2657 } 2658 2659 spin_lock_bh(&htt->rx_ring.lock); 2660 num_rx_msdus = ath10k_htt_rx_in_ord_ind(ar, skb); 2661 spin_unlock_bh(&htt->rx_ring.lock); 2662 if (num_rx_msdus < 0) { 2663 resched_napi = true; 2664 goto exit; 2665 } 2666 2667 dev_kfree_skb_any(skb); 2668 if (num_rx_msdus > 0) 2669 quota += num_rx_msdus; 2670 2671 if ((quota > ATH10K_NAPI_QUOTA_LIMIT) && 2672 !skb_queue_empty(&htt->rx_in_ord_compl_q)) { 2673 resched_napi = true; 2674 goto exit; 2675 } 2676 } 2677 2678 while (quota < budget) { 2679 /* no more data to receive */ 2680 if (!atomic_read(&htt->num_mpdus_ready)) 2681 break; 2682 2683 num_rx_msdus = ath10k_htt_rx_handle_amsdu(htt); 2684 if (num_rx_msdus < 0) { 2685 resched_napi = true; 2686 goto exit; 2687 } 2688 2689 quota += num_rx_msdus; 2690 atomic_dec(&htt->num_mpdus_ready); 2691 if ((quota > ATH10K_NAPI_QUOTA_LIMIT) && 2692 atomic_read(&htt->num_mpdus_ready)) { 2693 resched_napi = true; 2694 goto exit; 2695 } 2696 } 2697 2698 /* From NAPI documentation: 2699 * The napi poll() function may also process TX completions, in which 2700 * case if it processes the entire TX ring then it should count that 2701 * work as the rest of the budget. 2702 */ 2703 if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo)) 2704 quota = budget; 2705 2706 /* kfifo_get: called only within txrx_tasklet so it's neatly serialized. 2707 * From kfifo_get() documentation: 2708 * Note that with only one concurrent reader and one concurrent writer, 2709 * you don't need extra locking to use these macro. 2710 */ 2711 while (kfifo_get(&htt->txdone_fifo, &tx_done)) 2712 ath10k_txrx_tx_unref(htt, &tx_done); 2713 2714 ath10k_mac_tx_push_pending(ar); 2715 2716 spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags); 2717 skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q); 2718 spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags); 2719 2720 while ((skb = __skb_dequeue(&tx_ind_q))) { 2721 ath10k_htt_rx_tx_fetch_ind(ar, skb); 2722 dev_kfree_skb_any(skb); 2723 } 2724 2725 exit: 2726 ath10k_htt_rx_msdu_buff_replenish(htt); 2727 /* In case of rx failure or more data to read, report budget 2728 * to reschedule NAPI poll 2729 */ 2730 done = resched_napi ? budget : quota; 2731 2732 return done; 2733 } 2734 EXPORT_SYMBOL(ath10k_htt_txrx_compl_task); 2735