1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef _HTT_H_ 19 #define _HTT_H_ 20 21 #include <linux/bug.h> 22 #include <linux/interrupt.h> 23 #include <linux/dmapool.h> 24 #include <net/mac80211.h> 25 26 #include "htc.h" 27 #include "rx_desc.h" 28 29 enum htt_dbg_stats_type { 30 HTT_DBG_STATS_WAL_PDEV_TXRX = 1 << 0, 31 HTT_DBG_STATS_RX_REORDER = 1 << 1, 32 HTT_DBG_STATS_RX_RATE_INFO = 1 << 2, 33 HTT_DBG_STATS_TX_PPDU_LOG = 1 << 3, 34 HTT_DBG_STATS_TX_RATE_INFO = 1 << 4, 35 /* bits 5-23 currently reserved */ 36 37 HTT_DBG_NUM_STATS /* keep this last */ 38 }; 39 40 enum htt_h2t_msg_type { /* host-to-target */ 41 HTT_H2T_MSG_TYPE_VERSION_REQ = 0, 42 HTT_H2T_MSG_TYPE_TX_FRM = 1, 43 HTT_H2T_MSG_TYPE_RX_RING_CFG = 2, 44 HTT_H2T_MSG_TYPE_STATS_REQ = 3, 45 HTT_H2T_MSG_TYPE_SYNC = 4, 46 HTT_H2T_MSG_TYPE_AGGR_CFG = 5, 47 HTT_H2T_MSG_TYPE_FRAG_DESC_BANK_CFG = 6, 48 49 /* This command is used for sending management frames in HTT < 3.0. 50 * HTT >= 3.0 uses TX_FRM for everything. */ 51 HTT_H2T_MSG_TYPE_MGMT_TX = 7, 52 53 HTT_H2T_NUM_MSGS /* keep this last */ 54 }; 55 56 struct htt_cmd_hdr { 57 u8 msg_type; 58 } __packed; 59 60 struct htt_ver_req { 61 u8 pad[sizeof(u32) - sizeof(struct htt_cmd_hdr)]; 62 } __packed; 63 64 /* 65 * HTT tx MSDU descriptor 66 * 67 * The HTT tx MSDU descriptor is created by the host HTT SW for each 68 * tx MSDU. The HTT tx MSDU descriptor contains the information that 69 * the target firmware needs for the FW's tx processing, particularly 70 * for creating the HW msdu descriptor. 71 * The same HTT tx descriptor is used for HL and LL systems, though 72 * a few fields within the tx descriptor are used only by LL or 73 * only by HL. 74 * The HTT tx descriptor is defined in two manners: by a struct with 75 * bitfields, and by a series of [dword offset, bit mask, bit shift] 76 * definitions. 77 * The target should use the struct def, for simplicitly and clarity, 78 * but the host shall use the bit-mast + bit-shift defs, to be endian- 79 * neutral. Specifically, the host shall use the get/set macros built 80 * around the mask + shift defs. 81 */ 82 struct htt_data_tx_desc_frag { 83 __le32 paddr; 84 __le32 len; 85 } __packed; 86 87 enum htt_data_tx_desc_flags0 { 88 HTT_DATA_TX_DESC_FLAGS0_MAC_HDR_PRESENT = 1 << 0, 89 HTT_DATA_TX_DESC_FLAGS0_NO_AGGR = 1 << 1, 90 HTT_DATA_TX_DESC_FLAGS0_NO_ENCRYPT = 1 << 2, 91 HTT_DATA_TX_DESC_FLAGS0_NO_CLASSIFY = 1 << 3, 92 HTT_DATA_TX_DESC_FLAGS0_RSVD0 = 1 << 4 93 #define HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE_MASK 0xE0 94 #define HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE_LSB 5 95 }; 96 97 enum htt_data_tx_desc_flags1 { 98 #define HTT_DATA_TX_DESC_FLAGS1_VDEV_ID_BITS 6 99 #define HTT_DATA_TX_DESC_FLAGS1_VDEV_ID_MASK 0x003F 100 #define HTT_DATA_TX_DESC_FLAGS1_VDEV_ID_LSB 0 101 #define HTT_DATA_TX_DESC_FLAGS1_EXT_TID_BITS 5 102 #define HTT_DATA_TX_DESC_FLAGS1_EXT_TID_MASK 0x07C0 103 #define HTT_DATA_TX_DESC_FLAGS1_EXT_TID_LSB 6 104 HTT_DATA_TX_DESC_FLAGS1_POSTPONED = 1 << 11, 105 HTT_DATA_TX_DESC_FLAGS1_MORE_IN_BATCH = 1 << 12, 106 HTT_DATA_TX_DESC_FLAGS1_CKSUM_L3_OFFLOAD = 1 << 13, 107 HTT_DATA_TX_DESC_FLAGS1_CKSUM_L4_OFFLOAD = 1 << 14, 108 HTT_DATA_TX_DESC_FLAGS1_RSVD1 = 1 << 15 109 }; 110 111 enum htt_data_tx_ext_tid { 112 HTT_DATA_TX_EXT_TID_NON_QOS_MCAST_BCAST = 16, 113 HTT_DATA_TX_EXT_TID_MGMT = 17, 114 HTT_DATA_TX_EXT_TID_INVALID = 31 115 }; 116 117 #define HTT_INVALID_PEERID 0xFFFF 118 119 /* 120 * htt_data_tx_desc - used for data tx path 121 * 122 * Note: vdev_id irrelevant for pkt_type == raw and no_classify == 1. 123 * ext_tid: for qos-data frames (0-15), see %HTT_DATA_TX_EXT_TID_ 124 * for special kinds of tids 125 * postponed: only for HL hosts. indicates if this is a resend 126 * (HL hosts manage queues on the host ) 127 * more_in_batch: only for HL hosts. indicates if more packets are 128 * pending. this allows target to wait and aggregate 129 */ 130 struct htt_data_tx_desc { 131 u8 flags0; /* %HTT_DATA_TX_DESC_FLAGS0_ */ 132 __le16 flags1; /* %HTT_DATA_TX_DESC_FLAGS1_ */ 133 __le16 len; 134 __le16 id; 135 __le32 frags_paddr; 136 __le32 peerid; 137 u8 prefetch[0]; /* start of frame, for FW classification engine */ 138 } __packed; 139 140 enum htt_rx_ring_flags { 141 HTT_RX_RING_FLAGS_MAC80211_HDR = 1 << 0, 142 HTT_RX_RING_FLAGS_MSDU_PAYLOAD = 1 << 1, 143 HTT_RX_RING_FLAGS_PPDU_START = 1 << 2, 144 HTT_RX_RING_FLAGS_PPDU_END = 1 << 3, 145 HTT_RX_RING_FLAGS_MPDU_START = 1 << 4, 146 HTT_RX_RING_FLAGS_MPDU_END = 1 << 5, 147 HTT_RX_RING_FLAGS_MSDU_START = 1 << 6, 148 HTT_RX_RING_FLAGS_MSDU_END = 1 << 7, 149 HTT_RX_RING_FLAGS_RX_ATTENTION = 1 << 8, 150 HTT_RX_RING_FLAGS_FRAG_INFO = 1 << 9, 151 HTT_RX_RING_FLAGS_UNICAST_RX = 1 << 10, 152 HTT_RX_RING_FLAGS_MULTICAST_RX = 1 << 11, 153 HTT_RX_RING_FLAGS_CTRL_RX = 1 << 12, 154 HTT_RX_RING_FLAGS_MGMT_RX = 1 << 13, 155 HTT_RX_RING_FLAGS_NULL_RX = 1 << 14, 156 HTT_RX_RING_FLAGS_PHY_DATA_RX = 1 << 15 157 }; 158 159 struct htt_rx_ring_setup_ring { 160 __le32 fw_idx_shadow_reg_paddr; 161 __le32 rx_ring_base_paddr; 162 __le16 rx_ring_len; /* in 4-byte words */ 163 __le16 rx_ring_bufsize; /* rx skb size - in bytes */ 164 __le16 flags; /* %HTT_RX_RING_FLAGS_ */ 165 __le16 fw_idx_init_val; 166 167 /* the following offsets are in 4-byte units */ 168 __le16 mac80211_hdr_offset; 169 __le16 msdu_payload_offset; 170 __le16 ppdu_start_offset; 171 __le16 ppdu_end_offset; 172 __le16 mpdu_start_offset; 173 __le16 mpdu_end_offset; 174 __le16 msdu_start_offset; 175 __le16 msdu_end_offset; 176 __le16 rx_attention_offset; 177 __le16 frag_info_offset; 178 } __packed; 179 180 struct htt_rx_ring_setup_hdr { 181 u8 num_rings; /* supported values: 1, 2 */ 182 __le16 rsvd0; 183 } __packed; 184 185 struct htt_rx_ring_setup { 186 struct htt_rx_ring_setup_hdr hdr; 187 struct htt_rx_ring_setup_ring rings[0]; 188 } __packed; 189 190 /* 191 * htt_stats_req - request target to send specified statistics 192 * 193 * @msg_type: hardcoded %HTT_H2T_MSG_TYPE_STATS_REQ 194 * @upload_types: see %htt_dbg_stats_type. this is 24bit field actually 195 * so make sure its little-endian. 196 * @reset_types: see %htt_dbg_stats_type. this is 24bit field actually 197 * so make sure its little-endian. 198 * @cfg_val: stat_type specific configuration 199 * @stat_type: see %htt_dbg_stats_type 200 * @cookie_lsb: used for confirmation message from target->host 201 * @cookie_msb: ditto as %cookie 202 */ 203 struct htt_stats_req { 204 u8 upload_types[3]; 205 u8 rsvd0; 206 u8 reset_types[3]; 207 struct { 208 u8 mpdu_bytes; 209 u8 mpdu_num_msdus; 210 u8 msdu_bytes; 211 } __packed; 212 u8 stat_type; 213 __le32 cookie_lsb; 214 __le32 cookie_msb; 215 } __packed; 216 217 #define HTT_STATS_REQ_CFG_STAT_TYPE_INVALID 0xff 218 219 /* 220 * htt_oob_sync_req - request out-of-band sync 221 * 222 * The HTT SYNC tells the target to suspend processing of subsequent 223 * HTT host-to-target messages until some other target agent locally 224 * informs the target HTT FW that the current sync counter is equal to 225 * or greater than (in a modulo sense) the sync counter specified in 226 * the SYNC message. 227 * 228 * This allows other host-target components to synchronize their operation 229 * with HTT, e.g. to ensure that tx frames don't get transmitted until a 230 * security key has been downloaded to and activated by the target. 231 * In the absence of any explicit synchronization counter value 232 * specification, the target HTT FW will use zero as the default current 233 * sync value. 234 * 235 * The HTT target FW will suspend its host->target message processing as long 236 * as 0 < (in-band sync counter - out-of-band sync counter) & 0xff < 128. 237 */ 238 struct htt_oob_sync_req { 239 u8 sync_count; 240 __le16 rsvd0; 241 } __packed; 242 243 struct htt_aggr_conf { 244 u8 max_num_ampdu_subframes; 245 /* amsdu_subframes is limited by 0x1F mask */ 246 u8 max_num_amsdu_subframes; 247 } __packed; 248 249 #define HTT_MGMT_FRM_HDR_DOWNLOAD_LEN 32 250 251 struct htt_mgmt_tx_desc { 252 u8 pad[sizeof(u32) - sizeof(struct htt_cmd_hdr)]; 253 __le32 msdu_paddr; 254 __le32 desc_id; 255 __le32 len; 256 __le32 vdev_id; 257 u8 hdr[HTT_MGMT_FRM_HDR_DOWNLOAD_LEN]; 258 } __packed; 259 260 enum htt_mgmt_tx_status { 261 HTT_MGMT_TX_STATUS_OK = 0, 262 HTT_MGMT_TX_STATUS_RETRY = 1, 263 HTT_MGMT_TX_STATUS_DROP = 2 264 }; 265 266 /*=== target -> host messages ===============================================*/ 267 268 enum htt_t2h_msg_type { 269 HTT_T2H_MSG_TYPE_VERSION_CONF = 0x0, 270 HTT_T2H_MSG_TYPE_RX_IND = 0x1, 271 HTT_T2H_MSG_TYPE_RX_FLUSH = 0x2, 272 HTT_T2H_MSG_TYPE_PEER_MAP = 0x3, 273 HTT_T2H_MSG_TYPE_PEER_UNMAP = 0x4, 274 HTT_T2H_MSG_TYPE_RX_ADDBA = 0x5, 275 HTT_T2H_MSG_TYPE_RX_DELBA = 0x6, 276 HTT_T2H_MSG_TYPE_TX_COMPL_IND = 0x7, 277 HTT_T2H_MSG_TYPE_PKTLOG = 0x8, 278 HTT_T2H_MSG_TYPE_STATS_CONF = 0x9, 279 HTT_T2H_MSG_TYPE_RX_FRAG_IND = 0xa, 280 HTT_T2H_MSG_TYPE_SEC_IND = 0xb, 281 HTT_T2H_MSG_TYPE_RC_UPDATE_IND = 0xc, 282 HTT_T2H_MSG_TYPE_TX_INSPECT_IND = 0xd, 283 HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION = 0xe, 284 HTT_T2H_MSG_TYPE_TEST, 285 /* keep this last */ 286 HTT_T2H_NUM_MSGS 287 }; 288 289 /* 290 * htt_resp_hdr - header for target-to-host messages 291 * 292 * msg_type: see htt_t2h_msg_type 293 */ 294 struct htt_resp_hdr { 295 u8 msg_type; 296 } __packed; 297 298 #define HTT_RESP_HDR_MSG_TYPE_OFFSET 0 299 #define HTT_RESP_HDR_MSG_TYPE_MASK 0xff 300 #define HTT_RESP_HDR_MSG_TYPE_LSB 0 301 302 /* htt_ver_resp - response sent for htt_ver_req */ 303 struct htt_ver_resp { 304 u8 minor; 305 u8 major; 306 u8 rsvd0; 307 } __packed; 308 309 struct htt_mgmt_tx_completion { 310 u8 rsvd0; 311 u8 rsvd1; 312 u8 rsvd2; 313 __le32 desc_id; 314 __le32 status; 315 } __packed; 316 317 #define HTT_RX_INDICATION_INFO0_EXT_TID_MASK (0x3F) 318 #define HTT_RX_INDICATION_INFO0_EXT_TID_LSB (0) 319 #define HTT_RX_INDICATION_INFO0_FLUSH_VALID (1 << 6) 320 #define HTT_RX_INDICATION_INFO0_RELEASE_VALID (1 << 7) 321 322 #define HTT_RX_INDICATION_INFO1_FLUSH_START_SEQNO_MASK 0x0000003F 323 #define HTT_RX_INDICATION_INFO1_FLUSH_START_SEQNO_LSB 0 324 #define HTT_RX_INDICATION_INFO1_FLUSH_END_SEQNO_MASK 0x00000FC0 325 #define HTT_RX_INDICATION_INFO1_FLUSH_END_SEQNO_LSB 6 326 #define HTT_RX_INDICATION_INFO1_RELEASE_START_SEQNO_MASK 0x0003F000 327 #define HTT_RX_INDICATION_INFO1_RELEASE_START_SEQNO_LSB 12 328 #define HTT_RX_INDICATION_INFO1_RELEASE_END_SEQNO_MASK 0x00FC0000 329 #define HTT_RX_INDICATION_INFO1_RELEASE_END_SEQNO_LSB 18 330 #define HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES_MASK 0xFF000000 331 #define HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES_LSB 24 332 333 struct htt_rx_indication_hdr { 334 u8 info0; /* %HTT_RX_INDICATION_INFO0_ */ 335 __le16 peer_id; 336 __le32 info1; /* %HTT_RX_INDICATION_INFO1_ */ 337 } __packed; 338 339 #define HTT_RX_INDICATION_INFO0_PHY_ERR_VALID (1 << 0) 340 #define HTT_RX_INDICATION_INFO0_LEGACY_RATE_MASK (0x1E) 341 #define HTT_RX_INDICATION_INFO0_LEGACY_RATE_LSB (1) 342 #define HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK (1 << 5) 343 #define HTT_RX_INDICATION_INFO0_END_VALID (1 << 6) 344 #define HTT_RX_INDICATION_INFO0_START_VALID (1 << 7) 345 346 #define HTT_RX_INDICATION_INFO1_VHT_SIG_A1_MASK 0x00FFFFFF 347 #define HTT_RX_INDICATION_INFO1_VHT_SIG_A1_LSB 0 348 #define HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE_MASK 0xFF000000 349 #define HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE_LSB 24 350 351 #define HTT_RX_INDICATION_INFO2_VHT_SIG_A1_MASK 0x00FFFFFF 352 #define HTT_RX_INDICATION_INFO2_VHT_SIG_A1_LSB 0 353 #define HTT_RX_INDICATION_INFO2_SERVICE_MASK 0xFF000000 354 #define HTT_RX_INDICATION_INFO2_SERVICE_LSB 24 355 356 enum htt_rx_legacy_rate { 357 HTT_RX_OFDM_48 = 0, 358 HTT_RX_OFDM_24 = 1, 359 HTT_RX_OFDM_12, 360 HTT_RX_OFDM_6, 361 HTT_RX_OFDM_54, 362 HTT_RX_OFDM_36, 363 HTT_RX_OFDM_18, 364 HTT_RX_OFDM_9, 365 366 /* long preamble */ 367 HTT_RX_CCK_11_LP = 0, 368 HTT_RX_CCK_5_5_LP = 1, 369 HTT_RX_CCK_2_LP, 370 HTT_RX_CCK_1_LP, 371 /* short preamble */ 372 HTT_RX_CCK_11_SP, 373 HTT_RX_CCK_5_5_SP, 374 HTT_RX_CCK_2_SP 375 }; 376 377 enum htt_rx_legacy_rate_type { 378 HTT_RX_LEGACY_RATE_OFDM = 0, 379 HTT_RX_LEGACY_RATE_CCK 380 }; 381 382 enum htt_rx_preamble_type { 383 HTT_RX_LEGACY = 0x4, 384 HTT_RX_HT = 0x8, 385 HTT_RX_HT_WITH_TXBF = 0x9, 386 HTT_RX_VHT = 0xC, 387 HTT_RX_VHT_WITH_TXBF = 0xD, 388 }; 389 390 /* 391 * Fields: phy_err_valid, phy_err_code, tsf, 392 * usec_timestamp, sub_usec_timestamp 393 * ..are valid only if end_valid == 1. 394 * 395 * Fields: rssi_chains, legacy_rate_type, 396 * legacy_rate_cck, preamble_type, service, 397 * vht_sig_* 398 * ..are valid only if start_valid == 1; 399 */ 400 struct htt_rx_indication_ppdu { 401 u8 combined_rssi; 402 u8 sub_usec_timestamp; 403 u8 phy_err_code; 404 u8 info0; /* HTT_RX_INDICATION_INFO0_ */ 405 struct { 406 u8 pri20_db; 407 u8 ext20_db; 408 u8 ext40_db; 409 u8 ext80_db; 410 } __packed rssi_chains[4]; 411 __le32 tsf; 412 __le32 usec_timestamp; 413 __le32 info1; /* HTT_RX_INDICATION_INFO1_ */ 414 __le32 info2; /* HTT_RX_INDICATION_INFO2_ */ 415 } __packed; 416 417 enum htt_rx_mpdu_status { 418 HTT_RX_IND_MPDU_STATUS_UNKNOWN = 0x0, 419 HTT_RX_IND_MPDU_STATUS_OK, 420 HTT_RX_IND_MPDU_STATUS_ERR_FCS, 421 HTT_RX_IND_MPDU_STATUS_ERR_DUP, 422 HTT_RX_IND_MPDU_STATUS_ERR_REPLAY, 423 HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER, 424 /* only accept EAPOL frames */ 425 HTT_RX_IND_MPDU_STATUS_UNAUTH_PEER, 426 HTT_RX_IND_MPDU_STATUS_OUT_OF_SYNC, 427 /* Non-data in promiscous mode */ 428 HTT_RX_IND_MPDU_STATUS_MGMT_CTRL, 429 HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR, 430 HTT_RX_IND_MPDU_STATUS_DECRYPT_ERR, 431 HTT_RX_IND_MPDU_STATUS_MPDU_LENGTH_ERR, 432 HTT_RX_IND_MPDU_STATUS_ENCRYPT_REQUIRED_ERR, 433 HTT_RX_IND_MPDU_STATUS_PRIVACY_ERR, 434 435 /* 436 * MISC: discard for unspecified reasons. 437 * Leave this enum value last. 438 */ 439 HTT_RX_IND_MPDU_STATUS_ERR_MISC = 0xFF 440 }; 441 442 struct htt_rx_indication_mpdu_range { 443 u8 mpdu_count; 444 u8 mpdu_range_status; /* %htt_rx_mpdu_status */ 445 u8 pad0; 446 u8 pad1; 447 } __packed; 448 449 struct htt_rx_indication_prefix { 450 __le16 fw_rx_desc_bytes; 451 u8 pad0; 452 u8 pad1; 453 }; 454 455 struct htt_rx_indication { 456 struct htt_rx_indication_hdr hdr; 457 struct htt_rx_indication_ppdu ppdu; 458 struct htt_rx_indication_prefix prefix; 459 460 /* 461 * the following fields are both dynamically sized, so 462 * take care addressing them 463 */ 464 465 /* the size of this is %fw_rx_desc_bytes */ 466 struct fw_rx_desc_base fw_desc; 467 468 /* 469 * %mpdu_ranges starts after &%prefix + roundup(%fw_rx_desc_bytes, 4) 470 * and has %num_mpdu_ranges elements. 471 */ 472 struct htt_rx_indication_mpdu_range mpdu_ranges[0]; 473 } __packed; 474 475 static inline struct htt_rx_indication_mpdu_range * 476 htt_rx_ind_get_mpdu_ranges(struct htt_rx_indication *rx_ind) 477 { 478 void *ptr = rx_ind; 479 480 ptr += sizeof(rx_ind->hdr) 481 + sizeof(rx_ind->ppdu) 482 + sizeof(rx_ind->prefix) 483 + roundup(__le16_to_cpu(rx_ind->prefix.fw_rx_desc_bytes), 4); 484 return ptr; 485 } 486 487 enum htt_rx_flush_mpdu_status { 488 HTT_RX_FLUSH_MPDU_DISCARD = 0, 489 HTT_RX_FLUSH_MPDU_REORDER = 1, 490 }; 491 492 /* 493 * htt_rx_flush - discard or reorder given range of mpdus 494 * 495 * Note: host must check if all sequence numbers between 496 * [seq_num_start, seq_num_end-1] are valid. 497 */ 498 struct htt_rx_flush { 499 __le16 peer_id; 500 u8 tid; 501 u8 rsvd0; 502 u8 mpdu_status; /* %htt_rx_flush_mpdu_status */ 503 u8 seq_num_start; /* it is 6 LSBs of 802.11 seq no */ 504 u8 seq_num_end; /* it is 6 LSBs of 802.11 seq no */ 505 }; 506 507 struct htt_rx_peer_map { 508 u8 vdev_id; 509 __le16 peer_id; 510 u8 addr[6]; 511 u8 rsvd0; 512 u8 rsvd1; 513 } __packed; 514 515 struct htt_rx_peer_unmap { 516 u8 rsvd0; 517 __le16 peer_id; 518 } __packed; 519 520 enum htt_security_types { 521 HTT_SECURITY_NONE, 522 HTT_SECURITY_WEP128, 523 HTT_SECURITY_WEP104, 524 HTT_SECURITY_WEP40, 525 HTT_SECURITY_TKIP, 526 HTT_SECURITY_TKIP_NOMIC, 527 HTT_SECURITY_AES_CCMP, 528 HTT_SECURITY_WAPI, 529 530 HTT_NUM_SECURITY_TYPES /* keep this last! */ 531 }; 532 533 enum htt_security_flags { 534 #define HTT_SECURITY_TYPE_MASK 0x7F 535 #define HTT_SECURITY_TYPE_LSB 0 536 HTT_SECURITY_IS_UNICAST = 1 << 7 537 }; 538 539 struct htt_security_indication { 540 union { 541 /* dont use bitfields; undefined behaviour */ 542 u8 flags; /* %htt_security_flags */ 543 struct { 544 u8 security_type:7, /* %htt_security_types */ 545 is_unicast:1; 546 } __packed; 547 } __packed; 548 __le16 peer_id; 549 u8 michael_key[8]; 550 u8 wapi_rsc[16]; 551 } __packed; 552 553 #define HTT_RX_BA_INFO0_TID_MASK 0x000F 554 #define HTT_RX_BA_INFO0_TID_LSB 0 555 #define HTT_RX_BA_INFO0_PEER_ID_MASK 0xFFF0 556 #define HTT_RX_BA_INFO0_PEER_ID_LSB 4 557 558 struct htt_rx_addba { 559 u8 window_size; 560 __le16 info0; /* %HTT_RX_BA_INFO0_ */ 561 } __packed; 562 563 struct htt_rx_delba { 564 u8 rsvd0; 565 __le16 info0; /* %HTT_RX_BA_INFO0_ */ 566 } __packed; 567 568 enum htt_data_tx_status { 569 HTT_DATA_TX_STATUS_OK = 0, 570 HTT_DATA_TX_STATUS_DISCARD = 1, 571 HTT_DATA_TX_STATUS_NO_ACK = 2, 572 HTT_DATA_TX_STATUS_POSTPONE = 3, /* HL only */ 573 HTT_DATA_TX_STATUS_DOWNLOAD_FAIL = 128 574 }; 575 576 enum htt_data_tx_flags { 577 #define HTT_DATA_TX_STATUS_MASK 0x07 578 #define HTT_DATA_TX_STATUS_LSB 0 579 #define HTT_DATA_TX_TID_MASK 0x78 580 #define HTT_DATA_TX_TID_LSB 3 581 HTT_DATA_TX_TID_INVALID = 1 << 7 582 }; 583 584 #define HTT_TX_COMPL_INV_MSDU_ID 0xFFFF 585 586 struct htt_data_tx_completion { 587 union { 588 u8 flags; 589 struct { 590 u8 status:3, 591 tid:4, 592 tid_invalid:1; 593 } __packed; 594 } __packed; 595 u8 num_msdus; 596 u8 rsvd0; 597 __le16 msdus[0]; /* variable length based on %num_msdus */ 598 } __packed; 599 600 struct htt_tx_compl_ind_base { 601 u32 hdr; 602 u16 payload[1/*or more*/]; 603 } __packed; 604 605 struct htt_rc_tx_done_params { 606 u32 rate_code; 607 u32 rate_code_flags; 608 u32 flags; 609 u32 num_enqued; /* 1 for non-AMPDU */ 610 u32 num_retries; 611 u32 num_failed; /* for AMPDU */ 612 u32 ack_rssi; 613 u32 time_stamp; 614 u32 is_probe; 615 }; 616 617 struct htt_rc_update { 618 u8 vdev_id; 619 __le16 peer_id; 620 u8 addr[6]; 621 u8 num_elems; 622 u8 rsvd0; 623 struct htt_rc_tx_done_params params[0]; /* variable length %num_elems */ 624 } __packed; 625 626 /* see htt_rx_indication for similar fields and descriptions */ 627 struct htt_rx_fragment_indication { 628 union { 629 u8 info0; /* %HTT_RX_FRAG_IND_INFO0_ */ 630 struct { 631 u8 ext_tid:5, 632 flush_valid:1; 633 } __packed; 634 } __packed; 635 __le16 peer_id; 636 __le32 info1; /* %HTT_RX_FRAG_IND_INFO1_ */ 637 __le16 fw_rx_desc_bytes; 638 __le16 rsvd0; 639 640 u8 fw_msdu_rx_desc[0]; 641 } __packed; 642 643 #define HTT_RX_FRAG_IND_INFO0_EXT_TID_MASK 0x1F 644 #define HTT_RX_FRAG_IND_INFO0_EXT_TID_LSB 0 645 #define HTT_RX_FRAG_IND_INFO0_FLUSH_VALID_MASK 0x20 646 #define HTT_RX_FRAG_IND_INFO0_FLUSH_VALID_LSB 5 647 648 #define HTT_RX_FRAG_IND_INFO1_FLUSH_SEQ_NUM_START_MASK 0x0000003F 649 #define HTT_RX_FRAG_IND_INFO1_FLUSH_SEQ_NUM_START_LSB 0 650 #define HTT_RX_FRAG_IND_INFO1_FLUSH_SEQ_NUM_END_MASK 0x00000FC0 651 #define HTT_RX_FRAG_IND_INFO1_FLUSH_SEQ_NUM_END_LSB 6 652 653 /* 654 * target -> host test message definition 655 * 656 * The following field definitions describe the format of the test 657 * message sent from the target to the host. 658 * The message consists of a 4-octet header, followed by a variable 659 * number of 32-bit integer values, followed by a variable number 660 * of 8-bit character values. 661 * 662 * |31 16|15 8|7 0| 663 * |-----------------------------------------------------------| 664 * | num chars | num ints | msg type | 665 * |-----------------------------------------------------------| 666 * | int 0 | 667 * |-----------------------------------------------------------| 668 * | int 1 | 669 * |-----------------------------------------------------------| 670 * | ... | 671 * |-----------------------------------------------------------| 672 * | char 3 | char 2 | char 1 | char 0 | 673 * |-----------------------------------------------------------| 674 * | | | ... | char 4 | 675 * |-----------------------------------------------------------| 676 * - MSG_TYPE 677 * Bits 7:0 678 * Purpose: identifies this as a test message 679 * Value: HTT_MSG_TYPE_TEST 680 * - NUM_INTS 681 * Bits 15:8 682 * Purpose: indicate how many 32-bit integers follow the message header 683 * - NUM_CHARS 684 * Bits 31:16 685 * Purpose: indicate how many 8-bit charaters follow the series of integers 686 */ 687 struct htt_rx_test { 688 u8 num_ints; 689 __le16 num_chars; 690 691 /* payload consists of 2 lists: 692 * a) num_ints * sizeof(__le32) 693 * b) num_chars * sizeof(u8) aligned to 4bytes */ 694 u8 payload[0]; 695 } __packed; 696 697 static inline __le32 *htt_rx_test_get_ints(struct htt_rx_test *rx_test) 698 { 699 return (__le32 *)rx_test->payload; 700 } 701 702 static inline u8 *htt_rx_test_get_chars(struct htt_rx_test *rx_test) 703 { 704 return rx_test->payload + (rx_test->num_ints * sizeof(__le32)); 705 } 706 707 /* 708 * target -> host packet log message 709 * 710 * The following field definitions describe the format of the packet log 711 * message sent from the target to the host. 712 * The message consists of a 4-octet header,followed by a variable number 713 * of 32-bit character values. 714 * 715 * |31 24|23 16|15 8|7 0| 716 * |-----------------------------------------------------------| 717 * | | | | msg type | 718 * |-----------------------------------------------------------| 719 * | payload | 720 * |-----------------------------------------------------------| 721 * - MSG_TYPE 722 * Bits 7:0 723 * Purpose: identifies this as a test message 724 * Value: HTT_MSG_TYPE_PACKETLOG 725 */ 726 struct htt_pktlog_msg { 727 u8 pad[3]; 728 __le32 payload[1 /* or more */]; 729 } __packed; 730 731 struct htt_dbg_stats_rx_reorder_stats { 732 /* Non QoS MPDUs received */ 733 __le32 deliver_non_qos; 734 735 /* MPDUs received in-order */ 736 __le32 deliver_in_order; 737 738 /* Flush due to reorder timer expired */ 739 __le32 deliver_flush_timeout; 740 741 /* Flush due to move out of window */ 742 __le32 deliver_flush_oow; 743 744 /* Flush due to DELBA */ 745 __le32 deliver_flush_delba; 746 747 /* MPDUs dropped due to FCS error */ 748 __le32 fcs_error; 749 750 /* MPDUs dropped due to monitor mode non-data packet */ 751 __le32 mgmt_ctrl; 752 753 /* MPDUs dropped due to invalid peer */ 754 __le32 invalid_peer; 755 756 /* MPDUs dropped due to duplication (non aggregation) */ 757 __le32 dup_non_aggr; 758 759 /* MPDUs dropped due to processed before */ 760 __le32 dup_past; 761 762 /* MPDUs dropped due to duplicate in reorder queue */ 763 __le32 dup_in_reorder; 764 765 /* Reorder timeout happened */ 766 __le32 reorder_timeout; 767 768 /* invalid bar ssn */ 769 __le32 invalid_bar_ssn; 770 771 /* reorder reset due to bar ssn */ 772 __le32 ssn_reset; 773 }; 774 775 struct htt_dbg_stats_wal_tx_stats { 776 /* Num HTT cookies queued to dispatch list */ 777 __le32 comp_queued; 778 779 /* Num HTT cookies dispatched */ 780 __le32 comp_delivered; 781 782 /* Num MSDU queued to WAL */ 783 __le32 msdu_enqued; 784 785 /* Num MPDU queue to WAL */ 786 __le32 mpdu_enqued; 787 788 /* Num MSDUs dropped by WMM limit */ 789 __le32 wmm_drop; 790 791 /* Num Local frames queued */ 792 __le32 local_enqued; 793 794 /* Num Local frames done */ 795 __le32 local_freed; 796 797 /* Num queued to HW */ 798 __le32 hw_queued; 799 800 /* Num PPDU reaped from HW */ 801 __le32 hw_reaped; 802 803 /* Num underruns */ 804 __le32 underrun; 805 806 /* Num PPDUs cleaned up in TX abort */ 807 __le32 tx_abort; 808 809 /* Num MPDUs requed by SW */ 810 __le32 mpdus_requed; 811 812 /* excessive retries */ 813 __le32 tx_ko; 814 815 /* data hw rate code */ 816 __le32 data_rc; 817 818 /* Scheduler self triggers */ 819 __le32 self_triggers; 820 821 /* frames dropped due to excessive sw retries */ 822 __le32 sw_retry_failure; 823 824 /* illegal rate phy errors */ 825 __le32 illgl_rate_phy_err; 826 827 /* wal pdev continous xretry */ 828 __le32 pdev_cont_xretry; 829 830 /* wal pdev continous xretry */ 831 __le32 pdev_tx_timeout; 832 833 /* wal pdev resets */ 834 __le32 pdev_resets; 835 836 __le32 phy_underrun; 837 838 /* MPDU is more than txop limit */ 839 __le32 txop_ovf; 840 } __packed; 841 842 struct htt_dbg_stats_wal_rx_stats { 843 /* Cnts any change in ring routing mid-ppdu */ 844 __le32 mid_ppdu_route_change; 845 846 /* Total number of statuses processed */ 847 __le32 status_rcvd; 848 849 /* Extra frags on rings 0-3 */ 850 __le32 r0_frags; 851 __le32 r1_frags; 852 __le32 r2_frags; 853 __le32 r3_frags; 854 855 /* MSDUs / MPDUs delivered to HTT */ 856 __le32 htt_msdus; 857 __le32 htt_mpdus; 858 859 /* MSDUs / MPDUs delivered to local stack */ 860 __le32 loc_msdus; 861 __le32 loc_mpdus; 862 863 /* AMSDUs that have more MSDUs than the status ring size */ 864 __le32 oversize_amsdu; 865 866 /* Number of PHY errors */ 867 __le32 phy_errs; 868 869 /* Number of PHY errors drops */ 870 __le32 phy_err_drop; 871 872 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 873 __le32 mpdu_errs; 874 } __packed; 875 876 struct htt_dbg_stats_wal_peer_stats { 877 __le32 dummy; /* REMOVE THIS ONCE REAL PEER STAT COUNTERS ARE ADDED */ 878 } __packed; 879 880 struct htt_dbg_stats_wal_pdev_txrx { 881 struct htt_dbg_stats_wal_tx_stats tx_stats; 882 struct htt_dbg_stats_wal_rx_stats rx_stats; 883 struct htt_dbg_stats_wal_peer_stats peer_stats; 884 } __packed; 885 886 struct htt_dbg_stats_rx_rate_info { 887 __le32 mcs[10]; 888 __le32 sgi[10]; 889 __le32 nss[4]; 890 __le32 stbc[10]; 891 __le32 bw[3]; 892 __le32 pream[6]; 893 __le32 ldpc; 894 __le32 txbf; 895 }; 896 897 /* 898 * htt_dbg_stats_status - 899 * present - The requested stats have been delivered in full. 900 * This indicates that either the stats information was contained 901 * in its entirety within this message, or else this message 902 * completes the delivery of the requested stats info that was 903 * partially delivered through earlier STATS_CONF messages. 904 * partial - The requested stats have been delivered in part. 905 * One or more subsequent STATS_CONF messages with the same 906 * cookie value will be sent to deliver the remainder of the 907 * information. 908 * error - The requested stats could not be delivered, for example due 909 * to a shortage of memory to construct a message holding the 910 * requested stats. 911 * invalid - The requested stat type is either not recognized, or the 912 * target is configured to not gather the stats type in question. 913 * - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 914 * series_done - This special value indicates that no further stats info 915 * elements are present within a series of stats info elems 916 * (within a stats upload confirmation message). 917 */ 918 enum htt_dbg_stats_status { 919 HTT_DBG_STATS_STATUS_PRESENT = 0, 920 HTT_DBG_STATS_STATUS_PARTIAL = 1, 921 HTT_DBG_STATS_STATUS_ERROR = 2, 922 HTT_DBG_STATS_STATUS_INVALID = 3, 923 HTT_DBG_STATS_STATUS_SERIES_DONE = 7 924 }; 925 926 /* 927 * target -> host statistics upload 928 * 929 * The following field definitions describe the format of the HTT target 930 * to host stats upload confirmation message. 931 * The message contains a cookie echoed from the HTT host->target stats 932 * upload request, which identifies which request the confirmation is 933 * for, and a series of tag-length-value stats information elements. 934 * The tag-length header for each stats info element also includes a 935 * status field, to indicate whether the request for the stat type in 936 * question was fully met, partially met, unable to be met, or invalid 937 * (if the stat type in question is disabled in the target). 938 * A special value of all 1's in this status field is used to indicate 939 * the end of the series of stats info elements. 940 * 941 * 942 * |31 16|15 8|7 5|4 0| 943 * |------------------------------------------------------------| 944 * | reserved | msg type | 945 * |------------------------------------------------------------| 946 * | cookie LSBs | 947 * |------------------------------------------------------------| 948 * | cookie MSBs | 949 * |------------------------------------------------------------| 950 * | stats entry length | reserved | S |stat type| 951 * |------------------------------------------------------------| 952 * | | 953 * | type-specific stats info | 954 * | | 955 * |------------------------------------------------------------| 956 * | stats entry length | reserved | S |stat type| 957 * |------------------------------------------------------------| 958 * | | 959 * | type-specific stats info | 960 * | | 961 * |------------------------------------------------------------| 962 * | n/a | reserved | 111 | n/a | 963 * |------------------------------------------------------------| 964 * Header fields: 965 * - MSG_TYPE 966 * Bits 7:0 967 * Purpose: identifies this is a statistics upload confirmation message 968 * Value: 0x9 969 * - COOKIE_LSBS 970 * Bits 31:0 971 * Purpose: Provide a mechanism to match a target->host stats confirmation 972 * message with its preceding host->target stats request message. 973 * Value: LSBs of the opaque cookie specified by the host-side requestor 974 * - COOKIE_MSBS 975 * Bits 31:0 976 * Purpose: Provide a mechanism to match a target->host stats confirmation 977 * message with its preceding host->target stats request message. 978 * Value: MSBs of the opaque cookie specified by the host-side requestor 979 * 980 * Stats Information Element tag-length header fields: 981 * - STAT_TYPE 982 * Bits 4:0 983 * Purpose: identifies the type of statistics info held in the 984 * following information element 985 * Value: htt_dbg_stats_type 986 * - STATUS 987 * Bits 7:5 988 * Purpose: indicate whether the requested stats are present 989 * Value: htt_dbg_stats_status, including a special value (0x7) to mark 990 * the completion of the stats entry series 991 * - LENGTH 992 * Bits 31:16 993 * Purpose: indicate the stats information size 994 * Value: This field specifies the number of bytes of stats information 995 * that follows the element tag-length header. 996 * It is expected but not required that this length is a multiple of 997 * 4 bytes. Even if the length is not an integer multiple of 4, the 998 * subsequent stats entry header will begin on a 4-byte aligned 999 * boundary. 1000 */ 1001 1002 #define HTT_STATS_CONF_ITEM_INFO_STAT_TYPE_MASK 0x1F 1003 #define HTT_STATS_CONF_ITEM_INFO_STAT_TYPE_LSB 0 1004 #define HTT_STATS_CONF_ITEM_INFO_STATUS_MASK 0xE0 1005 #define HTT_STATS_CONF_ITEM_INFO_STATUS_LSB 5 1006 1007 struct htt_stats_conf_item { 1008 union { 1009 u8 info; 1010 struct { 1011 u8 stat_type:5; /* %HTT_DBG_STATS_ */ 1012 u8 status:3; /* %HTT_DBG_STATS_STATUS_ */ 1013 } __packed; 1014 } __packed; 1015 u8 pad; 1016 __le16 length; 1017 u8 payload[0]; /* roundup(length, 4) long */ 1018 } __packed; 1019 1020 struct htt_stats_conf { 1021 u8 pad[3]; 1022 __le32 cookie_lsb; 1023 __le32 cookie_msb; 1024 1025 /* each item has variable length! */ 1026 struct htt_stats_conf_item items[0]; 1027 } __packed; 1028 1029 static inline struct htt_stats_conf_item *htt_stats_conf_next_item( 1030 const struct htt_stats_conf_item *item) 1031 { 1032 return (void *)item + sizeof(*item) + roundup(item->length, 4); 1033 } 1034 1035 /* 1036 * host -> target FRAG DESCRIPTOR/MSDU_EXT DESC bank 1037 * 1038 * The following field definitions describe the format of the HTT host 1039 * to target frag_desc/msdu_ext bank configuration message. 1040 * The message contains the based address and the min and max id of the 1041 * MSDU_EXT/FRAG_DESC that will be used by the HTT to map MSDU DESC and 1042 * MSDU_EXT/FRAG_DESC. 1043 * HTT will use id in HTT descriptor instead sending the frag_desc_ptr. 1044 * For QCA988X HW the firmware will use fragment_desc_ptr but in WIFI2.0 1045 * the hardware does the mapping/translation. 1046 * 1047 * Total banks that can be configured is configured to 16. 1048 * 1049 * This should be called before any TX has be initiated by the HTT 1050 * 1051 * |31 16|15 8|7 5|4 0| 1052 * |------------------------------------------------------------| 1053 * | DESC_SIZE | NUM_BANKS | RES |SWP|pdev| msg type | 1054 * |------------------------------------------------------------| 1055 * | BANK0_BASE_ADDRESS | 1056 * |------------------------------------------------------------| 1057 * | ... | 1058 * |------------------------------------------------------------| 1059 * | BANK15_BASE_ADDRESS | 1060 * |------------------------------------------------------------| 1061 * | BANK0_MAX_ID | BANK0_MIN_ID | 1062 * |------------------------------------------------------------| 1063 * | ... | 1064 * |------------------------------------------------------------| 1065 * | BANK15_MAX_ID | BANK15_MIN_ID | 1066 * |------------------------------------------------------------| 1067 * Header fields: 1068 * - MSG_TYPE 1069 * Bits 7:0 1070 * Value: 0x6 1071 * - BANKx_BASE_ADDRESS 1072 * Bits 31:0 1073 * Purpose: Provide a mechanism to specify the base address of the MSDU_EXT 1074 * bank physical/bus address. 1075 * - BANKx_MIN_ID 1076 * Bits 15:0 1077 * Purpose: Provide a mechanism to specify the min index that needs to 1078 * mapped. 1079 * - BANKx_MAX_ID 1080 * Bits 31:16 1081 * Purpose: Provide a mechanism to specify the max index that needs to 1082 * 1083 */ 1084 struct htt_frag_desc_bank_id { 1085 __le16 bank_min_id; 1086 __le16 bank_max_id; 1087 } __packed; 1088 1089 /* real is 16 but it wouldn't fit in the max htt message size 1090 * so we use a conservatively safe value for now */ 1091 #define HTT_FRAG_DESC_BANK_MAX 4 1092 1093 #define HTT_FRAG_DESC_BANK_CFG_INFO_PDEV_ID_MASK 0x03 1094 #define HTT_FRAG_DESC_BANK_CFG_INFO_PDEV_ID_LSB 0 1095 #define HTT_FRAG_DESC_BANK_CFG_INFO_SWAP (1 << 2) 1096 1097 struct htt_frag_desc_bank_cfg { 1098 u8 info; /* HTT_FRAG_DESC_BANK_CFG_INFO_ */ 1099 u8 num_banks; 1100 u8 desc_size; 1101 __le32 bank_base_addrs[HTT_FRAG_DESC_BANK_MAX]; 1102 struct htt_frag_desc_bank_id bank_id[HTT_FRAG_DESC_BANK_MAX]; 1103 } __packed; 1104 1105 union htt_rx_pn_t { 1106 /* WEP: 24-bit PN */ 1107 u32 pn24; 1108 1109 /* TKIP or CCMP: 48-bit PN */ 1110 u_int64_t pn48; 1111 1112 /* WAPI: 128-bit PN */ 1113 u_int64_t pn128[2]; 1114 }; 1115 1116 struct htt_cmd { 1117 struct htt_cmd_hdr hdr; 1118 union { 1119 struct htt_ver_req ver_req; 1120 struct htt_mgmt_tx_desc mgmt_tx; 1121 struct htt_data_tx_desc data_tx; 1122 struct htt_rx_ring_setup rx_setup; 1123 struct htt_stats_req stats_req; 1124 struct htt_oob_sync_req oob_sync_req; 1125 struct htt_aggr_conf aggr_conf; 1126 struct htt_frag_desc_bank_cfg frag_desc_bank_cfg; 1127 }; 1128 } __packed; 1129 1130 struct htt_resp { 1131 struct htt_resp_hdr hdr; 1132 union { 1133 struct htt_ver_resp ver_resp; 1134 struct htt_mgmt_tx_completion mgmt_tx_completion; 1135 struct htt_data_tx_completion data_tx_completion; 1136 struct htt_rx_indication rx_ind; 1137 struct htt_rx_fragment_indication rx_frag_ind; 1138 struct htt_rx_peer_map peer_map; 1139 struct htt_rx_peer_unmap peer_unmap; 1140 struct htt_rx_flush rx_flush; 1141 struct htt_rx_addba rx_addba; 1142 struct htt_rx_delba rx_delba; 1143 struct htt_security_indication security_indication; 1144 struct htt_rc_update rc_update; 1145 struct htt_rx_test rx_test; 1146 struct htt_pktlog_msg pktlog_msg; 1147 struct htt_stats_conf stats_conf; 1148 }; 1149 } __packed; 1150 1151 /*** host side structures follow ***/ 1152 1153 struct htt_tx_done { 1154 u32 msdu_id; 1155 bool discard; 1156 bool no_ack; 1157 }; 1158 1159 struct htt_peer_map_event { 1160 u8 vdev_id; 1161 u16 peer_id; 1162 u8 addr[ETH_ALEN]; 1163 }; 1164 1165 struct htt_peer_unmap_event { 1166 u16 peer_id; 1167 }; 1168 1169 struct ath10k_htt_txbuf { 1170 struct htt_data_tx_desc_frag frags[2]; 1171 struct ath10k_htc_hdr htc_hdr; 1172 struct htt_cmd_hdr cmd_hdr; 1173 struct htt_data_tx_desc cmd_tx; 1174 } __packed; 1175 1176 struct ath10k_htt { 1177 struct ath10k *ar; 1178 enum ath10k_htc_ep_id eid; 1179 1180 int max_throughput_mbps; 1181 u8 target_version_major; 1182 u8 target_version_minor; 1183 struct completion target_version_received; 1184 1185 struct { 1186 /* 1187 * Ring of network buffer objects - This ring is 1188 * used exclusively by the host SW. This ring 1189 * mirrors the dev_addrs_ring that is shared 1190 * between the host SW and the MAC HW. The host SW 1191 * uses this netbufs ring to locate the network 1192 * buffer objects whose data buffers the HW has 1193 * filled. 1194 */ 1195 struct sk_buff **netbufs_ring; 1196 /* 1197 * Ring of buffer addresses - 1198 * This ring holds the "physical" device address of the 1199 * rx buffers the host SW provides for the MAC HW to 1200 * fill. 1201 */ 1202 __le32 *paddrs_ring; 1203 1204 /* 1205 * Base address of ring, as a "physical" device address 1206 * rather than a CPU address. 1207 */ 1208 dma_addr_t base_paddr; 1209 1210 /* how many elems in the ring (power of 2) */ 1211 int size; 1212 1213 /* size - 1 */ 1214 unsigned size_mask; 1215 1216 /* how many rx buffers to keep in the ring */ 1217 int fill_level; 1218 1219 /* how many rx buffers (full+empty) are in the ring */ 1220 int fill_cnt; 1221 1222 /* 1223 * alloc_idx - where HTT SW has deposited empty buffers 1224 * This is allocated in consistent mem, so that the FW can 1225 * read this variable, and program the HW's FW_IDX reg with 1226 * the value of this shadow register. 1227 */ 1228 struct { 1229 __le32 *vaddr; 1230 dma_addr_t paddr; 1231 } alloc_idx; 1232 1233 /* where HTT SW has processed bufs filled by rx MAC DMA */ 1234 struct { 1235 unsigned msdu_payld; 1236 } sw_rd_idx; 1237 1238 /* 1239 * refill_retry_timer - timer triggered when the ring is 1240 * not refilled to the level expected 1241 */ 1242 struct timer_list refill_retry_timer; 1243 1244 /* Protects access to all rx ring buffer state variables */ 1245 spinlock_t lock; 1246 } rx_ring; 1247 1248 unsigned int prefetch_len; 1249 1250 /* Protects access to %pending_tx, %used_msdu_ids */ 1251 spinlock_t tx_lock; 1252 int max_num_pending_tx; 1253 int num_pending_tx; 1254 struct sk_buff **pending_tx; 1255 unsigned long *used_msdu_ids; /* bitmap */ 1256 wait_queue_head_t empty_tx_wq; 1257 struct dma_pool *tx_pool; 1258 1259 /* set if host-fw communication goes haywire 1260 * used to avoid further failures */ 1261 bool rx_confused; 1262 struct tasklet_struct rx_replenish_task; 1263 1264 /* This is used to group tx/rx completions separately and process them 1265 * in batches to reduce cache stalls */ 1266 struct tasklet_struct txrx_compl_task; 1267 struct sk_buff_head tx_compl_q; 1268 struct sk_buff_head rx_compl_q; 1269 1270 /* rx_status template */ 1271 struct ieee80211_rx_status rx_status; 1272 }; 1273 1274 #define RX_HTT_HDR_STATUS_LEN 64 1275 1276 /* This structure layout is programmed via rx ring setup 1277 * so that FW knows how to transfer the rx descriptor to the host. 1278 * Buffers like this are placed on the rx ring. */ 1279 struct htt_rx_desc { 1280 union { 1281 /* This field is filled on the host using the msdu buffer 1282 * from htt_rx_indication */ 1283 struct fw_rx_desc_base fw_desc; 1284 u32 pad; 1285 } __packed; 1286 struct { 1287 struct rx_attention attention; 1288 struct rx_frag_info frag_info; 1289 struct rx_mpdu_start mpdu_start; 1290 struct rx_msdu_start msdu_start; 1291 struct rx_msdu_end msdu_end; 1292 struct rx_mpdu_end mpdu_end; 1293 struct rx_ppdu_start ppdu_start; 1294 struct rx_ppdu_end ppdu_end; 1295 } __packed; 1296 u8 rx_hdr_status[RX_HTT_HDR_STATUS_LEN]; 1297 u8 msdu_payload[0]; 1298 }; 1299 1300 #define HTT_RX_DESC_ALIGN 8 1301 1302 #define HTT_MAC_ADDR_LEN 6 1303 1304 /* 1305 * FIX THIS 1306 * Should be: sizeof(struct htt_host_rx_desc) + max rx MSDU size, 1307 * rounded up to a cache line size. 1308 */ 1309 #define HTT_RX_BUF_SIZE 1920 1310 #define HTT_RX_MSDU_SIZE (HTT_RX_BUF_SIZE - (int)sizeof(struct htt_rx_desc)) 1311 1312 /* Refill a bunch of RX buffers for each refill round so that FW/HW can handle 1313 * aggregated traffic more nicely. */ 1314 #define ATH10K_HTT_MAX_NUM_REFILL 16 1315 1316 /* 1317 * DMA_MAP expects the buffer to be an integral number of cache lines. 1318 * Rather than checking the actual cache line size, this code makes a 1319 * conservative estimate of what the cache line size could be. 1320 */ 1321 #define HTT_LOG2_MAX_CACHE_LINE_SIZE 7 /* 2^7 = 128 */ 1322 #define HTT_MAX_CACHE_LINE_SIZE_MASK ((1 << HTT_LOG2_MAX_CACHE_LINE_SIZE) - 1) 1323 1324 int ath10k_htt_connect(struct ath10k_htt *htt); 1325 int ath10k_htt_init(struct ath10k *ar); 1326 int ath10k_htt_setup(struct ath10k_htt *htt); 1327 1328 int ath10k_htt_tx_alloc(struct ath10k_htt *htt); 1329 void ath10k_htt_tx_free(struct ath10k_htt *htt); 1330 1331 int ath10k_htt_rx_alloc(struct ath10k_htt *htt); 1332 void ath10k_htt_rx_free(struct ath10k_htt *htt); 1333 1334 void ath10k_htt_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb); 1335 void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb); 1336 int ath10k_htt_h2t_ver_req_msg(struct ath10k_htt *htt); 1337 int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u8 mask, u64 cookie); 1338 int ath10k_htt_send_rx_ring_cfg_ll(struct ath10k_htt *htt); 1339 int ath10k_htt_h2t_aggr_cfg_msg(struct ath10k_htt *htt, 1340 u8 max_subfrms_ampdu, 1341 u8 max_subfrms_amsdu); 1342 1343 void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt); 1344 int ath10k_htt_tx_alloc_msdu_id(struct ath10k_htt *htt); 1345 void ath10k_htt_tx_free_msdu_id(struct ath10k_htt *htt, u16 msdu_id); 1346 int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *); 1347 int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *); 1348 1349 #endif 1350