1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef _HIF_H_ 19 #define _HIF_H_ 20 21 #include <linux/kernel.h> 22 #include "core.h" 23 #include "debug.h" 24 25 struct ath10k_hif_sg_item { 26 u16 transfer_id; 27 void *transfer_context; /* NULL = tx completion callback not called */ 28 void *vaddr; /* for debugging mostly */ 29 u32 paddr; 30 u16 len; 31 }; 32 33 struct ath10k_hif_cb { 34 int (*tx_completion)(struct ath10k *ar, 35 struct sk_buff *wbuf); 36 int (*rx_completion)(struct ath10k *ar, 37 struct sk_buff *wbuf); 38 }; 39 40 struct ath10k_hif_ops { 41 /* send a scatter-gather list to the target */ 42 int (*tx_sg)(struct ath10k *ar, u8 pipe_id, 43 struct ath10k_hif_sg_item *items, int n_items); 44 45 /* read firmware memory through the diagnose interface */ 46 int (*diag_read)(struct ath10k *ar, u32 address, void *buf, 47 size_t buf_len); 48 49 int (*diag_write)(struct ath10k *ar, u32 address, const void *data, 50 int nbytes); 51 /* 52 * API to handle HIF-specific BMI message exchanges, this API is 53 * synchronous and only allowed to be called from a context that 54 * can block (sleep) 55 */ 56 int (*exchange_bmi_msg)(struct ath10k *ar, 57 void *request, u32 request_len, 58 void *response, u32 *response_len); 59 60 /* Post BMI phase, after FW is loaded. Starts regular operation */ 61 int (*start)(struct ath10k *ar); 62 63 /* Clean up what start() did. This does not revert to BMI phase. If 64 * desired so, call power_down() and power_up() */ 65 void (*stop)(struct ath10k *ar); 66 67 int (*map_service_to_pipe)(struct ath10k *ar, u16 service_id, 68 u8 *ul_pipe, u8 *dl_pipe, 69 int *ul_is_polled, int *dl_is_polled); 70 71 void (*get_default_pipe)(struct ath10k *ar, u8 *ul_pipe, u8 *dl_pipe); 72 73 /* 74 * Check if prior sends have completed. 75 * 76 * Check whether the pipe in question has any completed 77 * sends that have not yet been processed. 78 * This function is only relevant for HIF pipes that are configured 79 * to be polled rather than interrupt-driven. 80 */ 81 void (*send_complete_check)(struct ath10k *ar, u8 pipe_id, int force); 82 83 void (*set_callbacks)(struct ath10k *ar, 84 struct ath10k_hif_cb *callbacks); 85 86 u16 (*get_free_queue_number)(struct ath10k *ar, u8 pipe_id); 87 88 u32 (*read32)(struct ath10k *ar, u32 address); 89 90 void (*write32)(struct ath10k *ar, u32 address, u32 value); 91 92 /* Power up the device and enter BMI transfer mode for FW download */ 93 int (*power_up)(struct ath10k *ar); 94 95 /* Power down the device and free up resources. stop() must be called 96 * before this if start() was called earlier */ 97 void (*power_down)(struct ath10k *ar); 98 99 int (*suspend)(struct ath10k *ar); 100 int (*resume)(struct ath10k *ar); 101 }; 102 103 static inline int ath10k_hif_tx_sg(struct ath10k *ar, u8 pipe_id, 104 struct ath10k_hif_sg_item *items, 105 int n_items) 106 { 107 return ar->hif.ops->tx_sg(ar, pipe_id, items, n_items); 108 } 109 110 static inline int ath10k_hif_diag_read(struct ath10k *ar, u32 address, void *buf, 111 size_t buf_len) 112 { 113 return ar->hif.ops->diag_read(ar, address, buf, buf_len); 114 } 115 116 static inline int ath10k_hif_diag_write(struct ath10k *ar, u32 address, 117 const void *data, int nbytes) 118 { 119 if (!ar->hif.ops->diag_write) 120 return -EOPNOTSUPP; 121 122 return ar->hif.ops->diag_write(ar, address, data, nbytes); 123 } 124 125 static inline int ath10k_hif_exchange_bmi_msg(struct ath10k *ar, 126 void *request, u32 request_len, 127 void *response, u32 *response_len) 128 { 129 return ar->hif.ops->exchange_bmi_msg(ar, request, request_len, 130 response, response_len); 131 } 132 133 static inline int ath10k_hif_start(struct ath10k *ar) 134 { 135 return ar->hif.ops->start(ar); 136 } 137 138 static inline void ath10k_hif_stop(struct ath10k *ar) 139 { 140 return ar->hif.ops->stop(ar); 141 } 142 143 static inline int ath10k_hif_map_service_to_pipe(struct ath10k *ar, 144 u16 service_id, 145 u8 *ul_pipe, u8 *dl_pipe, 146 int *ul_is_polled, 147 int *dl_is_polled) 148 { 149 return ar->hif.ops->map_service_to_pipe(ar, service_id, 150 ul_pipe, dl_pipe, 151 ul_is_polled, dl_is_polled); 152 } 153 154 static inline void ath10k_hif_get_default_pipe(struct ath10k *ar, 155 u8 *ul_pipe, u8 *dl_pipe) 156 { 157 ar->hif.ops->get_default_pipe(ar, ul_pipe, dl_pipe); 158 } 159 160 static inline void ath10k_hif_send_complete_check(struct ath10k *ar, 161 u8 pipe_id, int force) 162 { 163 ar->hif.ops->send_complete_check(ar, pipe_id, force); 164 } 165 166 static inline void ath10k_hif_set_callbacks(struct ath10k *ar, 167 struct ath10k_hif_cb *callbacks) 168 { 169 ar->hif.ops->set_callbacks(ar, callbacks); 170 } 171 172 static inline u16 ath10k_hif_get_free_queue_number(struct ath10k *ar, 173 u8 pipe_id) 174 { 175 return ar->hif.ops->get_free_queue_number(ar, pipe_id); 176 } 177 178 static inline int ath10k_hif_power_up(struct ath10k *ar) 179 { 180 return ar->hif.ops->power_up(ar); 181 } 182 183 static inline void ath10k_hif_power_down(struct ath10k *ar) 184 { 185 ar->hif.ops->power_down(ar); 186 } 187 188 static inline int ath10k_hif_suspend(struct ath10k *ar) 189 { 190 if (!ar->hif.ops->suspend) 191 return -EOPNOTSUPP; 192 193 return ar->hif.ops->suspend(ar); 194 } 195 196 static inline int ath10k_hif_resume(struct ath10k *ar) 197 { 198 if (!ar->hif.ops->resume) 199 return -EOPNOTSUPP; 200 201 return ar->hif.ops->resume(ar); 202 } 203 204 static inline u32 ath10k_hif_read32(struct ath10k *ar, u32 address) 205 { 206 if (!ar->hif.ops->read32) { 207 ath10k_warn(ar, "hif read32 not supported\n"); 208 return 0xdeaddead; 209 } 210 211 return ar->hif.ops->read32(ar, address); 212 } 213 214 static inline void ath10k_hif_write32(struct ath10k *ar, 215 u32 address, u32 data) 216 { 217 if (!ar->hif.ops->write32) { 218 ath10k_warn(ar, "hif write32 not supported\n"); 219 return; 220 } 221 222 ar->hif.ops->write32(ar, address, data); 223 } 224 225 #endif /* _HIF_H_ */ 226