15e3dd157SKalle Valo /* 25e3dd157SKalle Valo * Copyright (c) 2005-2011 Atheros Communications Inc. 35e3dd157SKalle Valo * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 45e3dd157SKalle Valo * 55e3dd157SKalle Valo * Permission to use, copy, modify, and/or distribute this software for any 65e3dd157SKalle Valo * purpose with or without fee is hereby granted, provided that the above 75e3dd157SKalle Valo * copyright notice and this permission notice appear in all copies. 85e3dd157SKalle Valo * 95e3dd157SKalle Valo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 105e3dd157SKalle Valo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 115e3dd157SKalle Valo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 125e3dd157SKalle Valo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 135e3dd157SKalle Valo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 145e3dd157SKalle Valo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 155e3dd157SKalle Valo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 165e3dd157SKalle Valo */ 175e3dd157SKalle Valo 185e3dd157SKalle Valo #ifndef _HIF_H_ 195e3dd157SKalle Valo #define _HIF_H_ 205e3dd157SKalle Valo 215e3dd157SKalle Valo #include <linux/kernel.h> 225e3dd157SKalle Valo #include "core.h" 23077a3804SYanbo Li #include "debug.h" 245e3dd157SKalle Valo 25726346fcSMichal Kazior struct ath10k_hif_sg_item { 26726346fcSMichal Kazior u16 transfer_id; 27726346fcSMichal Kazior void *transfer_context; /* NULL = tx completion callback not called */ 28726346fcSMichal Kazior void *vaddr; /* for debugging mostly */ 29726346fcSMichal Kazior u32 paddr; 30726346fcSMichal Kazior u16 len; 31726346fcSMichal Kazior }; 32726346fcSMichal Kazior 335e3dd157SKalle Valo struct ath10k_hif_ops { 34726346fcSMichal Kazior /* send a scatter-gather list to the target */ 35726346fcSMichal Kazior int (*tx_sg)(struct ath10k *ar, u8 pipe_id, 36726346fcSMichal Kazior struct ath10k_hif_sg_item *items, int n_items); 375e3dd157SKalle Valo 38eef25405SKalle Valo /* read firmware memory through the diagnose interface */ 39eef25405SKalle Valo int (*diag_read)(struct ath10k *ar, u32 address, void *buf, 40eef25405SKalle Valo size_t buf_len); 41eef25405SKalle Valo 429f65ad25SYanbo Li int (*diag_write)(struct ath10k *ar, u32 address, const void *data, 439f65ad25SYanbo Li int nbytes); 445e3dd157SKalle Valo /* 455e3dd157SKalle Valo * API to handle HIF-specific BMI message exchanges, this API is 465e3dd157SKalle Valo * synchronous and only allowed to be called from a context that 475e3dd157SKalle Valo * can block (sleep) 485e3dd157SKalle Valo */ 495e3dd157SKalle Valo int (*exchange_bmi_msg)(struct ath10k *ar, 505e3dd157SKalle Valo void *request, u32 request_len, 515e3dd157SKalle Valo void *response, u32 *response_len); 525e3dd157SKalle Valo 538c5c5368SMichal Kazior /* Post BMI phase, after FW is loaded. Starts regular operation */ 545e3dd157SKalle Valo int (*start)(struct ath10k *ar); 555e3dd157SKalle Valo 568c5c5368SMichal Kazior /* Clean up what start() did. This does not revert to BMI phase. If 5737ff1b0dSMarcin Rokicki * desired so, call power_down() and power_up() 5837ff1b0dSMarcin Rokicki */ 595e3dd157SKalle Valo void (*stop)(struct ath10k *ar); 605e3dd157SKalle Valo 615e3dd157SKalle Valo int (*map_service_to_pipe)(struct ath10k *ar, u16 service_id, 62400143e4SRajkumar Manoharan u8 *ul_pipe, u8 *dl_pipe); 635e3dd157SKalle Valo 645e3dd157SKalle Valo void (*get_default_pipe)(struct ath10k *ar, u8 *ul_pipe, u8 *dl_pipe); 655e3dd157SKalle Valo 665e3dd157SKalle Valo /* 675e3dd157SKalle Valo * Check if prior sends have completed. 685e3dd157SKalle Valo * 695e3dd157SKalle Valo * Check whether the pipe in question has any completed 705e3dd157SKalle Valo * sends that have not yet been processed. 715e3dd157SKalle Valo * This function is only relevant for HIF pipes that are configured 725e3dd157SKalle Valo * to be polled rather than interrupt-driven. 735e3dd157SKalle Valo */ 745e3dd157SKalle Valo void (*send_complete_check)(struct ath10k *ar, u8 pipe_id, int force); 755e3dd157SKalle Valo 765e3dd157SKalle Valo u16 (*get_free_queue_number)(struct ath10k *ar, u8 pipe_id); 778c5c5368SMichal Kazior 78077a3804SYanbo Li u32 (*read32)(struct ath10k *ar, u32 address); 79077a3804SYanbo Li 80077a3804SYanbo Li void (*write32)(struct ath10k *ar, u32 address, u32 value); 81077a3804SYanbo Li 828c5c5368SMichal Kazior /* Power up the device and enter BMI transfer mode for FW download */ 838c5c5368SMichal Kazior int (*power_up)(struct ath10k *ar); 848c5c5368SMichal Kazior 858c5c5368SMichal Kazior /* Power down the device and free up resources. stop() must be called 8637ff1b0dSMarcin Rokicki * before this if start() was called earlier 8737ff1b0dSMarcin Rokicki */ 888c5c5368SMichal Kazior void (*power_down)(struct ath10k *ar); 898cd13cadSMichal Kazior 908cd13cadSMichal Kazior int (*suspend)(struct ath10k *ar); 918cd13cadSMichal Kazior int (*resume)(struct ath10k *ar); 926847f967SSven Eckelmann 936847f967SSven Eckelmann /* fetch calibration data from target eeprom */ 946847f967SSven Eckelmann int (*fetch_cal_eeprom)(struct ath10k *ar, void **data, 956847f967SSven Eckelmann size_t *data_len); 965e3dd157SKalle Valo }; 975e3dd157SKalle Valo 98726346fcSMichal Kazior static inline int ath10k_hif_tx_sg(struct ath10k *ar, u8 pipe_id, 99726346fcSMichal Kazior struct ath10k_hif_sg_item *items, 100726346fcSMichal Kazior int n_items) 1015e3dd157SKalle Valo { 102726346fcSMichal Kazior return ar->hif.ops->tx_sg(ar, pipe_id, items, n_items); 1035e3dd157SKalle Valo } 1045e3dd157SKalle Valo 105eef25405SKalle Valo static inline int ath10k_hif_diag_read(struct ath10k *ar, u32 address, void *buf, 106eef25405SKalle Valo size_t buf_len) 107eef25405SKalle Valo { 108eef25405SKalle Valo return ar->hif.ops->diag_read(ar, address, buf, buf_len); 109eef25405SKalle Valo } 110eef25405SKalle Valo 1119f65ad25SYanbo Li static inline int ath10k_hif_diag_write(struct ath10k *ar, u32 address, 1129f65ad25SYanbo Li const void *data, int nbytes) 1139f65ad25SYanbo Li { 1149f65ad25SYanbo Li if (!ar->hif.ops->diag_write) 1159f65ad25SYanbo Li return -EOPNOTSUPP; 1169f65ad25SYanbo Li 1179f65ad25SYanbo Li return ar->hif.ops->diag_write(ar, address, data, nbytes); 1189f65ad25SYanbo Li } 1199f65ad25SYanbo Li 1205e3dd157SKalle Valo static inline int ath10k_hif_exchange_bmi_msg(struct ath10k *ar, 1215e3dd157SKalle Valo void *request, u32 request_len, 1225e3dd157SKalle Valo void *response, u32 *response_len) 1235e3dd157SKalle Valo { 1245e3dd157SKalle Valo return ar->hif.ops->exchange_bmi_msg(ar, request, request_len, 1255e3dd157SKalle Valo response, response_len); 1265e3dd157SKalle Valo } 1275e3dd157SKalle Valo 1285e3dd157SKalle Valo static inline int ath10k_hif_start(struct ath10k *ar) 1295e3dd157SKalle Valo { 1305e3dd157SKalle Valo return ar->hif.ops->start(ar); 1315e3dd157SKalle Valo } 1325e3dd157SKalle Valo 1335e3dd157SKalle Valo static inline void ath10k_hif_stop(struct ath10k *ar) 1345e3dd157SKalle Valo { 1355e3dd157SKalle Valo return ar->hif.ops->stop(ar); 1365e3dd157SKalle Valo } 1375e3dd157SKalle Valo 1385e3dd157SKalle Valo static inline int ath10k_hif_map_service_to_pipe(struct ath10k *ar, 1395e3dd157SKalle Valo u16 service_id, 140400143e4SRajkumar Manoharan u8 *ul_pipe, u8 *dl_pipe) 1415e3dd157SKalle Valo { 1425e3dd157SKalle Valo return ar->hif.ops->map_service_to_pipe(ar, service_id, 143400143e4SRajkumar Manoharan ul_pipe, dl_pipe); 1445e3dd157SKalle Valo } 1455e3dd157SKalle Valo 1465e3dd157SKalle Valo static inline void ath10k_hif_get_default_pipe(struct ath10k *ar, 1475e3dd157SKalle Valo u8 *ul_pipe, u8 *dl_pipe) 1485e3dd157SKalle Valo { 1495e3dd157SKalle Valo ar->hif.ops->get_default_pipe(ar, ul_pipe, dl_pipe); 1505e3dd157SKalle Valo } 1515e3dd157SKalle Valo 1525e3dd157SKalle Valo static inline void ath10k_hif_send_complete_check(struct ath10k *ar, 1535e3dd157SKalle Valo u8 pipe_id, int force) 1545e3dd157SKalle Valo { 1555e3dd157SKalle Valo ar->hif.ops->send_complete_check(ar, pipe_id, force); 1565e3dd157SKalle Valo } 1575e3dd157SKalle Valo 1585e3dd157SKalle Valo static inline u16 ath10k_hif_get_free_queue_number(struct ath10k *ar, 1595e3dd157SKalle Valo u8 pipe_id) 1605e3dd157SKalle Valo { 1615e3dd157SKalle Valo return ar->hif.ops->get_free_queue_number(ar, pipe_id); 1625e3dd157SKalle Valo } 1635e3dd157SKalle Valo 1648c5c5368SMichal Kazior static inline int ath10k_hif_power_up(struct ath10k *ar) 1658c5c5368SMichal Kazior { 1668c5c5368SMichal Kazior return ar->hif.ops->power_up(ar); 1678c5c5368SMichal Kazior } 1688c5c5368SMichal Kazior 1698c5c5368SMichal Kazior static inline void ath10k_hif_power_down(struct ath10k *ar) 1708c5c5368SMichal Kazior { 1718c5c5368SMichal Kazior ar->hif.ops->power_down(ar); 1728c5c5368SMichal Kazior } 1738c5c5368SMichal Kazior 1748cd13cadSMichal Kazior static inline int ath10k_hif_suspend(struct ath10k *ar) 1758cd13cadSMichal Kazior { 1768cd13cadSMichal Kazior if (!ar->hif.ops->suspend) 1778cd13cadSMichal Kazior return -EOPNOTSUPP; 1788cd13cadSMichal Kazior 1798cd13cadSMichal Kazior return ar->hif.ops->suspend(ar); 1808cd13cadSMichal Kazior } 1818cd13cadSMichal Kazior 1828cd13cadSMichal Kazior static inline int ath10k_hif_resume(struct ath10k *ar) 1838cd13cadSMichal Kazior { 1848cd13cadSMichal Kazior if (!ar->hif.ops->resume) 1858cd13cadSMichal Kazior return -EOPNOTSUPP; 1868cd13cadSMichal Kazior 1878cd13cadSMichal Kazior return ar->hif.ops->resume(ar); 1888cd13cadSMichal Kazior } 1898cd13cadSMichal Kazior 190077a3804SYanbo Li static inline u32 ath10k_hif_read32(struct ath10k *ar, u32 address) 191077a3804SYanbo Li { 192077a3804SYanbo Li if (!ar->hif.ops->read32) { 193077a3804SYanbo Li ath10k_warn(ar, "hif read32 not supported\n"); 194077a3804SYanbo Li return 0xdeaddead; 195077a3804SYanbo Li } 196077a3804SYanbo Li 197077a3804SYanbo Li return ar->hif.ops->read32(ar, address); 198077a3804SYanbo Li } 199077a3804SYanbo Li 200077a3804SYanbo Li static inline void ath10k_hif_write32(struct ath10k *ar, 201077a3804SYanbo Li u32 address, u32 data) 202077a3804SYanbo Li { 203077a3804SYanbo Li if (!ar->hif.ops->write32) { 204077a3804SYanbo Li ath10k_warn(ar, "hif write32 not supported\n"); 205077a3804SYanbo Li return; 206077a3804SYanbo Li } 207077a3804SYanbo Li 208077a3804SYanbo Li ar->hif.ops->write32(ar, address, data); 209077a3804SYanbo Li } 210077a3804SYanbo Li 2116847f967SSven Eckelmann static inline int ath10k_hif_fetch_cal_eeprom(struct ath10k *ar, 2126847f967SSven Eckelmann void **data, 2136847f967SSven Eckelmann size_t *data_len) 2146847f967SSven Eckelmann { 2156847f967SSven Eckelmann if (!ar->hif.ops->fetch_cal_eeprom) 2166847f967SSven Eckelmann return -EOPNOTSUPP; 2176847f967SSven Eckelmann 2186847f967SSven Eckelmann return ar->hif.ops->fetch_cal_eeprom(ar, data, data_len); 2196847f967SSven Eckelmann } 2206847f967SSven Eckelmann 2215e3dd157SKalle Valo #endif /* _HIF_H_ */ 222