1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 4 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _CORE_H_ 20 #define _CORE_H_ 21 22 #include <linux/completion.h> 23 #include <linux/if_ether.h> 24 #include <linux/types.h> 25 #include <linux/pci.h> 26 #include <linux/uuid.h> 27 #include <linux/time.h> 28 29 #include "htt.h" 30 #include "htc.h" 31 #include "hw.h" 32 #include "targaddrs.h" 33 #include "wmi.h" 34 #include "../ath.h" 35 #include "../regd.h" 36 #include "../dfs_pattern_detector.h" 37 #include "spectral.h" 38 #include "thermal.h" 39 #include "wow.h" 40 #include "swap.h" 41 42 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 43 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 44 #define WO(_f) ((_f##_OFFSET) >> 2) 45 46 #define ATH10K_SCAN_ID 0 47 #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */ 48 #define WMI_READY_TIMEOUT (5 * HZ) 49 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ) 50 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ) 51 #define ATH10K_NUM_CHANS 41 52 #define ATH10K_MAX_5G_CHAN 173 53 54 /* Antenna noise floor */ 55 #define ATH10K_DEFAULT_NOISE_FLOOR -95 56 57 #define ATH10K_INVALID_RSSI 128 58 59 #define ATH10K_MAX_NUM_MGMT_PENDING 128 60 61 /* number of failed packets (20 packets with 16 sw reties each) */ 62 #define ATH10K_KICKOUT_THRESHOLD (20 * 16) 63 64 /* 65 * Use insanely high numbers to make sure that the firmware implementation 66 * won't start, we have the same functionality already in hostapd. Unit 67 * is seconds. 68 */ 69 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 70 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 71 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 72 73 /* NAPI poll budget */ 74 #define ATH10K_NAPI_BUDGET 64 75 76 /* SMBIOS type containing Board Data File Name Extension */ 77 #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8 78 79 /* SMBIOS type structure length (excluding strings-set) */ 80 #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9 81 82 /* Offset pointing to Board Data File Name Extension */ 83 #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8 84 85 /* Board Data File Name Extension string length. 86 * String format: BDF_<Customer ID>_<Extension>\0 87 */ 88 #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20 89 90 /* The magic used by QCA spec */ 91 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_" 92 93 struct ath10k; 94 95 enum ath10k_bus { 96 ATH10K_BUS_PCI, 97 ATH10K_BUS_AHB, 98 ATH10K_BUS_SDIO, 99 ATH10K_BUS_USB, 100 ATH10K_BUS_SNOC, 101 }; 102 103 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 104 { 105 switch (bus) { 106 case ATH10K_BUS_PCI: 107 return "pci"; 108 case ATH10K_BUS_AHB: 109 return "ahb"; 110 case ATH10K_BUS_SDIO: 111 return "sdio"; 112 case ATH10K_BUS_USB: 113 return "usb"; 114 case ATH10K_BUS_SNOC: 115 return "snoc"; 116 } 117 118 return "unknown"; 119 } 120 121 enum ath10k_skb_flags { 122 ATH10K_SKB_F_NO_HWCRYPT = BIT(0), 123 ATH10K_SKB_F_DTIM_ZERO = BIT(1), 124 ATH10K_SKB_F_DELIVER_CAB = BIT(2), 125 ATH10K_SKB_F_MGMT = BIT(3), 126 ATH10K_SKB_F_QOS = BIT(4), 127 }; 128 129 struct ath10k_skb_cb { 130 dma_addr_t paddr; 131 u8 flags; 132 u8 eid; 133 u16 msdu_id; 134 struct ieee80211_vif *vif; 135 struct ieee80211_txq *txq; 136 } __packed; 137 138 struct ath10k_skb_rxcb { 139 dma_addr_t paddr; 140 struct hlist_node hlist; 141 }; 142 143 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 144 { 145 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 146 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 147 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 148 } 149 150 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 151 { 152 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 153 return (struct ath10k_skb_rxcb *)skb->cb; 154 } 155 156 #define ATH10K_RXCB_SKB(rxcb) \ 157 container_of((void *)rxcb, struct sk_buff, cb) 158 159 static inline u32 host_interest_item_address(u32 item_offset) 160 { 161 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 162 } 163 164 struct ath10k_bmi { 165 bool done_sent; 166 }; 167 168 struct ath10k_mem_chunk { 169 void *vaddr; 170 dma_addr_t paddr; 171 u32 len; 172 u32 req_id; 173 }; 174 175 struct ath10k_wmi { 176 enum ath10k_htc_ep_id eid; 177 struct completion service_ready; 178 struct completion unified_ready; 179 struct completion barrier; 180 struct completion radar_confirm; 181 wait_queue_head_t tx_credits_wq; 182 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 183 struct wmi_cmd_map *cmd; 184 struct wmi_vdev_param_map *vdev_param; 185 struct wmi_pdev_param_map *pdev_param; 186 const struct wmi_ops *ops; 187 const struct wmi_peer_flags_map *peer_flags; 188 189 u32 mgmt_max_num_pending_tx; 190 191 /* Protected by data_lock */ 192 struct idr mgmt_pending_tx; 193 194 u32 num_mem_chunks; 195 u32 rx_decap_mode; 196 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 197 }; 198 199 struct ath10k_fw_stats_peer { 200 struct list_head list; 201 202 u8 peer_macaddr[ETH_ALEN]; 203 u32 peer_rssi; 204 u32 peer_tx_rate; 205 u32 peer_rx_rate; /* 10x only */ 206 u32 rx_duration; 207 }; 208 209 struct ath10k_fw_extd_stats_peer { 210 struct list_head list; 211 212 u8 peer_macaddr[ETH_ALEN]; 213 u32 rx_duration; 214 }; 215 216 struct ath10k_fw_stats_vdev { 217 struct list_head list; 218 219 u32 vdev_id; 220 u32 beacon_snr; 221 u32 data_snr; 222 u32 num_tx_frames[4]; 223 u32 num_rx_frames; 224 u32 num_tx_frames_retries[4]; 225 u32 num_tx_frames_failures[4]; 226 u32 num_rts_fail; 227 u32 num_rts_success; 228 u32 num_rx_err; 229 u32 num_rx_discard; 230 u32 num_tx_not_acked; 231 u32 tx_rate_history[10]; 232 u32 beacon_rssi_history[10]; 233 }; 234 235 struct ath10k_fw_stats_vdev_extd { 236 struct list_head list; 237 238 u32 vdev_id; 239 u32 ppdu_aggr_cnt; 240 u32 ppdu_noack; 241 u32 mpdu_queued; 242 u32 ppdu_nonaggr_cnt; 243 u32 mpdu_sw_requeued; 244 u32 mpdu_suc_retry; 245 u32 mpdu_suc_multitry; 246 u32 mpdu_fail_retry; 247 u32 tx_ftm_suc; 248 u32 tx_ftm_suc_retry; 249 u32 tx_ftm_fail; 250 u32 rx_ftmr_cnt; 251 u32 rx_ftmr_dup_cnt; 252 u32 rx_iftmr_cnt; 253 u32 rx_iftmr_dup_cnt; 254 }; 255 256 struct ath10k_fw_stats_pdev { 257 struct list_head list; 258 259 /* PDEV stats */ 260 s32 ch_noise_floor; 261 u32 tx_frame_count; /* Cycles spent transmitting frames */ 262 u32 rx_frame_count; /* Cycles spent receiving frames */ 263 u32 rx_clear_count; /* Total channel busy time, evidently */ 264 u32 cycle_count; /* Total on-channel time */ 265 u32 phy_err_count; 266 u32 chan_tx_power; 267 u32 ack_rx_bad; 268 u32 rts_bad; 269 u32 rts_good; 270 u32 fcs_bad; 271 u32 no_beacons; 272 u32 mib_int_count; 273 274 /* PDEV TX stats */ 275 s32 comp_queued; 276 s32 comp_delivered; 277 s32 msdu_enqued; 278 s32 mpdu_enqued; 279 s32 wmm_drop; 280 s32 local_enqued; 281 s32 local_freed; 282 s32 hw_queued; 283 s32 hw_reaped; 284 s32 underrun; 285 u32 hw_paused; 286 s32 tx_abort; 287 s32 mpdus_requed; 288 u32 tx_ko; 289 u32 data_rc; 290 u32 self_triggers; 291 u32 sw_retry_failure; 292 u32 illgl_rate_phy_err; 293 u32 pdev_cont_xretry; 294 u32 pdev_tx_timeout; 295 u32 pdev_resets; 296 u32 phy_underrun; 297 u32 txop_ovf; 298 u32 seq_posted; 299 u32 seq_failed_queueing; 300 u32 seq_completed; 301 u32 seq_restarted; 302 u32 mu_seq_posted; 303 u32 mpdus_sw_flush; 304 u32 mpdus_hw_filter; 305 u32 mpdus_truncated; 306 u32 mpdus_ack_failed; 307 u32 mpdus_expired; 308 309 /* PDEV RX stats */ 310 s32 mid_ppdu_route_change; 311 s32 status_rcvd; 312 s32 r0_frags; 313 s32 r1_frags; 314 s32 r2_frags; 315 s32 r3_frags; 316 s32 htt_msdus; 317 s32 htt_mpdus; 318 s32 loc_msdus; 319 s32 loc_mpdus; 320 s32 oversize_amsdu; 321 s32 phy_errs; 322 s32 phy_err_drop; 323 s32 mpdu_errs; 324 s32 rx_ovfl_errs; 325 }; 326 327 struct ath10k_fw_stats { 328 bool extended; 329 struct list_head pdevs; 330 struct list_head vdevs; 331 struct list_head peers; 332 struct list_head peers_extd; 333 }; 334 335 #define ATH10K_TPC_TABLE_TYPE_FLAG 1 336 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF 337 338 struct ath10k_tpc_table { 339 u32 pream_idx[WMI_TPC_RATE_MAX]; 340 u8 rate_code[WMI_TPC_RATE_MAX]; 341 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 342 }; 343 344 struct ath10k_tpc_stats { 345 u32 reg_domain; 346 u32 chan_freq; 347 u32 phy_mode; 348 u32 twice_antenna_reduction; 349 u32 twice_max_rd_power; 350 s32 twice_antenna_gain; 351 u32 power_limit; 352 u32 num_tx_chain; 353 u32 ctl; 354 u32 rate_max; 355 u8 flag[WMI_TPC_FLAG]; 356 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG]; 357 }; 358 359 struct ath10k_tpc_table_final { 360 u32 pream_idx[WMI_TPC_FINAL_RATE_MAX]; 361 u8 rate_code[WMI_TPC_FINAL_RATE_MAX]; 362 char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 363 }; 364 365 struct ath10k_tpc_stats_final { 366 u32 reg_domain; 367 u32 chan_freq; 368 u32 phy_mode; 369 u32 twice_antenna_reduction; 370 u32 twice_max_rd_power; 371 s32 twice_antenna_gain; 372 u32 power_limit; 373 u32 num_tx_chain; 374 u32 ctl; 375 u32 rate_max; 376 u8 flag[WMI_TPC_FLAG]; 377 struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG]; 378 }; 379 380 struct ath10k_dfs_stats { 381 u32 phy_errors; 382 u32 pulses_total; 383 u32 pulses_detected; 384 u32 pulses_discarded; 385 u32 radar_detected; 386 }; 387 388 enum ath10k_radar_confirmation_state { 389 ATH10K_RADAR_CONFIRMATION_IDLE = 0, 390 ATH10K_RADAR_CONFIRMATION_INPROGRESS, 391 ATH10K_RADAR_CONFIRMATION_STOPPED, 392 }; 393 394 struct ath10k_radar_found_info { 395 u32 pri_min; 396 u32 pri_max; 397 u32 width_min; 398 u32 width_max; 399 u32 sidx_min; 400 u32 sidx_max; 401 }; 402 403 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 404 405 struct ath10k_peer { 406 struct list_head list; 407 struct ieee80211_vif *vif; 408 struct ieee80211_sta *sta; 409 410 bool removed; 411 int vdev_id; 412 u8 addr[ETH_ALEN]; 413 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 414 415 /* protected by ar->data_lock */ 416 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 417 }; 418 419 struct ath10k_txq { 420 struct list_head list; 421 unsigned long num_fw_queued; 422 unsigned long num_push_allowed; 423 }; 424 425 enum ath10k_pkt_rx_err { 426 ATH10K_PKT_RX_ERR_FCS, 427 ATH10K_PKT_RX_ERR_TKIP, 428 ATH10K_PKT_RX_ERR_CRYPT, 429 ATH10K_PKT_RX_ERR_PEER_IDX_INVAL, 430 ATH10K_PKT_RX_ERR_MAX, 431 }; 432 433 enum ath10k_ampdu_subfrm_num { 434 ATH10K_AMPDU_SUBFRM_NUM_10, 435 ATH10K_AMPDU_SUBFRM_NUM_20, 436 ATH10K_AMPDU_SUBFRM_NUM_30, 437 ATH10K_AMPDU_SUBFRM_NUM_40, 438 ATH10K_AMPDU_SUBFRM_NUM_50, 439 ATH10K_AMPDU_SUBFRM_NUM_60, 440 ATH10K_AMPDU_SUBFRM_NUM_MORE, 441 ATH10K_AMPDU_SUBFRM_NUM_MAX, 442 }; 443 444 enum ath10k_amsdu_subfrm_num { 445 ATH10K_AMSDU_SUBFRM_NUM_1, 446 ATH10K_AMSDU_SUBFRM_NUM_2, 447 ATH10K_AMSDU_SUBFRM_NUM_3, 448 ATH10K_AMSDU_SUBFRM_NUM_4, 449 ATH10K_AMSDU_SUBFRM_NUM_MORE, 450 ATH10K_AMSDU_SUBFRM_NUM_MAX, 451 }; 452 453 struct ath10k_sta_tid_stats { 454 unsigned long int rx_pkt_from_fw; 455 unsigned long int rx_pkt_unchained; 456 unsigned long int rx_pkt_drop_chained; 457 unsigned long int rx_pkt_drop_filter; 458 unsigned long int rx_pkt_err[ATH10K_PKT_RX_ERR_MAX]; 459 unsigned long int rx_pkt_queued_for_mac; 460 unsigned long int rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX]; 461 unsigned long int rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX]; 462 }; 463 464 struct ath10k_sta { 465 struct ath10k_vif *arvif; 466 467 /* the following are protected by ar->data_lock */ 468 u32 changed; /* IEEE80211_RC_* */ 469 u32 bw; 470 u32 nss; 471 u32 smps; 472 u16 peer_id; 473 struct rate_info txrate; 474 475 struct work_struct update_wk; 476 u64 rx_duration; 477 478 #ifdef CONFIG_MAC80211_DEBUGFS 479 /* protected by conf_mutex */ 480 bool aggr_mode; 481 482 /* Protected with ar->data_lock */ 483 struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1]; 484 #endif 485 }; 486 487 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 488 489 enum ath10k_beacon_state { 490 ATH10K_BEACON_SCHEDULED = 0, 491 ATH10K_BEACON_SENDING, 492 ATH10K_BEACON_SENT, 493 }; 494 495 struct ath10k_vif { 496 struct list_head list; 497 498 u32 vdev_id; 499 u16 peer_id; 500 enum wmi_vdev_type vdev_type; 501 enum wmi_vdev_subtype vdev_subtype; 502 u32 beacon_interval; 503 u32 dtim_period; 504 struct sk_buff *beacon; 505 /* protected by data_lock */ 506 enum ath10k_beacon_state beacon_state; 507 void *beacon_buf; 508 dma_addr_t beacon_paddr; 509 unsigned long tx_paused; /* arbitrary values defined by target */ 510 511 struct ath10k *ar; 512 struct ieee80211_vif *vif; 513 514 bool is_started; 515 bool is_up; 516 bool spectral_enabled; 517 bool ps; 518 u32 aid; 519 u8 bssid[ETH_ALEN]; 520 521 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 522 s8 def_wep_key_idx; 523 524 u16 tx_seq_no; 525 526 union { 527 struct { 528 u32 uapsd; 529 } sta; 530 struct { 531 /* 512 stations */ 532 u8 tim_bitmap[64]; 533 u8 tim_len; 534 u32 ssid_len; 535 u8 ssid[IEEE80211_MAX_SSID_LEN]; 536 bool hidden_ssid; 537 /* P2P_IE with NoA attribute for P2P_GO case */ 538 u32 noa_len; 539 u8 *noa_data; 540 } ap; 541 } u; 542 543 bool use_cts_prot; 544 bool nohwcrypt; 545 int num_legacy_stations; 546 int txpower; 547 struct wmi_wmm_params_all_arg wmm_params; 548 struct work_struct ap_csa_work; 549 struct delayed_work connection_loss_work; 550 struct cfg80211_bitrate_mask bitrate_mask; 551 }; 552 553 struct ath10k_vif_iter { 554 u32 vdev_id; 555 struct ath10k_vif *arvif; 556 }; 557 558 /* Copy Engine register dump, protected by ce-lock */ 559 struct ath10k_ce_crash_data { 560 __le32 base_addr; 561 __le32 src_wr_idx; 562 __le32 src_r_idx; 563 __le32 dst_wr_idx; 564 __le32 dst_r_idx; 565 }; 566 567 struct ath10k_ce_crash_hdr { 568 __le32 ce_count; 569 __le32 reserved[3]; /* for future use */ 570 struct ath10k_ce_crash_data entries[]; 571 }; 572 573 #define MAX_MEM_DUMP_TYPE 5 574 575 /* used for crash-dump storage, protected by data-lock */ 576 struct ath10k_fw_crash_data { 577 guid_t guid; 578 struct timespec64 timestamp; 579 __le32 registers[REG_DUMP_COUNT_QCA988X]; 580 struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX]; 581 582 u8 *ramdump_buf; 583 size_t ramdump_buf_len; 584 }; 585 586 struct ath10k_debug { 587 struct dentry *debugfs_phy; 588 589 struct ath10k_fw_stats fw_stats; 590 struct completion fw_stats_complete; 591 bool fw_stats_done; 592 593 unsigned long htt_stats_mask; 594 struct delayed_work htt_stats_dwork; 595 struct ath10k_dfs_stats dfs_stats; 596 struct ath_dfs_pool_stats dfs_pool_stats; 597 598 /* used for tpc-dump storage, protected by data-lock */ 599 struct ath10k_tpc_stats *tpc_stats; 600 struct ath10k_tpc_stats_final *tpc_stats_final; 601 602 struct completion tpc_complete; 603 604 /* protected by conf_mutex */ 605 u64 fw_dbglog_mask; 606 u32 fw_dbglog_level; 607 u32 reg_addr; 608 u32 nf_cal_period; 609 void *cal_data; 610 }; 611 612 enum ath10k_state { 613 ATH10K_STATE_OFF = 0, 614 ATH10K_STATE_ON, 615 616 /* When doing firmware recovery the device is first powered down. 617 * mac80211 is supposed to call in to start() hook later on. It is 618 * however possible that driver unloading and firmware crash overlap. 619 * mac80211 can wait on conf_mutex in stop() while the device is 620 * stopped in ath10k_core_restart() work holding conf_mutex. The state 621 * RESTARTED means that the device is up and mac80211 has started hw 622 * reconfiguration. Once mac80211 is done with the reconfiguration we 623 * set the state to STATE_ON in reconfig_complete(). 624 */ 625 ATH10K_STATE_RESTARTING, 626 ATH10K_STATE_RESTARTED, 627 628 /* The device has crashed while restarting hw. This state is like ON 629 * but commands are blocked in HTC and -ECOMM response is given. This 630 * prevents completion timeouts and makes the driver more responsive to 631 * userspace commands. This is also prevents recursive recovery. 632 */ 633 ATH10K_STATE_WEDGED, 634 635 /* factory tests */ 636 ATH10K_STATE_UTF, 637 }; 638 639 enum ath10k_firmware_mode { 640 /* the default mode, standard 802.11 functionality */ 641 ATH10K_FIRMWARE_MODE_NORMAL, 642 643 /* factory tests etc */ 644 ATH10K_FIRMWARE_MODE_UTF, 645 }; 646 647 enum ath10k_fw_features { 648 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 649 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 650 651 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 652 ATH10K_FW_FEATURE_WMI_10X = 1, 653 654 /* firmware support tx frame management over WMI, otherwise it's HTT */ 655 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 656 657 /* Firmware does not support P2P */ 658 ATH10K_FW_FEATURE_NO_P2P = 3, 659 660 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 661 * bit is required to be set as well. Deprecated, don't use in new 662 * code. 663 */ 664 ATH10K_FW_FEATURE_WMI_10_2 = 4, 665 666 /* Some firmware revisions lack proper multi-interface client powersave 667 * implementation. Enabling PS could result in connection drops, 668 * traffic stalls, etc. 669 */ 670 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, 671 672 /* Some firmware revisions have an incomplete WoWLAN implementation 673 * despite WMI service bit being advertised. This feature flag is used 674 * to distinguish whether WoWLAN is really supported or not. 675 */ 676 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, 677 678 /* Don't trust error code from otp.bin */ 679 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7, 680 681 /* Some firmware revisions pad 4th hw address to 4 byte boundary making 682 * it 8 bytes long in Native Wifi Rx decap. 683 */ 684 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8, 685 686 /* Firmware supports bypassing PLL setting on init. */ 687 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, 688 689 /* Raw mode support. If supported, FW supports receiving and trasmitting 690 * frames in raw mode. 691 */ 692 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, 693 694 /* Firmware Supports Adaptive CCA*/ 695 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11, 696 697 /* Firmware supports management frame protection */ 698 ATH10K_FW_FEATURE_MFP_SUPPORT = 12, 699 700 /* Firmware supports pull-push model where host shares it's software 701 * queue state with firmware and firmware generates fetch requests 702 * telling host which queues to dequeue tx from. 703 * 704 * Primary function of this is improved MU-MIMO performance with 705 * multiple clients. 706 */ 707 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13, 708 709 /* Firmware supports BT-Coex without reloading firmware via pdev param. 710 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of 711 * extended resource config should be enabled always. This firmware IE 712 * is used to configure WMI_COEX_GPIO_SUPPORT. 713 */ 714 ATH10K_FW_FEATURE_BTCOEX_PARAM = 14, 715 716 /* Unused flag and proven to be not working, enable this if you want 717 * to experiment sending NULL func data frames in HTT TX 718 */ 719 ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15, 720 721 /* Firmware allow other BSS mesh broadcast/multicast frames without 722 * creating monitor interface. Appropriate rxfilters are programmed for 723 * mesh vdev by firmware itself. This feature flags will be used for 724 * not creating monitor vdev while configuring mesh node. 725 */ 726 ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16, 727 728 /* Firmware does not support power save in station mode. */ 729 ATH10K_FW_FEATURE_NO_PS = 17, 730 731 /* Firmware allows management tx by reference instead of by value. */ 732 ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18, 733 734 /* Firmware load is done externally, not by bmi */ 735 ATH10K_FW_FEATURE_NON_BMI = 19, 736 737 /* keep last */ 738 ATH10K_FW_FEATURE_COUNT, 739 }; 740 741 enum ath10k_dev_flags { 742 /* Indicates that ath10k device is during CAC phase of DFS */ 743 ATH10K_CAC_RUNNING, 744 ATH10K_FLAG_CORE_REGISTERED, 745 746 /* Device has crashed and needs to restart. This indicates any pending 747 * waiters should immediately cancel instead of waiting for a time out. 748 */ 749 ATH10K_FLAG_CRASH_FLUSH, 750 751 /* Use Raw mode instead of native WiFi Tx/Rx encap mode. 752 * Raw mode supports both hardware and software crypto. Native WiFi only 753 * supports hardware crypto. 754 */ 755 ATH10K_FLAG_RAW_MODE, 756 757 /* Disable HW crypto engine */ 758 ATH10K_FLAG_HW_CRYPTO_DISABLED, 759 760 /* Bluetooth coexistance enabled */ 761 ATH10K_FLAG_BTCOEX, 762 763 /* Per Station statistics service */ 764 ATH10K_FLAG_PEER_STATS, 765 }; 766 767 enum ath10k_cal_mode { 768 ATH10K_CAL_MODE_FILE, 769 ATH10K_CAL_MODE_OTP, 770 ATH10K_CAL_MODE_DT, 771 ATH10K_PRE_CAL_MODE_FILE, 772 ATH10K_PRE_CAL_MODE_DT, 773 ATH10K_CAL_MODE_EEPROM, 774 }; 775 776 enum ath10k_crypt_mode { 777 /* Only use hardware crypto engine */ 778 ATH10K_CRYPT_MODE_HW, 779 /* Only use software crypto engine */ 780 ATH10K_CRYPT_MODE_SW, 781 }; 782 783 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 784 { 785 switch (mode) { 786 case ATH10K_CAL_MODE_FILE: 787 return "file"; 788 case ATH10K_CAL_MODE_OTP: 789 return "otp"; 790 case ATH10K_CAL_MODE_DT: 791 return "dt"; 792 case ATH10K_PRE_CAL_MODE_FILE: 793 return "pre-cal-file"; 794 case ATH10K_PRE_CAL_MODE_DT: 795 return "pre-cal-dt"; 796 case ATH10K_CAL_MODE_EEPROM: 797 return "eeprom"; 798 } 799 800 return "unknown"; 801 } 802 803 enum ath10k_scan_state { 804 ATH10K_SCAN_IDLE, 805 ATH10K_SCAN_STARTING, 806 ATH10K_SCAN_RUNNING, 807 ATH10K_SCAN_ABORTING, 808 }; 809 810 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 811 { 812 switch (state) { 813 case ATH10K_SCAN_IDLE: 814 return "idle"; 815 case ATH10K_SCAN_STARTING: 816 return "starting"; 817 case ATH10K_SCAN_RUNNING: 818 return "running"; 819 case ATH10K_SCAN_ABORTING: 820 return "aborting"; 821 } 822 823 return "unknown"; 824 } 825 826 enum ath10k_tx_pause_reason { 827 ATH10K_TX_PAUSE_Q_FULL, 828 ATH10K_TX_PAUSE_MAX, 829 }; 830 831 struct ath10k_fw_file { 832 const struct firmware *firmware; 833 834 char fw_version[ETHTOOL_FWVERS_LEN]; 835 836 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 837 838 enum ath10k_fw_wmi_op_version wmi_op_version; 839 enum ath10k_fw_htt_op_version htt_op_version; 840 841 const void *firmware_data; 842 size_t firmware_len; 843 844 const void *otp_data; 845 size_t otp_len; 846 847 const void *codeswap_data; 848 size_t codeswap_len; 849 850 /* The original idea of struct ath10k_fw_file was that it only 851 * contains struct firmware and pointers to various parts (actual 852 * firmware binary, otp, metadata etc) of the file. This seg_info 853 * is actually created separate but as this is used similarly as 854 * the other firmware components it's more convenient to have it 855 * here. 856 */ 857 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; 858 }; 859 860 struct ath10k_fw_components { 861 const struct firmware *board; 862 const void *board_data; 863 size_t board_len; 864 865 struct ath10k_fw_file fw_file; 866 }; 867 868 struct ath10k_per_peer_tx_stats { 869 u32 succ_bytes; 870 u32 retry_bytes; 871 u32 failed_bytes; 872 u8 ratecode; 873 u8 flags; 874 u16 peer_id; 875 u16 succ_pkts; 876 u16 retry_pkts; 877 u16 failed_pkts; 878 u16 duration; 879 u32 reserved1; 880 u32 reserved2; 881 }; 882 883 struct ath10k { 884 struct ath_common ath_common; 885 struct ieee80211_hw *hw; 886 struct ieee80211_ops *ops; 887 struct device *dev; 888 u8 mac_addr[ETH_ALEN]; 889 890 enum ath10k_hw_rev hw_rev; 891 u16 dev_id; 892 u32 chip_id; 893 u32 target_version; 894 u8 fw_version_major; 895 u32 fw_version_minor; 896 u16 fw_version_release; 897 u16 fw_version_build; 898 u32 fw_stats_req_mask; 899 u32 phy_capability; 900 u32 hw_min_tx_power; 901 u32 hw_max_tx_power; 902 u32 hw_eeprom_rd; 903 u32 ht_cap_info; 904 u32 vht_cap_info; 905 u32 num_rf_chains; 906 u32 max_spatial_stream; 907 /* protected by conf_mutex */ 908 u32 low_5ghz_chan; 909 u32 high_5ghz_chan; 910 bool ani_enabled; 911 912 bool p2p; 913 914 struct { 915 enum ath10k_bus bus; 916 const struct ath10k_hif_ops *ops; 917 } hif; 918 919 struct completion target_suspend; 920 921 const struct ath10k_hw_regs *regs; 922 const struct ath10k_hw_ce_regs *hw_ce_regs; 923 const struct ath10k_hw_values *hw_values; 924 struct ath10k_bmi bmi; 925 struct ath10k_wmi wmi; 926 struct ath10k_htc htc; 927 struct ath10k_htt htt; 928 929 struct ath10k_hw_params hw_params; 930 931 /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */ 932 struct ath10k_fw_components normal_mode_fw; 933 934 /* READ-ONLY images of the running firmware, which can be either 935 * normal or UTF. Do not modify, release etc! 936 */ 937 const struct ath10k_fw_components *running_fw; 938 939 const struct firmware *pre_cal_file; 940 const struct firmware *cal_file; 941 942 struct { 943 u32 vendor; 944 u32 device; 945 u32 subsystem_vendor; 946 u32 subsystem_device; 947 948 bool bmi_ids_valid; 949 u8 bmi_board_id; 950 u8 bmi_chip_id; 951 952 char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH]; 953 } id; 954 955 int fw_api; 956 int bd_api; 957 enum ath10k_cal_mode cal_mode; 958 959 struct { 960 struct completion started; 961 struct completion completed; 962 struct completion on_channel; 963 struct delayed_work timeout; 964 enum ath10k_scan_state state; 965 bool is_roc; 966 int vdev_id; 967 int roc_freq; 968 bool roc_notify; 969 } scan; 970 971 struct { 972 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 973 } mac; 974 975 /* should never be NULL; needed for regular htt rx */ 976 struct ieee80211_channel *rx_channel; 977 978 /* valid during scan; needed for mgmt rx during scan */ 979 struct ieee80211_channel *scan_channel; 980 981 /* current operating channel definition */ 982 struct cfg80211_chan_def chandef; 983 984 /* currently configured operating channel in firmware */ 985 struct ieee80211_channel *tgt_oper_chan; 986 987 unsigned long long free_vdev_map; 988 struct ath10k_vif *monitor_arvif; 989 bool monitor; 990 int monitor_vdev_id; 991 bool monitor_started; 992 unsigned int filter_flags; 993 unsigned long dev_flags; 994 bool dfs_block_radar_events; 995 996 /* protected by conf_mutex */ 997 bool radar_enabled; 998 int num_started_vdevs; 999 1000 /* Protected by conf-mutex */ 1001 u8 cfg_tx_chainmask; 1002 u8 cfg_rx_chainmask; 1003 1004 struct completion install_key_done; 1005 1006 struct completion vdev_setup_done; 1007 1008 struct workqueue_struct *workqueue; 1009 /* Auxiliary workqueue */ 1010 struct workqueue_struct *workqueue_aux; 1011 1012 /* prevents concurrent FW reconfiguration */ 1013 struct mutex conf_mutex; 1014 1015 /* protects shared structure data */ 1016 spinlock_t data_lock; 1017 /* protects: ar->txqs, artxq->list */ 1018 spinlock_t txqs_lock; 1019 1020 struct list_head txqs; 1021 struct list_head arvifs; 1022 struct list_head peers; 1023 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS]; 1024 wait_queue_head_t peer_mapping_wq; 1025 1026 /* protected by conf_mutex */ 1027 int num_peers; 1028 int num_stations; 1029 1030 int max_num_peers; 1031 int max_num_stations; 1032 int max_num_vdevs; 1033 int max_num_tdls_vdevs; 1034 int num_active_peers; 1035 int num_tids; 1036 1037 struct work_struct svc_rdy_work; 1038 struct sk_buff *svc_rdy_skb; 1039 1040 struct work_struct offchan_tx_work; 1041 struct sk_buff_head offchan_tx_queue; 1042 struct completion offchan_tx_completed; 1043 struct sk_buff *offchan_tx_skb; 1044 1045 struct work_struct wmi_mgmt_tx_work; 1046 struct sk_buff_head wmi_mgmt_tx_queue; 1047 1048 enum ath10k_state state; 1049 1050 struct work_struct register_work; 1051 struct work_struct restart_work; 1052 1053 /* cycle count is reported twice for each visited channel during scan. 1054 * access protected by data_lock 1055 */ 1056 u32 survey_last_rx_clear_count; 1057 u32 survey_last_cycle_count; 1058 struct survey_info survey[ATH10K_NUM_CHANS]; 1059 1060 /* Channel info events are expected to come in pairs without and with 1061 * COMPLETE flag set respectively for each channel visit during scan. 1062 * 1063 * However there are deviations from this rule. This flag is used to 1064 * avoid reporting garbage data. 1065 */ 1066 bool ch_info_can_report_survey; 1067 struct completion bss_survey_done; 1068 1069 struct dfs_pattern_detector *dfs_detector; 1070 1071 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ 1072 1073 #ifdef CONFIG_ATH10K_DEBUGFS 1074 struct ath10k_debug debug; 1075 struct { 1076 /* relay(fs) channel for spectral scan */ 1077 struct rchan *rfs_chan_spec_scan; 1078 1079 /* spectral_mode and spec_config are protected by conf_mutex */ 1080 enum ath10k_spectral_mode mode; 1081 struct ath10k_spec_scan config; 1082 } spectral; 1083 #endif 1084 1085 u32 pktlog_filter; 1086 1087 #ifdef CONFIG_DEV_COREDUMP 1088 struct { 1089 struct ath10k_fw_crash_data *fw_crash_data; 1090 } coredump; 1091 #endif 1092 1093 struct { 1094 /* protected by conf_mutex */ 1095 struct ath10k_fw_components utf_mode_fw; 1096 1097 /* protected by data_lock */ 1098 bool utf_monitor; 1099 } testmode; 1100 1101 struct { 1102 /* protected by data_lock */ 1103 u32 fw_crash_counter; 1104 u32 fw_warm_reset_counter; 1105 u32 fw_cold_reset_counter; 1106 } stats; 1107 1108 struct ath10k_thermal thermal; 1109 struct ath10k_wow wow; 1110 struct ath10k_per_peer_tx_stats peer_tx_stats; 1111 1112 /* NAPI */ 1113 struct net_device napi_dev; 1114 struct napi_struct napi; 1115 1116 struct work_struct set_coverage_class_work; 1117 /* protected by conf_mutex */ 1118 struct { 1119 /* writing also protected by data_lock */ 1120 s16 coverage_class; 1121 1122 u32 reg_phyclk; 1123 u32 reg_slottime_conf; 1124 u32 reg_slottime_orig; 1125 u32 reg_ack_cts_timeout_conf; 1126 u32 reg_ack_cts_timeout_orig; 1127 } fw_coverage; 1128 1129 u32 ampdu_reference; 1130 1131 void *ce_priv; 1132 1133 u32 sta_tid_stats_mask; 1134 1135 /* protected by data_lock */ 1136 enum ath10k_radar_confirmation_state radar_conf_state; 1137 struct ath10k_radar_found_info last_radar_info; 1138 struct work_struct radar_confirmation_work; 1139 1140 /* must be last */ 1141 u8 drv_priv[0] __aligned(sizeof(void *)); 1142 }; 1143 1144 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar) 1145 { 1146 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) && 1147 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) 1148 return true; 1149 1150 return false; 1151 } 1152 1153 extern unsigned long ath10k_coredump_mask; 1154 1155 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 1156 enum ath10k_bus bus, 1157 enum ath10k_hw_rev hw_rev, 1158 const struct ath10k_hif_ops *hif_ops); 1159 void ath10k_core_destroy(struct ath10k *ar); 1160 void ath10k_core_get_fw_features_str(struct ath10k *ar, 1161 char *buf, 1162 size_t max_len); 1163 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1164 struct ath10k_fw_file *fw_file); 1165 1166 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1167 const struct ath10k_fw_components *fw_components); 1168 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 1169 void ath10k_core_stop(struct ath10k *ar); 1170 int ath10k_core_register(struct ath10k *ar, u32 chip_id); 1171 void ath10k_core_unregister(struct ath10k *ar); 1172 1173 #endif /* _CORE_H_ */ 1174