1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 4 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _CORE_H_ 20 #define _CORE_H_ 21 22 #include <linux/completion.h> 23 #include <linux/if_ether.h> 24 #include <linux/types.h> 25 #include <linux/pci.h> 26 #include <linux/uuid.h> 27 #include <linux/time.h> 28 29 #include "htt.h" 30 #include "htc.h" 31 #include "hw.h" 32 #include "targaddrs.h" 33 #include "wmi.h" 34 #include "../ath.h" 35 #include "../regd.h" 36 #include "../dfs_pattern_detector.h" 37 #include "spectral.h" 38 #include "thermal.h" 39 #include "wow.h" 40 #include "swap.h" 41 42 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 43 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 44 #define WO(_f) ((_f##_OFFSET) >> 2) 45 46 #define ATH10K_SCAN_ID 0 47 #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */ 48 #define WMI_READY_TIMEOUT (5 * HZ) 49 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ) 50 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ) 51 #define ATH10K_NUM_CHANS 40 52 53 /* Antenna noise floor */ 54 #define ATH10K_DEFAULT_NOISE_FLOOR -95 55 56 #define ATH10K_INVALID_RSSI 128 57 58 #define ATH10K_MAX_NUM_MGMT_PENDING 128 59 60 /* number of failed packets (20 packets with 16 sw reties each) */ 61 #define ATH10K_KICKOUT_THRESHOLD (20 * 16) 62 63 /* 64 * Use insanely high numbers to make sure that the firmware implementation 65 * won't start, we have the same functionality already in hostapd. Unit 66 * is seconds. 67 */ 68 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 69 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 70 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 71 72 /* NAPI poll budget */ 73 #define ATH10K_NAPI_BUDGET 64 74 75 /* SMBIOS type containing Board Data File Name Extension */ 76 #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8 77 78 /* SMBIOS type structure length (excluding strings-set) */ 79 #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9 80 81 /* Offset pointing to Board Data File Name Extension */ 82 #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8 83 84 /* Board Data File Name Extension string length. 85 * String format: BDF_<Customer ID>_<Extension>\0 86 */ 87 #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20 88 89 /* The magic used by QCA spec */ 90 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_" 91 92 struct ath10k; 93 94 enum ath10k_bus { 95 ATH10K_BUS_PCI, 96 ATH10K_BUS_AHB, 97 ATH10K_BUS_SDIO, 98 ATH10K_BUS_USB, 99 ATH10K_BUS_SNOC, 100 }; 101 102 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 103 { 104 switch (bus) { 105 case ATH10K_BUS_PCI: 106 return "pci"; 107 case ATH10K_BUS_AHB: 108 return "ahb"; 109 case ATH10K_BUS_SDIO: 110 return "sdio"; 111 case ATH10K_BUS_USB: 112 return "usb"; 113 case ATH10K_BUS_SNOC: 114 return "snoc"; 115 } 116 117 return "unknown"; 118 } 119 120 enum ath10k_skb_flags { 121 ATH10K_SKB_F_NO_HWCRYPT = BIT(0), 122 ATH10K_SKB_F_DTIM_ZERO = BIT(1), 123 ATH10K_SKB_F_DELIVER_CAB = BIT(2), 124 ATH10K_SKB_F_MGMT = BIT(3), 125 ATH10K_SKB_F_QOS = BIT(4), 126 }; 127 128 struct ath10k_skb_cb { 129 dma_addr_t paddr; 130 u8 flags; 131 u8 eid; 132 u16 msdu_id; 133 struct ieee80211_vif *vif; 134 struct ieee80211_txq *txq; 135 } __packed; 136 137 struct ath10k_skb_rxcb { 138 dma_addr_t paddr; 139 struct hlist_node hlist; 140 }; 141 142 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 143 { 144 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 145 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 146 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 147 } 148 149 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 150 { 151 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 152 return (struct ath10k_skb_rxcb *)skb->cb; 153 } 154 155 #define ATH10K_RXCB_SKB(rxcb) \ 156 container_of((void *)rxcb, struct sk_buff, cb) 157 158 static inline u32 host_interest_item_address(u32 item_offset) 159 { 160 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 161 } 162 163 struct ath10k_bmi { 164 bool done_sent; 165 }; 166 167 struct ath10k_mem_chunk { 168 void *vaddr; 169 dma_addr_t paddr; 170 u32 len; 171 u32 req_id; 172 }; 173 174 struct ath10k_wmi { 175 enum ath10k_htc_ep_id eid; 176 struct completion service_ready; 177 struct completion unified_ready; 178 struct completion barrier; 179 struct completion radar_confirm; 180 wait_queue_head_t tx_credits_wq; 181 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 182 struct wmi_cmd_map *cmd; 183 struct wmi_vdev_param_map *vdev_param; 184 struct wmi_pdev_param_map *pdev_param; 185 const struct wmi_ops *ops; 186 const struct wmi_peer_flags_map *peer_flags; 187 188 u32 num_mem_chunks; 189 u32 rx_decap_mode; 190 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 191 }; 192 193 struct ath10k_fw_stats_peer { 194 struct list_head list; 195 196 u8 peer_macaddr[ETH_ALEN]; 197 u32 peer_rssi; 198 u32 peer_tx_rate; 199 u32 peer_rx_rate; /* 10x only */ 200 u32 rx_duration; 201 }; 202 203 struct ath10k_fw_extd_stats_peer { 204 struct list_head list; 205 206 u8 peer_macaddr[ETH_ALEN]; 207 u32 rx_duration; 208 }; 209 210 struct ath10k_fw_stats_vdev { 211 struct list_head list; 212 213 u32 vdev_id; 214 u32 beacon_snr; 215 u32 data_snr; 216 u32 num_tx_frames[4]; 217 u32 num_rx_frames; 218 u32 num_tx_frames_retries[4]; 219 u32 num_tx_frames_failures[4]; 220 u32 num_rts_fail; 221 u32 num_rts_success; 222 u32 num_rx_err; 223 u32 num_rx_discard; 224 u32 num_tx_not_acked; 225 u32 tx_rate_history[10]; 226 u32 beacon_rssi_history[10]; 227 }; 228 229 struct ath10k_fw_stats_vdev_extd { 230 struct list_head list; 231 232 u32 vdev_id; 233 u32 ppdu_aggr_cnt; 234 u32 ppdu_noack; 235 u32 mpdu_queued; 236 u32 ppdu_nonaggr_cnt; 237 u32 mpdu_sw_requeued; 238 u32 mpdu_suc_retry; 239 u32 mpdu_suc_multitry; 240 u32 mpdu_fail_retry; 241 u32 tx_ftm_suc; 242 u32 tx_ftm_suc_retry; 243 u32 tx_ftm_fail; 244 u32 rx_ftmr_cnt; 245 u32 rx_ftmr_dup_cnt; 246 u32 rx_iftmr_cnt; 247 u32 rx_iftmr_dup_cnt; 248 }; 249 250 struct ath10k_fw_stats_pdev { 251 struct list_head list; 252 253 /* PDEV stats */ 254 s32 ch_noise_floor; 255 u32 tx_frame_count; /* Cycles spent transmitting frames */ 256 u32 rx_frame_count; /* Cycles spent receiving frames */ 257 u32 rx_clear_count; /* Total channel busy time, evidently */ 258 u32 cycle_count; /* Total on-channel time */ 259 u32 phy_err_count; 260 u32 chan_tx_power; 261 u32 ack_rx_bad; 262 u32 rts_bad; 263 u32 rts_good; 264 u32 fcs_bad; 265 u32 no_beacons; 266 u32 mib_int_count; 267 268 /* PDEV TX stats */ 269 s32 comp_queued; 270 s32 comp_delivered; 271 s32 msdu_enqued; 272 s32 mpdu_enqued; 273 s32 wmm_drop; 274 s32 local_enqued; 275 s32 local_freed; 276 s32 hw_queued; 277 s32 hw_reaped; 278 s32 underrun; 279 u32 hw_paused; 280 s32 tx_abort; 281 s32 mpdus_requed; 282 u32 tx_ko; 283 u32 data_rc; 284 u32 self_triggers; 285 u32 sw_retry_failure; 286 u32 illgl_rate_phy_err; 287 u32 pdev_cont_xretry; 288 u32 pdev_tx_timeout; 289 u32 pdev_resets; 290 u32 phy_underrun; 291 u32 txop_ovf; 292 u32 seq_posted; 293 u32 seq_failed_queueing; 294 u32 seq_completed; 295 u32 seq_restarted; 296 u32 mu_seq_posted; 297 u32 mpdus_sw_flush; 298 u32 mpdus_hw_filter; 299 u32 mpdus_truncated; 300 u32 mpdus_ack_failed; 301 u32 mpdus_expired; 302 303 /* PDEV RX stats */ 304 s32 mid_ppdu_route_change; 305 s32 status_rcvd; 306 s32 r0_frags; 307 s32 r1_frags; 308 s32 r2_frags; 309 s32 r3_frags; 310 s32 htt_msdus; 311 s32 htt_mpdus; 312 s32 loc_msdus; 313 s32 loc_mpdus; 314 s32 oversize_amsdu; 315 s32 phy_errs; 316 s32 phy_err_drop; 317 s32 mpdu_errs; 318 s32 rx_ovfl_errs; 319 }; 320 321 struct ath10k_fw_stats { 322 bool extended; 323 struct list_head pdevs; 324 struct list_head vdevs; 325 struct list_head peers; 326 struct list_head peers_extd; 327 }; 328 329 #define ATH10K_TPC_TABLE_TYPE_FLAG 1 330 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF 331 332 struct ath10k_tpc_table { 333 u32 pream_idx[WMI_TPC_RATE_MAX]; 334 u8 rate_code[WMI_TPC_RATE_MAX]; 335 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 336 }; 337 338 struct ath10k_tpc_stats { 339 u32 reg_domain; 340 u32 chan_freq; 341 u32 phy_mode; 342 u32 twice_antenna_reduction; 343 u32 twice_max_rd_power; 344 s32 twice_antenna_gain; 345 u32 power_limit; 346 u32 num_tx_chain; 347 u32 ctl; 348 u32 rate_max; 349 u8 flag[WMI_TPC_FLAG]; 350 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG]; 351 }; 352 353 struct ath10k_tpc_table_final { 354 u32 pream_idx[WMI_TPC_FINAL_RATE_MAX]; 355 u8 rate_code[WMI_TPC_FINAL_RATE_MAX]; 356 char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 357 }; 358 359 struct ath10k_tpc_stats_final { 360 u32 reg_domain; 361 u32 chan_freq; 362 u32 phy_mode; 363 u32 twice_antenna_reduction; 364 u32 twice_max_rd_power; 365 s32 twice_antenna_gain; 366 u32 power_limit; 367 u32 num_tx_chain; 368 u32 ctl; 369 u32 rate_max; 370 u8 flag[WMI_TPC_FLAG]; 371 struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG]; 372 }; 373 374 struct ath10k_dfs_stats { 375 u32 phy_errors; 376 u32 pulses_total; 377 u32 pulses_detected; 378 u32 pulses_discarded; 379 u32 radar_detected; 380 }; 381 382 enum ath10k_radar_confirmation_state { 383 ATH10K_RADAR_CONFIRMATION_IDLE = 0, 384 ATH10K_RADAR_CONFIRMATION_INPROGRESS, 385 ATH10K_RADAR_CONFIRMATION_STOPPED, 386 }; 387 388 struct ath10k_radar_found_info { 389 u32 pri_min; 390 u32 pri_max; 391 u32 width_min; 392 u32 width_max; 393 u32 sidx_min; 394 u32 sidx_max; 395 }; 396 397 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 398 399 struct ath10k_peer { 400 struct list_head list; 401 struct ieee80211_vif *vif; 402 struct ieee80211_sta *sta; 403 404 bool removed; 405 int vdev_id; 406 u8 addr[ETH_ALEN]; 407 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 408 409 /* protected by ar->data_lock */ 410 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 411 }; 412 413 struct ath10k_txq { 414 struct list_head list; 415 unsigned long num_fw_queued; 416 unsigned long num_push_allowed; 417 }; 418 419 enum ath10k_pkt_rx_err { 420 ATH10K_PKT_RX_ERR_FCS, 421 ATH10K_PKT_RX_ERR_TKIP, 422 ATH10K_PKT_RX_ERR_CRYPT, 423 ATH10K_PKT_RX_ERR_PEER_IDX_INVAL, 424 ATH10K_PKT_RX_ERR_MAX, 425 }; 426 427 enum ath10k_ampdu_subfrm_num { 428 ATH10K_AMPDU_SUBFRM_NUM_10, 429 ATH10K_AMPDU_SUBFRM_NUM_20, 430 ATH10K_AMPDU_SUBFRM_NUM_30, 431 ATH10K_AMPDU_SUBFRM_NUM_40, 432 ATH10K_AMPDU_SUBFRM_NUM_50, 433 ATH10K_AMPDU_SUBFRM_NUM_60, 434 ATH10K_AMPDU_SUBFRM_NUM_MORE, 435 ATH10K_AMPDU_SUBFRM_NUM_MAX, 436 }; 437 438 enum ath10k_amsdu_subfrm_num { 439 ATH10K_AMSDU_SUBFRM_NUM_1, 440 ATH10K_AMSDU_SUBFRM_NUM_2, 441 ATH10K_AMSDU_SUBFRM_NUM_3, 442 ATH10K_AMSDU_SUBFRM_NUM_4, 443 ATH10K_AMSDU_SUBFRM_NUM_MORE, 444 ATH10K_AMSDU_SUBFRM_NUM_MAX, 445 }; 446 447 struct ath10k_sta_tid_stats { 448 unsigned long int rx_pkt_from_fw; 449 unsigned long int rx_pkt_unchained; 450 unsigned long int rx_pkt_drop_chained; 451 unsigned long int rx_pkt_drop_filter; 452 unsigned long int rx_pkt_err[ATH10K_PKT_RX_ERR_MAX]; 453 unsigned long int rx_pkt_queued_for_mac; 454 unsigned long int rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX]; 455 unsigned long int rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX]; 456 }; 457 458 struct ath10k_sta { 459 struct ath10k_vif *arvif; 460 461 /* the following are protected by ar->data_lock */ 462 u32 changed; /* IEEE80211_RC_* */ 463 u32 bw; 464 u32 nss; 465 u32 smps; 466 u16 peer_id; 467 struct rate_info txrate; 468 469 struct work_struct update_wk; 470 u64 rx_duration; 471 472 #ifdef CONFIG_MAC80211_DEBUGFS 473 /* protected by conf_mutex */ 474 bool aggr_mode; 475 476 /* Protected with ar->data_lock */ 477 struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1]; 478 #endif 479 }; 480 481 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 482 483 enum ath10k_beacon_state { 484 ATH10K_BEACON_SCHEDULED = 0, 485 ATH10K_BEACON_SENDING, 486 ATH10K_BEACON_SENT, 487 }; 488 489 struct ath10k_vif { 490 struct list_head list; 491 492 u32 vdev_id; 493 u16 peer_id; 494 enum wmi_vdev_type vdev_type; 495 enum wmi_vdev_subtype vdev_subtype; 496 u32 beacon_interval; 497 u32 dtim_period; 498 struct sk_buff *beacon; 499 /* protected by data_lock */ 500 enum ath10k_beacon_state beacon_state; 501 void *beacon_buf; 502 dma_addr_t beacon_paddr; 503 unsigned long tx_paused; /* arbitrary values defined by target */ 504 505 struct ath10k *ar; 506 struct ieee80211_vif *vif; 507 508 bool is_started; 509 bool is_up; 510 bool spectral_enabled; 511 bool ps; 512 u32 aid; 513 u8 bssid[ETH_ALEN]; 514 515 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 516 s8 def_wep_key_idx; 517 518 u16 tx_seq_no; 519 520 union { 521 struct { 522 u32 uapsd; 523 } sta; 524 struct { 525 /* 512 stations */ 526 u8 tim_bitmap[64]; 527 u8 tim_len; 528 u32 ssid_len; 529 u8 ssid[IEEE80211_MAX_SSID_LEN]; 530 bool hidden_ssid; 531 /* P2P_IE with NoA attribute for P2P_GO case */ 532 u32 noa_len; 533 u8 *noa_data; 534 } ap; 535 } u; 536 537 bool use_cts_prot; 538 bool nohwcrypt; 539 int num_legacy_stations; 540 int txpower; 541 struct wmi_wmm_params_all_arg wmm_params; 542 struct work_struct ap_csa_work; 543 struct delayed_work connection_loss_work; 544 struct cfg80211_bitrate_mask bitrate_mask; 545 }; 546 547 struct ath10k_vif_iter { 548 u32 vdev_id; 549 struct ath10k_vif *arvif; 550 }; 551 552 /* Copy Engine register dump, protected by ce-lock */ 553 struct ath10k_ce_crash_data { 554 __le32 base_addr; 555 __le32 src_wr_idx; 556 __le32 src_r_idx; 557 __le32 dst_wr_idx; 558 __le32 dst_r_idx; 559 }; 560 561 struct ath10k_ce_crash_hdr { 562 __le32 ce_count; 563 __le32 reserved[3]; /* for future use */ 564 struct ath10k_ce_crash_data entries[]; 565 }; 566 567 #define MAX_MEM_DUMP_TYPE 5 568 569 /* used for crash-dump storage, protected by data-lock */ 570 struct ath10k_fw_crash_data { 571 guid_t guid; 572 struct timespec64 timestamp; 573 __le32 registers[REG_DUMP_COUNT_QCA988X]; 574 struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX]; 575 576 u8 *ramdump_buf; 577 size_t ramdump_buf_len; 578 }; 579 580 struct ath10k_debug { 581 struct dentry *debugfs_phy; 582 583 struct ath10k_fw_stats fw_stats; 584 struct completion fw_stats_complete; 585 bool fw_stats_done; 586 587 unsigned long htt_stats_mask; 588 struct delayed_work htt_stats_dwork; 589 struct ath10k_dfs_stats dfs_stats; 590 struct ath_dfs_pool_stats dfs_pool_stats; 591 592 /* used for tpc-dump storage, protected by data-lock */ 593 struct ath10k_tpc_stats *tpc_stats; 594 struct ath10k_tpc_stats_final *tpc_stats_final; 595 596 struct completion tpc_complete; 597 598 /* protected by conf_mutex */ 599 u64 fw_dbglog_mask; 600 u32 fw_dbglog_level; 601 u32 reg_addr; 602 u32 nf_cal_period; 603 void *cal_data; 604 }; 605 606 enum ath10k_state { 607 ATH10K_STATE_OFF = 0, 608 ATH10K_STATE_ON, 609 610 /* When doing firmware recovery the device is first powered down. 611 * mac80211 is supposed to call in to start() hook later on. It is 612 * however possible that driver unloading and firmware crash overlap. 613 * mac80211 can wait on conf_mutex in stop() while the device is 614 * stopped in ath10k_core_restart() work holding conf_mutex. The state 615 * RESTARTED means that the device is up and mac80211 has started hw 616 * reconfiguration. Once mac80211 is done with the reconfiguration we 617 * set the state to STATE_ON in reconfig_complete(). 618 */ 619 ATH10K_STATE_RESTARTING, 620 ATH10K_STATE_RESTARTED, 621 622 /* The device has crashed while restarting hw. This state is like ON 623 * but commands are blocked in HTC and -ECOMM response is given. This 624 * prevents completion timeouts and makes the driver more responsive to 625 * userspace commands. This is also prevents recursive recovery. 626 */ 627 ATH10K_STATE_WEDGED, 628 629 /* factory tests */ 630 ATH10K_STATE_UTF, 631 }; 632 633 enum ath10k_firmware_mode { 634 /* the default mode, standard 802.11 functionality */ 635 ATH10K_FIRMWARE_MODE_NORMAL, 636 637 /* factory tests etc */ 638 ATH10K_FIRMWARE_MODE_UTF, 639 }; 640 641 enum ath10k_fw_features { 642 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 643 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 644 645 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 646 ATH10K_FW_FEATURE_WMI_10X = 1, 647 648 /* firmware support tx frame management over WMI, otherwise it's HTT */ 649 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 650 651 /* Firmware does not support P2P */ 652 ATH10K_FW_FEATURE_NO_P2P = 3, 653 654 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 655 * bit is required to be set as well. Deprecated, don't use in new 656 * code. 657 */ 658 ATH10K_FW_FEATURE_WMI_10_2 = 4, 659 660 /* Some firmware revisions lack proper multi-interface client powersave 661 * implementation. Enabling PS could result in connection drops, 662 * traffic stalls, etc. 663 */ 664 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, 665 666 /* Some firmware revisions have an incomplete WoWLAN implementation 667 * despite WMI service bit being advertised. This feature flag is used 668 * to distinguish whether WoWLAN is really supported or not. 669 */ 670 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, 671 672 /* Don't trust error code from otp.bin */ 673 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7, 674 675 /* Some firmware revisions pad 4th hw address to 4 byte boundary making 676 * it 8 bytes long in Native Wifi Rx decap. 677 */ 678 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8, 679 680 /* Firmware supports bypassing PLL setting on init. */ 681 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, 682 683 /* Raw mode support. If supported, FW supports receiving and trasmitting 684 * frames in raw mode. 685 */ 686 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, 687 688 /* Firmware Supports Adaptive CCA*/ 689 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11, 690 691 /* Firmware supports management frame protection */ 692 ATH10K_FW_FEATURE_MFP_SUPPORT = 12, 693 694 /* Firmware supports pull-push model where host shares it's software 695 * queue state with firmware and firmware generates fetch requests 696 * telling host which queues to dequeue tx from. 697 * 698 * Primary function of this is improved MU-MIMO performance with 699 * multiple clients. 700 */ 701 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13, 702 703 /* Firmware supports BT-Coex without reloading firmware via pdev param. 704 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of 705 * extended resource config should be enabled always. This firmware IE 706 * is used to configure WMI_COEX_GPIO_SUPPORT. 707 */ 708 ATH10K_FW_FEATURE_BTCOEX_PARAM = 14, 709 710 /* Unused flag and proven to be not working, enable this if you want 711 * to experiment sending NULL func data frames in HTT TX 712 */ 713 ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15, 714 715 /* Firmware allow other BSS mesh broadcast/multicast frames without 716 * creating monitor interface. Appropriate rxfilters are programmed for 717 * mesh vdev by firmware itself. This feature flags will be used for 718 * not creating monitor vdev while configuring mesh node. 719 */ 720 ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16, 721 722 /* Firmware does not support power save in station mode. */ 723 ATH10K_FW_FEATURE_NO_PS = 17, 724 725 /* Firmware allows management tx by reference instead of by value. */ 726 ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18, 727 728 /* Firmware load is done externally, not by bmi */ 729 ATH10K_FW_FEATURE_NON_BMI = 19, 730 731 /* keep last */ 732 ATH10K_FW_FEATURE_COUNT, 733 }; 734 735 enum ath10k_dev_flags { 736 /* Indicates that ath10k device is during CAC phase of DFS */ 737 ATH10K_CAC_RUNNING, 738 ATH10K_FLAG_CORE_REGISTERED, 739 740 /* Device has crashed and needs to restart. This indicates any pending 741 * waiters should immediately cancel instead of waiting for a time out. 742 */ 743 ATH10K_FLAG_CRASH_FLUSH, 744 745 /* Use Raw mode instead of native WiFi Tx/Rx encap mode. 746 * Raw mode supports both hardware and software crypto. Native WiFi only 747 * supports hardware crypto. 748 */ 749 ATH10K_FLAG_RAW_MODE, 750 751 /* Disable HW crypto engine */ 752 ATH10K_FLAG_HW_CRYPTO_DISABLED, 753 754 /* Bluetooth coexistance enabled */ 755 ATH10K_FLAG_BTCOEX, 756 757 /* Per Station statistics service */ 758 ATH10K_FLAG_PEER_STATS, 759 }; 760 761 enum ath10k_cal_mode { 762 ATH10K_CAL_MODE_FILE, 763 ATH10K_CAL_MODE_OTP, 764 ATH10K_CAL_MODE_DT, 765 ATH10K_PRE_CAL_MODE_FILE, 766 ATH10K_PRE_CAL_MODE_DT, 767 ATH10K_CAL_MODE_EEPROM, 768 }; 769 770 enum ath10k_crypt_mode { 771 /* Only use hardware crypto engine */ 772 ATH10K_CRYPT_MODE_HW, 773 /* Only use software crypto engine */ 774 ATH10K_CRYPT_MODE_SW, 775 }; 776 777 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 778 { 779 switch (mode) { 780 case ATH10K_CAL_MODE_FILE: 781 return "file"; 782 case ATH10K_CAL_MODE_OTP: 783 return "otp"; 784 case ATH10K_CAL_MODE_DT: 785 return "dt"; 786 case ATH10K_PRE_CAL_MODE_FILE: 787 return "pre-cal-file"; 788 case ATH10K_PRE_CAL_MODE_DT: 789 return "pre-cal-dt"; 790 case ATH10K_CAL_MODE_EEPROM: 791 return "eeprom"; 792 } 793 794 return "unknown"; 795 } 796 797 enum ath10k_scan_state { 798 ATH10K_SCAN_IDLE, 799 ATH10K_SCAN_STARTING, 800 ATH10K_SCAN_RUNNING, 801 ATH10K_SCAN_ABORTING, 802 }; 803 804 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 805 { 806 switch (state) { 807 case ATH10K_SCAN_IDLE: 808 return "idle"; 809 case ATH10K_SCAN_STARTING: 810 return "starting"; 811 case ATH10K_SCAN_RUNNING: 812 return "running"; 813 case ATH10K_SCAN_ABORTING: 814 return "aborting"; 815 } 816 817 return "unknown"; 818 } 819 820 enum ath10k_tx_pause_reason { 821 ATH10K_TX_PAUSE_Q_FULL, 822 ATH10K_TX_PAUSE_MAX, 823 }; 824 825 struct ath10k_fw_file { 826 const struct firmware *firmware; 827 828 char fw_version[ETHTOOL_FWVERS_LEN]; 829 830 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 831 832 enum ath10k_fw_wmi_op_version wmi_op_version; 833 enum ath10k_fw_htt_op_version htt_op_version; 834 835 const void *firmware_data; 836 size_t firmware_len; 837 838 const void *otp_data; 839 size_t otp_len; 840 841 const void *codeswap_data; 842 size_t codeswap_len; 843 844 /* The original idea of struct ath10k_fw_file was that it only 845 * contains struct firmware and pointers to various parts (actual 846 * firmware binary, otp, metadata etc) of the file. This seg_info 847 * is actually created separate but as this is used similarly as 848 * the other firmware components it's more convenient to have it 849 * here. 850 */ 851 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; 852 }; 853 854 struct ath10k_fw_components { 855 const struct firmware *board; 856 const void *board_data; 857 size_t board_len; 858 859 struct ath10k_fw_file fw_file; 860 }; 861 862 struct ath10k_per_peer_tx_stats { 863 u32 succ_bytes; 864 u32 retry_bytes; 865 u32 failed_bytes; 866 u8 ratecode; 867 u8 flags; 868 u16 peer_id; 869 u16 succ_pkts; 870 u16 retry_pkts; 871 u16 failed_pkts; 872 u16 duration; 873 u32 reserved1; 874 u32 reserved2; 875 }; 876 877 struct ath10k { 878 struct ath_common ath_common; 879 struct ieee80211_hw *hw; 880 struct ieee80211_ops *ops; 881 struct device *dev; 882 u8 mac_addr[ETH_ALEN]; 883 884 enum ath10k_hw_rev hw_rev; 885 u16 dev_id; 886 u32 chip_id; 887 u32 target_version; 888 u8 fw_version_major; 889 u32 fw_version_minor; 890 u16 fw_version_release; 891 u16 fw_version_build; 892 u32 fw_stats_req_mask; 893 u32 phy_capability; 894 u32 hw_min_tx_power; 895 u32 hw_max_tx_power; 896 u32 hw_eeprom_rd; 897 u32 ht_cap_info; 898 u32 vht_cap_info; 899 u32 num_rf_chains; 900 u32 max_spatial_stream; 901 /* protected by conf_mutex */ 902 u32 low_5ghz_chan; 903 u32 high_5ghz_chan; 904 bool ani_enabled; 905 906 bool p2p; 907 908 struct { 909 enum ath10k_bus bus; 910 const struct ath10k_hif_ops *ops; 911 } hif; 912 913 struct completion target_suspend; 914 915 const struct ath10k_hw_regs *regs; 916 const struct ath10k_hw_ce_regs *hw_ce_regs; 917 const struct ath10k_hw_values *hw_values; 918 struct ath10k_bmi bmi; 919 struct ath10k_wmi wmi; 920 struct ath10k_htc htc; 921 struct ath10k_htt htt; 922 923 struct ath10k_hw_params hw_params; 924 925 /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */ 926 struct ath10k_fw_components normal_mode_fw; 927 928 /* READ-ONLY images of the running firmware, which can be either 929 * normal or UTF. Do not modify, release etc! 930 */ 931 const struct ath10k_fw_components *running_fw; 932 933 const struct firmware *pre_cal_file; 934 const struct firmware *cal_file; 935 936 struct { 937 u32 vendor; 938 u32 device; 939 u32 subsystem_vendor; 940 u32 subsystem_device; 941 942 bool bmi_ids_valid; 943 u8 bmi_board_id; 944 u8 bmi_chip_id; 945 946 char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH]; 947 } id; 948 949 int fw_api; 950 int bd_api; 951 enum ath10k_cal_mode cal_mode; 952 953 struct { 954 struct completion started; 955 struct completion completed; 956 struct completion on_channel; 957 struct delayed_work timeout; 958 enum ath10k_scan_state state; 959 bool is_roc; 960 int vdev_id; 961 int roc_freq; 962 bool roc_notify; 963 } scan; 964 965 struct { 966 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 967 } mac; 968 969 /* should never be NULL; needed for regular htt rx */ 970 struct ieee80211_channel *rx_channel; 971 972 /* valid during scan; needed for mgmt rx during scan */ 973 struct ieee80211_channel *scan_channel; 974 975 /* current operating channel definition */ 976 struct cfg80211_chan_def chandef; 977 978 /* currently configured operating channel in firmware */ 979 struct ieee80211_channel *tgt_oper_chan; 980 981 unsigned long long free_vdev_map; 982 struct ath10k_vif *monitor_arvif; 983 bool monitor; 984 int monitor_vdev_id; 985 bool monitor_started; 986 unsigned int filter_flags; 987 unsigned long dev_flags; 988 bool dfs_block_radar_events; 989 990 /* protected by conf_mutex */ 991 bool radar_enabled; 992 int num_started_vdevs; 993 994 /* Protected by conf-mutex */ 995 u8 cfg_tx_chainmask; 996 u8 cfg_rx_chainmask; 997 998 struct completion install_key_done; 999 1000 struct completion vdev_setup_done; 1001 1002 struct workqueue_struct *workqueue; 1003 /* Auxiliary workqueue */ 1004 struct workqueue_struct *workqueue_aux; 1005 1006 /* prevents concurrent FW reconfiguration */ 1007 struct mutex conf_mutex; 1008 1009 /* protects shared structure data */ 1010 spinlock_t data_lock; 1011 /* protects: ar->txqs, artxq->list */ 1012 spinlock_t txqs_lock; 1013 1014 struct list_head txqs; 1015 struct list_head arvifs; 1016 struct list_head peers; 1017 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS]; 1018 wait_queue_head_t peer_mapping_wq; 1019 1020 /* protected by conf_mutex */ 1021 int num_peers; 1022 int num_stations; 1023 1024 int max_num_peers; 1025 int max_num_stations; 1026 int max_num_vdevs; 1027 int max_num_tdls_vdevs; 1028 int num_active_peers; 1029 int num_tids; 1030 1031 struct work_struct svc_rdy_work; 1032 struct sk_buff *svc_rdy_skb; 1033 1034 struct work_struct offchan_tx_work; 1035 struct sk_buff_head offchan_tx_queue; 1036 struct completion offchan_tx_completed; 1037 struct sk_buff *offchan_tx_skb; 1038 1039 struct work_struct wmi_mgmt_tx_work; 1040 struct sk_buff_head wmi_mgmt_tx_queue; 1041 1042 enum ath10k_state state; 1043 1044 struct work_struct register_work; 1045 struct work_struct restart_work; 1046 1047 /* cycle count is reported twice for each visited channel during scan. 1048 * access protected by data_lock 1049 */ 1050 u32 survey_last_rx_clear_count; 1051 u32 survey_last_cycle_count; 1052 struct survey_info survey[ATH10K_NUM_CHANS]; 1053 1054 /* Channel info events are expected to come in pairs without and with 1055 * COMPLETE flag set respectively for each channel visit during scan. 1056 * 1057 * However there are deviations from this rule. This flag is used to 1058 * avoid reporting garbage data. 1059 */ 1060 bool ch_info_can_report_survey; 1061 struct completion bss_survey_done; 1062 1063 struct dfs_pattern_detector *dfs_detector; 1064 1065 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ 1066 1067 #ifdef CONFIG_ATH10K_DEBUGFS 1068 struct ath10k_debug debug; 1069 struct { 1070 /* relay(fs) channel for spectral scan */ 1071 struct rchan *rfs_chan_spec_scan; 1072 1073 /* spectral_mode and spec_config are protected by conf_mutex */ 1074 enum ath10k_spectral_mode mode; 1075 struct ath10k_spec_scan config; 1076 } spectral; 1077 #endif 1078 1079 u32 pktlog_filter; 1080 1081 #ifdef CONFIG_DEV_COREDUMP 1082 struct { 1083 struct ath10k_fw_crash_data *fw_crash_data; 1084 } coredump; 1085 #endif 1086 1087 struct { 1088 /* protected by conf_mutex */ 1089 struct ath10k_fw_components utf_mode_fw; 1090 1091 /* protected by data_lock */ 1092 bool utf_monitor; 1093 } testmode; 1094 1095 struct { 1096 /* protected by data_lock */ 1097 u32 fw_crash_counter; 1098 u32 fw_warm_reset_counter; 1099 u32 fw_cold_reset_counter; 1100 } stats; 1101 1102 struct ath10k_thermal thermal; 1103 struct ath10k_wow wow; 1104 struct ath10k_per_peer_tx_stats peer_tx_stats; 1105 1106 /* NAPI */ 1107 struct net_device napi_dev; 1108 struct napi_struct napi; 1109 1110 struct work_struct set_coverage_class_work; 1111 /* protected by conf_mutex */ 1112 struct { 1113 /* writing also protected by data_lock */ 1114 s16 coverage_class; 1115 1116 u32 reg_phyclk; 1117 u32 reg_slottime_conf; 1118 u32 reg_slottime_orig; 1119 u32 reg_ack_cts_timeout_conf; 1120 u32 reg_ack_cts_timeout_orig; 1121 } fw_coverage; 1122 1123 u32 ampdu_reference; 1124 1125 void *ce_priv; 1126 1127 u32 sta_tid_stats_mask; 1128 1129 /* protected by data_lock */ 1130 enum ath10k_radar_confirmation_state radar_conf_state; 1131 struct ath10k_radar_found_info last_radar_info; 1132 struct work_struct radar_confirmation_work; 1133 1134 /* must be last */ 1135 u8 drv_priv[0] __aligned(sizeof(void *)); 1136 }; 1137 1138 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar) 1139 { 1140 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) && 1141 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) 1142 return true; 1143 1144 return false; 1145 } 1146 1147 extern unsigned long ath10k_coredump_mask; 1148 1149 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 1150 enum ath10k_bus bus, 1151 enum ath10k_hw_rev hw_rev, 1152 const struct ath10k_hif_ops *hif_ops); 1153 void ath10k_core_destroy(struct ath10k *ar); 1154 void ath10k_core_get_fw_features_str(struct ath10k *ar, 1155 char *buf, 1156 size_t max_len); 1157 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1158 struct ath10k_fw_file *fw_file); 1159 1160 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1161 const struct ath10k_fw_components *fw_components); 1162 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 1163 void ath10k_core_stop(struct ath10k *ar); 1164 int ath10k_core_register(struct ath10k *ar, u32 chip_id); 1165 void ath10k_core_unregister(struct ath10k *ar); 1166 1167 #endif /* _CORE_H_ */ 1168