1 /*
2  * Copyright (c) 2005-2011 Atheros Communications Inc.
3  * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 #ifndef _CORE_H_
19 #define _CORE_H_
20 
21 #include <linux/completion.h>
22 #include <linux/if_ether.h>
23 #include <linux/types.h>
24 #include <linux/pci.h>
25 #include <linux/uuid.h>
26 #include <linux/time.h>
27 
28 #include "htt.h"
29 #include "htc.h"
30 #include "hw.h"
31 #include "targaddrs.h"
32 #include "wmi.h"
33 #include "../ath.h"
34 #include "../regd.h"
35 #include "../dfs_pattern_detector.h"
36 #include "spectral.h"
37 
38 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
39 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
40 #define WO(_f)      ((_f##_OFFSET) >> 2)
41 
42 #define ATH10K_SCAN_ID 0
43 #define WMI_READY_TIMEOUT (5 * HZ)
44 #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
45 #define ATH10K_NUM_CHANS 38
46 
47 /* Antenna noise floor */
48 #define ATH10K_DEFAULT_NOISE_FLOOR -95
49 
50 #define ATH10K_MAX_NUM_MGMT_PENDING 128
51 
52 /* number of failed packets */
53 #define ATH10K_KICKOUT_THRESHOLD 50
54 
55 /*
56  * Use insanely high numbers to make sure that the firmware implementation
57  * won't start, we have the same functionality already in hostapd. Unit
58  * is seconds.
59  */
60 #define ATH10K_KEEPALIVE_MIN_IDLE 3747
61 #define ATH10K_KEEPALIVE_MAX_IDLE 3895
62 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
63 
64 struct ath10k;
65 
66 enum ath10k_bus {
67 	ATH10K_BUS_PCI,
68 };
69 
70 static inline const char *ath10k_bus_str(enum ath10k_bus bus)
71 {
72 	switch (bus) {
73 	case ATH10K_BUS_PCI:
74 		return "pci";
75 	}
76 
77 	return "unknown";
78 }
79 
80 struct ath10k_skb_cb {
81 	dma_addr_t paddr;
82 	u8 eid;
83 	u8 vdev_id;
84 
85 	struct {
86 		u8 tid;
87 		u16 freq;
88 		bool is_offchan;
89 		struct ath10k_htt_txbuf *txbuf;
90 		u32 txbuf_paddr;
91 	} __packed htt;
92 
93 	struct {
94 		bool dtim_zero;
95 		bool deliver_cab;
96 	} bcn;
97 } __packed;
98 
99 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
100 {
101 	BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
102 		     IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
103 	return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
104 }
105 
106 static inline u32 host_interest_item_address(u32 item_offset)
107 {
108 	return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
109 }
110 
111 struct ath10k_bmi {
112 	bool done_sent;
113 };
114 
115 struct ath10k_mem_chunk {
116 	void *vaddr;
117 	dma_addr_t paddr;
118 	u32 len;
119 	u32 req_id;
120 };
121 
122 struct ath10k_wmi {
123 	enum ath10k_htc_ep_id eid;
124 	struct completion service_ready;
125 	struct completion unified_ready;
126 	wait_queue_head_t tx_credits_wq;
127 	DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
128 	struct wmi_cmd_map *cmd;
129 	struct wmi_vdev_param_map *vdev_param;
130 	struct wmi_pdev_param_map *pdev_param;
131 
132 	u32 num_mem_chunks;
133 	struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
134 };
135 
136 struct ath10k_fw_stats_peer {
137 	struct list_head list;
138 
139 	u8 peer_macaddr[ETH_ALEN];
140 	u32 peer_rssi;
141 	u32 peer_tx_rate;
142 	u32 peer_rx_rate; /* 10x only */
143 };
144 
145 struct ath10k_fw_stats_pdev {
146 	struct list_head list;
147 
148 	/* PDEV stats */
149 	s32 ch_noise_floor;
150 	u32 tx_frame_count;
151 	u32 rx_frame_count;
152 	u32 rx_clear_count;
153 	u32 cycle_count;
154 	u32 phy_err_count;
155 	u32 chan_tx_power;
156 	u32 ack_rx_bad;
157 	u32 rts_bad;
158 	u32 rts_good;
159 	u32 fcs_bad;
160 	u32 no_beacons;
161 	u32 mib_int_count;
162 
163 	/* PDEV TX stats */
164 	s32 comp_queued;
165 	s32 comp_delivered;
166 	s32 msdu_enqued;
167 	s32 mpdu_enqued;
168 	s32 wmm_drop;
169 	s32 local_enqued;
170 	s32 local_freed;
171 	s32 hw_queued;
172 	s32 hw_reaped;
173 	s32 underrun;
174 	s32 tx_abort;
175 	s32 mpdus_requed;
176 	u32 tx_ko;
177 	u32 data_rc;
178 	u32 self_triggers;
179 	u32 sw_retry_failure;
180 	u32 illgl_rate_phy_err;
181 	u32 pdev_cont_xretry;
182 	u32 pdev_tx_timeout;
183 	u32 pdev_resets;
184 	u32 phy_underrun;
185 	u32 txop_ovf;
186 
187 	/* PDEV RX stats */
188 	s32 mid_ppdu_route_change;
189 	s32 status_rcvd;
190 	s32 r0_frags;
191 	s32 r1_frags;
192 	s32 r2_frags;
193 	s32 r3_frags;
194 	s32 htt_msdus;
195 	s32 htt_mpdus;
196 	s32 loc_msdus;
197 	s32 loc_mpdus;
198 	s32 oversize_amsdu;
199 	s32 phy_errs;
200 	s32 phy_err_drop;
201 	s32 mpdu_errs;
202 };
203 
204 struct ath10k_fw_stats {
205 	struct list_head pdevs;
206 	struct list_head peers;
207 };
208 
209 struct ath10k_dfs_stats {
210 	u32 phy_errors;
211 	u32 pulses_total;
212 	u32 pulses_detected;
213 	u32 pulses_discarded;
214 	u32 radar_detected;
215 };
216 
217 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
218 
219 struct ath10k_peer {
220 	struct list_head list;
221 	int vdev_id;
222 	u8 addr[ETH_ALEN];
223 	DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
224 
225 	/* protected by ar->data_lock */
226 	struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
227 };
228 
229 struct ath10k_sta {
230 	struct ath10k_vif *arvif;
231 
232 	/* the following are protected by ar->data_lock */
233 	u32 changed; /* IEEE80211_RC_* */
234 	u32 bw;
235 	u32 nss;
236 	u32 smps;
237 
238 	struct work_struct update_wk;
239 };
240 
241 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
242 
243 struct ath10k_vif {
244 	struct list_head list;
245 
246 	u32 vdev_id;
247 	enum wmi_vdev_type vdev_type;
248 	enum wmi_vdev_subtype vdev_subtype;
249 	u32 beacon_interval;
250 	u32 dtim_period;
251 	struct sk_buff *beacon;
252 	/* protected by data_lock */
253 	bool beacon_sent;
254 	void *beacon_buf;
255 	dma_addr_t beacon_paddr;
256 
257 	struct ath10k *ar;
258 	struct ieee80211_vif *vif;
259 
260 	bool is_started;
261 	bool is_up;
262 	bool spectral_enabled;
263 	u32 aid;
264 	u8 bssid[ETH_ALEN];
265 
266 	struct work_struct wep_key_work;
267 	struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
268 	u8 def_wep_key_idx;
269 	u8 def_wep_key_newidx;
270 
271 	u16 tx_seq_no;
272 
273 	union {
274 		struct {
275 			u32 uapsd;
276 		} sta;
277 		struct {
278 			/* 127 stations; wmi limit */
279 			u8 tim_bitmap[16];
280 			u8 tim_len;
281 			u32 ssid_len;
282 			u8 ssid[IEEE80211_MAX_SSID_LEN];
283 			bool hidden_ssid;
284 			/* P2P_IE with NoA attribute for P2P_GO case */
285 			u32 noa_len;
286 			u8 *noa_data;
287 		} ap;
288 	} u;
289 
290 	u8 fixed_rate;
291 	u8 fixed_nss;
292 	u8 force_sgi;
293 	bool use_cts_prot;
294 	int num_legacy_stations;
295 	int txpower;
296 };
297 
298 struct ath10k_vif_iter {
299 	u32 vdev_id;
300 	struct ath10k_vif *arvif;
301 };
302 
303 /* used for crash-dump storage, protected by data-lock */
304 struct ath10k_fw_crash_data {
305 	bool crashed_since_read;
306 
307 	uuid_le uuid;
308 	struct timespec timestamp;
309 	__le32 registers[REG_DUMP_COUNT_QCA988X];
310 };
311 
312 struct ath10k_debug {
313 	struct dentry *debugfs_phy;
314 
315 	struct ath10k_fw_stats fw_stats;
316 	struct completion fw_stats_complete;
317 	bool fw_stats_done;
318 
319 	unsigned long htt_stats_mask;
320 	struct delayed_work htt_stats_dwork;
321 	struct ath10k_dfs_stats dfs_stats;
322 	struct ath_dfs_pool_stats dfs_pool_stats;
323 
324 	/* protected by conf_mutex */
325 	u32 fw_dbglog_mask;
326 	u32 pktlog_filter;
327 	u32 reg_addr;
328 
329 	u8 htt_max_amsdu;
330 	u8 htt_max_ampdu;
331 
332 	struct ath10k_fw_crash_data *fw_crash_data;
333 };
334 
335 enum ath10k_state {
336 	ATH10K_STATE_OFF = 0,
337 	ATH10K_STATE_ON,
338 
339 	/* When doing firmware recovery the device is first powered down.
340 	 * mac80211 is supposed to call in to start() hook later on. It is
341 	 * however possible that driver unloading and firmware crash overlap.
342 	 * mac80211 can wait on conf_mutex in stop() while the device is
343 	 * stopped in ath10k_core_restart() work holding conf_mutex. The state
344 	 * RESTARTED means that the device is up and mac80211 has started hw
345 	 * reconfiguration. Once mac80211 is done with the reconfiguration we
346 	 * set the state to STATE_ON in reconfig_complete(). */
347 	ATH10K_STATE_RESTARTING,
348 	ATH10K_STATE_RESTARTED,
349 
350 	/* The device has crashed while restarting hw. This state is like ON
351 	 * but commands are blocked in HTC and -ECOMM response is given. This
352 	 * prevents completion timeouts and makes the driver more responsive to
353 	 * userspace commands. This is also prevents recursive recovery. */
354 	ATH10K_STATE_WEDGED,
355 
356 	/* factory tests */
357 	ATH10K_STATE_UTF,
358 };
359 
360 enum ath10k_firmware_mode {
361 	/* the default mode, standard 802.11 functionality */
362 	ATH10K_FIRMWARE_MODE_NORMAL,
363 
364 	/* factory tests etc */
365 	ATH10K_FIRMWARE_MODE_UTF,
366 };
367 
368 enum ath10k_fw_features {
369 	/* wmi_mgmt_rx_hdr contains extra RSSI information */
370 	ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
371 
372 	/* firmware from 10X branch */
373 	ATH10K_FW_FEATURE_WMI_10X = 1,
374 
375 	/* firmware support tx frame management over WMI, otherwise it's HTT */
376 	ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
377 
378 	/* Firmware does not support P2P */
379 	ATH10K_FW_FEATURE_NO_P2P = 3,
380 
381 	/* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature bit
382 	 * is required to be set as well.
383 	 */
384 	ATH10K_FW_FEATURE_WMI_10_2 = 4,
385 
386 	/* keep last */
387 	ATH10K_FW_FEATURE_COUNT,
388 };
389 
390 enum ath10k_dev_flags {
391 	/* Indicates that ath10k device is during CAC phase of DFS */
392 	ATH10K_CAC_RUNNING,
393 	ATH10K_FLAG_CORE_REGISTERED,
394 
395 	/* Device has crashed and needs to restart. This indicates any pending
396 	 * waiters should immediately cancel instead of waiting for a time out.
397 	 */
398 	ATH10K_FLAG_CRASH_FLUSH,
399 };
400 
401 enum ath10k_cal_mode {
402 	ATH10K_CAL_MODE_FILE,
403 	ATH10K_CAL_MODE_OTP,
404 };
405 
406 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
407 {
408 	switch (mode) {
409 	case ATH10K_CAL_MODE_FILE:
410 		return "file";
411 	case ATH10K_CAL_MODE_OTP:
412 		return "otp";
413 	}
414 
415 	return "unknown";
416 }
417 
418 enum ath10k_scan_state {
419 	ATH10K_SCAN_IDLE,
420 	ATH10K_SCAN_STARTING,
421 	ATH10K_SCAN_RUNNING,
422 	ATH10K_SCAN_ABORTING,
423 };
424 
425 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
426 {
427 	switch (state) {
428 	case ATH10K_SCAN_IDLE:
429 		return "idle";
430 	case ATH10K_SCAN_STARTING:
431 		return "starting";
432 	case ATH10K_SCAN_RUNNING:
433 		return "running";
434 	case ATH10K_SCAN_ABORTING:
435 		return "aborting";
436 	}
437 
438 	return "unknown";
439 }
440 
441 struct ath10k {
442 	struct ath_common ath_common;
443 	struct ieee80211_hw *hw;
444 	struct device *dev;
445 	u8 mac_addr[ETH_ALEN];
446 
447 	u32 chip_id;
448 	u32 target_version;
449 	u8 fw_version_major;
450 	u32 fw_version_minor;
451 	u16 fw_version_release;
452 	u16 fw_version_build;
453 	u32 phy_capability;
454 	u32 hw_min_tx_power;
455 	u32 hw_max_tx_power;
456 	u32 ht_cap_info;
457 	u32 vht_cap_info;
458 	u32 num_rf_chains;
459 
460 	DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
461 
462 	struct targetdef *targetdef;
463 	struct hostdef *hostdef;
464 
465 	bool p2p;
466 
467 	struct {
468 		enum ath10k_bus bus;
469 		const struct ath10k_hif_ops *ops;
470 	} hif;
471 
472 	struct completion target_suspend;
473 
474 	struct ath10k_bmi bmi;
475 	struct ath10k_wmi wmi;
476 	struct ath10k_htc htc;
477 	struct ath10k_htt htt;
478 
479 	struct ath10k_hw_params {
480 		u32 id;
481 		const char *name;
482 		u32 patch_load_addr;
483 
484 		struct ath10k_hw_params_fw {
485 			const char *dir;
486 			const char *fw;
487 			const char *otp;
488 			const char *board;
489 		} fw;
490 	} hw_params;
491 
492 	const struct firmware *board;
493 	const void *board_data;
494 	size_t board_len;
495 
496 	const struct firmware *otp;
497 	const void *otp_data;
498 	size_t otp_len;
499 
500 	const struct firmware *firmware;
501 	const void *firmware_data;
502 	size_t firmware_len;
503 
504 	const struct firmware *cal_file;
505 
506 	int fw_api;
507 	enum ath10k_cal_mode cal_mode;
508 
509 	struct {
510 		struct completion started;
511 		struct completion completed;
512 		struct completion on_channel;
513 		struct delayed_work timeout;
514 		enum ath10k_scan_state state;
515 		bool is_roc;
516 		int vdev_id;
517 		int roc_freq;
518 	} scan;
519 
520 	struct {
521 		struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
522 	} mac;
523 
524 	/* should never be NULL; needed for regular htt rx */
525 	struct ieee80211_channel *rx_channel;
526 
527 	/* valid during scan; needed for mgmt rx during scan */
528 	struct ieee80211_channel *scan_channel;
529 
530 	/* current operating channel definition */
531 	struct cfg80211_chan_def chandef;
532 
533 	unsigned long long free_vdev_map;
534 	bool monitor;
535 	int monitor_vdev_id;
536 	bool monitor_started;
537 	unsigned int filter_flags;
538 	unsigned long dev_flags;
539 	u32 dfs_block_radar_events;
540 
541 	/* protected by conf_mutex */
542 	bool radar_enabled;
543 	int num_started_vdevs;
544 
545 	/* Protected by conf-mutex */
546 	u8 supp_tx_chainmask;
547 	u8 supp_rx_chainmask;
548 	u8 cfg_tx_chainmask;
549 	u8 cfg_rx_chainmask;
550 
551 	struct wmi_pdev_set_wmm_params_arg wmm_params;
552 	struct completion install_key_done;
553 
554 	struct completion vdev_setup_done;
555 
556 	struct workqueue_struct *workqueue;
557 
558 	/* prevents concurrent FW reconfiguration */
559 	struct mutex conf_mutex;
560 
561 	/* protects shared structure data */
562 	spinlock_t data_lock;
563 
564 	struct list_head arvifs;
565 	struct list_head peers;
566 	wait_queue_head_t peer_mapping_wq;
567 
568 	/* protected by conf_mutex */
569 	int num_peers;
570 	int num_stations;
571 
572 	int max_num_peers;
573 	int max_num_stations;
574 
575 	struct work_struct offchan_tx_work;
576 	struct sk_buff_head offchan_tx_queue;
577 	struct completion offchan_tx_completed;
578 	struct sk_buff *offchan_tx_skb;
579 
580 	struct work_struct wmi_mgmt_tx_work;
581 	struct sk_buff_head wmi_mgmt_tx_queue;
582 
583 	enum ath10k_state state;
584 
585 	struct work_struct register_work;
586 	struct work_struct restart_work;
587 
588 	/* cycle count is reported twice for each visited channel during scan.
589 	 * access protected by data_lock */
590 	u32 survey_last_rx_clear_count;
591 	u32 survey_last_cycle_count;
592 	struct survey_info survey[ATH10K_NUM_CHANS];
593 
594 	struct dfs_pattern_detector *dfs_detector;
595 
596 #ifdef CONFIG_ATH10K_DEBUGFS
597 	struct ath10k_debug debug;
598 #endif
599 
600 	struct {
601 		/* relay(fs) channel for spectral scan */
602 		struct rchan *rfs_chan_spec_scan;
603 
604 		/* spectral_mode and spec_config are protected by conf_mutex */
605 		enum ath10k_spectral_mode mode;
606 		struct ath10k_spec_scan config;
607 	} spectral;
608 
609 	struct {
610 		/* protected by conf_mutex */
611 		const struct firmware *utf;
612 		DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT);
613 
614 		/* protected by data_lock */
615 		bool utf_monitor;
616 	} testmode;
617 
618 	struct {
619 		/* protected by data_lock */
620 		u32 fw_crash_counter;
621 		u32 fw_warm_reset_counter;
622 		u32 fw_cold_reset_counter;
623 	} stats;
624 
625 	/* must be last */
626 	u8 drv_priv[0] __aligned(sizeof(void *));
627 };
628 
629 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
630 				  enum ath10k_bus bus,
631 				  const struct ath10k_hif_ops *hif_ops);
632 void ath10k_core_destroy(struct ath10k *ar);
633 
634 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode);
635 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
636 void ath10k_core_stop(struct ath10k *ar);
637 int ath10k_core_register(struct ath10k *ar, u32 chip_id);
638 void ath10k_core_unregister(struct ath10k *ar);
639 
640 #endif /* _CORE_H_ */
641