1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef _CORE_H_ 19 #define _CORE_H_ 20 21 #include <linux/completion.h> 22 #include <linux/if_ether.h> 23 #include <linux/types.h> 24 #include <linux/pci.h> 25 #include <linux/uuid.h> 26 #include <linux/time.h> 27 28 #include "htt.h" 29 #include "htc.h" 30 #include "hw.h" 31 #include "targaddrs.h" 32 #include "wmi.h" 33 #include "../ath.h" 34 #include "../regd.h" 35 #include "../dfs_pattern_detector.h" 36 #include "spectral.h" 37 #include "thermal.h" 38 39 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 40 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 41 #define WO(_f) ((_f##_OFFSET) >> 2) 42 43 #define ATH10K_SCAN_ID 0 44 #define WMI_READY_TIMEOUT (5 * HZ) 45 #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ) 46 #define ATH10K_NUM_CHANS 38 47 48 /* Antenna noise floor */ 49 #define ATH10K_DEFAULT_NOISE_FLOOR -95 50 51 #define ATH10K_MAX_NUM_MGMT_PENDING 128 52 53 /* number of failed packets */ 54 #define ATH10K_KICKOUT_THRESHOLD 50 55 56 /* 57 * Use insanely high numbers to make sure that the firmware implementation 58 * won't start, we have the same functionality already in hostapd. Unit 59 * is seconds. 60 */ 61 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 62 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 63 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 64 65 struct ath10k; 66 67 enum ath10k_bus { 68 ATH10K_BUS_PCI, 69 }; 70 71 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 72 { 73 switch (bus) { 74 case ATH10K_BUS_PCI: 75 return "pci"; 76 } 77 78 return "unknown"; 79 } 80 81 struct ath10k_skb_cb { 82 dma_addr_t paddr; 83 u8 eid; 84 u8 vdev_id; 85 86 struct { 87 u8 tid; 88 u16 freq; 89 bool is_offchan; 90 struct ath10k_htt_txbuf *txbuf; 91 u32 txbuf_paddr; 92 } __packed htt; 93 94 struct { 95 bool dtim_zero; 96 bool deliver_cab; 97 } bcn; 98 } __packed; 99 100 struct ath10k_skb_rxcb { 101 dma_addr_t paddr; 102 struct hlist_node hlist; 103 }; 104 105 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 106 { 107 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 108 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 109 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 110 } 111 112 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 113 { 114 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 115 return (struct ath10k_skb_rxcb *)skb->cb; 116 } 117 118 #define ATH10K_RXCB_SKB(rxcb) \ 119 container_of((void *)rxcb, struct sk_buff, cb) 120 121 static inline u32 host_interest_item_address(u32 item_offset) 122 { 123 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 124 } 125 126 struct ath10k_bmi { 127 bool done_sent; 128 }; 129 130 struct ath10k_mem_chunk { 131 void *vaddr; 132 dma_addr_t paddr; 133 u32 len; 134 u32 req_id; 135 }; 136 137 struct ath10k_wmi { 138 enum ath10k_fw_wmi_op_version op_version; 139 enum ath10k_htc_ep_id eid; 140 struct completion service_ready; 141 struct completion unified_ready; 142 wait_queue_head_t tx_credits_wq; 143 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 144 struct wmi_cmd_map *cmd; 145 struct wmi_vdev_param_map *vdev_param; 146 struct wmi_pdev_param_map *pdev_param; 147 const struct wmi_ops *ops; 148 149 u32 num_mem_chunks; 150 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 151 }; 152 153 struct ath10k_fw_stats_peer { 154 struct list_head list; 155 156 u8 peer_macaddr[ETH_ALEN]; 157 u32 peer_rssi; 158 u32 peer_tx_rate; 159 u32 peer_rx_rate; /* 10x only */ 160 }; 161 162 struct ath10k_fw_stats_pdev { 163 struct list_head list; 164 165 /* PDEV stats */ 166 s32 ch_noise_floor; 167 u32 tx_frame_count; 168 u32 rx_frame_count; 169 u32 rx_clear_count; 170 u32 cycle_count; 171 u32 phy_err_count; 172 u32 chan_tx_power; 173 u32 ack_rx_bad; 174 u32 rts_bad; 175 u32 rts_good; 176 u32 fcs_bad; 177 u32 no_beacons; 178 u32 mib_int_count; 179 180 /* PDEV TX stats */ 181 s32 comp_queued; 182 s32 comp_delivered; 183 s32 msdu_enqued; 184 s32 mpdu_enqued; 185 s32 wmm_drop; 186 s32 local_enqued; 187 s32 local_freed; 188 s32 hw_queued; 189 s32 hw_reaped; 190 s32 underrun; 191 s32 tx_abort; 192 s32 mpdus_requed; 193 u32 tx_ko; 194 u32 data_rc; 195 u32 self_triggers; 196 u32 sw_retry_failure; 197 u32 illgl_rate_phy_err; 198 u32 pdev_cont_xretry; 199 u32 pdev_tx_timeout; 200 u32 pdev_resets; 201 u32 phy_underrun; 202 u32 txop_ovf; 203 204 /* PDEV RX stats */ 205 s32 mid_ppdu_route_change; 206 s32 status_rcvd; 207 s32 r0_frags; 208 s32 r1_frags; 209 s32 r2_frags; 210 s32 r3_frags; 211 s32 htt_msdus; 212 s32 htt_mpdus; 213 s32 loc_msdus; 214 s32 loc_mpdus; 215 s32 oversize_amsdu; 216 s32 phy_errs; 217 s32 phy_err_drop; 218 s32 mpdu_errs; 219 }; 220 221 struct ath10k_fw_stats { 222 struct list_head pdevs; 223 struct list_head peers; 224 }; 225 226 struct ath10k_dfs_stats { 227 u32 phy_errors; 228 u32 pulses_total; 229 u32 pulses_detected; 230 u32 pulses_discarded; 231 u32 radar_detected; 232 }; 233 234 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 235 236 struct ath10k_peer { 237 struct list_head list; 238 int vdev_id; 239 u8 addr[ETH_ALEN]; 240 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 241 242 /* protected by ar->data_lock */ 243 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 244 }; 245 246 struct ath10k_sta { 247 struct ath10k_vif *arvif; 248 249 /* the following are protected by ar->data_lock */ 250 u32 changed; /* IEEE80211_RC_* */ 251 u32 bw; 252 u32 nss; 253 u32 smps; 254 255 struct work_struct update_wk; 256 257 #ifdef CONFIG_MAC80211_DEBUGFS 258 /* protected by conf_mutex */ 259 bool aggr_mode; 260 #endif 261 }; 262 263 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ) 264 265 enum ath10k_beacon_state { 266 ATH10K_BEACON_SCHEDULED = 0, 267 ATH10K_BEACON_SENDING, 268 ATH10K_BEACON_SENT, 269 }; 270 271 struct ath10k_vif { 272 struct list_head list; 273 274 u32 vdev_id; 275 enum wmi_vdev_type vdev_type; 276 enum wmi_vdev_subtype vdev_subtype; 277 u32 beacon_interval; 278 u32 dtim_period; 279 struct sk_buff *beacon; 280 /* protected by data_lock */ 281 enum ath10k_beacon_state beacon_state; 282 void *beacon_buf; 283 dma_addr_t beacon_paddr; 284 285 struct ath10k *ar; 286 struct ieee80211_vif *vif; 287 288 bool is_started; 289 bool is_up; 290 bool spectral_enabled; 291 u32 aid; 292 u8 bssid[ETH_ALEN]; 293 294 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 295 s8 def_wep_key_idx; 296 297 u16 tx_seq_no; 298 299 union { 300 struct { 301 u32 uapsd; 302 } sta; 303 struct { 304 /* 127 stations; wmi limit */ 305 u8 tim_bitmap[16]; 306 u8 tim_len; 307 u32 ssid_len; 308 u8 ssid[IEEE80211_MAX_SSID_LEN]; 309 bool hidden_ssid; 310 /* P2P_IE with NoA attribute for P2P_GO case */ 311 u32 noa_len; 312 u8 *noa_data; 313 } ap; 314 } u; 315 316 u8 fixed_rate; 317 u8 fixed_nss; 318 u8 force_sgi; 319 bool use_cts_prot; 320 int num_legacy_stations; 321 int txpower; 322 struct wmi_wmm_params_all_arg wmm_params; 323 }; 324 325 struct ath10k_vif_iter { 326 u32 vdev_id; 327 struct ath10k_vif *arvif; 328 }; 329 330 /* used for crash-dump storage, protected by data-lock */ 331 struct ath10k_fw_crash_data { 332 bool crashed_since_read; 333 334 uuid_le uuid; 335 struct timespec timestamp; 336 __le32 registers[REG_DUMP_COUNT_QCA988X]; 337 }; 338 339 struct ath10k_debug { 340 struct dentry *debugfs_phy; 341 342 struct ath10k_fw_stats fw_stats; 343 struct completion fw_stats_complete; 344 bool fw_stats_done; 345 346 unsigned long htt_stats_mask; 347 struct delayed_work htt_stats_dwork; 348 struct ath10k_dfs_stats dfs_stats; 349 struct ath_dfs_pool_stats dfs_pool_stats; 350 351 /* protected by conf_mutex */ 352 u32 fw_dbglog_mask; 353 u32 fw_dbglog_level; 354 u32 pktlog_filter; 355 u32 reg_addr; 356 u32 nf_cal_period; 357 358 u8 htt_max_amsdu; 359 u8 htt_max_ampdu; 360 361 struct ath10k_fw_crash_data *fw_crash_data; 362 }; 363 364 enum ath10k_state { 365 ATH10K_STATE_OFF = 0, 366 ATH10K_STATE_ON, 367 368 /* When doing firmware recovery the device is first powered down. 369 * mac80211 is supposed to call in to start() hook later on. It is 370 * however possible that driver unloading and firmware crash overlap. 371 * mac80211 can wait on conf_mutex in stop() while the device is 372 * stopped in ath10k_core_restart() work holding conf_mutex. The state 373 * RESTARTED means that the device is up and mac80211 has started hw 374 * reconfiguration. Once mac80211 is done with the reconfiguration we 375 * set the state to STATE_ON in reconfig_complete(). */ 376 ATH10K_STATE_RESTARTING, 377 ATH10K_STATE_RESTARTED, 378 379 /* The device has crashed while restarting hw. This state is like ON 380 * but commands are blocked in HTC and -ECOMM response is given. This 381 * prevents completion timeouts and makes the driver more responsive to 382 * userspace commands. This is also prevents recursive recovery. */ 383 ATH10K_STATE_WEDGED, 384 385 /* factory tests */ 386 ATH10K_STATE_UTF, 387 }; 388 389 enum ath10k_firmware_mode { 390 /* the default mode, standard 802.11 functionality */ 391 ATH10K_FIRMWARE_MODE_NORMAL, 392 393 /* factory tests etc */ 394 ATH10K_FIRMWARE_MODE_UTF, 395 }; 396 397 enum ath10k_fw_features { 398 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 399 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 400 401 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 402 ATH10K_FW_FEATURE_WMI_10X = 1, 403 404 /* firmware support tx frame management over WMI, otherwise it's HTT */ 405 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 406 407 /* Firmware does not support P2P */ 408 ATH10K_FW_FEATURE_NO_P2P = 3, 409 410 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 411 * bit is required to be set as well. Deprecated, don't use in new 412 * code. 413 */ 414 ATH10K_FW_FEATURE_WMI_10_2 = 4, 415 416 /* keep last */ 417 ATH10K_FW_FEATURE_COUNT, 418 }; 419 420 enum ath10k_dev_flags { 421 /* Indicates that ath10k device is during CAC phase of DFS */ 422 ATH10K_CAC_RUNNING, 423 ATH10K_FLAG_CORE_REGISTERED, 424 425 /* Device has crashed and needs to restart. This indicates any pending 426 * waiters should immediately cancel instead of waiting for a time out. 427 */ 428 ATH10K_FLAG_CRASH_FLUSH, 429 }; 430 431 enum ath10k_cal_mode { 432 ATH10K_CAL_MODE_FILE, 433 ATH10K_CAL_MODE_OTP, 434 ATH10K_CAL_MODE_DT, 435 }; 436 437 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 438 { 439 switch (mode) { 440 case ATH10K_CAL_MODE_FILE: 441 return "file"; 442 case ATH10K_CAL_MODE_OTP: 443 return "otp"; 444 case ATH10K_CAL_MODE_DT: 445 return "dt"; 446 } 447 448 return "unknown"; 449 } 450 451 enum ath10k_scan_state { 452 ATH10K_SCAN_IDLE, 453 ATH10K_SCAN_STARTING, 454 ATH10K_SCAN_RUNNING, 455 ATH10K_SCAN_ABORTING, 456 }; 457 458 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 459 { 460 switch (state) { 461 case ATH10K_SCAN_IDLE: 462 return "idle"; 463 case ATH10K_SCAN_STARTING: 464 return "starting"; 465 case ATH10K_SCAN_RUNNING: 466 return "running"; 467 case ATH10K_SCAN_ABORTING: 468 return "aborting"; 469 } 470 471 return "unknown"; 472 } 473 474 struct ath10k { 475 struct ath_common ath_common; 476 struct ieee80211_hw *hw; 477 struct device *dev; 478 u8 mac_addr[ETH_ALEN]; 479 480 enum ath10k_hw_rev hw_rev; 481 u32 chip_id; 482 u32 target_version; 483 u8 fw_version_major; 484 u32 fw_version_minor; 485 u16 fw_version_release; 486 u16 fw_version_build; 487 u32 phy_capability; 488 u32 hw_min_tx_power; 489 u32 hw_max_tx_power; 490 u32 ht_cap_info; 491 u32 vht_cap_info; 492 u32 num_rf_chains; 493 494 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 495 496 bool p2p; 497 498 struct { 499 enum ath10k_bus bus; 500 const struct ath10k_hif_ops *ops; 501 } hif; 502 503 struct completion target_suspend; 504 505 const struct ath10k_hw_regs *regs; 506 struct ath10k_bmi bmi; 507 struct ath10k_wmi wmi; 508 struct ath10k_htc htc; 509 struct ath10k_htt htt; 510 511 struct ath10k_hw_params { 512 u32 id; 513 const char *name; 514 u32 patch_load_addr; 515 int uart_pin; 516 517 struct ath10k_hw_params_fw { 518 const char *dir; 519 const char *fw; 520 const char *otp; 521 const char *board; 522 size_t board_size; 523 size_t board_ext_size; 524 } fw; 525 } hw_params; 526 527 const struct firmware *board; 528 const void *board_data; 529 size_t board_len; 530 531 const struct firmware *otp; 532 const void *otp_data; 533 size_t otp_len; 534 535 const struct firmware *firmware; 536 const void *firmware_data; 537 size_t firmware_len; 538 539 const struct firmware *cal_file; 540 541 int fw_api; 542 enum ath10k_cal_mode cal_mode; 543 544 struct { 545 struct completion started; 546 struct completion completed; 547 struct completion on_channel; 548 struct delayed_work timeout; 549 enum ath10k_scan_state state; 550 bool is_roc; 551 int vdev_id; 552 int roc_freq; 553 } scan; 554 555 struct { 556 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 557 } mac; 558 559 /* should never be NULL; needed for regular htt rx */ 560 struct ieee80211_channel *rx_channel; 561 562 /* valid during scan; needed for mgmt rx during scan */ 563 struct ieee80211_channel *scan_channel; 564 565 /* current operating channel definition */ 566 struct cfg80211_chan_def chandef; 567 568 unsigned long long free_vdev_map; 569 bool monitor; 570 int monitor_vdev_id; 571 bool monitor_started; 572 unsigned int filter_flags; 573 unsigned long dev_flags; 574 u32 dfs_block_radar_events; 575 576 /* protected by conf_mutex */ 577 bool radar_enabled; 578 int num_started_vdevs; 579 580 /* Protected by conf-mutex */ 581 u8 supp_tx_chainmask; 582 u8 supp_rx_chainmask; 583 u8 cfg_tx_chainmask; 584 u8 cfg_rx_chainmask; 585 586 struct completion install_key_done; 587 588 struct completion vdev_setup_done; 589 590 struct workqueue_struct *workqueue; 591 592 /* prevents concurrent FW reconfiguration */ 593 struct mutex conf_mutex; 594 595 /* protects shared structure data */ 596 spinlock_t data_lock; 597 598 struct list_head arvifs; 599 struct list_head peers; 600 wait_queue_head_t peer_mapping_wq; 601 602 /* protected by conf_mutex */ 603 int num_peers; 604 int num_stations; 605 606 int max_num_peers; 607 int max_num_stations; 608 int max_num_vdevs; 609 610 struct work_struct offchan_tx_work; 611 struct sk_buff_head offchan_tx_queue; 612 struct completion offchan_tx_completed; 613 struct sk_buff *offchan_tx_skb; 614 615 struct work_struct wmi_mgmt_tx_work; 616 struct sk_buff_head wmi_mgmt_tx_queue; 617 618 enum ath10k_state state; 619 620 struct work_struct register_work; 621 struct work_struct restart_work; 622 623 /* cycle count is reported twice for each visited channel during scan. 624 * access protected by data_lock */ 625 u32 survey_last_rx_clear_count; 626 u32 survey_last_cycle_count; 627 struct survey_info survey[ATH10K_NUM_CHANS]; 628 629 struct dfs_pattern_detector *dfs_detector; 630 631 #ifdef CONFIG_ATH10K_DEBUGFS 632 struct ath10k_debug debug; 633 #endif 634 635 struct { 636 /* relay(fs) channel for spectral scan */ 637 struct rchan *rfs_chan_spec_scan; 638 639 /* spectral_mode and spec_config are protected by conf_mutex */ 640 enum ath10k_spectral_mode mode; 641 struct ath10k_spec_scan config; 642 } spectral; 643 644 struct { 645 /* protected by conf_mutex */ 646 const struct firmware *utf; 647 DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT); 648 enum ath10k_fw_wmi_op_version orig_wmi_op_version; 649 650 /* protected by data_lock */ 651 bool utf_monitor; 652 } testmode; 653 654 struct { 655 /* protected by data_lock */ 656 u32 fw_crash_counter; 657 u32 fw_warm_reset_counter; 658 u32 fw_cold_reset_counter; 659 } stats; 660 661 struct ath10k_thermal thermal; 662 663 /* must be last */ 664 u8 drv_priv[0] __aligned(sizeof(void *)); 665 }; 666 667 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 668 enum ath10k_bus bus, 669 enum ath10k_hw_rev hw_rev, 670 const struct ath10k_hif_ops *hif_ops); 671 void ath10k_core_destroy(struct ath10k *ar); 672 673 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode); 674 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 675 void ath10k_core_stop(struct ath10k *ar); 676 int ath10k_core_register(struct ath10k *ar, u32 chip_id); 677 void ath10k_core_unregister(struct ath10k *ar); 678 679 #endif /* _CORE_H_ */ 680