1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef _CORE_H_ 19 #define _CORE_H_ 20 21 #include <linux/completion.h> 22 #include <linux/if_ether.h> 23 #include <linux/types.h> 24 #include <linux/pci.h> 25 26 #include "htt.h" 27 #include "htc.h" 28 #include "hw.h" 29 #include "targaddrs.h" 30 #include "wmi.h" 31 #include "../ath.h" 32 #include "../regd.h" 33 #include "../dfs_pattern_detector.h" 34 35 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 36 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 37 #define WO(_f) ((_f##_OFFSET) >> 2) 38 39 #define ATH10K_SCAN_ID 0 40 #define WMI_READY_TIMEOUT (5 * HZ) 41 #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ) 42 #define ATH10K_NUM_CHANS 38 43 44 /* Antenna noise floor */ 45 #define ATH10K_DEFAULT_NOISE_FLOOR -95 46 47 #define ATH10K_MAX_NUM_MGMT_PENDING 128 48 49 /* number of failed packets */ 50 #define ATH10K_KICKOUT_THRESHOLD 50 51 52 /* 53 * Use insanely high numbers to make sure that the firmware implementation 54 * won't start, we have the same functionality already in hostapd. Unit 55 * is seconds. 56 */ 57 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 58 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 59 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 60 61 struct ath10k; 62 63 struct ath10k_skb_cb { 64 dma_addr_t paddr; 65 u8 vdev_id; 66 67 struct { 68 u8 tid; 69 bool is_offchan; 70 struct ath10k_htt_txbuf *txbuf; 71 u32 txbuf_paddr; 72 } __packed htt; 73 74 struct { 75 bool dtim_zero; 76 bool deliver_cab; 77 } bcn; 78 } __packed; 79 80 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 81 { 82 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 83 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 84 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 85 } 86 87 static inline u32 host_interest_item_address(u32 item_offset) 88 { 89 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 90 } 91 92 struct ath10k_bmi { 93 bool done_sent; 94 }; 95 96 #define ATH10K_MAX_MEM_REQS 16 97 98 struct ath10k_mem_chunk { 99 void *vaddr; 100 dma_addr_t paddr; 101 u32 len; 102 u32 req_id; 103 }; 104 105 struct ath10k_wmi { 106 enum ath10k_htc_ep_id eid; 107 struct completion service_ready; 108 struct completion unified_ready; 109 wait_queue_head_t tx_credits_wq; 110 struct wmi_cmd_map *cmd; 111 struct wmi_vdev_param_map *vdev_param; 112 struct wmi_pdev_param_map *pdev_param; 113 114 u32 num_mem_chunks; 115 struct ath10k_mem_chunk mem_chunks[ATH10K_MAX_MEM_REQS]; 116 }; 117 118 struct ath10k_peer_stat { 119 u8 peer_macaddr[ETH_ALEN]; 120 u32 peer_rssi; 121 u32 peer_tx_rate; 122 u32 peer_rx_rate; /* 10x only */ 123 }; 124 125 struct ath10k_target_stats { 126 /* PDEV stats */ 127 s32 ch_noise_floor; 128 u32 tx_frame_count; 129 u32 rx_frame_count; 130 u32 rx_clear_count; 131 u32 cycle_count; 132 u32 phy_err_count; 133 u32 chan_tx_power; 134 u32 ack_rx_bad; 135 u32 rts_bad; 136 u32 rts_good; 137 u32 fcs_bad; 138 u32 no_beacons; 139 u32 mib_int_count; 140 141 /* PDEV TX stats */ 142 s32 comp_queued; 143 s32 comp_delivered; 144 s32 msdu_enqued; 145 s32 mpdu_enqued; 146 s32 wmm_drop; 147 s32 local_enqued; 148 s32 local_freed; 149 s32 hw_queued; 150 s32 hw_reaped; 151 s32 underrun; 152 s32 tx_abort; 153 s32 mpdus_requed; 154 u32 tx_ko; 155 u32 data_rc; 156 u32 self_triggers; 157 u32 sw_retry_failure; 158 u32 illgl_rate_phy_err; 159 u32 pdev_cont_xretry; 160 u32 pdev_tx_timeout; 161 u32 pdev_resets; 162 u32 phy_underrun; 163 u32 txop_ovf; 164 165 /* PDEV RX stats */ 166 s32 mid_ppdu_route_change; 167 s32 status_rcvd; 168 s32 r0_frags; 169 s32 r1_frags; 170 s32 r2_frags; 171 s32 r3_frags; 172 s32 htt_msdus; 173 s32 htt_mpdus; 174 s32 loc_msdus; 175 s32 loc_mpdus; 176 s32 oversize_amsdu; 177 s32 phy_errs; 178 s32 phy_err_drop; 179 s32 mpdu_errs; 180 181 /* VDEV STATS */ 182 183 /* PEER STATS */ 184 u8 peers; 185 struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS]; 186 187 /* TODO: Beacon filter stats */ 188 189 }; 190 191 struct ath10k_dfs_stats { 192 u32 phy_errors; 193 u32 pulses_total; 194 u32 pulses_detected; 195 u32 pulses_discarded; 196 u32 radar_detected; 197 }; 198 199 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 200 201 struct ath10k_peer { 202 struct list_head list; 203 int vdev_id; 204 u8 addr[ETH_ALEN]; 205 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 206 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 207 }; 208 209 struct ath10k_sta { 210 struct ath10k_vif *arvif; 211 212 /* the following are protected by ar->data_lock */ 213 u32 changed; /* IEEE80211_RC_* */ 214 u32 bw; 215 u32 nss; 216 u32 smps; 217 218 struct work_struct update_wk; 219 }; 220 221 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ) 222 223 struct ath10k_vif { 224 struct list_head list; 225 226 u32 vdev_id; 227 enum wmi_vdev_type vdev_type; 228 enum wmi_vdev_subtype vdev_subtype; 229 u32 beacon_interval; 230 u32 dtim_period; 231 struct sk_buff *beacon; 232 /* protected by data_lock */ 233 bool beacon_sent; 234 235 struct ath10k *ar; 236 struct ieee80211_vif *vif; 237 238 bool is_started; 239 bool is_up; 240 u32 aid; 241 u8 bssid[ETH_ALEN]; 242 243 struct work_struct wep_key_work; 244 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 245 u8 def_wep_key_idx; 246 u8 def_wep_key_newidx; 247 248 u16 tx_seq_no; 249 250 union { 251 struct { 252 u32 uapsd; 253 } sta; 254 struct { 255 /* 127 stations; wmi limit */ 256 u8 tim_bitmap[16]; 257 u8 tim_len; 258 u32 ssid_len; 259 u8 ssid[IEEE80211_MAX_SSID_LEN]; 260 bool hidden_ssid; 261 /* P2P_IE with NoA attribute for P2P_GO case */ 262 u32 noa_len; 263 u8 *noa_data; 264 } ap; 265 } u; 266 267 u8 fixed_rate; 268 u8 fixed_nss; 269 u8 force_sgi; 270 bool use_cts_prot; 271 int num_legacy_stations; 272 }; 273 274 struct ath10k_vif_iter { 275 u32 vdev_id; 276 struct ath10k_vif *arvif; 277 }; 278 279 struct ath10k_debug { 280 struct dentry *debugfs_phy; 281 282 struct ath10k_target_stats target_stats; 283 u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE]; 284 285 struct completion event_stats_compl; 286 287 unsigned long htt_stats_mask; 288 struct delayed_work htt_stats_dwork; 289 struct ath10k_dfs_stats dfs_stats; 290 struct ath_dfs_pool_stats dfs_pool_stats; 291 292 u32 fw_dbglog_mask; 293 }; 294 295 enum ath10k_state { 296 ATH10K_STATE_OFF = 0, 297 ATH10K_STATE_ON, 298 299 /* When doing firmware recovery the device is first powered down. 300 * mac80211 is supposed to call in to start() hook later on. It is 301 * however possible that driver unloading and firmware crash overlap. 302 * mac80211 can wait on conf_mutex in stop() while the device is 303 * stopped in ath10k_core_restart() work holding conf_mutex. The state 304 * RESTARTED means that the device is up and mac80211 has started hw 305 * reconfiguration. Once mac80211 is done with the reconfiguration we 306 * set the state to STATE_ON in restart_complete(). */ 307 ATH10K_STATE_RESTARTING, 308 ATH10K_STATE_RESTARTED, 309 310 /* The device has crashed while restarting hw. This state is like ON 311 * but commands are blocked in HTC and -ECOMM response is given. This 312 * prevents completion timeouts and makes the driver more responsive to 313 * userspace commands. This is also prevents recursive recovery. */ 314 ATH10K_STATE_WEDGED, 315 }; 316 317 enum ath10k_fw_features { 318 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 319 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 320 321 /* firmware from 10X branch */ 322 ATH10K_FW_FEATURE_WMI_10X = 1, 323 324 /* firmware support tx frame management over WMI, otherwise it's HTT */ 325 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 326 327 /* Firmware does not support P2P */ 328 ATH10K_FW_FEATURE_NO_P2P = 3, 329 330 /* keep last */ 331 ATH10K_FW_FEATURE_COUNT, 332 }; 333 334 enum ath10k_dev_flags { 335 /* Indicates that ath10k device is during CAC phase of DFS */ 336 ATH10K_CAC_RUNNING, 337 ATH10K_FLAG_FIRST_BOOT_DONE, 338 ATH10K_FLAG_CORE_REGISTERED, 339 }; 340 341 struct ath10k { 342 struct ath_common ath_common; 343 struct ieee80211_hw *hw; 344 struct device *dev; 345 u8 mac_addr[ETH_ALEN]; 346 347 u32 chip_id; 348 u32 target_version; 349 u8 fw_version_major; 350 u32 fw_version_minor; 351 u16 fw_version_release; 352 u16 fw_version_build; 353 u32 phy_capability; 354 u32 hw_min_tx_power; 355 u32 hw_max_tx_power; 356 u32 ht_cap_info; 357 u32 vht_cap_info; 358 u32 num_rf_chains; 359 360 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 361 362 struct targetdef *targetdef; 363 struct hostdef *hostdef; 364 365 bool p2p; 366 367 struct { 368 void *priv; 369 const struct ath10k_hif_ops *ops; 370 } hif; 371 372 struct completion target_suspend; 373 374 struct ath10k_bmi bmi; 375 struct ath10k_wmi wmi; 376 struct ath10k_htc htc; 377 struct ath10k_htt htt; 378 379 struct ath10k_hw_params { 380 u32 id; 381 const char *name; 382 u32 patch_load_addr; 383 384 struct ath10k_hw_params_fw { 385 const char *dir; 386 const char *fw; 387 const char *otp; 388 const char *board; 389 } fw; 390 } hw_params; 391 392 const struct firmware *board; 393 const void *board_data; 394 size_t board_len; 395 396 const struct firmware *otp; 397 const void *otp_data; 398 size_t otp_len; 399 400 const struct firmware *firmware; 401 const void *firmware_data; 402 size_t firmware_len; 403 404 int fw_api; 405 406 struct { 407 struct completion started; 408 struct completion completed; 409 struct completion on_channel; 410 struct timer_list timeout; 411 bool is_roc; 412 bool in_progress; 413 bool aborting; 414 int vdev_id; 415 int roc_freq; 416 } scan; 417 418 struct { 419 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 420 } mac; 421 422 /* should never be NULL; needed for regular htt rx */ 423 struct ieee80211_channel *rx_channel; 424 425 /* valid during scan; needed for mgmt rx during scan */ 426 struct ieee80211_channel *scan_channel; 427 428 /* current operating channel definition */ 429 struct cfg80211_chan_def chandef; 430 431 int free_vdev_map; 432 bool promisc; 433 bool monitor; 434 int monitor_vdev_id; 435 bool monitor_started; 436 unsigned int filter_flags; 437 unsigned long dev_flags; 438 u32 dfs_block_radar_events; 439 440 /* protected by conf_mutex */ 441 bool radar_enabled; 442 int num_started_vdevs; 443 444 /* Protected by conf-mutex */ 445 u8 supp_tx_chainmask; 446 u8 supp_rx_chainmask; 447 u8 cfg_tx_chainmask; 448 u8 cfg_rx_chainmask; 449 450 struct wmi_pdev_set_wmm_params_arg wmm_params; 451 struct completion install_key_done; 452 453 struct completion vdev_setup_done; 454 455 struct workqueue_struct *workqueue; 456 457 /* prevents concurrent FW reconfiguration */ 458 struct mutex conf_mutex; 459 460 /* protects shared structure data */ 461 spinlock_t data_lock; 462 463 struct list_head arvifs; 464 struct list_head peers; 465 wait_queue_head_t peer_mapping_wq; 466 467 /* number of created peers; protected by data_lock */ 468 int num_peers; 469 470 struct work_struct offchan_tx_work; 471 struct sk_buff_head offchan_tx_queue; 472 struct completion offchan_tx_completed; 473 struct sk_buff *offchan_tx_skb; 474 475 struct work_struct wmi_mgmt_tx_work; 476 struct sk_buff_head wmi_mgmt_tx_queue; 477 478 enum ath10k_state state; 479 480 struct work_struct register_work; 481 struct work_struct restart_work; 482 483 /* cycle count is reported twice for each visited channel during scan. 484 * access protected by data_lock */ 485 u32 survey_last_rx_clear_count; 486 u32 survey_last_cycle_count; 487 struct survey_info survey[ATH10K_NUM_CHANS]; 488 489 struct dfs_pattern_detector *dfs_detector; 490 491 #ifdef CONFIG_ATH10K_DEBUGFS 492 struct ath10k_debug debug; 493 #endif 494 }; 495 496 struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev, 497 const struct ath10k_hif_ops *hif_ops); 498 void ath10k_core_destroy(struct ath10k *ar); 499 500 int ath10k_core_start(struct ath10k *ar); 501 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 502 void ath10k_core_stop(struct ath10k *ar); 503 int ath10k_core_register(struct ath10k *ar, u32 chip_id); 504 void ath10k_core_unregister(struct ath10k *ar); 505 506 #endif /* _CORE_H_ */ 507