1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef _CORE_H_ 19 #define _CORE_H_ 20 21 #include <linux/completion.h> 22 #include <linux/if_ether.h> 23 #include <linux/types.h> 24 #include <linux/pci.h> 25 #include <linux/uuid.h> 26 #include <linux/time.h> 27 28 #include "htt.h" 29 #include "htc.h" 30 #include "hw.h" 31 #include "targaddrs.h" 32 #include "wmi.h" 33 #include "../ath.h" 34 #include "../regd.h" 35 #include "../dfs_pattern_detector.h" 36 #include "spectral.h" 37 #include "thermal.h" 38 #include "wow.h" 39 #include "swap.h" 40 41 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 42 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 43 #define WO(_f) ((_f##_OFFSET) >> 2) 44 45 #define ATH10K_SCAN_ID 0 46 #define WMI_READY_TIMEOUT (5 * HZ) 47 #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ) 48 #define ATH10K_CONNECTION_LOSS_HZ (3*HZ) 49 #define ATH10K_NUM_CHANS 39 50 51 /* Antenna noise floor */ 52 #define ATH10K_DEFAULT_NOISE_FLOOR -95 53 54 #define ATH10K_MAX_NUM_MGMT_PENDING 128 55 56 /* number of failed packets (20 packets with 16 sw reties each) */ 57 #define ATH10K_KICKOUT_THRESHOLD (20 * 16) 58 59 /* 60 * Use insanely high numbers to make sure that the firmware implementation 61 * won't start, we have the same functionality already in hostapd. Unit 62 * is seconds. 63 */ 64 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 65 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 66 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 67 68 struct ath10k; 69 70 enum ath10k_bus { 71 ATH10K_BUS_PCI, 72 }; 73 74 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 75 { 76 switch (bus) { 77 case ATH10K_BUS_PCI: 78 return "pci"; 79 } 80 81 return "unknown"; 82 } 83 84 struct ath10k_skb_cb { 85 dma_addr_t paddr; 86 u8 eid; 87 u8 vdev_id; 88 enum ath10k_hw_txrx_mode txmode; 89 bool is_protected; 90 91 struct { 92 u8 tid; 93 u16 freq; 94 bool is_offchan; 95 struct ath10k_htt_txbuf *txbuf; 96 u32 txbuf_paddr; 97 } __packed htt; 98 99 struct { 100 bool dtim_zero; 101 bool deliver_cab; 102 } bcn; 103 } __packed; 104 105 struct ath10k_skb_rxcb { 106 dma_addr_t paddr; 107 struct hlist_node hlist; 108 }; 109 110 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 111 { 112 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 113 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 114 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 115 } 116 117 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 118 { 119 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 120 return (struct ath10k_skb_rxcb *)skb->cb; 121 } 122 123 #define ATH10K_RXCB_SKB(rxcb) \ 124 container_of((void *)rxcb, struct sk_buff, cb) 125 126 static inline u32 host_interest_item_address(u32 item_offset) 127 { 128 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 129 } 130 131 struct ath10k_bmi { 132 bool done_sent; 133 }; 134 135 struct ath10k_mem_chunk { 136 void *vaddr; 137 dma_addr_t paddr; 138 u32 len; 139 u32 req_id; 140 }; 141 142 struct ath10k_wmi { 143 enum ath10k_fw_wmi_op_version op_version; 144 enum ath10k_htc_ep_id eid; 145 struct completion service_ready; 146 struct completion unified_ready; 147 wait_queue_head_t tx_credits_wq; 148 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 149 struct wmi_cmd_map *cmd; 150 struct wmi_vdev_param_map *vdev_param; 151 struct wmi_pdev_param_map *pdev_param; 152 const struct wmi_ops *ops; 153 154 u32 num_mem_chunks; 155 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 156 }; 157 158 struct ath10k_fw_stats_peer { 159 struct list_head list; 160 161 u8 peer_macaddr[ETH_ALEN]; 162 u32 peer_rssi; 163 u32 peer_tx_rate; 164 u32 peer_rx_rate; /* 10x only */ 165 }; 166 167 struct ath10k_fw_stats_vdev { 168 struct list_head list; 169 170 u32 vdev_id; 171 u32 beacon_snr; 172 u32 data_snr; 173 u32 num_tx_frames[4]; 174 u32 num_rx_frames; 175 u32 num_tx_frames_retries[4]; 176 u32 num_tx_frames_failures[4]; 177 u32 num_rts_fail; 178 u32 num_rts_success; 179 u32 num_rx_err; 180 u32 num_rx_discard; 181 u32 num_tx_not_acked; 182 u32 tx_rate_history[10]; 183 u32 beacon_rssi_history[10]; 184 }; 185 186 struct ath10k_fw_stats_pdev { 187 struct list_head list; 188 189 /* PDEV stats */ 190 s32 ch_noise_floor; 191 u32 tx_frame_count; 192 u32 rx_frame_count; 193 u32 rx_clear_count; 194 u32 cycle_count; 195 u32 phy_err_count; 196 u32 chan_tx_power; 197 u32 ack_rx_bad; 198 u32 rts_bad; 199 u32 rts_good; 200 u32 fcs_bad; 201 u32 no_beacons; 202 u32 mib_int_count; 203 204 /* PDEV TX stats */ 205 s32 comp_queued; 206 s32 comp_delivered; 207 s32 msdu_enqued; 208 s32 mpdu_enqued; 209 s32 wmm_drop; 210 s32 local_enqued; 211 s32 local_freed; 212 s32 hw_queued; 213 s32 hw_reaped; 214 s32 underrun; 215 s32 tx_abort; 216 s32 mpdus_requed; 217 u32 tx_ko; 218 u32 data_rc; 219 u32 self_triggers; 220 u32 sw_retry_failure; 221 u32 illgl_rate_phy_err; 222 u32 pdev_cont_xretry; 223 u32 pdev_tx_timeout; 224 u32 pdev_resets; 225 u32 phy_underrun; 226 u32 txop_ovf; 227 228 /* PDEV RX stats */ 229 s32 mid_ppdu_route_change; 230 s32 status_rcvd; 231 s32 r0_frags; 232 s32 r1_frags; 233 s32 r2_frags; 234 s32 r3_frags; 235 s32 htt_msdus; 236 s32 htt_mpdus; 237 s32 loc_msdus; 238 s32 loc_mpdus; 239 s32 oversize_amsdu; 240 s32 phy_errs; 241 s32 phy_err_drop; 242 s32 mpdu_errs; 243 }; 244 245 struct ath10k_fw_stats { 246 struct list_head pdevs; 247 struct list_head vdevs; 248 struct list_head peers; 249 }; 250 251 struct ath10k_dfs_stats { 252 u32 phy_errors; 253 u32 pulses_total; 254 u32 pulses_detected; 255 u32 pulses_discarded; 256 u32 radar_detected; 257 }; 258 259 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 260 261 struct ath10k_peer { 262 struct list_head list; 263 int vdev_id; 264 u8 addr[ETH_ALEN]; 265 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 266 267 /* protected by ar->data_lock */ 268 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 269 }; 270 271 struct ath10k_sta { 272 struct ath10k_vif *arvif; 273 274 /* the following are protected by ar->data_lock */ 275 u32 changed; /* IEEE80211_RC_* */ 276 u32 bw; 277 u32 nss; 278 u32 smps; 279 280 struct work_struct update_wk; 281 282 #ifdef CONFIG_MAC80211_DEBUGFS 283 /* protected by conf_mutex */ 284 bool aggr_mode; 285 #endif 286 }; 287 288 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ) 289 290 enum ath10k_beacon_state { 291 ATH10K_BEACON_SCHEDULED = 0, 292 ATH10K_BEACON_SENDING, 293 ATH10K_BEACON_SENT, 294 }; 295 296 struct ath10k_vif { 297 struct list_head list; 298 299 u32 vdev_id; 300 enum wmi_vdev_type vdev_type; 301 enum wmi_vdev_subtype vdev_subtype; 302 u32 beacon_interval; 303 u32 dtim_period; 304 struct sk_buff *beacon; 305 /* protected by data_lock */ 306 enum ath10k_beacon_state beacon_state; 307 void *beacon_buf; 308 dma_addr_t beacon_paddr; 309 unsigned long tx_paused; /* arbitrary values defined by target */ 310 311 struct ath10k *ar; 312 struct ieee80211_vif *vif; 313 314 bool is_started; 315 bool is_up; 316 bool spectral_enabled; 317 bool ps; 318 u32 aid; 319 u8 bssid[ETH_ALEN]; 320 321 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 322 s8 def_wep_key_idx; 323 324 u16 tx_seq_no; 325 326 union { 327 struct { 328 u32 uapsd; 329 } sta; 330 struct { 331 /* 512 stations */ 332 u8 tim_bitmap[64]; 333 u8 tim_len; 334 u32 ssid_len; 335 u8 ssid[IEEE80211_MAX_SSID_LEN]; 336 bool hidden_ssid; 337 /* P2P_IE with NoA attribute for P2P_GO case */ 338 u32 noa_len; 339 u8 *noa_data; 340 } ap; 341 } u; 342 343 bool use_cts_prot; 344 int num_legacy_stations; 345 int txpower; 346 struct wmi_wmm_params_all_arg wmm_params; 347 struct work_struct ap_csa_work; 348 struct delayed_work connection_loss_work; 349 struct cfg80211_bitrate_mask bitrate_mask; 350 }; 351 352 struct ath10k_vif_iter { 353 u32 vdev_id; 354 struct ath10k_vif *arvif; 355 }; 356 357 /* used for crash-dump storage, protected by data-lock */ 358 struct ath10k_fw_crash_data { 359 bool crashed_since_read; 360 361 uuid_le uuid; 362 struct timespec timestamp; 363 __le32 registers[REG_DUMP_COUNT_QCA988X]; 364 }; 365 366 struct ath10k_debug { 367 struct dentry *debugfs_phy; 368 369 struct ath10k_fw_stats fw_stats; 370 struct completion fw_stats_complete; 371 bool fw_stats_done; 372 373 unsigned long htt_stats_mask; 374 struct delayed_work htt_stats_dwork; 375 struct ath10k_dfs_stats dfs_stats; 376 struct ath_dfs_pool_stats dfs_pool_stats; 377 378 /* protected by conf_mutex */ 379 u32 fw_dbglog_mask; 380 u32 fw_dbglog_level; 381 u32 pktlog_filter; 382 u32 reg_addr; 383 u32 nf_cal_period; 384 385 u8 htt_max_amsdu; 386 u8 htt_max_ampdu; 387 388 struct ath10k_fw_crash_data *fw_crash_data; 389 }; 390 391 enum ath10k_state { 392 ATH10K_STATE_OFF = 0, 393 ATH10K_STATE_ON, 394 395 /* When doing firmware recovery the device is first powered down. 396 * mac80211 is supposed to call in to start() hook later on. It is 397 * however possible that driver unloading and firmware crash overlap. 398 * mac80211 can wait on conf_mutex in stop() while the device is 399 * stopped in ath10k_core_restart() work holding conf_mutex. The state 400 * RESTARTED means that the device is up and mac80211 has started hw 401 * reconfiguration. Once mac80211 is done with the reconfiguration we 402 * set the state to STATE_ON in reconfig_complete(). */ 403 ATH10K_STATE_RESTARTING, 404 ATH10K_STATE_RESTARTED, 405 406 /* The device has crashed while restarting hw. This state is like ON 407 * but commands are blocked in HTC and -ECOMM response is given. This 408 * prevents completion timeouts and makes the driver more responsive to 409 * userspace commands. This is also prevents recursive recovery. */ 410 ATH10K_STATE_WEDGED, 411 412 /* factory tests */ 413 ATH10K_STATE_UTF, 414 }; 415 416 enum ath10k_firmware_mode { 417 /* the default mode, standard 802.11 functionality */ 418 ATH10K_FIRMWARE_MODE_NORMAL, 419 420 /* factory tests etc */ 421 ATH10K_FIRMWARE_MODE_UTF, 422 }; 423 424 enum ath10k_fw_features { 425 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 426 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 427 428 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 429 ATH10K_FW_FEATURE_WMI_10X = 1, 430 431 /* firmware support tx frame management over WMI, otherwise it's HTT */ 432 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 433 434 /* Firmware does not support P2P */ 435 ATH10K_FW_FEATURE_NO_P2P = 3, 436 437 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 438 * bit is required to be set as well. Deprecated, don't use in new 439 * code. 440 */ 441 ATH10K_FW_FEATURE_WMI_10_2 = 4, 442 443 /* Some firmware revisions lack proper multi-interface client powersave 444 * implementation. Enabling PS could result in connection drops, 445 * traffic stalls, etc. 446 */ 447 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, 448 449 /* Some firmware revisions have an incomplete WoWLAN implementation 450 * despite WMI service bit being advertised. This feature flag is used 451 * to distinguish whether WoWLAN is really supported or not. 452 */ 453 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, 454 455 /* Don't trust error code from otp.bin */ 456 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 457 458 /* Some firmware revisions pad 4th hw address to 4 byte boundary making 459 * it 8 bytes long in Native Wifi Rx decap. 460 */ 461 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING, 462 463 /* Firmware supports bypassing PLL setting on init. */ 464 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, 465 466 /* keep last */ 467 ATH10K_FW_FEATURE_COUNT, 468 }; 469 470 enum ath10k_dev_flags { 471 /* Indicates that ath10k device is during CAC phase of DFS */ 472 ATH10K_CAC_RUNNING, 473 ATH10K_FLAG_CORE_REGISTERED, 474 475 /* Device has crashed and needs to restart. This indicates any pending 476 * waiters should immediately cancel instead of waiting for a time out. 477 */ 478 ATH10K_FLAG_CRASH_FLUSH, 479 }; 480 481 enum ath10k_cal_mode { 482 ATH10K_CAL_MODE_FILE, 483 ATH10K_CAL_MODE_OTP, 484 ATH10K_CAL_MODE_DT, 485 }; 486 487 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 488 { 489 switch (mode) { 490 case ATH10K_CAL_MODE_FILE: 491 return "file"; 492 case ATH10K_CAL_MODE_OTP: 493 return "otp"; 494 case ATH10K_CAL_MODE_DT: 495 return "dt"; 496 } 497 498 return "unknown"; 499 } 500 501 enum ath10k_scan_state { 502 ATH10K_SCAN_IDLE, 503 ATH10K_SCAN_STARTING, 504 ATH10K_SCAN_RUNNING, 505 ATH10K_SCAN_ABORTING, 506 }; 507 508 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 509 { 510 switch (state) { 511 case ATH10K_SCAN_IDLE: 512 return "idle"; 513 case ATH10K_SCAN_STARTING: 514 return "starting"; 515 case ATH10K_SCAN_RUNNING: 516 return "running"; 517 case ATH10K_SCAN_ABORTING: 518 return "aborting"; 519 } 520 521 return "unknown"; 522 } 523 524 enum ath10k_tx_pause_reason { 525 ATH10K_TX_PAUSE_Q_FULL, 526 ATH10K_TX_PAUSE_MAX, 527 }; 528 529 struct ath10k { 530 struct ath_common ath_common; 531 struct ieee80211_hw *hw; 532 struct device *dev; 533 u8 mac_addr[ETH_ALEN]; 534 535 enum ath10k_hw_rev hw_rev; 536 u32 chip_id; 537 u32 target_version; 538 u8 fw_version_major; 539 u32 fw_version_minor; 540 u16 fw_version_release; 541 u16 fw_version_build; 542 u32 fw_stats_req_mask; 543 u32 phy_capability; 544 u32 hw_min_tx_power; 545 u32 hw_max_tx_power; 546 u32 ht_cap_info; 547 u32 vht_cap_info; 548 u32 num_rf_chains; 549 u32 max_spatial_stream; 550 /* protected by conf_mutex */ 551 bool ani_enabled; 552 553 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 554 555 bool p2p; 556 557 struct { 558 enum ath10k_bus bus; 559 const struct ath10k_hif_ops *ops; 560 } hif; 561 562 struct completion target_suspend; 563 564 const struct ath10k_hw_regs *regs; 565 const struct ath10k_hw_values *hw_values; 566 struct ath10k_bmi bmi; 567 struct ath10k_wmi wmi; 568 struct ath10k_htc htc; 569 struct ath10k_htt htt; 570 571 struct ath10k_hw_params { 572 u32 id; 573 const char *name; 574 u32 patch_load_addr; 575 int uart_pin; 576 u32 otp_exe_param; 577 578 /* This is true if given HW chip has a quirky Cycle Counter 579 * wraparound which resets to 0x7fffffff instead of 0. All 580 * other CC related counters (e.g. Rx Clear Count) are divided 581 * by 2 so they never wraparound themselves. 582 */ 583 bool has_shifted_cc_wraparound; 584 585 /* Some of chip expects fragment descriptor to be continuous 586 * memory for any TX operation. Set continuous_frag_desc flag 587 * for the hardware which have such requirement. 588 */ 589 bool continuous_frag_desc; 590 591 struct ath10k_hw_params_fw { 592 const char *dir; 593 const char *fw; 594 const char *otp; 595 const char *board; 596 size_t board_size; 597 size_t board_ext_size; 598 } fw; 599 } hw_params; 600 601 const struct firmware *board; 602 const void *board_data; 603 size_t board_len; 604 605 const struct firmware *otp; 606 const void *otp_data; 607 size_t otp_len; 608 609 const struct firmware *firmware; 610 const void *firmware_data; 611 size_t firmware_len; 612 613 const struct firmware *cal_file; 614 615 struct { 616 const void *firmware_codeswap_data; 617 size_t firmware_codeswap_len; 618 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; 619 } swap; 620 621 char spec_board_id[100]; 622 bool spec_board_loaded; 623 624 int fw_api; 625 enum ath10k_cal_mode cal_mode; 626 627 struct { 628 struct completion started; 629 struct completion completed; 630 struct completion on_channel; 631 struct delayed_work timeout; 632 enum ath10k_scan_state state; 633 bool is_roc; 634 int vdev_id; 635 int roc_freq; 636 bool roc_notify; 637 } scan; 638 639 struct { 640 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 641 } mac; 642 643 /* should never be NULL; needed for regular htt rx */ 644 struct ieee80211_channel *rx_channel; 645 646 /* valid during scan; needed for mgmt rx during scan */ 647 struct ieee80211_channel *scan_channel; 648 649 /* current operating channel definition */ 650 struct cfg80211_chan_def chandef; 651 652 unsigned long long free_vdev_map; 653 struct ath10k_vif *monitor_arvif; 654 bool monitor; 655 int monitor_vdev_id; 656 bool monitor_started; 657 unsigned int filter_flags; 658 unsigned long dev_flags; 659 u32 dfs_block_radar_events; 660 661 /* protected by conf_mutex */ 662 bool radar_enabled; 663 int num_started_vdevs; 664 665 /* Protected by conf-mutex */ 666 u8 supp_tx_chainmask; 667 u8 supp_rx_chainmask; 668 u8 cfg_tx_chainmask; 669 u8 cfg_rx_chainmask; 670 671 struct completion install_key_done; 672 673 struct completion vdev_setup_done; 674 675 struct workqueue_struct *workqueue; 676 677 /* prevents concurrent FW reconfiguration */ 678 struct mutex conf_mutex; 679 680 /* protects shared structure data */ 681 spinlock_t data_lock; 682 683 struct list_head arvifs; 684 struct list_head peers; 685 wait_queue_head_t peer_mapping_wq; 686 687 /* protected by conf_mutex */ 688 int num_peers; 689 int num_stations; 690 691 int max_num_peers; 692 int max_num_stations; 693 int max_num_vdevs; 694 int max_num_tdls_vdevs; 695 int num_active_peers; 696 int num_tids; 697 698 struct work_struct offchan_tx_work; 699 struct sk_buff_head offchan_tx_queue; 700 struct completion offchan_tx_completed; 701 struct sk_buff *offchan_tx_skb; 702 703 struct work_struct wmi_mgmt_tx_work; 704 struct sk_buff_head wmi_mgmt_tx_queue; 705 706 enum ath10k_state state; 707 708 struct work_struct register_work; 709 struct work_struct restart_work; 710 711 /* cycle count is reported twice for each visited channel during scan. 712 * access protected by data_lock */ 713 u32 survey_last_rx_clear_count; 714 u32 survey_last_cycle_count; 715 struct survey_info survey[ATH10K_NUM_CHANS]; 716 717 /* Channel info events are expected to come in pairs without and with 718 * COMPLETE flag set respectively for each channel visit during scan. 719 * 720 * However there are deviations from this rule. This flag is used to 721 * avoid reporting garbage data. 722 */ 723 bool ch_info_can_report_survey; 724 725 struct dfs_pattern_detector *dfs_detector; 726 727 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ 728 729 #ifdef CONFIG_ATH10K_DEBUGFS 730 struct ath10k_debug debug; 731 #endif 732 733 struct { 734 /* relay(fs) channel for spectral scan */ 735 struct rchan *rfs_chan_spec_scan; 736 737 /* spectral_mode and spec_config are protected by conf_mutex */ 738 enum ath10k_spectral_mode mode; 739 struct ath10k_spec_scan config; 740 } spectral; 741 742 struct { 743 /* protected by conf_mutex */ 744 const struct firmware *utf; 745 DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT); 746 enum ath10k_fw_wmi_op_version orig_wmi_op_version; 747 748 /* protected by data_lock */ 749 bool utf_monitor; 750 } testmode; 751 752 struct { 753 /* protected by data_lock */ 754 u32 fw_crash_counter; 755 u32 fw_warm_reset_counter; 756 u32 fw_cold_reset_counter; 757 } stats; 758 759 struct ath10k_thermal thermal; 760 struct ath10k_wow wow; 761 762 /* must be last */ 763 u8 drv_priv[0] __aligned(sizeof(void *)); 764 }; 765 766 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 767 enum ath10k_bus bus, 768 enum ath10k_hw_rev hw_rev, 769 const struct ath10k_hif_ops *hif_ops); 770 void ath10k_core_destroy(struct ath10k *ar); 771 void ath10k_core_get_fw_features_str(struct ath10k *ar, 772 char *buf, 773 size_t max_len); 774 775 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode); 776 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 777 void ath10k_core_stop(struct ath10k *ar); 778 int ath10k_core_register(struct ath10k *ar, u32 chip_id); 779 void ath10k_core_unregister(struct ath10k *ar); 780 781 #endif /* _CORE_H_ */ 782