1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 4 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _CORE_H_ 20 #define _CORE_H_ 21 22 #include <linux/completion.h> 23 #include <linux/if_ether.h> 24 #include <linux/types.h> 25 #include <linux/pci.h> 26 #include <linux/uuid.h> 27 #include <linux/time.h> 28 29 #include "htt.h" 30 #include "htc.h" 31 #include "hw.h" 32 #include "targaddrs.h" 33 #include "wmi.h" 34 #include "../ath.h" 35 #include "../regd.h" 36 #include "../dfs_pattern_detector.h" 37 #include "spectral.h" 38 #include "thermal.h" 39 #include "wow.h" 40 #include "swap.h" 41 42 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 43 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 44 #define WO(_f) ((_f##_OFFSET) >> 2) 45 46 #define ATH10K_SCAN_ID 0 47 #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */ 48 #define WMI_READY_TIMEOUT (5 * HZ) 49 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ) 50 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ) 51 #define ATH10K_NUM_CHANS 41 52 #define ATH10K_MAX_5G_CHAN 173 53 54 /* Antenna noise floor */ 55 #define ATH10K_DEFAULT_NOISE_FLOOR -95 56 57 #define ATH10K_INVALID_RSSI 128 58 59 #define ATH10K_MAX_NUM_MGMT_PENDING 128 60 61 /* number of failed packets (20 packets with 16 sw reties each) */ 62 #define ATH10K_KICKOUT_THRESHOLD (20 * 16) 63 64 /* 65 * Use insanely high numbers to make sure that the firmware implementation 66 * won't start, we have the same functionality already in hostapd. Unit 67 * is seconds. 68 */ 69 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 70 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 71 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 72 73 /* NAPI poll budget */ 74 #define ATH10K_NAPI_BUDGET 64 75 76 /* SMBIOS type containing Board Data File Name Extension */ 77 #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8 78 79 /* SMBIOS type structure length (excluding strings-set) */ 80 #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9 81 82 /* Offset pointing to Board Data File Name Extension */ 83 #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8 84 85 /* Board Data File Name Extension string length. 86 * String format: BDF_<Customer ID>_<Extension>\0 87 */ 88 #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20 89 90 /* The magic used by QCA spec */ 91 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_" 92 93 struct ath10k; 94 95 enum ath10k_bus { 96 ATH10K_BUS_PCI, 97 ATH10K_BUS_AHB, 98 ATH10K_BUS_SDIO, 99 ATH10K_BUS_USB, 100 ATH10K_BUS_SNOC, 101 }; 102 103 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 104 { 105 switch (bus) { 106 case ATH10K_BUS_PCI: 107 return "pci"; 108 case ATH10K_BUS_AHB: 109 return "ahb"; 110 case ATH10K_BUS_SDIO: 111 return "sdio"; 112 case ATH10K_BUS_USB: 113 return "usb"; 114 case ATH10K_BUS_SNOC: 115 return "snoc"; 116 } 117 118 return "unknown"; 119 } 120 121 enum ath10k_skb_flags { 122 ATH10K_SKB_F_NO_HWCRYPT = BIT(0), 123 ATH10K_SKB_F_DTIM_ZERO = BIT(1), 124 ATH10K_SKB_F_DELIVER_CAB = BIT(2), 125 ATH10K_SKB_F_MGMT = BIT(3), 126 ATH10K_SKB_F_QOS = BIT(4), 127 }; 128 129 struct ath10k_skb_cb { 130 dma_addr_t paddr; 131 u8 flags; 132 u8 eid; 133 u16 msdu_id; 134 struct ieee80211_vif *vif; 135 struct ieee80211_txq *txq; 136 } __packed; 137 138 struct ath10k_skb_rxcb { 139 dma_addr_t paddr; 140 struct hlist_node hlist; 141 }; 142 143 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 144 { 145 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 146 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 147 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 148 } 149 150 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 151 { 152 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 153 return (struct ath10k_skb_rxcb *)skb->cb; 154 } 155 156 #define ATH10K_RXCB_SKB(rxcb) \ 157 container_of((void *)rxcb, struct sk_buff, cb) 158 159 static inline u32 host_interest_item_address(u32 item_offset) 160 { 161 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 162 } 163 164 struct ath10k_bmi { 165 bool done_sent; 166 }; 167 168 struct ath10k_mem_chunk { 169 void *vaddr; 170 dma_addr_t paddr; 171 u32 len; 172 u32 req_id; 173 }; 174 175 struct ath10k_wmi { 176 enum ath10k_htc_ep_id eid; 177 struct completion service_ready; 178 struct completion unified_ready; 179 struct completion barrier; 180 struct completion radar_confirm; 181 wait_queue_head_t tx_credits_wq; 182 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 183 struct wmi_cmd_map *cmd; 184 struct wmi_vdev_param_map *vdev_param; 185 struct wmi_pdev_param_map *pdev_param; 186 const struct wmi_ops *ops; 187 const struct wmi_peer_flags_map *peer_flags; 188 189 u32 num_mem_chunks; 190 u32 rx_decap_mode; 191 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 192 }; 193 194 struct ath10k_fw_stats_peer { 195 struct list_head list; 196 197 u8 peer_macaddr[ETH_ALEN]; 198 u32 peer_rssi; 199 u32 peer_tx_rate; 200 u32 peer_rx_rate; /* 10x only */ 201 u32 rx_duration; 202 }; 203 204 struct ath10k_fw_extd_stats_peer { 205 struct list_head list; 206 207 u8 peer_macaddr[ETH_ALEN]; 208 u32 rx_duration; 209 }; 210 211 struct ath10k_fw_stats_vdev { 212 struct list_head list; 213 214 u32 vdev_id; 215 u32 beacon_snr; 216 u32 data_snr; 217 u32 num_tx_frames[4]; 218 u32 num_rx_frames; 219 u32 num_tx_frames_retries[4]; 220 u32 num_tx_frames_failures[4]; 221 u32 num_rts_fail; 222 u32 num_rts_success; 223 u32 num_rx_err; 224 u32 num_rx_discard; 225 u32 num_tx_not_acked; 226 u32 tx_rate_history[10]; 227 u32 beacon_rssi_history[10]; 228 }; 229 230 struct ath10k_fw_stats_vdev_extd { 231 struct list_head list; 232 233 u32 vdev_id; 234 u32 ppdu_aggr_cnt; 235 u32 ppdu_noack; 236 u32 mpdu_queued; 237 u32 ppdu_nonaggr_cnt; 238 u32 mpdu_sw_requeued; 239 u32 mpdu_suc_retry; 240 u32 mpdu_suc_multitry; 241 u32 mpdu_fail_retry; 242 u32 tx_ftm_suc; 243 u32 tx_ftm_suc_retry; 244 u32 tx_ftm_fail; 245 u32 rx_ftmr_cnt; 246 u32 rx_ftmr_dup_cnt; 247 u32 rx_iftmr_cnt; 248 u32 rx_iftmr_dup_cnt; 249 }; 250 251 struct ath10k_fw_stats_pdev { 252 struct list_head list; 253 254 /* PDEV stats */ 255 s32 ch_noise_floor; 256 u32 tx_frame_count; /* Cycles spent transmitting frames */ 257 u32 rx_frame_count; /* Cycles spent receiving frames */ 258 u32 rx_clear_count; /* Total channel busy time, evidently */ 259 u32 cycle_count; /* Total on-channel time */ 260 u32 phy_err_count; 261 u32 chan_tx_power; 262 u32 ack_rx_bad; 263 u32 rts_bad; 264 u32 rts_good; 265 u32 fcs_bad; 266 u32 no_beacons; 267 u32 mib_int_count; 268 269 /* PDEV TX stats */ 270 s32 comp_queued; 271 s32 comp_delivered; 272 s32 msdu_enqued; 273 s32 mpdu_enqued; 274 s32 wmm_drop; 275 s32 local_enqued; 276 s32 local_freed; 277 s32 hw_queued; 278 s32 hw_reaped; 279 s32 underrun; 280 u32 hw_paused; 281 s32 tx_abort; 282 s32 mpdus_requed; 283 u32 tx_ko; 284 u32 data_rc; 285 u32 self_triggers; 286 u32 sw_retry_failure; 287 u32 illgl_rate_phy_err; 288 u32 pdev_cont_xretry; 289 u32 pdev_tx_timeout; 290 u32 pdev_resets; 291 u32 phy_underrun; 292 u32 txop_ovf; 293 u32 seq_posted; 294 u32 seq_failed_queueing; 295 u32 seq_completed; 296 u32 seq_restarted; 297 u32 mu_seq_posted; 298 u32 mpdus_sw_flush; 299 u32 mpdus_hw_filter; 300 u32 mpdus_truncated; 301 u32 mpdus_ack_failed; 302 u32 mpdus_expired; 303 304 /* PDEV RX stats */ 305 s32 mid_ppdu_route_change; 306 s32 status_rcvd; 307 s32 r0_frags; 308 s32 r1_frags; 309 s32 r2_frags; 310 s32 r3_frags; 311 s32 htt_msdus; 312 s32 htt_mpdus; 313 s32 loc_msdus; 314 s32 loc_mpdus; 315 s32 oversize_amsdu; 316 s32 phy_errs; 317 s32 phy_err_drop; 318 s32 mpdu_errs; 319 s32 rx_ovfl_errs; 320 }; 321 322 struct ath10k_fw_stats { 323 bool extended; 324 struct list_head pdevs; 325 struct list_head vdevs; 326 struct list_head peers; 327 struct list_head peers_extd; 328 }; 329 330 #define ATH10K_TPC_TABLE_TYPE_FLAG 1 331 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF 332 333 struct ath10k_tpc_table { 334 u32 pream_idx[WMI_TPC_RATE_MAX]; 335 u8 rate_code[WMI_TPC_RATE_MAX]; 336 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 337 }; 338 339 struct ath10k_tpc_stats { 340 u32 reg_domain; 341 u32 chan_freq; 342 u32 phy_mode; 343 u32 twice_antenna_reduction; 344 u32 twice_max_rd_power; 345 s32 twice_antenna_gain; 346 u32 power_limit; 347 u32 num_tx_chain; 348 u32 ctl; 349 u32 rate_max; 350 u8 flag[WMI_TPC_FLAG]; 351 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG]; 352 }; 353 354 struct ath10k_tpc_table_final { 355 u32 pream_idx[WMI_TPC_FINAL_RATE_MAX]; 356 u8 rate_code[WMI_TPC_FINAL_RATE_MAX]; 357 char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 358 }; 359 360 struct ath10k_tpc_stats_final { 361 u32 reg_domain; 362 u32 chan_freq; 363 u32 phy_mode; 364 u32 twice_antenna_reduction; 365 u32 twice_max_rd_power; 366 s32 twice_antenna_gain; 367 u32 power_limit; 368 u32 num_tx_chain; 369 u32 ctl; 370 u32 rate_max; 371 u8 flag[WMI_TPC_FLAG]; 372 struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG]; 373 }; 374 375 struct ath10k_dfs_stats { 376 u32 phy_errors; 377 u32 pulses_total; 378 u32 pulses_detected; 379 u32 pulses_discarded; 380 u32 radar_detected; 381 }; 382 383 enum ath10k_radar_confirmation_state { 384 ATH10K_RADAR_CONFIRMATION_IDLE = 0, 385 ATH10K_RADAR_CONFIRMATION_INPROGRESS, 386 ATH10K_RADAR_CONFIRMATION_STOPPED, 387 }; 388 389 struct ath10k_radar_found_info { 390 u32 pri_min; 391 u32 pri_max; 392 u32 width_min; 393 u32 width_max; 394 u32 sidx_min; 395 u32 sidx_max; 396 }; 397 398 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 399 400 struct ath10k_peer { 401 struct list_head list; 402 struct ieee80211_vif *vif; 403 struct ieee80211_sta *sta; 404 405 bool removed; 406 int vdev_id; 407 u8 addr[ETH_ALEN]; 408 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 409 410 /* protected by ar->data_lock */ 411 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 412 }; 413 414 struct ath10k_txq { 415 struct list_head list; 416 unsigned long num_fw_queued; 417 unsigned long num_push_allowed; 418 }; 419 420 enum ath10k_pkt_rx_err { 421 ATH10K_PKT_RX_ERR_FCS, 422 ATH10K_PKT_RX_ERR_TKIP, 423 ATH10K_PKT_RX_ERR_CRYPT, 424 ATH10K_PKT_RX_ERR_PEER_IDX_INVAL, 425 ATH10K_PKT_RX_ERR_MAX, 426 }; 427 428 enum ath10k_ampdu_subfrm_num { 429 ATH10K_AMPDU_SUBFRM_NUM_10, 430 ATH10K_AMPDU_SUBFRM_NUM_20, 431 ATH10K_AMPDU_SUBFRM_NUM_30, 432 ATH10K_AMPDU_SUBFRM_NUM_40, 433 ATH10K_AMPDU_SUBFRM_NUM_50, 434 ATH10K_AMPDU_SUBFRM_NUM_60, 435 ATH10K_AMPDU_SUBFRM_NUM_MORE, 436 ATH10K_AMPDU_SUBFRM_NUM_MAX, 437 }; 438 439 enum ath10k_amsdu_subfrm_num { 440 ATH10K_AMSDU_SUBFRM_NUM_1, 441 ATH10K_AMSDU_SUBFRM_NUM_2, 442 ATH10K_AMSDU_SUBFRM_NUM_3, 443 ATH10K_AMSDU_SUBFRM_NUM_4, 444 ATH10K_AMSDU_SUBFRM_NUM_MORE, 445 ATH10K_AMSDU_SUBFRM_NUM_MAX, 446 }; 447 448 struct ath10k_sta_tid_stats { 449 unsigned long int rx_pkt_from_fw; 450 unsigned long int rx_pkt_unchained; 451 unsigned long int rx_pkt_drop_chained; 452 unsigned long int rx_pkt_drop_filter; 453 unsigned long int rx_pkt_err[ATH10K_PKT_RX_ERR_MAX]; 454 unsigned long int rx_pkt_queued_for_mac; 455 unsigned long int rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX]; 456 unsigned long int rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX]; 457 }; 458 459 struct ath10k_sta { 460 struct ath10k_vif *arvif; 461 462 /* the following are protected by ar->data_lock */ 463 u32 changed; /* IEEE80211_RC_* */ 464 u32 bw; 465 u32 nss; 466 u32 smps; 467 u16 peer_id; 468 struct rate_info txrate; 469 470 struct work_struct update_wk; 471 u64 rx_duration; 472 473 #ifdef CONFIG_MAC80211_DEBUGFS 474 /* protected by conf_mutex */ 475 bool aggr_mode; 476 477 /* Protected with ar->data_lock */ 478 struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1]; 479 #endif 480 }; 481 482 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 483 484 enum ath10k_beacon_state { 485 ATH10K_BEACON_SCHEDULED = 0, 486 ATH10K_BEACON_SENDING, 487 ATH10K_BEACON_SENT, 488 }; 489 490 struct ath10k_vif { 491 struct list_head list; 492 493 u32 vdev_id; 494 u16 peer_id; 495 enum wmi_vdev_type vdev_type; 496 enum wmi_vdev_subtype vdev_subtype; 497 u32 beacon_interval; 498 u32 dtim_period; 499 struct sk_buff *beacon; 500 /* protected by data_lock */ 501 enum ath10k_beacon_state beacon_state; 502 void *beacon_buf; 503 dma_addr_t beacon_paddr; 504 unsigned long tx_paused; /* arbitrary values defined by target */ 505 506 struct ath10k *ar; 507 struct ieee80211_vif *vif; 508 509 bool is_started; 510 bool is_up; 511 bool spectral_enabled; 512 bool ps; 513 u32 aid; 514 u8 bssid[ETH_ALEN]; 515 516 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 517 s8 def_wep_key_idx; 518 519 u16 tx_seq_no; 520 521 union { 522 struct { 523 u32 uapsd; 524 } sta; 525 struct { 526 /* 512 stations */ 527 u8 tim_bitmap[64]; 528 u8 tim_len; 529 u32 ssid_len; 530 u8 ssid[IEEE80211_MAX_SSID_LEN]; 531 bool hidden_ssid; 532 /* P2P_IE with NoA attribute for P2P_GO case */ 533 u32 noa_len; 534 u8 *noa_data; 535 } ap; 536 } u; 537 538 bool use_cts_prot; 539 bool nohwcrypt; 540 int num_legacy_stations; 541 int txpower; 542 struct wmi_wmm_params_all_arg wmm_params; 543 struct work_struct ap_csa_work; 544 struct delayed_work connection_loss_work; 545 struct cfg80211_bitrate_mask bitrate_mask; 546 }; 547 548 struct ath10k_vif_iter { 549 u32 vdev_id; 550 struct ath10k_vif *arvif; 551 }; 552 553 /* Copy Engine register dump, protected by ce-lock */ 554 struct ath10k_ce_crash_data { 555 __le32 base_addr; 556 __le32 src_wr_idx; 557 __le32 src_r_idx; 558 __le32 dst_wr_idx; 559 __le32 dst_r_idx; 560 }; 561 562 struct ath10k_ce_crash_hdr { 563 __le32 ce_count; 564 __le32 reserved[3]; /* for future use */ 565 struct ath10k_ce_crash_data entries[]; 566 }; 567 568 #define MAX_MEM_DUMP_TYPE 5 569 570 /* used for crash-dump storage, protected by data-lock */ 571 struct ath10k_fw_crash_data { 572 guid_t guid; 573 struct timespec64 timestamp; 574 __le32 registers[REG_DUMP_COUNT_QCA988X]; 575 struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX]; 576 577 u8 *ramdump_buf; 578 size_t ramdump_buf_len; 579 }; 580 581 struct ath10k_debug { 582 struct dentry *debugfs_phy; 583 584 struct ath10k_fw_stats fw_stats; 585 struct completion fw_stats_complete; 586 bool fw_stats_done; 587 588 unsigned long htt_stats_mask; 589 struct delayed_work htt_stats_dwork; 590 struct ath10k_dfs_stats dfs_stats; 591 struct ath_dfs_pool_stats dfs_pool_stats; 592 593 /* used for tpc-dump storage, protected by data-lock */ 594 struct ath10k_tpc_stats *tpc_stats; 595 struct ath10k_tpc_stats_final *tpc_stats_final; 596 597 struct completion tpc_complete; 598 599 /* protected by conf_mutex */ 600 u64 fw_dbglog_mask; 601 u32 fw_dbglog_level; 602 u32 reg_addr; 603 u32 nf_cal_period; 604 void *cal_data; 605 }; 606 607 enum ath10k_state { 608 ATH10K_STATE_OFF = 0, 609 ATH10K_STATE_ON, 610 611 /* When doing firmware recovery the device is first powered down. 612 * mac80211 is supposed to call in to start() hook later on. It is 613 * however possible that driver unloading and firmware crash overlap. 614 * mac80211 can wait on conf_mutex in stop() while the device is 615 * stopped in ath10k_core_restart() work holding conf_mutex. The state 616 * RESTARTED means that the device is up and mac80211 has started hw 617 * reconfiguration. Once mac80211 is done with the reconfiguration we 618 * set the state to STATE_ON in reconfig_complete(). 619 */ 620 ATH10K_STATE_RESTARTING, 621 ATH10K_STATE_RESTARTED, 622 623 /* The device has crashed while restarting hw. This state is like ON 624 * but commands are blocked in HTC and -ECOMM response is given. This 625 * prevents completion timeouts and makes the driver more responsive to 626 * userspace commands. This is also prevents recursive recovery. 627 */ 628 ATH10K_STATE_WEDGED, 629 630 /* factory tests */ 631 ATH10K_STATE_UTF, 632 }; 633 634 enum ath10k_firmware_mode { 635 /* the default mode, standard 802.11 functionality */ 636 ATH10K_FIRMWARE_MODE_NORMAL, 637 638 /* factory tests etc */ 639 ATH10K_FIRMWARE_MODE_UTF, 640 }; 641 642 enum ath10k_fw_features { 643 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 644 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 645 646 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 647 ATH10K_FW_FEATURE_WMI_10X = 1, 648 649 /* firmware support tx frame management over WMI, otherwise it's HTT */ 650 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 651 652 /* Firmware does not support P2P */ 653 ATH10K_FW_FEATURE_NO_P2P = 3, 654 655 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 656 * bit is required to be set as well. Deprecated, don't use in new 657 * code. 658 */ 659 ATH10K_FW_FEATURE_WMI_10_2 = 4, 660 661 /* Some firmware revisions lack proper multi-interface client powersave 662 * implementation. Enabling PS could result in connection drops, 663 * traffic stalls, etc. 664 */ 665 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, 666 667 /* Some firmware revisions have an incomplete WoWLAN implementation 668 * despite WMI service bit being advertised. This feature flag is used 669 * to distinguish whether WoWLAN is really supported or not. 670 */ 671 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, 672 673 /* Don't trust error code from otp.bin */ 674 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7, 675 676 /* Some firmware revisions pad 4th hw address to 4 byte boundary making 677 * it 8 bytes long in Native Wifi Rx decap. 678 */ 679 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8, 680 681 /* Firmware supports bypassing PLL setting on init. */ 682 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, 683 684 /* Raw mode support. If supported, FW supports receiving and trasmitting 685 * frames in raw mode. 686 */ 687 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, 688 689 /* Firmware Supports Adaptive CCA*/ 690 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11, 691 692 /* Firmware supports management frame protection */ 693 ATH10K_FW_FEATURE_MFP_SUPPORT = 12, 694 695 /* Firmware supports pull-push model where host shares it's software 696 * queue state with firmware and firmware generates fetch requests 697 * telling host which queues to dequeue tx from. 698 * 699 * Primary function of this is improved MU-MIMO performance with 700 * multiple clients. 701 */ 702 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13, 703 704 /* Firmware supports BT-Coex without reloading firmware via pdev param. 705 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of 706 * extended resource config should be enabled always. This firmware IE 707 * is used to configure WMI_COEX_GPIO_SUPPORT. 708 */ 709 ATH10K_FW_FEATURE_BTCOEX_PARAM = 14, 710 711 /* Unused flag and proven to be not working, enable this if you want 712 * to experiment sending NULL func data frames in HTT TX 713 */ 714 ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15, 715 716 /* Firmware allow other BSS mesh broadcast/multicast frames without 717 * creating monitor interface. Appropriate rxfilters are programmed for 718 * mesh vdev by firmware itself. This feature flags will be used for 719 * not creating monitor vdev while configuring mesh node. 720 */ 721 ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16, 722 723 /* Firmware does not support power save in station mode. */ 724 ATH10K_FW_FEATURE_NO_PS = 17, 725 726 /* Firmware allows management tx by reference instead of by value. */ 727 ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18, 728 729 /* Firmware load is done externally, not by bmi */ 730 ATH10K_FW_FEATURE_NON_BMI = 19, 731 732 /* keep last */ 733 ATH10K_FW_FEATURE_COUNT, 734 }; 735 736 enum ath10k_dev_flags { 737 /* Indicates that ath10k device is during CAC phase of DFS */ 738 ATH10K_CAC_RUNNING, 739 ATH10K_FLAG_CORE_REGISTERED, 740 741 /* Device has crashed and needs to restart. This indicates any pending 742 * waiters should immediately cancel instead of waiting for a time out. 743 */ 744 ATH10K_FLAG_CRASH_FLUSH, 745 746 /* Use Raw mode instead of native WiFi Tx/Rx encap mode. 747 * Raw mode supports both hardware and software crypto. Native WiFi only 748 * supports hardware crypto. 749 */ 750 ATH10K_FLAG_RAW_MODE, 751 752 /* Disable HW crypto engine */ 753 ATH10K_FLAG_HW_CRYPTO_DISABLED, 754 755 /* Bluetooth coexistance enabled */ 756 ATH10K_FLAG_BTCOEX, 757 758 /* Per Station statistics service */ 759 ATH10K_FLAG_PEER_STATS, 760 }; 761 762 enum ath10k_cal_mode { 763 ATH10K_CAL_MODE_FILE, 764 ATH10K_CAL_MODE_OTP, 765 ATH10K_CAL_MODE_DT, 766 ATH10K_PRE_CAL_MODE_FILE, 767 ATH10K_PRE_CAL_MODE_DT, 768 ATH10K_CAL_MODE_EEPROM, 769 }; 770 771 enum ath10k_crypt_mode { 772 /* Only use hardware crypto engine */ 773 ATH10K_CRYPT_MODE_HW, 774 /* Only use software crypto engine */ 775 ATH10K_CRYPT_MODE_SW, 776 }; 777 778 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 779 { 780 switch (mode) { 781 case ATH10K_CAL_MODE_FILE: 782 return "file"; 783 case ATH10K_CAL_MODE_OTP: 784 return "otp"; 785 case ATH10K_CAL_MODE_DT: 786 return "dt"; 787 case ATH10K_PRE_CAL_MODE_FILE: 788 return "pre-cal-file"; 789 case ATH10K_PRE_CAL_MODE_DT: 790 return "pre-cal-dt"; 791 case ATH10K_CAL_MODE_EEPROM: 792 return "eeprom"; 793 } 794 795 return "unknown"; 796 } 797 798 enum ath10k_scan_state { 799 ATH10K_SCAN_IDLE, 800 ATH10K_SCAN_STARTING, 801 ATH10K_SCAN_RUNNING, 802 ATH10K_SCAN_ABORTING, 803 }; 804 805 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 806 { 807 switch (state) { 808 case ATH10K_SCAN_IDLE: 809 return "idle"; 810 case ATH10K_SCAN_STARTING: 811 return "starting"; 812 case ATH10K_SCAN_RUNNING: 813 return "running"; 814 case ATH10K_SCAN_ABORTING: 815 return "aborting"; 816 } 817 818 return "unknown"; 819 } 820 821 enum ath10k_tx_pause_reason { 822 ATH10K_TX_PAUSE_Q_FULL, 823 ATH10K_TX_PAUSE_MAX, 824 }; 825 826 struct ath10k_fw_file { 827 const struct firmware *firmware; 828 829 char fw_version[ETHTOOL_FWVERS_LEN]; 830 831 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 832 833 enum ath10k_fw_wmi_op_version wmi_op_version; 834 enum ath10k_fw_htt_op_version htt_op_version; 835 836 const void *firmware_data; 837 size_t firmware_len; 838 839 const void *otp_data; 840 size_t otp_len; 841 842 const void *codeswap_data; 843 size_t codeswap_len; 844 845 /* The original idea of struct ath10k_fw_file was that it only 846 * contains struct firmware and pointers to various parts (actual 847 * firmware binary, otp, metadata etc) of the file. This seg_info 848 * is actually created separate but as this is used similarly as 849 * the other firmware components it's more convenient to have it 850 * here. 851 */ 852 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; 853 }; 854 855 struct ath10k_fw_components { 856 const struct firmware *board; 857 const void *board_data; 858 size_t board_len; 859 860 struct ath10k_fw_file fw_file; 861 }; 862 863 struct ath10k_per_peer_tx_stats { 864 u32 succ_bytes; 865 u32 retry_bytes; 866 u32 failed_bytes; 867 u8 ratecode; 868 u8 flags; 869 u16 peer_id; 870 u16 succ_pkts; 871 u16 retry_pkts; 872 u16 failed_pkts; 873 u16 duration; 874 u32 reserved1; 875 u32 reserved2; 876 }; 877 878 struct ath10k { 879 struct ath_common ath_common; 880 struct ieee80211_hw *hw; 881 struct ieee80211_ops *ops; 882 struct device *dev; 883 u8 mac_addr[ETH_ALEN]; 884 885 enum ath10k_hw_rev hw_rev; 886 u16 dev_id; 887 u32 chip_id; 888 u32 target_version; 889 u8 fw_version_major; 890 u32 fw_version_minor; 891 u16 fw_version_release; 892 u16 fw_version_build; 893 u32 fw_stats_req_mask; 894 u32 phy_capability; 895 u32 hw_min_tx_power; 896 u32 hw_max_tx_power; 897 u32 hw_eeprom_rd; 898 u32 ht_cap_info; 899 u32 vht_cap_info; 900 u32 num_rf_chains; 901 u32 max_spatial_stream; 902 /* protected by conf_mutex */ 903 u32 low_5ghz_chan; 904 u32 high_5ghz_chan; 905 bool ani_enabled; 906 907 bool p2p; 908 909 struct { 910 enum ath10k_bus bus; 911 const struct ath10k_hif_ops *ops; 912 } hif; 913 914 struct completion target_suspend; 915 916 const struct ath10k_hw_regs *regs; 917 const struct ath10k_hw_ce_regs *hw_ce_regs; 918 const struct ath10k_hw_values *hw_values; 919 struct ath10k_bmi bmi; 920 struct ath10k_wmi wmi; 921 struct ath10k_htc htc; 922 struct ath10k_htt htt; 923 924 struct ath10k_hw_params hw_params; 925 926 /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */ 927 struct ath10k_fw_components normal_mode_fw; 928 929 /* READ-ONLY images of the running firmware, which can be either 930 * normal or UTF. Do not modify, release etc! 931 */ 932 const struct ath10k_fw_components *running_fw; 933 934 const struct firmware *pre_cal_file; 935 const struct firmware *cal_file; 936 937 struct { 938 u32 vendor; 939 u32 device; 940 u32 subsystem_vendor; 941 u32 subsystem_device; 942 943 bool bmi_ids_valid; 944 u8 bmi_board_id; 945 u8 bmi_chip_id; 946 947 char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH]; 948 } id; 949 950 int fw_api; 951 int bd_api; 952 enum ath10k_cal_mode cal_mode; 953 954 struct { 955 struct completion started; 956 struct completion completed; 957 struct completion on_channel; 958 struct delayed_work timeout; 959 enum ath10k_scan_state state; 960 bool is_roc; 961 int vdev_id; 962 int roc_freq; 963 bool roc_notify; 964 } scan; 965 966 struct { 967 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 968 } mac; 969 970 /* should never be NULL; needed for regular htt rx */ 971 struct ieee80211_channel *rx_channel; 972 973 /* valid during scan; needed for mgmt rx during scan */ 974 struct ieee80211_channel *scan_channel; 975 976 /* current operating channel definition */ 977 struct cfg80211_chan_def chandef; 978 979 /* currently configured operating channel in firmware */ 980 struct ieee80211_channel *tgt_oper_chan; 981 982 unsigned long long free_vdev_map; 983 struct ath10k_vif *monitor_arvif; 984 bool monitor; 985 int monitor_vdev_id; 986 bool monitor_started; 987 unsigned int filter_flags; 988 unsigned long dev_flags; 989 bool dfs_block_radar_events; 990 991 /* protected by conf_mutex */ 992 bool radar_enabled; 993 int num_started_vdevs; 994 995 /* Protected by conf-mutex */ 996 u8 cfg_tx_chainmask; 997 u8 cfg_rx_chainmask; 998 999 struct completion install_key_done; 1000 1001 struct completion vdev_setup_done; 1002 1003 struct workqueue_struct *workqueue; 1004 /* Auxiliary workqueue */ 1005 struct workqueue_struct *workqueue_aux; 1006 1007 /* prevents concurrent FW reconfiguration */ 1008 struct mutex conf_mutex; 1009 1010 /* protects shared structure data */ 1011 spinlock_t data_lock; 1012 /* protects: ar->txqs, artxq->list */ 1013 spinlock_t txqs_lock; 1014 1015 struct list_head txqs; 1016 struct list_head arvifs; 1017 struct list_head peers; 1018 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS]; 1019 wait_queue_head_t peer_mapping_wq; 1020 1021 /* protected by conf_mutex */ 1022 int num_peers; 1023 int num_stations; 1024 1025 int max_num_peers; 1026 int max_num_stations; 1027 int max_num_vdevs; 1028 int max_num_tdls_vdevs; 1029 int num_active_peers; 1030 int num_tids; 1031 1032 struct work_struct svc_rdy_work; 1033 struct sk_buff *svc_rdy_skb; 1034 1035 struct work_struct offchan_tx_work; 1036 struct sk_buff_head offchan_tx_queue; 1037 struct completion offchan_tx_completed; 1038 struct sk_buff *offchan_tx_skb; 1039 1040 struct work_struct wmi_mgmt_tx_work; 1041 struct sk_buff_head wmi_mgmt_tx_queue; 1042 1043 enum ath10k_state state; 1044 1045 struct work_struct register_work; 1046 struct work_struct restart_work; 1047 1048 /* cycle count is reported twice for each visited channel during scan. 1049 * access protected by data_lock 1050 */ 1051 u32 survey_last_rx_clear_count; 1052 u32 survey_last_cycle_count; 1053 struct survey_info survey[ATH10K_NUM_CHANS]; 1054 1055 /* Channel info events are expected to come in pairs without and with 1056 * COMPLETE flag set respectively for each channel visit during scan. 1057 * 1058 * However there are deviations from this rule. This flag is used to 1059 * avoid reporting garbage data. 1060 */ 1061 bool ch_info_can_report_survey; 1062 struct completion bss_survey_done; 1063 1064 struct dfs_pattern_detector *dfs_detector; 1065 1066 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ 1067 1068 #ifdef CONFIG_ATH10K_DEBUGFS 1069 struct ath10k_debug debug; 1070 struct { 1071 /* relay(fs) channel for spectral scan */ 1072 struct rchan *rfs_chan_spec_scan; 1073 1074 /* spectral_mode and spec_config are protected by conf_mutex */ 1075 enum ath10k_spectral_mode mode; 1076 struct ath10k_spec_scan config; 1077 } spectral; 1078 #endif 1079 1080 u32 pktlog_filter; 1081 1082 #ifdef CONFIG_DEV_COREDUMP 1083 struct { 1084 struct ath10k_fw_crash_data *fw_crash_data; 1085 } coredump; 1086 #endif 1087 1088 struct { 1089 /* protected by conf_mutex */ 1090 struct ath10k_fw_components utf_mode_fw; 1091 1092 /* protected by data_lock */ 1093 bool utf_monitor; 1094 } testmode; 1095 1096 struct { 1097 /* protected by data_lock */ 1098 u32 fw_crash_counter; 1099 u32 fw_warm_reset_counter; 1100 u32 fw_cold_reset_counter; 1101 } stats; 1102 1103 struct ath10k_thermal thermal; 1104 struct ath10k_wow wow; 1105 struct ath10k_per_peer_tx_stats peer_tx_stats; 1106 1107 /* NAPI */ 1108 struct net_device napi_dev; 1109 struct napi_struct napi; 1110 1111 struct work_struct set_coverage_class_work; 1112 /* protected by conf_mutex */ 1113 struct { 1114 /* writing also protected by data_lock */ 1115 s16 coverage_class; 1116 1117 u32 reg_phyclk; 1118 u32 reg_slottime_conf; 1119 u32 reg_slottime_orig; 1120 u32 reg_ack_cts_timeout_conf; 1121 u32 reg_ack_cts_timeout_orig; 1122 } fw_coverage; 1123 1124 u32 ampdu_reference; 1125 1126 void *ce_priv; 1127 1128 u32 sta_tid_stats_mask; 1129 1130 /* protected by data_lock */ 1131 enum ath10k_radar_confirmation_state radar_conf_state; 1132 struct ath10k_radar_found_info last_radar_info; 1133 struct work_struct radar_confirmation_work; 1134 1135 /* must be last */ 1136 u8 drv_priv[0] __aligned(sizeof(void *)); 1137 }; 1138 1139 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar) 1140 { 1141 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) && 1142 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) 1143 return true; 1144 1145 return false; 1146 } 1147 1148 extern unsigned long ath10k_coredump_mask; 1149 1150 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 1151 enum ath10k_bus bus, 1152 enum ath10k_hw_rev hw_rev, 1153 const struct ath10k_hif_ops *hif_ops); 1154 void ath10k_core_destroy(struct ath10k *ar); 1155 void ath10k_core_get_fw_features_str(struct ath10k *ar, 1156 char *buf, 1157 size_t max_len); 1158 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1159 struct ath10k_fw_file *fw_file); 1160 1161 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1162 const struct ath10k_fw_components *fw_components); 1163 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 1164 void ath10k_core_stop(struct ath10k *ar); 1165 int ath10k_core_register(struct ath10k *ar, u32 chip_id); 1166 void ath10k_core_unregister(struct ath10k *ar); 1167 1168 #endif /* _CORE_H_ */ 1169